◦
◦
V cc R1 R2
Rλ Rλ
Rλ1
V x V x = V cc (
R1 + R2 R1 + R2 + Rλ
)
V n = 2,2 V V p = 2,9
Rl
Rλ1
Rλ2
V xλ1 = V cc(
V xλ2 = V cc(
R1 + R2 R1 + R2 + Rλ1 R1 + R2 R1 + R2 + Rλ2
) ≥ 2,9 ) ≤ 2,2
Rλ2
R1 = 1k Ω V cc = 5 V
R2 = 5k Ω
V xλ1 = 5 V ≥ 2,9 V xλ1 V xλ2 = 0,242 V ≥ 2,2 V xλ2
◦
Rc
Rc =
V cc − V d − V sat
0,8(I max)
= 41,5 Ω
47 Ω
P R = (I max )2 R P R = (0,8(0,1))247 P R = 0,3 W
R0 + P 0 =
V cc
50 %I c R0 = 200 Ω
P RO = (50 %I c )2 200 = 0,125 W R0
Rλ
easan . Watertown, MA 02172 PH: (617) 926-0404 FAX: (617) 924-1235
2N2222A
Features • • • •
Meets MIL-S-19500/255 Collector-Base Voltage 75 Collector Current: 800mA Fast Switching 335 nS
75 Volts 0.8 Amps NPN BIPOLAR TRANSISTOR
Maximum Ratings RATING
SYMBOL
MAX.
UNIT
5
Collector-Emitter Voltage Collector-Base Voltage Emitter-Base Voltage Collector Current o Total Device Dissipation @ T A = 25 C o Derate above 25 C o Total Device Dissipation @T C = 25 C o Derate above 25 C Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Case Operating Temperature Range Storage Temperature Range
Mechanical Outline
Datasheet# MSC0275A 5/19/1997
VCEO VCBO VEBO IC PD PD RθJA RθJC TJ T STG
75 6.0 800 0.5 2.85 1.8 10.3 350 97 -65 to + 200 -65 to + 200
Vdc Vdc Vdc mAdc Watt o mW/ C Watt o mW/ C o C/W o C/W o o
C C
2N2222A Electrical Parameters (TA @ 25 C unless otherwise specified) °
CHARACTERISTICS Off Characteristics Collector-Emitter Breakdown Voltage (I C = 10 mAdc, I B = 0) Collector-Emitter Breakdown Voltage (IC = 10 µ Adc, IE = 0) Emitter-Base Breakdown Voltage (I E = 10 µ Adc, IC = 0) Collector to emitter Cutoff Current (VCE = 30 Vdc) Collector to base Cutoff Current (VCE = 60 Vdc) D.C. Current Gain (I C = 0.1 mAdc, V CE = 10 Vdc) (I C = 1.0 mAdc, V CE = 10 Vdc) (I C = 10 mAdc, V CE = 10 Vdc)(1) o (I C = 10 mAdc, V CE = 10 Vdc, T A = -55 C)(1) (I C = 150 mAdc, V CE = 10 Vdc)(1) (I C = 500 mAdc, V CE = 10 Vdc)(1) Collector-Emitter Saturation Voltage(1) (I C = 150 mAdc, I B = 15 mAdc) (I C = 500 mAdc, I B = 50 mAdc) Base-Emitter Saturation Voltage(1) (I C = 150 mAdc, I B = 15 mAdc) (I C = 500 mAdc, I B = 50 mAdc) Current Gain-Bandwidth Product(2) (I C = 20 mAdc, V CE = 20 Vdc, f = 100MHz) Output Capacitance(3) (VCB = 10 Vdc, I E = 0, 100kHz < f < 1MHz Input Capacitance (VEB = 0.5 Vdc, I C = 0, 100kHz < f < 1MHz) Switching Characteristics Delay Time: (V CC = 30 Vdc, V BE(off) = -0.5 Vdc, Rise Time: I C = 150 mAdc, I B1 = 15 mAdc)(Figure 12) Storage Time: (V CC = 30 Vdc, I C = 150 mAdc, Fall Time: I B1 = IB2 = 15 mAdc)
Datasheet# MSC0275A 5/19/1997
SYMBOL
MIN.
BVCE0
TYP.
MAX.
UNIT
50
--
Vdc
BVCBO
75
--
Vdc
BVEBO
6.0
--
Vdc
ICES
--
50
nAdc
I
--
10
nAdc
50 75 100 35 100 30
-325 --300 --
---
0.3 1.0
hFE
Vdc
VCE(Sat)
Vdc
VBE(Sat) 0.6 --
1.2 2.0
250
--
--
8.0
--
25
---
10 25
---
225 60
Mhz
f T
pf
COBO
pf
CIBO tON td tr toff tS tf
ns
INTEGRATED CIRCUITS
For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
HEF4093B gates Quadruple 2-input NAND Schmitt trigger Product specification File under Integrated Circuits, IC04
January 1995
Philips Semiconductors
Product specification
HEF4093B gates
Quadruple 2-input NAND Schmitt trigger DESCRIPTION The HEF4093B consists of four Schmitt-trigger circuits. Each circuit functions as a two-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different points for positive and negative-going signals. The difference between the positive voltage (VP) and the negative voltage (VN) is defined as hysteresis voltage (VH).
Fig.2 Pinning diagram.
HEF4093BP(N):
14-lead DIL; plastic (SOT27-1)
HEF4093BD(F):
14-lead DIL; ceramic (cerdip) (SOT73)
HEF4093BT(D):
14-lead SO; plastic (SOT108-1)
( ): Package Designator North America
Fig.3 Logic diagram (one gate).
FAMILY DATA, IDD LIMITS category GATES See Family Specifications
Fig.1 Functional diagram.
January 1995
2
Philips Semiconductors
Product specification
HEF4093B gates
Quadruple 2-input NAND Schmitt trigger DC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C VDD V
SYMBOL
MIN.
TYP.
MAX.
0,4
0,7
−
V
0,6
1,0
−
V
15
0,7
1,3
−
V
Switching levels
5
1,9
2,9
3,5
V
positive-going
10
3,6
5,2
7
V
input voltage
15
4,7
7,3
11
V
5
1,5
2,2
3,1
V
3
4,2
6,4
V
4
6,0
10,3
V
Hysteresis
5
voltage
10
negative-going input voltage
VH
VP
10
VN
15
Fig.5 Fig.4 Transfer characteristic.
January 1995
3
Waveforms showing definition of VP, VN and VH; where VN and VP are between limits of 30% and 70%.
Philips Semiconductors
Product specification
HEF4093B gates
Quadruple 2-input NAND Schmitt trigger AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V Propagation delays In → On HIGH to LOW LOW to HIGH Output transition times HIGH to LOW
LOW to HIGH
SYMBOL
TYP.
TYPICAL EXTRAPOLATION FORMULA
MAX.
90
185 ns
63 ns + (0,55 ns/pF) CL
40
80 ns
29 ns + (0,23 ns/pF) CL
15
30
60 ns
22 ns + (0,16 ns/pF) CL
5
85
170 ns
58 ns + (0,55 ns/pF) CL
40
80 ns
29 ns + (0,23 ns/pF) CL
15
30
60 ns
22 ns + (0,16 ns/pF) CL
5
60
120 ns
10 ns + (1,0 ns/pF) CL
30
60 ns
9 ns + (0,42 ns/pF) CL
15
20
40 ns
6 ns + (0,28 ns/pF) CL
5
60
120 ns
30
60 ns
9 ns + (0,42 ns/pF) CL
20
40 ns
6 ns + (0,28 ns/pF) CL
5 10
tPHL
10
tPLH
10
tTHL
10
tTLH
15
VDD V
TYPICAL FORMULA FOR P (µW)
5
1300 fi + ∑(foCL) × VDD2
dissipation per
10
6400 fi + ∑(foCL) ×
package (P)
15
18 700 fi + ∑(foCL) ×
VDD2 VDD2
Dynamic power
10 ns + (1,0 ns/pF) CL
where fi = input freq. (MHz) fo = output freq. (MHz) CL = load capacitance (pF)
∑ (foCL) = sum of outputs VDD = supply voltage (V)
January 1995
4
Philips Semiconductors
Product specification
HEF4093B gates
Quadruple 2-input NAND Schmitt trigger
Fig.6
Typical drain current as a function of input voltage; VDD = 5 V; Tamb = 25 °C.
Fig.8
Typical drain current as a function of input voltage; VDD = 15 V; Tamb = 25 °C.
January 1995
Fig.7
5
Typical drain current as a function of input voltage; VDD =10 V; Tamb = 25 °C.
Philips Semiconductors
Product specification
HEF4093B gates
Quadruple 2-input NAND Schmitt trigger
Fig.9 Typical switching levels as a function of supply voltage VDD; Tamb = 25 °C.
APPLICATION INFORMATION Some examples of applications for the HEF4093B are:
• Wave and pulse shapers • Astable multivibrators • Monostable multivibrators.
Fig.11 Schmitt trigger driven via a high impedance (R > 1 kΩ).
Fig.10 The HEF4093B used as a astable multivibrator.
If a Schmitt trigger is driven via a high impedance (R > 1 kΩ) then it is necessary to incorporate a capacitor C of such value that: C V DD – V SS ------- > --------------------------- , otherwise oscillation can occur on the edges of a pulse. Cp VH Cp is the external parasitic capacitance between inputs and output; the value depends on the circuit board layout.
Note The two inputs may be connected together, but this will result in a larger through-current at the moment of switching.
January 1995
6
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