1.Determine the output from the following circuit
a) 180o in phase with input signal b) 180o out of phase with input signal c) Same as that of input signal d) Output signal cannot be determined View Answer Answer: b !planation: "he input signal is gi#en to the in#erting input terminal. "herefore$ the output Vo is 180o out of phase with input signal V%. %. &hich of the following electrical characteristics is not e!hibited b' an ideal op(amp a) *nfinite #oltage gain b) *nfinite bandwidth c) *nfinite output resistance d) *nfinite slew rate View Answer Answer: c !planation: An ideal op(amp e!hibits +ero output resistance so that output can dri#e an infinite number of other de#ices. ,. An ideal op(amp re-uires infinite bandwidth because a) Signals can be amplified without attenuation b) Output common(mode noise #oltage is +ero c) Output #oltage occurs simultaneousl' with input #oltage changes d) Output can dri#e infinite number of de#ice View Answer Answer: a !planation: An ideal op(amp has infinite bandwidth. "herefore$ an' fre-uenc' signal from 0 to /+ can be amplified without attenuation. . *deal op(amp has infinite #oltage gain because a) "o control the output #oltage b) "o obtain finite output #oltage c) "o recei#e +ero noise output #oltage
d) one of the mentioned View Answer Answer: b !planation: As the #oltage gain is infinite$ the #oltage between the in#erting and non(in#erting terminal 2i.e. differential input #oltage) is essentiall' +ero for finite output #oltage. 3. Determine the output #oltage from the following circuit diagram
a)
b)
c) d) one of the mentioned View Answer Answer: c !planation: *n an ideal op(amp when the in#erting terminal is +ero. "he output will be in(phase with the input signal. 4. 5ind the output #oltage of an ideal op(amp. *f V1 and V% are the two input #oltages a) VO6 V1(V% b) VO6 A72V1(V%) c) VO6 A72V1V%) d) VO6 V17V% View Answer Answer: b !planation: "he output #oltage of an ideal op(amp is the product of gain and algebraic difference between the two input #oltages. 9. /ow will be the output #oltage obtained for an ideal op(amp a) Amplifies the difference between the two input #oltages b) Amplifies Amplifies indi#idual #oltages input #oltages c) Amplifies products of two input #oltage
d) one of the mentioned View Answer Answer: a !planation: Op(amp amplifies the difference between two input #oltages and the polarit' of the output #oltage depends on the polarit' of the difference #oltage. 8. . &hich is not the ideal characteristic of an op(amp a) *nput ;esistance <= 0 b) Output impedance <= 0 c) >andwidth <= d) Open loop #oltage gain <= View Answer Answer: a !planation: *nput resistance is infinite so almost an' signal source can dri#e it and there is no loading of the preceding stage. 11. 5ind the input #oltage of an ideal op(amp. *t?s one of the inputs and output #oltages are %# and 1%#. 2@ain6,) a) 8# b) # c) (# d) (%# View Answer Answer: d !planation: "he output #oltage$ VO 6 2Vin1( Vin%) 6= 1%#6,72%( Vin%) 6= Vin%6 (%#. 1%. &hich factor determine the output #oltage of an op(amp a) ositi#e saturation b) egati#e saturation c) >oth positi#e and negati#e saturation #oltage d) Suppl' #oltage View Answer Answer: c !planation: Output #oltage is proportional to input #oltage onl' until it reaches the saturation #oltage. "he output cannot e!ceed the positi#e and negati#e saturation #oltage. "hese saturation #oltages are specified b' an output #oltage swing rating of the op(amp for gi#en #alues of suppl' #oltage. Depending on the #alue of input and reference #oltage a comparator can be named as a) Voltage follower
b) Digital to analog con#erter c) Schmitt trigger d) Voltage le#el detector View Answer Answer: d !planation: A comparator is some time called as #oltage le#el detector because$ for a desired #alue of reference #oltage$ the #oltage le#el of the input can be detected. %. &h' clamp diodes are used in comparator a) "o reduce output offset #oltage b) "o increase gain of op(amp c) "o reduce input offset current d) "o protect op(amp from damage View Answer Answer: d !planation: "he diodes protect the op(amp from damage due to e!cessi#e input #oltage. >ecause of these diodes the difference input #oltage of the op(amp is clamped to 0.9# or (0.9 #$ hence these diodes are clamp diodes. ad#ertisements ,. 5ind the non(in#erting comparator
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Answer: a !planation: *n a non(in#erting comparator a fi!ed reference #oltage Vref of 1# is applied to positi#e in#erting input terminal and the other time #ar' in signal #oltage is applied to non( in#erting input terminal of the op(amp. . /ow the op(amp comparator should be choosen to get higher speed of operation a) Barge gain b) /igh slew rate c) &ider bandwidth d) one of the mentioned View Answer Answer: c !planation: "he bandwidth of the op(amp comparator must be wider so that the output of comparator can switch rapidl' between saturation le#els. Also$ the op(amp responds instantl' to an' change in condition at the input. 3. /ow to obtain high rate of accurac' in comparator a) All of the mentioned b) /igh #oltage gain c) /igh C;; d) *nput offset View Answer Answer: a !planation: /igh #oltage gain causes comparator output #oltage to switch between saturation le#els. /igh C;; reEects noise at input terminal and input offset 2#oltage F current) help to Geep changes in temperature #ariation #er' slight. 4. /ow to Geep the output #oltage swing of the op(amp comparator within specific limits a) !ternal resistors or diodes are used b) !ternal +eners or diodes are used c) !ternal capacitors or diodes are used d) !ternal inductors or diodes are used View Answer Answer: b !planation: "o Geep the output #oltage swing within specific limit$ op(amps are used with e!ternal wired components such as +eners or diodes. *n the resulting circuit$ the outputs are limited to predetermined #alues. ad#ertisements 9. Hero crossing detectors is also called as a) S-uare to sine wa#e generator b) Sine to s-uare wa#e generator c) Sine to triangular wa#e generator
d) All of the mentioned View Answer Answer: b !planation: *n +ero crossing detectors$ the output wa#eform is alwa's a s-uare wa#e for the applied sinusoidal input signal. 8. &hat is the drawbacG in +ero crossing detectors a) Bow fre-uenc' signal and noise at output terminal b) /igh fre-uenc' signal and noise at input terminal c) Bow fre-uenc' signal and noise at input terminal d) /igh fre-uenc' signal and noise at output terminal View Answer Answer: c !planation: Due to low fre-uenc' signal$ the output #oltage ma' not switch -uicGl' from one saturation #oltage to other. "he presence of noise can fluctuate the output between two saturation #oltages. . State a method to o#ercome the drawbacG of +ero crossing detectors a) *ncreasing input #oltage b) Ise of positi#e feedbacG c) Connect a compensating networG d) one of the mentioned View Answer Answer: b !planation: "he drawbacG of +ero crossing detectors can be in cured with the use of regenerati#e or positi#e feedbacG that causes the output to change faster and eliminate an' false output transition due to noise signals at the input. 10. ame the comparator that helps to find unGnown input. a) "ime marGer generator b) Hero crossing detectors c) hase meter d) &indow detector View Answer Answer: d !planation: Sometimes it is necessar' to find the instant at which an unGnown input is between two threshold le#els. "his can be achie#ed b' a circuit called window detector. 11. 5ind the instance at which the input can be fed to the op(amp in a three le#el comparator with BD indicator.
a) &hen @reen BD glow b) &hen Jellow BD glow c) &hen ;ed BD glow d) All of the mentioned View Answer Answer: a !planation: "he input can be fed to the op(amp when the green BD glows$ which is considered to be safe input that is when the input #oltage is between ,# and 4#. 1%. 5ind the output #oltage at the point V% from the gi#en circuit.
View Answer Answer: b !planation: "he output of the +ero crossing detector is differentiated b' an ;C circuit 2;C==1). So$ the #oltage at V% is a series of positi#e and negati#e pulses. 1,. ention the application areas of time marGer generator can be used a) onoshots b) SC; c) Sweep #oltage of C;" d) All of the mentioned View Answer Answer: d !planation: A diode connected at the output of time marGer generator circuit con#erts the sinusoidal signal into a train of positi#e pulses. So$ these pulses are used in triggering the monoshot$ SC;$ sweep #oltage of C;"$ etc. 1. &hich among the following is used to increase phase angle between different #oltages a) hase detector b) &indow detector c) Hero crossing detector d) one of the mentioned View Answer Answer: a !planation: hase angle between different #oltages can be measured using phase detector
circuit. "he corresponding #oltage to be measured is con#erted into spiGes and the time inter#al between the pulse spiGes is measured$ which is proportional to the phase difference. 13. 5or the comparator shown below$ determine the transfer cur#es if an ideal op(amp with VH16 VH%6#.
View Answer Answer: a !planation: "he open loop #oltage gain of an ideal op(amp AOl6$ e#en a small positi#e or negati#e #oltage at the input dri#es the output to KVsat. So$ the output #oltage VO 6 K2 V% Vsat) "herefore$ VO 6 K2VHVSat) 6K 20.9) 6 K.9 #.
5ind the input and output resistance for the circuit shown. Specification for 91 op(amp : A600000 L ; i 6 ,,ML ; o 6 40ML ; 5 6 11GML ; 1 6 %GML Suppl' #oltage 6 K 13#L a!imum output #oltage swing 6 K 1,#.
a) ; *5 6 44M$ ; O5 6 ,0M b) ; *5 6 ,0M$ ; O5 6 4GM c) ; *5 6 13GM$ ; O5 6 30M d) one of the mentioned View Answer Answer: a !planation: A5 6 12; 5N; 1) 6 1211GMN%GM) 6 4.3L >6 1N A5 6 1N4.3 6 0.13L *nput resistance of ; *5 6 ; 121A>) 6 ,,M124.3P0.13) Q6 44ML Output resistance of ; O5 6 ; oN21A>) 6 40N124.3P0.13) Q6 %.8 ≅,0M. %. "he output resistance of the op(amp with feedbacG is a) Same as that of the output resistance without feedbacG b) @reater than that of the output resistance without feedbacG c) Smaller than that of the output resistance without feedbacG d) one of the mentioned View Answer Answer: c !planation: *n #oltage series feedbacG amplifier$ the output resistance is 21N21A>)) times the output resistance of the op(amp. "herefore$ the output resistance of the op(amp with feedbacG is much smaller than the output resistance without feedbacG. ad#ertisements ,. 5ind the output current in the #oltage series feedbacG amplifier. a) io 6R Vo2APVid)QN; o b) io 6R Vo(2APVid)QN; o c) io 62VoN; o)PA
d) io 6AP2Vo(Vid)QN; o View Answer Answer: b !planation: "he output current in #oltage series feedbacG amplifier is gi#en as io 6RVo( 2APVid)QN; o. . 5ind the unit' gain bandwidth for #oltage series feedbacG amplifier a) I>@ 6 Af o b) I>@ 6 Af 5 c) I>@ 6 Af o f 5 d) I>@ 6 A5f o View Answer Answer: a !planation: "he unit' gain bandwidth is gi#en as product of open loop #oltage gain and breaG fre-uenc' of an op(amp. 3. "he bandwidth of a non(in#erting amplifier with feedbacG is e-ual to a) f o2A>) b) f o2A>(1) c) f o21A>) d) f o21(A>) View Answer Answer: c !planation: "he bandwidth of the non(in#erting amplifier with feedbacG is e-ual to its bandwidth without feedbacG times 21A>). i.e. f 56f o21A>). 4. /ow are the saturation #oltage specified on the manufacture?s datasheet a) egati#e #oltage b) Output #oltage swing c) Suppl' #oltage d) one of the mentioned View Answer Answer: b !planation: *n an open loop op(amp$ the total output offset #oltage 2i.e. output #oltage swing) is e-ual to either the positi#e or negati#e saturation #oltage. ad#ertisements 9. &hat is the formula for total output offset #oltage with feedbacG a) Voo" 6 K VoN21A>) b) Voo" 6 K VsatP21A>) c) Voo" 6 K VsatN21A>)
d) Voo" 6 K VoP21A>) View Answer Answer: c !planation: "he total output offset #oltage with feedbacG 6 2"otal output offset #oltage witput feedbacG) N 21A>). i.e. Voo" 6 K VsatN21A>). 8. &hich of the following has the same characteristic as that of non(in#erting amplifier with feedbacG a) erfect feedbacG amplifier b) Voltage follower c) erfect #oltage amplifier d) All of the mentioned View Answer Answer: c !planation: A perfect #oltage amplifier has #er' high input resistance$ #er' low output resistance$ stable #oltage gain$ large bandwidth and #er' little output offset #oltage. 5rom the anal'sis of the characteristic of non(in#erting amplifier with feedbacG$ it is clear that it e!hibits the characteristics of a perfect #oltage amplifier. . &hat is the gain of #oltage follower a) @ain = b) @ain <=1 c) @ain T1 d) @ain ((= View Answer Answer: b !planation: Voltage follower is non(in#erting amplifier configured for unit' gain. Such that the output #oltage is e-ual to and in phase with the input. 10. &hich is preferred to attain higher input resistance and the output amplitude e-ual to input a) Voltage follower b) Voltage series feedbacG amplifier c) Voltage shunt feedbacG amplifier d) *n#erter View Answer Answer: a !planation: *n the #oltage follower the output follow the input due to unit' gain. "herefore$ it is attained to get higher input resistance and output amplitude e-ual to input. 11. 5ind the input and output #oltage in #oltage follower circuit a) Vin6%# and Vout 6 ,# b) Vin610# and Vout 6 11#
c) Vin6# and Vout 6 # d) Vin6# and Vout 6 9# View Answer Answer: c !planation: Voltage follower has input #oltage e-ual to output #oltage. "he closed loop #oltage gain is e-ual to one. 5or e!ample$ taGe the input and output #oltage to be %#$ then A5 6 VoutNVin 6 %#N%# 6 1. 1%. Voltage follower is also called as a) one of the mentioned b) on(in#erting amplifier c) *n#erting amplifier d) ormal buffer View Answer Answer: b !planation: "he #oltage follower is also called as a non(in#erting buffer because$ when placed between two networGs$ it remo#es the loading on the first networG. 1,. 5ind the bandwidth and total output offset #oltage of a #oltage follower "he following are the specifications for the op(amp 91: A6%00000$ f o 63h+ and suppl' #oltage 6K13#.
a) f 5 6 1000h+$ Voo" 6 K 9.3U#. b) f 5 6 100Gh+$ Voo" 6 K 9.3U#. c) f 5 6 10Gh+$ Voo" 6 K9.3U#. d) f 5 6 1000Gh+$ Voo" 6 K 9.3U#. View Answer Answer: d !planation: >andwidth f 5 6AP f 5 6 %00000P36 1h+. "otal output offset #oltage$ Voo"6 KVsatNA6 K13N%00000 6K 9.3U#. &hich among the following circuit has the highest input resistance a) Voltage follower b) *n#erting amplifier
c) Differential amplifier d) one of the mentioned View Answer %. 5ind the bias current from the gi#en circuit
a) ,0mA b) ,mA c) 0.,0mA d) 0.0,mA View Answer Answer: c !planation: "he bias current is gi#en as *in 6VinN; in 6 ,#N10GM. &here$ *in6 * b 60.,mA. ad#ertisements ,. /ow to choose an op(amp when worGing with high input source resistance a) Op(amp with low bias current b) Op(amp with higher slew rate c) >uffer or #oltage follower d) All of the mentioned View Answer Answer: d !planation: &hen the op(amp is dri#en b' a high input source resistance$ the output and input #oltage will not be e-ual due to error at the input. A remed' to this problem is an op(amp with low input bias current and high slew rate should be chosen as a #oltage follower. . &hat must be done to blocG the ac input #oltage riding on a dc le#el a) Ise ;C networG
b) Ise coupling capacitor c) Ise resisti#e transducer d) one of the mentioned View Answer Answer: b !planation: *n order to blocG the dc le#el a coupling capacitor must be used in series with the input of the #oltage follower. 3. "o get higher input resistance in AC coupled #oltage follower$ a) "he output resistance is bootstrapped b) "he input resistance is bootstrapped c) "he bias resistance is bootstrapped d) "he feedbacG resistance is bootstrapped View Answer Answer: c !planation: >ias resistor connected to ground to pro#ide path in an AC coupled #oltage follower$ drasticall' reduces the input resistance of the circuit. "herefore$ to get high input resistance$ the bias resistance is bootstrapped. &hich of the following functions does the antilog computation re-uired to perform continuousl' with log(amps a) *n2!) b) log2!) c) Sinh2!) d) All of the mentioned View Answer Answer: d !planation: Bog(amp can easil' perform function such as *n2!)$ Bog2!)$ Sinh2!) to ha#e direct d> displa' on digital #oltmeter and spectrum anal'ser.
%. 5ind the circuit that is used to compress the d'namic range of a signal
View Answer Answer: a !planation: Bog amps are used to compress the d'namic range of a signal. "he fundamental log amp circuit consists of a grounded base transistor in the feedbacG path. ad#ertisements ,. 5ind the output #oltage of the log(amplifier a) VO 6 (2G")7ln2ViNVref ) b) VO 6 (2G"N-)7ln2ViNVref ) c) VO 6 (2G"N-)7ln2Vref NVi) d) VO 6 2G"N-)7ln2ViNVref ) View Answer Answer: b !planation: the output #oltage is proportional to the logarithm of input #oltage. VO 6(2G"N-)7ln2Vi N Vref ). . /ow to pro#ide saturation current and temperature compensation in log(amp a) Appl'ing reference #oltage alone to two different log(amps b) Appl'ing input and reference #oltage to same log(amps c) Appl'ing input and reference #oltage to separate log(amps d) one of the mentioned View Answer
Answer: c !planation: "he emitter saturation current #aries from transistor to transistor with temperature. "herefore$ the input and reference #oltage are applied to separate log(amps and two transistors are integrated close together in the same silicon wafer. "his pro#ides a close match of the saturation currents and ensures good thermal tracGing. 3. "he input #oltage$ 4# and reference #oltage$ # are applied to a log(amp with saturation current and temperature compensation. 5ind the output #oltage of the log(amp a) 4.,12G"N-)# b) 0.392G"N-)# c) 0.032G"N-)# d) 1.%12G"N-)# View Answer Answer: c !planation: "he output #oltage of saturation current and temperature compensation log(amp$ VO 6 2G"N-)7ln2Vi N Vref ) 62G"N-)7ln24#N#) 62G"N-)7ln21.3) VO 6 0.032G"N-)#. 4. 5ind the circuit used for compensating dependenc' of temperature in the output #oltage
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Answer: c !planation: "he temperature dependence on the output #oltage is compensated b' connecting an op(amp which pro#ide a non(in#erting gain of 1 2; %N ; "C)Q at the output of the log(amp with saturation current compensation. ow the output #oltage becomes$VO 6 1 2; %N ; "C)Q72G"N-)7ln2Vi N Vref )Q &here$ ; "C <= temperature sensiti#e resistance with a positi#e co(efficient of temperature. ad#ertisements 9. Determine the output #oltage for the gi#en circuit
a) VO 6 Vref N210(G?#i) b) VO 6 Vref 210(G?#i) c) VO 6 Vref 7210(G?#i) d) VO 6 Vref (210(G?#i) View Answer Answer: c !planation: "he output #oltage of an antilog amp is gi#en as$ VO 6 Vref 210(G?#i) &here G? 6 0.,, 2-NGt)72; "CN 2; % ; "C)Q.
8. Calculate the base #oltage of % transistor in the log(amp using two op(amps
a) 8.9# b) 3.,# c) ,.,# d) 4.%# View Answer Answer: c !planation: "he base #oltage of % transistor$ V> 6 ; "C N 2; % ; "C)Q72Vi) 6 10GMN 23GM10GM)Q73# 6,.,,#. . Compute the reference #oltage for a fundamental log(amp$ if it?s internal resistance63M. a) 0.3U# b) 0.03U# c) 3U# d) one of the mentioned View Answer Answer: a !planation: ;eference #oltage$ Vref 6 ; 1 7 *s &here$ *sW10(1,A 2for an emitter saturation current). ∴ Vref 6 10(1, 7 3M 6 3710(9 6 0.3U#. "his set of Binear *ntegrated Circuit ultiple Choice uestions F Answers 2Cs) focuses on XVer' /igh *nput *mpedance CircuitY. 1. &hich among the following circuit has the highest input resistance a) Voltage follower
b) *n#erting amplifier c) Differential amplifier d) one of the mentioned View Answer Answer: a !planation: Voltage follower has the highest positi#e input resistance of an' op(amp circuit. 5or this reason it is used to reduce #oltage error caused b' source loading. %. 5ind the bias current from the gi#en circuit
a) ,0mA b) ,mA c) 0.,0mA d) 0.0,mA View Answer Answer: c !planation: "he bias current is gi#en as *in 6VinN; in 6 ,#N10GM. &here$ *in6 * b 60.,mA. ad#ertisements ,. /ow to choose an op(amp when worGing with high input source resistance a) Op(amp with low bias current b) Op(amp with higher slew rate c) >uffer or #oltage follower d) All of the mentioned View Answer Answer: d !planation: &hen the op(amp is dri#en b' a high input source resistance$ the output and input
#oltage will not be e-ual due to error at the input. A remed' to this problem is an op(amp with low input bias current and high slew rate should be chosen as a #oltage follower. . &hat must be done to blocG the ac input #oltage riding on a dc le#el a) Ise ;C networG b) Ise coupling capacitor c) Ise resisti#e transducer d) one of the mentioned View Answer Answer: b !planation: *n order to blocG the dc le#el a coupling capacitor must be used in series with the input of the #oltage follower. 3. "o get higher input resistance in AC coupled #oltage follower$ a) "he output resistance is bootstrapped b) "he input resistance is bootstrapped c) "he bias resistance is bootstrapped d) "he feedbacG resistance is bootstrapped View Answer Answer: c !planation: >ias resistor connected to ground to pro#ide path in an AC coupled #oltage follower$ drasticall' reduces the input resistance of the circuit. "herefore$ to get high input resistance$ the bias resistance is bootstrapped.
4. 5ind out AC(coupled #oltage follower
View Answer Answer: b !planation: An AC AC coupled #oltage follower consists of coupling capacitor cap acitor at the input of non( n on( in#erting terminal. ad#ertisements 9. Voltage Voltage follower circuit circu it are used in a) Acti#e filter b) All of the mentioned mentioned c) Sample and hold circuit d) >ridge circuit with transducer View Answer Answer: b !planation: Voltage followers are useful for all the abo#e mentioned applications$ because the' in#ol#e worGing with high(input source resistance.
4. 5ind out AC(coupled #oltage follower
View Answer Answer: b !planation: An AC AC coupled #oltage follower consists of coupling capacitor cap acitor at the input of non( n on( in#erting terminal. ad#ertisements 9. Voltage Voltage follower circuit circu it are used in a) Acti#e filter b) All of the mentioned mentioned c) Sample and hold circuit d) >ridge circuit with transducer View Answer
Answer: b !planation: Voltage followers are useful for all the abo#e mentioned applications$ because the' in#ol#e worGing with high(input source resistance. &hich t'pe of amplifier has output #oltage e-ual to the a#erage of all input #oltages a) *n#erting a#eraging amplifier b) on(in#erting a#eraging amplifier c) on(in#erting summing amplifier d) *n#erting scaling amplifier View Answer Answer: b !planation: *n non(in#erting a#eraging amplifier$ the non(in#erting input #oltage is the a#erage of all inputs$ with a positi#e sign. %. !pression for output #oltage of non(in#erting summing amplifier with fi#e input #oltage a) Vo 6 372 Va V b Vc Vd Ve) b) Vo 6 12 ; f f N; N; 1)Q7 2 Va V b Vc Vd Ve) c) Vo 6 Va V b Vc Vd Ve d) Vo 6 2 Va V b Vc Vd Ve) N3 View Answer Answer: c !planation: "he output #oltage of non(in#erting summing amplifier is 21 2 ; f f N N ; 1 )) times the a#erage of all input #oltages in the circuit. Since there are fi#e input #oltages 6= 21 2 ; f f N N ; 1 )) 63 "herefore$ Vo 6 372 Va V b Vc Vd Ve) N3 6= Vo 6 2Va V b Vc Vd Ve). ad#ertisements
,. 5ind the #alue of V1 in the circuit shown below
a) one of the mentioned b) %# c) ,# d) # View Answer Answer: a !planation : Ising the superposition theorem the #oltage V1 at non(in#erting terminal is V1 6 VaN V bN VcN VdN 6 Va V b Vc VdQ N 6 2(,#)4#2(1#) Q N 6 1.3#. . *f the gain of a non(in#erting a#eraging amplifier is one$ determine the input #oltages if the output #oltage$ if the output #oltage is ,# a) V1 64# $V%6,# and V,6%# b) V1 6# $V%63# and V,6(# c) V1 68# $V%6(4# and V,61# d) V1 69# $V%6# and V,6(,# View Answer 3. *n the circuit shown$ suppl' #oltage 6 K13#$ Va6 ,# $ V b6 (# $ Vc6 3#$ ;6 ; 16 1GM and ; 56 %GM. 91 op(amp has A6 %7103 and ; 16 10GM. Determine the output #oltage internal resistance of the circuit
a) Vo ≅,# $ ; i564.49M b) Vo ≅,# $ ; i56 9M c) Vo ≅,# $ ; i56.%M d) Vo ≅,# $ ; i56 ,.3M View Answer Answer: a !planation: "he output #oltage Vo6 1 2; 5N; 1)Q 7 2VaV bVcN,)Q 6 12%GMN1GM)Q 72,( 3)N,Q6 %.49 ≅ ,#. *nternal resistance of circuit$ ; i5 6; i A7; 1N 2; 1 ; 5)Q 6 100M72%0000071GM)N21GM%GM)Q 6= ; i56 4.49 M. 4. 5ind the t'pe of amplifier that cannot be constructed in differential configuration a) Summing amplifier b) Scaling amplifier c) A#eraging amplifier d) Subtractor View Answer Answer: c !planation: *n differential op(amp configuration$ an amplifier produces sum or difference between two input terminals of op(amp. So$ a#eraging is not possible in this t'pe of configuration. ad#ertisements 9. Calculate the output #oltage$ when a #oltage of 1%m# is applied to the non(in#erting terminal and 9m# is applied to in#erting terminal of a subtractor. a) 1m# b) 3m# c) 1.9m# d) 8.m# View Answer
Answer: b !planation: Output #oltage of a subtractor Vo 6 Vnon(in#ertingterminal < Vin#erting terminal 6 1%m#(9m# 63m#. 8. *n differential op(amp configuration a subtractor is called as a) Summing amplifier b) All of the mentioned c) Scaling amplifier d) Difference amplifier View Answer Answer: c !planation: *n a subtractor input signals can be scaled to the desired #alues b' selecting appropriate #alues for the e!ternal resistors. "herefore$ this circuit is referred to as scaling amplifier. . 5ind the differential amplifier configured as a subtractor from the gi#en circuit.
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10. /ow man' additional sources are connected to each input terminal to obtain an eight input summing amplifier a) Si! b) "hree c) 5our d) ight View Answer Answer: b !planation: An eight input summing amplifier can be constructed using basic differential amplifier$ if si! additional input sources are used b' connecting three input sources to in#erting and non(in#erting input terminal through resistors. 11. Calculate the output #oltage for the summing amplifier gi#en below$ where ;6%GM and ; B 610GM.
a) # b) 18# c) 8# d) one of the mentioned View Answer Answer: a !planation: "he output #oltage for summing amplifier is gi#en Vo 6(Va (V b Vc Vd 6,(43 6#. 1%. "he output #oltage of a summing amplifier is e-ual to 2assume sum of input #oltage as Vn ) a) Vn 2non(in#erting terminal) Vn 2in#erting terminal) b) Vn 2non(in#erting terminal) 2(Vn 2in#erting terminal) c) (Vn 2non(in#erting terminal) 2(Vn 2in#erting terminal)
d) (Vn 2non(in#erting terminal) Vn 2in#erting terminal) View Answer Answer: b !planation: "he output #oltage of summing amplifier is e-ual to sum of the input #oltage applied to the non(in#erting terminal plus the negati#e sum of the input #oltage applied to the in#erting terminal. 1. *n which amplifier the output #oltage is e-ual to the negati#e sum of all the inputs a) A#eraging amplifier b) Summing amplifier c) Scaling amplifier d) All of the mentioned View Answer Answer: b !planation: *n summing amplifier the output #oltage is e-ual to the sum of all input. Since the total input is a sum of negati#e input$ the amplifier is an in#erting summing amplifier. %. Determine the e!pression of output #oltage for in#erting summing amplifier consisting of four internal resistors 2Assume the #alue of internal resistors to be e-ual) a) Vo6 (2; fN ; )72Va V bVcVd) b) Vo6 2; 5N;)72Va V bVcVd) c) Vo6 2;N ; 5)72Va V bVcVd) d) one of the mentioned View Answer Answer: a !planation: *f the internal resistors of the circuit is same i.e ; a6; b6; c6; d6; 2since there are four internal resistor) "hen$ the output #oltage for in#erting amplifier is gi#en as Vo6 (2; fN ;)72Va V bVcVd). ad#ertisements ,. An in#erting amplifier with gain 1 ha#e different input #oltage: 1.%#$,.%# and .%#. 5ind the output #oltage a) .%# b) 8.4# c) (.%# d) (8.4# View Answer Answer: d !planation: &hen the gain of the in#erting summing amplifier gain is 1 then$ the internal resistors and feedbacG resistors ha#e the same #alue. So$ the output is e-ual to the negati#e sum of all input #oltages. VO6 (2VaV bVc) 6(21.%,.%.%)6 (8.4#.
. *n which t'pe of amplifier$ the input #oltage is amplified b' a scaling factor a) Summing amplifier b) A#eraging amplifier c) &eighted amplifier d) Differential amplifier View Answer Answer: c !planation: "he weighted amplifier is also called as scaling amplifier. /ere each input #oltage is amplified b' a different factor i.e. ; a$; b and ; c are different in #alues 2 which are the input resistors at each input #oltage). 3. An in#erting scaling amplifier has three input #oltages Va$ V b and Vc. 5ind it output #oltage a) VO6 < R2; 5N; a)7VaQ 2; 5N; b)7V bQ2; 5N; c)7VcQ b) VO6 < 2; 5N; a)2; 5N; b)2; 5N; c)Q72 Va V bVc)Q c) VO 6 < R2; aN; 5)7VaQ 2; bN; 5)7V bQ2; cN; 5)7VcQ d) one of the mentioned View Answer Answer: a !planation: Since three input #oltages are gi#en assume the input resistors to be ; a$; b and ; c. *n a scaling amplifier$ the input #oltages are amplified b' a different factor 6= ∴ ; 5N; a Z ; 5N; b Z ; 5N; c "herefore$ output #oltage Vo 6 (R2; 5N; a) VaQ 2; 5N; b) V bQ2; 5N; c) VcQ. 4. An amplifier in which the output #oltage is e-ual to a#erage of input #oltage a) Summing amplifier b) &eighting amplifier c) Scaling amplifier d) A#eraging amplifier View Answer Answer: d !planation: An a#eraging amplifier can be used as an a#eraging circuit$ in which the output #oltage is e-ual to the a#erage of all the input #oltages. ad#ertisements 9. 5ind out the gain #alue b' which each input of the a#eraging amplifier is amplified 2 Assume there are four inputs) a) 0.3 b) 0.%3 c) 1 d) % View Answer
Answer: b !planation: *n an a#eraging amplifier$ the gain b' which each input is amplified must be e-ual to lower number of input. 6= ; 5 N; 61Nn $ where n6number of inputs ∴ ; 5 N;61N 6 0.%3 25our inputs) So$ each input in the a#eraging amplifier must be amplified b' 0.%3. 8. ,#$ 3# and 9# are the three input #oltage applied to the in#erting input terminal of a#eraging amplifier. Determine the output #oltage a) (3# b) (10# c) (13# d) (%0# View Answer Answer: a !planation: "he output #oltage$ Vo 6 (2VaV bVc)N,Q 6 (2,39)N,Q 6(3#. . &hen does the offset #oltage compensating networG must be used in in#erting configuration a) &hen the input is AC #oltage b) &hen the input is DC #oltage c) &hen the input is either AC or DC #oltage d) one of the mentioned View Answer Answer: b !planation: "o reduce the output offset #oltage to +ero$ the offset minimi+ing resistor is used to minimi+e the effect of input bias currents on the output offset #oltage. /owe#er$ when the inputs are DC #oltages$ the offset compensating networG must be used. 10. State the application in which summing$ scaling or a#eraging amplifiers are used a) ultiple!ers b) Counters c) Audio mi!ers d) All of the mentioned View Answer Answer: c !planation: Summing$ scaling or a#eraging amplifiers are commonl' used in audio mi!ers$ in which a number of inputs are added up to produce a desired output. 11. "he following circuit represents an in#erting scaling amplifier. Compute the #alue of ; o and VO
a) VO 6 (0.83# L ; o 6 111.11M b) VO 6 (%.349# L ; o 6 9.8M c) VO 6 (1.34# L ; o 6 %1%.,,M d) VO 6 (1.0,4# L ; o 6 ,%0.34M View Answer Answer: d !planation: VO 6 < R2; 5N; a)7VaQ2; 5N; b)7V bQ2; 5N; c)7VcQ 6 < R210GMN1GM)7,.,m#Q210GMN1.%3GM)73m#Q210GMN8%0M)79.m#Q 6 (1.0,4#. ; o 6 ; a[[; bc[[; 5Q 6 2; a7; b)N2; a ; b)Q [[ 2; c7; 5)N2 ; c ; 5)Q 621GM71.%3GM)N21GM1.%3GM)Q [[ 28%0M710GM)N 28%0M10GM)Q 6 333.33[[939.83 62333.33 7939.83)N2333.33939.83)Q 6,%0.34M. 1. A Differential Amplifier should ha#e collector resistor?s #alue 2;C1 F ;C%) as a) 3GM$ 3GM b) 3M$ 10GM c) 3M$ 3GM d) 3GM$ 10GM View Answer Answer: a !planation: "he #alues of collector current will be e-ual in differential amplifier 2;C16;C%). %. A Differential Amplifier amplifies a) *nput signal with higher #oltage b) *nput #oltage with smaller #oltage c) Sum of the input #oltage d) one of the entioned View Answer Answer: d !planation: "he purpose of differential amplifier is to amplif' the difference between two signals.
ad#ertisements ,. "he #alue of emitter resistance in mitter >iased circuit are ;16%3GM F ;%614GM. 5ind ; a) .934GM b) 1GM c) .9%,GM d) 10GM View Answer Answer: a !planation: *n emitter biased circuit$ ;1 F ;% is connected in parallel combination. ⇒ ; 6 ;1 ** ;% 6 2;17 ;%)N2;1;%) 6 2%3GM714GM)N2%3GM14GM) 6 .9341GM. . *f output is measured between two collectors of transistors$ then the Differential amplifier with two input signal is said to be configured as a) Dual *nput >alanced Output b) Dual *nput Inbalanced Output c) Single *nput >alanced Output d) Dual *nput Inbalanced Output View Answer Answer: a !planation: &hen two input signals are applied to base of transistor$ it is said to be Dual *nput. &hen both collectors are at same DC potential with respect to ground$ then it is said to be >alance Output. 3. A differential amplifier is capable of amplif'ing a) DC input signal onl' b) AC input signal onl' c) AC F DC input signal d) one of the entioned View Answer Answer: c !planation: Direct connection between stages remo#es the lower cut off fre-uenc' imposed b' coupling capacitorL therefore it can amplif' both AC and DC signal. 4. *n ideal Differential Amplifier$ if same signal is gi#en to both inputs$ then output will be a) Same as input b) Double the input c) ot e-ual to +ero d) Hero View Answer
Answer: d !planation: *n ideal amplifier$ Output #oltage ⇒ Vout 6 Vin1(Vin%. ad#ertisements 9. 5ind the Single *nput Inbalance Output configuration in following circuit diagrams :
a)
b)
c)
d) View Answer
Answer: c !planation: Circuit c has onl' single input 2V1) and output is measure onl' at one of the collector with respect to ground. 8. An emitter bias Dual *nput >alanced Output differential amplifier has VCC6%0#$ \6100$ V>60.9#$ ;61.,GM. 5ind * a) 9.%mA b) .8mA c) 10mA d) 8.4mA View Answer . 5ind *C$ gi#en VC60.99#$ VCC610#$ V>60.,9# and ;C6%.GM in Dual *nput >alanced Output differential amplifier a) 0.mA b) 0.A c) mA d) A View Answer Answer: c !planation: Substitute the #alues in collector to emitter #oltage e-uation$ VC6 VCC V>(;C *C ⇒*C 6 2VCC(VCV>)N;C 6 210#(0.99#0.,9#)N%.GM 6 mA 10. 5ind the correct match Configuration
1. Single *nput Inbalanced Output %. Dual *nput >alanced Output ,. Single *nput >alanced Output . Dual *nput Inbalanced Output
Voltage gain and Input resistance
i. Ad 6 ;cNre $ ; i1 ; i% 6 %\ac; ii. Ad6 ;cN%re $ ;i1 ;i% 6 %\ac; iii. Ad6 ;cNre $ ; i 6 %\ac; i#. Ad 6 ;cN%re $ ; i 6 %\ac;
a) 1(i $ %(iii$ ,(i#$ (ii b) 1(i#$ %(ii$ ,(iii$ (i c) 1(ii$ %(i#$ ,(i $ (iii d) 1(iii$ %(i$ ,(ii$ (i# View Answer Answer: d !planation: roperties of differential amplifier circuit configuration. 11. Obtain the collector #oltage$ for collector resistor 2;C) 63.4GM$ *61.44mA and VCC610# for single input unbalanced output differential amplifier a) 0.89# b) 0.48%#
c) 0.333# d) one of the mentioned View Answer 1%. 5or the circuit shown below$ determine the Output #oltage 2Assume \63$ differential input resistance61% GM)
a) .,,# b) %.,,# c) ,.,,# d) 1.,,# View Answer Answer: c !planation: 5rom the circuit dig$ ;C610GM$ Vin16 1.,# and Vin%60.3#$ Differential input resistance 6 % \re$ ⇒ 1%GM 6 %737;e ⇒ ;e 6 1.% GM Output #oltage Vo 6 ;CN%;e2Vin1(Vin%) ⇒ Vo 6 10GMN2% 71.%GM) 7 21.,#(0.3#) ⇒ Vo 6 ,.,,#. 1,. *n a Single *nput >alanced Output Differential amplifier$ gi#en VCC613#$ ; 6 ,.GM$ VC6%. # and re6%30M. Determine Voltage gain a) %4 b) 34 c) ,8 d) 41 View Answer Answer: a !planation: *n single *nput >alance Output amplifier$ ⇒ * 6 2V(V>)N%; 6213#(0.9#)N2%7,.Gom)6 1.8,mA 2∵VCC6V) 5rom the e-uation$ VC 6 VCC V>(;C7*C
⇒ ;C 6 21.,# <
%.#)N1.8,mA 6 4.3GM "he #oltage gain$ Vo ⇒ Vo 6 ;CNre 6 4.3GMN%30M 6 %42no units). 1. Open loop op(amp configuration has a) Direct networG between output and input terminals b) o connection between output and feedbacG networG c) o connection between input and feedbacG networG d) All of the mentioned View Answer Answer: a !planation: *n an open loop configuration$ the output signal is not fed bacG in an' form as part of the input signal and the loop that would ha#e been formed with feedbacG is open. %. *n which configuration does the op(amp function as a high gain amplifier a) Differential amplifier b) *n#erting amplifier c) on(in#erting amplifier d) All of the mentioned View Answer Answer: d !planation: An op(amp functions as a high gain amplifier when connected in open loop configuration. "hese three are the open loop configuration of an op(amp. ad#ertisements ,. /ow does the open loop op(amp configuration classified a) >ased on the output obtained b) >ased on the input applied c) >ased on the amplification d) >ased on the feedbacG networG View Answer Answer: b !planation: Open loop configurations are classified according to the number of inputs used and the terminal to which the input is applied when a single input is used. . &hat will be the #oltage drop across the source resistance of differential amplifier when connected in open loop configuration a) Hero b) *nfinit' c) One
d) @reater than one View Answer Answer: a !planation: "he source resistances are normall' negligible compared to the input resistance. "herefore$ the #oltage drop across input resistors can be assumed to be +ero. 3. "he output #oltage of an open(loop differential amplifier is e-ual to a) Double the difference between the two input #oltages b) roduct of #oltage gain and indi#idual input #oltages c) roduct of #oltage gain and the difference between the two input #oltages d) Double the #oltage gain and the difference between two input #oltages View Answer Answer: c !planation: "he output #oltage is e-ual to the #oltage gain times the difference between the two input #oltages. 4. Calculate the output #oltage for the gi#en circuit.
a) Vo 6 9# b) Vo 6 3.# c) Vo 6 1%# d) Vo 6 11.# View Answer Answer: c !planation: "he output #oltage$ Vo 6 AP2Vin1(Vin%).2Since$ ; in1 and ; in% are negligible compared to input resistance in open loop differential amplifier). 6= Vo 6 P21%#(#) 6 1%#. ad#ertisements
9. Select the specifications that implies the in#erting amplifier a) V1 6 (,#$ V% 6 (# b) V1 6 (%#$ V% 6 ,# c) V1 6 3#$ V % 6 13# d) V1 6 0#$ V% 6 3# View Answer Answer: d !planation: *n in#erting amplifier$ the input is applied to the in#erting terminal and the non( in#erting terminal is grounded. So$the input applied to in#erting amplifier can be V1 6 0#$ V% 6 3#. 8. 5ind the output of in#erting amplifier a) Vo 6 AVin b) Vo 6 (AVin c) Vo 6 (A2Vin1 < Vin%) d) one of the mentioned View Answer Answer: b !planation: *n an in#erting amplifier the input signal is amplified b' gain A and is also in#erted at the output. "he negati#e sign indicates that the output #oltage is of opposite polarit'. . Determine the output #oltage for the non(in#erting amplifier input #oltage ,9UVpp sinewa#e. Assume that the output is a 91. a) (9. Vpp sinewa#e b) 9 Vpp sinewa#e c) 9.Vpp sinewa#e d) 0.9 Vpp sinewa#e View Answer Answer: c !planation: "he output #oltage for non(in#erting amplifier Vo 6 APVin 6 %00000 P ,9U 6 9. Vpp sinewa#e.
10. 5ind the non(in#erting amplifier configuration from the gi#en circuit diagram
View Answer Answer: c !planation: *n a non(in#erting amplifier$ the input is applied to the non(in#erting input terminal and the in#erting terminal is connected to ground. 11. &hat happen if an' positi#e input signal is applied to open(loop configuration a) Output reaches saturation le#el b) Output #oltage swing?s peaG to peaG c) Output will be a sine wa#eform d) Output will be a non(sinusoidal wa#eform View Answer Answer: a !planation: *n open(loop configuration$ due to #er' high gain of the op(amp$ an' input signal slightl' greater than +ero dri#es the output to saturation le#el. 1%. &h' open(loop op(amp configurations are not used in linear applications a) Output reaches positi#e saturation b) Output reaches negati#e saturation c) Output switches between positi#e and negati#e saturation
d) Output reaches both positi#e and negati#e saturation. View Answer Answer: c !planation: &hen operated in open loop$ the output switches between positi#e and negati#e saturation le#els. 5or this reason$ open loop op(amp configurations are not used in linear applications. &hich of the following functions does the antilog computation re-uired to perform continuousl' with log(amps a) *n2!) b) log2!) c) Sinh2!) d) All of the mentioned View Answer Answer: d !planation: Bog(amp can easil' perform function such as *n2!)$ Bog2!)$ Sinh2!) to ha#e direct d> displa' on digital #oltmeter and spectrum anal'ser. %. 5ind the circuit that is used to compress the d'namic range of a signal
View Answer Answer: a !planation: Bog amps are used to compress the d'namic range of a signal. "he fundamental log amp circuit consists of a grounded base transistor in the feedbacG path.
ad#ertisements ,. 5ind the output #oltage of the log(amplifier a) VO 6 (2G")7ln2ViNVref ) b) VO 6 (2G"N-)7ln2ViNVref ) c) VO 6 (2G"N-)7ln2Vref NVi) d) VO 6 2G"N-)7ln2ViNVref ) View Answer Answer: b !planation: the output #oltage is proportional to the logarithm of input #oltage. VO 6(2G"N-)7ln2Vi N Vref ). . /ow to pro#ide saturation current and temperature compensation in log(amp a) Appl'ing reference #oltage alone to two different log(amps b) Appl'ing input and reference #oltage to same log(amps c) Appl'ing input and reference #oltage to separate log(amps d) one of the mentioned View Answer Answer: c !planation: "he emitter saturation current #aries from transistor to transistor with temperature. "herefore$ the input and reference #oltage are applied to separate log(amps and two transistors are integrated close together in the same silicon wafer. "his pro#ides a close match of the saturation currents and ensures good thermal tracGing. 3. "he input #oltage$ 4# and reference #oltage$ # are applied to a log(amp with saturation current and temperature compensation. 5ind the output #oltage of the log(amp a) 4.,12G"N-)# b) 0.392G"N-)# c) 0.032G"N-)# d) 1.%12G"N-)# View Answer Answer: c !planation: "he output #oltage of saturation current and temperature compensation log(amp$ VO 6 2G"N-)7ln2Vi N Vref ) 62G"N-)7ln24#N#) 62G"N-)7ln21.3) VO 6 0.032G"N-)#. "he center fre-uenc' of a band(pass filter is alwa's e-ual to the A bandwidth . >. <, d> fre-uenc' C. bandwidth di#ided b' Q
D geometric a#erage of the critical fre-uencies . Answer F !planation Answer: Option D Explanation:
o answer description a#ailable for this -uestion. Let us discuss . View Answer &orGspace ;eport Discuss in 5orum %. "he formula shows that for a gi#en capacitor$ if the #oltage changes at a constant rate with respect to time$ the current will A increase . >.decrease C. be constant D decrease logarithmicall' . Answer F !planation Answer: Option C Explanation:
o answer description a#ailable for this -uestion. Let us discuss . View Answer &orGspace ;eport Discuss in 5orum ,. A +ero(le#el detector is a A comparator with a sine(wa#e output . >.comparator with a trip point referenced to +ero C. peaG detector D limiter . Answer F !planation
Answer: Option B Explanation:
o answer description a#ailable for this -uestion. Let us discuss . View Answer &orGspace ;eport Discuss in 5orum . A digital(to(analog con#erter is an application of the A scaling adder . >.#oltage(to(current con#erter C.nonin#erting amplifier D adEustable bandwidth circuit . Answer F !planation Answer: Option A Explanation:
o answer description a#ailable for this -uestion. Let us discuss . View Answer &orGspace ;eport Discuss in 5orum 3. *f the #alue of resistor R f in an a#eraging amplifier circuit is e-ual to the #alue of one input resistor di#ided b' the number of inputs$ the output will be e-ual to A the a#erage of the indi#idual inputs . >.the in#erted sum of the indi#idual inputs C.the sum of the indi#idual inputs D the in#erted a#erage of the indi#idual inputs . Answer F !planation Answer: Option D
*f the input to a comparator is a sine wa#e$ the output is a A ramp #oltage
. >.sine wa#e C.rectangular wa#e D sawtooth wa#e . Answer F !planation Answer: Option C Explanation:
o answer description a#ailable for this -uestion. Let us discuss . View Answer &orGspace ;eport Discuss in 5orum 9. A basic series regulator has A an error detector . >.a load C.a reference #oltage D both an error detector and a reference #oltage . Answer F !planation Answer: Option D Explanation:
o answer description a#ailable for this -uestion. Let us discuss . View Answer &orGspace ;eport Discuss in 5orum 8. A comparator is an e!ample of a2n) A acti#e filter . >.current source C.linear circuit D nonlinear circuit . Answer F !planation
Answer: Option D Explanation:
o answer description a#ailable for this -uestion. Let us discuss . View Answer &orGspace ;eport Discuss in 5orum . *nitiall'$ the closed(loop gain 2 Acl ) of a &ien(bridge oscillator should be A T , . Acl >. Acl = , C.0 D 1 . Acl Answer F !planation Answer: Option B Explanation:
o answer description a#ailable for this -uestion. Let us discuss . View Answer &orGspace ;eport Discuss in 5orum 10. *n an a#eraging amplifier$ the input resistances are A e-ual to the feedbacG resistance . >.less than the feedbacG resistance C.greater than the feedbacG resistance D une-ual . Answer F !planation Answer: Option C
A triangular(wa#e oscillator can consist of an op(amp comparator$ followed b' a2n) A differentiator .
>.amplifier
C.integrator Answer F !planation
D multi#ibrator .
Answer: Option C Explanation:
o answer description a#ailable for this -uestion. Let us discuss . View Answer &orGspace ;eport Discuss in 5orum 1%. "he ramp #oltage at the output of an op(amp integrator A increases or decreases at a linear rate . >.increases or decreases e!ponentiall' C.is alwa's increasing and ne#er decreasing D is constant . Answer F !planation Answer: Option A Explanation:
o answer description a#ailable for this -uestion. Let us discuss . View Answer &orGspace ;eport Discuss in 5orum 1,. A two(pole high(pass acti#e filter would ha#e a roll(off rate of A 0 d>Ndecade . >. <0 d>Ndecade C.%0 d>Ndecade D <%0 d>Ndecade . Answer F !planation Answer: Option B
&hich is not the internal circuit of operational amplifier a) Differential amplifier b) Be#el translator c) Output dri#er d) Clamper View Answer Answer: d !planation: Clamper is an e!ternal circuit connected at the output of Operational amplifier$ which clamp the output to desire DC le#el. %. "he purpose of le#el shifter in Op(amp internal circuit is to a) AdEust DC #oltage b) *ncrease impedance c) ro#ide high gain d) Decrease input resistance View Answer Answer: a !planation: "he gain stages in Op(amp are direct coupled. So$ le#el shifter is used for adEustment of DC le#el. ad#ertisements ,. /ow a s'mmetrical swing is obtained at the output of Op(amp a) ro#iding amplifier with negati#e suppl' #oltage b) ro#iding amplifier with positi#e #oltage c) ro#iding amplifier with positi#eF negati#e #oltage d) one of the mentioned View Answer Answer: c !planation: 5or e!ample$ consider a single #oltage suppl' 13#. During positi#e half c'cle the output will be 3# and (10# during negati#e half c'cle. "herefore$ the ma!imum peaG to peaG output swing$ (3# 2(10#) 6 (13# 2As'mmetrical swing). So$ to get s'mmetrical swing both positi#e and negati#e suppl' #oltage with bias point fi!ed suitabl' is re-uired. . &hat is the purpose of differential amplifier stage in internal circuit of Op(amp a) Bow gain to differential mode signal b) Cancel difference mode signal c) Bow gain to common mode signal d) Cancel common mode signal View Answer
Answer: d !planation: An' undesired noise$ common to both of the input terminal is suppressed b' differential amplifier. 3. &hich of the following is not preferred for input stage of Op(amp a) Dual *nput >alanced Output b) Differential *nput Single ended Output c) Cascaded DC amplifier d) Single *nput Differential Output View Answer Answer: c !planation: Cascaded DC amplifier suffers from maEor problem of drift of the operating point$ due to temperature dependenc' of the transistor. 4. &hat will be the emitter current in a differential amplifier$ where both the transistor are biased and matched 2Assume current to be *) a) * 6 *N% b) * 6 * c) * 6 2*)%N% d) * 6 2*)% View Answer Answer: a !planation: Due to s'mmetr' of differential amplifier circuit$ current * di#ides e-uall' through both transistors. ad#ertisements 9. 5rom the circuit$ determine the output #oltage 2Assume ]561)
a) VO16,.# $ VO%61%# b) VO161%# $ VO%6,.# c) VO161%# $ VO%60#
d) VO16,.# $ VO%6(,.# View Answer Answer: b !planation: "he #oltage at the common emitter ^? will be (0.9#$ which maGe 1 off and the entire current will flow through %. ⇒ VO1 6 VCC VO%6 VCC(]57*7;C$ ⇒ VO1 6 1%# $ VO%61%#(17,mA7%.9G 6 ,.#. 8. At what condition differential amplifier function as a switch a) V" T Vd T (V" b) (%V" _ Vd _ %V" c) 0 _ Vd T (V" d) 0 _ Vd _ %V" View Answer Answer: a !planation: 5or Vd = V"$ the output #oltage are VO1 6 VCC$ VO%6 VCC(]5 *;C. "herefore$ a transistor 1 will be O and % will be O55. Similarl' for V d= (V"$ both transistors % F 1 will be O. . 5or Vd = KV"$ the function of differential amplifier will be a) Switch b) Bimiter c) Automatic gain control d) Binear Amplifier View Answer Answer: b !planation: At this condition$ input #oltage of the amplifier is greater than K100m# and thus acts as a limiter. 10. Change in #alue of common mode input signal in differential pair amplifier maGe a) Change in #oltage across collector b) Slight change in collector #oltage c) Collector #oltage decreases to +ero d) one of the mentioned View Answer Answer: a !planation: *n differential amplifier due to s'mmetr'$ both transistors are biased and matched. "herefore$ Voltage at each collector will be same. 11. 5ind collector current *C%$ gi#en input #oltages are V16%.098# F V%6%.04# and total current *6%.mA. 2Assume ]61)
a) 0.8mA b) 1.4mA c) 0.08mA d) 0.14mA View Answer Answer: a !planation: Collector current$ *C%6]57*N21eVd `V")$ V" 6 Volts e-ui#alent of temperature 6 %3m#$ ⇒ Vd 6 V1(V% 6%.098#(%.04#60.018# 2e-u1) Substituting e-uation 1$ ⇒ VdNV" 6 0.018#N%3m# 6 0.9%# 2e-u%) Substituting e-uation %$ ⇒ *C%6 17%.mAN21e0.9%) 6 %.mAN21%.03) 6 0.8mA. 1%. A differential amplifier has a transistor with \06 100$ is biased at *C 6 0.8mA. Determine the #alue of C;; and AC$ if ; 69.8GM and ;C 6 3GM. a) .3 db b) .43 d c) .99 db d) .40 db View Answer Answer: b !planation: Differential mode gain$ AD6 (gm;C and Common mode gain$ ⇒ AC6 (2gm;C)N21%gm;) 2for \0≫1). Substituting the #alues$ ⇒ gm6 *CNV" 6 0.8mAN%3m#61.%710(,M(1 ⇒ AD6 (gm7;C6 (1.%710(,M(173GM6 (4 ⇒ AC6 (2gm;C)N21%gm;)6 (21.%710(,M(173GM) N21%7(⇒ 1.%710(,M(179.8GM) 6 (0.,138 C;; 6 (4N(0.,1386 ,0,.94
6%0log,0,.94 6.43db Choose the compensating networG design for non(in#erting amplitude
View Answer Answer: a !planation: *f an op(amp is used as an non(in#erting amplifier$ the compensating networG should be connected to the in#erting input terminal of the op(amp.
%. 5ind the the#enin?s e-ui#alent for resistance and #oltage
a) 1(iii$ %(ii$ ,(1 b) 1(ii$ %(*$ ,(iii c) 1(*$ %(ii$ ,(iii d) 1(ii$ %(iii$ ,(i View Answer Answer: b !planation: "he ma!imum the#enin e-ui#alent resistance ; ma! occurs when the wiper is at the center of the potentiometer and the ma!imum the#enin e-ui#alent #oltage Vma! is e-ual to Vcc or
,. &hat is done to compensate the #oltage$ when V1 = V%
a) o#e the wiper towards Vcc b) o#e the wiper towards ' increasing gain b) >' reducing gain c) >' decreasing bandwidth d) >' reducing bandwidth View Answer Answer: b !planation: "he output offset #oltage is a product of gain and specified input offset #oltage for a gi#en op(amp. Voo6 AooPVio. So$ the #alue of output offset #oltage can be reduced b' reducing the gain #alue. *nput bias current is defined as a) A#erage of two input bias current b) Summing of two input bias current c) Difference of two input bias current d) roduct of two input bias current View Answer Answer: a !planation: *nput bias current is the a#erage of two input bias current flowing into the non( in#erting and in#erting input of an op(amp. %. Although the #alue of input bias current is #er' small$ it causes a) Output #oltage b) *nput offset #oltage c) Output offset #oltage d) All of the mentioned View Answer
Answer: c !planation: #en a #er' small #alue of input bias current can cause a significant output offset #oltage in circuits using relati#el' large feedbacG resistors. ad#ertisements ,. "he formula for output offset #oltage of an op(amp due to input bias current a) VO*>6 ; 5P*> b) VO*>6 2; 5; 1)N*> c) VO*>6 21; 5)P*> d) VO*>6 12; 5N; 1)QP*> View Answer Answer: a !planation: "he output offset #oltage due to input bias current is VO*> 6 ; 5P*>. . 5ind the input bias current for the circuit gi#en below
a) 10mA b) %mA c) 3mA d) one of the mentioned View Answer Answer: c !planation: *nput bias current$ *>62*>1 *>%)N% 6= *> 62mA4mA)N% 6 3mA. 3. ention a step to reduce the output offset #oltage caused due to input bias current a) Ise small feedbacG resistor and resistance at the input terminal b) Ise small feedbacG resistors c) ;educe the #alue of load resistors d) one of the mentioned View Answer 4. @i#en below is a differential amplifier in which V 16V%. &hat happens to VO*> at this condition
a) VO*>6 0 b) VO*>6 VO*>710(10 c) VO*>6 VO*>N% d) VO*>6 (1 View Answer Answer: a !planation: "he #oltage V1 and V% are caused b' the current *>1 and *>%. Although this bias current are #er' small$ if the' are made e-ual$ then there will be no output #oltage VO*>. ad#ertisements 9. ame the resistor that is connected in the non(in#erting terminal of op(amp which is in parallel combination of resistor connected in in#erting terminal and feedbacG resistor. a) ;andom minimi+ing resistor b) Offset minimi+ing resistor c) Offset reducing resistors d) Output minimi+ing resistors View Answer Answer: b !planation: "he #oltage is product of resistors and input bias current. "herefore$ the #alue of the resistors are adEusted such that the resistors are connected at the in#erting input terminal is made e-ual to resistor connected in non(in#erting input terminal. "he use of this resistors minimi+e the amount of output offset #oltage and therefore$ the' are referred to as offset minimi+ing resistors.
8. Calculate ; O$ if the #alue of *>1 6 *>% in the gi#en circuit.
a) 119,.11M b) 191.,1M c) 1191.,M d) 1091.,M View Answer Answer: d !planation: Offset minimi+ing resistor$ ; O 62; 1P ; 5)N2 ; 1; 5). 6= ; O 6 21.%GMP10GM)N21.%GM10M) 6 1091.,M. . Calculate the output #oltage for the gi#en circuit using the specification: ; 1 6 8%0ML ; O6811.88%ML Vin610mVppL VO*>≅0.
a) 1.0%3Vpp b) 1.8Vpp c) 1Vpp d) %Vpp View Answer
Answer: c !planation: Offset minimi+ing resistor$ ; O 6 2; 1P; 5)N2; 1 ; 5) 6= ; 5 6 2; OP ; 1)N2 ; 1( ; O) 6 281%MP811.88%M)N28%0M(811.88%M) 6 8%GM. ∴ Vo 6 (2; 5N ; 1)P Vin 6 (28%GMN8%0M)P10mVpp 6 1Vpp. 10. Anal'se the gi#en circuit and determine the correct option
a) Voo V*O> b) Voo 6 V*O> c) Voo == V*O> d) Voo TT V*O> View Answer Answer: c !planation: 91op(amp has Vio 6 4m#dc and *> 6300nA. "he output offset #oltage due to input offset #oltage is gi#en as Voo 612; 5N; 1)QPVio 6 12.9GMN9M)QP4m# 6 0.404#. "he output offset #oltage due to input bias current is gi#en as V*O> 6 ; 5P*> 6.9GMP300nA 6 %.,3m#. 6=∴ Voo == V*O>.
11. "he specification for B101A op(amp is gi#en as *> 693nA. Determine the #alue of V*O>( V1.
a) 0.11%# b) 0.930# c) 0.,9# d) 0.4,# View Answer Answer: a !planation: "he #oltage at non(in#erting terminal is gi#en as V1 6 ; OP*>1 6 18MP9.3nA 6 1.11U#. 6= ∵ ; O 6 2; 1P; 5)N2; 1 ; 5) 6 213GMP130M)N213GM130M) 618M "he output offset #oltage is gi#en as V*O> 6 ; 5P*> 6= V*O> 6 13GMP9.3nA 6 11%.3m# 6= ∴ V*O>( V1 6 0.11%#. "he ma!imum amount b' which the two input bias current ma' differ is Gnown as a) *nput null current b) A#erage input bias current c) *nput offset current d) one of the mentioned View Answer %. A 91 t'pe op(amp has a ma!imum input offset current of %00nA dc. &hat conclusion can be deri#ed from this statement R *>1 < *nput bias current at in#erting input terminal and *>% < *nput bias current at non(in#erting input terminal a) *>1 ma' be larger than *>% b' %00nA b) *>% ma' be larger than *>1 b' %00nA c) *io and *>% ma' be e-ual to %00nA
d) All of the mentioned View Answer Answer: d !planation: *n a 91 op(amp$ *io 6 %00nA dc$ which means that the ma!imum difference between *>1 and *>% can be as large as %00nA. ad#ertisements ,. "he ma!imum magnitude of the output offset #oltage is a) VO*io 6 ; 5P*io b) VO*io 6 ; 5P2 *>1*>%) c) VO*io 6 ; 5P*>1 d) VO*io 6 ; 5P2 *>1(*>%) View Answer Answer: a !planation: "he output offset #oltage due to input offset current is gi#en as VO*io 6 ; 5P*io. . 5ind the output offset #oltage of an 91 op(ampL *f the gain of the non(in#erting amplifier is 8.3 and feedbacG resistor 6 13GM 2*>6%00nA for 91 op(amp) a) 1U# b) U# c) , U# d) % U# View Answer Answer: c !planation: "he circuit diagram of in#erting amplifier is gi#en below
@ain$ A612; 5N; 1) 6= ; 1 6 ; 5N2A(1) 6 13GMN28.3(1) 6 %GM. 6= ; O 62; 1P ; 5)N2 ; 1; 5) 6 1.94GM. "he output offset #oltage$ VO*>16 VO*>6 ; 5P*> 6= VO*>16 1.94GMP%00nAP8.3 6 %.710(4 ≅ , U#.
3. 5ind out the input offset current from the circuit
a) *io 6 [*>AP*>C[ b) *io 6 [*>A *>C[ c) *io 6 [*>AN *>C[ d) *io 6 [*>A( *>C[ View Answer Answer: d !planation: the input offset current is *io 6 [*>A( *>C[. 4. Determine the ma!imum output offset #oltage caused b' input offset current
a) 3.m# b) 9.,m# c) 4.m# d) 8.1m# View Answer
Answer: a !planation: 5or a 91 op(amp$ *io 6 %00nA2a!imum). 6= "herefore$ VO*io 6 ; 5P*io 6 %9GMP%00nA 63.m#. &hich factor affect the input offset #oltage$ bias current and input offset current in an op(amp a) Change in temperature b) Change in suppl' #oltage c) Change in time d) All of the mentioned View Answer Answer: d !planation: An' change in the mentioned parameters affect the #alues of input offset #oltage$ bias current and input offset current from remaining constant. %. "hermal #oltage drift is defined as a) △VioN△" b) △V5N△" c) △*ioN△" d) △*>N△" View Answer Answer: a !planation: "he a#erage rate of change of input offset #oltage per unit change in temperature is called thermal #oltage drift$ i.e. △VioN△". ad#ertisements ,. A completel' compensated in#erting amplifier is nulled at room temperature %3oC$ determine the temperature at which the total output offset #oltage will be +ero a) 30oC b) %3oC c) 93oC d) 1%3oC View Answer Answer: b !planation: &hen amplifier is nulled at room temperature$ the effect of input offset #oltage and current is reduced to +ero. Change in the total output offset #oltage occurs onl'$ if there is an' change in the #alue of Vio and *io. "herefore$ the total output offset #oltage will be +ero at room temperature. . /ow the effect of #oltage and current drift on the performance of an amplifier is determined a) △Voo"N△" 6 R1(; 5N; 1)Q72△VioN△") ; 572△*ioN△t) b) △Voo"N△" 6 R2(; 5N; 1)72△VioN△") ; 572△*ioN△t) c) △Voo"N△" 6 R12; 5N; 1)Q72△VioN△") ; 572△*ioN△t)
d) one of the mentioned View Answer Answer: c !planation: As the amplifier is used in in#erting configuration$ the effect of #oltage and current drift is gi#en as$ the a#erage change in total output offset #oltage per unit change in temperature. △Voo"N△" 6 R12; 5N; 1)Q72△VioN△") ; 572△*ioN△t). 3. "he error #oltage in a compensating in#erting amplifier is obtained b' a) ultipl'ing △" to total output offset #oltage b) ultipl'ing △" to input offset #oltage c) ultipl'ing △" to input offset current d) All of the mentioned View Answer Answer: a !planation: "he ma!imum possible change in the total output offset #oltage △Voo" results from a change in temperature △t. "herefore$ error #oltage is obtained b' multipl'ing △" in the a#erage total output offset #oltage. # 62 △Voo"N△")7△" 6 12; 5N; 1)Q72△VioN△")7△" ; 572△*ioN△")7△". 4. A 9.3GM internal resistor and a 1%GM feedbacG resistor are connected to an in#erting amplifier. 5ind the error #oltage$ if the output #oltage is ,.m# for an input of 1.,,m#. a) K0.4# b) K0.4m# c) K 40m# d) K4m# View Answer Answer: d !planation: "he output #oltage of in#erting amplifier is Vo6 (2; 5N; 1)7VinK# 6= #6 K Vo2; 5N; 1)7Vin 6 ,.m#21%GMN9.3GM)71.,,m# 6 K4.118 ≅ K4m#. ad#ertisements 9. Consider the amplifier is nulled at %9oC. Calculate the output #oltage $ if the input #oltage is 4.%1m# dc at 30oC. Assume B,09 op(amp with specification: △VioN△"6,0UVNoC L △*ioN△" 6 ,00pANoCL VS 6K13#.
a) 0.3,# or (0.48# b) 0.3%# or (0.98# c) 0.3# or (0.0# d) 0.31# or (0.84# View Answer Answer: d !planation: Change in temperature △" 6 30oC(%9oC 6 %,oC. 6= rror #oltage$ # 612; 5N; 1)Q72△VioN△")7△" ; 572△*ioN△")7△" 6 12100GMN1GM)Q72,0U#N1oC)7 %,oC 100GM72,00pAN1oC)7 %,oC 6 0.044 4.710( 6= #6 0.090 6 90.m#. 5or an input #oltage of 4.%1m# dc$ the output #oltage$ Vo6(2; 5N; 1)7VinK# 6 (2100GMN1GM)74.%1m#K90.m# 6 0.4# or (0.33#.
8.
"he error #oltage for the abo#e circuit is 0.,#. Compute the output #oltage a) one of the mentioned b) 19# or (13# c) (19# or 13# d) 13# to 19# View Answer Answer: b !planation: "he output #oltage for the non(in#erting amplifier is Vo612; 5N; 1; %)Q7VinK# 6 1230GMN,GM10GM)Q7,.,K0.,# 6 13.K0., 6= Vo 6 14.%# or (13.04# ≅ 19# or (13#. /ow to obtain a desired amount of multiplication in fre-uenc' multiplier a) >' decreasing the multiplication factor b) >' increasing the input fre-uenc' c) >' selecting proper di#ide b' (networG d) one of the mentioned View Answer Answer: c !planation: "he desired amount of multiplication can be obtained b' properl' selecting a di#ide b' (networG. 5or e!ample$ to obtain the output fre-uenc' f out637f in$ a di#ide b' 6 3 networG is needed.
%. Calculate the output fre-uenc' in a fre-uenc' multiplier if$ f in 6 %00/+ is applied to a 9 di#ide b' (networG. a) 1.%G/+ b) 1.4G/+ c) 1.%G/+ d) 1.G/+ View Answer Answer: c !planation: Since the VCO is actuall' running at a multiple of input fre-uenc'. f out6di#ide b' (networG ! f in69!%00/+6100/+ 6=f out61.G/+. ad#ertisements ,. 5or what Gind of input signal$ the fre-uenc' di#ider can be a#oided fre-uenc' multiplier a) "riangular wa#eform b) S-uare wa#eform c) Saw tooth wa#eform d) Sine wa#eform View Answer Answer: a !planation: VCO can be directl' locGed to the nth harmonic of the input signal without connecting an' fre-uenc' di#ider in between the input signal rich in harmonics liGe s-uare wa#e. . &hat must the t'pical #alue of n for a fre-uenc' multiplication N di#ision 2n(=order of harmonics) a) n _ 1% b) n =11 c) n T10 d) n 69 View Answer Answer: d !planation: As the amplitude of the higher order harmonics becomes less$ effecti#e locGing ma' not taGe place for high #alues of n. So$ the t'pical #alue of n is less than 10 for fre-uenc' multiplication N di#ision. 3. Determine the offset fre-uenc' of fre-uenc' translation$ when the output and input fre-uenc' are gi#en as 93G/+ and 1000/+. a) ,3 G/+ b) %0 G/+ c) % G/+ d) 1 G/+ View Answer
Answer: b !planation: "he output of the fre-uenc' translation f o6 f sf 1 6= f 1 6 f o( f s6 93G/+(33G/+ 6%0G/+. 4. "he fre-uenc' corresponding to logic 1 state in 5S is called a) Space fre-uenc' b) arG fre-uenc' c) >oth marG and space fre-uenc' d) one of the mentioned View Answer Answer: b !planation: 5re-uenc' shift is usuall' accomplished b' di#iding a VCO with binar' data signal. "herefore$ the logic 1 state of the binar' data signal corresponds to marG fre-uencies. ad#ertisements 9. 5ind the fre-uenc' shift in 5S generator a) %,0 /+ b) %30 /+ c) 180 /+ d) %00 /+ View Answer Answer: d !planation: 5re-uenc' shift is the difference between 5S signals of 1090 /+ and 1%90 /+ fre-uenc'$ which is %00 /+. 8. &hich filter is chosen to remo#e the carrier component in the fre-uenc' shift Ge'ing a) "hree stage filter b) "wo stage filter c) Single stage filter d) All of the mentioned View Answer Answer: a !planation: "he high cut(off fre-uenc' of ladder filter is chosen to be appro!imatel' halfwa' between the ma!imum Ge'ing rate of 130/+ F twice the input fre-uenc' 2≅ %%00/+) which can be obtained using three stage filters. &hat is the con#ersion ratio of the phase detector in 343 BB a) 0.1 b) 0.,3 c) 0.38 d) 0.9 View Answer
Answer: c !planation: "he con#ersion ratio of the phase detector of 343 BB 2onolithic BB) 6 1.N 6 0.38. %. @i#en f o 6 1.%G/+ and V 6 1,#$ find the locG(in range of monolithic hase(BocGed Boop. a) K393/+ b) K9%0/+ c) K130/+ d) K1G/+ View Answer Answer: b !planation: "he locG(in range of monolithic BB$ △f B 6 K29.87f o)NV 6 K29.871.%G/+)N1, 6 K9%0/+. ad#ertisements ,. 5ind out the incorrect statement. onolithic phase detector is preferred for critical applications as it is: 1. *ndependent of #ariation in amplitude %. *ndependent of #ariation in dut' c'cle of the input wa#eform ,. *ndependent of #ariation in response time a) 1 F % b) 1 F , c) % F , d) 1$ % F , View Answer Answer: a !planation: onolithic phase detectors are not sensiti#e to harmonics of the input signal and change in dut' c'cle of input and output fre-uenc'. . Determine the capture range of *C BB 343 for a locG(in range of K 1G/+.
a) △f c 6 K,1.3,/+ b) one of the mentioned c) △f c 6 K89.43,/+ d) △f c 6 K44.303/+ View Answer Answer: d !planation: "he capture range is △f c 6 K△f BN 2%7,.4710,7CQ0.3 6 K1G/+N 2%7,.47GM710U5)Q0.3 6 K1G/+N%%4.087(4Q0.3 6 %,Q0.3 6 K44.303/+.
3. 5ind the locG(in range of monolithic hase(BocGed Boop from the gi#en diagram.
a) (f o(△f B to f o(△f B b) (f o(△f B to (f o(△f C c) f o(△f B to f o(△f C d) (f o(△f C to f o(△f C View Answer Answer: a !planation: BocG(in range of monolithic BB is from (f o(△f B to f o(△f B. Variation in the operating fre-uenc' of op(amp causes a) Variation in gain amplifier b) Variation in gain phase angle c) Variation in gain amplitude and its phase angle d) one of the mentioned. View Answer Answer: c !planation: "he gain of the op(amp is a function of fre-uenc'. *t will ha#e a specific magnitude as well as a phase angle. %. A graph of the magnitude of the gain #ersus fre-uenc' is called a) >reaG fre-uenc' b) 5re-uenc' response plot c) 5re-uenc' stabilit' plot d) "ransient response plot View Answer Answer: b !planation: A fre-uenc' response plot is obtained b' plotting the gain of the op(amp responding to different fre-uencies. ad#ertisements ,. *n the fre-uenc' response plot$ the fre-uenc' is e!pressed in a) Anti(logarithmic scale b) Bogarithmic scale
c) Binear scale d) !ponential scale View Answer Answer: b !planation: "o accommodate large fre-uenc' ranges the fre-uenc' is assigned to a logarithmic scale. . &h' the gain magnitude in fre-uenc' response plot is e!pressed in decibels 2d>) a) "o obtain gain = 103 b) "o obtain gain T 103 c) "o obtain gain 6 0 d) "o obtain gain 6 View Answer Answer: a !planation: *n fre-uenc' response plot$ gain magnitude is assigned a linear scale and is e!pressed in decibels to accommodate #er' high gain 2 ≅ of the order 103 or higher). 3. &hich techni-ue is used to determine the stabilit' of op(amp a) 5re-uenc' response plot b) "ransient response plot c) >ode plot d) All of the mentioned View Answer Answer: c !planation: Although fre-uenc' response and bode plots indicate the effect of fre-uenc' #ariation on gain$ the >ode plot is generall' used for stabilit' determination and networG design. 4. /ow man' t'pes of plots can be obtained in the AC anal'sis of networG using >ode plot a) 5i#e b) 5our c) three d) "wo View Answer Answer: d !planation: "wo t'pes of plots can be obtained using >ode plot. "he' are magnitude #ersus fre-uenc' and phase angle #ersus fre-uenc' plots. ad#ertisements 9. &hat happens when the operating fre-uenc' of an op(amp increase a) @ain of the amplifier decrease b) hase shift between output and input signal decrease c) @ain and phase shift of amplifier decreases.
d) one of the mentioned. View Answer Answer: a !planation: &hen the operating fre-uenc' is increased the gain of the amplifier decrease. As it is linearl' related to fre-uenc'$ the phase shift is logarithmicall' related to fre-uenc'. 8. &hich of the following causes change in gain and phase shift a) All of the mentioned b) *nternall' integrated inductors c) *nternall' integrated Capacitor d) *nternall' integrated ;esistor View Answer Answer: c !planation: "he change in function of fre-uenc' is attributed to the internall' integrated capacitor as well as stra' capacitor. "hese capacitors are due to the ph'sical characteristic of semiconductor de#ice. . &hich plot is not pro#ide b' the manufactures a) agnitude plot b) hase angle plot c) 5re-uenc' response plot d) one of the mentioned. View Answer Answer: b !planation: hase angle plot are not generall' pro#ided because phase shift of later generation op(amp are less than 0o e#en at cross o#er fre-uenc'. 10. /ow the performance of an op(amp circuit can be impro#ed a) >' using non(compensating networG b) >' using fre-uenc' networG c) >' using compensating networG d) one of the mentioned View Answer Answer: c !planation: "he compensating networGs are used to impro#e Nmodif' the performance of an op( amp circuit o#er the desired fre-uenc' range b' controlling it gain and phase shift. 11. &hich op(amp re-uire e!ternal compensating networG a) Op(amp 991 b) Op(amp ,31 c) Op(amp 90
d) Op(amp 91 View Answer Answer: c !planation: Op(amp 90 is a first generation op(amp. @enerall' first generation op(amp are re-uired for e!ternal compensating networG. 1%. *C 91c op(amp belongs to a) one of the mentioned b) Incompensated op(amp c) on(compensated op(amp d) Compensated op(amp View Answer Answer: d !planation: 91c belongs to later generation op(amp and it has internal compensating networG. *n internal compensated op(amp$ the compensating networG is designed into the circuit to control the gain and phase shift of the op(amp and the' are called as compensating op(amp. 1,. 5ind out the non(compensating op(amp from the gi#en circuit
View Answer Answer: c !planation: on(compensating op(amp has e!ternal compensating components$ that is $
resistors and N or capacitors$ are added at designated terminals. "he mentioned op(amp has three compensating components: a resistor and two capacitors. Open loop op(amp configuration has a) Direct networG between output and input terminals b) o connection between output and feedbacG networG c) o connection between input and feedbacG networG d) All of the mentioned View Answer Answer: a !planation: *n an open loop configuration$ the output signal is not fed bacG in an' form as part of the input signal and the loop that would ha#e been formed with feedbacG is open. %. *n which configuration does the op(amp function as a high gain amplifier a) Differential amplifier b) *n#erting amplifier c) on(in#erting amplifier d) All of the mentioned View Answer Answer: d !planation: An op(amp functions as a high gain amplifier when connected in open loop configuration. "hese three are the open loop configuration of an op(amp. ad#ertisements ,. /ow does the open loop op(amp configuration classified a) >ased on the output obtained b) >ased on the input applied c) >ased on the amplification d) >ased on the feedbacG networG View Answer Answer: b !planation: Open loop configurations are classified according to the number of inputs used and the terminal to which the input is applied when a single input is used. . &hat will be the #oltage drop across the source resistance of differential amplifier when connected in open loop configuration a) Hero b) *nfinit' c) One d) @reater than one View Answer
Answer: a !planation: "he source resistances are normall' negligible compared to the input resistance. "herefore$ the #oltage drop across input resistors can be assumed to be +ero. 3. "he output #oltage of an open(loop differential amplifier is e-ual to a) Double the difference between the two input #oltages b) roduct of #oltage gain and indi#idual input #oltages c) roduct of #oltage gain and the difference between the two input #oltages d) Double the #oltage gain and the difference between two input #oltages View Answer Answer: c !planation: "he output #oltage is e-ual to the #oltage gain times the difference between the two input #oltages. &hich filter t'pe is called a flat(flat filter a) Cauer filter b) >utterworth filter c) Cheb'she# filter d) >and(reEect filter View Answer Answer: b !planation: "he Ge' characteristic of the butterworth filter is that it has a flat pass band as well as stop band. So$ it is sometimes called a flat(flat filter. %. &hich filter performs e!actl' the opposite to the band(pass filter a) >and(reEect filter b) >and(stop filter c) >and(elimination filter d) All of the mentioned View Answer Answer: d !planation: A band reEect is also called as band(stop and band(elimination filter. *t performs e!actl' the opposite to band(pass because it has two pass bands: 0 T f T f B and f = f /. ad#ertisements ,. @i#en the lower and higher cut(off fre-uenc' of a band(pass filter are %.3G/+ and 10G/+. Determine its bandwidth. a) 930 /+ b) 9300 /+ c) 93000 /+ d) one of the mentioned View Answer
Answer: b !planation: >andwidth of a band(pass filter is >andwidth6 f /( f B610G/+( %.3G/+69.3G/+69300/+. . *n which filter the output and input #oltages are e-ual in amplitude for all fre-uencies a) All(pass filter b) /igh pass filter c) Bow pass filter d) All of the mentioned View Answer Answer: a !planation: *n all(pass filter$ the output and input #oltages are e-ual in amplitude for all fre-uencies. "his filter passes all fre-uencies e-uall' well and with phase shift and between the two function of fre-uenc'. 3. "he gain of the first order low pass filter a) *ncreases at the rate %0d>Ndecade b) *ncreases at the rate 0d>Ndecade c) Decreases at the rate %0d>Ndecade d) Decreases at the rate 0d>Ndecade View Answer Answer: c !planation: "he rate at which the gain of the filter changes in the stop band is determined b' the order of filter. So$ for a low pass filter the gain decreases at the rate of %0d>Ndecade. 4. &hich among the following has the best stop band response a) >utterworth filter b) Cheb'she# filter c) Cauer filter d) All of the mentioned View Answer Answer: c !planation: "he cauer filter has a ripple pass band and a ripple stop band. So$ generall' cauer filter gi#es the best stop band response among the three. ad#ertisements 9. Determine the order of filter used$ when the gain increases at the rate of 40d>Ndecade on the stop band. a) Second(order low pass filter b) "hird(order /igh pass filter c) 5irst(order low pass filter d) one of the mentioned View Answer
Answer: b !planation: "he gain increases for high pass filter. So$ for a third order high pass filter the gain increases at the rate of 40d>Ndecade in the stop band until f6f B. 8. ame the filter that has two stop bands a) >and(pass filter b) Bow pass filter c) /igh pass filter d) >and(reEect filter View Answer Answer: a !planation: A band(pass filter has two stop bands: 1) 0 T f T f B and %) f = f /. . "he fre-uenc' response of the filter in the stop band. i. Decreases with increase in fre-uenc' ii. *ncrease with increase in fre-uenc' iii. Decreases with decrease in fre-uenc' i#. *ncreases with decrease in fre-uenc' a) i and i# b) ii and iii c) i and ii d) ii and i# View Answer Answer: c !planation: "he order of fre-uenc' of the filter in the stop band determines either stead' decreases or increases or both with increase in fre-uenc'. /ow man' t'pes of band elimination filters are present a) "hree b) "wo c) 5our d) one of the mentioned View Answer Answer: b !planation: >and(reEect filters are also called as band elimination filters. "he' are classified into two t'pes. i) &ide band(reEect filter and ii) arrow band(reEect filter. A narrow band(reEect filter is commonl' called as a) otch filter
b) >and step filter c) Dela' filter d) All of the mentioned View Answer Answer: a !planation: A narrow band(reEect filter is also called as notch filter because of its higher -ualit' factor$ 2=10). . 5ind the e!pression for notch(out fre-uenc' a) f 6 %;C b) f 6 %N;C c) f 6 1N%72;NC) d) f 6 1N%;C View Answer Answer: d !planation: "he notch(out fre-uenc' is the fre-uenc' at which ma!imum attenuation occurs: it is gi#en b' f 61N%;C. 3. "he -ualit' factor of passi#e twin "(networG is increased b' using a) *n#erting amplifier b) on(in#erting amplifier c) Voltage follower d) Differential amplifier View Answer Answer: c !planation: "he passi#e twin "(networG has a selecti#el' low figure of merit. "he of the networG can be increased significantl'$ if it is used with the #oltage follower. 4. 5ind out the application in which narrow band(reEect filter can be used a) mbedded s'stem b) >iomedical instrument c) Digital computer d) one of the mentioned View Answer Answer: b !planation: otch filters or narrow band(reEect filters are used in biomedical instruments for eliminating undesired fre-uencies. 5ind the application of area where all(pass filters are used a) Cathode ra' oscilloscope b) "ele#ision
c) "elephone wire d) one of the mentioned View Answer Answer: c !planation: &hen signals are transmitted in transmission lines liGe telephone wire$ the' undergo change in phase$ all(pass filters are used to compensate these phase changes. . Determine the output #oltage for all the all(pass filter and e!press it in comple! form a) VO 6VinN 21(E%f;C) N21 E%f;C)Q b) VO 6Vin7 21E%f;C) N21( E%f;C)Q c) VO 6Vin 721( E%f;C) N21 E%f;C)Q d) one of the mentioned View Answer Answer: c !planation: "he output #oltage of all(pass filter is gi#en as VO 6Vin7 21(E%f;C) N21E%f;C)Q . 10. Determine the input fre-uenc' for all(pass filter with phase angle as 4%o. Consider the #alue of resistor and capacitor are ,.,GM and .9U5. a) *nput fre-uenc'6 (9.43/+ b) *nput fre-uenc'6 (4.99/+ c) *nput fre-uenc'6 (,.8/+ d) *nput fre-uenc'6 (.43/+ View Answer Answer: d !planation: "he phase angle is gi#en as 6 (%tan(172%f;C) 6= f6(tanN;C 6(tan24%o)N27,.,GM7.9U5)6 (1.88N0.18 6(.43/+. "he #oltage gain magnitude of all(pass filter is a) Hero b) One c) *nfinit' d) one of the mentioned View Answer Answer: b !planation: "he magnitude of #oltage gain of all(pass filter [VO NVin[ 6 212%N;C)%) N 212% N;C)%) 61 Choose the incorrect statement X*n wide band(reEect filterY . a) Bow cut(off fre-uenc' of low pass filter must be larger than the high cut(off fre-uenc' of the high pass filter. b) Bow cut(off fre-uenc' of high pass filter must be e-ual than the high cut(off fre-uenc' of the
high pass filter. c) Bow cut(off fre-uenc' of high pass filter must be smaller than the high cut(off fre-uenc' of the low pass filter. d) one of the mentioned View Answer Answer: d !planation: *n wide band(reEect filter$ low cut(off fre-uenc' of high pass filter must be larger than the high cut(off fre-uenc' of the low pass filter. &hich filter attenuates an' fre-uenc' outside the pass band a) >and(pass filter b) >and(reEect filter c) >and(stop filter d) All of the mentioned View Answer Answer: a !planation: A band( pass filter has a pass band between two cut(off fre-uencies f / and f B. So$ an' fre-uenc' outside this pass band is attenuated. %. arrow band(pass filters are defined as a) T 10 b) 6 10 c) = 10 d) one of the mentioned View Answer Answer: c !planation: ualit' factor 2) is the measure of selecti#it'$ meaning higher the #alue of $ the narrower its bandwidth. ad#ertisements ,. A band(pass filter has a bandwidth of %30/+ and center fre-uenc' of 844/+. 5ind the -ualit' factor of the filter a) ,.4 b) 4.% c) .8 d) one of the mentioned View Answer Answer: a !planation: ualit' factor of band(pass filter$ 6f cNbandwidth6 344N%306,.4. . 5ind the center fre-uenc' of wide band(pass filter a) f c6 2f h 7f B)
b) f c6 2f h f B) c) f c6 2f h (f B) d) f c6 2f h Nf B) View Answer Answer: a !planation: *n a wide band(pass filter$ the product of high and low cut(off fre-uenc' is e-ual to the s-uare of center fre-uenc' i.e. 2 f c)% 6f /7f B 6= f c6 2f h7f B). 3. 5ind out the #oltage gain magnitude e-uation for the wide band(pass filter. a) A5t72 fNf B)N212fNf h)%Q712fNf B)%Q b) A5tN R12fNf h)%Q712fNf B)%Q c) A5tN R12fNf h)%QN12fNf B)%Q d) A5tN2fNf B)QN R12fNf h)%QN12fNf B)%Q View Answer 4. &hen a second order high pass filter and second order low pass sections are cascaded$ the resultant filter is a a) K80d>Ndecade band(pass filter b) K0d>Ndecade band(pass filter c) K%0d>N decade band(pass filter d) one of the mentioned View Answer Answer: b !planation: "he order of the band(pass filter depends on the order of the high pass and low pass filter sections. ad#ertisements 9. 5ind the #oltage gain magnitude of the wide band(pass filter &here total pass band gain is64$ input fre-uenc' 6 930/+$ Bow cut(off fre-uenc' 6%00/+ and high cut(off fre-uenc'61Gh+. a) 1,.,4 d> b) one of the mentioned c) 11.91 d> c) 1.8,9d> View Answer Answer: d !planation: Voltage gain of the filter$ [VONVin[6A5t72fNf B)QNR12fNf B)%Q71fNf B)%Q 6472930N%0)QNR12930N%00)%Q712930N%00)%Q 6%%.3N213.471.34) 63.31. [VONVin[6 %0log23.31) 61.8,9d>.
8. Compute the -ualit' factor of the wide band(pass filter with high and low cut(off fre-uencies e-ual to 30/+ and %30/+. a) 0.%98 b) 0.,8 c) 0.44 d) 0. View Answer Answer: c !planation: ualit' factor 62f h7f B)N2f h(f B) 6 230/+7%30/+)N230/+(%30/+) 60.44. . "he details of low pass filter sections are gi#en as f h 610G/+$ A56 % and f61.%G/+. 5ind the #oltage gain magnitude of first order wide band(pass filter$ if the #oltage gain magnitude of high pass filter section is 8.,%d>. a) 8.1,d> b) 10.0%d> c) 1.%8d> d) 43.d> View Answer Answer: c !planation: [VONVin[2high pass filter) 6 8.,%d>61028.,%N%0) 6%.404. "herefore$ the #oltage gain of wide band(pass filter [VONVin[6 A5t72fNf B)N12fNf h)%)Q712fNf B)%)Q 6RAf N212fNf h)%Q7R2Af 7fNf B)N12fNf B)%Q 6Aft N12fNf h)%Q72%.404) 6 %N2121.%G/+N10G/+)%Q72 %.404) 6 1.847%.404 63.19 6%0log723.19) 61.%8d>. 10. "he -ualit' factor of a wide band(pass filter can be a) 1%.4 b) .1 c) 1.% d) 10. View Answer Answer: b !planation: A wide band(pass filter has -ualit' factor less than 10. *f the gain at center fre-uenc' is 10$ find the -ualit' factor of narrow band(pass filter a) 1 b) % c) , d) one of the mentioned View Answer Answer: c !planation: "he gain of the narrow band(pass filter must satisf' the condition$ A56 %7% &hen 6,$
6= %7% 6%72,%) 618. 6= 10T18. /ence condition is satisfied when 6,. 1,. "he ad#antage of narrow band(pass filter is a) f c can be changed without changing gain b) f c can be changed without changing bandwidth c) f c can be changed without changing resistors d) All of the mentioned View Answer Answer: d !planation: As the narrow band(pass filter has multiple filters. "he center fre-uenc' can be changed to a new fre-uenc' without changing the gain or bandwidth and is accomplished b' changing the resistor to a new #alue which is gi#en as ;?6;72f BNf c)%. An electrical filter is a a) hase(selecti#e circuit b) 5re-uenc'(selecti#e circuit c) 5ilter(selecti#e circuit d) one of the mentioned View Answer Answer: b !planation: An electric filter is often a fre-uenc' selecti#e circuit that passes a specified band of fre-uencies and blocGs or alternates signal of fre-uencies outside this band. %. 5ilters are classified as a) Analog or digital b) assi#e or acti#e c) Audio or radio fre-uenc' d) All of the mentioned View Answer Answer: d !planation: 5ilters are classified based on the design techni-ue 2analog or digital)$ elements used for construction 2acti#e or passi#e) and operating range 2audio or radio fre-uenc'). ad#ertisements ,. &h' inductors are not preferred for audio fre-uenc' a) Barge and hea#' b) /igh power dissipation c) /igh input impedance d) one of the mentioned View Answer
Answer: a !planation: At audio fre-uencies$ inductor becomes problematic$ as the inductors become large$ hea#' and e!pensi#e. . "he problem of passi#e filters is o#ercome b' using a) Analog filter b) Acti#e filter c) BC filter d) A combination of analog and digital filters View Answer Answer: b !planation: "he acti#e filters enclose as a capacitor in the feedbacG loop and a#oid using inductors$ this wa' inductorless acti#e filter are obtained. 3. &hat happens if inductors are used in low fre-uenc' applications a) nhance inductor usage b) o losses occurs c) Degrades inductor performance d) Bow power dissipation View Answer Answer: c !planation: 5or low fre-uenc' applications more number of turns of wire must be used$ which in turn adds to the series resistance degrading inductor?s performance. 4. 5ind out the incorrect statement about acti#e and passi#e filters. a) @ain is not attenuated in acti#e filter b) assi#e filters are less e!pensi#e c) Acti#e filter does not cause loading of source d) assi#e filters are difficult to tune or adEust View Answer Answer: b !planation: "'picall' acti#e filters are more economical than passi#e filters. "his is because of the #ariet' of cheaper op(amp and the absence of inductor?s. ad#ertisements 9. &hat are the most commonl' used acti#e filters a) All of the mentioned b) Bow pass and /igh pass filters c) >and pass and >and reEect filters d) All(pass filters View Answer
Answer: a !planation: All the mentioned filters use op(amp as acti#e element and capacitors F resistors as passi#e elements. 8. Choose the op(amp that impro#es the filter performance. a) UA91 b) B,18 c) B101A d )C,001 View Answer Answer: b !planation: B,18 is a high speed op(amp that impro#es the filter?s performance through increased slew rate and higher unit' gain(bandwidth. . *deal response of filter taGes place in a) ass band and stop band fre-uenc' b) Stop band fre-uenc' c) ass band fre-uenc' d) one of the mentioned View Answer Answer: c !planation: "he ideal response indicates the practical filter response and it lies within the pass band fre-uencies. 10. 5ind out the low pass filter from the gi#en fre-uenc' response characteristics.
View Answer Answer: a !planation: A low pass filter has a constant gain from 0/+ to high cut(off fre-uenc' f /. Select the specifications that implies the in#erting amplifier a) V1 6 (,#$ V% 6 (# b) V1 6 (%#$ V% 6 ,# c) V1 6 3#$ V % 6 13# d) V1 6 0#$ V% 6 3# View Answer Answer: d !planation: *n in#erting amplifier$ the input is applied to the in#erting terminal and the non( in#erting terminal is grounded. So$the input applied to in#erting amplifier can be V1 6 0#$ V% 6 3#.
8. 5ind the output of in#erting amplifier a) Vo 6 AV AVin b) Vo 6 (AVin c) Vo 6 (A2Vin1 < < Vin%) d) one of the mentioned View Answer Answer: b !planation: *n an in#erting amplifier a mplifier the input signal is amplified b' b ' gain A and is also in#erted at the output. "he negati#e sign indicates that the output #oltage is of opposite polarit'. . Determine the output #oltage for the non(in#erting amplifier input #oltage ,9UVpp sinewa#e. Assume that the output is a 91. a) (9. Vpp sinewa#e b) 9 Vpp sinewa#e c) 9.Vpp sinewa#e d) 0.9 Vpp sinewa#e View Answer Answer: c !planation: "he output #oltage for non(in#erting amplifier Vo 6 APVin 6 %00000 P ,9U 6 9. Vpp sinewa#e.
10. 5ind the non(in#erting amplifier configuration from the gi#en circuit diagram
View Answer Answer: c !planation: *n a non(in#erting amplifier$ the input is applied to the non(in#erting non(in#er ting input terminal and the in#erting terminal is connected to ground. 11. &hat happen if an' positi#e input signal is applied to open(loop configuration a) Output reaches saturation le#el b) Output #oltage swing?s peaG to peaG c) Output will be a sine wa#eform d) Output will be a non(sinusoidal wa#eform View Answer Answer: a !planation: *n open(loop configuration$ due to #er' high gain of the op(amp$ an' input signal slightl' greater than +ero dri#es the output to saturation le#el. 1%. &h' open(loop op(amp configurations are not used in linear applications a) Output reaches positi#e saturation b) Output reaches negati#e saturation c) Output switches between positi#e and negati#e saturation
d) Output reaches both positi#e and negati#e saturation. View Answer Answer: c !planation: &hen operated in open loop$ the output switches between positi#e and negati#e saturation le#els. 5or this reason$ open loop op(amp configurations are not used in linear applications. &hich filter performs e!actl' the opposite to the band(pass filter a) >and(reEect filter b) >and(stop filter c) >and(elimination filter d) All of the mentioned View Answer Answer: d !planation: A band reEect is also called as band(stop and band(elimination filter. *t performs e!actl' the opposite to band(pass because it has two pass bands: 0 T f T f B and f = f /. ad#ertisements ,. @i#en the lower and higher cut(off fre-uenc' of a band(pass filter are %.3G/+ and 10G/+. Determine its bandwidth. a) 930 /+ b) 9300 /+ c) 93000 /+ d) one of the mentioned View Answer Answer: b !planation: >andwidth of a band(pass filter is >andwidth6 f /( f B610G/+( %.3G/+69.3G/+69300/+. . *n which filter the output and input #oltages are e-ual in amplitude for all fre-uencies a) All(pass filter b) /igh pass filter c) Bow pass filter d) All of the mentioned View Answer Answer: a !planation: *n all(pass filter$ the output and input #oltages are e-ual in amplitude for all fre-uencies. "his filter passes all fre-uencies e-uall' well and with phase shift and between the two function of fre-uenc'.
3. "he gain of the first order low pass filter a) *ncreases at the rate %0d>Ndecade b) *ncreases at the rate 0d>Ndecade c) Decreases at the rate %0d>Ndecade d) Decreases at the rate 0d>Ndecade View Answer Answer: c !planation: "he rate at which the gain of the filter changes in the stop band is determined b' the order of filter. So$ for a low pass filter the gain decreases at the rate of %0d>Ndecade. 4. &hich among the following has the best stop band response a) >utterworth filter b) Cheb'she# filter c) Cauer filter d) All of the mentioned View Answer Answer: c !planation: "he cauer filter has a ripple pass band and a ripple stop band. So$ generall' cauer filter gi#es the best stop band response among the three. ad#ertisements 9. Determine the order of filter used$ when the gain increases at the rate of 40d>Ndecade on the stop band. a) Second(order low pass filter b) "hird(order /igh pass filter c) 5irst(order low pass filter d) one of the mentioned View Answer 8. ame the filter that has two stop bands a) >and(pass filter b) Bow pass filter c) /igh pass filter d) >and(reEect filter View Answer Answer: a !planation: A band(pass filter has two stop bands: 1) 0 T f T f B and %) f = f /. . "he fre-uenc' response of the filter in the stop band. i. Decreases with increase in fre-uenc' ii. *ncrease with increase in fre-uenc' iii. Decreases with decrease in fre-uenc' i#. *ncreases with decrease in fre-uenc'
a) i and i# b) ii and iii c) i and ii d) ii and i# View Answer Answer: c !planation: "he order of fre-uenc' of the filter in the stop band determines either stead' decreases or increases or both with increase in fre-uenc'. 5ree running multi#ibrator is also called as a) Stable multi#ibrator b) Voltage control oscillator c) S-uare wa#e oscillator d) ulse stretcher View Answer Answer: b !planation: 5ree running multi#ibrator operates at a fre-uenc' which is determined b' an e!ternal tuning capacitor and a resistor. On appl'ing a dc control #oltage the fre-uenc' can be shifted on either sides. "his fre-uenc' de#iation is directl' proportional to the dc control #oltage and hence it is called as ^#oltage controlled oscillator?. %. "he output #oltage of phase detector is a) hase #oltage b) 5ree running #oltage c) rror #oltage d) one of the mentioned View Answer Answer: c !planation: "he phase detector compares the input fre-uenc' with the feedbacG fre-uenc' and produces output dc #oltage called as error #oltage. ad#ertisements ,. At which state the phase(locGed loop tracGs an' change in input fre-uenc' a) 5ree running state b) Capture state c) hase locGed state d) All of the mentioned View Answer Answer: c !planation: *n the phase(locGed$ the output fre-uenc' is e!actl' same as the input signal fre-uenc'. So the circuit tracGs an' change in the input fre-uenc' through its repetiti#e action.
&hat is the function of low pass filter in phase(locGed loop a) *mpro#es low fre-uenc' noise b) ;emo#es high fre-uenc' noise c) "racGs the #oltage changes d) Changes the input fre-uenc' View Answer Answer: b !planation: "he output #oltage of a phase detector is a dc #oltage and is often referred to as error #oltage. "his output is applied to the low pass filter which remo#es the high fre-uenc' noise and produces a dc le#el. ad#ertisements 4. &hat is the need to generate correcti#e control #oltage a) "o maintain the locG b) "o tracG the fre-uenc' change c) "o shift the VCO fre-uenc' d) All of the mentioned View Answer Answer: d !planation: "he output fre-uenc'2f o) of VCO is identical to input fre-uenc'2f s) e!cept for a finite phase difference2)$ which generates a correcti#e control #oltage to shift VCO fre-uenc' from f o to f s$ thereb' maintains the locG once locGed and BB tracGs the fre-uenc' changes of the input signal. 9. At what range the BB can maintain the locG in the circuit a) BocG in range b) *nput range c) 5eedbacG loop range d) one of the mentioned View Answer Answer: a !planation: "he change in fre-uenc' of the incoming signal can be tracGed when the BB is locGed. So$ the range of fre-uencies o#er which BB maintains the locG with the incoming signal is called as the locG in range. 8. "he pull(in time depends on a) *nitial phase and fre-uenc' difference between two sign b) O#erall loop gain c) Boop filter characteristics d) All of the mentioned View Answer
Answer: d !planation: "he pull(in time depends on the abo#e mentioned characteristics to establish locG in the BB circuit. Open loop bandwidth of an op(amp e!tend its bandwidth from a) 0/+ to f o b) %0d> to f o c) ,d> to f o d) 0.90d> to f o View Answer Answer: a !planation: "he gain of the op(amp remains essentiall' constant from 0 to the breaG fre-uenc' f o and therefore rolls off at a constant rate of %0d> per decade. "hus$ the open(loop bandwidth is the fre-uenc' band e!tending from 0/+ to f o. %. &hat happens if 91 op(amp is configured as a closed loop in#erting amplifier a) @ain increases b) @ain roll(off at a rate %0d>Ndecade c) o gain roll(off taGes place d) @ain decreases View Answer Answer: b !planation: &hether the op(amp is in#erting N non(in#erting the gain will alwa's roll(off at a rate of %0d>Ndecade$ using onl' resisti#e components regardless of the #alue of its closed loop gain. ad#ertisements ,. Op(amp re-uiring e!ternal compensating components is called as a) "ailored fre-uenc' response op(amp b) Compensating op(amp c) "ransient op(amp d) /igh fre-uenc' op(amp View Answer Answer: a !planation: Op(amp using e!ternal components liGe resistor and capacitor to form the compensating networG are sometimes called tailored fre-uenc' response op(amps because the user has to pro#ide the compensation if it is needed to tailor the response. . *n the first generation op(amp 90c$ the open loop bandwidth of gain #ersus fre-uenc' cur#e a) *ncreases from the innermost compensated cur#e to the outermost b) Decrease from the innermost compensated cur#e to the outermost c) *ncreases from the outermost compensated cur#e to the innermost
d) Decreases from the outermost compensated cur#e to the innermost View Answer Answer: d !planation: "he gain #ersus fre-uenc' cur#e of 90c decreases from the outermost compensated cur#e to the innermost. 5or e!ample$ if C1 610p5$ ; 1 6 0M and C% 6 ,p5$ the bandwidth ≅ 3G/+. &hile if C 1 63000p5$ ; 1 61.3M and C%6 %00p5$ the bandwidth will be 100/+. 3. &hich t'pe of op(amp offer relati#el' broader open(loop bandwidth a) Compensated op(amp b) Incompensated op(amp c) "ailored fre-uenc' response op(amp d) on(compensated op(amp View Answer Answer: b !planation: "he uncompensated op(amps offer broader open loop bandwidth whereasL the internall' compensated op(amps ha#e #er' small open(loop bandwidth. &hich de#ice is used for diagnostic purposes and for recording a) Bow pass filter b) onolithic BB c) Voltage Controlled Oscillator d) one of the mentioned View Answer Answer: c !planation: A Voltage Controlled Oscillator 2VCO) is used for con#erting low fre-uenc' signals such as @s$ @ into an audio fre-uenc' range. "hese audio signals can be transmitted o#er two wa' radio communication s'stems for diagnostic purposes or can be recorded on a magnetic tape for further reference. %. *f the output of the Schmitt trigger is gi#en below. stimate the output at the pin , of VCO.
View Answer Answer: a !planation: *n VCO$ the output of Schmitt trigger is fed to the input of in#erter. "herefore$ the output at pin, would be an in#erted output. As the input is a s-uare wa#e$ the output obtained will be an in#erted s-uare wa#e. ad#ertisements ,. &rite the e-uation for time period of VCO a) 2%7Vcc7C")Ni b) 2Vcc C")N2%7i) c) 2Vcc7C"7i)N% d) 2%7Vcc)N2i7C") View Answer Answer: b !planation: "he time period of VCO is gi#en as "6%7 △t 62%70.%37Vcc 7C")Ni 620.3 V7cc7C")Ni 6 2Vcc7C")N2%7i). . Determine the #alue of current flow in VCO$ when the 344 VCO e!ternal timing resistor ; " 6%30M and the modulating input #oltage Vc6,.%3V.2Assume Vcc63#). a) ,mA b) 1%mA c) 9mA d) 10mA View Answer Answer: c !planation: Current flowing in VCO$ i 62V cc( Vc)N ; " 6 23V(,.%3V)N%30 6 1.93N%30 6=i 69mA.
3. 5rom the circuit gi#en$ find the #alue of output fre-uenc'
a) 198.8 /+ b) 10.8 /+ c) 13.8 /+ d) 110.88 /+ View Answer Answer: b !planation: Output fre-uenc'$ f o 6%72Vcc( Vc) QN2C"7; "7Vcc )6 %!28(1.3)QN20.9U5!,,GM!8#) 61,N0.1% 6= f o610.8 /+. 4. "he output fre-uenc' of the VCO can be changed b' changing a) !ternal tuning resistor b) !ternal tuning capacitor c) odulating input #oltage d) All of the mentioned View Answer Answer: d !planation: "he output fre-uenc' of VCO$ f o 6 %72Vcc( Vc)QN2C"7; "7Vcc). 5rom the e-uation$ it is clear that the f o is in#ersel' proportional to C" F ; " and directl' proportional to Vc."herefore$ the output fre-uenc' can be changed b' changing either #oltage control$ C" or ; ". ad#ertisements 9. Calculate the #alue of e!ternal timing capacitor$ if no modulating input signal is applied to VCO. Consider f o6%3 G/+ and ; "63 GM.
a) 4n5 b) 100U5 c) %n5 d) 10n5 View Answer Answer: c !planation: &hen modulating input signal is not applied to VCO$ the output fre-uenc' becomes f o61N27; "7C") 6= C" 61N27; "7f o) 61N273GM7%3G/+) 6 %710( 6%n5. 8. &hat is the ad#antage of using filter a) /igh noise immunit' b) ;educe the bandwidth of BB c) ro#ides d'namic range of fre-uencies d) one of the mentioned View Answer Answer: a !planation: "he charge on the filter capacitor gi#es a short time memor' to the BB. So$ e#en if the signal becomes less than the noise for a few c'cles$ the dc #oltage on the capacitor continues to shift the fre-uenc' of VCO$ till it picGs up the signal again. "his produces high noise immunit'.
. &hich filter is used in VCO
View Answer Answer: d !planation: "he loop filter used in the VCO can be one of the three t'pes of filter shown abo#e. 10. Choose the VCO for attaining higher output fre-uenc'. a) 344 b) S344 c) C0% d) All of the mentioned View Answer Answer: c !planation: C0% is used for attaining high output fre-uenc'$ because the ma!imum output fre-uenc' of 344 and S344 is 300G/+. 11. Voltage to fre-uenc' con#ersion factor for VCO is a) # 6 △VcN △f o b) # 6 △f oN△Vc c) # 6 △f o 7 △Vc d) # 6 1N2△f o7△Vc) View Answer
Answer: b !planation: "he #oltage to fre-uenc' con#ersion factor is defined as the change in fre-uenc' to the change in modulating input #oltage. 6= #6△f oN△Vc. 1%. Calculate the #oltage to fre-uenc' con#ersion factor$ where f o6133/+ and Vcc610V. a) 1,0 b) 1% c) 1, d) 114 View Answer Answer: b !planation: "he #oltage to fre-uenc' con#ersion factor$ # 6 △f oN△Vcc6 87f oNVcc 6 287133)N1061%. 1,. 5ind the e-uation for change in fre-uenc' of VCO a) △f o 6 2%7△Vc)N2; "7C"7Vcc) b) △f o 6 △VcN27; "7C"7Vcc) c) △f o 6 △VcN2%7; "7C"7Vcc) d) △f o 6 27△Vc)N2; "7C"7Vcc) View Answer 1. Ising the gi#en specifications$ determine the #oltage to fre-uenc' con#ersion factor.
a) 8.,%
b) 8.0 c) 8.31 d) 8.93 View Answer Answer: c !planation: △f o 6 %7△VcN2; "7C"7Vcc) 6=△Vc6 2△f o7; "7C"7Vcc)N% 6 2.9U5!10GM!3!11%)N% 6 1,.14V. #6 △f oN △Vc 6 11%/+N1,.14V 6= #68.31. "o obtain a faster slew rate the op(amp should ha#e a) /igh current and large compensating capacitor b) Small compensating capacitor c) /igh current or small compensating capacitor d) Bow current or large compensating capacitor View Answer Answer: c !planation: "he slew rate is gi#en as$ S; 6dVcNdt[ma! 6 *NC "herefore the higher current should be gi#en a small compensating capacitor is used internall' or outside an op(amp. %. 5ind the e!pression for full power response. a) f ma!2/+) 62slew rate7104)N24.%87Vm) b) f ma!2/+) 6slew rate N24%871047Vm) c) f ma!2/+) 62slew rate7Vm7104)N4.%8 d) f ma!2/+) 624.%87Vm7 104)N slew rate View Answer ad#ertisements ,. Calculate the time taGen b' the output to swing from 1# to (1# for a 91C op(amp ha#ing a slew rate of 0.3VNUs a) %%Us b) %Us c) 34Us d) 90Us View Answer Answer: c !planation: Slew rate 6 d#Ndt 6= "ime taGen 6 1(2(1)N 0.3VNUs 6 %8#N0.3VNUs 6 34Us.
. Consider a s-uare wa#e ha#ing a peaG to peaG amplitude of %93m# and it is amplified to a peaG to peaG amplitude of #$ with rise time of 3.%Us. Calculate the slew rate a) 0.413 #NUs b) 0.91% #NUs c) 0.,%3 #NUs d) one of the mentioned View Answer Answer: a !planation: 5rom the definition of rise time$ the change in the output #oltage is 3.%Us △#6 20(10)7#6 20.(0.1)7# 6,.%#. "herefore$ slew rate 6 ,.%#N3.%Us 60.413#NUs. 3. Determine the ma!imum input signal to be applied to an op(amp to get distortion free output. *f the op(amp used is an in#erting amplifier with a gain of 30 and ma!imum output amplitude obtained is .%V sine wa#e a) 13m# b) 0.148m# c) %09m# d) 111m# View Answer Answer: b !planation: @i#en$ Vm6 .%V peaG ∴ the output #oltage 6 .%.% 68. V peaG to peaG. /ence for the output to be undistorted sine wa#e$ the ma!imum input signal should be less than 6= 8.N306 0.148 6 148mVpeaG to peaG. 4. &hat happens if the fre-uenc' or amplitude of the input signal is increased to e!ceed slew rate of the op(amp a) All of the mentioned b) /igh fre-uenc' output c) Distorted output d) Barge amplitude output View Answer Answer: c !planation: Slew rate determines the ma!imum fre-uenc' of operation for a desired output swing. *f the slew rate is greater than %fVm N104 then the output is distorted$ whereas an increase in the fre-uenc' Namplitude of input signal distort the output. ad#ertisements 9. Compute the peaG output amplitude$ when the #oltage gain #erses fre-uenc' cur#e of 91C is flat upto %3/+. a) V peaG b) V peaG
c) %0V peaG d) one of the mentioned View Answer Answer: d !planation: "he slew rate of 91C op(amp 6 0.3VNUs. So$ the ma!imum output #oltage at %3G/+ is S;6 2%fVm)N 104 VNUs 6= Vm 6 2S;7104)N2%f ) 6 20.37104)N2%7%3G/+) Vm 6 ,.18V peaG . 8. Calculate the ma!imum input fre-uenc' at which the output will be distorted from the gi#en specifications Vo 6 ,0 V pp L Slew rate 6 0.4#NUs. a) 1000/+ b) 10G/+ c) 1G/+ d) 10G/+ View Answer Answer: d !planation: "he minimum time between the two +ero crossing is gi#en as 6= ,0#N20.4#NUs) 630Us. /ence the ma!imi+e input fre-uenc' f ma! at which the output get distorted is f ma! 6 1N2%730Us) 610000 610G/+. . atch AC parameter of the op(amp in column 1 with the column %. Column 1 1. >andwidth %. "ransient response ,. Slew rate
Column(% i . a large signal phenomenon ii. ;ise time is related to bandwidth and o#ershoots measure stabilit' iii. Depends on compensating components and closed loop gain
a) 1(i %(iii ,(ii b) 1(ii %(iii ,(i c) 1(iii %(ii ,(i d) 1(iii %(i ,(ii View Answer Answer: c !planation: Anal'sis of difference between three AC parameterL bandwidth$ transient res ponse and slew rate. /ow a triangular wa#e generator is deri#ed from s-uare wa#e generator a) Connect oscillator at the output
b) Connect Voltage follower at the output c) Connect differential at the output d) Connect integrator at the output View Answer Answer: d !planation: "he output wa#eform of the integrator is triangular$ if its input is s-uare wa#e. "herefore$ a triangular wa#e generator can be obtained b' connecting an integrator at the output of the s-uare wa#e generator. %. "he increase in the fre-uenc' of triangular wa#e generator. a) ;amp the amplitude of triangular wa#e b) *ncrease the amplitude of triangular wa#e c) Decrease the amplitude of triangular wa#e d) one of the mentioned View Answer Answer: a !planation: As the resistor #alue increase or decrease$ the fre-uenc' of triangular wa#e will decrease or increase$ respecti#el'. "herefore$ the amplitude of the triangular wa#e decreases with an increase in it fre-uenc' and #ice #erse. ad#ertisements ,. &hich among the following op(amp is chosen for generating triangular wa#e of relati#el' higher fre-uenc' a) B91 op(amp b) B,01 op(amp c) B138 op(amp d) B,3,0 op(amp View Answer Answer: b !planation: "he fre-uenc' of the triangular wa#e generator is limited b' the slew rate of the op( amp. B,01 op(amp has a high slew rate. . &hat is the peaG to peaG 2) output amplitude of the triangular wa#e a) VO2pp) 6 V;amp 2( V;amp) b) VO2pp) 6 < V;amp 2 V;amp) c) VO2pp) 6 V;amp < 2( V;amp) d) VO2pp) 6 < V;amp < 2 V;amp) View Answer Answer: c !planation: "he peaG to peaG output wa#eform$ VO2pp) 6 V;amp(2(V;amp) &here$ < V;amp <= egati#e going ramp L V;amp <= positi#e going ramp.
3. Determine the output triangular wa#eform for the circuit.
View Answer Answer: b !planation: "he #oltage at which A1 switch from Vsat to (Vsat 6= (Vramp 62(; % N ; ,) 7 2Vsat)
6 2(10GMN0GM) 713# 6(,.93# Similarl'$ the #oltage at which A1 switch from (Vsat to Vsat 6= Vramp 6 2(; % N ; ,) 7 2(Vsat) 6 10GMN0GM 713# 6,.93# ∴ "ime period$ " 6 2; 1C1; %) N ; , 6 2710GM70.03U5710GM) N0GM 6 0.3 ms. 4. 5ind the capacitor #alue for a the output fre-uenc'$ f o 6 %G/+ F VO2pp) 6 9# $ in a triangular wa#e generator. "he op(amp is 138N91 and suppl' #oltage 6 K13#. 2"aGe internal resistor610GM) a) 0.0,n5 b) ,0n5 c) 0.,n5 d) ,n5 View Answer Answer: d !planation: @i#en$ Vsat 613# ∴ VO2pp) 6 2%; %N; ,) 7 Vsat 6= ; % 62VO2pp) 7; ,) N 2Vsat7%) 6 9N2%713)Q7; , 6 0.%,,; , ∵ *nternal resistor$ ; % 6 ; 16 10GM 6= ; , 6 0.%,,710GM 6 %.,,GM. So$ the output fre-uenc' f O 6 ; , N 2 7; 1 7C17 ; %) 6= %Gh+ 6 %.,,Gh+N 2710GM 710GM7C1) 6= C1 6 %.,,GM N 28710(11) 6 %. 710( ≅,n5. ad#ertisements 9. "riangular wa#e form has a) ;ise time T fall time b) ;ise time 6 fall time c) ;ise time fall time d) one of the mentioned View Answer Answer: b !planation: "he triangular wa#e form has rise time of the triangular wa#e alwa's e-ual to its fall time$ that is$ the same amount of time is re-uired for the triangular wa#e to swing from (V;amp to V;amp as from V;amp to (V;amp. 8. Output of an integrator producing wa#eforms of une-ual rise and fall time are called a) "riangular wa#eform b) Sawtooth wa#eform c) ulsating wa#eform d) SpiGed wa#eform View Answer
Answer: b !planation: Sawtooth wa#eform has une-ual rise and fall times. *t ma' rise positi#el' man' times faster than it falls negati#el' or #ice #ersa. . 5ind out the sawtooth wa#e generator from the following circuits.
View Answer Answer: c !planation: "he triangular wa#e generator can be con#erted into a sawtooth wa#e generator b' inserting a #ariable dc #oltage into the non(in#erting terminal of the integrator. 10. Consider the integrator used for generating sawtooth wa#e form. atch the list * with the list ** depending on the mo#ement of wiper. Bist(*
Bist(**
;ise time 6fall time 2"riangular wa#e)
Bonger fall time and short rise time 2Sawtooth wa#e)
Bonger rise time and short fall time 2Sawtooth wa#e)
a) 1(iii$%(ii$,(i b) 1(i $%(ii $,(iii c) 1(i$ %(iii$ ,(ii d) 1(ii $%(iii $,(i View Answer Answer: c !planation: Depending on the dut' c'cle 2mo#ement of the wiper) the t'pe of wa#eform is determined. &hich circuit is used for obtaining desired output wa#eform in operational amplifier a) Clipper b) Clamper c) eaG amplifier d) Sample and hold View Answer Answer: a !planation: *n an op(amp clipper circuits a rectifier diode is used to clip off certain portions of the input signal to obtain a designed output wa#eform. %. "he clipping le#el in op(amp is determined b' a) AC suppl' #oltage b) Control #oltage c) ;eference #oltage d) *nput #oltage View Answer
Answer: c !planation: "he clipping le#el is determined b' the reference #oltage which should be less than the input #oltage range of an op(amp. ad#ertisements ,. *n a positi#e clipper$ the diode conducts when a) Vin T Vref b) Vin 6 Vref c) Vin = Vref d) one of the mentioned View Answer Answer: b !planation:*n a positi#e clipper$ the diode conducts until V in 6 Vref 2during the positi#e half c'cle of the input)$ because when Vin T Vref $ the #oltage 2Vref ) at the negati#e input is higher than that at the positi#e input. . &hat happens if the potentiometer ; p is connected to negati#e suppl'
a) Output wa#eform below (Vref will be clipped off b) Output wa#eform abo#e Vref will be clipped off c) Output wa#eform abo#e (Vref will be clipped off d) Output wa#eform below Vref will be clipped off View Answer
3. 5ind the output wa#eform for when Vin T Vref
View Answer Answer: c !planation: "he negati#e portion of the output #oltage below (Vref is clipped off because$ diode will be in off condition when V in T Vref . 4. &hat happens if the input #oltage is higher than reference #oltage in a positi#e clipper a) Output #oltage 6 ;eference #oltage b) Output #oltage 6 DC ositi#e #oltage c) Output #oltage 6 *nput #oltage d) All of the mentioned View Answer
Answer: a !planation: &hen input #oltage is higher than reference #oltage$ the op(amp operates in open loop and diode become re#erse biased. "hus$ the output #oltage will be e-ual to reference #oltage. ad#ertisements 9. A positi#e small signal halfwa#e rectifier can a) ;ectif' signals with peaG #alue onl' b) ;ectif' signals with #alue of few milli#olts onl' c) ;ectif' signals with both peaG #alue and down to few milli#olts d) one of the mentioned View Answer Answer: c !planation: A positi#e small signal halfwa#e rectifier can rectif' signals with peaG #alues down to few milli#olts$ because the high open loop gain of the op(amp automaticall' adEusts the #oltage dri#e to the diode$ so that the rectified output peaG is the same as the input. 8. Determine the output wa#eform of negati#e small signal half wa#e rectifier.
View Answer Answer: d !planation: During the positi#e alteration of Vin$ D1 is re#erse biased. "herefore$ Vo 60#. On the other hand$ during the negati#e alteration$ D1 is forward biased and hence Vo follows Vin. . Diode in small signal positi#e halfwa#e rectifier circuit acts as a) *deal diode b) Clipper diode c) Clamper diode d) ;ectifier diode View Answer Answer: a !planation: "he diode acts as an ideal diode$ since the #oltage across the O diode is di#ided b' the open loop gain of the op(amp. As the input #oltage starts increasing in the positi#e direction$ the output of the op(amp also increases positi#el' till the diode become forward biased. 10. /ow to minimi+e the response time and increase the operating fre-uenc' range of the op( amp a) ositi#e halfwa#e rectifier with two diodes b) ositi#e halfwa#e rectifier with one diode c) egati#e halfwa#e rectifier with two diodes d) egati#e halfwa#e rectifier with one diode View Answer
Answer: c !planation: egati#e halfwa#e rectifier circuit with two diodes are used so that the output of the op(amp does not saturate. "hus$ minimi+es the response time and increases the operating fre-uenc' range. 11. &h' a #oltage follower stage is connected at the output of the negati#e small signal half wa#e rectifier a) Due to on(uniform input resistance b) Due to on(uniform output resistance c) Due to Iniform output #oltage d) one of the mentioned View Answer Answer: b !planation: "he output resistance of the circuit is non(uniform as it depends on the state of diode. "hat is$ the output impedance is low when diode is on and high when diode is off. 1%. A circuit with a predetermined dc le#el is added to the output #oltage of the op(amp is called a) Clamper b) ositi#e clipper c) /alfwa#e rectifier d) one of the mentioned View Answer Answer: a !planation: A clamper clamps the output to a desired dc le#el.
1,. Determine the output wa#eform for a peaG amplifier with input 6V psinewa#e and Vref 61V.
View Answer Answer: a !planation: *n a peaG amplifier the input wa#eform peaG is clamped at Vref . "he output #oltage Vo6%V pVref 62%7#)1# 6 #. 1. An op(amp clamper circuit is also referred as a) DC cutter b) DC inserter c) DC lifter d) DC le#eller View Answer Answer: b !planation: *n an op(amp clamper circuit$ a pre(determined dc le#el is deliberatel' inserted at the output #oltage. 5or this reason$ the clamper is sometimes called as DC inserter. 13. At what #alues of Ci and ; d a precision clamping can obtained in peaG clamper when the time period of the input wa#eform is 0.s a) Ci60.1U5 and ; d610GM b) Ci60.9U5 and ; d610GM
c) Ci6,,U5 and ; d610GM d) Ci6%.3U5 and ; d610GM View Answer Answer: a !planation: 5or precision clamping$ Ci and ; d TT "N%.So$20.1U5710 GM) TT 20.N%) 6 1710(, TT 0.%."herefore$ Ci60.1U5 and ; d610GM. Determine the time period of a monostable 333 multi#ibrator. a) "6 0.,,;C b) "6 1.1;C c) "6 ,;C d) "6 ;C View Answer Answer: b !planation: "he time period of a monostable 333 timer is " 6 ;C7ln21N,) 6 1.1.;C.
%. 5ind monostable #ibrator circuit using 333 timer.
View Answer Answer: a !planation: &hen 333 timer is configured in monostable operation$ the trigger input is applied through pin% whereas$ upper comparator threshold 2pin4) F discharge 2pin9) are shorted and connected at the output. ad#ertisements ,. /ow to o#ercome mistriggering on the positi#e pulse edges in the monostable circuit a) Connect a ;C networG at the input b) Connect an integrator at the input c) Connect a differentiator at the input d) Connect a diode at the input View Answer
Answer: c !planation: "o pre#ent the mistrigger on positi#e pulse edges$ a resister F capacitor combined of 10GM and 0.001U5 at the input to form a differentiator
"he circuit shows the differentiator to be connected between trigger input and the VCC. . A monostable multi#ibrator has ; 6 1%0GM and the time dela' " 6 1000ms$ calculate the #alue of C a) 0.U5 b) 1.,%U5 c) 9.3U5 d) %.U5 View Answer Answer: c !planation: "ime dela' for a monostable multi#ibrator$ " 6 1.1;C 6= C 6 "N21.1;) 6 1000msN21.171%0GM) 6 9.39U5. 3. &hich among the following can be used to detect the missing heart beat a) onostable multi#ibrator b) Astable multi#ibrator c) Schmitt trigger d) one of the mentioned View Answer Answer: a !planation: A monostable multi#ibrator can be used as a missing pulse detector b' connecting a transistor between trigger inputs. *f a pulse misses$ the discharge trigger input goes high F transistor become cut(off and the output goes low. So$ this t'pe of circuit can be used to detect missing heart beat. 4. A 333 timer in monostable application mode can be used for a) ulse position modulation b) 5re-uenc' shift Ge'ing c) Speed control and measurement d) Digital phase detector View Answer Answer: c !planation: *n monostable operation mode$ if input trigger pulses are generated from a rotating
wheel$ the circuit will determine the wheel speed whene#er it drops below a predetermined #alue. "herefore$ it can be used for speed control and measurement. ad#ertisements 9. /ow can a monostable multi#ibrator be modified into a linear ramp generator a) Connect a constant current source to trigger input b) Connect a constant current source to trigger output c) ;eplace resistor b' constant current source d) ;eplace capacitor b' constant current source View Answer Answer: c !planation: "he resistor ; of the monostable circuit is replaced b' a constant current source. So$ that the capacitor is charged linearl' and generates ramp signal. 8. Determine time period of linear ramp generator using the specifications ; 6 %.9GM$ ; 1 69GM $ ; % 100GM $ C6 0.1U5$ VCC 63#.
a) 8ms b) ms c) %ms d) 1ms View Answer Answer: d !planation: "he time period of the linear ramp generator$ "6 2%N,)72VCC7; )72; 1 ; %)7CQN R2; 17VCC)(V>72; 1; %)Q 6 R2%N,)73#7%.9GM72.9GM 100GM)Q720.1U5)NR29GM)73#Q(20.9)729GM100GM)Q 6="6 1,%.,N1,%.100 61.0013710(, 6 1ms.
. /ow does a monostable multi#ibrator used as fre-uenc' di#ider a) Ising s-uare wa#e generator b) Ising triangular wa#e generator c) Ising sawtooth wa#e generator d) Ising sine wa#e generator View Answer Answer: a !planation: onostable multi#ibrator can be used as a fre-uenc' di#ider when a continuousl' triggered monostable circuit is triggered using a s-uare wa#e generator. ro#ided the timing inter#al is adEusted to be longer than the period of triggering s-uare wa#e input signal. 10. &hat will be the output$ if a modulating input signal and continuous triggering signal are applied to pin3 and pin%% respecti#el' in the following circuit
a) 5re-uenc' modulated wa#e form b) ulse width modulated wa#e form c) >oth pulse and fre-uenc' modulated wa#e form d) one of the mentioned View Answer Answer: b !planation: On application of continuous trigger at pin%% and a modulated input signal at pin3$ a series of output pulses are obtained. "he duration of which depends on the modulating signal. Also in the pulse duration$ onl' the dut' c'cle #aries$ Geeping the fre-uenc' same as that of the continuous input pulse train trigger. &hich circuit can be used as a full wa#e rectifier a) Absolute #ale output circuit b) ositi#e clipper with two diodes
c) egati#e clipper with two diodes d) eaG clampers View Answer Answer: a !planation: Absolute #alue output circuit produces an output ou tput signal that swings positi#el' onl'$ regardless of the polarit' of the input signalL because of the nature of its output wa#e form$ the circuit is used as full wa#e rectifier. %. 5or the circuit shown below find the output #oltage
a) Vo 2) 6 10 # b) Vo 2) 6 1%# c) Vo 2) 6 9# d) one of the mentioned View Answer Answer: b !planation: "he #oltage at the terminal V 1 6 2V p (Vd1) N% V1 6 21%(0.9) N% 6 3.43 # 2Vd16 #oltage drop across diode60.9) Similarl'$ the #oltage at the negati#e terminal V% 6 2Vo (Vd, ) N% 6 2Vo < 0.9) N% Since Vid ≅ 0# $ ∴ V1 6 V% Vo 6 23.43 P% ) 0.9 6 1%#. ad#ertisements
,. Determine the output wa#eform for the circuit
&here input 6 % V p sine wa#e with time period 0.%ms.
View Answer . &hat is the alternate method to measure the #alues of non(sinusoidal wa#eform other than ac #oltmeter a) Clipper b) Clamper c) eaG detector d) Comparator View Answer Answer: c !planation: A con#entional ac #oltmeter is designed de signed to measure rms r ms #alue of the pure pur e sine wa#e whereas$ the peaG #alue of the non(sinusoidal wa#e forms can be a peaG detector.
3. State the condition needed to be satisfied b' peaG detector for proper operation of circuit. a) C; d _ "N10 and C; B 10" b) C; d _ 10" and C; B "N10 c) C; d "N10 and C; B _ 10" d) C; d 10" and C; B _ "N10 View Answer Answer: a !planation: 5or proper operation of the circuit$ charging and discharging time constant must satisf' the following: C; d _ "N10 and C; B to 10". ad#ertisements 4. "he resistor in the peaG detector are used to a) "o maintain proper operation b) rotect op(amp from damage c) "o get shaped non(sinusoidal wa#eform d) one of the mentioned View Answer Answer: b !planation: "he resistor is used to protect the op(amp against the e!cessi#e discharge current$ especiall' when the power suppl' is switched off. 9. /ow the reco#er' time of the op(amp is reduced a) Diode is connected at the output of amplifier b) Boad resistor c) 5orward biased diode resistor d) Discharge capacitor View Answer Answer: a !planation: "he diode connected at the output of op(amp conducts during negati#e half c'cle of input #oltage. /ence$ pre#ent the op(amp from going into negati#e saturation. "his in turn helps to reduce the reco#er' time of the op(amp.
8.how to detect the negati#e peaGs of input signals in the peaG detector gi#en below
a) ;e#ersing D1 diode b) ;e#ersing D1 and D% diodes c) ;e#ersing D% diode d) Charging the positions of D1 and D% View Answer Answer: b !planation: "he negati#e peaGs of the input signal Vin can be detected b' re#ersing diodes D1 and D%. . *n the sample and hold circuit$ the period during which the #oltage across capacitor is e-ual to input #oltage a) Sample period b) /old period c) Dela' period d) Charging period View Answer Answer: a !planation: "he time periods of the sample and hold control #oltage during which the #oltage across capacitor is e-ual to the input #oltage are called sample period. 10. During which period the op(amps output of sample and hold circuits is processed a) one of the mentioned b) Sample and hold period c) Sample period d) /old period View Answer Answer: d !planation: /old period is the period during which the #oltage across the capacitor is constant and the output of the op(amp is processed or obser#ed during hold periods.
11. &hich *C is mostl' preferred for sample and hold circuit a) U991 b) *C91 c) B5,8 d) U,31 View Answer Answer: c !planation: B5,8 ha#e significant reduction in si+e and impro#ed performance and re-uire onl' an e!ternal storage capacitor. 1%. Sample and hold circuit are used in a) Analog to Digital modulation b) Digital to analog modulation c) ulse position modulation d) All of the mentioned View Answer Answer: d !planation: All t'pes of modulation in#ol#e taGing samples of an input signal and hold on to it last sample #alue until the input is sampled. &hich circuit con#erts irregularl' shaped wa#eform to regular shaped wa#eforms a) Schmitt trigger b) Voltage limiter c) Comparator d) one of the mentioned View Answer Answer: a !planation: Schmitt trigger are also called as s-uaring circuit because$ this t'pe of circuit con#erts an irregularl' shaped wa#e to a s-uare wa#e or pulse.
%. Determine the upper and lower threshold #oltage
a) VI" 6 1.4,#$ VB"6 1.4,# b) VI" 6 (1.4,#$ VB"6 (1.4,# c) VI" 6 VB"6 K1.4,# d) one of the mentioned View Answer Answer: b !planation: Ipper threshold #oltage$ VI" 6 ; 1N2; 1 ; %)Q7 2Vsat) 6 10GMN210GM %30M)Q7213#)6 1.4,#. Bower threshold #oltage VB" 6 ; 1N2; 1 ; %)Q72 (Vsat) 6 10GM N210GM%30M)Q72(13#)6 (1.4,#. ad#ertisements ,. &hat happens if the threshold #oltages are made longer than the noise #oltages in schmitt trigger a) All the mentioned b) nhance the output signal c) ;educe the transition effect d) liminate false output transition View Answer Answer: d !planation: *n schmitt trigger$ if the threshold #oltage V I" and VB" are made larger than the input noise #oltage. "he positi#e feedbacG will eliminate the false output transition. . "o a schmitt trigger in non(in#erting configuration an input triangular wa#e of 1V p is applied. &hat will be the output wa#eform$ if the upper and lower threshold #oltages are 0.%3# a) S-uare wa#eform b) ulse wa#eform c) Sawtooth wa#eform d) Cannot be determined. View Answer
3. *n which configuration a dead band condition occurs in schmitt trigger a) Differential amplifier with positi#e feedbacG b) Voltage follower with positi#e feedbacG c) Comparator with positi#e feedbacG d) one of the mentioned View Answer Answer: c !planation: "he comparator with positi#e feedbacG is said to e!hibit h'steresis$ a dead band condition$ when the input of comparator e!ceeds upper threshold #oltage. At this condition$ output switch from Vsat to (Vsat. *t re#erts bacG to its original state$ Vsat when the input goes below lower threshold #oltage. 4. Calculate the h'steresis #oltage for the schmitt trigger from the gi#en specification: ; % 634GM $ ; 1 6 100M $Vref 6 0# F Vsat 6 K1#.
a) 0 m# b) %3 m# c) 30 m# d) (%3 m# View Answer Answer: c !planation: Ipper threshold #oltage$ VI" 6; 1N2; 1; %)Q72 Vsat) 6 100GMN234GM 100 M)Q721#)6 %3m#. Bower threshold #oltage VB" 6 ; 1N2; 1 ; %)Q72(Vsat) 6 100GM N234GM100M)Q72(1#)6 (%3 m#. ∴ /'steresis #oltage 6 VI"(VB" 6 %3(2(%3) 6 30m#. ad#ertisements 9. /ow to limit the output #oltage swing onl' to positi#e direction a) Combination of two +ener diodes b) Combination of +ener and rectifier diode c) All of the mentioned
d) Combination of two rectifier diodes View Answer Answer: b !planation: "o limit the output #oltage swing to positi#e or negati#e direction$ the basic op(amp comparator should be connected with a combination of +ener and rectifier diode in the feedbacG path. 8. 5or the circuit shown below$ obtain output wa#eform. Assume +ener #oltage to be .98# and #oltage drop across the forward biased +ener to be 0.9#.
View Answer . A basic op(amp circuit has a +ener and rectifier diode connected in the feedbacG path. Calculate the ma!imum positi#e #oltage. &here$ +ener #oltage 6 3.1 # and #oltage drop across
the forward biased +ener 6 0.9# a) VO6 3.8# b) VO6 .# c) VO6 .9# d) VO6 9.1# View Answer Answer: d !planation: *nitiall'$ rectifier diode will be re#erse biased and maGes the op(amp to operate in open loop configuration. So$ the output #oltage is obtained till the rectifier diode is forward bias and +ener goes into a#alanche condition. /ence$ the ma!imum positi#e output #oltage VO+ VD 2VD <= #oltage drop across rectifier diode). 6= VO6 3.1#0.9 #6 3.8#. &hat is >arGhausen criterion for oscillation a) A=1 b) AT1 c) A61 d) AZ1 View Answer Answer: c !planation: "he >arGhausen criterion for oscillation is A61. &here$ A(= gain of amplifier and (= transfer ratio. %. At what condition the output signal can be continuousl' obtained from input signal a) &hen the product of input #oltage and feedbacG #oltage is e-ual to 1 b) &hen the product of amplifier gain and transfer ratio is e-ual to 1 c) &hen the product of feedbacG #oltage and transfer ratio is e-ual to 1 d) &hen the product of amplifier gain and input #oltage is e-ual to 1 View Answer Answer: b !planation: &hen A61$ the feedbacG signal will be e-ual to the input signal. At this condition$ the circuit will continue to pro#ide output$ e#en if the e!ternal signal is disconnected. "his is because the amplifier cannot distinguish between e!ternal signal and signal from the feedbacG circuit. "hus$ output signal is continuousl' obtained. ad#ertisements ,. An oscillator is a t'pe of a) 5eedforward amplifier b) 5eedbacG amplifier c) &a#eform amplifier d) ;C amplifier View Answer
Answer: b !planation: An oscillation is a t'pe of feedbacG amplifier in which a part of output is fed bacG to the input #ia a feedbacG circuit. . 5ind the basic structure of feedbacG oscillator.
a)
b)
c) d) one of the mentioned View Answer Answer: c !planation: "he abo#e mentioned diagram is the basic structure of feedbacG oscillator. *t consists of an amplifier$ to the e!ternal input 2#i) is applied and it ha#e a feedbacG networG from which the feedbacG signal 2#f ) is obtained. 3. &hat is the condition to achie#e oscillations a) [A[61 b) ∠A60o c) ∠A6multiples of % d) All the mentioned View Answer
Answer: d !planation: All the conditions should be simultaneousl' satisfied to achie#e oscillations. 4. &hat happens if [A[T1 a) Oscillation will die down b) Oscillation will Geep on increasing c) Oscillation remains constant d) Oscillation fluctuates View Answer Answer: a !planation: *f [A[ becomes less than unit'$ the feedbacG signal goes on reducing in each feedbacG c'cle and oscillation will die down e#entuall'. ad#ertisements 9. /ow sustained oscillation can be achie#ed a) aintaining [A[ slightl' greater than unit' b) aintaining [A[ e-ual to unit' c) Due to non(linearit' of transistor d) Due to use of feedbacG networG View Answer Answer: c !planation: &hen [A[ is Gept slightl' greater than unit' the signal$ howe#er$ cannot go on increasing and get limited due to non(linearit' of the de#ice 2that is transistor enters into saturation). "hus$ it is the non(linearit' of the transistor because of which the sustained oscillation can be achie#ed. 8. &h' it is difficult to maintain >arGhausen condition for oscillation a) Due to #ariation in temperature b) Due to #ariation in suppl' #oltage c) Due to #ariation in components life time d) All of the mentioned View Answer Answer: d !planation: "he >arGhausen condition [A[61 is usuall' difficult to maintain in the circuit as the #alue of A and #ar' due to temperature #ariations$ aging of components$ change of suppl' #oltage etc. . ame the t'pe of noise signal present in the oscillation a) Schmitt noise b) SchottG' noise c) Saturation noise d) one of the mentioned View Answer
Answer: b !planation: SchottG' noise is the noise signal alwa's present at the input of the transistor due to #ariation in the carrier concentration. 10. A basic feedbacG oscillator is satisf'ing the >arGhausen criterion. *f the #alue is gi#en as 0.909%$ find the gain of basic amplifier a) %.1%14 b) 0.909% c) 1 d) 1.1 View Answer Answer: d !planation: >arGhausen criterion for oscillation is gi#en as A61 6= A61N 6 1N0.909% 6 1.1. 11. "he feedbacG signal of basic sine wa#e oscillator is gi#en as a) Vf 6 A 7Vo b) Vf 6 A 7Vi c) Vf 6 A 7 2VoN Vi) d) Vf 6 A 7 2ViN Vo) View Answer Answer: b !planation: "he feedbacG signal of an oscillator is gi#en as the product of e!ternal applied signal F the loop gain of the s'stem. 6= Vf 6 A 7Vi. 1%. !press the re-uirement for oscillation in polar form a) A 61∠,40o b) A 61∠0o c) A 61∠o d) A 61∠%90o View Answer Answer: a !planation: "here are two re-uirements for oscillation 1. "he magnitude of A61 %. "he total phase shift of A60o or ,40o. &hich is not considered as a linear #oltage regulator a) 5i!ed output #oltage regulator b) AdEustable output #oltage regulator c) Switching regulator
d) Special regulator View Answer Answer: c !planation: *n linear regulator?s the impedance of acti#e element ma' be continuousl' #aried to suppl' a desired current to the load. >ut in the switching regulator$ a switch is turned on and off. %. &hat is the dropout #oltage in a three terminal *C regulator a) [Vin[ [V o[%# b) [Vin[ T [Vo[(%# c) [V in[ 6 [Vo[ d) [Vin[ _ [Vo[ View Answer Answer: a !planation: "he unregulated input #oltage must be atleast %V more than the regulated output #oltage. 5or e!ample$ if Vo63V$ then Vin69V. ad#ertisements ,. "o get a ma!imum output current$ *C regulation are pro#ided with a) ;adiation source b) /eat sinG c) eaG detector d) one of the mentioned View Answer Answer: b !planation: "he load current ma' #ar' from 0 to rated ma!imum output current. "o maintain this condition$ the *C regulator is usuall' pro#ided with a heat sinGL otherwise it ma' not pro#ide the rated ma!imum output current.
. 5or the gi#en circuit$ let V>2O)61#$ 6 13 and *O6%mA. Calculate the load current
a) *B 6 %,.3A b) *B 6 4.,%A c) *B 6 34.89A d) *B 6 ,0.93A View Answer Answer: d !planation: "he e-uation for load current$ *B 6 21)*OQ(72V>2O)N; 1)Q62131)7%Q< 13721#N1% M)Q 6,%(1.%3 6,0.93A. 3. &hich t'pe of regulator is considered more efficient a) All of the mentioned b) Special regulator c) 5i!ed output regulator d) Switching regulator View Answer Answer: d !planation: "he switching element dissipates negligible power in either on or off state. "herefore$ the switching regulator is more efficient than the linear regulators. 4. State the reason for thermal shutdown of *C regulator a) SpiGes in temperature b) Decrease in temperature c) 5luctuation in temperature d) *ncrease in temperature View Answer
Answer: d !planation: "he *C regulator has a temperature sensor 2built(in) which turn off the *C$ when it becomes too hot 2usuall' 1%3oC(130oC). "he output current will drop and remains there until the *C has cooled significantl'. ad#ertisements 9. 5ind the difference between output current ha#ing a load of 100M and 1%0M for 9803 *C regulator. Consider the following specification: Voltage across the load 6 3#L Voltage across the internal resistor6 ,30m#. a) 8.mA b) 9mA c) mA d) ,.mA View Answer Answer: a !planation: @i#en the #oltage across the internal resistor to be ,30m#$ which is less than 0.9#. /ence the transistor in 9803 is off. &hen load 6 100M$ *B6 *O6 *i6 3#N100 M 6 30mA &hen load61%0M$ *O6 3#N1%0 M 6 1.4mA. So$ the difference between the output #oltage 6 30(1.4mA 6 8.mA. 8. "he change in output #oltage for the corresponding change in load current in a 9803 *C regulator is defined as a) All of the mentioned b) Bine regulation c) Boad regulation d) *nput regulation View Answer Answer: c !planation: Boad regulation is defined as the change in output #oltage for a change in load current and is also e!pressed in milli#olts or as a percentage of output #oltage. . An *C 980 regulator has an output current 6180mA and internal resistor 610M. 5ind the collector current in the output using the transistor specification: 613 and V>2O) 61.3#. a) %90mA b) 30mA c) 100mA d) 30mA View Answer Answer: b !planation: "he collector current from transistor$ *C6 *> &here$ *>6 *O(2V>2O)N; 1) 6 180mA(21.3#(10M) 6 0.0,A. "herefore$ *C6 1370.0, 6 0.3A 6 30mA.
10. /ow the a#erage temperature coefficient of output #oltage e!pressed in fi!ed #oltage regulator a) miili#oltsNoC b) miili#oltsoC c) one of the mentioned d) oCN miili#olts View Answer Answer: a !planation: "he temperature stabilit' or a#erage temperature coefficient of output #oltage$ is the change in the output #oltage per unit change in temperature and e!pressed in miili#oltsNoC. 11. *n the circuit gi#en below$ let V>2O)60.8# and 614. Calculate the output current coming from 9803 *C and collector current coming from transistor 1 for a load of 3M.
a) *O 6111mA$ *C6 808mA b) *O 6111mA$ *C6 8%mA c) *O 6111mA$ *C6 881mA d) *O 6111mA$ *C6 88mA View Answer Answer: d !planation: &hen load 6 3M$ * B6 3#N3M 61A. "he #oltage across ; 1 is 9M 7 1A69#. Since$ *B is more than 100mA$ the transistor 1 turns on and supplies the e!tra current re-uired. "herefore$ *B 621)*O(72V>2O)N; 1) *O 6 *BN21)Q 72V>2O)N; 1) 6 1N2141)Q14720.8N%M)Q ≅111mA. 6= *C6*B(*O61A(111mA 688mA. 1%. Calculate the output #oltage for B,1 regulator. "he current *AD is #er' small in the order of 100UA. 2Assume V;561.%3#)
a) 19.19# b) ,.%3# c) 8.,# d) %,.1%# View Answer Answer: a !planation: "he output #oltage$ VO 6V;5162; %N; 1)Q2*AD7; %)61.%3Vin7 12,GMN%0M)Q 2 100UA7,GM )6 14.893 0.,. 6= VO619.19#. 1,. Compute the input #oltage of 9803c #oltage regulator with a current source that will deli#er a 0.9%3A current to 43M$ 10w load. 2Assume reference #oltage 63#) a) Vin 6 8# b) Vin 6 ,# c) Vin 6 3# d) Vin 6 4# View Answer Answer: c !planation: VO6V;5VB 6V;52*B7; B) 6 3#20.9%3A743M) 6 3%.1%3# 6= *nput #oltage$ Vin 6 VO dropout #oltage 6 3%.1%3#%#. 6= Vin ≅3#. 1. &hich of the following is not a characteristic of adEustable #oltage regulators a) on(#ersatile b) >etter performance c) *ncreased reliabilit' d) one of the mentioned View Answer Answer: a !planation: AdEustable #oltage regulators are #ersatileL it has impro#ed o#er(load protection allowing greater output current o#er operating temperature range.
5ind out the resolution of 8 bit DACNADC a) 34% b) 4%3 c) %34 d) %43 View Answer Answer: c !planation: "he resolution is the #alue of BS> ;esolution 6%n$ where n(= number of bits ∴ ;esolution 6%86%34 possible output #alues. %. on(linearit' in the output of con#erter is e!pressed in a) one of the mentioned b) ercentage of reference #oltage c) ercentage of resolution d) ercentage of full scale #oltage View Answer Answer: d !planation: on(linearit' is the measure of de#iation of actual output 2j) from the ideal straight line output 2△). "herefore$ it is e!pressed as percentage of full scale #oltage 2jN△). ad#ertisements ,. A binar' input 000 is fed to a ,bit DACNADC. "he resultant output is 101. 5ind the t'pe of error a) Settling error b) @ain error c) Offset error d) Binearit' error View Answer Answer: c !planation: Offset error implies that the output of the DAC is not +ero when the binar' inputs are all +ero. . /ow man' e-ual inter#als are present in a 1(bit D(A con#erter a) 14,8, b) 03 c) 433,3 d) 10%, View Answer Answer: a !planation: A 1(bit D(A con#erter has %n(1 e-ual inter#al 6%1(1614,8(1614,8,.
3. ;esolution of a 4 bit DAC can be stated as a) All of the mentioned b) 4(bit resolution c) ;esolution of 1.348 of full scale d) ;esolution of 1 part in 4, View Answer Answer: a !planation: ;esolution of 4 bit DAC 6V5S N2%n(1) 62V5S7100)N2%4(1) 6 1.388 of V5S and the number of inter#al is %4(164,. 6= "hus$ resolution of a 4 bit DAC can be stated as a resolution of 1 part in 4,. 4. 5ind the resolution of a 10(bit AD con#erter for an input range of 10# a) 9.9m# b) .99m# c) 0.99m# d) 99m# View Answer Answer: b !planation: ;esolution 2in #olts) V5S N2%n (1)6 10 N2%10 (1) 610N10%, 6.99m#. ad#ertisements 9. A good con#erter e!hibits a linearit' error a) Bess than or e-ual to 21N%)BS> b) @reater than e-ual to 21N%)BS> c) @reater than or e-ual to 21N%)BS> d) one of the mentioned View Answer Answer: d !planation: A good con#erter e!hibits a linearit' error of less than K21N%)BS>. 8. "he ma!imum de#iation between actual and ideal con#erter output after the remo#al of error is a) Absolute accurac' b) ;elati#e accurac' c) ;elati#e Nabsolute accurac' d) Binearit' View Answer Answer: b !planation: ;elati#e accurac' is the ma!imum de#iation after gain and offset error has been remo#ed.
. A monotonic DAC is one whose analog output increases for a) Decreases in digital input b) An increases in analog input c) An increases in digital input d) Decreases in analog input View Answer Answer: c !planation: *n a DAC$ the analog input is con#erted into digital output. So$ a monotonic DAC increases its analog output with increase in its digital output. 5or e!ample$ if the output decreases when input code change from 001 to 010$ it is said to be a non(monotonic DAC. 10. All the commerciall' a#ailable DAC are a) onotonic b) on(monotonic c) ither monotonic or non(monotonic d) one of the mentioned View Answer Answer: a !planation: All the commerciall' a#ailable DACs are monotonic because the linearit' error ne#er e!ceeds K 21N%) BS> at each output le#el. 11. "he time taGen for the output to settle within a specified band of its final #alue is referred as a) Con#ersion time b) Settling time c) "aGe off time d) All of the mentioned View Answer Answer: b !planation: Settling time represents the time taGen for the output to settle within a specified band K 21N%) BS> of its final #alue following a code change at the input 2usuall' a full scale change).
At what condition the digital to analog con#ersion is made
a) Va = Vd b) Va _ Vd c) Va Vd d) Va Z Vd View Answer Answer: b !planation: &hen Va T Vd$ the output of the comparator becomes low and the AD gate is disabled. "his stops the counting at that time and the digital output of the counter represents the analog input #oltage. he *ntegrating t'pe con#erters are used in a) Digital meter b) anel meter c) onitoring s'stem d) All of the mentioned View Answer Answer: d !planation: "he *ntegrating t'pe con#erters are used in application such as digital meter$ panel meter and monitoring s'stem where the con#ersion accurac' is critical. . *n integrating t'pe ADCs$ the a) *nput #oltage is proportional to input a#eraged o#er the integration period b) Output #oltage is proportional to input a#eraged o#er the integration period c) Output #oltage is proportional to sum of input #oltage d) *nput #oltage is proportional to sum of input #oltage View Answer Answer: b !planation: Since the integrating t'pe ADC do not re-uire sample and hold circuit at the input.
"he change in input during con#ersion will not affect the output code and is proportional to the #alue of the input a#eraged o#er the integration period. 3. &hich t'pe of ADC is chosen for nois' en#ironment a) Successi#e appro!imation ADC b) Dual slope c) Charge balancing ADC d) All of the mentioned View Answer Answer: c !planation: "he main ad#antage of these con#erters is that it is possible to transmit fre-uenc' e#en in nois' en#ironment or in isolated form. ad#ertisements 4. /ow to o#ercome the drawbacG of the charge balancing ADC a) >' using precision integrator b) >' using Voltage to fre-uenc' con#erter c) >' using #oltage comparator d) >' using dual slope con#erter View Answer Answer: d !planation: Charge balancing ADC depend up on ;C product whose #alue cannot be easil' maintained with temperature and time. "his is eliminated using dual slope ADC as it is independent of ;$ C and ". 9. &hich among the following has long con#ersion time a) Ser#o con#erter b) Dual ramp con#erter c) 5lash con#erter d) one of the mentioned View Answer Answer: b !planation: "he main disad#antage of dual slope ADC is the long con#ersion time. 5or instance$ if %n("61N30 is used to reEect line picG(up$ the con#ersion time will be %0ms. 8. *n which application dual slop con#erter are used. a) "hermocouple b) All of the mentioned c) &eighting scale d) Digital panel meter View Answer
Answer: b !planation: Dual slope con#erters are particularl' suitable for accurate measurement of slow #ar'ing signals. . A dual slope has the following specifications: 14bit counterL ClocG rate 6 /+L *nput #oltage61%#L Output #oltage 6(9# and Capacitor60.9U5. *f the counters ha#e c'cled through %n counts$ determine the #alue of resistor in the integrator. a) 40GM b) 30GM c) 1%0GM d) 100GM View Answer 10. A 1% bit dual ramp generation has a ma!imum output #oltage of 1%#. Compute the e-ui#alent digital number for the analog signal of 4#. a) 1000000000 b) 10000000000 c) 1000000000000 d) 100000000000 View Answer Answer: d !planation: since Va 6V; 2N%n) so the digital count 6 %n72VaNV; ) 6 %1%724N1%#) 6 0470.3 6%08. >inar' e-ui#alent for %08 6= 100000000000. 5or the gi#en circuit find the output #oltage
a) (3.4%3# b) (,.30# c) (.,93# d) (,.1%3# View Answer
%. &hich t'pe of switches are not preferable for a simple weighted resistor DAC a) >ipolar "ransistor b) Voltage switches c) OS5" d) All of the mentioned View Answer Answer: a !planation: >ipolar transistor does not perform well as #oltage switches and OS5"$ due to the inherent offset #oltage when in saturation. ad#ertisements ,. "he in#erted ;(%; ladder can also be operated in a) *n#erted mode b) Current ode c) Voltage mode d) on in#erted mode View Answer Answer: b !planation: "he in#erted mode ;(%; ladder circuit worGs on the principle of summing current. "herefore$ it is said to operate in current mode. . &hich of among the following circuit is considered to be linear a) &eighted ;esistor t'pe DAC b) ;(%; ladder t'pe DAC c) *n#erter ;(%; ladder DAC d) All of the mentioned View Answer 3. ultipl'ing DAC uses a) Var'ing reference #oltage b) Var'ing input #oltage c) Constant reference #oltage d) Constant input #oltage View Answer Answer: a !planation: A digital to analog con#erter which uses a #ar'ing reference #oltage is called a multipl'ing D(A con#erter. 4. Calculate the #alue of BS> and S> of a 1%(bit DAC for 10# a) BS> 69.8m#$ S> 63# b) BS> 6.,m#$ S> 63# c) BS> 61.,m#$ S> 63#
d) BS> 6%.m#$ S> 63# View Answer Answer: d !planation: BS>61N%n61N%1%61N04. 5or 10# range$ BS> 610#N046%.m# and S> 6 21N%)7full scale 621N%)710# 63#. ad#ertisements 9. A multipl'ing DAC is gi#en a reference #oltage V; 6 Vom cos%ft. Determine the output #oltage a) Vo2t) 6 Vom sin2%ft180o) b) Vo2t) 6 Vom cos2%ft180o) c) Vo2t) 6 Vom tan2%ft180o) d) Vo2t) 6 Vom sec2%ft180o) View Answer Answer: b !planation: Vo2t) 6 Vom cos%ft180o. "he 180o phase shift is added$ since the V; is connected to in#erting input terminal and Vom 6 0# to 21(%(n)7Vim depends on the input code. 8. ultipl'ing digital to analog con#erters are used in a) All of the mentioned b) Digitall' programmable filter c) Digitall' programmable oscillator d) Digitall' controlled audio attenuator View Answer Answer: d !planation: *n multipl'ing DAC$ the output #oltage is a fraction of the #oltage representing the input digital code and the attenuator setting can be controlled b' digital logic. . A 10(bit DNA con#erter ha#e an output range from 0(#. Calculate the output #oltage produced when the input binar' number is 1110001010. a) K9.4# b) (9.4# c) 9.4# d) one of the mentioned View Answer Answer: c !planation: Vo6#2171N%) 2171N%%) 2171N%,)2071N%)2071N%3) 2071N%4)2171N%9)2071N%8)2171N%)2 071N%10)Q 6#720.30.%300.1%39.81%3710(,1.3 710(,) 6#70.839 69.4#. 10. "he basic step of a 8(bit DAC is 1%.m#.*f the binar' input 00000000 represents 0#. Determine the output$ if the input is 101101111
a) 1.,4# b) %.%9# c) 3.3# d) one of the mentioned View Answer Answer: b !planation: "he output #oltage for input 10110111 6 1%.m# 7217%9)207%4) 217%3) 217%) 207%,) 217%%) 217%1) 217%0)Q 6 1%.7 21%8,%14%1) 61%.m#718,6%.%9#. . !press the output #oltage of digital to analog con#erter a) Vo 6V5S2d1%(1d%%(%k.dn%(n) b) Vo 6V5SNG2d1%(1d%%(%k.dn%(n) c) Vo 6V5S2d1%(1d%%(%k.dn%(n) d) Vo 62d1%(1d%%(%k.dn%(n) View Answer Answer: a !planation: "he input is an n(bit binar' word D and is combined with the reference #oltage V; to gi#e on analog output signal. athematicall' it is described as Vo 6V5S2d1%(1d%%(%k.dn%(n) where$ (scaling factor$ V5S(full scale output #oltage. %. &h' the switches used in weighted resistor DAC are of single pole double throw 2SD") t'pe a) "o connect the resistance to reference #oltage b) "o connect the resistance to ground c) "o connect the resistance to either reference #oltage or ground d) "o connect the resistance to output View Answer Answer: c !planation: SD" are electronic switches controlled b' a binar' word. *f the binar' input to a switch is 1$ it connects the resistance to the reference #oltage and if the input is 0$ the switch connects the resistor to ground. ad#ertisements ,. Determine the output current for an n(bit weighted resistor DAC a) 2V; N; )7 2doN% d1N%% kkdnN%n) b) 2V; N; )7 2d1N%1 d%N%% kkdnN%n) c) 2V; N; )7 2d0%N% d1%N%% kkdn%N%n) d) one of the mentioned View Answer Answer: b !planation: "he output current$ *o6 *1*%k.*n
*o6 2V; N%; )72d1) 2V; N%%;)7 2d%) k.2V; N%n; )72dn) *o 62V; N;)7 2d1N%1 d%N%% kkdnN%n). . *n a D(A con#erter with binar' weighted resistor$ a desired step si+e can be obtained b' a) Selecting proper #alue of V5S b) Selecting proper #alue of ; c) Selecting proper #alue of ; 5 d) All of the mentioned View Answer Answer: c !planation: "he si+e of the steps depends on the #alue of ; 5$ pro#ided that the ma!imum output #oltage does not e!ceed the saturation le#el of an op(amp. 3. Determine the 5ull scale output in a 8(bit DAC for 0(13# range a) 5ull scale output613.1# b) 5ull scale output613.%# c) 5ull scale output61.3# d) 5ull scale output61.# View Answer Answer: d !planation: 5ull scale output 6 25ull scale #oltage (BS>) 6 13#(213#N%8)Q 6 213#(0.0384) 6 1.#. ad#ertisements 4. icG out the incorrect statement X*n a , bit weighted resistor DACY a) Although the op(amp is connected in in#erting mode$ it can also be connected in non(in#erting mode b) "he op(amp simpl' worG as a current to #oltage con#erter c) "he polarit' of the reference #oltage is chosen in accordance with the input #oltage d) one of the mentioned View Answer Answer: c !planation: "he polarit' of the reference #oltage is accordance with the t'pe of the switch used. 5or e!ample$ in ""B switches$ the reference #oltage should be 3# and the output will be negati#e. 9. &hat is the disad#antage of binar' weighted t'pe DAC a) ;e-uire wide range of resistors b) /igh operating fre-uenc' c) /igh power consumption d) Slow switching View Answer
Answer: a !planation: 5or better resolution of output$ the input binar' word length has to be increased. As the number of bit increases$ the range of resistance #alue increases. 8. "he smallest resistor in a 1% bit weighted resistor DAC is %.3GM$ what will be the largest resistor #alue a) 0.4M b) 10.%M c) 41. M d) 18.,M View Answer Answer: b !planation: "he largest resistor #alue for 1%(bit DAC6 %n7; 6 %1%7%.3GM 6 047%.3GM 610.%M. . COS in#erter is used as SD" switch in resistor DAC and is connected to the op(amp line. 5ind the output of COS$ if the input applied is 1 a) ;esistance is connected to ground b) ;esistance is connected to input line c) ;esistance is connected to bit line d) one of the mentioned View Answer 10. /ow to o#ercome the limitation of binar' weighted resistor t'pe DAC a) Ising ;(%; ladder t'pe DAC b) ultipl'ing DACs c) Ising monolithic DAC d) Ising h'brid DAC View Answer Answer: a !planation: Isage wide range of resistors is the limitation of binar' weighted resistor t'pe DAC$ this can be a#oided b' using ;(%; ladder t'pe DAC &here onl' two #alue of resistor are re-uired. 11. 5ind output #oltage e-uation for , bit DAC con#erter with ; and %; resistor a) Vo6 (; 5 2b%N8;) 2b1N;) 2b0N%;)Q b) Vo6 (; 5 2b%N;) 2b1N%;) 2b0N;)Q c) Vo6 (; 5 2b%N%;)2b1N;) 2b0N8;)Q d) Vo6 (; 5 2b0N;)2b1N%;) 2b%N;)Q View Answer Answer: c !planation: "he output #oltage corresponding to all possible combination of binar' input in a ,(
