Lecture 1 - Multiplexer, ROM,PLA and PAL

DIGITAL SYSTEM DESIGN

SATI SA TISH SH KAS KASHYAP HYAP.. B

www.satishkashyap.com

Design : Quad Multiplexer with Bus inputs and outputs

A 16 to 1 Multiplexer Implementation

4

- variable ariable function function using using 8:1 8:1 MUX MUX

4

- variable ariable function function using using 4:1 MUX

4

- variable ariable function function using using 2:1 2:1 MUX MUX

Design a 3 bit BCD to Gray code converter  BCD

GRAY

x1

x2

x3

z1

z2

z3

0

0

0

0

0

0

0

0

1

0

0

1

0

1

0

0

1

1

0

1

1

0

1

0

1

0

0

1

1

0

1

0

1

1

1

1

1

1

0

1

0

1

1

1

1

1

0

0

Design a 3 bit BCD to Gray code converter 

Generate a sequence of four binary waveforms using ROM

Design a 7 Segment Display using ROM

Design a Binary to ASCII code converter using ROM

Designing Multiple Output Combinational Combinational Circuit using PLA

Design the following using PLA

Design 3 bit BCD to Gray code converter using PLA BCD

GRAY

x1

x2

x3

z1

z2

z3

0

0

0

0

0

0

0

0

1

0

0

1

0

1

0

0

1

1

0

1

1

0

1

0

1

0

0

1

1

0

1

0

1

1

1

1

1

1

0

1

0

1

1

1

1

1

0

0

Practical Design

Full

Adder implementation using PAL

Part of Logic Diagram for 16R 4 PAL PAL