1015CX_Cedar 1015CX_Ce dar Trail Platform Introduction Introduction
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Agenda 1 Cedar Trail Overview 2 Cedar Trail Trail framework framework Introduction 3 Pineview vs. Cedarview Component Comparison 4 ACPI Power State 5 DRAM & PCB ID ID introduc introducee 6 Cedar Trail Platform Power 7 Cedar Trail Power Sequence 8 Component Pin State at Boot Boot a.CPU .CPU b b.PCH .PCH c.Clock Gen d.EC. .EC.ee.Vcore &VGFX f .RT8206A .RT8206A ,g ,g.charger25RGRR 9 LAN---AR8152-BL 10 Display Pin State at Boot 11 Audio---ALC269Q-VB5-GR Pin State at Boot 12 Carder Reader---AU6437B52-GDL-GR Pin State at Boot 13 Common BUG Circuit and solution 14 Debug flowchart for power issue 15 Instance 16 QA
Cedar Trail Overview Cedar Trail
will replace the Pine Trail?This Trail?This new series will be based on the t he 32nm fabrication process, just process, just like Sandy Bridge. Bridge. This helps drop the power consumption and you have the liberty to bump up the clock speeds. It will still be using the older NM10 chipset, but with added features like Intel Rapid Start Technology Technology for faster f aster system resume times, times, onboard GPU that now supports 1080p video decoding, support for Display Port and HDMI 1.3a and finally DDR3 memory support up to 4GB
Cedar Trail Trail framework Introduction 100M
100M 33M
24M
Peripheral Component 100M Interconnect Express 100M
48M 25M
100M
ACPI Power State
G0/S0:Full on G1/S3:Suspend to RAM ----The system context is maintained in system DRAM, but power is shut off ton on-critical circuits. Memory Memory is retained retained,, and refreshes continue. All clocks stop except RTC clock. G1/S4:Suspend to Disk ----The context of the system is maintained on the disk. All power is then shut off to the system except for the logic required to resume. G2/S5:Soft off ----System context is not maintained. All power is shut off except ex cept for the logic required to restart. A full boot is required when waking. G3:Mechanical off ----power failure Because the system does not have any power.
3 DRAM & PCB ID introduce
Cedar Trail Platform Power Ad A dapter
1.A/D_DOCK_IN 2? A C _B AT_S AT _S Y S BQ24725RGRR
4(d).+5VA
a.BAT B atte tter y
RT8206AG 8.(i)+5VSUS 3 .A QW C 6(f).P_+3VA_+5VA_EN_10 _ 8(i).+3VSUS O K 7(h).VSUS_ON
b . B A T _ I N
9(j).VSUS_PWRGD
g .P W R _S W
7(h).VSUS_ON 4(d).+5VA A P L 5325
A C _B AT_S AT _S Y S NB63 NB637EL \N-MOS FE T
VSUS_ON
+1.5V_DIMM S US C _ON _O N
9(j).VSUS_PWRGD 5(e). 5( e).+3VA +3VA
E MB 20N03 20N03---\ ---\NN MOS F E T
+1.5V
Cedar Trail Platform Power
+5VSUS
PQ9108
VSUS_ON
+5V_PCH
+5VS +1.5V
+5VSUS
RT9045GSP
+VTTDDR
+5VS EMB20N03
S US B _ON _O N
+5VS_USB A C _B AT_S AT _S Y S
+3VSUS EMB20N03
+3VS
S US B _ON _O N
S US B _ON _O N +1.5V
+1.5VS EMB20N03
S US B _ON _O N
1.5VS_PWRGD
+3VSUS VCOREPWRGD
+3VSUS EMB20N03
NB637EL
+VCCP
V C C P _ P W R G D +1.8VS EMB20N03 1.8VS_PWRGD
+3VS_PRIME
Power sequence-AC illustration 29.+3VS_PRIME
25.+VCORE
2.A/D_DOCK_IN
26.+VGFX 26.+VGFX 24(a).1.8VS
PD9101& PU9101 24(b).1.8VS_PWRGD 24.+VCCP_PWRGD 1.RTCRST#
3 3 . H _ P W R G D
3 5 . C P U _ R S T #
K O R W P _ M P . 2 3
CLOCK
30.VRM_PWRGD
29.+3VS_PRIME
AN A ND 9.EC_RSMRST# 11.PWR_SW# 2 9 4.AC_OK=1 ( b ) . 30.VRM_PWRGD D5503 1 . 8 V S _ P 4.+3VA_EC 4.+3VA_EC W
4.+3VA
APL5325
4 . + 5 V A
29.+3VS_PRIM
5.VSUS_ON
30.VRM_PWRGD
8.VSUS_PWRGD
3 . A C _ B A T _ S Y S
1 1 . P W R _ B T N #
1 2 . P M _ S U S C #
1 3 . P M _ S U S B #
3 4 . P C I _ R S T #
D5502 3 1 . E C _ P W R O K
7 . + 5 V _ P C H
6.+3VSUS&+5VSUS 5.VSUS_ON
2 2 5 6 . + . + V V C G O F R X E
8.VSUS_PWRGD 15.+1.5V_DIMM
14.DEEP_STANDBY NB637EL 16.SUSC_ON
MB B 20 20N N 03 18.SUSB_ON M
23.+VCCP 23.+VCCP 24.+VCCP_PWRGD 17.+1.5V&5V&3V 19.+5VS&+3VS
2 7 . 2 V C 8 . O V G R F E X _ _ P P W W R R G G D D
Power sequence-DC illustration 28.+3VS_PRIME
24.+VCORE
1.BAT
25.+VGFX 25.+VGFX 23(a).1.8VS
PD9101& PU9101 23(b).1.8VS_PWRGD 23.+VCCP_PWRGD 0.RTCRST#
3 2 . H _ P W R G D
3 5 . C P U _ R S T #
K O R W P _ M P . 1 3
CLOCK
29.VRM_PWRGD
AN A ND 9.EC_RSMRST#
2 7 .V G F X _ P W
2 8 ( b ) . 1 . D5503 8 V S _ P W
4.PWR_SW#
4 . P W R _ B T N #
1 1 . P M _ S U S C #
1 2 . P M _ S U S B #
3 3 . P C I _ R S T #
D5502 3 0 . E C _ P W R O K
7 . + 5 V _ P C H
6.+3VSUS&+5VSUS 5.VSUS_ON
3.+3VA_EC 3.+3VA_EC
APL5325
3 . + 5 V A
28.+3VS_PRIM
13.DEEP_STANDBY NB637EL 15.SUSC_ON
2 2 4 5 . + . + V V C G O F R X E
8.VSUS_PWRGD
1.BAT_IN=1 29.VRM_PWRGD
3.+3VA
5.VSUS_ON
29.VRM_PWRGD
8.VSUS_PWRGD
2 . A C _ B A T _ S Y S
14.+1.5V_DIMM 22.+VCCP 22.+VCCP 23.+VCCP_PWRGD 16.+1.5V&5V&3V
MB B 20 20N N 03 18.+5VS&+3VS 17.SUSB_ON M
2 6 . 2 V C 7 . O V G R E F _ X P _ W P R W G R D G D
1015CX Power System----CPU Voltage-1
1015CX Power System----CPU Voltage-2
P1
P4
P7
P2
P5
P8
P3
P6
P9
P10
P13
P11
P14
p12
P15
P16
P17
Memory Voltage
+1.5V_DIMM
1.5V
RST_GATE_G
5V
D3_DRAMRST#
1.5V
D3_VREFCA
750mV-840mV
D3_VREFDQ
750mV-840mV
+VTTDDR
750mV-840mV
1015CX Power Sys System----PCH tem----PCH
P2
P5
P3
P6
P4
P7
1015CX Clock System
CLOCK GEN Check a key
P1
P4
P2
P5
P3
P6
P7
EC Introduce
EC Check a key
EC Pin State at Boot Voltage Signal waveform
C_LPC_EC
33MHZ P3
O_CHG_LED_GREEN# 3.4V
PM_BATLOW#
3.4V
O_K_XCLKI
32.768Khz
O_KBRST#
3.4V
G_BACKOFF#
3.4V
O_K_XCLKO
32.768Khz
O_KBC_SCI#
3.4V
THRO_CPU
F_SERIRQ
3.4V
A20GATE
3.4V
SUSC_ON
3.4V
S_PCIRST#
3.4V
VSUS_ON
3.4V
O_EC_RST#
3.4V
CPU_VRON
3.4V
F_LFRAME#
P1 P2
C_PCI_DEBUG 33Mhz P3
P1
+3VA_AEC
3.4V
SMB0_CLK
X
SUSB_ON
3.4V
AC_OK
3.4V
SMB0_DAT
X
EC_PWROK
3.4V
PS-ON
3.4V
P3
P2
X
EXTSMI#
3.4V
CHG_EN#
3.4V
O_LID_EC#
3.4V
SPI_WP#
3.4V
DS_LEVELDOWN#
3.4V
RST_GATE
5V
O_CHG_LED_ORANGE 3.4V
PWR_SW_EC#
3.4V
O_PWR_LED_UP
3.4V
EC_RSMRST#
3.4V
VSUS_PWRGD
3.4V
AD_MAX_PW1
3.4V
VRM_PWRGD
3.4V
PM_LEVELDOWN#
3.4V
PM_SUSB#
3.4V
O_FAN0_TACH
3.4V
PM_SUSC#
3.4V
O_FAN0_PWM
X
CPU_LEVELDOWN#
3.4V
PM_PWRBTN#
3.4V
H_PROCHOT#
1.1V
BAT_LEARN A_OP_SD#
X 3.4V
BAT_IN
X
The basic basic principle principle of DC-DC switching circuit is to regulate the output voltage value by controlling the duty cycle.
Vout=Ton/(Ton+Toff)*Vin
Duty cycle=V cycle=Vout/Vin out/Vin Ton
H-S Turn-on Turn-on time
Toff L-S Turn-on Turn-on time
Vdriver+Vboot
Toff
UGATE: Ton
Vdriver
LGATE: Vin Swi wittching advantages compared to Linear 1.Output voltage can be lower
PHASE:
2. High conversion efficiency
Vout:
Vcore&VGFX Check a key
Vcore&VGFX Check a key
Vcore&VGFX Check a key
Vcore&VGFX Check a key
Vcore&VGFX Pin State at Boot P_VCORE_TONSET_10
1V
P_TSENA_10
1V
P_VCORE_CSP1_10
1V
P_OCSETA_10
2.04V
P_VCORE_CSN1_10
1V
P_IBIAS_10
2.28V
P_VCORE_COMP_10
1V
H_PROCHOT#
1V
P_VCORE_FB_10
1V
P_VR_READY_10
1V
VCORE_SENSE-_10
X
VGFX_PWRGD
3.5V
P_VCORE_GFXPS2_10
X
SVID_ALERT#
1V
P_VCORE_VCC_20
5V
SVID_DATA
1V
P_SETINIA_10
5V
SVID_CLK
1V
P_SETINI_10
5V
VGFX_SENSE-_10
X
P_TMPMAX_10
2V
P_VGFX_FBA_10
1V
P_ICCMAX_10
X
P_VGFX_COMPA_10
1V
P_ICCMAXA_10
X
P_VGFX_CSN1_10
1V
P_TSEN_10
1V
P_VGFX_CSP1_10
1V
P_VGFX_TONSETA_10
1V
P_VGFX_EN_10
3.5V
P_VCORE_PVCC_20
5V
P_VCORE_TONSET_R_10
5V
P_OCSET_20
Voltage waveform
760mV
P_VGFX_UG_20
9.9V
P3
P_VGFX_PHASE_20
5V
P4
P_VGFX_LG_20 P_VGFX_BOOST_20
5V 9.9V
P5 P2
P_VCORE_BOOT_20
9.9V
P1
P_VCORE_LG_20
5V
P5
P_VCORE_PHASE_20
5V
P6
P_VCORE_UG_20
10V
P7
P2
P5
P3
P6
P4
P7
+3VSUS&+5VSUS Check a key
RT8206AGQW Pin State at Boot Voltage P_+3VSUS_+5VSUS_REF_10 P_+3VA_+5VA_EN_10 P_+5VSUS_O_10 P_+5VSUS_FB_10 P_+5VSUS_ILIM_10 VSUS_PWRGD P_+5VSUS_EN_10 P_SUS_SECFB_10 P_+3VSUS_EN_10 VSUS_PWRGD P_+3VSUS_+5VSUS_SKIPSEL_10 P_+3VSUS_O_10 P_+3VSUS_ILIM_10 P_+3VSUS_FB_10 P_AC_APR_UC_10 MARATHON# MARATHON_EC# PWR_SW# PWR_SW_EC# P_+3VA_+5VA_EN_ P_+5VSUS_UG_20 P_+5VSUS_PHASE_20 P_+5VSUS_BOOT_20 P_+5VSUS_LG_20 P_+3VSUS_LG_20 P_+3VSUS_BOOT_20 P_+3VSUS_PHASE_20 P_+3VSUS_UG_20
2.2V 19V 5V 2.1V 2.1V 3.3V 3.3V 2.3V 3.3V 3.3V 1.92V-2V 3.3V 2V 2V-2.1V 10V 3.3V 3.3V 3.3V 3.3V 18.3V P1 P2 P3 P4 P5 P6 P7 P8
P1
P5
P2
P6
P3
P4
P7
P8
Changer Charger
BQ24725RGRR
NO Battery BA BATTERY TTERY IN
Charger
P_CHG_ACN_10
19V
19V
P_CHG_ACP_10
19V
19V
P_CHG_CMSRC_10
19V
19V
P_CHG_ACDRV_10 P_CHG_ACDR V_10
24.6V
24.6V
P_CHG_ACOK_10
3V-3.3V 3V -3.3V
3V-3.3V 3V -3.3V
P_CHG_ACDET_10
2.6V
2.6V
P_CHG_IOUT_10
X
X
P_CHG_SDA_10
X
P1
P_CHG_SCL_10
X
P2
J6003
P_CHG_ILIM_10
640mV
X
pin1
x
X
P_BAT_GATE P_BA T_GATE
3V-3.3V
11V
pin2
x
X
pin3
3.3V
X
pin4
x
3.3V
pin5
x
3.3V
Voltage
P1
waveform
P3
NO Battery
BATTERY BA TTERY IN
P_CHG_SRN_10
3V-3.3V 3V -3.3V
P_CHG_SRP_10
3V-3.3V 3V -3.3V
P_CHG_LODRV_20 P_CHG_LODRV_20
X
P3
pin6
x
X
P_CHG_REGN_20
5V
5V
pin7
x
X
P_CHG_BTST_20
5V
P4(25.6V)
pin8
1.1V
11V
pin9
1.1V
11V
BAT_IN BA T_IN
X
3.3V
PS-ON
3.3V
3.3V
P_CHG_HIDRV_20 P_CHG_PHASE_20
3V-3.3V 3V-3.3V
11V 11V
P4 P5(19.8V)
P2
P4
P5
BIOS Pin State at Boot
Voltage Signal waveform
P1
P2
Pin1
SPI_CS#
4.5V
P1
Pin2
SPI_DO
3.4V
Pin3
SPI_WP#
3.4V
Pin4
GND
Pin5
SPI_DI
4.5V
P3
Pin6
SPI_CLK
2.4V
P4
Pin7
SPI_HOLD#
3.4V
Pin8
+3VA_SPI +3V A_SPI
3.4V
P2
P3
P4
x
PL8001&PL8003&PL8400&PL8301 Pin State at Boot P_VCCP_PHASE_S
P_1.5V_PHASE_S
P_VCORE_PHASE_S
P_VGFX_PHASE_S
PL8100&PL8101 Pin State at Boot P_+3VSUS_PHASE_S
P_+5VSUS_PHASE_S
LAN Pin State at Boot Voltage Signal waveform
+3V_LAN
3.3V
VDDCT_REG
1.84V
+AVDD_CEN_LAN
1.84V
+AVDDL
1.24V
+AVDDH
2.7V
+DVDDL
1.2V
C_PCIE_LAN
100Mhz P1
C_PCIE_LAN#
100Mhz P1
LX
X
PLT_RST#
3.3V
PCIE_WAKE#
3.3V
L_REQ#_LAN
X
P1
P1
LVDS CON Pin State State
Voltage Signal
P2
waveform
PIN1
19V
PIN2
19V
PIN3
3.4V
PIN4
X
PIN5
P1
PIN6
P1
PIN7
X
PIN8
P1
PIN9
P1
PIN10 P2 PIN11
P3
PIN12 P2 PIN13 P3
PIN1
PIN14 X PIN15 3.4V PIN16 X PIN17 3.4V PIN18 3.4V PIN19 3.4V
P3
Display P16
P16 P16 P16 X 3.4v P16 P17
3.4v 3.4v
Audio---ALC269Q-VB5-GR A_OP_SD#=3.4V
X P1-24M X P2-48K 3.4v
P1
P2
Carder Reader---AU6437B52-GDL-GR
Debug flowchart for power issue
Debug flowchart for power issue Power turn on
Y N
N
S US C _ON
+1.5V(DDR) Y N N
S US B _ON
+VGA_CORE
Y N
N
N
AC_BAT_SYS
Device short to GND N
Repair flow
Y N +5VA
N
x
Y
PWR Control IC Damage
+3VA
N N
VSUS_ON
PWR Control IC /MOS Damage
N +3VA_EC N
EC Damage
Y N PM_SUSC#
PWR_BTN# OR . PM_SUSB#
N IC/MOS Damage /PCH
Y N
PWR_BTN# OR .DEEP_STANDBY
PM_SUSB#
N
IC/MOS Damage /PCH
Y N .CPU_VRON
+5VS&+3VS /+1.5VS_PWRGD
N
IC/MOS Damage /EC
EX1 Adapter light point flashing AC light flashing flashing
AC_BAT_SYS
Battery
PWR short to GND
Device short to GND NB,SB to GND
N
Device short to GND
Plug in AC
AC light point flashing
N
Device short to GND
Y
N
PWR short to GND
Measure Power rail H-s& L-s MOS
Exchnge damage H-s& L-s MOS
Remove +3VAO-> +3VA ,+5 ,+5V VAO +3VA JP point
Sequence To connect JP
N Exchnge PWR IC
Y
EC short to GND
EX2 +3VSUS,+5VSUS +3VSUS,+5V SUS No voltage AC
N
N Remove+3VAO-> +3VA JP
+3VA Y
Y N
VSUS_ON Y N Measure MOS OK Y
IC Damage
+3VA
Exchange MOS
EC Damage
RT8206 Damage
EX3 NB can not charger Battery OK or not
N
Have VSET_EC And ISET_EC
EC Damage
Y
N
MOS ok or not
Y
Exchange IC
Exchanger MOS
EX4 VCORE No voltage Other power ok
N
EC Damage
CPU_VRON Y N Measure MOS OK Y
IC Damage
Exchange MOS
QA 1How to check EC and BIOS are ok? If EC or Bios don d on work, how to do determine is EC fail or need flash bios? A: EC (1)Check EC +3VA have or not. (2)Need have 32.768k. (3)Put in AC,VSUS AC,VSUS ON ON need hight ,Press Power SW , Is there a negative pulse at PM_PWRBTN# Pin(EC) (4)EC firmware inside the SPI ROM, So if EC can?work,we can?work,we need check SPI ROM power and EC post singles have problem or not or re-flash BIOS. BIOS If power OK then SPLTRST# pull high ,CPU will read data form SPI ROM,at this time if debug code show 00, that may be a problem with BIOS , Measure LPC(F_LFRAME#) have waveform of not.
2 If battery can to charge, what do you need check? A: (1)Check charge charge PR8807 have voltage voltage at pin1 & pin2 or not. (2)power MOSFET driver control signal P_CHG_HIDRV_R_20/P_CHG_LODRV_20 are ok or not, (3)change IC SMBUS (SMB0_CLK,SMB0_DAT)are ok or not, because EC will via SMBUS SMBUS to get get charge charge current current information . (4)P_CHG_ILIM_10 voltage is ok or not ,it will setup the charge current limit (5)Check Input current Sense resistor (PR8806) have voltage at pin1 & pin2 or not 3 When hand up the ASUS LOGO, you need check A: Maybe have problem of the device device ,EX :USB or HDD system have issue. 4 reboot system: A:(1)power have short or not (2)Clear CMOS
5. BIOS have not AS or F1 at this model A: EC firmware is include the BIOS
6 Auto show show down, Windows has not finished or open half then automatic shutdown, which pin or signal engineers need to pay? A:(1) Check heat module ,check H_THEMTRIP# have to be pull low low or not. (2) Select Safe mode then into the system system ,because Safe mode have not to load other driver , can let me to exclude exclude of key part driver. (3)in to BIOS setup , Try to individually individually disable the the key part or direct to remove remove the key part then to repair it. 7. DDR3 will work need have? A:(1) power. b. clock:C_FSB_CPU/C_FS clock:C_FSB_CPU/C_FSB_CPU# B_CPU# , c.D3_DRAM_PWRGD, D3_VCCA_PWRGD d. reference voltage: (DDRVREF, D3_VREFDQ,D3_VREFCA) D3_VREFDQ,D3_VREFCA),, e. Reset:D3_DRAMRST# (2)if you measure and have not find any problem , you need use onboard memory test program to test memory.
Thank you for your attention