iPhone 7 Plus Schematic

8

7

6

5

4

3

2

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

1

REV

ECN

8

0006532879

CK APPD

DESCRIPTION OF REVISION

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

DATE

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

E NG IN EER IN G RE LE ASE D

2016-07-06

D11 MLB - PVT LAST_MODIFIC ATION=Wed Jul 6 08:55:26 2016

D PAGE

46

47

47

48

48

SYSTEM:BOM TABLES SYSTEM:EEEE CALLOUTS

D CONTENTS LARGE FORM FACTOR SPECIFIC I2C MAP: AP, TOUCH, HOMER, I2C5

50

50

spare

spare

51

51

SOC:JTAG,USB,XTAL

52

5

5

SYSTEM: BOARDID

6

6

spare

MLB UNIQUE

53

53

CELL,WIFI,NFC

page1 NFC

52

8

8

9

9

SOC:MIPI AND ISP

54

54

10

SOC:LPDP

55

55

SOC:PCIE

11

11

SOC:SERIAL

56

56

page1

12

12

SOC:GPIO & UART

57

57

METROCIRC [2]

13

13

SOC:AOP

58

58 59

SOC:POWER (1/3)

59

15

15

SOC:POWER (2/3)

60

60

16

16

SOC:POWER (3/3)

61

61

17

17

NAND

62

62

SYSTEM POWER:PMU (1/3)

63

18

I2C TABLE

SYSTEM:MECHANICAL COMPONENTS

18

49

4

14

DATE

49

14

SYNC

I2C MAP AOP

4

10

63

UAT MATCH AND TUNER [3] WIFI_MLB SCHEMATIC PERENNIAL WIFI FRONT-END [77]

C

page1 BOM_OMIT_TABLE

19

19


64

64

20

20


65

65

21

21

SYSTEM POWER:CHARGER

66

66

22

22

SYSTEM POWER:BATTERY CONN

67

67

BASEBAND: CONTROL

23

23

SYSTEM POWER:BOOST

68

68

BASEBAND GPIOS

24

24

SENSORS

69

69

TRANSCEIVER0/1: POWER

B2B FILTERS: UTAH

70

70

71

71

TRANSCEIVER0/1: PRX PORTS

72

72

RECEIVE MATCHING

TRINITY:FF SPECIFIC

73

73

LOWER ANTENNA & COUPLERS

B2B:FOREHEAD

74

74

DIVERSITY RECEIVE ASM'S

75

75

DIVERSITY RECEIVE LNA'S

d

AUDIO:CALTRA CODEC (1/2)

25

25

26

26

CAMERA:STROBE DRIVER

27

27

Accessory: Buck Circuit

28

28

29

29

30

30

31

31

B2B:NEVADA

PMU: CONTROL AND CLOCKS PMU: SWITCHERS AND LDOS BASEBAND: POWER2

TRANSCEIVER0/1: TX PORTS

76

76

AUDIO:CALTRA CODEC (2/2)

77

77

33

33

AUDIO:SPEAKER AMP 2

78

TEST POINTS & BOOT CONFIG

34

34

AUDIO:SPEAKER AMP 1

79

TDD TRANSMIT

35

35

ARC:DRIVER

80

FDD TRANSMIT

32

B

TABLE OF CONTENTS

7

46

2

7

PAGE

2

3

DATE

SYNC

1 3

C

CONTENTS

1

36

32

36

ARC:MAGGIE

81

UPPER ANTENNA FEEDS PMU: ET MODULATOR

ICEFALL, SIM, DEBUG_CONN

37

37

DISPLAY & MESA:POWER

38

38

B2B:ORB & MESA

39

39

B2B FILTERS: DISPLAY & TOUCH

TRISTAR 2

B2B:DOCK FLEX

spare

40

40

41

41

42

42

43

43

44

44

45

45

spare

B

B2B FILTERS: RIGHT BUTTON FLEX

B2B FF SPECIFIC

TABLE OF CONTENTS

VIETMOBILE.VN A

SYNC_MASTER=david-copy DRAWING TITLE

TABLE OF CONTENTS

SYNC_DATE=03/01/2016

SCH,MLB,D11 DRAWING NUMBER

Schematic & PCB Callouts PART#

0 51- 0048 2

QTY

1

DESCRIPTION

SCH,MLB,D11-12

REFERENCEDESIGNATOR(S)

SC H

CRITICAL

CRI TICA L

TABLE_5_HEAD

BOMOPTION

? TABLE_5_ITEM

SCH 051-00482 BRD 820-00229 MCO 056-01585

System Block Diagram:

Apple Inc.

051-00482 REVISION

8.0.0

R

NOTICE OF PROPRIETARY PROPERTY:

BRANCH

THEINFORMATIONCONTAINEDHEREINISTHE PROPRIETARYPROPERTYOF APPLEINC. THEPOSESSORAGREESTO THEFOLLOWING:

PAGE

SIZE

D

A

8

7

6

NAND BOM Options

5

4

QTY

DESCRIPTION


CRITICAL

BOMOPTION

1

NAND,H,32GB,16nm,MLC

U1 701

CRITICAL

NAND_32G

A L TE R NA T E FO R PART NUMBER

BOMOPTION

REF DES

1

335S 001 83

1

NAND,H,128GB,16nm,TLC

U1 701

CRI TIC AL

NAND_128G

U1 701

CRI TIC AL

NAND_256G

3 76S0 010 6

3 7 6S 0 00 4 7

5

CAP, X5R, X 5R,10UF 1 0UF ,20% , 20%,6.3 , 6.3V,0. V ,0. 65MM 6 5MM,HRZ , HRZ TL,0 T L,0402 4 02

138S00003

5

CAP,X5R,1 5UF,20%,,6 5UF,20%,,6 .3V,0.65MM .3V,0.65MM ,HRZTL,040 ,HRZTL,040 2

138S 000 03

5

C174 8,C1 8 ,C1713, 7 13, C171 C 1716,C1 6 ,C1 721, 7 21, C173 C 1733

CRI TIC AL

13,C1716,C 1721,C1733 1721,C1733 C1748,C1713,C1716,C

NAND_32G

C1748,C1713,C1716,C1721,C1733

CRITICAL CRI TIC AL

A L TE R NA T E

Q210 1

D IO IODE S I NC. ACT DI ODE

P A RT N U M BER


BOMOPTION

REF DES

COMMENTS:

155S00095

155S00068

A L TE R NA T E

F L 15 0 1

FERR BD,100OHM,25%,10 0MA,2OHM,01005

NAND_128G NAND_256G

TABLE_ALT_HEA

REF DES

D27 00

D

COMMENTS:

DIODE,SHOTTKY,30V,200MA,0201

152S 005 58

152S00557

ALT ERNA TE

376S00166

3 7 6S 0 0 16 4

A L T ER N A TE

L27 00

IND,MLD,0.47UH,2.5A,80Mohm,1608

Q2700,Q27 01 01

PFET,12V,C SP4 SP4

TABLE_ALT_HEAD

TABLE_ALT_T I

TABLE_5_T I EM

CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402

ALTERNATE

TABLE_ALT_I TEM

DDR PLL Alternate

TABLE_5_T I EM

D

BOMOPTION

371S00064

EM

TABLE_ALT_I TEM

TABLE_5_T I EM

138S0867

1

TABLE_ALT_I TEM

TABLE_ALT_T I

TABLE_5_T I EM

NAND,T,256GB,3Dv3,TLC

A L TE RN A TE F O R PART NUMBER

371S 000 87

COMMENTS:

TABLE_5_T I EM

335S00182

P AR TN U M BE R TABLE_ALT_HEAD

P A RT N U M BER TABLE_5_T I EM

335S00169

2

Acc Buck Alternates

Active Diode Alternate TABLE_5_HEAD

PART#

3

D

EM

Load Switch OMIT TABLE TABLE_5_HEAD

TABLE_ALT_HEA

P A RT N U MB E R


335S 002 01

335S00169

BOMOPTION

ALT ERNA TE

REF DES

U1701

T,15 nm, MLC, 32G B

335S00209

335S 001 69

ALTERNATE

U1701

S,16 nm, MLC, 32G B

335S 001 95

335S 001 82

ALT ERNA TE

PART#

Power Inductor Alternates

D

COMMENTS:


BOMOPTION

REF DES

152S00118

152S00075

A LT ER NA TE

A LL

152S00077

152S00397

ALTERNATE

ALL

1 52 S0 01 21

1 52 S0 00 81

DESCRIPTION


CRITICAL

BOMOPTION TABLE_5_ITEM

3 53S 010 07

TABLE_ALT_HEAD

P A RT N U M BER

QTY

1 ONSEMI,IC,LOAD,SWITCH,WLCSP4

U2710,NFCSW_RF

CRI TICA L

COMMENTS: TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

I N D , P W R , HS L D , 1 . 2 U H , 3 . 0 A , .0 0 8 0 O H M , 2 0 1 6

TABLE_ALT_I TEM

TABLE_ALT_I TEM

U17 01

SS,1 Ynm ,TLC ,12 8GB TABLE_ALT_I TEM

335S 001 80

335S00182

ALTERNATE

U17 01

T,15 nm, TLC, 128 GB

335 S001 79

335S 001 82

335S 001 48

335S 001 83

ALTERNATE

U17 01

SD,1 5nm ,TLC ,12 8GB

ALTERNATE

U1701

SD,3 Dv2 ,TLC ,25 6GB

A LT ER NA TE

updated 11/12

I N D , P W R , HS L D , 1 . 0 U H , 2 . 2 5 A 0, . 1 5 0 O H M , 2 0 1 6

A LL

I N D , P W R , HS L D , 0 . 4 7 U H , 3 . 8 A 0, . 0 4 8 O H M , 2 0 1 2

1 52S0 012 3

152S1936

ALTERNATE

A LL

I N D , P W R , HS L D , 1 5 U H , 0 . 7 2 A , .0 9 0 0 O H M , 3 2 2 5

1 52S0 040 2

152S00366

ALTERNATE

A LL

I N D , M U L T 1, U H , 1 . 2 A , .0 3 2 0 O H M , 0 6 0 3

1 52S0 029 7

1 5 2S 1 84 3

A L TE R NA T E

A LL

CYNTEC20121UH

1 52S0 036 5

1 52S 0029 7

ALTERNATE

ALL

1 52S0 039 8

1 52S 0020 4

ALTERNATE

ALL

1 52S0 012 0

152S00077

A LTE RNAT E

152S00117

152S00074

ALTERNATE

TABLE_ALT_I TEM

TABLE_ALT_I TEM

TABLE_ALT_I TEM

335 S001 90

335 S001 83

ALT ERNA TE

U1701

SS,3 Dv3 ,TLC ,25 6GB

updated 11/12 reverted 11/13

CYNTEC20121UH

#22686038:See Radar

For Chestnut inductor; so it doesn't interfere with PMU inducotr Buck 7 alts

IND,PWR,0.22UH,20%,6.7a,23MOHM,2012

ALL

ForChestnutinductoronly

L1806,L1810,L1814,L181 6,L1817


Except BUCK5 LX (BUCK5 LX is Taiyo only)

N&V 15uF Cap Alternates Global R/C Alternates C

TABLE_ALT_HEA

P AR TN U M BE R


BOMOPTION

1 3 8S 0 00 0 5

1 3 8S 0 00 0 3

A L TE R NA T E

(C1818,C1825,C1831)

REF DES

138S00005

138S00003

ALTERNATE

(C1837,C1842,C1844)

D

COMMENTS:

C

TABLE_ALT_HEAD

P A RT N U M BER

1 1 8S 0 76 4


BOMOPTION

1 1 8S 0 71 7

A LT ER NA TE

REF DES

COMMENTS:

TABLE_ALT_I TEM

MUR+KYO 15UF

138S0702

1 38 S0 65 7

138S00006

138S0835

ALTERNATE

138S0648

138S0652

ALTERNATE

A LL

A LT ER NA TE

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

CAP, X5R, 4.3UF, 4V, 0610

ALL

CAP, 3-TERM, 4.3UF, 4V, 0402

ALL

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

Magnesium Alternates TABLE_ALT_HEA

P A RT N U MB E R


BOMOPTION

REF DES

D

1 3 2S 0 40 0

1 3 2S 0 43 6

A LT ER NA TE

138S00024

1 38 S0 98 6

E A LT R NA TE

138S0706

138S0739

138S0945 132S0436

A LL

138S00005

AL L

1 3 8S 0 73 9

A L TE R NA T E

ALL

CAP,CER,1UF,20%,10V,X5R,0201,KYOCERA

132S0400

ALTERNATE

ALL

CAP,CER,X5R,0.22UF,20%,6.3V,20%

ALTE RNATE

(C1819,C1826,C1832)

138S00003

ALTE RNATE

(C1838,C1843,C1845)

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

138S00005

138S00003

ALTERNATE

(C1401,C1408,C1434)

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

138S00005

138S00003

ALTERNATE

(C1813,C1820,C1827)

138S00005

138S00003

ALTERNATE

(C1833,C1839,C1865)

1 3 8S 0 00 0 5

1 3 8S 0 00 0 3

A L TE R NA T E

(C1814,C1821,C1828)

CAP,X5R,15UF,6.3V,0.65MM,0402,TY TABLE_ALT_I TEM

TABLE_ALT_I TEM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_I TEM

EM

TABLE_ALT_T I

EM

GPU + GPU_SRAM

CAP,X5R,15UF,6.3V,0.65MM,0402,TY


CAP,CER,1UF,20%,10V,X5R,0201,MURATA TABLE_ALT_T I

TABLE_ALT_I TEM

CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK

ALTERNATE

138S00003

138S00005

EM

CAP,X5R,0.22UF,6.3V,01005,TDK

A LL


CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO TABLE_ALT_T I

CPU TABLE_ALT_I TEM

RES, 3.92K, 0.1%, 0201

A LL

CAP,X5R,15UF,6.3V,0.65MM,0402,TY


1 3 8S 0 00 0 5

1 3 8S 0 00 0 3

A L TE R NA T E

138S00005

138S00003

ALTE RNATE

138S00048

1 3 8S 0 00 0 3

A L TE R NA T E

(C1834,C1866,C1414)

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

(C1806,C1810)

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

TABLE_ALT_I TEM

COMMENTS:

TABLE_ALT_I TEM

ALL

CAP,X5R,15UF,6.3V,0.65MM,0402,KYOCERA

TABLE_ALT_I TEM

338S00173

3 38 S0 02 03

A LT ER NA TE

U 24 02

LargerWafer(-29flow)Magnesium

Global Ferrite Alternates

B

TABLE_ALT_HEA

P A RT N UM BE R


BOMOPTION

REF DES

COMMENTS:

155S00067

1 55 S0 58 1

A LT ER NA TE

A LL

FERR, 240OHM, 0.38OHM DCR, 0201

155S0581

155S00067

ALTERNATE

ALL


155S00012

155S00168

ALTERNATE

ALL

FLTR, 65 OHMS, 0605

155S00194

155S0610

ALTERNATE

ALL

FERR BD, 150OHM, TDK

155S00200

155S0610

ALTERNATE

ALL

FERR BD, 150OHM, TY

152S00489

152S00456

ALTERNATE

ALL

FERR BD, 0.47UH, TY

B

D

TABLE_ALT_IT EM

TABLE_ALT_IT EM

TABLE_ALT_IT EM

TABLE_ALT_IT EM

UT LDO Alternates

TABLE_ALT_IT EM

TABLE_ALT_IT EM

TABLE_ALT_HEA

P A RT N UM BE R


BOMOPTION

REF DES

353S00889

353S00015

ALTERNATE

U2 501

D

COMMENTS: TABLE_ALT_IT EM

S T , L D O R E G , 2 . 9 2 5 V , C S P 0 . 6 5 x 0 . 56

Mamba LDO Alternates TABLE_ALT_HEA

P A RT N UM BE R


BOMOPTION

REF DES

353S00932

353S00576

ALTERNATE

U3 801

Global Varistor Alternates

D

COMMENTS: TABLE_ALT_HEA

P A RT N UM BE R


BOMOPTION

REF DES

COMMENTS:

377S0168

377S0140

ALTERNATE

ALL

VARISTOR, 6.8V, 100PF, 01005

TABLE_ALT_IT EM

S ,T L D O

TABLE_ALT_IT EM

I2C5 Alternate A

P A RT N U M BER


BOMOPTION

D

REG,2.75V

TABLE_ALT_HEAD

REF DES

COMMENTS: SYNC_MASTER=Sync TABLE_ALT_T I

3 35S 0023 4

3 35S 0023 3

ALTERNATE

U110 1


PAGETITLE

EM

I2C5ALTERNATE

SYSTEM:BOM TABLES

VIETMOBILE.VN

DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


BRANCH


PAGE

SI ZE

D

A

8

7

6

NAND BOM Options

5

4

QTY

DESCRIPTION


CRITICAL

BOMOPTION

1

NAND,H,32GB,16nm,MLC

U1 701

CRITICAL

NAND_32G


BOMOPTION

REF DES

1

335S 001 83

1

NAND,H,128GB,16nm,TLC

U1 701

CRI TIC AL

NAND_128G

U1 701

CRI TIC AL

NAND_256G

3 76S0 010 6

3 7 6S 0 00 4 7

5

CAP, X5R, X 5R,10UF 1 0UF ,20% , 20%,6.3 , 6.3V,0. V ,0. 65MM 6 5MM,HRZ , HRZ TL,0 T L,0402 4 02

138S00003

5

CAP,X5R,1 5UF,20%,,6 5UF,20%,,6 .3V,0.65MM .3V,0.65MM ,HRZTL,040 ,HRZTL,040 2

138S 000 03

5

C174 8,C1 8 ,C1713, 7 13, C171 C 1716,C1 6 ,C1 721, 7 21, C173 C 1733

CRI TIC AL

13,C1716,C 1721,C1733 1721,C1733 C1748,C1713,C1716,C

NAND_32G

C1748,C1713,C1716,C1721,C1733

CRITICAL CRI TIC AL

A L TE R NA T E

Q210 1

D IO IODE S I NC. ACT DI ODE

P A RT N U M BER


BOMOPTION

REF DES

COMMENTS:

155S00095

155S00068

A L TE R NA T E

F L 15 0 1

FERR BD,100OHM,25%,10 0MA,2OHM,01005

NAND_128G NAND_256G

TABLE_ALT_HEA

REF DES

D27 00

D

COMMENTS:

DIODE,SHOTTKY,30V,200MA,0201

152S 005 58

152S00557

ALT ERNA TE

376S00166

3 7 6S 0 0 16 4

A L T ER N A TE

L27 00

IND,MLD,0.47UH,2.5A,80Mohm,1608

Q2700,Q27 01 01

PFET,12V,C SP4 SP4

TABLE_ALT_HEAD

TABLE_ALT_T I

TABLE_5_T I EM

CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402

ALTERNATE

TABLE_ALT_I TEM

DDR PLL Alternate

TABLE_5_T I EM

D

BOMOPTION

371S00064

EM

TABLE_ALT_I TEM

TABLE_5_T I EM

138S0867

1

TABLE_ALT_I TEM

TABLE_ALT_T I

TABLE_5_T I EM

NAND,T,256GB,3Dv3,TLC


371S 000 87

COMMENTS:

TABLE_5_T I EM

335S00182

P AR TN U M BE R TABLE_ALT_HEAD

P A RT N U M BER TABLE_5_T I EM

335S00169

2

Acc Buck Alternates

Active Diode Alternate TABLE_5_HEAD

PART#

3

D

EM

Load Switch OMIT TABLE TABLE_5_HEAD

TABLE_ALT_HEA

P A RT N U MB E R


335S 002 01

335S00169

BOMOPTION

ALT ERNA TE

REF DES

U1701

T,15 nm, MLC, 32G B

335S00209

335S 001 69

ALTERNATE

U1701

S,16 nm, MLC, 32G B

335S 001 95

335S 001 82

ALT ERNA TE

PART#

Power Inductor Alternates

D

COMMENTS:


BOMOPTION

REF DES

152S00118

152S00075

A LT ER NA TE

A LL

152S00077

152S00397

ALTERNATE

ALL

1 52 S0 01 21

1 52 S0 00 81

DESCRIPTION


CRITICAL

BOMOPTION TABLE_5_ITEM

3 53S 010 07

TABLE_ALT_HEAD

P A RT N U M BER

QTY

1 ONSEMI,IC,LOAD,SWITCH,WLCSP4

U2710,NFCSW_RF

CRI TICA L

COMMENTS: TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM


TABLE_ALT_I TEM

TABLE_ALT_I TEM

U17 01

SS,1 Ynm ,TLC ,12 8GB TABLE_ALT_I TEM

335S 001 80

335S00182

ALTERNATE

U17 01

T,15 nm, TLC, 128 GB

335 S001 79

335S 001 82

335S 001 48

335S 001 83

ALTERNATE

U17 01

SD,1 5nm ,TLC ,12 8GB

ALTERNATE

U1701

SD,3 Dv2 ,TLC ,25 6GB

A LT ER NA TE

updated 11/12

I N D , P W R , HS L D , 1 . 0 U H , 2 . 2 5 A 0, . 1 5 0 O H M , 2 0 1 6

A LL

I N D , P W R , HS L D , 0 . 4 7 U H , 3 . 8 A 0, . 0 4 8 O H M , 2 0 1 2

1 52S0 012 3

152S1936

ALTERNATE

A LL

I N D , P W R , HS L D , 1 5 U H , 0 . 7 2 A , .0 9 0 0 O H M , 3 2 2 5

1 52S0 040 2

152S00366

ALTERNATE

A LL

I N D , M U L T 1, U H , 1 . 2 A , .0 3 2 0 O H M , 0 6 0 3

1 52S0 029 7

1 5 2S 1 84 3

A L TE R NA T E

A LL

CYNTEC20121UH

1 52S0 036 5

1 52S 0029 7

ALTERNATE

ALL

1 52S0 039 8

1 52S 0020 4

ALTERNATE

ALL

1 52S0 012 0

152S00077

A LTE RNAT E

152S00117

152S00074

ALTERNATE

TABLE_ALT_I TEM

TABLE_ALT_I TEM

TABLE_ALT_I TEM

335 S001 90

335 S001 83

ALT ERNA TE

U1701

SS,3 Dv3 ,TLC ,25 6GB

updated 11/12 reverted 11/13

CYNTEC20121UH

#22686038:See Radar

For Chestnut inductor; so it doesn't interfere with PMU inducotr Buck 7 alts

IND,PWR,0.22UH,20%,6.7a,23MOHM,2012

ALL

ForChestnutinductoronly

L1806,L1810,L1814,L181 6,L1817


Except BUCK5 LX (BUCK5 LX is Taiyo only)

N&V 15uF Cap Alternates Global R/C Alternates C

TABLE_ALT_HEA

P AR TN U M BE R


BOMOPTION

1 3 8S 0 00 0 5

1 3 8S 0 00 0 3

A L TE R NA T E

(C1818,C1825,C1831)

REF DES

138S00005

138S00003

ALTERNATE

(C1837,C1842,C1844)

D

COMMENTS:

C

TABLE_ALT_HEAD

P A RT N U M BER

1 1 8S 0 76 4


BOMOPTION

1 1 8S 0 71 7

A LT ER NA TE

REF DES

COMMENTS:

TABLE_ALT_I TEM

MUR+KYO 15UF

138S0702

1 38 S0 65 7

138S00006

138S0835

ALTERNATE

138S0648

138S0652

ALTERNATE

A LL

A LT ER NA TE

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

CAP, X5R, 4.3UF, 4V, 0610

ALL

CAP, 3-TERM, 4.3UF, 4V, 0402

ALL

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

Magnesium Alternates TABLE_ALT_HEA

P A RT N U MB E R


BOMOPTION

REF DES

D

1 3 2S 0 40 0

1 3 2S 0 43 6

A LT ER NA TE

138S00024

1 38 S0 98 6

E A LT R NA TE

138S0706

138S0739

138S0945 132S0436

A LL

138S00005

AL L

1 3 8S 0 73 9

A L TE R NA T E

ALL

CAP,CER,1UF,20%,10V,X5R,0201,KYOCERA

132S0400

ALTERNATE

ALL

CAP,CER,X5R,0.22UF,20%,6.3V,20%

ALTE RNATE

(C1819,C1826,C1832)

138S00003

ALTE RNATE

(C1838,C1843,C1845)

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

138S00005

138S00003

ALTERNATE

(C1401,C1408,C1434)

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

138S00005

138S00003

ALTERNATE

(C1813,C1820,C1827)

138S00005

138S00003

ALTERNATE

(C1833,C1839,C1865)

1 3 8S 0 00 0 5

1 3 8S 0 00 0 3

A L TE R NA T E

(C1814,C1821,C1828)


TABLE_ALT_I TEM

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

TABLE_ALT_I TEM

EM

TABLE_ALT_T I

EM

GPU + GPU_SRAM

CAP,X5R,15UF,6.3V,0.65MM,0402,TY


CAP,CER,1UF,20%,10V,X5R,0201,MURATA TABLE_ALT_T I

TABLE_ALT_I TEM

CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK

ALTERNATE

138S00003

138S00005

EM

CAP,X5R,0.22UF,6.3V,01005,TDK

A LL


CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO TABLE_ALT_T I

CPU TABLE_ALT_I TEM

RES, 3.92K, 0.1%, 0201

A LL

CAP,X5R,15UF,6.3V,0.65MM,0402,TY


1 3 8S 0 00 0 5

1 3 8S 0 00 0 3

A L TE R NA T E

138S00005

138S00003

ALTE RNATE

138S00048

1 3 8S 0 00 0 3

A L TE R NA T E

(C1834,C1866,C1414)

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

(C1806,C1810)

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

TABLE_ALT_I TEM

COMMENTS:

TABLE_ALT_I TEM

ALL

CAP,X5R,15UF,6.3V,0.65MM,0402,KYOCERA

TABLE_ALT_I TEM

338S00173

3 38 S0 02 03

A LT ER NA TE

U 24 02

LargerWafer(-29flow)Magnesium

Global Ferrite Alternates

B

TABLE_ALT_HEA

P A RT N UM BE R


BOMOPTION

REF DES

COMMENTS:

155S00067

1 55 S0 58 1

A LT ER NA TE

A LL


155S0581

155S00067

ALTERNATE

ALL


155S00012

155S00168

ALTERNATE

ALL

FLTR, 65 OHMS, 0605

155S00194

155S0610

ALTERNATE

ALL

FERR BD, 150OHM, TDK

155S00200

155S0610

ALTERNATE

ALL

FERR BD, 150OHM, TY

152S00489

152S00456

ALTERNATE

ALL

FERR BD, 0.47UH, TY

B

D

TABLE_ALT_IT EM

TABLE_ALT_IT EM

TABLE_ALT_IT EM

TABLE_ALT_IT EM

UT LDO Alternates

TABLE_ALT_IT EM

TABLE_ALT_IT EM

TABLE_ALT_HEA

P A RT N UM BE R


BOMOPTION

REF DES

353S00889

353S00015

ALTERNATE

U2 501

D

COMMENTS: TABLE_ALT_IT EM

S T , L D O R E G , 2 . 9 2 5 V , C S P 0 . 6 5 x 0 . 56

Mamba LDO Alternates TABLE_ALT_HEA

P A RT N UM BE R


BOMOPTION

REF DES

353S00932

353S00576

ALTERNATE

U3 801

Global Varistor Alternates

D

COMMENTS: TABLE_ALT_HEA

P A RT N UM BE R


BOMOPTION

REF DES

COMMENTS:

377S0168

377S0140

ALTERNATE

ALL

VARISTOR, 6.8V, 100PF, 01005

TABLE_ALT_IT EM

S ,T L D O

TABLE_ALT_IT EM

I2C5 Alternate A

P A RT N U M BER


BOMOPTION

D

REG,2.75V

TABLE_ALT_HEAD

REF DES

COMMENTS: SYNC_MASTER=Sync TABLE_ALT_T I

3 35S 0023 4

3 35S 0023 3

ALTERNATE

U110 1


PAGETITLE

EM

I2C5ALTERNATE

SYSTEM:BOM TABLES

VIETMOBILE.VN

DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

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D11 EEEE CALLOUTS TABLE_5_HEAD

PART#

QTY

DESCRIPTION


CRITICAL

BOMOPTION

EEEE_GY2T

CR ITIC AL

EEEE_D11_BEST_JP

EEEE_GY2V

CRITICAL

EEEE_D11_SUPREME_JP

EEEE_GY2W

CR ITIC AL

EEEE_D11_EXTREME_JP

EEEE CODE FOR 639-02138

EEEE_H3RN

C R ITIC AL

EEEE_D11_BEST_ROW

1


EEEE_H3RP

CR ITIC AL

EEEE_D11_SUPREME_ROW

1


EEEE_H3RQ

CRITICAL

EEEE_D11_EXTREME_ROW

TABLE_5_T I EM

825 -68 38

1


825-6838

1


825-6838

1


825 -68 38

1

825-6838 825-6838

TABLE_5_T I EM

TABLE_5_T I EM

D

D

TABLE_5_T I EM

TABLE_5_T I EM

TABLE_5_T I EM

TABLE_5_T I EM

EEE E_H8 C1

825 -68 38

1

825-6838

1


825-6838

1



CRITICAL

EEEE_D11_BEST_CH TABLE_5_T I EM

EEEE_H8CK

CRITICAL

EEEE_H8C3

CR ITIC AL

EEEE_D11_SUPREME_CH TABLE_5_T I EM

EEEE_D11_EXTREME_CH

CAYMAN DDR Alternates TABLE_ALT_IT EM

339S00258

339S00257

ALTERNATE

ALL

DDR-S, 3G, B1

CAYMAN OMIT TABLE TABLE_5_HEAD

PART#

QTY

DESCRIPTION


CRITICAL

BOMOPTION TABLE_5_T I EM

339 S00 257

1

U 0700

CAYMAN, DDR-H, 3G, B1

CR ITIC AL

C

C

2.2uF CAP Alts TABLE_ALT_HEAD

P A RT N U M BER


BOMOPTION

REF DES

COMMENTS:

138S00049

138S00032

ALTERNATE

ALL

CAP,CER,X5R,2,2 UF,20%6.3V,20%,

138S0831

138S00032

ALTERNATE

ALL

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

KYOCERA

CAP,CER,X5R,2,2UF,20%,6.3V,20%,MURATA

SIP Alternates TABLE_ALT_HEAD

P A RT N U M BER


BOMOPTION

REF DES

COMMENTS:

3 39 M0 00 09

3 39 M0 00 03

A LT ER NA TE

A LL

T RI NI TY B LU E, ST AT S

339M00008

339M00002

A LT ER NA TE

A LL

NEO,STATS

TABLE_ALT_T I

EM

TABLE_ALT_T I

EM

B

B

A

SY NC _M AS TE R= da vi d- co py PAGETITLE

S YNC _D AT E= 03 /0 1/ 20 16

SYSTEM:EEEE CALLOUTS DRA WI NG N UMB ER

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051-00482 REVISION

8.0.0

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Current as of D11 MCO 056-01585 rev. 63 O O

2.70R1.80-NSP 1

D

1

C0413

1

220PF

2

NEO Stiffener

UP_RFFE

POWER

NORTH_SCREW_EXPOSED

O

BS0415

5% 10V C0G-CERM 01005

LCM

TESTPOINTS

#25046211

Contained in radio_mlb pages

C0414

1

56PF

2

5% 25V NP0-C0G-CERM 01005

C0415

1

18PF

2

2% 16V CERM 01005

TP0420 1 A

C0416

TP-P55

+/-0.1PF 16V NP0-C0G 01005

BS0402

BS0401 1

A

TP-P55

BS0403

STDOFF-2.9OD0.888H-SM

CHASSIS_GND_BS401

1

4 44


C HA SS IS _G ND _B S4 02

1

4

TP0415 1

PP_BATT_VCC

22 21

C HA SS IS _G ND _B S4 03

A

TP-P55

45 39

A

TP-P55

PP_LCM_BL_ANODE_CONN

TP0411 1

46 45

PP_LCM_BL34_CAT1_CONN

TP0417 1 LCM BACKLIGHT SINK3 A

46 45

PP_LCM_BL34_CAT2_CONN

TP0419 1

A

28 27 26 25 23 21 19 18 10 9 46 41 40 39 37 35 34 33 31 3 0

CHASSIS_GND_BS401

C0401

1

ROOM=TEST

TP-P55

5% 10V C0G-CERM 01005

2

220PF

PP_VDD_MAIN

A

TP-P55

ROOM=TEST

VDD_MAIN

1

5% 10V C0G-CERM 01005

2

220PF

C0403

1

5% 16V NP0-C0G 01005

2

C0404

100PF

1

56PF

5% 25V NP0-C0G-CERM 2 01005

C0405

1

2% 16V CERM 01005

2

18PF

C0406

FD0408

4PF

FID

+/-0.1PF 16V NP0-C0G 01005

0P5SM1P0SQ-NSP 1 Note: Fiducial used as test point

A

TP-P55

LCM BACKLIGHT SINK4

ROOM=TEST

ROOM=TEST

C0402

D

LCM BACKLIGHT SOURCE

TP-P55

VBATT

A

LCM BACKLIGHT SINK2

45 39

TP-P55

TP0408 1

LCM BACKLIGHT SINK1

ROOM=TEST

ROOM=TEST

53

2

A

TP-P55

ROOM=TEST

ROOM=TEST

4

PTH per Rev63 for 1.8mm Drill

1

PP_LCM_BL_CAT2_CONN

TP0410 1

VBUS

TP0422 1

44 4

TP0409 1

POWER GROUND

TP0421 1

PP5V0_USB

41 40 21

ROOM=TEST

2.70R1.80-NSP

PP_LCM_BL_CAT1_CONN

ROOM=TEST

4PF

2

45 39

46 45

PP_LCM_BL34_ANODE_CONN

TP0418 LCM BACKLIGHT SOURCE (3/4) 1 A TP-P55

ROOM=TEST

ROOM=TEST 4

CHASSIS_GND_BS402 1

C0407

1

5% 10V C0G-CERM 01005

2

220PF

2

C0408

1

5% 10V C0G-CERM 01005

2

220PF

C0409

1

5% 16V NP0-C0G 01005

2

C0410

100PF

1

56PF

5% 25V NP0-C0G-CERM 2 01005

C0411

1

2% 16V CERM 01005

2

18PF

FIDUCIALS

C0412 4PF

+/-0.1PF 16V NP0-C0G 01005

DFU

C

FD0410

C0417

1

220PF

2

5% 10V C0G-CERM 01005

C0418

TP-P55

ROOM=TEST 1

220PF

2

5% 10V C0G-CERM 01005

C0419

1

5% 16V NP0-C0G 01005

5% 25V 2 NP0-C0G-CERM 2 01005

100PF

2

C0420 56PF

1

C0421

1

18PF 2% 16V CERM 01005

0P5SM1P0SQ-NSP 1

A

CHASSIS_GND_BS403 1

FID

TP0414 1

PMU_TO_AP_FORCE_DFU

20 12 4

ROOM=ASSEMBLY

FORCE DFU

C0422

FID

4PF

2

+/-0.1PF 16V NP0-C0G 01005

0P5SM1P0SQ-NSP 1

E75 41 40

Front Shields 1

ROOM=ASSEMBLY

FD0405 FID

TP0402 1

90_TRISTAR_DP1_CONN_P

0P5SM1P0SQ-NSP 1

A

TP-P55

ROOM=ASSEMBLY

ROOM=TEST

41 40

90_TRISTAR_DP1_CONN_N

41 40

90_TRISTAR_DP2_CONN_P

FD0406

TP0403 1

FID

0P5SQ-SMP3SQ-NSP

A

1

TP-P55

TP0404 1

FD0404

TP-P55

0P5SQ-SMP3SQ-NSP

FID

A

SHLD-UP-FRT-D11

1

ROOM=TEST 41 40

90_TRISTAR_DP2_CONN_N

SH0403

FD0403

TP-P55

0P5SQ-SMP3SQ-NSP

FID

A

41 40

1

TP0406 1

PP_TRISTAR_ACC1

TP-P55 ROOM=TEST

SHLD-LOWER-FRT-D11

BS0404

41 40

FID

0P5SQ-SMP3SQ-NSP

ACCESSORY ID AND POWER

1

TP0407 1

PP_TRISTAR_ACC2

FID

TP-P55

1

0P5SQ-SMP3SQ-NSP

ROOM=TEST

B

TP0416 1 A

TP-P55 ROOM=TEST

Back Shields 41 40

TP0412 1

TRISTAR_CON_DETECT_L

A

TP-P55

1

FID

0P5SQ-SMP3SQ-NSP 1

SHLD-SOFT-UP-BK-D11

FID

A

TP-P55

#25244799 100k to 200k 1

20

SH0402 SM

SHLD-SOFT-LOWER-BK-D11

FD0407 0P5SM1P0SQ-NSP

TP0413 1

PMU_AMUX_AY

20

TP0423 1

PMU_AMUX_BY

A

1

ANALOG MUX A OUTPUT

ROOM=TEST

ROOM=TEST 1

FD0411

R0413

FID

200K

1% 1/32W MF 2 01005 ROOM=SOC

TP-P55

BS0405

0P5SQ-SMP3SQ-NSP 1

ANALOG MUX B OUTPUT

Note: Fiducial used as test point

ROOM=TEST


ROOM=ASSEMBLY

FOR DIAGS

ROOM=TEST

SM

B

ROOM=ASSEMBLY

FD0400

TP IS TO HELP WITH USB SI IN THE FACTORY FIXTURE.

AMUX

SH0400

ROOM=ASSEMBLY

FD0401

A

2.70R1.80-NSP

ROOM=ASSEMBLY

FD0402

A

SM

ROOM=ASSEMBLY

TP0405 1 ROOM=TEST

1

ROOM=ASSEMBLY

ROOM=TEST

SH0401 SM

1

C

FD0409

MOJAVE

1

BS0406

STDOFF-2.9OD1.9ID-0.85H-SM

38 37

MESA_TO_BOOST_EN

TP0400 1

PP16V0_MESA

TP0401 1

1

A

TP-P55

ROOM=TEST

A

38 37

A

TP-P55 CLIP-COAX-RETENTION-D11

CL0401 SM

ROOM=TEST

A

SYN C_MA STE R=s ync

SYN C_D ATE= 05/ 17/ 201 6

PAGETITLE

SYSTEM:MECHANICAL COMPONENTS DRA WI NG N UMB ER

1

VIETMOBILE.VN

Apple Inc.

051-00482 REVISION

8.0.0

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BOOTSTRAPPING:BOARD REV BOARD ID BOOT CONFIG NOSTUFF 12

BOARD_REV3

R0509

12

BOARD_REV2

12

BOARD_REV1

R0505

BOARD_REV0

5%

ROOM=SOC 1 2

01005 MF

R0504

5%

ROOM=SOC 1 2

01005 MF

R0508 NOSTUFF

12

ROOM=SOC 1 2

01005 MF

NOSTUFF

5%

ROOM=SOC

1 01005 M F

5%

1.00K 1/32W

MAKE_BASE=TRUE

PP1V8

7 8 9 11 12 13 16 17 18 25 29 30 39 46 47 48 52

1.00K

BOARD_REV[3:0]

1/32W

FLOAT=LOW, PULLUP=HIGH

1.00K 1/32W 2 1.00K 1/32W

C

SELECTED --> BOARD_ID4=No connect

11

BOARD_ID3

R0502

ROOM=SOC 1 2

01005 MF

NOSTUFF

11

BOARD_ID2 0=EUREKA, 1=KAROO

11

BOARD_ID1

R0503

1 01005 MF

R0501

5%

ROOM=SOC

5%

ROOM=SOC

1 01005 MF 0=FORM FACTOR A, 1=FORM FACTOR B

5%

PP1V8

Pre-Proto w/D520 (non enclosure) PROTO1 PROTO2 PROTO2.5 EVT SPARE CARRIER SPARE DVT SPARE PVT

C

1.00K 1/32W

BOARD_ID[4:0]

2 1.00K 1/32W 2 1.00K 1/32W

SELECTED -->

BOARD_ID0=No connect

12

1111 1110 1101 1100 1011 xxxx 1000 xxxx 0010 xxxx 0000

FLOAT=LOW, PULLUP=HIGH 01000 D10 MLB 01001 D10 DEV 01010 D11 MLB 01011 D11 DEV 01100 D101 MLB 01101 D101 DEV 01110 D111 MLB 01111 D111 DEV 0=MLB, 1=DEV 0=FORM FACTOR A, 1=FORM FACTOR B 0=EUREKA, 1=KAROO

MAKE_BASE=TRUE

BOOT_CONFIG1=No connect

B

BOOT_CONFIG0=No connect

BOOT_CONFIG[2:0]

SELECTED -->

A

B

FLOAT=LOW, PULLUP=HIGH 000 001 010 011 100 101 110 111

SPI0 SPI0 TEST MODE NVME0_X2 NVME0 X2 TEST NVME0 X1 NVME0 X1 TEST SLOW SPI0 TEST FAST SPI0 TEST

SYNC_MASTER=david-copy


PAGETITLE

SYSTEM: BOARDID DRA WI NG N UMB ER

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051-00482 REVISION

8.0.0

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C

B

B

A

SYNC_MASTER=Sync


PAGETITLE

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SOC - USB, JTAG, XTAL

2

1

VDD18_USB: 1.71-1.89V @20mA MAX

PP1V8 1

5 7 8 9 11 12 13 16 17 18 25 29 30 39 46 47 48 52

C0700 0.1UF

20% 2 6.3V X5R-CERM 01005

ROOM=SOC

D

D

VDD11_XTAL:1.06-1.17V @TBD mA

FL0700

MAX

240-OHM-25%-0.20A-0.9DCR PP1V1_XTAL

1 1

PP1V1

2 01005

C0704

1

ROOM=SOC

0.1UF

20% 2 6.3V X5R-CERM 0201-1

ROOM=SOC

VDD18_AMUX: 1.62-1.98V @1mA

ROOM=SOC

MAX

PP3V3_USB 25 18 17 16 13 12 11 9 8 7 5 52 48 47 46 39 30 29

15 18

C0705 2.2UF

20% 2 6.3V X5R-CERM 01005

PP1V8

1

C0701

19 30

3.14-3.46V @20mA MAX

0.1UF

20% 6.3V 2 X5R-CERM 01005

ROOM=SOC

CKPLUS_WAIVE=PWRTERM2GND

0 2 L C 0 C I S H _ 1 H U _ 2 1 D D V

C

5 2 E C

0 6 J A X U M A _ 8 1 D D V

B S U _ 8 1 D D V

U0700

0 5 G C L A T X _ 1 1 D D V

6 2 G C B S U _ 3 3 D D V

PP0V9_SOC_FIXED

5 2 C C

8 9 10 15 18

tbd - tbd V @5mA MAX

B S U _ D E X I F _ D D V

C

CAYMAN-2GB-20NM-DDR-M CSP

SYM1OF 16

CM22 UH1_HSIC0_DATA NC CM20 UH1_HSIC0_STB NC

ANALOGMUX_OUT N64

Dev ONLY

USB_DP CM26 USB_DM CL26

CL31 JTAG_SEL CL29 CG37 NC CJ35 NC CK33 CH37 NC

40 40

20 13 40 37 20 13

B

PP0701 P2MM-NSM SM

PP

20

SWD_DOCK_BI_AP_SWDIO SWD_DOCK_TO_AP_SWCLK PMU_TO_SYSTEM_COLD_RESET_L

JTAG_TRST* JTAG_TDO JTAG_TDI JTAG_TMS JTAG_TCK

AP_TO_PMU_AMUX_OUT

90_USB_AP_DATA_P 90_USB_AP_DATA_N

20

40 40

OMIT_TABLE

USB_VBUS CH26

USB_VBUS_DETECT

21

USB_ID CJ26NC

CM14 COLD_RESET*

PMU_TO_AOP_TRISTAR_ACTIVE_READY

BJ3 CFSB

AP_TO_PMU_TEST_CLKOUT

BJ2 TST_CLKOUT

USB_REXT CK26

AP_USB_REXT 1

17

AP_TO_NAND_RESET_L

B

1% 1/32W MF 2 01005

BL65 S3E_RESET*

BJ4 HOLD_RESET

R0700 200

1

ROOM=SOC

WDOG CK35

AP_TO_PMU_WDOG_RESET

20

XTAL_AP_24M_IN XTAL_AP_24M_OUT

1

BL3 TESTMODE XI0 CM42 XO0 CL42

R0701

CRITICAL ROOM=SOC

511K

1% 1/32W MF 2 01005

ROOM=SOC

Y0700

1.60X1.20MM-SM

R0702 1

0.00 0% 1/32W MF 01005

ROOM=SOC

24.000MHZ-30PPM-9.5PF-60OHM

2

SOC_24M_O 1

C0702 12PF

5% 16V 2 CERM 01005

ROOM=SOC

1 2

3 4 1

C0703 12PF

2

5% 16V CERM 01005 ROOM=SOC

A

SYNC_MASTER=Sync


PAGETITLE

SOC:JTAG,USB,XTAL DRA WI NG N UMBE R

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051-00482 REVISION

8.0.0

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SOC - PCIE INTERFACES R0804 1

0.00

2

0% 1/32W MF 01005

ROOM=SOC

VDD12_PCIE_REFBUF:1.08-1.2 6V @40mA

MAX

PP1V2_SOC_PCIE_REFBUF 1

C0802 0.1UF

20% 2 6.3V X5R-CERM 01005

VDD_FIXED_PCIE_xxx:0.855-0.990V @225mA MAX

ROOM=SOC

PP0V9_SOC_FIXED 7

D

R0803 19 16 10

PP1V2_SOC 1

1

C0805 2.2UF ROOM=SOC

PP1V8

8 5 E C

C0801 0.1UF

9 9 4 4 C E C C

5 0 5 6 A A C C

F U B F E R _ E I C P _ 2 1 D D V

K L C _ E I C P _ D E X I F _ D D V

E I C P _ 2 1 D D V

20% 6.3V 2 X5R-CERM 01005

20% 6.3V X5R-CERM 0201-1

2

1

PP0V9_SOC_FIXED_PCIE_REFBUF

VDD12_PCIE: 1.14-1.26V @10mA MAX

ROOM=SOC

5 7 9 11 12 13 16 17 18 25 29 30 39 46 47 48 52

17 17

1

5 7 5 4 W C B C

C0804 0.1UF

C0803 0.1UF

20% 2 6.3V X5R-CERM 01005

0% 1/32W MF 01005

20% 2 6.3V X5R-CERM 01005

F U B F E R _ E I C P _ D E X I F _ D D V

1

2

ROOM=SOC

1

C0800

1

1.0UF

9 10 15 18

D

C0806 2.2UF

20% 2 6.3V X5R 0201-1

2

ROOM=SOC

20% 6.3V X5R-CERM 0201-1 ROOM=SOC

ROOM=SOC

ROOM=SOC

CAYMAN-2GB-20NM-DDR-M CSP

5% 1/32W MF 2 01005

ROOM=SOC

PCIE_NAND_BI_AP_CLKREQ_L

A N A _ E I C P _ D E X I F _ D D V

0.00

U0700

R0805 100K

17

3 2 5 0 5 6 5 6 C C E E C C C C

1

SYM2OF 16

BC64 PCIE_CLKREQ0* CJ48 PCIE_REF_CLK0_P CK48 PCIE_REF_CLK0_N

90_PCIE_AP_TO_NAND_REFCLK_P 90_PCIE_AP_TO_NAND_REFCLK_N

PCIE_CLKREQ3* BE66 PCIE_REF_CLK3_P CL64 PCIE_REF_CLK3_N CM64

PCIE_WLAN_BI_AP_CLKREQ_L 90_PCIE_AP_TO_WLAN_REFCLK_P 90_PCIE_AP_TO_WLAN_REFCLK_N

52 52 52

3

#24557655:replace with 20% caps. SI no negative impact

C

1 2 0.22UF 20% 6.3V ROOM=SOC X5R 0 1 00 5 90_PCIE_NAND_TO_AP_RXD_P 90_PCIE_NAND_TO_AP_RXD_C_P 1 2 GND_VOID=TRUE 90_PCIE_NAND_T O_AP_RXD_N 0.22UF 90_PCIE_NAND_T O_AP_RXD_C_N 20% 6.3V ROOM=SOC X5R 01005 D10 NAND is now Gen3 (was Gen2). Caps intentionally 0.22uF 1 2 GND_VOID=TRUE 0.22UF ROOM=SOC 20% 6.3V X5R 01005 90_PCIE_AP_TO_NAND_TXD_P 90_PCIE_AP_TO_NAND_TXD_C_P 1 2 GND_VOID=TRUE 90_PCIE_AP_TO_NAND_TXD_N 0.22UF 90_PCIE_AP_TO_NAND_TXD_C_N 6.3V ROOM=SOC 20% X5R 01005

C0807

17

0

17

K N I L E I C P

C0808

K N I L

GND_VOID=TRUE

CM46 PCIE_RX0_P CL46 PCIE_RX0_N

PCIE_RX3_P CM61 PCIE_RX3_N CL61

90_AP_PCIE3_RXD_C_P 90_AP_PCIE3_RXD_C_N

PCIE_TX3_P CK63 PCIE_TX3_N CJ63

90_AP_PCIE3_TXD_C_P 90_AP_PCIE3_TXD_C_N

52

C0809

17 17 17

C0810

CK44 PCIE_TX0_P CJ44 PCIE_TX0_N

BJ65 PCIE_PERST0*

PCIE_AP_TO_NAND_RESET_L 1

52 52

PCIE_PERST3* BJ66

PCIE_AP_TO_WLAN_RESET_L 52 1

R0802 LINK0

100K ROOM=SOC

BG66 PCIE_CLKREQ1*

5% 1/32W MF 2 01005 ROOM=SOC

PCIE_CLKREQ2* BE65

NC

CL54 PCIE_REF_CLK1_P CM54 PCIE_REF_CLK1_N NC

PCIE_REF_CLK2_P CK59 PCIE_REF_CLK2_N CJ59

NC

R0806 100K

LINK3

5% 1/32W MF 2 01005

PCIE_BB_BI_AP_CLKREQ_L 90_PCIE_AP_TO_BB_REFCLK_P 90_PCIE_AP_TO_BB_REFCLK_N

52 52 52

2

WLAN RX PP's are now managed on Page 52 CK52 PCIE_RX1_P CJ52 PCIE_RX1_N

K N I L E I C P

PCIE_RX2_P CK56 PCIE_RX2_N CJ56

NC

1

B

C

E I C P

52

NC

90_AP_PCIE2_RXD_C_P 90_AP_PCIE2_RXD_C_N

K N I L

52 52

B

E I C P

LINK 1 USED ON AP_DEV ONLY CM50 PCIE_TX1_P CL50 PCIE_TX1_N

PCIE_TX2_P CM57 PCIE_TX2_N CL57

NC NC

BG64 PCIE_PERST1*

90_AP_PCIE2_TXD_C_P 90_AP_PCIE2_TXD_C_N

52 52

PCIE_PERST2* BE64

NC

LINK1

PCIE_AP_TO_BB_RESET_L 52

LINK2

1

CH57 PCIE_EXT_REF_CLK_P CG57 PCIE_EXT_REF_CLK_N

2

PCIE_REXT CG63

R0801 100K 5% 1/32W MF 01005

ROOM=SOC

AP_PCIE_RCAL 1

R0800 3.01K

2

A

1% 1/32W MF 01005

ROOM=SOC

SYNC_MASTER=Sync


PAGETITLE

SOC:PCIE DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


BRANCH


PAGE

SI ZE

D

A

8

7

6

5

4

3

2

1

SOC - MIPI & ISP INTERFACES D

0.825-0.94V @25mA MAX 18 15 10 8 7

1

PP1V8

C0902

1

20% 6.3V X5R-CERM 01005

2

0.1UF

2

ROOM=SOC

D

1.62-1.98V @7mA MAX

PP0V9_SOC_FIXED

C0900

1

2.2UF

C0901

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

20% 6.3V X5R-CERM 0201-1

3 7 1 1 6 G G G

ROOM=SOC

0 5 9 1 1 1 1 2 G G G G

I P I M _ D E X I F _ D D V

2

C0903 0.1UF

ROOM=SOC

I P I M _ 8 1 D D V

5 7 8 11 12 13 16 17 18 25 29 30 39 46 47 48 52

20% 6.3V X5R-CERM 01005 ROOM=SOC

U0700 CAYMAN-2GB-20NM-DDR-M CSP

45 45

45 45

90_MIPI_NH_TO_AP_DATA0_P 90_MIPI_NH_TO_AP_DATA0_N

A18 MIPI0C_DPDATA0 B18 MIPI0C_DNDATA0

ISP_I2C0_SCL N65 ISP_I2C0_SDA N66

I2C_ISP_UT_SCL I2C_ISP_UT_SDA

90_MIPI_NH_TO_AP_DATA1_P 90_MIPI_NH_TO_AP_DATA1_N

B20 MIPI0C_DPDATA1 C20 MIPI0C_DNDATA1

ISP_I2C1_SCL U64 ISP_I2C1_SDA R65

I2C_ISP_NV_SCL I2C_ISP_NV_SDA

C24 MIPI0C_DPDATA2 NC B24 MIPI0C_DNDATA2 NC

ISP_I2C2_SCL U65 ISP_I2C2_SDA U66

I2C_ISP_NH_SCL I2C_ISP_NH_SDA

A26 MIPI0C_DPDATA3 NC B26 MIPI0C_DNDATA3 NC

ISP_I2C3_SCL W64 NC ISP_I2C3_SDA W66 NC

C 45 45

90_MIPI_NH_TO_AP_CLK_P 90_MIPI_NH_TO_AP_CLK_N

B22 MIPI0C_DPCLK A22 MIPI0C_DNCLK

MIPI0C_REXT

E24 MIPI0C_REXT

90_MIPI_AP_TO_LCM_DATA0_P 90_MIPI_AP_TO_LCM_DATA0_N

B4 MIPID_DPDATA0 A4 MIPID_DNDATA0


B5 MIPID_DPDATA1 C5 MIPID_DNDATA1

SYM3OF 16

48 48

30 46 30 46

48 48

1

33.2

2

1% 1/32W MF 01005

SENSOR_INT AA64NC

C

R0906

Dev ONLY

2

R0900 1 4.02K 1% 1/32W MF

39

01005 ROOM=SOC 2

39

39 39

AP_TO_UT_CLK_R AP_TO_NV_CLK_R AP_TO_NH_CLK_R

SENSOR0_CLK B50 SENSOR1_CLK A48 SENSOR2_CLK C48

D11/111 ONLY

30

46 46

46


C9 MIPID_DPDATA2 B9 MIPID_DNDATA2


A11 MIPID_DPDATA3 B11 MIPID_DNDATA3

33.2

2

1% 1/32W MF 01005

46

39 39

B

26 36

SENSOR0_RST SENSOR1_RST SENSOR2_RST SENSOR3_RST SENSOR4_RST

B7 MIPID_DPCLK A7 MIPID_DNCLK

90_MIPI_AP_TO_LCM_CLK_P 90_MIPI_AP_TO_LCM_CLK_N

NC

MIPID_REXT

BR4 DISP_TOUCH_EB

AP_TO_UT_SHUTDOWN_L AP_TO_NV_SHUTDOWN_L AP_TO_NH_SHUTDOWN_L TP_SENSOR3_RST

25

D11/111 ONLY

30 29

1

SENSOR0_XSHUTDOWN C50 NC SENSOR1_XSHUTDOWN B48

PP

SM

PP0902 P2MM-NSM ROOM=SOC

NC

SENSOR0_ISTRB E52 SENSOR1_ISTRB D50 NC

BN4 DISP_TOUCH_BSYNC0 BR2 DISP_TOUCH_BSYNC1

AP_TO_STROBE_DRIVER_HWEN SPI_AP_TO_MAGGIE_CS_L

A50 E50 AA65 AE64 AC65

25

AP_TO_NH_CLK

29

5% 35V NP0-C0G 01005

R0907 1

ROOM=SOC

D11/111 ONLY

AP_TO_UT_CLK

C0906 100PF

ROOM=SOC

Spare

NOSTUFF 1

NOSTUFF 1

C0907 100PF

2

5% 35V NP0-C0G 01005

Radar 20511449 <--- Needed for Cayman debug; this pin cannot be input

NC_SENSOR0_ISTRB

AP_TO_MUON_BL_STROBE_EN

B

37 46

MIPI1C_REXT E16

E11 MIPID_REXT

MIPI1C_DPDATA0 B12 MIPI1C_DNDATA0 C12

R09011 4.02K

MIPI1C_DPDATA1 B16 MIPI1C_DNDATA1 C16

1% 1/32W MF

01005 2 ROOM=SOC

Dev only

MIPI1C_DPCLK B14 MIPI1C_DNCLK A14 Per Radar 21221938

A

53 28 27 26 25 23 21 19 18 10 4 46 41 40 39 37 35 34 33 31 30

PP_VDD_MAIN

SYNC_MASTER=Sync


PAGETITLE

1

C0904

1

220PF

5% 2 10V C0G-CERM 01005 ROOM=SOC

C0905

1

5% 10V C0G-CERM 01005

5% 2 10V C0G-CERM 01005

220PF

2

ROOM=SOC

C0908 220PF

ROOM=SOC

AC return path for LCM MIPI which is referenced to GND and VDD_MAIN Radar 21203307

1

C0909

1

220PF

5% 2 10V C0G-CERM 01005 ROOM=SOC

SOC:MIPI AND ISP

C0910 220PF

2

DRA WI NG N UMB ER

5% 10V C0G-CERM 01005 ROOM=SOC

Apple Inc.

051-00482 REVISION

8.0.0

R


BRANCH


PAGE

SI ZE

D

A

8

7

6

5

4

3

2

1

D

D 19 16 8

VDD12_PLL_LPDP:1.14-1.26V @3mA MAX VDD12_LPDP:1.14-1.26V @60mA MAX

PP1V2_SOC 1

C1013

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

2

ROOM=SOC

C1001

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

ROOM=SOC

C1004

1

20% 6.3V X5R-CERM 01005

2

0.1UF

C1005

1

10% 6.3V X5R 01005

2

0.01UF

ROOM=SOC

C1002

CKPLUS_WAIVE=PWRTERM2GND CKPLUS_WAIVE=PWRTERM2GND CKPLUS_WAIVE=PWRTERM2GND

15PF

ROOM=SOC

5% 16V NP0-C0G-CERM 01005

5 8 0 5 8 0 2 2 2 3 5 5 6 6 G G G G G G G

ROOM=SOC Desense for Wifi frequencies

X T _ P D P L _ 2 1 D D V

X R _ P D P L _ 2 1 D D V

3 2 G P D P L _ L L P _ 2 1 D D V

U0700 CAYMAN-2GB-20NM-DDR-M CSP 30 30

30

C

30

90_LPDP_NV_TO_AP_D0_P 90_LPDP_NV_TO_AP_D0_N

A54 LPDPRX_RX_D0_P B54 LPDPRX_RX_D0_N

90_LPDP_NV_TO_AP_D1_P 90_LPDP_NV_TO_AP_D1_N

B56 LPDPRX_RX_D1_P C56 LPDPRX_RX_D1_N

LPDP_TX1P A29 NC LPDP_TX1N B29 NC

90_LPDP_UT_TO_AP_D2_P 90_LPDP_UT_TO_AP_D2_N


LPDP_TX2P B31 NC LPDP_TX2N C31 NC

90_LPDP_UT_TO_AP_D3_P 90_LPDP_UT_TO_AP_D3_N

B63 LPDPRX_RX_D3_P C63 LPDPRX_RX_D3_N

LPDP_TX3P A33 NC LPDP_TX3N B33

SYM4OF 16

LPDP_TX0P B27 NC LPDP_TX0N C27 NC

Dev ONLY

C

LPDP Lanes swapped between D10 and D11 25 25

D11/111 ONLY 25 25


GND ON MLB; other on Dev

D11/111 ONLY

30

LPDP_NV_BI_AP_AUX

25

LPDP_UT_BI_AP_AUX

D54 E56 D61 E63 NC D64 NC

NC

LPDP_AUX_P D33 NC LPDP_AUX_N E33 NC

LPDPRX_AUX_D0_P LPDPRX_AUX_D1_P LPDPRX_AUX_D2_P LPDPRX_AUX_D3_P LPDPRX_AUX_D4_P

LPDP_CAL_DRV_OUT E35 NC LPDP_CAL_VSS_EXT E31 NC

B59 LPDPRX_BYP_CLK_P C59 LPDPRX_BYP_CLK_N

GND ON MLB; other on Dev

EDP_HPD BN3 NC DP_WAKEUP AP2 NC

B

B

A57 LPDPRX_RCAL_P

PP0V9_SOC_FIXED

18 15 9 8 7

Reserved for PanelID[1:0] on ap_dev board Reserved for PanelID[1:0] on ap_dev board

R10011 300

1% 1/32W MF 01005-1 2 ROOM=SOC

C1006

NC

5% 16V NP0-C0G 2 01005 ROOM=SOC

A

B57 LPDPRX_RCAL_N

AP_LPDPRX_RCAL_NEG

1

100PF

D57 LPDPRX_EXT_C

#24401637:Unconnect LPDPRX_EXT_C

53 28 27 26 25 23 21 19 18 9 4 46 41 40 39 37 35 34 33 31 30

PP_VDD_MAIN SYNC_MASTER=Sync

1

C1010

1

33PF

5% 2 16V NP0-C0G-CERM 01005 ROOM=SOC

C1011


PAGETITLE

SOC:LPDP

33PF

2

5% 16V NP0-C0G-CERM 01005

DRA WI NG N UMB ER

Apple Inc.

ROOM=SOC

051-00482 REVISION

8.0.0

R

AC return path for LCM LPDP which is referenced to GND and VDD_MAIN


BRANCH


PAGE

SI ZE

D

A

8

7

6

5

4

3

2

1

SOC - SERIAL INTERFACES D

D R1103 32

I2S_AP_TO_CODEC_MCLK

1

33.2

2

1% 1/32W MF 01005

32 32

ROOM=SOC

32 32

BV65 BY66 BU64 BR64 BU65

I2S_AP_TO_CODEC_MCLK_R I2S_AP_TO_CODEC_MSP_BCLK I2S_AP_TO_CODEC_MSP_LRCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT I2S1/2/3 MCLK NC #24559456

53 53 53 53

36 35 34 33 32 36 35 34 33 32 36 36

C

53 53 53 53

I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK I2S_MAGGIE_TO_AP_DIN I2S_AP_TO_MAGGIE_DOUT

BOARD_ID2 BOARD_ID1

5

BOARD_ID3

36 32

SPI_AP_TO_CODEC_MAGGIE_SCLK

Route as daisy-chain. No T's allowed.

1

0.00

36 32 36 32

2

0% 1/32W MF 01005

32

R1101

39

BU66 BR66 BN64 BN65 BJ64

I2S2_MCK I2S2_BCLK I2S2_LRCK I2S2_DIN I2S2_DOUT

CH11 CM7 CK9 CG18 CJ9


NC

U0700 CAYMAN-2GB-20NM-DDR-M CSP SYM6OF 16

SPI_AP_TO_TOUCH_SCLK

1

0.00 0% 1/32W MF 01005

39

2 39

CB2 BY4 BY3 NC CB4

SPI0_MISO SPI0_MOSI SPI0_SCLK SPI0_SSIN

I2C1_AP_SCL I2C1_AP_SDA

I2C2_SCL U3 I2C2_SDA U4


I2C3_SCL AE66 I2C3_SDA AE65


N2 N3 N4 R3

SPI1_MISO SPI1_MOSI SPI1_SCLK

SPI_CODEC_MAGGIE_TO_AP_MISO SPI_AP_TO_CODEC_MAGGIE_MOSI SPI_AP_TO_CODEC_MAGGIE_SCLK_R SPI_AP_TO_CODEC_CS_L SPI_TOUCH_TO_AP_MISO SPI_AP_TO_TOUCH_MOSI SPI_AP_TO_TOUCH_SCLK_R SPI_AP_TO_TOUCH_CS_L

C44 B44 A44 D44

47 47

47 47

47 47

47 47

C I2C5_SCL I2C5_SDA

11 47 11 47

GPIO_42 CH20NC GPIO_43 CH22NC

PP1V8 1

R1113 10K

5% 1/32W MF 01005 2 ROOM=SOC PMU_SCLK AH65 PMU_MISO AH66 PMU_MOSI AK64

SPI1_SSIN

DWI_CLK AK65 DWI_DO AM64


SPI_PMGR_TO_PMU_SCLK SPI_PMU_TO_PMGR_MISO SPI_PMGR_TO_PMU_MOSI

38 38 38

SPI_MESA_TO_AP_MISO SPI_AP_TO_MESA_MOSI SPI_AP_TO_MESA_SCLK MESA_TO_AP_INT

B42 A42 E44 C42


5 7 8 9 11 12 13 16 17 18 25 29 30 39 46 47 48 52

R1114 10K

5% 1/32W MF 01005 2 ROOM=SOC

20 20

DWI_PMGR_TO_BACKLIGHT_CLK DWI_PMGR_TO_BACKLIGHT_DATA

37 46 37 46

PMU_TO_AP_PRE_UVLO_L PMU_TO_AP_THROTTLE_GPU_L

SOCHOT AG4 38

1

20

DROOP AE3 GPU_TRIGGER BY2

ROOM=SOC

B


I2C1_SCL AG64 I2C1_SDA AG66

SPI4_SCLK CJ12NC SPI4_MISO CG22NC SPI4_MOSI CM9NC

ROOM=SOC

39

I2C0_SCL CK7 I2C0_SDA CG12

I2C5_SCL CH16 I2C5_SDA CJ14

BOARD_ID0

R1116


NC

I2S_BB_TO_AP_BCLK I2S_BB_TO_AP_LRCLK I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT

5

5

D48 E48 A46 C46 E46

NC

I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_LRCLK I2S_BT_TO_AP_DIN I2S_AP_TO_BT_DOUT


20 20

AP_TO_PMU_SOCHOT_L

CLK32K_OUT AM66

AP_TO_CUMULUS_CLK32K

NAND_SYS_CLK BN66

AP_TO_NAND_SYS_CLK_R

20

B

39

R1118

1

0.00

2

AP_TO_NAND_SYS_CLK17

0% 1/32W MF 01005

ROOM=SOC

I2C5

See Radar#25316444 for Details 25 18 17 16 13 12 11 9 8 7 5 52 48 47 46 39 30 29

PP1V8 1

1 A

C1101 1.0UF

20% 6.3V 2 X5R 0201-1

VCC

U1101

ROOM=SOC

A

B1

SCL

WLCSP

SDA A2

VSS

I2C5_SDA I2C5_SCL

11 47 11 47

To Cayman

SYNC_MASTER=Sync


PAGETITLE

SOC:SERIAL

ROOM=SOC

2 CRITICAL B

DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


BRANCH


PAGE

SI ZE

D

A

8

7

6

5

4

3

2

1

D

D

SOC - GPIO INTERFACES

BB64 BC65 BB66 AY65 AY66 NC AV65 AV67 AT67 AT66 AT64 AP66 AP65 AH64 AE4 AC3 AE2 BB2 BB4 BC3 NC BC4 BE2 NC BE4 BE3 BG2 CJ11 CL9 NC CH14 CK11 CG20 AA2 NC AA3 D42 E42 A41 C41 E41 A39 AT4 AT2 AV3 NC

27 36

#24557547:Delete R1204

44 20

AP_TO_ACC_BUCK_VSEL AP_TO_MAGGIE_CRESETB_L BUTTON_VOL_UP_L DEV ONLY

53

AP_TO_BB_RESET_L

MAGGIE_TO_AP_CDONE

36

RESERVERD FOR SSHB ID ON DEV BOARD D101/D111 ONLY D101/D111 ONLY

C

53

D101/D111 ONLY

NC_AP_TO_BB_IPC_GPIO2 NC_AP_TO_GNSS_WAKE AP_TO_BB_TIME_MARK NC_AP_TO_GNSS_TIME_MARK

BB_TO_AP_RESET_DETECT_L AP_TO_SPKAMP2_RESET_L 29 ALS_TO_AP_INT_L

53 29 25 18 17 16 13 11 9 8 7 5 52 48 47 46 39 30

PP1V8 1 Nostuff per #24511702

NOSTUFF

R1210 10K 5% 1/32W MF 01005

33

53 17 39

2 ROOM=SOC 20

AP_TO_NFC_FW_DWLD_REQ

AP_TO_NAND_FW_STRAP TOUCH_TO_AP_INT_L BOOT_CONFIG0

PMU_TO_AP_THROTTLE_CPU_L #24608280 53

D10/D11 ONLY

53 39 36

AP_TO_BBPMU_RADIO_ON_L AP_TO_ICEFALL_FW_DWLD_REQ AP_TO_LCM_RESET_L AP_BI_HOMER_BOOTLOADER_ALIVE BOOT_CONFIG1

20 4

Dev only 5

PMU_TO_AP_FORCE_DFU NC_DFU_STATUS PP1V8 BOARD_ID4

53

53

PMU_TO_AP_BUF_RINGER_A AP_TO_BT_WAKE AP_TO_WLAN_DEVICE_WAKE BOARD_REV3 BOARD_REV2 BOARD_REV1 BOARD_REV0 AP_TO_TOUCH_MAMBA_RESET_L AP_TO_BB_MESA_ON AP_TO_BB_COREDUMP

53

AP_TO_BB_IPC_GPIO1

20 53 53 5

B

AP_TO_NFC_DEV_WAKE

5 5 5 39 53

20 20

PMU_TO_AP_BUF_POWER_KEY_L PMU_TO_AP_BUF_VOL_DOWN_L

AY2 AY3 BU2 BU3

GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8 GPIO_9 GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14 GPIO_15 GPIO_16 GPIO_17 GPIO_18 GPIO_19 GPIO_20 GPIO_21 GPIO_22 GPIO_23 GPIO_24 GPIO_25 GPIO_26 GPIO_27 GPIO_28 GPIO_29 GPIO_30 GPIO_31 GPIO_32 GPIO_33 GPIO_34 GPIO_35 GPIO_36 GPIO_37 GPIO_38 GPIO_39 GPIO_40 GPIO_41


SYM5OF 16

TMR32_PWM0 AG2 NC TMR32_PWM1 AH4 PROX_BI_AP_AOP_INT_PWM_L TMR32_PWM2 AH3 NC_BB_TO_AP_RESET_ACT_L UART0_RXD CL5 UART0_TXD CJ7

UART_AP_DEBUG_RXD UART_AP_DEBUG_TXD

UART1_CTS* UART1_RTS* UART1_RXD UART1_TXD

E39 D39 C39 B39

UART_BT_TO_AP_CTS_L UART_AP_TO_BT_RTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_TXD


AM4 AK3 AK4 AH2

NC_AP_UART2_CTS_L NC_AP_UART2_RTS_L NC_AP_UART2_RXD NC_AP_UART2_TXD


AA4 W2 W4 U2

UART_NFC_TO_AP_CTS_L UART_AP_TO_NFC_RTS_L UART_NFC_TO_AP_RXD UART_AP_TO_NFC_TXD


D37 C37 B37 A37

UART_WLAN_TO_AP_CTS_L UART_AP_TO_WLAN_RTS_L UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_TXD

UART5_RTXD BG4

SWI_AP_BI_TIGRIS

13 29

D101/D111 ONLY

C

40 40

53 53 53 53

D101/D111 ONLY; for GNSS

53 53 53 53

53 53 53 53

21

B

UART6_RXD CG16 UART6_TXD CG14

UART_ACCESSORY_TO_AP_RXD UART_AP_TO_ACCESSORY_TXD

UART7_RXD AP3 UART7_TXD AM2

UART_HOMER_TO_AP_RXD UART_AP_TO_HOMER_TXD

40 40

36 36

REQUEST_DFU1 REQUEST_DFU2

#25120460:REQUEST_DFU Assignment

A

SYNC_MASTER=S ync


PAGETITLE

SOC:GPIO & UART DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


BRANCH


PAGE

SI ZE

D

A

8

7

6

5

4

3

2

1

SOC - AOP D

D

PP1V8 1

5 7 8 9 11 12 16 17 18 25 29 30 39 46 47 48 52

NOSTUFF

R1304 1.00K

U0700 CAYMAN-2GB-20NM-DDR-M

2

CSP

20 20 15

#24512059: Remove R1300 PU

24 24

Use internal pullup in SOC (AOP side).

29 12 24 24 24

C

24 53 39 23 20 40 36

20

1

49.9 2 1% 1/32W MF 01005

#25756894:South Carbon R2

24

SPI_AOP_TO_IMU_SCLK_R2

1

AUDIO_TO_AOP_INT_L AOP_TO_MESA_I2C_ISO_EN PMU_TO_AOP_IRQ_L I2C_AOP_SCL I2C_AOP_SDA

CM11 AOP_I2C0_SCL CJ24 AOP_I2C0_SDA

SPI_IMU_TO_AOP_MISO 24 SPI_AOP_TO_IMU_MOSI 24 SPI_AOP_TO_IMU_SCLK

R1305 SPI_AOP_TO_IMU_SCLK_R1

53

ROOM=SOC

53

R1306

36

49.9 2

UART_BB_TO_AOP_RXD UART_AOP_TO_BB_TXD

SYM7OF 16

CFSB_AOP CH35 AWAKE_REQ CM31 AWAKE_RESET* CJ37 AOP_PDM_CLK0 CM37 AOP_PDM_DATA0 CH41 AOP_PDM_DATA1 CK39 RT_CLK32768 CM33 AOP_SWD_TCK_OUT CL14 AOP_SWD_TMS0 AOP_SWD_TMS1 SWD_TMS2 SWD_TMS3

CL16 CG35 BU4 BV3

CJ22 AOP_UART1_RXD CL11 AOP_UART1_TXD CG29 AOP_UART2_RXD CH29 AOP_UART2_TXD

32

I2S_CODEC_XSP_TO_AOP_BCLK I2S_CODEC_XSP_TO_AOP_DIN I2S_AOP_TO_MAGGIE_L26_MCLK_R I2S_CODEC_XSP_TO_AOP_LRCLK

CL35 CJ39 CM35 CK37

AOP_I2S_BCLK AOP_I2S_DIN AOP_I2S_MCK AOP_I2S_LRCK

DOCK_ATTENTION CG41

32

I2S_AOP_TO_CODEC_XSP_DOUT

CG39 AOP_I2S_DOUT

DOCK_CONNECT CL37

39

PMU_TO_SYSTEM_COLD_RESET_L

7 20

AOP_TO_PMU_ACTIVE_REQUEST PMU_TO_AOP_TRISTAR_ACTIVE_READY

20 7 20 37 40

AOP_TO_MESA_BLANKING_EN AOP_TO_WLAN_CONTEXT_B AOP_TO_WLAN_CONTEXT_A

38 53 53

PMU_TO_AOP_CLK32K

20

SWD_AP_TO_MANY_SWCLK

17 36 53

HOMER_TO_AOP_WAKE_INT SWD_AOP_BI_BB_SWDIO SWD_AP_BI_NAND_SWDIO SWD_AP_BI_HOMER_SWDIO

C

36 53

BB_SWDIO has pullup in Radio_MLB pages

17 36

CK14 AOP_UART0_RXD CJ20 AOP_UART0_TXD

UART_TOUCH_TO_AOP_RXD UART_AOP_TO_TOUCH_TXD

39

ROOM=SOC

CJ18 AOP_SPI_MISO CJ27 AOP_SPI_MOSI CJ16 AOP_SPI_SCLK

MAGGIE_TO_AOP_INT UART_AOP_TO_MAGGIE_TXD

36

1% 1/32W MF 01005

AOP_FUNC_0 AOP_FUNC_1 AOP_FUNC_2 AOP_FUNC_3 AOP_FUNC_4 AOP_FUNC_5 AOP_FUNC_6 AOP_FUNC_7 AOP_FUNC_8 AOP_FUNC_9 AOP_FUNC_10 AOP_FUNC_11 AOP_FUNC_12 AOP_FUNC_13 AOP_FUNC_14 AOP_FUNC_15

CK24 CK29 CK22 CM12 CK31 CG33 CJ33

BOT_ACCEL_GYRO_TO_AOP_DATARDY

48

24

CK12 CK16 CK18 CJ29 CG31 CH31 CK20 CJ31 CK27

PHOSPHORUS_TO_AOP_INT_L SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L

48

#25756894:North Carbon R1

SPI_AOP_TO_COMPASS_CS_L COMPASS_TO_AOP_INT PROX_BI_AP_AOP_INT_PWM_L ACCEL_GYRO_TO_AOP_DATARDY SPI_AOP_TO_ACCEL_GYRO_CS_L ACCEL_GYRO_TO_AOP_INT SPI_AOP_TO_PHOSPHORUS_CS_L LCM_TO_MANY_BSYNC TRISTAR_TO_AOP_INT AOP_TO_MAGGIE_EN

24

48

Radar 21210869

CM16 AOP_DDR_REQ CM29 AOP_DDR_RESET*

24

24

35 34 33 32

Plan to use internal pullup in AOP.

AOP_TO_PMU_SLEEP1_REQUEST PMU_TO_AOP_SLEEP1_READY

5% 1/32W MF 01005

ROOM=SOC

B

R1303 36 35 34 33

I2S_AOP_TO_MAGGIE_L26_MCLK

1

33.2 1% 1/32W MF 01005

ROOM=SOC

A

32 32

2

B AOP_TO_SPKAMP1_ARC_RESET_L 34 MESA_TO_AOP_FDINT 38

35

DOCK_CONNECT can be GPIO, but input only. Radar 21680759

SYNC_MASTER=S ync


PAGETITLE

SOC:AOP DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


BRANCH


PAGE

SI ZE

D

A

8

7

6

5

4

3

2

1

SOC - CPU, GPU & SOC RAILS PP_CPU_VAR

14 18

PP1401

SM

P2MM-NSM

PP

1

PP_GPU_VAR

14 18

1

PP_CPU_VAR

14 18

PP_SOC_VAR

ROOM=SOC

1.06V @17.4A MAX 0.9V @tbd A MAX 0.625V @tbd A MAX

PP1402 P2MM-NSM

SM PP

1

ROOM=SOC 1

C1401

1

15UF

D

ROOM=SOC

20% 2 6.3V X5R 0402-1

ROOM=SOC

3

1

2 4

7.5UF 3

1

2 4

ROOM=SOC

ROOM=SOC

C1422

20% 4V CERM 0402

4.3UF

3

1

2 4

ROOM=SOC

20% 4V CERM 0402

3

ROOM=SOC

ROOM=SOC

C1423

4.3UF

4.3UF

1UF

1UF

1

3

1

2 4

3

1

2 4

1

3

4.3UF

3

1

ROOM=SOC

3

1

2 4

3

ROOM=SOC

C1428 20% 4V CERM 0402

20% 4V CERM 0402

2 4

C1431

1UF

20% 4V CERM 0402 1

2 4

ROOM=SOC

2 4

C1418 20% 4V CERM 0402

20% 4V CERM 0402

2 4

C1412 20% 4V CERM 0402

XW1401 SHORT-20L-0.05MM-SM C1430

4.3UF

C1405 20% 4V CERM 0402

ROOM=SOC

C1427

1UF

20% 4V CERM 0402 1

3

2 4

3

2 4

C ROOM=SOC

ROOM=SOC

C1406 0.47UF 1

20% 6.3V CERM 0402

ROOM=SOC

C1413 0.47UF

3

1

2 4

20% 6.3V CERM 0402

ROOM=SOC

C1419

C1424

0.47UF

3

1

2 4

20% 6.3V CERM 0402

ROOM=SOC

0.47UF

3

1

2 4

20% 6.3V CERM 0402

ROOM=SOC

C1460

3

C1461

7.5UF 1

2 4

20% 4V CERM 0402

7.5UF 20% 4V CERM 0402 1

3

2 4

3

2 4

AD10 AD15 AD19 AD23 AF13 AF17 AJ23 AL21 AL8 AN10 AN19 AN23 AR13 AR17 AR21 AU10 AU15 AW13 AW17 AW21 BA10 BA23 BD21 BD8 BF10 BF23 BH13 BH17 BH21 BK10 BK15 AJ10

U0700 CAYMAN-2GB-20NM-DDR-M CSP SYM8OF 16

VDD_CPU

VDD_GPU

OMIT

XW1402

18

BUCK0_PP_CPU_FB

1.06V @1.0A MAX 0.80V @TBDA MAX 18

ROOM=SOC

20% 4V CERM 0402

B

NO_XNET_CONNECTION

ROOM=SOC

7.5UF 1

3 2

C1435

ROOM=SOC

C1433 7.5UF

7.5UF 20% 4V CER 0402

1

4

3 2

1

20% 4V CERM 0402

3

1

C1458 10UF

20% 2 6.3V CERM-X5R 0402-9 ROOM=SOC

PP_GPU_SRAM_VAR ROOM=SOC

ROOM=SOC

C1439

C1437 7.5UF

7.5UF 20% 4V CER 0402

1

3 2 4

A

AF8 AN15 AR8 AU19 AW8 BA15 BA19 BH8

AB13 AB17 AB21 AB25 AB43 AB47 AB51 AB55 AD40 AD45 AD49 AD53 AF55 AJ40 AJ49 AJ53 J25 J30 J38 J43 J47 J51 L15 L19 L23 L28 L32 L36 L40 L45 L49 L53 P13 T15 T36 T40 T53 V13 V25 V34 V38 V51 V55 Y28

1

OMIT

BUCK1_PP_GPU_FB

2

ROOM=SOC

1

20% 4V CERM 0402

3

1

C1459 10UF

20% 2 6.3V CERM-X5R 0402-9 ROOM=SOC

1

20% 6.3V CERM-X5R 0402-9 ROOM=SOC

OMIT

10UF

10UF 2

20% 6.3V CERM-X5R 0402-9

2

18

0.80V @4.1A MAX 0.67V @TBDA MAX

C1403

XW1403

SHORT-20L-0.05MM-SM 1

ROOM=SOC

1.03V @12.9A MAX 0.92V @10.7A MAX 0.80V @TBD A MAX 0.67V @TBD A MAX

18

NO_XNET_CONNECTION

PP_GPU_VAR

1

1

C1414 15UF

20% 2 6.3V X5R 0402-1 ROOM=SOC

ROOM=SOC

C1402 4.3UF 1

20% 4V CERM 0402

3

2

1

C1466 2.2UF

2

BUCK2_PP_SOC_FB

18

D

ROOM=SOC

20% 6.3V X5R-CERM 0201-1

ROOM=SOC

ROOM=SOC

C1409 1

2 4

3

AF43 AF47 AF51 P17 P21 P25 P30 P34 P38 P43 P47 P51 Y15 Y19 Y23 Y40 Y45 Y49 Y53

ROOM=SOC

ROOM=SOC

ROOM=SOC

ROOM=SOC

C1452

C1454

C1416

C1421

C1426

4.3UF

4.3UF

7.5UF

7.5UF

7.5UF

1

2 4

20% 4V CERM 0402

3

1

20% 4V CERM 0402

2 4

ROOM=SOC

ROOM=SOC

1

1UF 3

1

20% 4V CERM 0402

2 4

2 4

1

20% 4V CERM 0402

3

1

2 4

C1415

1UF 20% 4V CERM 0402

3

2 4

C1410

ROOM=SOC

1UF

3

20% 4V CERM 0402 1

20% 4V CERM 0402

3

1

2 4

C1420 3

2 4

VDD_CPU_SENSE BK23

20% 4V CERM 0402

1

PP

SM

PP1403

1

P2MM-NSM

VDD_SOC_SENSE AL47

R OO M= S OC

TP_VDD_SOC_SENSE

1

TP_VSS_SENSE

1

PP

SM

PP

SM

PP1410 P2MM-NSM PP1411 P2MM-NSM ROOM=SOC

1

20% 4V CERM 0402

3

2 4

R OO M= S OC

ROOM=SOC

ROOM=SOC

C1429

C1456

C1457

0.47UF

0.47UF

0.47UF

1

20% 6.3V CERM 0402

3

1

PP1408 P2MM-NSM

SM PP

ROOM=SOC

1

3

0.47UF

AP_VDD_GPU_SENSE 20

ROOM=SOC

VSS_SENSE AJ47

1

3

1

2 4

20% 4V CERM 0402

ROOM=SOC

C1442 0.47UF

3

1

20% 6.3V CERM 0402

2 4

3

2 4

ROOM=SOC

C1425

2 4

ROOM=SOC

VDD_GPU_SENSE AJ45

VDD_GPU_SRAM

3

20% 4V CERM 0402

C1432 7.5UF

2 4

AP_VDD_CPU_SENSE 20 TP_AP_VSS_CPU_SENSE

7.5UF

2 4

VDD_CPU_SRAM

VSS_CPU_SENSE BK21

ROOM=SOC

C1440

1UF

20% 4V CERM 0402

ROOM=SOC

4.3UF 20% 4V CERM 0402

ROOM=SOC

C1438

4.3UF 1

20% 6.3V X5R-CERM 0201-1

2

ROOM=SOC

ROOM=SOC

C1465 14 18

C1448 2.2UF

2 4

4

1.03V @1.44A MAX 0.92V @1.50A MAX 0.80V @TBD A MAX 18

1

ROOM=SOC

PP_CPU_SRAM_VAR

C1407


C1444

NO_XNET_CONNECTION

ROOM=SOC

ROOM=SOC


20% 6.3V X5R-CERM 0201-1

1

10UF 2

C1449 2.2UF

2

C1417

7.5UF 20% 4V CERM 0402

1

C1434 15UF

C1411

7.5UF 1

1

20% 2 6.3V X5R 0402-1

C1404 20% 4V CERM 0402

C1408 15UF

20% 2 6.3V X5R 0402-1

C1436

PP1409 P2MM-NSM

SM PP

ROOM=SOC

20% 6.3V CERM 0402

2 4

3

1

20% 6.3V CERM 0402

2 4

3

1

20% 6.3V CERM 0402

2 4

3

AD28 AD32 AF60 AJ28 AJ32 AJ36 AL6 AN28 AN32 AN36 AN40 AN45 AN49 AN53 AN58 AR25 AR30 AR34 AR38 AR43 AR47 AR51 AR55 AW30 AW34 AW38 AW43 AW47 AW51 AW55 AW60 BD25 BD30 BD34 BD38 BD43 BD47 BD51 BD55 BD6 BD60 BF28 BF32 BF36 BF45 BF49 BF53 BF58 BK28 BK32 BK36 BK40


SYM9OF 16

VDD_SOC

VDD_SOC

BK45 BK49 BK53 BM55 BP15 BP19 BP23 BP28 BP32 BP36 BP40 BP45 BP49 BP53 BP58 BT13 BT17 BT21 BT25 BT30 BT34 BT38 BT43 BT47 BT51 BT55 BW10 CA13 CA17 CA21 CA25 CA30 CA34 CA38 CA43 CA47 CE13 CE17

C

B

CE45 J13 J21 J34 P55 T10 T60 V30 Y10 Y36 Y60 BF40 J60 AW25

2 4

SYNC_MASTER=Sync


PAGETITLE

SOC:POWER (1/3) DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


BRANCH


PAGE

SI ZE

D

A

8

7

6

5

4

3

2

1

SOC - POWER SUPPLIES DDR IMPEDANCE CONTROL 18 15 7

1.06-1.17V @0.85A MAX 18 15 7

D

1 1

1

C1506 10UF

20% 6.3V 2 CERM-X5R 0402-9

C1528 10UF

20% 6.3V 2 CERM-X5R 0402-9

ROOM=SOC

ROOM=SOC

TBD-TBDV @1.9A MAX 18 10 9 8 7

PP0V9_SOC_FIXED ROOM=SOC

C1527

4.3UF

1UF

1

20% 4V CERM 0402

3

2 4

1

ROOM=SOC

C1502

20% 4V CERM 0402 1

ROOM=SOC

C1503 7.5UF 20% 4V CERM 0402 1

3

2 4

3

2 4

C1501 10UF

2

C

20% 6.3V CERM-X5R 0402-9

ROOM=SOC

B

0.797-0.945V @9 mA MAX 0.765-0.840V @60mA MAX 19

PP0V8_AOP 1

C1504 2.2UF

AB30 AB34 AB38 AD58 AF25 AF30 AF34 AF38 AF62 AJ58 AL25 AL30 AL34 AL38 AL43 AL51 AL55 AL60 AR60 AU28 AU32 AU36 AU40 AU45 AU49 AU53 AU58 AU6 BA28 BA32 BA36 BA40 BA45 BA49 BA53 BA58 BH25 BH30 BH34 BH38 BH43 BH47 BH51 BH55 BK58

AW23

CC36 CE30 CE40

PP1V1

PP1V1


SYM10OF 16

VDD_FIXED

VDD_FIXED_CPU

VDD_LOW

VDD_FIXED

BK6 BM13 BM17 BM21 BM25 BM30 BM34 BM38 BM43 BM47 BM51 BP10 BP60 BW15 BW19 BW23 BW28 BW32 BW36 BW40 BW45 BW49 BW53 BW58 BW8 CC10 CC15 CC19 CC23 CC28 CC32 CC45 G32 G36 J17 J23 J55 J62 L10 L58 L60 T32 T58 T8 Y58 Y8

1

2

C1518 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC

1

2

C1519 2.2UF 20% 6.3V X5R-CERM 0201-1

ROOM=SOC

1

C1514 2.2UF

20% 6.3V 2 X5R-CERM 0201-1 ROOM=SOC

1

2

1% 1/32W MF 2 01005

20% 6.3V X5R-CERM 0201-1

ROOM=SOC

R1501 240

C1522 2.2UF

ROOM=SOC

BE1 BJ1 BL1 BM8 BP6 BT8 BW6 CA8 CC6 CD1 CH1

U0700 CAYMAN-2GB-20NM-DDR-M CSP VDDIO11_DDR0

SYM11OF 16

DDR0_RREF DDR1_RREF DDR2_RREF DDR3_RREF

CD3 BY64 K3 K65

DDR0_ZQ BN2 DDR3_ZQ AA66 DDR0_RET* DDR1_RET* DDR2_RET* DDR3_RET*

CF3 CB65 K4 K64

VDDIO11_PLL_DDR0 VDDIO11_PLL_DDR1 VDDIO11_PLL_DDR2 VDDIO11_PLL_DDR3

CE8 BW60 J8 P58

1

R1502 240

1

ROOM=SOC

BJ67 BK62 BL67 BM60 BP62 BT60 BW62 CD67 CH67

AB8 AC1 AE1 AH1 E1 K1 L6 P8 T6 V8 Y6

1

ROOM=SOC

R1505

1

240

1% 1/32W MF 2 01005

ROOM=SOC

R1506

D

240

1% 1/32W MF 01005 2 ROOM=SOC

1% 1/32W MF 01005 2 ROOM=SOC

DDR0_RREF DDR1_RREF DDR2_RREF DDR3_RREF DDR0_ZQ DDR3_ZQ PMU_TO_AOP_SLEEP1_READY

13 20

FL1501 100OHM-25%-0.12A

PP1V1_DDR_PLL 1

C1508

1

20% 6.3V X5R 01005-1

1

C1509

0.22UF 2

1

0.22UF 2

ROOM=SOC

20% 6.3V X5R 01005-1

ROOM=SOC

C1523

1

0.22UF 2

20% 6.3V X5R 01005-1

2

PP1V1

7 15 18

01005

C1510

ROOM=SOC

0.22UF 20% 6.3V X5R 01005-1

2

ROOM=SOC

ROOM=SOC

VDDIO11_DDR1

C

(CURRENT INCLUDED IN VDD2) VDDIO11_RET_DDR0 VDDIO11_RET_DDR1 VDDIO11_RET_DDR2 VDDIO11_RET_DDR3

CG3 CD65 H4 H64

PP1V1_SDRAM

DDR0_SYS_ALIVE DDR1_SYS_ALIVE DDR2_SYS_ALIVE DDR3_SYS_ALIVE

CF4 CB64 H3 H65

SYSTEM_ALIVE

VDDIO11_DDR2

VDD2

AB60 AC67 AD62 AE67 AH67 E67 K67 P60 T62 V60 Y62

R1504 240

1% 1/32W MF 2 01005

1.06 - 1.17V @4mA MAX

BE67 BH60

1

R1503 240

1% 1/32W MF 2 01005

VDDIO11_DDR3

AM3 AM65 BB3 BB65 BR1 BR67 BV1 BV67 BY1 BY67 C2 C66 CJ2 CJ66 CK2 CK66 D2 D66 N1 N67 R1 R67 W1 W67

15 18 19

17 20 21

1.06 - 1.17V @1.74A MAX

PP1V1_SDRAM 1

C1512

1

10UF 2


C1513

1

10UF 2

20% 6.3V CERM-X5R 0402-9

ROOM=SOC

C1507

1

2.2UF 2

20% 6.3V X5R-CERM 0201-1

ROOM=SOC

C1529 2.2UF

2

20% 6.3V X5R-CERM 0201-1

ROOM=SOC

1

C1511 2.2UF

20% 2 6.3V X5R-CERM 0201-1

ROOM=SOC

1

15 18 19

B

C1515 2.2UF

20% 2 6.3V X5R-CERM 0201-1

ROOM=SOC

20% 6.3V 2 X5R-CERM 0201-1 ROOM=SOC

A

SYNC_MASTER=Sync


PAGETITLE

SOC:POWER (2/3) DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


BRANCH


PAGE

SI ZE

D

A

8

7

6

5

4

3

2

1

SOC - POWER SUPPLIES

D

C

B

A12 A16 A2 A20 A24 A27 A31 A35 A5 A52 A56 A59 A63 A66 A9 AA1 AA67 AB10 AB15 AB19 AB23 AB28 AB32 AB36 AB40 AB45 AB49 AB53 AB58 AB6 AB62 AC2 AC4 AC64 AC66 AD13 AD17 AD21 AD25 AD30 AD34 AD43 AD47 AD51 AD55 AD60 AD8 AF10 AF15 AF19 AF23 AF28 AF32 AF36 AF40 AF45 AF49 AF53 AF58 AF6 AG1 AG3 AG65 AG67 AJ21 AJ25 AJ30 AJ34 AJ38 AJ43 AL10 AJ51 AJ55 AJ8 AK1 AK2 AK66 AK67

A


SYM13OF 16

VSS

VSS

AL23 AL28 AL32 AL36 AL40 AL45 AL53 AL58 AL62 AN13 AN17 AN21 AN25 AN30 AN34 AN38 AN43 AN47 AN51 AN55 AN60 AN8 AP1 AP4 AP64 AP67 AR10 AR15 AR19 AR28 AR32 AR36 AR40 AR45 AR49 AR53 AR58 AR6 AR62 AT1 AT3 AT65 AU13 AU17 AU21 AU25 AU30 AU34 AU38 AU43 AU47 AU51 AU55 AU60 AU8 AV1 AV2 AV4 AV64 AV66 AW10 AW15 AW19 CH50 AW28 AW32 AW36 AW40 AW45 AW49 AW53 AW58 AW6 AW62 AY1 AY4 AY64 AY67

B1 B3 B35 B41 B46 B52 B65 B67 BA13 BA17 BA21 BA30 BA34 BA38 BA43 BA47 BA51 BA55 BA60 BA8 BC1 BC2 BC66 BC67 BD10 BD23 BD28 BD32 BD36 BD40 BD45 BD49 BD53 BD58 BD62 BF21 BF25 BF30 BF34 BF43 BF47 BF51 BF55 BF8 BG1 BG3 BG65 BG67 BH10 BH15 BH19 BH23 BH28 BH32 BH36 BH40 BH45 BH49 BH53 BH58 BH6 BH62 BK13 BK17 AL49 BK25 BK30 BK34 BK38 BK43 BK47 BK51 BK55 BK60 BK8 BL2 BL4 BL64

BL66 BM10 BM15 BM19 BM23 BM28 BM32 BM36 BM40 BM45 BM49 BM53 BM58 BM6 BM62 BN1 BN67 BP13 BP17 BP21


SYM14OF 16

VSS

VSS

BP25 BP30 BP34 BP38 BP43 BP47 BP51 BP55 BP8 BR3 BR65 BT10 BT15 BT19 BT23 BT28 BT32 BT36 BT40 BT45 BT49 BT53 BT58 BT6 BT62 BU1 BU67 BV2 BV4 BV64 BV66 BW13 BW17 BW21 BW25 BW30 BW34 BW38 BW43 BW47 BW51 CE51 BY65 C11 C14 C18 C22 C26 C29 C33 C35 C4 C52 C54 C57 C61 C64 C7 CA10

CA15 CA19 CA23 CA28 CA32 CA36 CA40 CA45 CA49 CA53 CA58 CA6 CA62 CB1 CB3 CB66 CB67 CC13 CC17 CC21 CC30 CC34 CC38 CC43 CL22 T30 CC8 CD2 CD4 CD64 CD66 CE10 CE15 CE47 CE53 CE6 CE62 CF1 CF2 CF64 CF65 CF66 CF67 CG1 CG11 CG2 CG24 CG27 CG4 CG42 CG44 CG46 CG48 CG5 CG52 CG54 CG56 CG59 CG61 CG64 CG65 CG66 CG67 CH12 CH18 CH2 CH24 CH27 CH3 CH33 CH39 CH4 CH42 CH44 CH46 CH48


SYM15OF 16

VSS

VSS

CH5 CH52 CH54 CH56 CH59 CH61 CH63 CH64 CH65 CH66 CH7 CH9 CJ1 CJ3 CJ4 CJ41 CJ42 CJ46 CJ5 CJ50 CJ54 CJ57 CJ61 CJ64 CJ65 CJ67 CK4 CK41 CK42 CK46 CK5 CK50 CK54 CK57 CK61 CK64 CL1 CL12 CL18 CL24 CL27 CL3 CL33 CL39 CL4 CL41 CL44 CL48 CL52 CL56 CL59 CL63 CL65 CL67 CL7 CM18 CM2 CM24 CM27 CM39 CM4 CM41 CM44 CM48 CM5 CM52 CM56 CM59 CM63 CM66 D1 D11 D12 D14 D16 D18

D20 D22 D24 D26 D27 D29 D3 D31 D35 D4 D41 D46 D5 D52 D56 D59 D63 D65 D67 D7 D9 E12 E14 E18 E2 E20 E22 E26 E27 E29 E3 E37 E4 E5 E54 E57 E59 E61 E64 E65 E66 E7 E9 F1 F2 F3 F4 F64 F65 F66 F67 G38 G43 G47 G51 G8 H1 H2 H66 H67 J10 J15 J19 J28 J32 J40 J45 J49 J53 J6 K2 K66 L13 L17 L21


SYM16OF 16

VSS

VSS

L38 L43 L47 L51 L55 L62 L8 M1 M2 M3 M4 M64 M65 M66 M67 P10 P15 P19 P23 P28 P32 P36 P40 P45 P49 P53 P6 P62 R2 R4 R64 R66 T13 T25 T34 T38 T51 T55 U1 U67 V10 V15 V28 V32 V36 V40 V53 V58 V6 V62 W3 W65 Y13 Y17 Y21 Y25 Y30 Y43 Y47 Y51 Y55 BF38 J58

1.70-1.95V @134mA 46 41 40 37 36 32 21 20 18 16 53 52 48 47

MAX

PP1V8_SDRAM 1

2

1

C1615 2.2UF

20% 6.3V X5R-CERM 0201-1

2

ROOM=SOC

C1605 2.2UF 20% 6.3V X5R-CERM 0201-1

1

2

ROOM=SOC

1

C1608 2.2UF

20% 6.3V X5R-CERM 0201-1

2

ROOM=SOC

C1612 2.2UF 20% 6.3V X5R-CERM 0201-1 ROOM=SOC

AM1 AM67 BB1 BB67 C3 C65 CK3


VDD1

D

SYM12OF 16

CK65

CKPLUS_WAIVE=PWRTERM2GND CKPLUS_WAIVE=PWRTERM2GND

1.62-1.98V @43mA MAX 29 25 18 17 13 12 11 9 8 7 5 52 48 47 46 39 30

PP1V8 1

1

C1602 10UF

20% 6.3V 2 CERM-X5R 0402-9

2

ROOM=SOC

C1607 2.2UF 20% 6.3V X5R-CERM 0201-1

1

2

ROOM=SOC

1

C1610 2.2UF

20% 6.3V X5R-CERM 0201-1

2

ROOM=SOC

C1614 2.2UF 20% 6.3V X5R-CERM 0201-1

AJ62 AN62 AU62 BA62 BF62

ROOM=SOC

G40 G45 G49 G53 AD6 AJ6 AN6 BA6 BF6 CE19 CE23

46 41 40 37 36 32 21 20 18 16 53 52 48 47

1.62-1.98V @10mA MAX

PP1V8_SDRAM 1

C1603 2.2UF

20% 6.3V X5R-CERM 0201-1

2

ROOM=SOC

1

2

CE28 CE32 CE34 CE36 CE43 CE38

C1601 0.1UF

20% 6.3V X5R-CERM 01005 ROOM=SOC

1.62-1.98V @2mA MAX

19

PP1V2_REF 1

AR23 BK19 AF21 J36 CE21 BF60

VDDIO18_GRP2

VDDIO18_GRP3

VDDIO18_GRP4

C VDDIO18_GRP10

VDD18_TSADC0 VDD18_TSADC1 VDD18_TSADC2 VDD18_TSADC3 VDD18_TSADC4 VDD18_TSADC5

1.62-1.98V @1mA MAX

CG9 VDD18_FMON

1.62-1.98V @1mA MAX

CC40 VDD18_LPOSC

TBD-TBDV @30mA MAX

AU23 VDD12_CPU_UVD T28 VDD12_GPU_UVD Y38 VDD12_SOC_UVD

C1611 2.2UF

2

VDD18_EFUSE1 CG7 VDD18_EFUSE2 G34 VDDIO18_GRP1

20% 6.3V X5R-CERM 0201-1

BA25 VDD12_PLL_CPU

ROOM=SOC

R1602 19 10 8

PP1V2_SOC

0.00

1

2

VDD12_PLL_CPU:1.14-1.26V

@13mA

Y32 AD36 AD38 Y34

MAX

PP1V2_PLL_CPU

0% 1/32W MF 01005

1

VDD12_PLL_SOC

B

C1606 0.1UF

ROOM=SOC

20% 2 6.3V X5R-CERM 01005 ROOM=SOC

R1601 1

C1604 2.2UF

1

20% 6.3V X5R-CERM 2 0201-1 ROOM=SOC

0.00 0% 1/32W MF 01005

ROOM=SOC

2

VDD12_PLL_SOC:1.14-1.26V

PP1V2_PLL_SOC

@31mA

MAX

1

C1609 0.1UF


1

C1613 0.1UF


L25 L30 L34

SYNC_MASTER=Sync


PAGETITLE SOC:POWER (3/3) DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


BRANCH


PAGE

SI ZE

D

A

8

7 315mA

6

MAX

R1703 24.9

PP1V8

25 18 17 16 13 12 11 9 8 7 5 52 48 47 46 39 30 29

1

5

1

ROOM=NAND

C1726

17

2

20% 6.3V X5R-CERM 0201-1

1

C1701 15UF 20% 6.3V X5R 0402-1

20% 6.3V X5R 0402-1

2

C1743

1

ROOM=NAND

1

1.0UF

C1741 1.0UF

20% 2 6.3V X5R 0201-1

20% 2 6.3V X5R 0201-1

1

1

ROOM=NAND

ROOM=NAND

C1708

C1710

1.0UF

1

20% 6.3V X5R 0402-1

C1745

ROOM=NAND

1

C1717

C1730 15UF

2

1

1

C1723 5% 16V NP0-C0G

PP1701 P2MM-NSM

SM

1

90_PCIE_AP_TO_NAND_REFCLK_N

PP

ROOM=NAND

PP1702 P2MM-NSM

SM

1

PP

ROOM=NAND

1.0UF ROOM=NAND

39PF

2

01005 ROOM=NAND

D

90_PCIE_AP_TO_NAND_REFCLK_P

C1747

1

5%

17 8

ROOM=NAND

20% 2 6.3V X5R 0201-1

68PF

17 8

20% 6.3V X5R 0402-1

20% 2 6.3V X5R 0201-1

ROOM=NAND

2 16V NP0-C0G

01005 ROOM=NAND

C1729 15UF

1.0UF

ROOM=NAND

5% 16V CERM

2

01005 ROOM=NAND

20% 6.3V X5R-CERM 01005

ROOM=NAND

20% 2 6.3V X5R 0201-1

22PF

5%

19

1

C1711

220PF

2 10V C0G-CERM

1

PROBE POINTS 1

C1707 15UF

2

C1739

2

0.1UF 2

ROOM=NAND

NAND_AGND

ROOM=NAND

1

1

2.2UF 2

1

3

PP1V8_NAND_AVDD

2

1% 1/32W MF 01005

D

4

C1712 100PF 5% 16V NP0-C0G 01005

2

01005 ROOM=NAND

ROOM=NAND

PP0V9_NAND 1007mA

MAX 1

2

C

1

C1704 15UF 20% 6.3V X5R 0402-1

C1702 15UF 20% 6.3V X5R 0402-1

2

ROOM=NAND

1

2

ROOM=NAND

1

C1705 15UF

C1722

1

15UF

20% 6.3V X5R 0402-1

2

ROOM=NAND

20% 6.3V X5R 0402-1

C1727 15UF

20% 6.3V 0402-1

2 X5R

ROOM=NAND

#24543147:10uF for 32GB #26326159:10uF for C1719

ROOM=NAND

OMIT

1

C1737 1.0UF

20% 2 6.3V X5R 0201-1

ROOM=NAND

1

C1703 220PF 5%

2 10V C0G-CERM

01005

ROOM=NAND

1

C1738

1

1.0UF

20% 2 6.3V X5R 0201-1

ROOM=NAND

1

C1740 1.0UF

20% 2 6.3V X5R 0201-1

ROOM=NAND

C1706

1

22PF

C1709

1

5% 16V NP0-C0G 01005

2

01005 ROOM=NAND

ROOM=NAND

25 18 17 16 13 12 11 9 8 7 5 52 48 47 46 39 30 29

1

1.0UF

1

1.0UF ROOM=NAND

C1714

1

220PF

2

C1744

20% 2 6.3V X5R 0 20 1- 1

ROOM=NAND

100PF

5%

2 16V CERM

C1742

20% 2 6.3V X5R 0201-1

C1720 100PF

5% 10V C0G-CERM 01005

2

ROOM=NAND

5% 16V NP0-C0G 01005

1

1

C1746

2

1

C1728 5%

2

01005

1

2

2

C1724 0.01UF 10% 6.3V X5R 01005

C1749

1

20% 6.3V X5R 0201-1

2

NAND_VREF

1 2 K K L L C C _ _ D D D D V V A A I_ I_ C C P P

C1725 0.01UF

2

2

1

2

1

20% 6.3V X5R 0402-1

2

15UF

C1750

1

20% 6.3V X5R 0201-1

2

1

20% 6.3V CERM-X5R 0402-9

2

C1751

1

20% 6.3V X5R 0201-1

2

1.0UF

C1718

1

5% 16V CERM 01005

2

22PF

20% 6.3V X5R 0402-1

2

C1752

1

20% 6.3V X5R 0201-1

2

C1731

1

5% 16V NP0-C0G 01005

2

ROOM=NAND

C1753

1

20% 6.3V X5R 0201-1

2

1

5% 16V NP0-C0G 01005

2

C1734

1

5% 16V NP0-C0G 01005

2

ROOM=NAND

20% 6.3V X5R 0201-1

ROOM=NAND

100PF

ROOM=NAND

C1754 1.0UF

ROOM=NAND

39PF

20% 6.3V X5R 0402-1

ROOM=NAND

1.0UF

C1732

C1733 15UF

ROOM=NAND

ROOM=NAND

68PF

ROOM=NAND

1

1.0UF

ROOM=NAND

PP3V0_NAND

OMIT

C1721 15UF

ROOM=NAND

C

MAX (1us peak power) OMIT

C1719 10UF

ROOM=NAND

ROOM=NAND

5% 10V C0G-CERM 01005

C1716

C1735

1

5% 10V C0G-CERM 01005

2

220PF

C1736 100PF

ROOM=NAND

5% 16V NP0-C0G 01005

ROOM=NAND

0 0 0 0 0 1 0 0 0 1 0 1 0 1 1 4 4 6 3 5 3 7 2 1 9 3 7 5 B B F F 5 A A D D G G 7 K M 5 J J K C E A A F J J R R A O O O O R O O O O O O

ROOM=NAND 1

20% 6.3V X5R 0402-1

1 .0 UF

C1715

ROOM=NAND

1

15UF

220PF

1

OMIT

C1713

ROOM=NAND

ROOM=NAND

ROOM=NAND

PP1V8

B

2

1 .0 UF

68PF

2 16V NP0-C0G

ROOM=NAND

20% 6.3V X5R 0402-1

ROOM=NAND

ROOM=NAND

1

1

15UF

1.0UF

20% 2 6.3V X5R 0 201 -1

1230mA

OMIT

C1748

10% 6.3V X5R 01005

ROOM=NAND

H _ D D V A I_ C P

1 2 1 F D D D D D D D I I O I O I O I O I O C C C C C C D D D E D D D D D D D O C C C C C C D D D R V V V V V V V D D D D D D V V V V V V D D D D D D V V V V V V V V V V I_ I_ A C C P P

B

U1701

THGBX6T1T82LFXF VLGA

11 17 8 17 8 8

1

R1704 3.01K 1% 1/32W MF 01005

8 8

AP_TO_NAND_SYS_CLK

D2

CLK_IN

90_PCIE_AP_TO_NAND_REFCLK_P 90_PCIE_AP_TO_NAND_REFCLK_N

H8 H6

PCIE_REFCLK_P PCIE_REFCLK_M

PCIE_NAND_BI_AP_CLKREQ_L

G9

PCIE_CLKREQ*

PCIE_NAND_RESREF

M6

PCI_RESREF

90_PCIE_AP_TO_NAND_TXD_P 90_PCIE_AP_TO_NAND_TXD_N

M8 K8

PCIE_RX0_P PCIE_RX0_M

N5 N3

PCIE_RX1_P PCIE_RX1_M

NC

2 ROOM=NAND

NC 8 8

90_PCIE_NAND_TO_AP_RXD_P 90_PCIE_NAND_TO_AP_RXD_N NC NC

7

AP_TO_NAND_RESET_L

A

NC

NAND_ZQ 1

P8 N7

PCIE_TX0_P PCIE_TX0_M

M2 K2

PCIE_TX1_P PCIE_TX1_M

F8

RESET*

D8

TRST*

D6

ZQ

R1701 0.5% 1/32W MF 01005

ROOM=NAND BOMOPTION=OMIT_TABLE

CRITICAL

EXT_D0 EXT_D1 EXT_D2 EXT_D3 EXT_D4 EXT_D5 EXT_D6 EXT_D7

G3 J3 H2 E3 E7 F6 C7 B8

PMU_TO_NAND_LOW_BATT_BOOT_L AP_TO_NAND_FW_STRAP

20 12

NC NC NC NC NC

SYSTEM_ALIVE

15 20 21

EXT_NCE G1

PCIE_AP_TO_NAND_RESET_L

EXT_NRE F4

SWD_AP_BI_NAND_SWDIO_R

ROOM=NAND

EXT_NWE C5

SWD_AP_NAND_SWCLK_R

ROOM=NAND

EXT_RNB G5 NC EXT_CLE H4 NC

EXT_ALE D4

8

1

1/32W 0% 1

1/32W 0%

0.00 2 R1702 01005 MF 0.00 R1707 2

01005

SWD_AP_BI_NAND_SWDIO13 SWD_AP_TO_MANY_SWCLK13

MF

36 53

VIETMOBILE.VN SYNC_MASTER=Sync


PAGETITLE

NAND

A S S S S S S S S S S S S S S S S S S S S S S S S S S S S V V V V V V V V V V V V V V

DRA WI NG N UMB ER

2 4 6 0 7 3 5 7 2 4 6 0 0 0 B B B 1 G L L L P P P C 1 E E O C O O O

34.8

2 ROOM=NAND

VER-1

17

NAND_AGND

Apple Inc.

051-00482 REVISION

8.0.0

R


BRANCH


PAGE

SI ZE

D

A

8

7

6

5

4

3

U1801

53 28 27 26 25 23 21 19 10 9 4 46 41 40 39 37 35 34 33 31 30

VDD_MAIN_SNS

M8 VDD_MAIN_SNS N7 VDD_MAIN H6 F11 R13 H14 H13

PP_VDD_MAIN 1

C1846

1

20% 6.3V CERM-X5R 0402-9

2

10UF

2

D

C1850

1

20% 6.3V CERM-X5R 0402-9

2

10UF

ROOM=PMU

1

C1875

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

2

ROOM=PMU

1

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

ROOM=PMU

2

C1851

1

20% 6.3V X5R-CERM 0201-1

2

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

C1852

1

20% 6.3V X5R-CERM 0201-1

2

1

1

2.2UF

2

C1854

1

20% 6.3V X5R-CERM 0201-1

2

20% 6.3V X5R-CERM 0201-1

2

20% 6.3V X5R-CERM 0201-1

ROOM=PMU

C1855

1

20% 6.3V X5R-CERM 0201-1

2

C1859 2.2UF

20% 6.3V X5R-CERM 0201-1

ROOM=PMU

C1849

1

2.2UF

ROOM=PMU

C1858 2.2UF

ROOM=PMU

C1877

20% 6.3V CERM-X5R 0402-9 ROOM=PMU

2.2UF

ROOM=PMU

C1857

WLCSP

B S U / T A B

20% 6.3V X5R-CERM 0201-1

2

VDD_BUCK0_01

A9 B9 C9 D9

VDD_BUCK0_23

A17 B17 C17 D17

VDD_BUCK1_01

A13 B13 C13 D13

VDD_BUCK1_23

H1 H2 H3

C1856 2.2UF

ROOM=PMU

A5 B5 C5 D5

20% 6.3V X5R-CERM 0201-1

ROOM=PMU

C

D10/D101:#24681501,TY ONLY, D11/D11: Both Vendor

2

PP0V9_SOC_FIXED

1

BUCK0_LX2

BUCK0_LX3

BUCK0_FB

VDD_BUCK2

T2 T3

VDD_BUCK3

M1 M2 M3

VDD_BUCK4

B1 C1 D1

VDD_BUCK5

K18 K19

VDD_BUCK6

U6 V6

VDD_BUCK7

F18 F19

VDD_BUCK8

L18 L19

VDD_BUCK9

MEKK2016T-SM 5 X A K M C U A B 2

1

C1867

1

5% 10V C0G-CERM 01005

2

220PF

2

. 3

C1840

1

20% 6.3V X5R 0402-1

2

15UF

ROOM=PMU

ROOM=PMU

C1801

1

20% 6.3V X5R 0402-1

2

15UF

C1803

1

20% 6.3V X5R 0402-1

2

15UF

ROOM=PMU

C1807 15UF

ROOM=PMU

20% 6.3V X5R 0402-1

ROOM=PMU

ROOM=PMU NO_XNET_CONNECTION=1 OMIT

B2 C2 D2 A2

6 X A K M C U A B 5

1

2

BUCK5_FB

BUCK1_LX0

C1811

1

5% 10V C0G-CERM 01005

2

220PF

. 1

2

C1804

1

20% 6.3V X5R 0402-1

2

15UF

ROOM=PMU

C1808 20% 6.3V X5R 0402-1

0.80V - 1.06V

1

C1868

1

5% 10V C0G-CERM 01005

2

1

C1805

20% 2 6.3V X5R 0402-1

15UF

ROOM=PMU

1

A10 B10 C10 D10

14

F10BUCK0_PP_CPU_FB

B18 C18 D18 A18

1

5% 10V C0G-CERM 01005

20% 6.3V 2 X5R 0402-1

220PF

2

1

C1806 15UF

ROOM=PMU

1

ROOM=PMU

30 25

2

BUCK7_LX0

BUCK7_FB

1 ROOM=SOC

F5 BUCK5_FB

BUCK1_LX2

BUCK1_LX3

BUCK1_LX3

A12 B12 C12 D12

BUCK2_FB

J18 J19

BUCK3_LX0

BUCK6_LX0

H16 BUCK6_FB

G1 G2 G3

K A C 5 U 7 B . 0

C1870 5% 10V C0G-CERM 01005

2

220PF

2

ROOM=PMU

C1862

1

20% 6.3V X5R 0402-1

2

15UF

ROOM=PMU

BUCK8_LX0

ROOM=PMU

15UF

20% 6.3V X5R 0402-1

2

ROOM=PMU

1

20% 6.3V X5R 0402-1

2

15UF

ROOM=PMU

C1843

1

20% 6.3V X5R 0402-1

2

15UF

ROOM=PMU

C1845

1

20% 6.3V X5R 0402-1

2

15UF

ROOM=PMU

C1872

D

220PF

ROOM=PMU

5% 10V C0G-CERM 01005

ROOM=PMU

1

2

L1812

2

1

NO_XNET_CONNECTION=1

CRITICAL

ROOM=PMU

2

2

1

20% 6.3V X5R 0402-1

2

C1814

1

20% 6.3V X5R 0402-1

2

1

20% 6.3V X5R 0402-1

2

C1821

1

20% 6.3V X5R 0402-1

2

1

20% 6.3V X5R 0402-1

2

C1828

1

20% 6.3V X5R 0402-1

2

1

20% 6.3V X5R 0402-1

2

C1834

1

20% 6.3V X5R 0402-1

2

1 3 . B 4 U A

20% 6.3V X5R 0402-1

C K 1

M A X

ROOM=PMU

C1866

1

20% 6.3V X5R 0402-1

2

15UF

ROOM=PMU

14

0.67V - 0.92V 1.03V for overdrive only

C1865 15UF

ROOM=PMU

15UF

ROOM=PMU

C1839 15UF

ROOM=PMU

15UF

ROOM=PMU

C1833 15UF

ROOM=PMU

15UF

ROOM=PMU

C1827 15UF

ROOM=PMU

15UF

1

PINA20121T-SM

20% 6.3V X5R 0402-1

C1820 15UF

ROOM=PMU

CRITICAL

ROOM=PMU

1

15UF

2

PINA20121T-SM

C1813

C1873

C

220PF

ROOM=PMU

5% 10V C0G-CERM 01005

ROOM=PMU

L1813

1

2

PINA20121T-SM


CRITICAL

ROOM=PMU

14

L1814

1

BUCK2_LX0

2

PIQA20161T-SM

1

L1815

2

BUCK2_LX1

J5

BUCK2_PP_SOC_FB

R2 R3 R1 R7

BUCK3_LX0

1

CRITICAL

ROOM=PMU

C1822

1

20% 6.3V X5R 0402-1

2

15UF

2

PIQA20121T-SM


4 . B 7 U A

PP_SOC_VAR 14 CRITICAL

ROOM=PMU

C1829

1

20% 6.3V X5R 0402-1

2

15UF

ROOM=PMU

C1835

1

20% 6.3V X5R 0402-1

2

15UF

ROOM=PMU

C1841

1

20% 6.3V X5R 0402-1

2

15UF

ROOM=PMU

C1864

1

20% 6.3V X5R 0402-1

2

15UF

ROOM=PMU

ROOM=PMU

C1871

C K 2

0.67V/0.80V

M A X

220PF

5% 10V C0G-CERM 01005

14

ROOM=PMU

L1816

1

ROOM=PMU

2

PIQA20161T-SM


VBUCK3_SW

BUCK4_LX0

N1 N2 N3

CRITICAL

OMIT

C1816 15UF

XW1804

20% 2 6.3V X5R 0402-1


PP1V8_SDRAM 16 46 1

2

ROOM=SOC

1

C1823 15UF

20% 2 6.3V X5R 0402-1

ROOM=PMU

1

20 21 32 36 37 40 41 47 48 52 53

C1860

1 B . U 7 C A

B

v e n d o r

220PF

K M 3

5% 2 10V C0G-CERM 01005

ROOM=PMU

( p e n d i n g

A X

q u a l )

ROOM=PMU

L1817

1

BUCK4_LX0

2

PIQA20161T-SM


PP1V1_SDRAM CRITICAL

ROOM=PMU

BUCK4_LX1

L1 L2

L1818

G18 G19

2

BUCK4_LX1

1

PIQA20121T-SM NO_XNET_CONNECTION=1

C1830 15UF

0.47UH-20%-3.8A-0.048OHM R8 BUCK7_FB

1

OMIT ROOM=PMU

20% 2 6.3V X5R 0402-1 ROOM=PMU

1

C1836 15UF

20% 2 6.3V X5R 0402-1 ROOM=PMU

1

C1802 15UF

20% 2 6.3V X5R 0402-1 ROOM=PMU

1

C1874 15UF

20% 2 6.3V X5R 0402-1 ROOM=PMU

1

4 . B 7 U A

15 19

C1861

C K 4

220PF

M A X

5% 2 10V C0G-CERM 01005 ROOM=PMU

CRITICAL

XW1805

SHORT-20L-0.05MM-SM

BUCK4_FB

BUCK8_LX0

K5

BUCK4_FB

1


2

ROOM=SOC

OMIT

VBUCK4_SW


1 ROOM=SOC

BUCK8_FB

H15 BUCK8_FB

BUCK9_LX0

BUCK3_SW1 M18 M19

BUCK9_LX0

OMIT

XW1806


1 ROOM=SOC

U5 V5


2

C1863

ROOM=PMU

20% 6.3V X5R 0402-1

15UF

C1838

PP_GPU_VAR CRITICAL

ROOM=PMU


J1 J2 J3

U2 V2

BUCK7_LX0

XW1801

1 1

2

1

2

PIQA20161T-SM

1

F12BUCK1_PP_GPU_FB

L3

0603 1

20% 6.3V X5R 0402-1

15UF

C1832

1.0UH-20%-3.6A-0.060OHM U7 V7


1

ROOM=PMU

PP2V8_UT_AF_VAR

1

L1810

1

0.22UH-20%-6.7A-0.023OHM

BUCK1_LX2

BUCK2_LX1

L1802 CRITICAL 1.0UH-20%-1.5A-0.161OHM X A 9 M

2

C1826

CRITICAL

L1811

A14 B14 C14 D14

XW1803

15UF

A

1 3 B . U 4 A C

ROOM=PMU

2

14


SHORT-20L-0.05MM-SM

C1810

20% 6.3V 2 X5R 0402-1

20% 6.3V X5R 0402-1

ROOM=PMU

ROOM=PMU

BUCK1_LX0

BUCK1_LX1

OMIT

2

C1869

1

15UF

2

CRITICAL

PINA20121T-SM NO_XNET_CONNECTION=1


PIQA20121T-SM 1

2

ROOM=PMU

K

C1819

0.47UH-20%-3.8A-0.048OHM


1

ROOM=PMU

PP_GPU_SRAM_VAR 0.80V - 0.92V

X

1

BUCK0_LX3

BUCK5_LX0

CRITICAL L1801 1UH-20%-2.1A-0.12OHM

8 A M K C A U 5 B .

2

ROOM=PMU

20% 6.3V X5R 0402-1

L1809

BUCK3_FB

ROOM=PMU

15UF

ROOM=PMU

15UF

20% 6.3V X5R 0402-1

M 0 A X

1

1

NO_XNET_CONNECTION=1 PINA20121T-SM ROOM=PMU

A16 B16 C16 D16

BUCK3_FB

BUCK6_FB

1 ROOM=SOC

C1809

20% 2 6.3V X5R 0402-1

2

ROOM=PMU

14

0.625V - 1.06V

C1844

1

15UF

20% 6.3V X5R 0402-1

1.0UH-20%-3.6A-0.060OHM

OMIT

2

2

220PF

C A U 5 B .

2

2

ROOM=PMU

C1842

1

15UF

20% 6.3V X5R 0402-1

CRITICAL

ROOM=PMU

BUCK0_LX2

2

C1837

1

15UF

20% 6.3V X5R 0402-1

ROOM=PMU

L1808

BUCK1_LX1

BUCK1_FB

XW1807

MCFE2016T-SM

X 7 A M K

2

2

PINA20121T-SM


A8 B8 C8 D8

SHORT-20L-0.05MM-SM

ROOM=PMU

PP_CPU_SRAM_VAR

1

C1831

1

15UF

0.22UH-20%-6.7A-0.023OHM

L1805 CRITICAL 1.0UH-20%-2.25A-0.086OHM 14

C1825

1

20% 6.3V X5R 0402-1

1.0UH-20%-3.6A-0.060OHM

BUCK6_LX0

ROOM=PMU

15UF

ROOM=PMU

L1807

0.22UH-20%-6.7A-0.023OHM

BUCK0_LX1

0.22UH-20%-6.7A-0.023OHM


1

PIQA20121T-SM 1

C1818

1.0UH-20%-3.6A-0.060OHM

T U P N I K C U B

XW1802 2

PP1V25_BUCK

1

SHORT-20L-0.05MM-SM ROOM=SOC

19

PP_CPU_VAR CRITICAL

ROOM=PMU

15UF

A6 B6 C6 D6

L1804 CRITICAL 1UH-20%-2.1A-0.12OHM

B

2

PIQA20161T-SM


0.22UH-20%-6.7A-0.023OHM

BUCK2_LX0

BUCK5_LX0

B4 C4 D4 A4

1

Voltages per Cayman Power Spec, Sec. 2.2, rev 0.9.2, #24557869

0.22UH-20%-6.7A-0.023OHM

L1803 CRITICAL 1.0UH-3.6A-0.06OHM 15 10 9 8 7

BUCK0_LX0

BUCK0_LX1

10UF

ROOM=PMU

2.2UF

ROOM=PMU

2

2.2UF

ROOM=PMU

C1848

20% 6.3V CERM-X5R 0402-9 ROOM=PMU

2.2UF

ROOM=PMU

C1876

2

1

20% 6.3V X5R-CERM 0201-1

2.2UF

1

10UF

ROOM=PMU

C1847

C1853

VDD_MAIN_E VDD_MAIN_N VDD_MAIN_SW VDD_MAIN_W VDD_MAIN_W

SYM2OF 4

ROOM=PMU

1

BUCK0_LX0

D2333A1 19

2

L1806

1.0UH-20%-3.6A-0.060OHM

BUCK9_FB NO_XNET_CONNECTION=1

P16 BUCK9_FB

S T U P T U O H C T I W S

T1 U1

PP1V8

5 7 8 9 11 12 13 16 17 25 29 30 39 46 47 48 52

SYNC_MASTER=Sync


PAGETITLE

SYSTEM POWER:PMU (1/3) DRA WI NG N UMB ER

BUCK3_SW2 BUCK3_SW3

BUCK4_SW1

U3 V3

U4 V4

PP1V8_TOUCH PP1V8_MAGGIE_IMU PP1V1

38 39 46 47

Apple Inc.

24 36

051-00482 REVISION

8.0.0

R

7 15


BRANCH


PAGE

SI ZE

D

A

8

7

53 46 27 26 25 23 21 19 18 10 9 4 41 40 39 37 35 34 33 31 30 28

5

4

XW1901

VDD_MAIN_SNS


1

2

C1901 15UF 20% 6.3V X5R 0402-1

ROOM=PMU

1

1

C1910 10UF

20% 6.3V 2 CERM-X5R 0402-9

C1914 10UF

20% 6.3V 2 CERM-X5R 0402-9

ROOM=PMU

ROOM=PMU

1

1

C1911 10UF

20% 6.3V 2 CERM-X5R 0402-9

C1907 10UF

LDO#

20% 6.3V 2 CERM-X5R 0402-9

ROOM=PMU

ROOM=PMU

OMIT

XW1902

SHORT-20L-0.05MM-SM

PMU_PRE_UVLO_DET

2

2 1 ROOM=PMU

D

ADJ.RANGE, LOW

53 46 27 26 25 23 21 19 18 10 9 4 41 40 39 37 35 34 33 31 30 2 8

53 38 37 32 30 25 23

PP_VDD_MAIN

PP_VDD_BOOST 1

C1915

1

20% 6.3V X5R 0402-1

2

15UF

2

ADJ.RANGE, HI

ACCURACY

MAX.CURRENT

LDO1 (Ca)

1.2-2.475V

2.4-3.675V

+/-1.4%

50mA

LDO2 (Ca)

1.2-2.475V

2.4-3.675V

+/-2.5%

50mA

LDO3 (Ca)

1.2-2.475V

2.4-3.675V

+/-2.5%

50mA

LDO4 (D)

0.7-1.2V

+/ -2.5 %

60mA

LDO5 (F)

2.5-3.6V(tbc)

+/-75mV

1000mA

1.2-2.475V

2.4-3.675V

LDO7 (Cb)

1.2-2.475V

2.4-3.675V

+/-30mV

250mA

LDO8 (Cb)

1.2-2.475V

2.4-3.675V

+/-30mV

250mA

LDO9 (Cb)

1.2-2.475V

2.4-3.675V

+/-25mV

250mA

LDO10 (Ga)

0.7-1.2V

+/-4.5%

1150mA

LDO6 (Cb)

LDO# LDO11 (Cb)

+/-2.5%

(500/100mA in bypass)

C1912 20% 6.3V X5R 0402-1

2.2UF

2

C

20% 6.3V X5R-CERM 0201-1

ROOM=PMU

18

MAX.CURRENT

+/-30mV

250mA

+/-5%

10mA

+/-30mV

250mA

+/-3.0%

400mA

+/-2.5%

50mA

2.4-3.675V

+/-30mV

250mA

2.4-3.675V

+/-2.5%

50mA

+/-3.0%

400mA

0.7-1.4V

+/-3.0%

400mA

LDO_RTC

2.5V

+/-2.0%

10mA

BUF_1V2

1.2V

+/-5.0%

10mA

LDO13 (Cb)

1.2-2.475V

LDO14 (Gb)

0.7-1.4V

LDO15 (Ca)

1.2-2.475V

2.4-3.675V

LDO16 (Cb)

1.2-2.475V

LDO17 (Ca)

1.2-2.475V

LDO18 (Gb)

0.7-1.4V

LDO19 (Gb)

2.4-3.675V

R12 V11 R10 R16 V9 V10 R14 P19 R19 R9 V13 V16 T19 V17 V18 U19

C1913 20% 6.3V X5R-CERM 0201-1

ROOM=PMU

PP1V25_BUCK

VDD_LDO1 VDD_LDO2_15 VDD_LDO3_17 VDD_LDO4 T U P N I O D L

VDD_LDO5 VDD_LDO6_BYP VDD_LDO7_8 VDD_LDO9 VDD_LDO10 VDD_LDO11_13 VDD_LDO14 VDD_LDO16 VDD_LDO18 VDD_LDO19 VDD_LDO19

VLDO1 VLDO2 VLDO3 VLDO4 VLDO5_0 VLDO5_1 VLDO6

T12 U11 T10 T16 U9 U10 T14

VBYPASS

R15

VLDO7 VLDO8 VLDO9

T17 P18 R18

VLDO9_FB

P17

VLDO10 VLDO11 VLDO12 VLDO13 VLDO14 VLDO15 VLDO16 VLDO17 VLDO18 VLDO19

O D L

G15 VPP_OTP

U1801

D2333A1 WLCSP

PP3V3_USB PP1V8_VA PP3V0_ALS_APS_CONVOY PP0V8_AOP PP3V0_NAND

LDO1 LDO2 LDO3 LDO4 LDO5

7 30 32 33 34 35 25 29 30 15 17

PP_ACC_VAR

27 40

PP3V0_TRISTAR_ANT_PROX PP2V9_NH_AVDD PP1V8_HAWKING PP0V9_NAND

T9 U13NC P7 U14 U16 U12 T18NC T11 U17 U18

LDO7 LDO8 LDO9

29 40 41 53 29 44

29 30

LDO10 LDO11 LDO12 LDO13 LDO14 LDO15 LDO16 LDO17 LDO18 LDO19

16

VBUF_1V2

17

PP1V8_ALWAYS PP3V0_MESA PP1V2_SOC PP1V8_MESA

20 21 38 8 10 16 38 48

#24989262

PP_LDO17 PP1V2_UT_DVDD PP1V2_NH_NV_DVDD

1/20W 1%

2

LDO6

R1901 MF NOSTUFF 0.00 10201 25

SYM4OF 4

A1 A11 A15 H8 A19 P13 A3 P14 A7 B11

B

A

B15 B19 B3 B7 C11 C15 C19 C3 C7 D11 D15 D19 D3 D7 E1 E10 E11 E12 E13 E14 E15 E16 E17 E18 E19 E2 E3 E4 E5 E6 E7 E8 E9 F1 F17 F2 F3 F4

G17 G4 H17 H18 H19 H4 J17 J4 J8 K1 K17 K2 K3 K4 K8 L17 L4 L8 M17

VSS

VSS

M4 N17 N18 N19 N4 P1 P2 P3 P4 P15 R17 R4 T5 T15 T4 T6 T7 T8 U15 T13 U8 V1 V12 V19 V8

D

WLCSP

2.2UF

2

ACCURACY

D2333A1

ROOM=PMU

1

2.4-3.675V

U1801

PP1V1_SDRAM

C1908

ADJ.RANGE, HI

1.2-2.475V 1.8V

SYM1OF 4

1

ADJ.RANGE, LOW

LDO12 (E)

250mA

15UF

ROOM=PMU

18 15

1

ADELYN LDO SPECS 1

ROOM=PMU NO_XNET_CONNECTION

20

3

PP_VDD_MAIN OMIT

18

6

NC

J6 TP_DET

VBUF_1V2

P8

VPUMP

R5

PP1V2_REF

C

N Y L E D A r o f w e N

1

C1918

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

2

PMU_VPUMP

C1902 47NF

2

20% 6.3V X5R-CERM 01005

ROOM=PMU

1

1

20% 6.3V X5R-CERM 0201-1

2

ROOM=PMU

20% 6.3V X5R 0201-1

2

1

20% 6.3V X5R-CERM 0201-1

2

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

1

20% 6.3V X5R-CERM 0201-1

2

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

1

20% 6.3V X5R 0201-1

2

ROOM=PMU

C1925

1

20% 6.3V X5R 0201-1

2

1.0UF

ROOM=PMU

C1935 1.0UF

ROOM=PMU

C1922 ROOM=PMU

C1926 2.2UF

ROOM=PMU

C1921 ROOM=PMU

C1923 2.2UF

ROOM=PMU

C1916 2.2UF

2

1

1.0UF

ROOM=PMU

1

C1933

C1930

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

0.22UF

ROOM=PMU

20% 6.3V X5R 01005-1

ROOM=PMU

C1927

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

ROOM=PMU

C1932

1

C1904

C1919

B

2.2UF

2.2UF

20% 6.3V X5R-CERM 0201-1

2

20% 6.3V X5R-CERM 0201-1

ROOM=PMU

ROOM=PMU

#24989262:OTP-AO LDO17 default off,50mA Iout_max

VPUMP: 10nF min. @4.6V

53 46 27 26 25 23 21 19 18 10 9 4 41 40 39 37 35 34 33 31 30 28

PP_VDD_MAIN 1

C1905

1

5% 16V NP0-C0G-CERM 01005

2

33PF

2

ROOM=PMU

PMU_VSS_RTC U15 = PMU XTAL GND

C1909 220PF

5% 10V C0G-CERM 01005 ROOM=PMU

20 SYNC_MASTER=Sync


PAGETITLE


Apple Inc.

051-00482 REVISION

8.0.0

R


BRANCH


PAGE

SI ZE

D

A

8

7

6

5

4

3

2

1

BUTTON PULL-UP RESISTORS 1

PP

SM

PP2001 P2MM-NSM ROOM=SOC

1

PP

SM

PP1V8_SDRAM

PP2002

1

P2MM-NSM ROOM=SOC

1 46 41 40 37 36 32 21 20 18 16 53 52 48 47

PP1V8_SDRAM

PP1V8_ALWAYS

PP

ROOM=PMU

19 20 21

1

1

R2006 100K 5% 1/32W MF 01005

R2005 100K 5% 1/32W MF 01005

2 ROOM=PMU

2 ROOM=PMU

1

2

U1801

R2012 10K

WLCSP

7

2 ROOM=PMU

40

NO_XNET_CONNECTION

11 13 7

1

C2001 10% 10V X5R 01005

13 15 13

ROOM=PMU

13 40 37 13 7 13

AOP_TO_PMU_SLEEP1_REQUEST PMU_TO_AOP_SLEEP1_READY AOP_TO_PMU_ACTIVE_REQUEST PMU_TO_AOP_TRISTAR_ACTIVE_READY

R11 L11 L12 J12

PMU_TO_AOP_CLK32K

M9 NC M10

D101/D111 ONLY: TCXO_RF Supplies 32K 21 17 15 53 39 23 13

13

R2020 47

I2C1_AP_SDA

1

100

47

2

5% 1/32W MF 01005

#24825674: Add R2020 to meet timing spec #26169957: R2020 to 100ohm

11 11

C

11

7 20

FOREHEAD NTC

39 37

R2001

100PF

5% 16V 2 NP0-C0G 01005 ROOM=PMU

10KOHM-1% 2

01005 ROOM=PMU

40 20 36

FOREHEAD_NTC_RETURN

4

TBD

1000PF

REAR CAMERA NTC

10% 2 10V X5R 01005

1 1 C2008 100PF

5% 16V NP0-C0G 2 01005 ROOM=PMU

2

RCAM_NTC_RETURN

01005 ROOM=PMU

XW2002

B

2 OMIT

1

1 C2009 100PF

5% 16V NP0-C0G 2 01005 ROOM=PMU

4

CHESTNUT_TO_PMU_ADCMUX

AP_TO_PMU_TEST_CLKOUT BBPMU_TO_PMU_AMUX3

PMU_AMUX_BY

2

SCLK MOSI MISO

L14 L15 NC L16 M16 M15 M14 N16 N15 N14

AMUX_B0 AMUX_B1 AMUX_B2 AMUX_B3 AMUX_B4

NC

PMU_XTAL1 PMU_XTAL2

R6 M6 P6 L5 L6 G16

10KOHM-1% 01005 ROOM=PMU

1

XW2005

PA_NTC_RETURN

TDEV1 TDEV2 TDEV3 TDEV4 TDEV5 TCAL

1

C2010 1

R2004

100PF

5% 16V 2 NP0-C0G 01005 ROOM=PMU

10KOHM-1% 2

01005 ROOM=PMU

C2011 100PF

5% 16V 2 N P0 -C 0G 01005 ROOM=PMU

1

AP_NTC_RETURN

C2002

1

PMU_VREF

S X N U O T M T A U B

C2006 0.22UF

C I O T N P G

L A T X

1

R2011

1% 1/20W MF 201 2 ROOM=PMU

PMU_TO_AP_THROTTLE_CPU_L PMU_TO_AP_THROTTLE_GPU_L AP_VDD_CPU_SENSE AP_VDD_GPU_SENSE

PRE_UVLO_DET N8

PMU_PRE_UVLO_DET

IBAT VBAT BRICK_ID ADC_IN

L7 NC M7 NC H7 TRISTAR_TO_PMU_USB_BRICK_ID PMU_ADC_IN K7

BUTTON1 BUTTON2 BUTTON3 BUTTON4

M12 BUTTON_VOL_DOWN_L N12 BUTTON_POWER_KEY_L M11 BUTTON_RINGER_A N11 NC Reserved for MENU key on dev board

GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21

F16 F15 G14 F14 F13 G13 G12 H12 G11 G10 F9 G9 F8 G8 H9 H10 J9 J10 K9 K10 L9

2 ROOM=PMU

BUTTON_POWER_KEY_L

44 20

200K

PMU_TO_AP_PRE_UVLO_L

VDROOP0_DET F6 VDROOP1_DET F7

BUTTONO1 H11 BUTTONO2 J11 BUTTONO3 K11

R2007 220K

PMU_TO_AP_BUF_VOL_DOWN_L PMU_TO_AP_BUF_POWER_KEY_L PMU_TO_AP_BUF_RINGER_A TIGRIS_TO_PMU_INT_L BB_TO_PMU_PCIE_HOST_WAKE_L PMU_TO_BBPMU_RESET_R_L WLAN_TO_PMU_HOST_WAKE NFC_TO_PMU_HOST_WAKE PMU_TO_NAND_LOW_BATT_BOOT_L

PP1V8_SDRAM 1 11

16 18 20 21 32 36 37 40 41 46 47 48 52 53

NOSTUFF

R2015 220K 5% 1/32W MF 01005

12

BUTTON_VOL_DOWN_L

11

2 ROOM=PMU

20 44

14

NOTE:VDROOP_DET filtering is now inside Adelyn

14

19

C 20 40 20

20 44 20 44 20 44

12

Button for two-finger reset: 20711463 and 21196187

12 12

21

R2000 1.00K

53

1

2

PMU_TO_BBPMU_RESET_L

53

5% 1/32W MF 01005 ROOM=PMU

53 53 17

NC_PMU_TO_GNSS_EN

PMUGPIO_TO_WLAN_CLK32K PMU_TO_BT_REG_ON

20 53 53

NC_GNSS_TO_PMU_HOST_WAKE

PMU_TO_WLAN_REG_ON BT_TO_PMU_HOST_WAKE PMU_TO_CODEC_DIGLDO_PULLDN PMU_TO_ACC_BUCK_SW_EN PMU_TO_BB_USB_VBUS_DETECT PMU_TO_NFC_EN PMU_TO_AP_FORCE_DFU_R PMU_TO_BOOST_EN PMU_TO_LCM_PANICB PMU_TO_HOMER_RESET_L

I2C0_AP_SCL

53 53 32

B

27 53

#24511807: Stuff for Carrier

R2009 0.00

53

1 23

RS

39

RS

36 37 47

PMU_TO_AP_FORCE_DFU4

2

12

0% 1/32W MF 01005

RS

Sequencer controllable RS = requires sequencer

CRITICAL

R2010

Y2001

3.92K

0.1% 1/20W MF 0201 2 ROOM=PMU

R G M P C D A

VDROOP0* G6 VDROOP1* G7

D

19 20 21

NOSTUFF 5% 1/32W MF 01005

1

GPIO21 = I2C SCL is for Chestnut dark current mitigation

32.768KHZ-20PPM-12.5PF 1

1 C2003 22PF

2

1.60X1.00-SM ROOM=PMU

5% 16V CERM 2 01005

ROOM=PMU

19

1

C2004 22PF

5% 16V 2 CERM 01005

PMU_VSS_RTC

ROOM=PMU

XW2001

SHORT-20L-0.05MM-SM

1

A

VDD_RTC

0.22UF

2

1

AP NTC

N9

20% 2 6.3V X5R 0201 ROOM=PMU

SHORT-20L-0.05MM-SM ROOM=SOC

R O T A R A P M O C

AMUX_B5 AMUX_B6 AMUX_B7 AMUX_BY

V14 XTAL1 V15 XTAL2

PMU_VDD_RTC

2 OMIT

R2003 2

1

VREF J7

PRE_UVLO* N10

SYS_ALIVE FORCE_SYNC CRASH* IRQ*

AMUX_A0 AMUX_A1 AMUX_A2 AMUX_A3 AMUX_A4 AMUX_A5 AMUX_A6 AMUX_A7 AMUX_AY

NC

PMUGPIO_TO_WLAN_CLK32K

XW2004

ROOM=SOC

PMU_IREF

ROOM=PMU

SLEEP_32K OUT_32K

SHORT-20L-0.05MM-SM

1

IREF K6

20% 6.3V 2 X5R 0201

SLEEP1_REQ SLEEP1_RDY ACTIVE_REQ ACTIVE_RDY

J14 J15 J16 K16 K15 K14 J13 K13 K12

NC

LCM_TO_CHESTNUT_PWR_EN TRISTAR_TO_PMU_USB_BRICK_ID PP1V2_MAGGIE PMU_AMUX_AY

OMIT

RADIO PA NTC

N6 N5 P5

AP_TO_PMU_AMUX_OUT PMU_ADC_IN

ACC_BUCK_TO_PMU_AMUX

37

H5 L13 L10 G5

SPI_PMGR_TO_PMU_SCLK SPI_PMGR_TO_PMU_MOSI SPI_PMU_TO_PMGR_MISO

PMU_TCAL

XW2003 SHORT-20L-0.05MM-SM

ROOM=SOC

S T S E F S E E R R

N13 SCL M13 SDA

FOREHEAD_NTC REAR_CAMERA_NTC RADIO_PA_NTC AP_NTC

SHORT-20L-0.05MM-SM

1

I2C1_AP_SCL I2C_PMU_SDA_R

27

53 20

53

OMIT

ROOM=SOC

NC

53

7

ROOM=PMU PLACE_NEAR=U1801:2mm

R2002 10KOHM-1%

C2013

HIGH=FORCE PWM MODE

PMU_TO_AOP_IRQ_L

BBPMU_TO_PMU_AMUX1 BBPMU_TO_PMU_AMUX2

53

1

SYSTEM_ALIVE LCM_TO_MANY_BSYNC

BUTTON_VOL_UP_L

44 12

1

C2007 1

RESET_IN1 RESET_IN2 RESET_IN3 RESET* SHDN

Active high with int 200k PD

1000PF

2

P9 P10 P11 M5 NC P12

ROOM=PMU

1

SYM3OF 4

AP_TO_PMU_WDOG_RESET TRISTAR_TO_PMU_HOST_RESET AP_TO_PMU_SOCHOT_L PMU_TO_SYSTEM_COLD_RESET_L

5% 1/32W MF 01005

PP1V8_ALWAYS

D2333A1

5% 1/32W MF 01005

16 18 20 21 32 36 37 40 41 46 47 48 52 53

R2008

BUTTON_RINGER_A

44 20

D

NOSTUFF 100K

SM PP2003 P2MM-NSM

2

ROOM=PMU

OMIT

NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC

SYNC_MASTER=Sync


PAGETITLE


Apple Inc.

051-00482 REVISION

8.0.0

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PAGE

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D

A

8

7

6

5

4

3

2

1

TIGRIS CHARGER D

D

PP_VDD_MAIN 1

C2113

1

20% 6.3V CERM-X5R 04 02 -9

20% 2 6.3V CERM-X5R 0 40 2- 9

10UF

2

10UF

ROOM=CHARGER

TIGRIS_PMID

C

C2103

1

5% 35V NP0-C0G 01005

2

100PF

2

ROOM=CHARGER

C2109

1

10% 16V X5R-CERM 0402-1

2

4.2UF

ROOM=CHARGER

C2111

1

10% 16V X5R-CERM 0402-1

2

4.2UF

C2112 5% 35V NP0-C0G 01005

2

N I N I N I N I A A A A M M M M _ _ _ _ D D D D D D D D V V V V

ROOM=CHARGER

C2104

1

5% 10V C0G-CERM 01005

2

220PF

2 2 2 2 A B D C

100PF

ROOM=CHARGER

ROOM=CHARGER

TIGRIS_LDO 1

1

C

C2115 2.2UF

ROOM=CHARGER

20% 6.3V X5R-CERM 0201-1

2 3 1 2 3 A A B B B

F5

PP5V0_USB 1

20 19

C2101

1

10% 16V X5R-CERM 0402-1

2

4.2UF

PP1V8_ALWAYS

2 1

ROOM=CHARGER

R2101

47 47 20 17 15

R2103 1

100

R2104

B

USB_VBUS_DETECT

1

30.1K 2 ROOM=CHARGER

1% 1/32W MF 01005

40

I2C1_AP_SDA I2C1_AP_SCL SYSTEM_ALIVE TRISTAR_TO_TIGRIS_VBUS_OFF

F4: 100 kOhm pullup to VLDO (regulated output voltage)

2 ROOM=CHARGER

5% 1/32W MF 01005

#24558610: Change to 100ohm

7

10% 16V CER-X7R 01005

ROOM=CHARGER

5% 1/32W MF 2 01005 ROOM=CHARGER

TIGRIS_TO_PMU_INT_L

C2110 330PF

100K

20

A5 B5 D5 C5 E5 G3 E4 E3 F4

TIGRIS_TO_PMU_INT_R_L

G2

TIGRIS_VBUS_DETECT

F1 F3

PMID VBUS VBUS VBUS VBUS VBUS

U2101

28

SN2400AB0 WCSP

LDO

TO TRINITY

A1

BOOT

G5

A4 BUCK_SW B4 BUCK_SW D4 BUCK_SW C4 BUCK_SW SDA A1 BAT SCL B1 BAT D1 SYS_ALIVE BAT C1 BAT VBUS_OVP_OFF E1 BAT_SNS INT E2 ACT_DIODE VBUS_DET G1 D D D D HDQ_HOST F2 TEST N N N N G G G G HDQ_GAUGE

1

TIGRIS_BOOT

C2102

1

330PF

2

16V X5R 0201

CSD68827W BGA

ROOM=CHARGER

1

D

5% 10V C0G-CERM 2 01005

ROOM=CHARGER

Q2101

G

220PF

10% 16V CER-X7R 2 01005

ROOM=CHARGER 10%

CRITICAL

3 3 3 3 A B D C

C2106

0.047UF

ROOM=CHARGER

P P P P

#25112685,Remove Snub

C2105

G4

CRITICAL

S

ROOM=CHARGER

NO_XNET_CONNECTION

41 40 4

4 9 10 18 19 23 25 26 27 28 30 31 33 34 35 37 39 40 41 46 53

C2114

1 2 3 C C C

ROOM=CHARGER

TIGRIS_BUCK_LX

PP_BATT_VCC VBATT_SENSE

22

1

SWI_AP_BI_TIGRIS TIGRIS_TO_BATTERY_SWI_1V8

C2108

1

10% 16V CER-X7R 01005

20% 6.3V 2 X5R-CERM 0201-1

330PF

TIGRIS_ACTIVE_DIODE

NOSTUFF

12

2

R2102 1

47 46 41 40 37 36 32 20 18 16 53 52 48

2.2UF

ROOM=CHARGER

100K

C2117

4 22

1

C2118 2.2UF

20% 6.3V 2 X5R-CERM 0201-1

ROOM=CHARGER

ROOM=CHARGER

5% 1/32W MF 01005 2

PP1V8_SDRAM

B

ROOM=CHARGER

1

R2105

Q2102

40.2K 1% 1/32W MF

1

RV3C002UN DFN

G

2 01005

2

S

D

3

TIGRIS_TO_BATTERY_SWI

22

S Y M _ V E R _ 1

A

SYNC_MASTER=Sync


PAGETITLE

SYSTEM POWER:CHARGER DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


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D

A

8

7

6

5

4

3

2

1

D

D

BATTERY CONNECTOR THIS ONE ON MLB

--->

516S00172 (matches d10 mlb MCO rev 27)

C

C XW2201


ROOM=BATTERY_B2B

F-ST-SM

21

TIGRIS_TO_BATTERY_SWI

100

TIGRIS_BATTERY_SWI_CONN

2

5% 1/32W MF 01005

1

C2201 56PF

ROOM=BATTERY_B2B 2

5% 25V NP0-C0G-CERM 01005

ROOM=BATTERY_B2B

1 3 4 9


11 8

7

R2201

21

PLACE_NEAR=J2201:2mm

J2201

RCPT-BATT-SHORT

1

VBATT_SENSE

2

PP_BATT_VCC

5 2 6 10 12

ROOM=BATTERY_B2B

1

C2202

1

5% 25V NP0-C0G-CERM 01005

2

56PF

2

ROOM=BATTERY_B2B

C2203

1

5% 16V NP0-C0G 01005

2

100PF

ROOM=BATTERY_B2B

4 21

C2204 220PF

5% 10V C0G-CERM 01005

ROOM=BATTERY_B2B

CRITICAL

ALLOW_APPLE_PREFIX

B

B

A

SYNC_MASTER=Sync


PAGETITLE

SYSTEM POWER:BATTERY CONN DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


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PAGE

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D

A

8

7

6

5

4

3

2

1

D

D

BOOST

C

C

When VDD_MAIN < 3.4, boosts to 3.4 Otherwise tracks VDD_MAIN 53 28 27 26 25 21 19 18 10 9 4 46 41 40 39 37 35 34 33 31 30

PP_VDD_MAIN 1

C2309 10UF

20% 6.3V 2 CERM-X5R 0402-9

ROOM=BOOST

1

L2301 ROOM=BOOST

C2301

0.47UH-20%-4.2A-0.048OHM

4.7UF

20% 6.3V 2 X5R-CERM1 402 ROOM=BOOST

1 20

PIUA20121T-SM

PMU_TO_BOOST_EN 1

R2301 511K

1% 1/32W MF 2 01005

2

SYS_BOOST_LX

A3 VIN A4 VIN C3 SW C4 SW A1

VOUT B3 B4

SN61280D ROOM=BOOST

I2C0_AP_SCL

B2 SCL

47

I2C0_AP_SDA

C2 SDA

LCM_TO_MANY_BSYNC

A2 GPIO

1

C2302

1

15UF

DSBGA

EN

47

PP_VDD_BOOST

U2301 VOUT

2

20% 6.3V X5R

0402-1 ROOM=BOOST

C2303

1

20% 6.3V X5R

20% 6.3V 2 X5R 0402-1

15UF

2

0402-1 ROOM=BOOST

C2304 15UF

ROOM=BOOST

1

C2307

1

15UF

20% 6.3V 2 X5R 0402-1 ROOM=BOOST

C2308

1

15UF

2

20% 6.3V X5R

0402-1 ROOM=BOOST

19 25 30 32 37 38 53

C2306 220PF

2

5% 10V C0G-CERM 01005 ROOM=BOOST

B1 VSEL C1 BYP* 53 39 20 13

HIGH=FORCE PWM MODE

PGND

AGND

2 3 4 1 D D D D

Control details from Radar 19634006

B

B

A

SYNC_MASTER=Sync


PAGETITLE

SYSTEM POWER:BOOST DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


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PAGE

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D

A

8

7

6

5

4

3

2

1

MAGNESIUM - COMPASS

CARBON - ACCEL & GYRO INVENSENSE, MPU-6800: C2403=0.1UF

D

D 24

36 24 18

PP1V8_MAGGIE_IMU 1

BOMOPTION=CARBON_1

C2418

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

2

36 24 18

BOMOPTION=CARBON_1

C2402

1

20% 6.3V X5R-CERM 01005

2

20% 6.3V X5R-CERM 01005

ROOM=CARBON

2

ROOM=CARBON

6 1

VDD

100K

VDD

U2402 HSCDTD601A-19A NC

VDDIO

NC NC

MPU-6900-21 SPI_AOP_TO_ACCEL_GYRO_CS_L

13

5 8 14

GYRO_CHARGE_PUMP

SPC 2 SDI 3 SDO 4

CS FSYNC REGOUT

7

ACCEL_GYRO_TO_AOP_INT

13

NC

LGA

ROOM=SOC

DRDY 6

INT

SPI_AOP_TO_IMU_SCLK_R1 SPI_AOP_TO_IMU_MOSI SPI_IMU_TO_AOP_MISO ACCEL_GYRO_TO_AOP_DATARDY

NC

13 24 13 24

24

BOMOPTION=CARBON_1

1

13 24

C2419

2

13

B1 B3 D1 D2

RSV RSV RSV RSV

C2403

SDO B4

SPI_IMU_TO_AOP_MISO

13 24

SDA/SDI A4

SPI_AOP_TO_IMU_MOSI

13 24

SCL/SCK A3

SPI_AOP_TO_IMU_SCLK_R1

13 24

SPI_AOP_TO_COMPASS_CS_L

13

CSB A2 114K INT PU

D4 RST*

PP1V8_MAGGIE_IMU_FILT

TRG/SE C3 NC 114K INT PD

1.09M INT PU

DRDY A1

ROOM=MAGNESIUM

+/-0.1PF 16V NP0-C0G 01005

COMPASS_TO_AOP_INT

VSS

PP2404 1 SM

1 C

PP

P2MM-NSM

D D D D D D N N N N N N G G G G G G

0.1UF 10% 6.3V X6S 0201

ROOM=MAGNESIUM

PP2401 1 SM

C

PP

9 0 1 2 3 5 1 1 1 1 1

ROOM=CARBON

13

CRITICAL

ROOM=CARBON

CRITICAL

BOMOPTION=CARBON_1

LGA

C2 VPP

5PF

ROOM=CARBON

C

4 C

20% 6.3V X5R-CERM 0201-1

ROOM=MAGNESIUM

U2401

5% 1/32W MF 2 01005

2

2

ROOM=MAGNESIUM

BOMOPTION: CARBON_1 #25765850:Update Carbon APN

1

C2408 2.2UF

20% 6.3V X5R-CERM 01005

BOMOPTION=CARBON_1

R2401

1

1

C2401 0.1UF

0.1UF

BOMOPTION=CARBON_1

1

1

C2415

0.1UF

ROOM=CARBON

PP1V8_MAGGIE_IMU


P2MM-NSM

ROOM=MAGNESIUM

PP2402 1

#25782019:Add 0ohm P P1 V8 _M AG GI E_ IM U

1

0.00

2

0% 1/32W MF 01005 ROOM=BOT_CARBON

24

1

C2448

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

2

PP

C2442

1

20% 6.3V X5R-CERM 01005

6.3V 2 X5R-CERM

0.1UF

ROOM=BOT_CARBON

PP1V8_MAGGIE_IMU_R

P2MM-NSM

C2445

ROOM=MAGNESIUM

0.1UF

#25740540:PP for South Carbon MOSI

20%

ROOM=BOT_CARBON

01005

1

ROOM=BOT_CARBON

R2441

PP2440 P2MM-NSM

VDDIO

U2404

5% 1/32W MF

MPU-6900-21

2 01005 ROOM=SOC

LGA

SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L

13

SM

1

VDD

100K

PP

ROOM=HOMER

6 1 1

5 8 14

BOT_GYRO_CHARGE_PUMP

SPC 2 SDI 3 SDO 4

CS FSYNC REGOUT

SPI_AOP_TO_IMU_SCLK_R2 SPI_AOP_TO_IMU_MOSI SPI_IMU_TO_AOP_MISO

13

NOSTUFF

13 24

1

13 24

XW2404

7


NC 1

C2443 0.1UF

2

2

BOT_ACCEL_GYRO_TO_XW_INT

DRDY 6

INT

BOT_ACCEL_GYRO_TO_AOP_DATARDY

C2449 5PF

OMIT

B

P2MM-NSM

PP2403 SM 1

P P1 V8 _M AG GI E_ IM U_ R

24

SM

ROOM=MAGNESIUM

R2404 36 24 18

PP

13

2

+/-0.1PF 16V NP0-C0G 01005

ROOM=BOT_CARBON

ROOM=BOT_CARBON

ROOM=BOT_CARBON NO_XNET_CONNECTION=1

CRITICAL

XW2404 to balance Via/Cu at INT pin

B

D D D D D D N N N N N N G G G G G G

10% 6.3V X6S 0201

9 0 1 2 3 5 1 1 1 1 1

ROOM=BOT_CARBON

PHOSPHORUS

#24593845 BOSCH (APN:338S00188): nostuff C2420/C2421/C2422/C2423 and R2403 PU ST (APN:338S00230): stuff C2420-C2423, C2420R2422 with 155S00017, stuff R2403 PU C2420=4pF(131S025 3),C2405=3pF(131S 0251) per #25691124

R2422 24

1

C2413

1

20% 6.3V X5R-CERM 01005

20% 2 6.3V X5R-CERM 01005

0.1UF

2

C2405

NOSTUFF

1

0.1UF

ROOM=PHOSPHORUS

24

0.00

1


C2420

NOSTUFF

1

4PF

2

ROOM=PHOSPHORUS

+/-0.1PF 16V NP0-C0G 01005

ROOM=PHOSPHORUS

C2421 20PF

2

5% 16V NP0-C0G-CERM 01005

0% 1/32W MF 01005

2

ROOM=PHOSPHORUS

ROOM=PHOSPHORUS

NOSTUFF

1

C2422

2

5% 16V NP0-C0G-CERM 01005

ROOM=PHOSPHORUS

PP1V8_MAGGIE_IMU

NOSTUFF

1

20PF

C2423

1

+/-0.1PF 16V NP0-C0G-CERM 01005

20% 2 6.3V X5R-CERM 0201-1

5.6PF

2

ROOM=PHOSPHORUS

18 24 36

C2414 2.2UF

ROOM=PHOSPHORUS

PP1V8_MAGGIE_IMU_FILT 8

BOSCH: Internal PU

1

2 13

NOSTUFF

5% 1/32W MF 01005

ROOM=SOC

6

VDD VDDIO

R2403 100K

A

U2403

24 13 24 13

SPI_AOP_TO_IMU_MOSI SPI_AOP_TO_IMU_SCLK_R1 SPI_AOP_TO_PHOSPHORUS_CS_L

BMP284AA

3 SDI 4 SCK 2 CS*

LGA

SDO 5 IRQ 7

SPI_IMU_TO_AOP_MISO13

24

SYNC_MASTER=Sync


PAGETITLE

SENSORS

PHOSPHORUS_TO_AOP_INT_L 13

GND

DRA WI NG N UMB ER

1

Apple Inc.

051-00482 REVISION

8.0.0

R


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PAGE

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D

A

8

7

6

UTAH POWER

5

4

3

2

1

IO FILTERS

Scrub voltage selection

NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC. VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY

U2501

D 53 38 37 32 30 23 19

PP_VDD_BOOST 1

C2527 2.2UF

2

A1

ROOM=RCAM_B2B

B1

FL2504

LP5907UVX2.925-S DSBGA VOUT A2

PP2V9_UT_AVDD_CONN 1

See Page46: D11x C2507 is 4UF

VEN

20% 6.3V X5R-CERM 0201-1

C2502

1

10% 6.3V CER-X5R 01005

2

0.22UF

GND 2

2 B

ROOM=RCAM_B2B

45 46

9

1

AP_TO_UT_CLK

C2504

1

5% 10V C0G-CERM 01005

2

220PF

ROOM=RCAM_B2B

1

2

ROOM=RCAM_B2B

45

ROOM=RCAM_B2B

C2505

1

2.2UF

9

AP_TO_UT_SHUTDOWN_L

1

2

01005

C2501

1

ROOM=RCAM_B2B

220PF

20% 6.3V X5R-CERM 0201-1

2

45

2

ROOM=RCAM_B2B

C2514 220PF

5% 10V 2 C0G-CERM 01005

5% 10V C0G-CERM 01005

ROOM=RCAM_B2B

ROOM=RCAM_B2B

L2502

FL2503

33-OHM-25%-1500MA 1

AP_TO_UT_SHUTDOWN_CONN_L

5% 25V NP0-C0G-CERM 01005

FL2501

PP2V8_UT_AF_VAR_CONN 1

ROOM=RCAM_B2B

PP3V0_ALS_APS_CONVOY

45

150OHM-25%-200MA-0.7DCR

2

0201

30 29 19

AP_TO_UT_CLK_CONN

C2513 56PF

5% 16V NP0-C0G 01005

NOSTUFF

L2501

PP2V8_UT_AF_VAR

1

ROOM=RCAM_B2B

100PF

ROOM=RCAM_B2B

2

01005

C2512

33-OHM-25%-1500MA 30 18

D

150OHM-25%-200MA-0.7DCR

VIN

150OHM-25%-200MA-0.7DCR

PP3V0_UT_SVDD_CONN

2

0201

1

ROOM=RCAM_B2B

C2519

1

2.2UF

26

1

UT_AND_NV_TO_STROBE_DRIVER_STROBE

UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN30

2

01005

1

ROOM=RCAM_B2B

220PF

20% 6.3V X5R-CERM 0201-1

2

C

45

C2518

2

ROOM=RCAM_B2B

45

C2515 220PF

5% 10V C0G-CERM 01005

5% 2 10V C0G-CERM 01005

ROOM=RCAM_B2B

C

ROOM=RCAM_B2B

L2503

33-OHM-25%-1500MA 19

PP1V2_UT_DVDD

1

PP1V2_UT_VDD_CONN

2

0201

1

ROOM=RCAM_B2B

C2506

1

2.2UF

2

20% 6.3V X5R-CERM 0201-1 ROOM=RCAM_B2B

C2508

1

20% 6.3V X5R-CERM 0201-1

20% 2 6.3V X5R-CERM 0201-1

2.2UF

2

C2510

1

2.2UF

ROOM=RCAM_B2B

ROOM=RCAM_B2B

C2503

1

220PF

5% 10V C0G-CERM 01005

2

ROOM=RCAM_B2B

45

C2521 15PF

2

5% 16V NP0-C0G-CERM 01005

ROOM=RCAM_B2B Desense for Wifi frequencies

L2504

33-OHM-25%-1500MA 29 18 17 16 13 12 11 9 8 7 5 52 48 47 46 39 30

PP1V8

1

2 0201

ROOM=RCAM_B2B

PP1V8_UT_CONN 1

C2509

1

1.0UF

2

20% 6.3V X5R 0201-1

ROOM=RCAM_B2B

45

LPDP FILTERS

C2511 220PF

2

AC return path for LPDP

5% 10V C0G-CERM 01005

which is referenced to GND and VDD_MAIN

ROOM=RCAM_B2B 53 28 27 26 23 21 19 18 10 9 4 46 41 40 39 37 35 34 33 31 30

PP_VDD_MAIN 1

C2522

1

5% 16V NP0-C0G-CERM 01005

2

33PF

2

B

ROOM=RCAM_B2B

10

90_LPDP_UT_TO_AP_D2_P

10

90_LPDP_UT_TO_AP_D2_N

10

10

90_LPDP_UT_TO_AP_D2_P MAKE_BASE=TRUE

90_LPDP_UT_TO_AP_D2_N MAKE_BASE=TRUE





MAKE_BASE=TRUE

MAKE_BASE=TRUE

C2528

1

5% 16V NP0-C0G-CERM 01005

2

33PF

C2529 33PF

ROOM=RCAM_B2B

5% 16V NP0-C0G-CERM 01005

B

ROOM=RCAM_B2B

C2523 1

0.1UF 90_LPDP_UT_TO_AP_D2_CONN_P

45

C2524 1

0.1UF 90_LPDP_UT_TO_AP_D2_CONN_N

45

C2525

0.1UF 90_LPDP_UT_TO_AP_D3_CONN_P

45

C2526

0.1UF 90_LPDP_UT_TO_AP_D3_CONN_N

45

2 20% 6.3V X5R-CERM 01005 2

ROOM=RCAM_B2B

ROOM=RCAM_B2B

20% 6.3V X5R-CERM 01005

1 2 20% 6.3V X5R-CERM 01005 1 2 ROOM=RCAM_B2B 20% 6.3V X5R-CERM 01005 ROOM=RCAM_B2B

C2530 0.1UF 10

LPDP_UT_BI_AP_AUX

LPDP_UT_BI_AP_AUX

1

LPDP_UT_BI_AP_AUX_CONN

2

MAKE_BASE=TRUE

20% 6.3V X5R-CERM 01005

1

56PF

ROOM=RCAM_B2B

A

45

C2520

2

5% 25V NP0-C0G-CERM 01005 ROOM=RCAM_B2B

SYNC_MASTER=sync


PAGETITLE

B2B FILTERS: UTAH DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

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STROBE DRIVERS INSIDE NEO SIP MODULE D10/sip_neo

D

D

M2600 53 46 27 26 25 23 21 19 18 10 9 4 41 40 39 37 35 34 33 31 30 28

PP_VDD_MAIN

C2609

NEO

C2610

1

10UF

10UF

20% 6.3V CERM-X5R 2 0402-9 ROOM=STROBE

9 25

53 46 37

C2613

1

SIP

1

220PF

20% 6.3V CERM-X5R 2 0402-9

5% 10V C0G-CERM 2 01005

ROOM=STROBE

ROOM=STROBE

SYM1OF 3

B8 D2 D3 C9

AP_TO_STROBE_DRIVER_HWEN

C8

UT_AND_NV_TO_STROBE_DRIVER_STROBE

D8

BB_TO_STROBE_DRIVER_GSM_BURST_IND 48

I2C_ISP_UT_SDA

48

I2C_ISP_UT_SCL

B9 B10

ROOM=STROBE

VDD VDD VDD

CRITICAL

HWEN1

D9 LED1 D10 LED1

PP_STROBE_DRIVER1_COOL_LED

44 45

D6 LED2 D7 LED2

PP_STROBE_DRIVER1_WARM_LED

44 45

STB1 NTC

C10

STROBE_MODULE_NTC

44

GSM1 SDA1 SCL1

C

C 53 46 27 26 25 23 21 19 18 10 9 4 41 40 39 37 35 34 33 31 30 28

M2600

PP_VDD_MAIN

C2611 10UF

1

20% 6.3V CERM-X5R 2 0402-9 ROOM=STROBE2

NEO

C2612

1

10UF

20% 6.3V CERM-X5R 2 0402-9 ROOM=STROBE2

C2614

SIP

1

220PF

5% 10V C0G-CERM 2 01005 ROOM=STROBE

SYM2OF 3

B18 VDD B19 VDD D13 VDD

LED1 B11 LED1 B12

PP_STROBE_DRIVER2_COOL_LED

44 45

C12 HWEN0

LED2 B14 LED2 B15

PP_STROBE_DRIVER2_WARM_LED

44 45

A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20

C13 STB0 NTC C11 B13 GSM0 46

I2C_ISP_NV_SDA

D12 SDA2

46

I2C_ISP_NV_SCL

D11 SCL2

B

53 46 27 26 25 23 21 19 18 10 9 4 41 40 39 37 35 34 33 31 30 28

B2 B3 B4 B5 B6 B7 B16 B17 B20 C1

PP_VDD_MAIN 1

C2617

1

5% 10V C0G-CERM 01005

2

220PF

2

ROOM=STROBE2

C2618 220PF

5% 10V C0G-CERM 01005

ROOM=STROBE2

AC return path for plane edge termination, which occurs near the Strobe modules.

C2 C3 C4 C5 C6 C7

M2600

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

NEO SIP

SYM3OF 3

S 1 1 D D N N

G G 1 1 A B

A

S 2 2 D D N N

G G

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

C14 C15 C16 C17 C18 C19 C20 D1 D4 D5 D14 D15 D16 D17 D18 D19 E1 E2 E3 E4

B

E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 E16 E17 E18 E19

0 0 2 2 E D

CDS_LIB=apple SYNC_MASTER=Sync

PAGETITLE


CAMERA:STROBE DRIVER DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

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ACCESSORY BUCK #25761020:Add Bypass 0ohm NOSTUFF

R2711 1

D

0.00

2

D

1% 1/20W MF 0201

From PMU LDO6

ROOM=ACC_BUCK

OMIT_TABLE

1

U2710 A2 VIN WLCSP-COMBOVOUT A1

PP_VDD_MAIN

C2704

1

2.2UF

FPF1204UCX 53 28 26 25 23 21 19 18 10 9 4 46 41 40 39 37 35 34 33 31 30

20% 2 6.3V X5R-CERM 0201-1

ROOM=PMU

20

B2 ON

PMU_TO_ACC_BUCK_SW_EN

1 ROOM=ACC_BUCK

From PMU GPIO14

R2700 100K

5% 1/32W MF 01005 2 ROOM=ACC_BUCK

1

K

20%

2 6.3V

1 B 1

X5R-CERM 0201-1

D2700 SOD962-2

PMEG3002ESF

ROOM=ACC_BUCK

R2710

A ROOM=ACC_BUCK

100K

FET Changes per #25687842 4/12/2016

1% 1/32W MF 2 01005

2 A

Q2700

ROOM=ACC_BUCK

PMCM4401VPE

VIN

U2700 ACC_BUCK_EN

WLCSP

EN

A1 VSEL

12 AP_TO_ACC_BUCK_VSEL

From AP GPIO1

B2

WLCSP

CRITICAL L2700 0.47UH-20%-2.52A-0.08OHM

FAN53612-1.5V-1.9V

C

ROOM=PMU

C2700 2.2UF

GND

C2705 2.2UF

20% 2 6.3V X5R-CERM 0201-1

PP_VDD_MAIN_ACC_BUCK_VIN

SW

B1

FB

C1 ACC_BUCK_FB

1

ACC_BUCK_SW

#25370332: For EMC #25919133: C2707 on P46

2

46

R2701 100K 5% 1/32W MF

2 01005 ROOM=ACC_BUCK

C2710 0.22UF

2

1

C2702 10UF

2 C

20% 2 6.3V CERM-X5R 0402-9

10% 6.3V CER-X5R 01005

R2705 10K

ROOM=ACC_BUCK

1

5% 1/32W MF 01005 ROOM=ACC_BUCK 2

20

D

S

A2 B2

ROOM=ACC_BUCK

GND 1

B1

PIGA1608-SM

27

ROOM=ACC_BUCK

1

PP_ACC_BUCK_VAR

ROOM=ACC_BUCK

1

C2703

1

220PF

5% 2 10V C0G-CERM 01005 ROOM=ACC_BUCK

OMIT

C2701

2

SHORT-20L-0.05MM-SM

20% 6.3V X5R-CERM 01005

27

ACC_BUCK_FB

Q2701

1

2

R2702 200K

0.1% 1/32W TF 2 01005

B1

D

S

A2 B2

2 OMIT

XW2707

20% 6.3V CER-X5R 0201

ROOM=TRISTAR

SHORT-20L-0.05MM-SM

ROOM=TRISTAR 1 NO_XNET_CONNECTION=1

#25741319: Change to 4UF

ROOM=ACC_BUCK

ACC_BUCK_TO_PMU_AMUX

C 19 27 40

C2708 4UF

PMCM4401VPE WLCSP

1

PP_ACC_VAR

2

ROOM=ACC_BUCK NO_XNET_CONNECTION=1 PLACE_NEAR=Q2700:2mm

ROOM=ACC_BUCK

#25172498

1

To Tristar on Pg40

G 1 ROOM=TRISTAR A

XW2700

0.1UF

G 1 ROOM=TRISTAR A

PMU_AMUX_B3 FOR NOW

ACT_DIODE_TO_COMP_SENSE 1

R2704 200K

ACT_DIODE_TO_COMP_OUT

0.1% 1/32W TF

2 01005 ROOM=ACC_BUCK ACT_DIODE_TO_COMP_POS 40 27 19

PP_ACC_VAR

C2706

1

0.22UF

5

10% 6.3V CER-X5R 2 01005

VCC

U2701

ROOM=ACC_BUCK

4 IN+

UDFN

VOUT 6

B

ACT_DIODE_TO_COMP_NEG 1

R2706 200K 0.1% 1/32W TF


A

SCY992200A

3 IN-

NC 2

B NC

#25987909: To Resistor Divider

VEE 1

ROOM=ACC_BUCK

1

R2703 200K 0.1% 1/32W TF


SYNC_MASTER=sync

PAGETITLE


Accessory: Buck Circuit DRA WI NG N UMB ER

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051-00482 REVISION

8.0.0

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D

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M2800

M2800

TRINITY_BLUE

TRINITY_BLUE

SIP

C

53 46 27 26 25 23 21 19 18 10 9 4 41 40 39 37 35 34 33 31 30 28

PP_VDD_MAIN

L4 M4 N4

VDD_T VDD_T VDD_T

SYM1OF 6

SIP

TIG L6 TIG M6 TIG N6

TIGRIS_BUCK_LX

21

53 46 27 26 25 23 21 19 18 10 9 4 41 40 39 37 35 34 33 31 30 28

PP_VDD_MAIN

D5 VDD1_2 D6 VDD1_2 F2 G2 H2 J2

VDDX_1 VDDX_1 VDDX_1 VDDX_1

M2800

M2800

TRINITY_BLUE

TRINITY_BLUE

SYM2OF 6

SYM5OF 6

SIP

V2 VDD_A V3 VDD_A

ARC1_LX

35

M2800 TRINITY_BLUE SIP

B

A

SYM3OF 6

F6 G6 H6 J6

BL_SW1_LX

37

BL1_2 B5 BL1_2 B6

BL_SW2_LX

37

BL2_1 Q6 BL2_1 R6 BL2_1 S6 BL2_1 T6

BL34_SW1_LX

46

BL2_2 B2 BL2_2 B3

BL34_SW2_LX

46

BL1_1 BL1_1 BL1_1 BL1_1

SIP

ARC X2 ARC X3

D2 VDD2_2 D3 VDD2_2 Q2 R2 S2 T2

V5 VDD_S V6 VDD_S

SYM4OF 6

SPK SPK

X5 X6

SPEAKERAMP1_LX

34

VDDX_1 VDDX_1 VDDX_1 VDDX_1

A3 A4 A5 A6 A7 B1 B4 B7 C1 C2 C3 C4 C5 C6 C7 D1 D4 D7 E1 E2 E3 E4 E5 E6 E7 F1 F3 F4 F5 F7 G1 G3 G4 G5 G7 H1 H3 H4 H5 H7 J1 J3 J4 J5 J7 K1 K2 K3 K4 K5 K6 K7 L1 L2 L3 L5 L7 M1 M2 M3

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

M2800 TRINITY_BLUE SIP

SYM6OF 6

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

S 1 1 D D N N G G 1 2 A A

M5 M7 N1 N2 N3 N5 N7 P1 P2 P3 P4 P5 P6 P7 Q1 Q3 Q4 Q5 Q7 R1 R3 R4 R5 R7 S1 S3 S4 S5 S7 T1 T3 T4 T5 T7 U1 U2 U3 U4 U5 U6 U7 V1 V4 V7 W1 W2 W3 W4 W5 W6 W7 X1 X4 X7 Y1 Y2 Y3 Y4 Y5

C

B

S 2 2 D D N N G G 7 6 Y Y

SYNC_MASTER=sync

PAGETITLE


TRINITY:FF SPECIFIC DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

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NEW HAMPSHIRE POWER 1

PP1V8

1

FL2913

150OHM-25%-200MA-0.7DCR

2

PP1V8_NH_IO_CONN

0201

1

ROOM=FOREHEAD

C2914

1

0.1UF

2

PP3V0_ALS_APS_CONVOY

30 25 19 45

1

2

PP3V0_ALS_CONVOY_CONN45

01005

C2902

1

ROOM=FOREHEAD

20% 6.3V X5R-CERM 01005

2

C2917

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

220PF

5% 10V C0G-CERM 01005

2

C2926 220PF

5% 10V C0G-CERM 01005

ROOM=FOREHEAD

ROOM=FOREHEAD

ROOM=FOREHEAD

ROOM=FOREHEAD

D

2

PROX, ALS, & CONVOY POWER

FL2901

33-OHM-25%-1500MA 17 16 13 12 11 9 8 7 5 52 48 47 46 39 30 25 18

3

D

FL2902

33-OHM-25%-1500MA 30 19

PP1V2_NH_NV_DVDD

1

PP1V2_NH_DVDD_CONN

2 0201

1

ROOM=FOREHEAD

C2916

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

2

C2915

1

20% 6.3V X5R-CERM 01005

2

0.1UF

C2903

FL2910

220PF

ROOM=FOREHEAD

ROOM=FOREHEAD

45

5% 10V C0G-CERM 01005

150OHM-25%-200MA-0.7DCR PP3V0_TRISTAR_ANT_PROX

53 41 40 19

ROOM=FOREHEAD

1

2

10-OHM-750MA 19

1

PP2V9_NH_AVDD

PP2V9_NH_AVDD_CONN 1

ROOM=FOREHEAD

C2909

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

2

ROOM=FOREHEAD

C2901

1

20% 6.3V X5R-CERM 01005

2

0.1UF

2

C2904 5% 10V C0G-CERM 01005

ROOM=FOREHEAD

SPEAKER2

2

AP_TO_NH_CLK_CONN 1

C2910

2

ROOM=FOREHEAD

SPEAKERAMP2_TO_SPEAKER_OUT_POS

46 45 33

1

5% 10V C0G-CERM 01005

ROOM=FOREHEAD

2

SPEAKERAMP2_TO_SPEAKER_OUT_NEG

AP_TO_NH_SHUTDOWN_CONN_L 1

C2935 220PF

2

150OHM-25%-200MA-0.7DCR 01005

C


ROOM=FOREHEAD

ROOM=FOREHEAD

5% 10V C0G-CERM 01005

45

56PF

FL2908

C2932 220PF

5% 2 25V NP0-C0G-CERM 01005

1

5% 10V C0G-CERM 01005


01005

AP_TO_NH_SHUTDOWN_L

220PF

ROOM=FOREHEAD

1

ROOM=FOREHEAD

9

C2908

220PF

ROOM=FOREHEAD

150OHM-25%-200MA-0.7DCR

C

1

20% 6.3V X5R-CERM 0201-1 ROOM=FOREHEAD

FL2907

1

C2927 2.2UF

2

45

NEW HAMPSHIRE I/O AP_TO_NH_CLK

1 #24511567: Remove C2918

2

01005-1

9

PP3V0_PROX_CONN

01005

ROOM=FOREHEAD

FL2903

33 45 46

C2911


C2931

220PF

1

220PF

5% 2 10V C0G-CERM 01005

5% 10V C0G-CERM 2 01005

ROOM=FOREHEAD

ROOM=FOREHEAD

R2903 SPEAKER_TO_SPEAKERAMP2_VSENSE_P

33

1

SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P

2

1

#25657495: Update FL2905 to 100ohm

2

R2905 1

100

5% 35V NP0-C0G 01005

ROOM=FOREHEAD

P DM _A DA RE _T O _C ON VO Y_ CL K_ CO N N

2

5% 1/32W MF 01005

R2904

45

C2905

1

SPEAKER_TO_SPEAKERAMP2_VSENSE_N

33

1

0.00

5% 25V NP0-C0G-CERM 01005

2

SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N

2

1

2

ROOM=FOREHEAD

FL2906

C2934 100PF

ROOM=FOREHEAD

5% 35V NP0-C0G 01005

PDM_CONVOY_TO_ADARE_DATA

1

2

PDM_CONVOY_TO_ADARE_DATA_CONN

01005

1

ROOM=FOREHEAD

45

C2906 56PF

5% 25V NP0-C0G-CERM

2

MIC3

01005

ROOM=FOREHEAD

32

PP_CODEC_TO_FRONTMIC3_BIAS

FL2914

150OHM-25%-200MA-0.7DCR 1

2

01005

PROX_BI_AP_AOP_INT_PWM_L

1

240

PROX_BI_AP_AOP_INT_PWM_L_CONN

2

1% 1/32W MF 01005

1

2

FL2904

C2921

31

FRONTMIC3_TO_CODEC_AIN4_N

1

2 ROOM=FOREHEAD

1

01005

2

ALS_TO_AP_INT_L

2

1

150OHM-25%-200MA-0.7DCR

ALS_TO_AP_INT_CONN_L

01005 ROOM=FOREHEAD

45

31

FRONTMIC3_TO_CODEC_AIN4_P

2

1

01005 1

ROOM=FOREHEAD

FL2909

150OHM-25%-200MA-0.7DCR 12

DZ2906

6.8V-100PF

ROOM=FOREHEAD

FL2911

A

FRONTMIC3_TO_CODEC_AIN4_CONN_N45


01005

5% 10V C0G-CERM 01005

2

01005 ROOM=FOREHEAD

150OHM-25%-200MA-0.7DCR

45

220PF

ROOM=FOREHEAD

45

DZ2905

6.8V-100PF

#25170697: R2915 to 240ohm/C2921 to 220pF

R2915 13 12

PP_CODEC_TO_FRONTMIC3_BIAS_CONN 1

ROOM=FOREHEAD

PROX/ALS I/O

B

ROOM=FOREHEAD

150OHM-25%-200MA-0.7DCR 33

45


0% 1/32W MF 01005

56PF

ROOM=FOREHEAD

B

C2933 100PF

ROOM=FOREHEAD

P D M_ AD AR E_ TO _C ON V OY _C LK

45


0% 1/32W MF 01005

CONVOY I/O 33

0.00

C2924

ROOM=FOREHEAD

FRONTMIC3_TO_CODEC_AIN4_CONN_P45

NO_XNET_CONNECTION=1 1

5% 2 25V NP0-C0G-CERM 01005 ROOM=FOREHEAD

DZ2907

SYNC_MASTER=Sync


PAGETITLE

B2B:FOREHEAD

6.8V-100PF

56PF

01005

2

ROOM=FOREHEAD

DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

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NEVADA CONNECTOR

NEVADA POWER

THIS ONE --->


1

THIS PAGE UNIQUE TO LARGE FORM FACTOR

OTHER FORM FACTOR SPECIFIC PAGES: 4 - Mechanical 46 - FF Specific

516S00152 RCPT (USED ON MLB) 516S00151 PLUG ROOM=NEVADA

J3001

AA26D-S022VA1 F-ST-SM

U3001

D

PP_VDD_BOOST

53 38 37 32 25 23 19

LP5907UVX2.925-S DSBGA VIN VOUT A2

A1

ROOM=NEVADA

PP2V8_UT_AF_VAR

30 25 18

B1 1

1

VEN

C3002

C3006

1

4UF

GND 2

2 B

2.2UF

2

PP2V9_NV_AVDD_CONN

20% 6.3V X5R-CERM 0201-1

C3007

1

0.22UF

20% 6.3V CER-X5R 0201

2

30

C3009

30

220PF

10% 6.3V CER-X5R 01005

ROOM=NEVADA

30

45 30 25

5% 10V C0G-CERM 01005

2

ROOM=NEVADA

30 30

ROOM=NEVADA

30 30

ROOM=NEVADA

30 30

I2C_NV_SDA_CONN I2C_NV_SCL_CONN UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN AP_TO_NV_SHUTDOWN_CONN_L UT_TO_NV_SYNC_J3001_CONN PP1V8_NV_IO_CONN LPDP_NV_BI_AP_AUX_CONN PP3V3_NV_SVDD_CONN PP1V8_NV_AF_CONN

L3003

33-OHM-25%-1500MA 29 19

PP1V2_NH_NV_DVDD

1

30

PP1V2_NV_VDD_CONN

2

0201

1

ROOM=NEVADA

C3016

1

2.2UF

20% 6.3V 2 X5R-CERM 0201-1

C3019

1

2.2UF

2

ROOM=NEVADA

C3021

1

20% 6.3V X5R-CERM 0201-1

5% 10V 2 C0G-CERM 01005

2.2UF

20% 6.3V X5R-CERM 0201-1

2

ROOM=NEVADA

C3001

1

220PF

ROOM=NEVADA

30

PP1V2_NV_VDD_CONN

24

23

2

1

4

3

6

5

8

7

10

9

12

11

14

13

16

15

18

17

20

19

22

21

26

25

90_LPDP_NV_TO_AP_D0_CONN_N 90_LPDP_NV_TO_AP_D0_CONN_P

D

30 30

90_LPDP_NV_TO_AP_D1_CONN_N 90_LPDP_NV_TO_AP_D1_CONN_P

30 30

AP_TO_NV_CLK_CONN

30

PP2V9_NV_AVDD_CONN

30

C3028 15PF

5% 16V 2 NP0-C0G-CERM 01005

ROOM=NEVADA

ROOM=NEVADA Desense for Wifi frequencies

GPIO FILTERS NOSTUFF

L3005

FL3002

33-OHM-25%-1500MA

C

PP2V8_UT_AF_VAR

30 25 18

1

150OHM-25%-200MA-0.7DCR

D11: STUFF L3001, L3004. NOSTUFF L3005, L3006 D12: NOSTUFF L3001, L3004. STUFF L3005, L3006

2

45

1

UT_TO_NV_SYNC_J2501_CONN

0201

1

ROOM=NEVADA

1

2

ROOM=NEVADA

30

0201 ROOM=NEVADA

1

C3017

45 30 25

220PF

2

UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN 1

5% 10V C0G-CERM 01005

L3002

5% 16V NP0-C0G 01005

ROOM=NEVADA

33-OHM-25%-1500MA 1

C3011 100PF

2

ROOM=NEVADA

FL3001

PP1V8_NV_IO_CONN

2

150OHM-25%-200MA-0.7DCR

30

0201 ROOM=NEVADA

1

C3020

1

20% 6.3V X5R 0201-1

2

1.0UF

2

C3026

9

AP_TO_NV_SHUTDOWN_L

1

AP_TO_NV_SHUTDOWN_L

2

MAKE_BASE=TRUE

1

ROOM=NEVADA

5% 10V C0G-CERM 01005

ROOM=NEVADA

AP_TO_NV_SHUTDOWN_CONN_L

01005

220PF

220PF

ROOM=NEVADA

L3004

PP3V3_USB

ROOM=NEVADA

1

PP3V3_NV_SVDD_CONN

2

R3002

30

0201 ROOM=NEVADA

B

1

C3018

1

220PF

NOSTUFF

33-OHM-25%-1500MA 2 PP3V0_ALS_APS_CONVOY 1

46 9

C3030

I2C_ISP_NV_SCL

1

MAKE_BASE=TRUE

2

20% 6.3V X5R-CERM 0201-1

ROOM=NEVADA

1

5% 16V NP0-C0G-CERM 01005

2

ROOM=NEVADA

C3004 5% 16V NP0-C0G-CERM 01005

2

33PF

ROOM=NEVADA

C3032

1

1

30

C3014 56PF

5% 2 25V NP0-C0G-CERM 01005

5% 16V NP0-C0G-CERM 01005

2

33PF

ROOM=NEVADA

FL3004

R3003

C3033 33PF

9

5% 16V NP0-C0G-CERM 01005 ROOM=NEVADA

AP_TO_NV_CLK_R

AP_TO_NV_CLK_R MAKE_BASE=TRUE

1

33.2 1% 1/32W MF 01005

ROOM=SOC

0.1UF

LPDP_NV_BI_AP_AUX

CKPLUS_WAIVE=I2C_PULLUP

I2C_NV_SDA_CONN

2

ROOM=NEVADA

1

C3031 10

0.00 0% 1/32W MF 01005

LPDP FILTERS 33PF

5% 25V 2 NP0-C0G-CERM 01005

ROOM=NEVADA

PP_VDD_MAIN

C3003

B

56PF

ROOM=NEVADA

I2C_ISP_NV_SDA MAKE_BASE=TRUE

2

30

C3013

R3001 46 9

1

1

ROOM=NEVADA

0201

1

CKPLUS_WAIVE=I2C_PULLUP

I2C_NV_SCL_CONN

2

ROOM=NEVADA

ROOM=NEVADA

53 46 41 26 25 23 21 19 18 10 9 4 40 39 37 35 34 33 31 28 27

0.00 0% 1/32W MF 01005

2.2UF

5% 2 10V C0G-CERM 01005

L3006

29 25 19

30

C3012

5% 2 10V C0G-CERM 01005

33-OHM-25%-1500MA 19 7

C

5% 16V NP0-C0G 01005

ROOM=RCAM_B2B

PP1V8_NV_AF_CONN

2

30

C3027 100PF

5% 16V NP0-C0G 01005

2

33-OHM-25%-1500MA

PP1V8

UT_TO_NV_SYNC_J3001_CONN 1

ROOM=NEVADA

100PF

L3001

25 18 17 16 13 12 11 9 8 7 5 52 48 47 46 39 29

2

01005

C3029

1

LPDP_NV_BI_AP_AUX

AP_TO_NV_CLK

2 1

C3005

LPDP_NV_BI_AP_AUX_CONN 1

20% 6.3V X5R-CERM 01005

5% 2 16V NP0-C0G 01005 NOSTUFF

2

C3008 100PF

2

1

2

01005 ROOM=NEVADA

5% 16V NP0-C0G 01005

AP_TO_NV_CLK_CONN 1

30

C3015 56PF

5% 2 25V NP0-C0G-CERM 01005

ROOM=NEVADA

ROOM=NEVADA

NOSTUFF

30

C3010

NEAR SOC

56PF

A

1

100PF

ROOM=NEVADA

2

MAKE_BASE=TRUE

ROOM=NEVADA

150OHM-25%-200MA-0.7DCR

NEAR B2B

5% 25V NP0-C0G-CERM 01005 ROOM=NEVADA SYNC_MASTER=sync

10

90_LPDP_NV_TO_AP_D0_P

10

90_LPDP_NV_TO_AP_D0_N

10

90_LPDP_NV_TO_AP_D1_P

90_LPDP_NV_TO_AP_D0_P MAKE_BASE=TRUE

90_LPDP_NV_TO_AP_D0_N MAKE_BASE=TRUE

C3022

2 6.3V X5R-CERM 01005 1 2 ROOM=NEVADA 20% 6 . 3V X5R-CERM 01005

0.1UF

C3023

0.1UF

C3024 ROOM=NEVADA

0.1UF

1

ROOM=NEVADA 20%

90_LPDP_NV_TO_AP_D0_CONN_P30


PAGETITLE

B2B:NEVADA

GND_VOID=TRUE

DRA WI NG N UMB ER

90_LPDP_NV_TO_AP_D0_CONN_N30

Apple Inc.

GND_VOID=TRUE

051-00482 REVISION

8.0.0

R

90_LPDP_NV_TO_AP_D1_P MAKE_BASE=TRUE

1 2 20% 6 . 3V X5R-CERM 01005

C3025

GND_VOID=TRUE

90_LPDP_NV_TO_AP_D1_CONN_P30


BRANCH


PAGE

SI ZE

D

A

8

7

6

5

4

3

2

1

CALTRA AUDIO CODEC (ANALOG INPUTS & OUTPUTS)

D

D

CRITICAL ROOM=CODEC

U3101 41 41

41 41

44 44

For Borealis

29 29

LOWERMIC1_TO_CODEC_AIN1_P LOWERMIC1_TO_CODEC_AIN1_N

L2 AIN1+ L1 AIN1-

LOWERMIC4_TO_CODEC_AIN2_P LOWERMIC4_TO_CODEC_AIN2_N

K3 AIN2+ L3 AIN2-

REARMIC2_TO_CODEC_AIN3_P REARMIC2_TO_CODEC_AIN3_N

K2 AIN3+ K1 AIN3-

FRONTMIC3_TO_CODEC_AIN4_P FRONTMIC3_TO_CODEC_AIN4_N

J3 AIN4+ J4 AIN4-

C

WLCSP-1

SYM1OF 3

CS42L71

AOUT1+ AOUT1-

L9 NC M9NC

AOUT2+ AOUT2-

L8 NC M8NC

HPOUTA HPOUTB

K10NC K11NC

HS3

M5

HS4

M4

HS3_REF HS4_REF

HSIN+ HSIN-

WAS FOR RECEIVER; REPLACED BY SPEAKER IN D1xy

L10 M10

D1 NC E1 NC

C

HPDETECT J9 NC NC NC

NC NC

F1 AIN5+ G1 AIN5-

F2 AIN6+ F3 AIN6-

ROOM=CODEC

C3107 100PF 1

44 44

HAWKING_TO_CODEC_AIN7_P HAWKING_TO_CODEC_AIN7_N NC NC

NC NC NC NC NC

B

33 33

53 27 26 25 23 21 19 18 10 9 4 46 41 40 39 37 35 34 33 30 28

A

PDM_CODEC_TO_SPKAMP2_CLK PDM_CODEC_TO_SPKAMP2_DATA

1

A4 DMIC1_CLK B4 DMIC1_DATA

DP DN

J12 H12

C4 DMIC2_CLK C3 DMIC2_DATA

MBUS_REF

G10

A3 DMIC3_CLK B3 DMIC3_DATA A2 DMIC4_CLK B2 DMIC4_DATA A9 PDM_CLK B9 PDM_DATA

1

R3101 100

5% 1/32W MF

01005 2ROOM=CODEC

90_MIKEYBUS_DATA_P40

2

5% 1/32W MF 01005

90_MIKEYBUS_CALTRA_DATA_P 90_MIKEYBUS_CALTRA_DATA_N MIKEYBUS_REFERENCE41

2

5% 16V NP0-C0G 01005

R3104 20.0

G2 AIN7+ G3 AIN7-

ROOM=CODEC

R3103 20.0

1

90_MIKEYBUS_DATA_N40

2

5% 1/32W MF 01005

ROOM=CODEC

C3106 100PF 1

2

5% 16V NP0-C0G 01005

B

ROOM=CODEC

PP_VDD_MAIN 1

C3112 220PF

5% 2 10V C0G-CERM 01005

ROOM=CODEC

1

C3113 220PF

5% 2 10V C0G-CERM 01005

SYNC_MASTER=Sync


PAGETITLE

AUDIO:CALTRA CODEC (1/2) DRA WI NG N UMB ER

ROOM=CODEC

Apple Inc.

AC return path for Mikeybus which is referenced to GND and VDD_MAIN

051-00482 REVISION

8.0.0

R

Radar 21203307


BRANCH


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SI ZE

D

A

8

7

6

5

4

3

2

1

CALTRA AUDIO CODEC (POWER & I/O) 35 34 33 19

PP1V8_VA 1

C3209 2.2UF

D

2

D

20% 6.3V X5R-CERM

0201-1 ROOM=CODEC

CODEC_AGND

53 38 37 30 25 23 19

32

PP_VDD_BOOST 1

C3212

1

20% 6.3V X5R-CERM 01005

2

0.1UF

2

1

20% 6.3V X5R-CERM 01005

2

0.1UF

ROOM=CODEC

46 41 40 37 36 32 21 20 18 16 53 52 48 47

C3214

C3205 2.2UF

20% 6.3V X5R-CERM 0201-1

ROOM=CODEC

46 41 40 37 36 32 21 20 18 16 53 52 48 47

ROOM=CODEC

1 1

C3211

1

20% 6.3V CERM-X5R 0402-9

2

10UF

2

ROOM=CODEC

C3213

1

20% 6.3V X5R-CERM 01005

2

0.1UF

ROOM=CODEC

5% 1/32W MF

0.1UF

2 01005 ROOM=CODEC

20% 6.3V X5R-CERM 01005

R3202

PP1V2_VD_FILT

ROOM=CODEC

1

20% 6.3V X5R 0201-1

2

1.0UF

ROOM=CODEC

LOWERMIC1_TO_CODEC_BIAS_FILT_RET

1

41

2

20% 6.3V X5R 0201-1

ROOM=CODEC

PP_CODEC_TO_LOWERMIC1_BIAS LOWERMIC1_BIAS_FILT_IN

2 1 1 2 2 1 1 1 5 7 1 1 1 J D G C E A M H

0 1 1 H J

T L P P P D D T L L C V V I I V V C _ V F F _ _ G D D O V V R P V

A S V U B M _ P V

M6 MIC1_BIAS K7 MIC1_BIAS_FILT

U3101

4.7UF 2 1

FLYP

U3101 35 34 33 13

11

36 11

36 11

K12NC

36 11

11

CS42L71

41

PP_CODEC_TO_LOWERMIC4_BIAS LOWERMIC4_BIAS_FILT_IN

36 35 34 33 11 36 35 34 33 11

L6 MIC2_BIAS J7 MIC2_BIAS_FILT

FLYC

36 35 34 33

L12NC

36 35 34 33

13 13

C3201 4.7UF 1

44

2

PP_CODEC_TO_REARMIC2_BIAS REARMIC2_BIAS_FILT_IN

13

K6 MIC3_BIAS L5 MIC3_BIAS_FILT

13

20% 6.3V X5R-CERM1 402

FLYN

M12 NC

+VCP_FILT

J10NC

FRONTMIC3_TO_CODEC_BIAS_FILT_RET

B

XW3203

1

2

C9 C8

CS* CCLK

SPI_AP_TO_CODEC_MAGGIE_MOSI SPI_CODEC_MAGGIE_TO_AP_MISO

B8 A8

MOSI MISO

ROOM=CODEC

CRITICAL

I2S_AP_TO_CODEC_MCLK

C12

29

PP_CODEC_TO_FRONTMIC3_BIAS FRONTMIC3_BIAS_FILT_IN

J6 MIC4_BIAS K5 MIC4_BIAS_FILT

20% 6.3V X5R-CERM1 402

1

C3223

1

20% 6.3V X5R 0201-1

2

1.0UF

ROOM=CODEC

2

SHORT-20L-0.05MM-SM ROOM=FOREHEAD

C6 C5 B5 B6

I2S_CODEC_XSP_TO_AOP_BCLK I2S_CODEC_XSP_TO_AOP_LRCLK I2S_AOP_TO_CODEC_XSP_DOUT I2S_CODEC_XSP_TO_AOP_DIN

B11 C11 A11 A10

XSP_SCLK XSP_LRCK/FSYNC XSP_SDIN/DAC2B_MUTE XSP_SDOUT

B7 C7 D8 A7

MSP_SCLK MSP_LRCK/FSYNC MSP_SDIN MSP_SDOUT

20

PMU_TO_CODEC_DIGLDO_PULLDN

H5 J5

DIGLDO_PULLDN DIGLDO_PDN

1.0UF 20% 6.3V X5R 0201-1

GNDCP

ROOM=CODEC

L11

OMIT 1

C3222

1

20% 6.3V X5R 0201-1

2

1.0UF

2

ROOM=CODEC

C3225 1.0UF 20% 6.3V X5R 0201-1

ROOM=CODEC

-VCP_FILT LP_FILT+

M11 NC F12

CALTRA_LP_FILTP 1

C3220 0.1UF

2

NC NC

M3 HS_BIAS_FILT M2 HS_BIAS_FILT_REF

20% 6.3V X5R-CERM 01005

H1

NC

D11 B10 D5 D6 E5 E6 E7 K4

TSTI TSTI TSTI TSTI TSTI TSTI TSTI TSTI TSTI

C10 D10 D7 D9

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

A1

NC NC NC

C

NC NC NC NC NC

E8 E9 G11 H4 M1

A12 B12 E2 E3 E4 E10 F4 F5 F6 F7 F8 F9 F10 G4 G5 G6 G7 G8 G9 H6 H7 H8 H9

B

GND J8

ROOM=CODEC

FILT+

D3 NC D4 NC D2 NC C2

TSTO TSTO TSTO TSTO TSTO TSTO TSTO TSTO

MCLK ASP_SCLK ASP_LRCK/FSYNC ASP_SDIN ASP_SDOUT

C3224

ROOM=CODEC

1NO_XNET_CONNECTION

I2S_MAGGIE_TO_AP_L26_CODEC_BCLK I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK I2S_MAGGIE_TO_L26_CODEC_DOUT I2S_L26_CODEC_TO_MAGGIE_DIN

I2S_AP_TO_CODEC_MSP_BCLK I2S_AP_TO_CODEC_MSP_LRCLK I2S_AP_TO_CODEC_MSP_DOUT I2S_CODEC_TO_AP_MSP_DIN

11 11

C3202

2

SPI_AP_TO_CODEC_MAGGIE_SCLK

WLCSP-1

SYM3OF 3

CS42L71

11

11

ROOM=CODEC

4.7UF

INT*

JTAG_TMS JTAG_TCK JTAG_TDI JTAG_TDO

ROOM=CODEC

CRITICAL

ROOM=CODEC

REARMIC2_TO_CODEC_BIAS_FILT_RET

WAKE*

K9

AUDIO_TO_AOP_INT_L

SPI_AP_TO_CODEC_CS_L

20% 6.3V X5R-CERM1 402

45

K8

NC

ROOM=CODEC

SYM2OF 3

C3204

LOWERMIC4_TO_CODEC_BIAS_FILT_RET

RESET*

WLCSP-1

20% 6.3V X5R-CERM1 402

ROOM=CODEC

41

H3

5% 1/32W MF 01005 2

C3221

C 4.7UF

CODEC_RESET_L

1

100K

C3217 1.0UF

2

C3203

R3201 1.00K

C3215

1

41

PP1V8_SDRAM

PP1V8_SDRAM

CALTRA_FILTP 1

C3208 10UF

2

A

S D D D D H P A D D D D D D D N N N N N N N G G G G G G G 6 1 1 1 4 7 2 A B 1 1 L L J E F

20% 6.3V CERM-X5R 0402-9

ROOM=CODEC

FILT-

H2 SYNC_MASTER=Sync

CODEC_AGND


PAGETITLE 32

AUDIO:CALTRA CODEC (2/2) DRA WI NG N UMB ER

XW3202


1

ROOM=CODEC

Apple Inc.

051-00482 REVISION

8.0.0

R


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D

A

8

7

6

5

4

2

1

D

D

SPEAKER AMPLIFIER 2

53 27 26 25 23 21 19 18 10 9 4 46 41 40 39 37 35 34 31 30 28

(North)

PP_VDD_MAIN

PP1V8_VA

C3327

C3326

1

10UF

C3328

1

10UF

20% 10V X5R-CERM 2 0402-8 ROOM=SPKAMP2

1

10UF

20% 6.3V CERM-X5R 2 0402-9 ROOM=SPKAMP2

20% 6.3V CERM-X5R 2 ROOM=SPKAMP2 0402-9

C3313

C3329

1

10UF

ROOM=SPKAMP2

1

1

2.2UF

20% 6.3V CERM-X5R 2 0402-9

C3315

1

0.1UF

20% 6.3V X5R-CERM 2 0201-1

2

ROOM=SPKAMP2

5 A

CRITICAL

L3302

C

20% 6.3V X5R-CERM 01005

19 32 34 35

C3316 2.2UF

2

20% 6.3V X5R-CERM 0201-1

ROOM=SPKAMP2

ROOM=SPKAMP2

VBST_B A1 VBST_B B1

PP_SPKR2_VBOOST

5 F

VP

VA

C

1.2UH-20%-3.0A-0.080OHM 1

2

SPEAKERAMP2_LX

PIQA20161T-SM ROOM=SPKAMP2

12

R3301 100K

5% 1/32W MF 2 01005

I2C2_AP_SDA

D6

SDA

I2C2_AP_SCL

E6

SCL

AUDIO_TO_AOP_INT_L

A7

INT*

A6

RESET*

ROOM=SPKAMP2

R3304 100K 5% 1/32W MF

CRITICAL


B7

MCLK

36 35 34 32 11

I2S_MAGGIE_TO_AP_L26_CODEC_BCLK

C7

SCLK

36 35 34 32 11

I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK

C6

LRCK/FSYNC

36 35 34 32

I2S_MAGGIE_TO_L26_CODEC_DOUT

D7

SDIN

36 35 34 32

I2S_L26_CODEC_TO_MAGGIE_DIN

B6

SDOUT

31

PDM_CODEC_TO_SPKAMP2_CLK

F7

PDM_CLK0

31

PDM_CODEC_TO_SPKAMP2_DATA

E7

PDM_DATA0

29

PDM_CONVOY_TO_ADARE_DATA

D5

PDM_DATA1

1

C3312

1

5% 10V C0G-CERM 01005

2

220PF

2

ROOM=SPKAMP2

F6 ALIVE/SYNC

36 35 34 13

VBST_A C1 VBST_A D1

ROOM=SPKAMP2

E5 AD0/PDM_CLK1

MAKE_BASE=TRUE

2 01005 ROOM=SPKAMP2

WLCSP

PDM_ADARE_TO_CONVOY_CLK

PDM_ADARE_TO_CONVOY_CLK 1

CS35L26-A1

SPKAMP1_TO_SPKAMP2_SYNC

34 29

U3301

SW SW

47

AP_TO_SPKAMP2_RESET_L 1

A2 B2

47

35 34 32 13

B

3

ISNS+ F1 ISNS- E1

VSNS+ E2 VSNS- E3

C3311

1

10% 16V X5R-CERM 0201

2

0.1UF

C3324

1

20% 10V X5R-CERM 0402-8

2

10UF

ROOM=SPKAMP2

C3325

1

20% 10V X5R-CERM 0402-8

2

10UF

ROOM=SPKAMP2

1

FILT+ F4 GNDA

2

10UF

20% 10V X5R-CERM 0402-8

ROOM=SPKAMP2

C3319 10% 6.3V X5R 01005

ROOM=SPKAMP2 NO_XNET_CONNECTION

SPEAKER_TO_SPEAKERAMP2_VSENSE_P SPEAKER_TO_SPEAKERAMP2_VSENSE_N

29 29

SPEAKERAMP2_TO_SPEAKER_OUT_POS SPEAKERAMP2_TO_SPEAKER_OUT_NEG

C3331 GNDP

20% 10V X5R-CERM 0402-8

ROOM=SPKAMP2

C3308

0.01UF

2

OUT+ D2 OUT- C2

3 4 3 4 3 4 5 3 4 A A B B C C C D D

1

10UF

ROOM=SPKAMP2

SPEAKERAMP2_ISENSE_P SPEAKERAMP2_ISENSE_N

C3306

1

1

1000PF

SPEAKERAMP2_FILT

10% 10V X5R 2 01005

AD1 F3 1

C3318

ROOM=SPKAMP2

1000PF

2

29 45 46 29 45 46

C3323 10% 10V X5R 01005

Pg46: Compass Compensation Coil

ROOM=SPKAMP2

1UF

5 4 2 B E F 2

B

10% 10V X5R 402-1

ROOM=SPKAMP2

A

SYNC_MASTER=Sync


PAGETITLE

AUDIO:SPEAKER AMP 2 DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


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PAGE

SI ZE

D

A

8

7

6

5

4

3

SPEAKER AMPLIFIER 1

2

1

(South) D

D

#25112685,Remove C3414 53 27 26 25 23 21 19 18 10 9 4 46 41 40 39 37 35 33 31 30 28

PP_VDD_MAIN

PP1V8_VA

C3407

1

10UF

20% 10V X5R-CERM 2 0402-8 ROOM=SPKAMP1

C3405

C3424

1

10UF

1

1

10UF

20% 6.3V CERM-X5R 2 0402-9 ROOM=SPKAMP1

20% 2 6.3V X5R-CERM 01005

ROOM=SPKAMP1

5 A

PULLED LOW ON PG 35 35 13

48

I2C_AOP_SDA

48

I2C_AOP_SCL

35 33 32 13

A2 B2

SPEAKERAMP1_LX

D6 E6 A7

AUDIO_TO_AOP_INT_L

A6

AOP_TO_SPKAMP1_ARC_RESET_L 33

F6

SPKAMP1_TO_SPKAMP2_SYNC

E5

GND

MAKE_BASE=TRUE

36 35 33 13

B7


36 35 33 32 11


36 35 33 32 11


36 35 33 32


36 35 33 32


C7 C6 D7 B6 F7 NC

E7 NC

D5

B

20% 6.3V X5R-CERM 0201-1 ROOM=SPKAMP1

C A1 VBST_B B1 VBST_B C1 VBST_A D1 VBST_A

CS35L26-A1 WLCSP

SDA

ROOM=SPKAMP1

CRITICAL

SCL

2.2UF

VA

U3402

SW SW

19 32 33 35

C3426

5 F

VP

28

1

2

ROOM=SPKAMP1

C TO TRINITY

C3425 0.1UF

20% 6.3V CERM-X5R 2 0402-9

PP_SPKR1_VBOOST 1

C3427

1

5% 10V C0G-CERM 01005

2

220PF

2

1

10% 16V X5R-CERM 0201

2

0.1UF

ROOM=SPKAMP1

INT*

C3428 ROOM=SPKAMP1

C3403

1

20% 10V X5R-CERM 0402-8

2

10UF

ROOM=SPKAMP1

C3404

1

20% 10V X5R-CERM 0402-8

2

10UF

F1 ISNS+ E1 ISNS-

AD0/PDM_CLK1 MCLK

E2 VSNS+ E3 VSNS-

SCLK

1

SPEAKERAMP1_ISENSE_P SPEAKERAMP1_ISENSE_N

1

20% 10V X5R-CERM 0402-8

2

10UF

ROOM=SPKAMP1

RESET* ALIVE/SYNC

C3431 ROOM=SPKAMP1

C3432 10UF

20% 10V X5R-CERM 0402-8

ROOM=SPKAMP1

C3430 0.01UF

2

SPEAKER_TO_SPEAKERAMP1_VSENSE_P SPEAKER_TO_SPEAKERAMP1_VSENSE_N

41

10% 6.3V X5R 01005

ROOM=SPKAMP1 NO_XNET_CONNECTION

41

LRCK/FSYNC SDIN

D2 OUT+ C2 OUT-

SDOUT

SPEAKERAMP1_TO_SPEAKER_OUT_POS SPEAKERAMP1_TO_SPEAKER_OUT_NEG

PDM_CLK0 PDM_DATA0 PDM_DATA1

FILT+ GNDP

3 4 3 4 3 4 5 3 4 A A B B C C C D D

GNDA 5 4 2 B E F

AD1

F4

C3422

SPEAKERAMP1_FILT

1

1

10% 10V 2 X5R 01005

2

1000PF

F3 1

C3429 2.2UF

20% 2 6.3V X5R-CERM 0201-1

R OO M= SP KA MP 1

41 41

C3434 1000PF 10% 10V X5R 01005

B

R OO M= SP KA MP 1

ROOM=SPKAMP1

A

SYNC_MASTER=Sync


PAGETITLE

AUDIO:SPEAKER AMP 1 DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

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1

ARC DRIVER D

D

#25742582,Add back C3531 for D10x at Pg46 0201 C3525 is at Pg46 53 27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN 46 41 40 39 37 34 33 31 30 28

C3530

1

10UF

PP1V8_VA

C3532

1

1

10UF

20% 10V X5R-CERM 2 0402-8

20% 6.3V CERM-X5R 2 0402-9

ROOM=ARC1

ROOM=ARC1

1

0.1UF

19 32 33 34 35

C3534 2.2UF

20% 2 6.3V X5R-CERM 01005

20% 2 6.3V X5R-CERM 0201-1

ROOM=ARC1

ROOM=ARC1

C

C

TO TRINITY

28

ARC1_LX

48

I2C_AOP_SDA

48

I2C_AOP_SCL

34 33 32 13 34 13

A2 B2 D6 E6 A7

AUDIO_TO_AOP_INT_L

A6

AOP_TO_SPKAMP1_ARC_RESET_L 1

NC FROM HOMER PER #25452686

R3508 100K

5% 1/32W MF 2 01005 ROOM=ARC1

35 34 33 32 19

PP1V8_VA

MAKE_BASE=TRUE

36 34 33 13 36 34 33 32 11

NOSTUFF

C3501

F6 NC

E5

PP1V8_VA

B7


C7


C6


1

36 34 33 32 11

5% 16V CERM 2 01005

36 34 33 32


36 34 33 32


10PF

D7 B6 F7

ROOM=ARC1

NC

B

C3527

E7 NC

D5

5 A

5 F

VP

VA

U3502

SW SW

VBST_B VBST_B

CS35L26-A1 WLCSP

SDA

VBST_A VBST_A

ROOM=SPKAMP2

CRITICAL

SCL

A1 B1

VOLTAGE=8.0V

PP_ARC1_VBOOST 1

C1 D1

C3526

1

5% 10V C0G-CERM 01005

2

220PF

2

1

10% 16V X5R-CERM 0201

2

0.1UF

ROOM=ARC1

INT*

C3535

C3537

1

20% 10V X5R-CERM 0402-8

2

10UF

ROOM=ARC1

C3524

1

20% 10V X5R-CERM 0402-8

2

10UF

ROOM=ARC1

ALIVE/SYNC

ISNS+ ISNS-

AD0/PDM_CLK1 MCLK

VSNS+ VSNS-

SCLK

E2 E3

1

20% 10V X5R-CERM 0402-8

2

10UF

ROOM=ARC1

RESET* F1 E1

C3538

1

ARC1_ISENSE_P ARC1_ISENSE_N

ROOM=ARC1

C3539 10UF

20% 10V X5R-CERM 0402-8 ROOM=ARC1

C3528 0.01UF

2

SOLENOID1_TO_ARC1_VSENSE_POS SOLENOID1_TO_ARC1_VSENSE_NEG

10% 6.3V X5R 01005

ROOM=ARC1 NO_XNET_CONNECTION

41 41

LRCK/FSYNC SDIN

OUT+ OUT-

SDOUT

D2 C2

VOLTAGE=8.0V

ARC1_TO_SOLENOID1_OUT_POS ARC1_TO_SOLENOID1_OUT_NEG

VOLTAGE=8.0V

41 41

PDM_CLK0 PDM_DATA0 PDM_DATA1

FILT+ GNDP

3 4 3 4 3 4 5 3 4 A A B B C C C D D

GNDA 5 4 2 B E F

AD1

F4

C3529

ARC1_FILT

1

1

10% 10V X5R 2 01005

2

1000PF

F3 1

C3536 2.2UF 20%

2 6.3V

ROOM=ARC1

C3542

B

1000PF 10% 10V X5R 01005

ROOM=ARC1

X5R-CERM 0201-1

ROOM=ARC1

A

SYNC_MASTER=Sync


PAGETITLE

ARC:DRIVER DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

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D

D

MAGGIE LDO

MAGGIE

APN: 353S00842

APN: 336S00020

U3603

46 41 40 37 36 32 21 20 18 16 53 52 48 47

PP1V8_SDRAM

LD39130S-1.2V/AP

A1

IN

B1

EN

PP1V2_MAGGIE

OUT A2

CSP

1

C3605

1

20% 6.3V CER-X5R 0201

2

4UF

GND 2

2 B

C3601 0.1UF

ROOM=ARC_CTRL

20% 6.3V X5R-CERM 01005

ROOM=ARC_CTRL

R3601 1

100

PP1V2_MAGGIE_PLL

2

5% 1/32W MF 01005

1

C3602 0.1UF

ROOM=ARC_CTRL

2

20% 6.3V X5R-CERM 01005

ROOM=ARC_CTRL

C

C

VPP_2V5 must be > 1.71V for SPI Slave programming 36 24 18

PP1V8_MAGGIE_IMU 1

C3604

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

2

ROOM=ARC_CTRL

C3606 0.1UF

4 A

20% 6.3V X5R-CERM 01005

0 _ O I C C V

ROOM=ARC_CTRL

4 C 2 _ O I C C V

3 B

4 D

L L P C C V

5 A

5 V 2 _ P P V

C C V

3 C 1 O I C C V I_ P S

ICE5LP4K-SWG36I A2

IRLED

C6 NC B6 NC A6

RGB0 RGB1 RGB2

NC

HOMER STM32L0 MICRO STM32L03 APN: 337S00231

NC 36

MAGGIE_TO_HOMER_WAKE SPI_MAGGIE_TO_HOMER_POS_SCLK

46 41 40 37 36 32 21 20 18 16 53 52 48 47

PP1V8_SDRAM

C3603

1

2.2UF

13

20% 6.3V X5R-CERM 2 0201-1 ROOM=HOMER

B

13

F6 E6 D6 NC D5 F5 E5

WLCSP

IOT_46B_G0

IOB_2A IOB_3B_G6 IOB_4A IOB_5B IOB_6A IOB_7B

0 K N A B

IOB_10A IOB_11B_G5 IOB_12A_G4_CDONE IOB_16A

1 K N A B

2 K N A B

IOB_20A IOB_25B_G3 IOB_26A IOB_27B IOB_29B IOB_30A IOB_31B IOB_32A_SPI_SO IOB_33B_SPI_SI IOB_34A_SPI_SCK IOB_35B_SPI_CSN

R3604

B4 NC F4 E4 F3 E3 C2 B1 D2 E2 C1 B2 F2 D1 E1 F1

I2S_MAGGIE_TO_AP_L26_CODEC_BCLK_R MAGGIE_TO_AP_CDONE UART_AOP_TO_MAGGIE_TXD I2S_MAGGIE_TO_AP_DIN I2S_AOP_TO_MAGGIE_L26_MCLK I2S_MAGGIE_TO_L26_CODEC_DOUT I2S_L26_CODEC_TO_MAGGIE_DIN I2S_AP_TO_MAGGIE_DOUT

SM

PP

1 D

ROOM=HOMER

PP3602 P2MM-NSM

SM

PP

1

UART_HOMER_TO_AP_RXD UART_AP_TO_HOMER_TXD 36 MAGGIE_TO_HOMER_WAKE

R3607 1

100

5% 1/32W MF 01005 ROOM=HOMER

2

1 A

U3601

E5 B4 D4 E4 B3 D3 NC E3 C3 NC C1 B1 C2 A1 A2 NC

12

4 C

VDD VDDA

ROOM=HOMER

12

D E L _ D N G

1

AP_BI_HOMER_BOOTLOADER_ALIVE_R 13 47 41 47 41 13 53 17 13

HOMER_TO_AOP_WAKE_INT I2C_HOMER_SCL I2C_HOMER_SDA SWD_AP_BI_HOMER_SWDIO SWD_AP_TO_MANY_SWCLK

NC

1 12 13 11

33.2

2

MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC


I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK SPI_CODEC_MAGGIE_TO_AP_MISO SPI_AP_TO_CODEC_MAGGIE_MOSI SPI_AP_TO_CODEC_MAGGIE_SCLK SPI_AP_TO_MAGGIE_CS_L

11 32 33 34 35

1% 1/32W MF 01005 ROOM=ARC_CTRL

MAGGIE <-> AP (SDIN)

13 33 34 35 32 33 34 35

MAGGIE <-> ARC, SPKRS, CODEC (SDOUT)

32 33 34 35

MAGGIE <-> ARC, SPKRS, CODEC (SDIN)

11

MAGGIE <-> AP (SDOUT)

PP1V8_MAGGIE_IMU 1

R3605 10K

CRESET_B D3

PP3601 P2MM-NSM

11 32 33 34 35 11 32

5% 1/32W MF 2 01005

MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC

1

18 24 36

R3602 10K

5% 1/32W MF 2 01005

11 32 11 32

B

9

AP_TO_MAGGIE_CRESETB_L

12

ROOM=ARC_CTRL

CRITICAL D D N N G G

5 3 C A

1

R3603 511K 1% 1/32W MF

2 01005

STM32L031E6Y6D

ROOM=HOMER PA0_CLK_IN PB0 E2 PA1 PB1 D2 SPI_MAGGIE_TO_HOMER_POS_MOSI WLCSP PA2 PB3 B2 PA3 PB6 A3 PA4 PB7 A4 NC PA5 PC14_OSC32_IN B5 NC PA6 PC15_OSC32_OUT C5 NC PA7 NOTE: RESET HAS INTERNAL 65K PULLUP PA8 RST* D5 PMU_TO_HOMER_RESET_L

PA9 PA10 PA13 PA14

BOOT0 A5

AP_BI_HOMER_BOOTLOADER_ALIVE 1

R3611 27K

VSSA 1 E

A

SPI_HOMER_TO_MAGGIE_POS_MISO AOP_TO_MAGGIE_EN MAGGIE_TO_AOP_INT

B5

U3602

5% 1/32W MF

20 12

1

C3607 0.1UF

20% 2 6.3V X5R-CERM 01005 ROOM=HOMER

2 01005 ROOM=HOMER

#24543115: Scrub Value

SYNC_MASTER=S ync


PAGETITLE

ARC:MAGGIE DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

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1

DISPLAY & TOUCH - POWER SUPPLIES CHESTNUT DISPLAY PMU

PP_CHESTNUT_CP 1

APN:338S1172 PP_VDD_MAIN

C3710

1

D

CRITICAL

PN_CHESTNUT_CN

ROOM=CHESTNUT

1

10UF

20% 6.3V CERM-X5R 2 0402-9

L3704

1.0UH-20%-2.25A-0.15OHM

PIXB2016FE-SM

D1 2

B2

CHESTNUT_LX

47 20

I2C0_AP_SCL

47

I2C0_AP_SDA

6.3V

A2 D3 D2 C3

LCM_TO_CHESTNUT_PWR_EN

39 20 40 20 13 7 20

1

U3703

TPS65730A0PYFF

ROOM=CHESTNUT

ROOM=CHESTNUT

PMU_TO_AOP_TRISTAR_ACTIVE_READY

C2

CHESTNUT_TO_PMU_ADCMUX

E1

BGA VIN

NO INT PULL

SDA

VNEG

LCM_EN

VNEG(SUB)

200K INT PD

RESET*

HVLDO1

NO INT PULL

ADCMUX

D N G A

1 2 HVLDO2 D D N N G G HVLDO3 P P

NOSTUFF C3727

D #24543286: Densense Cap for Chestnut Charge Pump

56PF

2

ROOM=CHESTNUT

B3 LCMBST B4 CPUMP

SCL

1

5% 2 25V NP0-C0G-CERM 01005

C4 CF1 E4

CRITICAL

SYNC

NOSTUFF

C3726 56PF

CF2

ROOM=CHESTNUT

SW

1 C

5% 25V NP0-C0G-CERM 01005

ROOM=CHESTNUT

PP6V0_LCM_BOOST

E3

PN5V7_LCM_MESON_AVDDN

39

PP5V7_MESON_AVDDH

39

PP5V7_LCM_AVDDH

39

PP5V1_TOUCH_VDDH

39

E2 A4 A3 A1

1 4 B D

1

C3711

1

20% 16V CER-X5R 0201

20% 2 10V X5R-CERM 0402-8

1UF

2

C3712

1

10UF

ROOM=CHESTNUT

C

C3707 10UF

20% VOLTAGE=10V 2 X5R-CERM 0402-8

C3722 See Page46 53 46 27 26 25 23 21 19 18 10 9 4 41 40 39 37 35 34 33 31 30 28

C3713

1

10UF

1

10UF

20% 2 10V X5R-CERM 0402-8

ROOM=CHESTNUT

C3714

2

ROOM=CHESTNUT

20% 10V X5R-CERM 0402-8

ROOM=CHESTNUT

C3715

1

20% 10V X5R-CERM 0402

20% 2 10V X5R-CERM 0402

4.7UF

2

ROOM=CHESTNUT

C3716 4.7UF

1

C3717 220PF

5% 2 10V C0G-CERM 01005

ROOM=CHESTNUT

ROOM=CHESTNUT

#26634069:D1x, C3715/C3716 to 138S0719 0402 4.7uF

LED BACKLIGHT DRIVER - 6LED

CRITICAL

C

D3701 DSN2

APN:353s00640 28

BL_SW2_LX

A

K

25V

NSR05F30NXT5G

ROOM=BACKLIGHT

TO TRINITY

CRITICAL

D3702

53 46 41 27 26 25 23 21 19 18 10 9 4 40 39 37 35 34 33 31 30 28

PP_VDD_MAIN

28

NSR0530P2T5G A

BL_SW1_LX

C3702 1

SOD-923-1

ROOM=BACKLIGHT

10UF

20% VOLTAGE=6.3V 2 CERM-X5R 0402-9

U3701

D4 IN 47 46 41 40 36 32 21 20 18 16 53 52 48 46 11 46 11 47 47 46 9 53 46 26

DSBGA

CRITICAL

PP1V8_SDRAM

D3 VIO/HWEN

DWI_PMGR_TO_BACKLIGHT_DATA DWI_PMGR_TO_BACKLIGHT_CLK

C2 SDI C3 SCK

I2C0_AP_SDA I2C0_AP_SCL

B2 SDA A2 SCL

AP_TO_MUON_BL_STROBE_EN

D1 TRIG

BB_TO_STROBE_DRIVER_GSM_BURST_IND

D2 INHIBIT

1

C3703 220PF

2% 2 50V C0G 0201

ROOM=BACKLIGHT PLACE_NEAR=U3701:2MM

LM3539A1

ROOM=BACKLIGHT

PP_LCM_BL_ANODE

K

25V

OUT A1

1

C3725 2.2UF

20% 2 35V X5R 0402

1

C3704

1

2.2UF

20% 2 35V X5R 0402

C3706

1

2.2UF

2

20% 35V X5R 0402

C3705

1

20% 35V X5R 0402

20% 2 35V X5R 0402

2.2UF

2

39

C3721 2.2UF

SW1 C4 SW2_1 A3 SW2_2 A4

PP_LCM_BL_CAT139 PP_LCM_BL_CAT239

LED1 C1 LED2 B1 ROOM=BACKLIGHT

B

D D N N G G

B

3 4 B B 1

2

R3701 200K 1% 1/32W MF 01005

MOJAVE MESA BOOST

ROOM=BACKLIGHT

APN:353S00671

L3703

1.0UH-20%-0.4A-0.636OHM 53 46 27 26 25 23 21 19 18 10 9 4 41 40 39 37 35 34 33 31 30 2 8

1

PP_VDD_MAIN

2

POS18V0_MESA_LX

0403

C3718

1

ROOM=MOJAVE

CRITICAL

10UF

U3702

20% 6.3V CERM-X5R 2 0402-9

53 38 32 30 25 23 19

A

LM3638A0 B1 SW

PP_VDD_BOOST

A2 VIN

C3724

1

38 4

MESA_TO_BOOST_EN

B2 EN_M A3 EN_S

PP17V0_MOJAVE_LDOIN

C2 LDOIN

10UF

20% 6.3V CERM-X5R 2 0402-9 ROOM=MOJAVE

PP16V0_MESA

BGA

ROOM=MOJAVE

ROOM=MOJAVE

1

CRITICAL VOUT

C3

C3708

1

5% 35V NP0-C0G 01005

2

100PF

2

2.2UF

ROOM=MOJAVE

D D N N G G P A 1 3 A B

C3720 20% 35V X5R 0402

ROOM=MOJAVE SYNC_MASTER=Sync

PMID C1


PAGETITLE

1

C3709

1

5% 35V NP0-C0G 01005

20% 2 35V X5R 0402

100PF

2

ROOM=MOJAVE

DISPLAY & MESA:POWER

C3719 2.2UF

ROOM=MOJAVE

DRA WI NG N UMB ER

VIETMOBILE.VN

Apple Inc.

051-00482 REVISION

8.0.0

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4

MESA POWER 19

PP3V0_MESA

J3801

MLB: 516S00141 (RCPT) FLEX: 516S00142 (PLUG)

2

C3813

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

2

C3815

1

20% 6.3V X5R-CERM 0201-1

2

C3821

2.2UF

ROOM=MAMBA_MESA

ROOM=MAMBA_MESA

BB35C-RA24-3A F-ST-SM

PP3V0_MESA_CONN 38 1

2.2UF

1

20% 6.3V X5R-CERM 01005

2

0.1UF

20% 6.3V X5R-CERM 0201-1

ROOM=MAMBA_MESA

C3822

2

ROOM=MAMBA_MESA

C3804 220PF

ROOM=MAMBA_MESA

5% 10V C0G-CERM 01005

ROOM=MAMBA_MESA

38

PP3V0_MESA_CONN

38

PP16V0_MESA_CONN

38

MAMBA_TO_LCM_MDRIVE_CONN_MESA

GUARD

D

FL3801

150OHM-25%-200MA-0.7DCR 48 19

1

PP1V8_MESA 1

2

LCM_TO_MAMBA_MSYNC_CONN P2MM-NSM

PP1V8_MESA_CONN 38 1

01005

C3814

ROOM=MAMBA_MESA

2.2UF

2

45

1

C3802

2

ROOM=MAMBA_MESA

C3807

PP

2

5% 10V C0G-CERM 01005

5% 25V NP0-C0G-CERM 01005

45 39

AP_TO_TOUCH_MAMBA_RESET_CONN_L

47

TP_MAMBA_HINT_L I2C_TOUCH_BI_MAMBA_SDA I2C_TOUCH_TO_MAMBA_SCL

38

PP1V8_TOUCH_TO_MAMBA_CONN

1

PP3801

56PF

220PF

20% 6.3V X5R-CERM 0201-1

SM

47

25

2 4 6 8 10 12 14 16 18 20 22 24

1 3 5 7 9 11 13 15 17 19 21 23

28

27

FL3802

1

1

C3803 5% 35V NP0-C0G 01005

MAMBA POWER

C3828

20% 6.3V X5R-CERM 2 0201-1

LP5907SNX-2.75 X2SON 4 VIN VOUT 1

XW3801

47 46 39 38 18

150OHM-25%-200MA-0.7DCR 1

SPI_AP_TO_MESA_MOSI_CONN 1

1

2

MAMBA_LDO_EN

1

3 EN 2 5

38

2

2

C3816

SPI_AP_TO_MESA_SCLK 1

1

R3808 511K 1% 1/32W MF

SPI_AP_TO_MESA_SCLK_CONN

2

38

C3817 56PF

ROOM=MAMBA_MESA

2

2 01005 ROOM=MAMBA_MESA

PP1V8_TOUCH

5% 25V NP0-C0G-CERM 01005

1

33.2

45

0.00

SPI_MESA_TO_AP_MISO_CONN

2 1

38

C

ROOM=MAMBA_MESA

PP1V8_TOUCH_TO_MAMBA_CONN

2 1

C3824

1

20% 6.3V X5R-CERM 0201-1

2

2.2UF

2

ROOM=MAMBA_MESA

38

C3811 220PF

5% 10V C0G-CERM 01005

ROOM=MAMBA_MESA

FL3804

1

MAMBA_TO_LCM_MDRIVE 1

56PF

1% 1/32W MF 01005

38

150OHM-25%-200MA-0.7DCR

ROOM=MAMBA_MESA

R3811 SPI_MESA_TO_AP_MISO

5% 2 10V C0G-CERM 01005

1

MAMBA DIGITAL I/O C3805

11

38

220PF

0% 1/32W MF 01005

1

38

C3812

ROOM=MAMBA_MESA

0% 1/32W MF 01005

38

R3805 47 46 39 38 18

R3809 11

1

20% 10V X5R-CERM 0402-8

ROOM=MAMBA_MESA

5% 25V NP0-C0G-CERM 01005

ROOM=MAMBA_MESA

0.00

C3823 10UF

GND EPAD

OMIT

56PF

1% 1/32W MF 2 01005 ROOM=MAMBA_MESA

38

PP2V75_MAMBA_CONN

ROOM=MAMBA_MESA

SHORT-20L-0.05MM-SM

PP1V8_TOUCH

ROOM=PMU

2

01005 ROOM=MAMBA_MESA

511K

38

U3801

ROOM=MAMBA_MESA

FL3807

R3807

38

TI:353S00576 ST:353S00932


1

2.2UF

MESA DIGITAL I/O

1

D

48

PP_VDD_BOOST

ROOM=MAMBA_MESA

SPI_AP_TO_MESA_MOSI

48

30

53 37 32 30 25 23 19

100PF

11

38

PP16V0_MESA_CONN 38

2

C

38

MESA_TO_AOP_FDINT_CONN I2C_MESA_TURTLE_SDA_CONN I2C_MESA_TURTLE_SCL_CONN MESA_TO_BOOST_EN_CONN MESA_TO_AP_INT_CONN SPI_AP_TO_MESA_SCLK_CONN SPI_AP_TO_MESA_MOSI_CONN AOP_TO_MESA_BLANKING_EN_CONN SPI_MESA_TO_AP_MISO_CONN PP2V75_MAMBA_CONN

ROOM=MAMBA_MESA

2

01005 ROOM=MAMBA_MESA

Matches flex_x452_acf, schematic revision 1.5.0 pinout

PP1V8_MESA_CONN

ROOM=MAMBA_MESA

ROOM=MAMBA_MESA

PP16V0_MESA

29

26

150OHM-25%-200MA-0.7DCR 37 4

1

CRITICAL

0201 1

2

MAMBA AND MESA CONNECTOR

FL3803

80-OHM-25%-0.52A-0.17OHM 1

3

2

01005 1

ROOM=MAMBA_MESA

38

2

ROOM=MAMBA_MESA

C3818

NOSTUFF

MAMBA_TO_LCM_MDRIVE_CONN_MESA

38

C3806 56PF

5% 25V NP0-C0G-CERM 2 01005

5% 25V NP0-C0G-CERM 01005

ROOM=MAMBA_MESA

56PF

ROOM=MAMBA_MESA

2

5% 25V NP0-C0G-CERM 01005

ROOM=MAMBA_MESA

R3801

B

11

MESA_TO_AP_INT

1

681

2

1% 1/32W MF 01005

1

MESA_TO_AP_INT_CONN

38

MESA_TO_BOOST_EN_CONN

38

B

C3819 100PF

ROOM=MAMBA_MESA

2

5% 16V NP0-C0G 01005

ROOM=MAMBA_MESA

R3802 37 4

MESA_TO_BOOST_EN

1

681

2

1% 1/32W MF 01005

1

2

FL3806

C3801 100PF

ROOM=MAMBA_MESA

13

5% 16V NP0-C0G 01005

MESA_TO_AOP_FDINT

150OHM-25%-200MA-0.7DCR 1 2 01005 ROOM=MAMBA_MESA

MESA_TO_AOP_FDINT_CONN 1

2

FL3811

AOP_TO_MESA_BLANKING_EN

1

01005

5% 16V NP0-C0G 01005

#24543342: stuff 100pF

ROOM=MAMBA_MESA

150OHM-25%-200MA-0.7DCR 13

38

C3826 100PF

ROOM=MAMBA_MESA

2

AOP_TO_MESA_BLANKING_EN_CONN 1

38

C3825 56PF

2

5% 25V NP0-C0G-CERM 01005

ROOM=MAMBA_MESA

A

SYNC_MASTER=Sync


PAGETITLE

B2B:ORB & MESA DRA WI NG N UMB ER

Apple Inc.

051-00482 REVISION

8.0.0

R


BRANCH


PAGE

SI ZE

D

A

iPhone 7 Plus Schematic

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