8
7
6
5
4
3
2
1.ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
1
REV
ECN
4
0004752417
CK APPD
DESCRIPTION OF REVISION
2.ALL CAPACITANCE VALUES ARE IN MICROFARADS.
DATE
3.ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
ENGINEERING RELEASED
2015-08-24
N69 MLB - EVT D
D
LAST_MODIFICATION=Wed LAST_MODIFICATION=Wed Aug 19 11:42:47 2015 PAGE 1 2 3 4 5 6 7 8 9 10
C
11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
B
29 30
A
SCH BRD MCO BOM BOM BOM BOM BOM BOM
1
3
4
CONTENTS
7
8
9
10
11
12
13
15
20
21
22
23
24
30
31
32
33
35
36
37
40
41
42
43
45
DATE
PAGE
46
CONTENTS
31
SYSTEM:BOM TABLES
32
SYSTEM:N69 SPECIFIC [4]
33
SYSTEM:MECHANICAL
34
SOC:JTAG,USB,XTAL
35
SOC:PCIE
36
SOC:CAMERA & DISPLAY
37
BASEBAND PMU (1 0F 2)
SOC:SERIAL & GPIO
38
BASEBAND PMU (2 OF 2)
5
6
SYNC
TABLE OF CONTENTS
49
50
51
BASEBAND:RADIO SYMBOL page1 CELL:ALIASES AP INTERFACE & DEBUG CONNECTORS
SOC:OWL
39
BASEBAND (1 OF 2)
40
BASEBAND (1 OF 2)
SOC:POWER (2/3)
41
MOBILE DATA MODEM (2 OF 2)
SOC:POWER (3/3)
42
RF TRANSCEIVER (1 0F 3)
NAND
43
RF TRANSCEIVER (2 OF 3)
SYSTEM POWER:PMU (1/3)
44
RF TRANSCEIVER (3 OF 3)
SYSTEM POWER:PMU (2/3)
45
QFE DCDC
SYSTEM POWER:PMU (3/3)
46
2G PA
SYSTEM POWER:CHARGER
47
VERY LOW BAND PAD
SYSTEM POWER:BATTERY CONN
48
LOW BAND PAD
SENSORS:MOTION SENSORS
49
MID BAND PAD
CAMERA:FOREHEAD FLEX B2B
50
HIGH BAND PAD
CAMERA:REAR CAMERA B2B
51
ANTENNA SWITCH
CAMERA:STROBE DRIVER
52
HIGH BAND SWITCH
AUDIO:CALTRA CODEC (1/2)
53
RX DIVERSITY
AUDIO:CALTRA CODEC (2/2)
54
AUDIO:SPEAKER DRIVER
55 56
RX DIVERSITY (2) GPS
MESA POWER AND IO FILTERS
57 58
STOCKHOLM
D403 (TOUCH B2B, DRIVER ICS)
59
OMIT_TABLE_RF
I/O:TRISTAR 2
60
Radio Subdesign Ports
(N69 BETTER) (N69H BETTER) (N69 BEST) (N69H BEST) (N69 ULTRA) (N69H ULTRA)
C
ANTENNA FEEDS
DISPLAY FLEX
051-00648 820-00282 056-01352 639-00931 639-01012 639-01231 639-01232 639-01271 639-01272
DATE
I/O:BUTTON FLEX B2B
SOC:POWER (1/3)
DISPLAY:POWER
SYNC
I/O:DOCK FLEX B2B
WIFI/BT: MODULE AND FRONT END
B
TABLE OF CONTENTS DRAWING
A
TITLE
SCH,MLB,N69 DRAWING
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.
NUMBER
BRANCH
SIZE
D
8
7
6
5
4
3
2
1.ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
1
REV
ECN
4
0004752417
CK APPD
DESCRIPTION OF REVISION
2.ALL CAPACITANCE VALUES ARE IN MICROFARADS.
DATE
3.ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
ENGINEERING RELEASED
2015-08-24
N69 MLB - EVT D
D
LAST_MODIFICATION=Wed LAST_MODIFICATION=Wed Aug 19 11:42:47 2015 PAGE 1 2 3 4 5 6 7 8 9 10
C
11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
B
29 30
A
SCH BRD MCO BOM BOM BOM BOM BOM BOM
1
3
4
CONTENTS
7
8
9
10
11
12
13
15
20
21
22
23
24
30
31
32
33
35
36
37
40
41
42
43
45
DATE
PAGE
46
CONTENTS
31
SYSTEM:BOM TABLES
32
SYSTEM:N69 SPECIFIC [4]
33
SYSTEM:MECHANICAL
34
SOC:JTAG,USB,XTAL
35
SOC:PCIE
36
SOC:CAMERA & DISPLAY
37
BASEBAND PMU (1 0F 2)
SOC:SERIAL & GPIO
38
BASEBAND PMU (2 OF 2)
5
6
SYNC
TABLE OF CONTENTS
49
50
51
BASEBAND:RADIO SYMBOL page1 CELL:ALIASES AP INTERFACE & DEBUG CONNECTORS
SOC:OWL
39
BASEBAND (1 OF 2)
40
BASEBAND (1 OF 2)
SOC:POWER (2/3)
41
MOBILE DATA MODEM (2 OF 2)
SOC:POWER (3/3)
42
RF TRANSCEIVER (1 0F 3)
NAND
43
RF TRANSCEIVER (2 OF 3)
SYSTEM POWER:PMU (1/3)
44
RF TRANSCEIVER (3 OF 3)
SYSTEM POWER:PMU (2/3)
45
QFE DCDC
SYSTEM POWER:PMU (3/3)
46
2G PA
SYSTEM POWER:CHARGER
47
VERY LOW BAND PAD
SYSTEM POWER:BATTERY CONN
48
LOW BAND PAD
SENSORS:MOTION SENSORS
49
MID BAND PAD
CAMERA:FOREHEAD FLEX B2B
50
HIGH BAND PAD
CAMERA:REAR CAMERA B2B
51
ANTENNA SWITCH
CAMERA:STROBE DRIVER
52
HIGH BAND SWITCH
AUDIO:CALTRA CODEC (1/2)
53
RX DIVERSITY
AUDIO:CALTRA CODEC (2/2)
54
AUDIO:SPEAKER DRIVER
55 56
RX DIVERSITY (2) GPS
MESA POWER AND IO FILTERS
57 58
STOCKHOLM
D403 (TOUCH B2B, DRIVER ICS)
59
OMIT_TABLE_RF
I/O:TRISTAR 2
60
Radio Subdesign Ports
(N69 BETTER) (N69H BETTER) (N69 BEST) (N69H BEST) (N69 ULTRA) (N69H ULTRA)
C
ANTENNA FEEDS
DISPLAY FLEX
051-00648 820-00282 056-01352 639-00931 639-01012 639-01231 639-01232 639-01271 639-01272
DATE
I/O:BUTTON FLEX B2B
SOC:POWER (1/3)
DISPLAY:POWER
SYNC
I/O:DOCK FLEX B2B
WIFI/BT: MODULE AND FRONT END
B
TABLE OF CONTENTS DRAWING
A
TITLE
SCH,MLB,N69 DRAWING
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.
NUMBER
BRANCH
SIZE
D
8
7
6
SCHEMATIC & PCB BOM CALLOUTS
5
4
3
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
1
ALTERNATE ALTERNATE BOM OPTIONS OPTIONS TABLE_5_HEAD
PART#
2
CRITICAL
BOM OPTION
CRITICAL
?
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
138S00032
ALTERNATE FOR PART NUMBER
138S0831
ALTERNATE
C0610
TY,2.2UF,0201
138S00049
138S0831
ALTERNATE
C0610
KYOCERA,2.2UF,0201
TABLE_ALT_HE
AD
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_5_ITEM
051-00648
1
SCH,MLB,N69
SCH
TABLE_5_ITEM
820-00282
1
PCBF,MLB,N69
PCB
CRITICAL
?
NOT ALL REFERENCE DESIGNATORS LISTED. USED 91 TIMES IN DESIGN. USED 91 TIMES IN DESIGN.
TABLE_5_ITEM
825-6838
1
EEEE CODE FOR 639-00931 16GB
EEEE_GH6K
CRITICAL
EEEE_16G
825-6838
1
EEEE CODE FOR 639-01012 16GB
EEEE_GJYD
CRITICAL
EEEE_16GH
825-6838
1
EE EE C ODE FO R 63 9-0 1231 32 GB
EEEE_GN7J
CR ITI CAL
E EE E_ 32 G
825-6838
1
EEEE CODE FOR 639-01232 32GB
EEEE_GN7H
CRITICAL
155S0660
1 55 S0 51 3
A LT ER NA TE
FL3100
USED 5 TIMES IN DESIGN.
M UR AT A, FE RR ,2 2- OH M
TABLE_5_ITEM
138S00005
1 3 8S 0 00 03
A L TE R NA T E
C1500
TY,15UF,0402
1 3 8S 0 00 48
1 3 8S 0 00 03
A L TE R NA T E
C1500
KYOCERA,15UF,0402
118S0764
118S0717
ALTERNAT E
R2250
USED 61 TIMES IN DESIGN.
D
TABLE_5_ITEM
D
USED 61 TIMES IN DESIGN.
TABLE_5_ITEM
EEEE_32GH
PANASONIC,3.92K-OHM,0201
USED 1 TIME IN DESIGN.
TABLE_5_ITEM
8 25 -6 83 8
1
E EE E C OD E F OR 6 39 -0 12 71 6 4G B
825-6838
1
EEEE CODE FOR 639-01272 64GB
E EE E_ GP 3V
CRITICAL
E EE E_ 64 G
138S00006
138S0835
ALTERNATE
C1106
TY,4.3UF,0402
152S2052
152S1929
ALTERNATE
L2060
CYNTEC,1UH,1608
155S0773
1 55 S0 45 3
ALTERNATE
F L3 10 1
T Y, FE RR ,1 20 -O HM ,0 10 05
377S0168
377S0140
ALTERNATE
DZ3150
TDK,VARISTOR,6.8V,100PF,01005
155S00067
155S0581
ALTERNATE
FL4200
TDK,FERR,240-OHM,0201
155S00012
155S00009
ALTERNATE
L3100
MURATA,CHOKE,65-OHM,0605
138S0706
138S0739
ALTERNATE
C5302_RF
MURATA,CAP,CER,1UF,20%,10V,X5R,0201
138S0945
138S0739
ALTERNAT E
C5302_RF
KYOCERA,CAP,CER,1UF,20%,10V,X5R,0201
USED 20 TIMES IN DESIGN.
TABLE_5_ITEM
EEEE_GP3W
CRITICAL
EEEE_64GH
S3E NAND BOM OPTIONS
USED 1 TIME IN DESIGN. USED 35 TIMES IN DESIGN. USED 9 TIMES IN DESIGN.
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
U1500
CRITICAL
NAND_16G
U1500
CRITICAL
NAND_32G
U1500
CRITICAL
NAND_64G
USED 5 TIMES IN DESIGN.
TABLE_5_ITEM
335S00054
1
335S00072
1
335S00076
1
NAND,1YNM,16GX8,S3E,64G,T,SLGA70
USED 10 TIMES IN DESIGN.
TABLE_5_ITEM
NAND,1YNM,32GX8,S3E,64G,T,SLGA70
USED 4 TIMES IN DESIGN.
TABLE_5_ITEM
NAND,1YNM,64GX8,S3E,TLC,128G,H,ULGA70
TABLE_ALT_HE
PART NUMBER
ALTERNATE FOR PART NUMBER
335S00071
3 35 S0 00 54
3 35 S0 00 85
335S00072
BOM OPTION
REF DES
N AN D_ 16 G
U 15 00
N AN D_ 32 G
AD
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
HYNIX 16G SLGA70
U 15 00
T OS HI BA 1 6G S LG A7 0
CARBON BOM OPTIONS C
TABLE_5_HEAD
P AR T#
QTY
D ES CR IP TI ON
REFERENCE DESIGNATOR(S)
1
U3010
IC,CARBON,MPU-6700-12,LGA16
INVENSENSE_CARBON TABLE_5_ITEM
3 3 8S 1 16 3
1
155S00068 1 3 8S 0 65 2
ALTERNATE A L TE R NA T E
FL1280 C3650
132S0400
132S0436
ALTERNATE
C1280
155S0960
155S0941
ALTERNATE
USED 4 TIMES IN DESIGN. USED 1 TIME IN DESIGN.
F E R R B D , 1 0 0 O H M , 2 5 % , 1 0 0A M, 2 O H M , 0 1 0 0 5
IC,ACCEL,3-AXIS,DIG,BMA282,LGA14
TY,4.7UF,0402
FL3151
USED 1 TIME IN DESIGN. USED 8 TIMES IN DESIGN.
F E R R B D , 7 0 O H M , 2 5 % , 3 0 0 M, A0 . 4 D C R , 0 1 0 0 5
138S00024
138S0986
ALTERNATE
335S00066
335S0946
ALTERNATE
U0900
376S00106
376S00047
ALTERNATE
Q2300
DIODES INC. ACT DIODE
343S0688
343S0638
ALTERNATE
U4301
CUMULUS 2ND FLOW
138S00022
138S0867
ALTERNATE
C1100
TY,10UF,0402
138S00020
138S0867
ALTERNATE
C1100
MURATA,10UF,0402
USED 9 TIMES IN DESIGN.
CAP,CER,X5R,0.22UF,20%,6.3V,01005
C5201_RF
USED 1 TIME IN DESIGN.
CAP,CER,3-TERM,7.5UF,20%,4V,0402
USED 1 TIME IN DESIGN.
IC,EEPROM,16KX8,1.8V,I2C,WLCSP4
USED 1 TIME IN DESIGN. USED 1 TIME IN DESIGN.
C
BOM OPTION TABLE_5_ITEM
338S00017
155S00095 138S0648
COMMENTS:
U3020
INVENSENSE_CARBON
USED 51 TIMES IN DESIGN. USED 51 TIMES IN DESIGN.
TABLE_5_ITEM
132S0316
1
C3020
INVENSENSE_CARBON
1 3 8S 0 69 2
1
CAP,CER,X5R,1UF,20%,6.3V,0201
C 3 02 1
I N VE N SE N SE _ CA R BO N
132S0316
1
CAP,CER,X5R,0.1UF,20%,6.3V,01005
C 3 02 2
I N VE N SE N SE _ CA R BO N
117S0202
1
RES,MF,20OHM,5%,1/32W,01005
R3020
INVENSENSE_CARBON
1 1 7S 0 20 2
1
RES,MF,20OHM,5%,1/32W,01005
R3021
INVENSENSE_CARBON
117S0202
1
RES,MF,20OHM,5%,1/32W,01005
R3022
INVENSENSE_CARBON
338S00087
1
IC,CARBON,MPU-6800-00,LGA16
CAP,CER,X5R,0.1UF,20%,6.3V,01005
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PMU/SOC BOM OPTIONS
TABLE_5_ITEM TABLE_5_HEAD
U3010
INVENSENSE_CARBON_1_1
P AR T#
QTY
D ES CR IP TI ON
REFERENCE DESIGNATOR(S)
BOM OPTION TABLE_5_ITEM
339S00121
1
U0600
MALTA
118S00009
1
RES,MF,3.01KOHM,1%,1/32W,01005
R0730
MALTA
131S0307
1
CAP,CER,NPO/COG,100PF,5%,16V,01005
C0730
NOSTUFF
118S00025
1
RES,MF,330OHM,1%,1/32W,01005
R0651
MALTA
132S0316
1
CAP,CER,X5R,0.1UF,20%,6.3V,01005
C0731
NOSTUFF
338S00170
1
IC,PMU,ANTIGUA,D2255A1,OTP-BG
U2000
MALTA
POP,MALTA+2GB 25NM DDR,A1,M,DEV
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
COMPASS PART NUMBER
TABLE_5_ITEM
TABLE_5_HEAD
P AR T#
QTY
D ES CR IP TI ON
REFERENCE DESIGNATOR(S)
BOM OPTION TABLE_5_ITEM
338S00084
1
U3000
IC,COMPASS,MAGNESIUM,601A-19,FLGA14
COMMON
TABLE_5_HEAD
B
P AR T#
QTY
D ES CR IP TI ON
REFERENCE DESIGNATOR(S)
B
BOM OPTION TABLE_5_ITEM
SHIELD PART NUMBERS
339S00096
1
POP,MAUI+2GB 25NM DDR,C0,H,DEV
U0600
MA MAUI
118S0631
1
RES,MF,100OHM,1%,1/32W,01005
R0730
MAUI
131S0307
1
CAP,CER,NPO/COG,100PF,5%,16V,01005
C0730
MAUI
117S0161
1
RES,MF,0OHM,1/32W,01005
R0651
MAUI
132S0316
1
CAP,CER,X5R,0.1UF,20%,6.3V,01005
C0731
MAUI
338S00171
1
U2000
MAUI
TABLE_5_ITEM
TABLE_5_HEAD TABLE_5_ITEM
P AR T#
QTY
D ES CR IP TI ON
REFERENCE DESIGNATOR(S)
BOM OPTION TABLE_5_ITEM
TABLE_5_ITEM
806-03629
1
SH 05 00
SHIELD,EMI,UPPER FRONT,N69
C OM MO N TABLE_5_ITEM
TABLE_5_ITEM
806-03630
1
SHIELD,EMI,LOWER FRONT,N69
806-03556
1
SHIELD,EMI,BACK,N69
SH0501
COMMON
SH0503
COMMON
TABLE_5_ITEM TABLE_5_ITEM
POWER INDUCTOR ALTERNATES PART NUMBER
152S00117
ALTERNATE FOR PART NUMBER
152S00074
BOM OPTION
?
REF DES
L2000
SOC ALTERNATES TABLE_ALT_HE
AD
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
COMMENTS:
PART NUMBER
TAIYO 2016 1.0UH
1 52 S0 01 21
1 52 S0 00 81
?
L 20 01
152S00120
152S00077
?
L2070
152S00118
152S00075
?
L3700
TAIYO 2016 1.2UH
152S00123
152S1936
?
L4020
TAIYO 3225 15UH
T AI YO 2 01 2 0 .4 7U H
ALTERNATE FOR PART NUMBER
339S00122
339S00121
339S00123
339S00121
BOM OPTION
ALTERNATE
REF DES
COMMENTS:
U0600
MALTA DEV, H DRAM
TABLE_ALT_HE
AD
TABLE_ALT_IT
EM
TABLE_ALT_HE
AD
TABLE_ALT_IT
EM
TABLE_ALT_IT
EM
TAIYO 2016 1.0UH 0.65MM
PART NUMBER
339S00097
A
IC,PMU,ANTIGUA,D2255A1,OTP-YG
339S00098
ALTERNATE FOR PART NUMBER
339S00096 339S00096
BOM OPTION
ALTERNATE ALTERNATE
REF DES
COMMENTS:
U0600
MAUI DEV, M DRAM
U0600
MAUI DEV, S DRAM
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SYSTEM:BOM TABLES D R AW I NG N U MB E R
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
S I ZE
D
8
7
6
5
4
3
TESTPOINTS
2
N69 I2C DEVICE MAP I2C BUS
TP00
D
A TP-P6
DEVICE
I2C0
POWER
ANTIGUA PMU
AMUX POWER GROUND
TP16
PMU_AMUX_AY
16
A TP-P55
ROOM=TEST
30
17
TP01
PP5V0_USB
A TP-P6
VBUS
16
18
17
MOJAVE
A TP-P6
ROOM=TEST
TP03
VBATT
27
26
MESA_TO_BOOST_EN
A TP-P6
CHESTNUT
0100111X
0X27
0XE8 0X4E
BACKLIGHT
1100010X
0X62
0XC4
TIGRIS
1110101X
0X75
0XEA
SPEAKER AMP
1000000X
0X40
0X80
TRISTAR
0011010X
0X1A
0X34
0101001X
0X29
0X52
N/A
D
TP18
I2C2
A TP-P55
ALS
ROOM=TEST
ROOM=TEST
27
TP05
TP24
ROOM=TEST
ROOM=TEST
A TP-P55
8-BIT HEX
0X74
A TP-P55
ROOM=TEST
TP02
PP_BATT_VCC
7-BIT HEX
TP17
PMU_AMUX_BY
ROOM=TEST
33
BINARY 1110100X
ROOM=TEST
I2C1 31
1
A TP-P55
26
PP11V3_MESA
TP 24 FOR USB FIXTURE SI
TP19
A TP-P55
OWL
ROOM=TEST
LCM 28
PP_LCM_BL_CAT1_CONN
UNUSED
ISP I2C0
TP20
N/A
N/A
REAR CAM
TBD
TBD
TBD
LED DRIVER
1100011X
0X63
0XC6
FRONT CAM
0110110X
0X36
0X6C
N/A
N/A
N/A
A TP-P55
ROOM=TEST
RESET C
16
9
PMU_TO_SYSTEM_COLD_RESET_L
5
TP06
A TP-P55
28
PP_LCM_BL_CAT2_CONN
SOC & BB RESET 28
PP_LCM_BL_ANODE_CONN
DFU FORCE_DFU
TP07
A TP-P55
ROOM=TEST
PP07
28
21
20
14
13
12
9
8
7
6
5
3 29
PP1V8
P4MM-NSM SM 1
FORCE DFU PROCEDURE: 1. FROM OFF MODE SHORT TP07 TO PP07 2. PLUG IN E75 CABLE TO FORCE DFU
UNUSED
TOUCH I2C
C
TP22
A TP-P55
28
LCD_TO_AP_PIFA_CONN
TP23
SEP I2C
A TP-P55
SEP EEPROM
1010001X
0x51
0xA2
ROOM=TEST
BOOTSTRAPPING:BOARD REV BOARD ID BOOT CONFIG
PP
PP08
DFU_STATUS
A TP-P55
ROOM=TEST
ROOM=TEST
8
TP21 ROOM=TEST
ROOM=TEST
8
ISP I2C1
P4MM-NSM SM 1 PP
ROOM=TEST
E75 31
30
90_TRISTAR_DP1_CONN_P
TP08
31
30
90_TRISTAR_DP1_CONN_N
B
OUT
BOARD_REV3
R0400
8
OUT
BOARD_REV2
R0401
8
OUT
BOARD_REV1
8
TRISTAR USB
30
90_TRISTAR_DP2_CONN_P
NOSTUFF
A TP-P55
TP10
30
90_TRISTAR_DP2_CONN_N
8
30
PP_TRISTAR_ACC1
30
PP_TRISTAR_ACC2
OUT
BOARD_REV0
8
OUT
BOARD_ID4
0 10 05
8
OUT
TRISTAR ACCESSORY ID ACCESSORY POWER
BOARD_ID3
A TP-P55
01005
8
BI
BOARD_ID2
8
OUT
BOARD_ID1
TRISTAR_CON_DETECT_L
R0407 01005
NOSTUFF 8
30
R0406 01005
ROOM=TEST
31
R0405 NOSTUFF
ROOM=TEST
TP14
R0404 NOSTUFF
A TP-P55
A TP-P55
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
2 1.00K 1/32W
PP1V8
3 5 29
6
7 8
9 12
13
14
20
21
28
2 1.00K 1/32W 2 1.00K 1/32W
B
2 1.00K 1/32W
BOARD_REV[3:0] FLOAT=LOW, PULLUP=HIGH
NOSTUFF
TP12 TP13
R0403 01005
TRISTAR DEBUG UART
A TP-P55
ROOM=TEST
31
0 10 05
TP11
ROOM=TEST
31
R0402 NOSTUFF
A TP-P55
ROOM=TEST
31
01005
TP09 ROOM=TEST
31
01005
A TP-P55
ROOM=TEST
TP15
OUT
BOARD_ID0
R0408 0 10 05
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
1111 1110 1101 1100 XXXX XXXX
1.00K
2 1/32W
SELECTED -->
2 1.00K 1/32W 2 1.00K 1/32W
BOARD_ID[4:0] FLOAT=LOW, PULLUP=HIGH SELECTED -->
00010 N69 MLB 00011 N69 DEV
BOOT_CONFIG[2:0]
2 1.00K 1/32W 2 1.00K 1/32W
FLOAT=LOW, PULLUP=HIGH 000 001 010 011 100 101 110 111
SELECTED -->
A TP-P55
ROOM=TEST
NOSTUFF 8
OUT
BOOT_CONFIG2
8
8
OUT
OUT
R0409 0 10 05
A BOOT_CONFIG1
R0410 01005
BOOT_CONFIG0
R0411 01005
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
ROOM=SOC
1 MF
5%
PROTO0 MLB PROTO1 PROTO2 EVT CARRIER DVT
SPI0 SPI0 TEST MODE NVME0 x2 MODE NVME0 x2 TEST MODE NVME0 x1 MODE NVME0 x1 TEST MODE SLOW SPI0 TEST MODE FAST SPI0 TEST MODE
2 1.00K 1/32W 2 1.00K 1/32W
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SYSTEM:N69 SPECIFIC [4] DRAWING NUMBER
2 1.00K 1/32W
Apple Inc.
051-00648 REVISION
4.0.0
R
RESISTOR
STUFF = HIGH '1'
RESISTOR NOSTUFF = LOW '0'
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
FIDUCIALS
SHIELDS
BOARD STANDOFFS
AND AC COUPLING CAPS FOR COMPASS RETURN CURRENTS
FD0501 FID
D
TOP-SIDE, EAST
ROOM=ASSEMBLY
1
EAST_STANDOFF_AC_GND_SCREW
1
C0510
1
100PF
C0511
5% 16V 2 NP0-C0G 01005
C0512
1
+/-0.1PF 16V 2 CERM 01005
2
1
56PF
3.3PF
5% 16V 2 NP0-C0G 01005
C0513 56PF
FD0502
SH0500
1
FID
SM
BS0501
STDOFF-2.7OD1.4ID-1.04H-SM-1
5%
16V
0P5SM1P0SQ-NSP 1
ROOM=ASSEMBLY
SHLD-EMI-UPPER-FRONT-N69 OMIT_TABLE
FD0503 FID
LOWER FRONT SHIELD
NP0-C0G 01005
0P5SM1P0SQ-NSP 1
1
ROOM=ASSEMBLY
SH0501
1
C0520
1
100PF
C0521
1
56PF
5%
1
2 CERM 01005
2
FID
0P5SM1P0SQ-NSP 1
SHLD-EMI-LOWER-FRONT-N69 OMIT_TABLE
ROOM=ASSEMBLY
FD0510
BS0502
FID
STDOFF-2.7OD1.4ID-1.04H-SM-1
5%
16V
2 NP0-C0G 01005
C0523 56PF
+/-0.1PF
16V
2 NP0-C0G 01005
C0522 3.3PF
5%
16V
1
FD0505
SM
TOP-SIDE, WEST WEST_STANDOFF_AC_GND_SCREW
16V
0P5SQ-SMP3SQ-NSP 1
ROOM=ASSEMBLY
PLATED SHIELD SLOT
NP0-C0G 01005
D
0P5SM1P0SQ-NSP 1
UPPER FRONT SHIELD
FD0511
SL0501 TH-NSP
FID
1
0P5SQ-SMP3SQ-NSP 1
SL-1.20X0.40-1.50X0.70-NSP
ROOM=ASSEMBLY
FD0512 FID
C
C
0P5SQ-SMP3SQ-NSP 1
ROOM=ASSEMBLY
FD0514
TOP-SIDE, GROUND SPRING
FID
0P5SQ-SMP3SQ-NSP 1
SP0502
SPRING-SUPER-COWLING-GROUND-X145
ROOM=ASSEMBLY
1
CLIP-SM
FD0515 FID
0P5SQ-SMP3SQ-NSP 1
ROOM=ASSEMBLY
FD0504 FID
0P5SM1P0SQ-NSP 1
ROOM=ASSEMBLY
NORTH WIFI UNDERFILL BLOCKING
FD0516 FID
CKPLUS_WAIVE=TERMSHORTED
R0500 1 01005
MF
2
R0501 1 01005
MF
0P5SQ-SMP3SQ-NSP 1
0.00
0% 1/32W 2
0%
CKPLUS_WAIVE=TERMSHORTED
ROOM=ASSEMBLY
0.00
1/32W
B
B
COMPASS AC GROUNDING CAPS
PP0501
P4MM-NSM COMPASS_AC_GND_SCREW
1
C0540 0.01UF
1
C0541 100PF
1
C0542 56PF
1
1
SM PP
C0543 3.3PF
10% 2% 2% +/-0.1PF 25V 25V 2 X5R-CERM 2 50V 2 50V C0G NP0-C0G-CERM 2 C0G-CERM 0201 0201 0201 0201 ROOM=ASSEMBLY ROOM=ASSEMBLY ROOM=ASSEMBLY ROOM=ASSEMBLY
A
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SYSTEM:MECHANICAL DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
SOC - USB, JTAG, XTAL D
D
VDD12_PLL_LPDP:1.14-1.26V @2mA MAX VDD12_PLL_SOC: 1.14-1.26V @12mA MAX VDD12_PLL_CPU: 1.14-1.26V @2mA MAX VDD18_USB: 1.71-1.89V @20mA MAX VDD18_XTAL:1.62-1.98V @2mA MAX
R0600 15
7
6
PP1V2
1
0.00
2
0% 1/32W MF 01005
PP1V2_PLL
PP1V8
C0600
C0601
20% 2 6.3V X5R-CERM 01005
20% 2 6.3V X5R-CERM 01005
0.1UF
ROOM=SOC
ROOM=SOC
0.1UF ROOM=SOC
C0602
C0603
0.01UF
1
20% 2 6.3V X5R-CERM 01005
10% 2 6.3V X5R 01005
ROOM=SOC
1
PP1V8_XTAL
ROOM=SOC
ROOM=SOC
1
C0611 0.1UF
20% 2 6.3V X5R-CERM 01005
1
1 2 5 P 1 A C
0.22UF
2
20% 6.3V X5R 0201
0 C I S H _ 1 H U _ 2 1 D D V
ROOM=PMU
C
PP0620 P2MM-NSM SM 1
1 C I S H _ 2 H U _ 2 1 D D V
3 2 0 9 9 1 2 2 1 1 F F U T W A P D P L _ L L P _ 2 1 D D V
C O S _ L L P _ 2 1 D D V
U P C _ L L P _ 2 1 D D V
1 2 L A B S U _ 8 1 D D V
7
8
9 12
13
14
20
21
28
29
0 2 N A B S U _ 3 3 D D V
C0620
4 3 L A
0.1UF
2 0201
C0610
ROOM=SOC
20% 2 6.3V X5R-CERM 0201 ROOM=SOC
PP3V3_USB
C0604
6
2.2UF
ROOM=SOC
1
3
FL0610
1KOHM-25%-0.2A
0.1UF
0.01UF
10% 2 6.3V X5R 01005
C0612
15
VDD33_USB:3.14-3.46V @5mA MAX
20% 6.3V 2 X5R-CERM 01005
L A T X _ 8 1 D D V
ROOM=SOC
C
OMIT_TABLE
CRITICAL
PP
ROOM=SOC
U0600 MAUI-2GB-25NM-DDR-H
33
BI
33
BI
50_AP_BI_BB_HSIC0_DATA 50_AP_BI_BB_HSIC0_STB
AN22
UH1_HSIC0_DATA
AN21
UH1_HSIC0_STB
FCMSP
ANALOGMUX_OUT
AP24
AP_TO_PMU_AMUX_OUT
16
OUT
SC58980X0B-A040
L0602
15NH-250MA
SYM 1 OF 14
PP0621 P2MM-NSM SM
PP
1
NC NC
ROOM=SOC
C16
UH2_HSIC1_DATA
D15
UH2_HSIC1_STB
Y32
JTAG_SEL
AC32
30
IN
SWD_DOCK_BI_AP_SWDIO SWD_DOCK_TO_AP_SWCLK
9
3
IN
PMU_TO_SYSTEM_COLD_RESET_L
16
9
IN
PMU_TO_OWL_ACTIVE_READY
30
16
30
26
BI
ROOM=SOC
PP0610
B
P3MM-NSM SM 1
NC
JTAG_TRST*
AB31
NC
JTAG_TDO
NC
AA32
JTAG_TDI
AB32
1
JTAG_TCK
AC31
COLD_RESET* CFSB
16
OUT
AP_TO_PMU_TEST_CLKOUT
AR23
ROOM=TRISTAR
90_USB_AP_DATA_AP_P 90_USB_AP_DATA_AP_N
TST_CLKOUT
13
OUT
AP_TO_NAND_RESET_L
AN23
S3E_RESET*
H32
HOLD_RESET
AF6 AL22
90_USB_AP_DATA_P 90_USB_AP_DATA_N
L0601
15NH-250MA 1
BI
30
BI
30
2 0201 ROOM=TRISTAR
USB_VBUS_DETECT
USB_VBUS AP19
IN
17
USB_ID AR19NC
USB_REXT AP18
USB_REXT
R0640 200
1% 1/32W MF 01005 2 ROOM=SOC
PP
AG25
2 0201
USB_D_P AT20 USB_D_N AT19
JTAG_TMS
AA31
H33
ROOM=SOC
WDOG
Y33
AP_TO_PMU_WDOG_RESET
OUT
B
16
TESTMODE FUSE1_FSRC FUSE2_FSRC
XI0 AK35 XO0 AL35
45_XTAL_AP_24M_IN 45_XTAL_AP_24M_OUT
R0650
CRITICAL
511K 1% 1/32W MF 01005
ROOM=SOC
ROOM=SOC
R0651 1
0.00
2
0% 1/32W MF 01005 ROOM=SOC
OMIT_TABLE
Y0600
1.60X1.20MM-SM
24.000MHZ-30PPM-9.5PF-60OHM 1 3 45_SOC_24M_O 1
C0650
2
4
12PF
C0651 12PF
5% 2 16V CERM 01005
5% 16V 2 CERM 01005
ROOM=SOC
ROOM=SOC
45_AP_XTAL_GND
XW0650
SHORT-10L-0.1MM-SM 1 2 ROOM=SOC
A
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SOC:JTAG,USB,XTAL DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
SOC - PCIE INTERFACES VDD12_PCIE_REFBUF:1.08-1.2 6V @50mA MAX VDD12_PCIE_TXPLL: 1.08-1.32V @10mA MAX VDD12_PCIE: 1.14-1.26V @115mA MAX
D
15
7
5
XW0740
SHORT-10L-0.1MM-SM 1
PP1V2
VDD085_PCIE:0.802-TBDV @TBDmA MAX
PP1V2_PCIE_TXPLL
2
PP_FIXED
ROOM=SOC
1
C0740
1
20% 6.3V X5R-CERM 0201
20% 6.3V 2 X5R 0201-1
2.2UF
2
ROOM=SOC
C0741 1.0UF
1
C0742
1
0.1UF
20% 6.3V 2 X5R-CERM 01005
ROOM=SOC
C0744 0.1UF
2
ROOM=SOC
20% 6.3V X5R-CERM 01005 ROOM=SOC
1
C0743 0.1UF
20% 6.3V 2 X5R-CERM 01005 ROOM=SOC
1
1
C0731
0.1UF
0.1UF
20% 6.3V 2 X5R-CERM 01005
8 5 4 7 2 2 2 2 K K L L A A A A
ROOM=SOC
OMIT_TABLE
E I C P _ 2 1 D D V
PCIE_EXT_C
C0701 13
IN
13
IN
90_PCIE_NAND_TO_AP_RXD0_P 90_PCIE_NAND_TO_AP_RXD0_N
ROOM=SOC
C0702 ROOM=SOC
C0703 0
C
13
OUT
13
OUT
90_PCIE_AP_TO_NAND_TXD0_P 9 0_ PC IE _A P_ TO _N AN D_ TX D0 _N
ROOM=SOC
K N I L E I C P
ROOM=SOC
C0704 C0705
13
IN
13
IN
9 0_ PC IE _N AN D_ TO _A P_ RX D1 _P 90_PCIE_NAND_TO_AP_RXD1_N
ROOM=SOC
C0706 ROOM=SOC
C0707 13 13
OUT OUT
90_PCIE_AP_TO_NAND_TXD1_P 90_PCIE_AP_TO_NAND_TXD1_N
ROOM=SOC
C0708 ROOM=SOC
C0709 1
33
IN
33
IN
90_PCIE_WLAN_TO_AP_RXD_P 90_PCIE_WLAN_TO_AP_RXD_N
ROOM=SOC
K N I L E I C P
ROOM=SOC
C0710 C0711
33
OUT
33
OUT
90_PCIE_AP_TO_WLAN_TXD_P 90_PCIE_AP_TO_WLAN_TXD_N
ROOM=SOC
C0712 ROOM=SOC
B
1 20% 6.3V
1 20% 6.3V
2
2
AP29
PCIE_EXT_C
AM30
PCIE_RX0_P
0.1UF
X5R-CERM 01005
0.1UF
6 2 L A L L P X T _ E I C P _ 2 1 D D V
6 2 J A F U B F E R _ E I C P _ 2 1 D D V
20% 6.3V
1 20% 6.3V
AN30
PCIE_RX0_N
2
0.1UF
C0751
CRITICAL
U0600 FCMSP
90_PCIE_AP_TO_NAND_TXD0_C_P 9 0_ PC IE _A P_ TO _N AN D_ TX D0 _C _N
SYM 2 OF 14
AT32
PCIE_TX0_P
AR32
PCIE_TX0_N
X5R-CERM 01005
20% 6.3V 2 X5R 0201-1
ROOM=SOC
7 11
20% 6.3V
1 20% 6.3V
1 20% 6.3V
1 20% 6.3V
1 20% 6.3V
1 20% 6.3V
1 20% 6.3V
1 20% 6.3V
2
2.2UF
2
20% 6.3V X5R-CERM 0201
ROOM=SOC
ROOM=SOC
PCIE_REF_CLK0_P AN35 AP35 PCIE_REF_CLK0_N
90_PCIE_AP_TO_NAND_REFCLK_P 90_PCIE_AP_TO_NAND_REFCLK_N
OUT
13
OUT
13
PCIE_REF_CLK1_P AN34 AP34 PCIE_REF_CLK1_N
90_PCIE_AP_TO_WLAN_REFCLK_P 90_PCIE_AP_TO_WLAN_REFCLK_N
OUT
33
OUT
33
2
0.1UF
AM28
90_PCIE_AP_TO_NAND_TXD1_C_P 90_PCIE_AP_TO_NAND_TXD1_C_N
AT31
AN28
PP
PCIE_REF_CLK2_P AM32NC
2
PP1V8
NC
2
0.1UF
R0720
R0721
5% 1/32W MF 01005
5% 1/32W MF 01005
100K
PCIE_RX1_N
ROOM=SOC
AR31
PCIE_TX1_P
3
5
7
8
9 12
13
14
20
21
28
29
C
100K
ROOM=SOC
PCIE_CLKREQ0* AT11 PCIE_CLKREQ1* AP12
0.1UF
X5R-CERM 01005
PP0701
AM31
PCIE_RX1_P
X5R-CERM 01005
PP0700
P2MM-NSM SM 1
PCIE_REF_CLK2_N AN32NC PCIE_REF_CLK3_P
9 0_ PC IE _N AN D_ TO _A P_ RX D1 _C _P 90_PCIE_NAND_TO_AP_RXD1_C_N
P2MM-NSM SM 1 PP
0.1UF
X5R-CERM 01005
D
14
C0750
PCIE_REF_CLK3_N AN31NC 1
PCIE_NAND_TO_AP_CLKREQ_L PCIE_WLAN_TO_AP_CLKREQ_L
PCIE_CLKREQ2* AR12NC AT12 PCIE_CLKREQ3* NC
BI
13
BI
33
PCIE_TX1_N
X5R-CERM 01005
2
0.1UF
X5R-CERM 01005
2
0.1UF
PCIE_PERST0*
90_PCIE_WLAN_TO_AP_RXD_C_P 90_PCIE_WLAN_TO_AP_RXD_C_N
AM27 AN27
2
PCIE_AP_TO_NAND_RESET_L PCIE_AP_TO_WLAN_RESET_L
AT10
PCIE_PERST1*
PCIE_RX2_N
PCIE_PERST2* AP11NC PCIE_PERST3* AR11
0.1UF
OUT
13
OUT
33
NC
0.1UF
X5R-CERM 01005
2
AR10
PCIE_RX2_P
X5R-CERM 01005
90_PCIE_AP_TO_WLAN_TXD_C_P 90_PCIE_AP_TO_WLAN_TXD_C_N
AT28 AR28
PCIE_TX2_P PCIE_TX2_N
PCIE_EXT_REF_CLK_P AR33 AT33
R0700
R0701
5% 1/32W MF 01005
5% 1/32W MF 01005
100K
PCIE_EXT_REF_CLK_N
X5R-CERM 01005
ROOM=SOC
AM26
NC
PCIE_RX3_P
NC
PCIE_RX3_N
AN26
NC
AT26
PCIE_TX3_P
NC
AR26
PCIE_TX3_N
NC
AM25
PCIE_RX4_P
NC
PCIE_RX4_N
AN25
AR24
NC
PCIE_TX4_P
NC
PCIE_TX4_N
AT24
100K
ROOM=SOC
B
PCIE_RX_TX_BYPASS_CLK_P AT29 AR29 PCIE_RX_TX_BYPASS_CLK_N
PCIE_RCAL_P AT30 PCIE_RCAL_N AR30
R0730
1
1% 1/32W MF 01005
2
3.01K
45_PCIE_RCAL_N
A
1
1.0UF
E I C P _ 5 8 0 D D V
MAUI-2GB-25NM-DDR-H
0.1UF
X5R-CERM 01005
ROOM=SOC
1
OMIT_TABLE
90_PCIE_NAND_TO_AP_RXD0_C_P 90_PCIE_NAND_TO_AP_RXD0_C_N
X5R-CERM 01005
2
20% 6.3V 2 X5R-CERM 01005
8 5 3 9 9 4 7 7 2 2 2 2 2 2 2 2 H J L J L J K J A A A A A A A A
SC58980X0B-A040 1
C0752
ROOM=SOC
OMIT_TABLE
C0730 100PF 5% 16V NP0-C0G 01005
ROOM=SOC
OMIT_TABLE
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SOC:PCIE DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
SOC - CAMERA & DISPLAY INTERFACES D
D
14
11
6
0.756-0.893V @11mA MAX PP_FIXED 1
C0814 0.1UF
20% 2 6.3V X5R-CERM 01005
1.62-1.98V @23mA MAX
PP1V8 1
C0801
1
0.1UF
ROOM=SOC
C0802 0.1UF
20% 2 6.3V X5R-CERM 01005
0 3 3 1 1 8 1 E E E D
ROOM=SOC
20% 2 6.3V X5R-CERM 01005
0 1 4 1 7 8 1 1 D E D E E
I P I M _ 5 8 0 D D V
1
3 5 29
6
7
8
9 12
13
14
20
21
28
C0815 0.1UF
20% 2 6.3V X5R-CERM 01005
ROOM=SOC
NOTE:VDD12_LPDP SHOULD BE POWERED EVEN WHEN LPDP IS NOT USED
ROOM=SOC
I P I M _ 8 1 D D V
15
PP1V8
3 5 29
OMIT_TABLE
U0600 FCMSP SC58980X0B-A040
C
21
IN
21
IN
21
IN
21
IN
21
IN
21
IN
21
IN
21
IN
21
IN
21
IN
90_MIPI_RCAM_TO_AP_DATA1_CONN_P 90_MIPI_RCAM_TO_AP_DATA1_CONN_N
OUT
28
OUT
28
OUT
28
OUT
MIPI0C_DATA2_P
90_MIPI_RCAM_TO_AP_DATA3_CONN_P B14 90_MIPI_RCAM_TO_AP_DATA3_CONN_N A14
MIPI0C_DATA3_P
90_MIPI_RCAM_TO_AP_CLK_CONN_P 90_MIPI_RCAM_TO_AP_CLK_CONN_N
90_MIPI_AP_TO_LCM_DATA0_P 90_MIPI_AP_TO_LCM_DATA0_N 90_MIPI_AP_TO_LCM_DATA1_P 90_MIPI_AP_TO_LCM_DATA1_N
NC
B
NC
OUT OUT
90_MIPI_AP_TO_LCM_CLK_P 90_MIPI_AP_TO_LCM_CLK_N 45_LCM_REXT
R0801
R0802
1% 1/32W MF 01005
1% 1/32W MF 01005
4.02K
ROOM=SOC
A
4.02K ROOM=SOC
MIPI0C_DATA1_P MIPI0C_DATA1_N
NC
28
MIPI0C_DATA0_N
A9 B9
NC
28
MIPI0C_DATA0_P
A8
90_MIPI_RCAM_TO_AP_DATA2_CONN_P A13 90_MIPI_RCAM_TO_AP_DATA2_CONN_N B13
45_RCAM_REXT 28
B8
SYM 3 OF 14 ROOM=SOC
CRITICAL
R0805
R0806
R0807
5% 1/32W MF 01005
5% 1/32W MF 01005
5% 1/32W MF 01005
5% 1/32W MF 01005
1.00K
MAUI-2GB-25NM-DDR-H
90_MIPI_RCAM_TO_AP_DATA0_CONN_P 90_MIPI_RCAM_TO_AP_DATA0_CONN_N
R0804
ROOM=SOC
1.00K
1.00K
ROOM=SOC
6
7
8
9 12
13
14
20
21
3 5 7 4 2 2 2 2 E E E F
ROOM=SOC
P D P L _ 2 1 D D V
ROOM=SOC OUT
ISP_I2C1_SCL F35 ISP_I2C1_SDA G34
I2C_ISP_TO_FCAM_SCL I2C_ISP_BI_FCAM_SDA
OUT
BI
BI
21 21
22
20
U0600 MAUI-2GB-25NM-DDR-H NC NC
45_AP_TO_RCAM_CLK_R AP_TO_RCAM_SHUTDOWN_L
SENSOR1_CLK F33 E34 SENSOR1_RST
45_AP_TO_FCAM_CLK_R AP_TO_FCAM_SHUTDOWN_L
33.2
1% MF OUT
21
R0809 1% MF
NC
45_AP_TO_RCAM_CLK
01005
1/32W
OUT
21
1/32W
NC NC
ROOM=SOC
33.2
45_AP_TO_FCAM_CLK
NC OUT
20
NC
A12
MIPI0C_CLK_P
B12
MIPI0C_CLK_N
NC
D12
MIPI0C_REXT
NC
A3
MIPID_DATA0_P
B3
MIPID_DATA0_N
B4
MIPID_DATA1_P
A4
MIPID_DATA1_N
B6
SENSOR0_ISTRB SENSOR0_XSHUTDOWN SENSOR1_ISTRB SENSOR1_XSHUTDOWN
MIPID_DATA2_N
A7
MIPID_DATA3_P
B7
MIPID_DATA3_N
F32 C35 C34
20
01005
ROOM=SOC
NC
AP_TO_STOCKHOLM_DWLD_REQUEST
NC OUT
33
NC NC
AP_TO_MUON_BL_STROBE_EN
OUT
NC
26
NC
MIPICSI_MUXSEL G35 NC MIPI1C_REXT D14
MIPID_DATA2_P
A6
D34
OUT
MIPI1C_DATA0_P B17 MIPI1C_DATA0_N A17
45_FCAM_REXT 90_MIPI_FCAM_TO_AP_DATA0_P 90_MIPI_FCAM_TO_AP_DATA0_N
NC
IN
20
IN
20
IN
20
IN
20
C
OMIT_TABLE
22
20
R0808
MIPI0C_DATA2_N SENSOR0_CLK D33 D32
PP1V2
28
I2C_ISP_TO_RCAM_SCL I2C_ISP_BI_RCAM_SDA
SENSOR0_RST
5
1.00K
ISP_I2C0_SCL G31 ISP_I2C0_SDA G32
MIPI0C_DATA3_N
6
LPDP_AUX_P
FCMSP
B29
LPDP_AUX_N
SC58980X0B-A040
A33
LPDP_TX0_P
A29
SYM 4 OF 14
B33
LPDP_TX0_N
A32
LPDP_TX1_P
B32
LPDP_TX1_N
A31
LPDP_TX2_P
ROOM=SOC
CRITICAL
B31
LPDP_TX2_N
A30
LPDP_TX3_P
B30
LPDP_TX3_N
D24
LPDP_CAL_DRV_OUT
D25
LPDP_CAL_VSS_EXT
AL4 H35
EDP_HPD DP_WAKEUP
MIPI1C_DATA1_P B19 NC
B
MIPI1C_DATA1_N A19 NC
A5
MIPID_CLK_P
B5
MIPID_CLK_N
D9
MIPID_REXT
MIPI1C_CLK_P A18 MIPI1C_CLK_N B18
90_MIPI_FCAM_TO_AP_CLK_P 90_MIPI_FCAM_TO_AP_CLK_N
R0803 4.02K 1% 1/32W MF 01005
ROOM=SOC
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SOC:CAMERA & DISPLAY DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
SOC - GPIO & SERIAL INTERFACES PP1V8
R0900
R0901
2.2K
D
2.2K
5% 1/32W MF 01005 2
5% 1/32W MF 01005
ROOM=SOC
ROOM=SOC
R0902
R0903
2.2K
R0904
2.2K
5% 1/32W MF 01005
1.33K
5% 1/32W MF 01005
ROOM=SOC
6
7
8
9 12
13
14
20
21
28
1.33K
1% 1/32W MF 01005
ROOM=SOC
3 5 29
R0905
D
1% 1/32W MF 01005
ROOM=SOC
ROOM=SOC
R0920
NC 32
16
IN
32
16
IN
25
IN
25
OUT
33
OUT
33
OUT
33
OUT
22
OUT
29
OUT
28 16
IN
33
OUT
3
C
3 33 33
29
28
9 33
24
32
16
OUT
IN
IN OUT IN IN
33
IN
33
OUT
33
IN
3
IN
3
IN
3
OUT
3
IN
3
IN
16
IN
33
OUT
13
OUT
29
IN
3
IN
3
IN
3
IN
3
IN
33
OUT
33
IN
8
IN
33
OUT
21
OUT
NC
BUTTON_VOL_UP_L BUTTON_VOL_DOWN_L SPEAKERAMP_TO_AP_INT_L
C1 D2
NC
GPIO_0 GPIO_2
F1
GPIO_3
F3
GPIO_5
F2
GPIO_6
H3
GPIO_7 GPIO_8
NC
AP_TO_STOCKHOLM_DEV_WAKE BOARD_ID3
NC
BOOT_CONFIG0 AP_TO_BB_WAKE_MODEM LCM_TO_AP_HIFA_BSYNC BB_TO_AP_HSIC_DEVICE_RDY BB_TO_AP_GPS_TIME_MARK AP_TO_BB_HSIC_HOST_RDY BB_TO_AP_RESET_DETECT_L BOOT_CONFIG1 FORCE_DFU DFU_STATUS BOOT_CONFIG2 BOARD_ID4 CODEC_TO_AP_PMU_INT_L AP_TO_BB_RADIO_ON_L AP_TO_NAND_FW_STRAP TOUCH_TO_AP_INT_L BOARD_REV3 BOARD_REV2 BOARD_REV1 BOARD_REV0 AP_TO_BB_COREDUMP BB_TO_AP_IPC_GPIO BUTTON_RINGER_A AP_TO_BB_MESA_ON CAM_EXT_LDO_EN
GPIO_10
K1
GPIO_11
SYM 5 OF 14 ROOM=SOC
CRITICAL
TMR32_PWM0
AE1
TMR32_PWM1
AF2
TMR32_PWM2
AF3
UART1_RTS*
K32
J4 GPIO_14
UART1_RXD
L33
L2
GPIO_15
UART1_TXD
L32
GPIO_16
AH2
GPIO_19
AH3
GPIO_20
45_I2S_AP_TO_CODEC_MCLK_R 45_I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_AP_OWL_TO_CODEC_XSP_LRCLK I2S_CODEC_TO_AP_OWL_XSP_DIN I2S_AP_TO_CODEC_XSP_DOUT
2
1% 1/32W MF 01005
24
9
OUT
24
9
OUT
24
9
IN
NC
AP_TO_VIBE_TRIG
OUT
32
NC
OUT
UART_BT_TO_AP_CTS_L UART_AP_TO_BT_RTS_L UART_BT_TO_AP_RXD UART_AP_TO_BT_TXD
UART2_CTS* AT23 UART2_RTS* AR20 UART2_RXD AP23 UART2_TXD AP22
IN
30
OUT
30
IN
UART_STOCKHOLM_TO_AP_CTS_L UART_AP_TO_STOCKHOLM_RTS_L UART_STOCKHOLM_TO_AP_RXD UART_AP_TO_STOCKHOLM_TXD
1
33
IN
33
OUT
33
IN
33
OUT
33
IN
33
OUT
33
OUT
33
OUT
33
IN OUT
25
24
OUT
25
24
OUT
ROOM=SOC
25
24
IN
24
OUT
25
20
IN
33
OUT
33
OUT
33
IN
45_I2S_AP_TO_SPEAKERAMP_MCLK_R 45_I2S_AP_TO_CODEC_ASP_BCLK I2S_AP_TO_CODEC_ASP_LRCLK I2S_CODEC_TO_AP_ASP_DIN I2S_AP_TO_CODEC_ASP_DOUT
AJ3 GPIO_24 AJ4 GPIO_25
UART3_CTS*
N4
UART3_RTS*
P3
UART3_RXD
R3
UART3_TXD
R2
UART_BB_TO_AP_CTS_L UART_AP_TO_BB_RTS_L UART_BB_TO_AP_RXD UART_AP_TO_BB_TXD
AK1
GPIO_26
AP3
GPIO_27
UART4_CTS*
J33
AN4
GPIO_28
UART4_RTS*
J34
AP4
GPIO_29
UART4_RXD
J35
UART4_TXD
K33
UART_WLAN_TO_AP_CTS_L UART_AP_TO_WLAN_RTS_L UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_TXD
UART5_RTXD
T32
SWI_AP_BI_TIGRIS
AP5
GPIO_30
AR2
GPIO_31
AR3
GPIO_32
AR4
GPIO_33
AP6
GPIO_34
AT3
GPIO_35
AT4 AR6
30
33
OUT
16
IN
IN
33
OUT
33
IN
33
OUT
33
24
OUT
24
OUT
IN
33
OUT
33
IN
33
OUT
33
BI
AP7
GPIO_38
UART_ACCESSORY_TO_AP_RXD UART_AP_TO_ACCESSORY_TXD
UART6_RXD AF1 UART6_TXD AE2
AT5
GPIO_39
AP8
GPIO_40
UART7_RXD
J31
AP9
GPIO_41
UART7_TXD
J32
AP10
GPIO_42
30
OUT
30
SPI_AP_TO_TOUCH_SCLK
1 01005
0.00
IN
3
IN
24
8
IN
8
OUT
24
8
OUT
29
SPI_AP_TO_MESA_SCLK
1 01005
0.00 0%
OUT
8 8
IN OUT
2
0% 1/32W
MF
R0930
B OUT
IN
3
24
29
ROOM=SOC
27
3
24
NC OUT
I2S0_DIN
M33
I2S0_DOUT
M4
I2S1_MCK
M3
I2S1_BCLK
P1
I2S1_LRCK
N3
I2S1_DIN
L4
I2S1_DOUT
U32
I2S2_MCK
V33
I2S2_BCLK
U33
I2S2_LRCK
I2S3_MCK
AM4
I2S3_BCLK
AN2
I2S3_LRCK
AP1
I2S3_DIN
BOARD_ID2 BOARD_ID1 BOARD_ID0 NC
ROOM=SOC
29
I2S0_LRCK
AM3
AN1
I2S3_DOUT
R32
I2S4_MCK
R31
I2S4_BCLK
V32
I2S4_LRCK
P31
I2S4_DIN
P32
I2S4_DOUT
TRISTAR_TO_AP_INT 45_I2S_AP_TO_CODEC_MSP_BCLK I2S_AP_TO_CODEC_MSP_LRCLK I2S_CODEC_TO_AP_MSP_DIN I2S_AP_TO_CODEC_MSP_DOUT
9 17
IN
I2S0_BCLK
N35
OMIT_TABLE
U0600 FCMSP SC58980X0B-A040 SYM 6 OF 14
MAUI-2GB-25NM-DDR-H ROOM=SOC
CRITICAL
I2C0_SCL E31 I2C0_SDA D35
I2C0_AP_SCL I2C0_AP_SDA
OUT
I2C1_SCL AH1 I2C1_SDA AG4
I2C1_AP_SCL I2C1_AP_SDA
OUT
I2C2_SCL L31 I2C2_SDA M32
I2C2_AP_SCL I2C2_AP_SDA
OUT
PP1V8
R0906
2.2K 5% 1/32W MF 01005
SEP_SPI0_SCLK W3 NC SEP_SPI0_MISO AA4 NC
SEP_SPI0_MOSI U2
ROOM=SOC
29
27 27
OUT
IN OUT
2 1/32W MF
27
IN
AD4
SPI0_MISO
AC3
SPI0_MOSI
AB2
SPI0_SCLK
AD3
SPI0_SSIN
P33
SPI1_MISO
V35
SPI1_MOSI
N32
SPI1_SCLK
M31
SPI1_SSIN
E33
SPI2_MISO
SPI_CODEC_TO_AP_MISO SPI_AP_TO_CODEC_MOSI SPI_AP_TO_CODEC_SCLK SPI_AP_TO_CODEC_CS_L SPI_TOUCH_TO_AP_MISO SPI_AP_TO_TOUCH_MOSI SPI_AP_TO_TOUCH_SCLK_R SPI_AP_TO_TOUCH_CS_L
14
13
12
9
8
7
6
5
3 29
1 A
A
20% 2 6.3V X5R 0201-1
R0910
10K
IN
5% 1/32W MF 01005 2
5% 1/32W MF 01005 2
ROOM=SOC
BUTTON_MENU_KEY_L
WLCSP S S V
15
6
7
17
8
9 12
13
14
20
21
28
ROOM=SOC
8 12
8 12
SPI2_MOSI F34 SPI2_SCLK F31 SPI2_SSIN
AA2
SPI3_MISO
Y2
SPI3_MOSI
AA3
SPI3_SCLK
AC4
SPI3_SSIN
MU _T O_ AP _S OC HO T0 _L
AP_TO_PMU_SOCHOT1_L
CPU_ACTIVE_STATUS
H31
CLK32K_OUT
H34
IN
16
OUT
16
NC
45_AP_TO_TOUCH_CLK32K_RESET_L
NAND_SYS_CLK AM24 AP_TO_NAND_SYS_CLK_R
14
15
16
OUT
14
15
16
B
29
R0945 0.00
2
AP_TO_NAND_SYS_CLK
OUT
13
0% 1/32W MF 01005 ROOM=SOC
17
24
26
30
SPI PROBE POINTS
33
17
24
26
30
33
U0901
74LVC1G34GX SOT1226 4
2 P 1/32W 01005
SOCHOT1 AM2
ROOM=SOC
BUTTON_MENU_KEY_BUFF_L
26
16
8
I2C0_AP_SCL
26
16
8
I2C0_AP_SDA
1
PP
8 24
PP09010
PP0900 PP0901
P2MM-NSM SM 1 SPI_AP_TO_CODEC_SCLK PP
SM
OUT
8 24
PP0909
P2MM-NSM SM 1 SPI_AP_TO_CODEC_MOSI 8 29 PP ROOM=SOC
P3MM-NSM SM 1 PP
PP0908
P2MM-NSM SM 1 SPI_CODEC_TO_AP_MISO 8 29 PP ROOM=SOC
PP0907
P2MM-NSM SM 1 SPI_AP_TO_TOUCH_MOSI PP
ROOM=SOC
5
0.00
8 24
P3MM-NSM
9 16
ROOM=SOC
C N
3
ROOM=SOC
1
NC
M34128-FCS6_P/T SCL
3 5 29
R0940 1 0% MF
ROOM=SOC
2
U0900
B1
8 12
5% 1/32W MF 2 01005 ROOM=SOC
ROOM=SOC
P MU _T O_ AP _S OC HO T0 _R _L
SOCHOT0 AM1
I2C PROBE POINTS
C C V
ROOM=SOC
8
10K
ROOM=SOC
1% 1/32W MF 01005
27
8
BI
R0909
10K
PP0906
PP1V8_SDRAM
CRITICAL
OUT
PP1V8
R0950
ROOM=SOC
1.0UF
28
NC
ROOM=SOC
PP1V8
C0900
BI
30
8 20
5% 1/32W MF 01005
P2MM-NSM SM 1 SPI_TOUCH_TO_AP_MISO PP
392K
1
21
PP1V8_ALWAYS
BUTTON_RINGER_A
128kbit APN:335S0946 20
20
30
E35
SPI_MESA_TO_AP_MISO SPI_AP_TO_MESA_MOSI SPI_AP_TO_MESA_SCLK_R MESA_TO_AP_INT
PP1V8_SDRAM
21
14
25
8 20
SEP_GPIO1 AB4 NC
5% 1/32W MF 01005
28
13
26
25
C
Y3
100K
8
9 12
I2C_SEP_TO_EEPROM_SCL I2C_SEP_BI_EEPROM_SDA
R0951
16
8
8 17
26
NC
BUTTON PULL-UP RESISTORS AND BUFFERS
32
7
8 16
8 17
2.2K
1
ANTI-ROLLBACK EEPROM
6
BI
8 16
ROOM=SOC
SEP_I2C_SCL V3 SEP_I2C_SDA Y4
SEP_GPIO0
3 5 29
BI
R0907
R0941
R0960
NC
IN OUT
I2S0_MCK
N34
NOSTUFF
GPIO_36 GPIO_37
24 24
P34 R34
T33 I2S2_DIN V34 I2S2_DOUT
ALS_TO_AP_INT_L 45_I2S_AP_TO_BB_BCLK I2S_AP_TO_BB_LRCLK I2S_BB_TO_AP_DIN I2S_AP_TO_BB_DOUT
AH4
GPIO_21 AJ1 GPIO_22 AJ2 GPIO_23
NC
45_I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_LRCLK I2S_BT_TO_AP_DIN I2S_AP_TO_BT_DOUT
2
1% 1/32W MF 01005
33
OUT
33.2
33
33
R0922
UART_AP_DEBUG_RXD UART_AP_DEBUG_TXD
UART0_RXD AE3 UART0_TXD AE4
K3
GPIO_18
33.2
SC58980X0B-A040
K31
GPIO_17
45_I2S_AP_TO_SPEAKERAMP_MCLK
24
UART1_CTS*
L3
OUT
ROOM=SOC
J3 GPIO_12 K2 GPIO_13
N1
25
1
FCMSP
J1 GPIO_9 H4
45_I2S_AP_TO_CODEC_MCLK
MAUI-2GB-25NM-DDR-H
GPIO_4
G3
OUT
U0600
GPIO_1
D1 E2
AP_TO_SPEAKERAMP_RESET_L AP_TO_BT_WAKE AP_TO_BB_RESET_L PCIE_AP_TO_WLAN_DEV_WAKE AP_TO_LED_DRIVER_EN AP_TO_TOUCH_RESET_L AP_TO_LCM_RESET_L PMU_TO_AP_IRQ_L
OMIT_TABLE
24
SDA
A2
I2C_SEP_BI_EEPROM_SDA I2C_SEP_TO_EEPROM_SCL
30
25
17
8
I2C1_AP_SCL
30
25
17
8
I2C1_AP_SDA
8
BI IN
PP1V8_ALWAYS
8
8 12
15
32
IN
BUTTON_HOLD_KEY_L
PP
PP0902 PP0903
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SOC:SERIAL & GPIO
SM
DRAWING NUMBER
ROOM=SOC
392K
1% 1/32W MF 2 01005
PP
1
P3MM-NSM
R0952
2 B
P3MM-NSM SM 1
17
74LVC1G34GX SOT1226 4
2 C N
Apple Inc.
ROOM=SOC
U0902 5
20
BUTTON_HOLD_KEY_BUFF_L
OUT
9 16
20
8 8
I2C2_AP_SCL I2C2_AP_SDA
P3MM-NSM SM 1 PP
1
PP
SM
PP0904 PP0905
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
SOC - OWL
1
POWER STATE CONTROL PROBE POINTS ROOM=SOC
OWL_TO_PMU_ACTIVE_REQUEST
P3MM-NSM SM 1
5
PMU_TO_OWL_ACTIVE_READY
P3MM-NSM SM 1
16
9
OWL_TO_PMU_SLEEP1_REQUEST
P3MM-NSM SM 1
11
9
PMU_TO_OWL_SLEEP1_READY
P3MM-NSM SM 1
16
9
PP
PP1020
ROOM=SOC
30
D
26
16
9
PP
PP1021
D
ROOM=SOC
PP
PP1022
ROOM=SOC
16
PP
PP1023
OMIT_TABLE
U0600 MAUI-2GB-25NM-DDR-H FCMSP SC58980X0B-A040 16 16
C
11
9 9
19
IN 9
19 19 19 19
9 19
33
29
28
OWL_TO_PMU_SLEEP1_REQUEST PMU_TO_OWL_SLEEP1_READY
OUT
8
SPI_OWL_TO_COMPASS_CS_L COMPASS_TO_OWL_INT IN ACCEL_TO_OWL_INT2_R IN ACCEL_GYRO_TO_OWL_INT1 IN SPI_OWL_TO_ACCEL_GYRO_CS_L OUT ACCEL_GYRO_TO_OWL_INT2 IN OUT
IN 9
AD30
OWL_DDR_REQ
AB33
OWL_DDR_RESET*
AF35
OWL_FUNC_0
AH32 AG32
19
9
OUT
19
IN
9
IN
19 19
9
OUT
9
OUT
33
IN
33
OUT
33
OUT
33
OUT
OWL_FUNC_3
AG30
OWL_FUNC_4
24
24
PP1005 P2MM-NSM
PP1006 P2MM-NSM
PP1007 P2MM-NSM
PP1008
A
P2MM-NSM
PP1009 P2MM-NSM
PP1010 P2MM-NSM
SM PP
SM PP
1
SPI_OWL_TO_IMU_MOSI
9 19
1
SPI_IMU_TO_OWL_MISO
9 19
1
SPI_OWL_TO_IMU_SCLK
9 19
PMU_TO_OWL_CLK32K
OWL_FUNC_7
AF31
OWL_FUNC_8
AF32
OWL_FUNC_9
AH31
OWL_I2CM_SCL
SWD_TMS2
U31
AH33
OWL_I2CM_SDA
SWD_TMS3
T31
SPI_IMU_TO_OWL_MISO SPI_OWL_TO_IMU_MOSI SPI_OWL_TO_IMU_SCLK
AK31
OWL_SPI_MISO
HOLD_KEY*
U3
SKEY*
W4
UART_BB_TO_OWL_RXD UART_OWL_TO_BB_TXD
AJ32 OWL_UART0_RXD AK33 OWL_UART0_TXD
OWL_TO_WLAN_CONTEXT_B OWL_TO_WLAN_CONTEXT_A
AH30
SPI_OWL_TO_DISCRETE_ACCEL_CS_L ACCEL_TO_OWL_INT1_R
8
OUT IN
45_I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_CODEC_TO_AP_OWL_XSP_DIN
8
OUT
I2S_AP_OWL_TO_CODEC_XSP_LRCLK
8
RT_CLK32768 AD31
AF34
OWL_SWD_TCK_OUT
AE33
OWL_SWD_TMS0
AD35
OWL_SWD_TMS1
AC33
AK32
OWL_SPI_MOSI AL33 OWL_SPI_SCLK
MENU_KEY*
NC
V4
3 5
16
1 OUT
PMGR_SCLK0 AK4 AL3
PMGR_SSCLK1
OWL_FUNC_6
NC
IN
OWL_TO_PMU_ACTIVE_REQUEST PMU_TO_OWL_ACTIVE_READY DWI_PMU_TO_PMGR_MISO 45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI 45_DWI_PMGR_TO_PMU_SCLK 45_DWI_PMGR_TO_BACKLIGHT_SCLK
PMGR_MISO AL2 PMGR_MOSI AL1
CRITICAL
OWL_FUNC_5
LCM_TO_AP_HIFA_BSYNC OWL_TO_PMU_SHDN_BI_TIGRIS_SWI
PMU_TO_SYSTEM_COLD_RESET_L
W33
AWAKE_REQ AA33 AWAKE_RESET* AD32
AF33
9 16
IN
5 9
IN
16
16
26
30
1
SM PP
SM PP
OUT OUT
SWD_AP_PERIPHERAL_SWCLK
16
OUT
26
IN
16
OUT
13
1
SM PP
PP1003
C
P2MM-NSM
PP1002 P2MM-NSM 16
PP1V8
26
PP1004
3
5
6
7
8 1 2 13
14
20
21
28
29
R1002
P2MM-NSM
1.00K 5% 1/32W MF 01005
33
ROOM=SOC
SWD_AP_BI_BB_SWDIO SWD_AP_BI_NAND_SWDIO
BI
33
BUTTON_HOLD_KEY_BUFF_L
IN
8 16
BUTTON_MENU_KEY_BUFF_L
IN
8 16
BI
13
NC
NC
OWL_UART1_RXD
AJ31 OWL_UART1_TXD
NC
B
CFSB_AOP
ROOM=SOC
AE34
NC
24
OWL_FUNC_2
AG31
NC 19
OWL_FUNC_1
SYM 7 OF 14
AJ34 OWL_UART2_RXD AJ33 OWL_UART2_TXD
AD34
OWL_I2S_BCLK
AA34
OWL_I2S_DIN
AE32
OWL_I2S_MCK
AE31
OWL_I2S_LRCK
NC
B
OWL SYSTEM SHUTDOWN OPTION NOSTUFF
SM PP
SM PP
SM PP
SM PP
1
SPI_OWL_TO_DISCRETE_ACCEL_CS_L
R1020
9 19
10
1 2 1/32W MF 5% 01005 ROOM=SOC 9
OWL_TO_PMU_SHDN_BI_TIGRIS_SWI
SWI_AP_BI_TIGRIS
BI
8 17
NOSTUFF
R1021 1
1
SPI_OWL_TO_ACCEL_GYRO_CS_L
SPI_OWL_TO_COMPASS_CS_L
10
9 19
1 2 1/32W MF 5% 01005 ROOM=SOC
OWL_TO_PMU_SHDN
A
SYNC_MASTER=N/A OUT
16
SYNC_DATE=N/A
PAGE TITLE
SOC:OWL DRAWING NUMBER
9 19
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
U0600
10UF
D
20% 6.3V 2 CERM-X5R 0402-9
C1101
1
1
10UF
1
2.2UF
20% 6.3V 2 CERM-X5R 0402-9
ROOM=SOC
C1103
2
ROOM=SOC
C1104 2.2UF
20% 6.3V X5R-CERM 0201
2.2UF
20% 6.3V X5R-CERM 0201
2
ROOM=SOC
SHORT-10L-0.1MM-SM 1 2 45_BUCK1_PP_GPU_FB
20% 6.3V X5R-CERM 0201
2
ROOM=SOC
OUT
14
16
ROOM=SOC
ROOM=SOC
TP1120 0.50MM SM
PP
1
PP_GPU
10
14
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1106
C1107
C1108
C1109
C1110
C1111
4.3UF 20% 4V CERM 0402
1
3
4.3UF 1
20% 4V CERM 0402
2 4
4.3UF 3
20% 4V CERM 0402
1
2 4
4.3UF
3
1
2 4
20% 4V CERM 0402
4.3UF 3
2 4
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1112
C1113
C1114
C1115
1
20% 4V CERM 0402
1UF 3
1
2 4
1UF
20% 4V CERM 0402
3
1
20% 4V CERM 0402
2 4
3
2 4
3
20% 4V CERM 0402
AA11
3
C1116
C1117
0.47UF
0.47UF
1
20% 6.3V CERM 0402
2 4
3
1
20% 6.3V CERM 0402
2 4
3
2 4
C
14
10
PP_CPU 0.625V @TBDA MAX 0.9V @10.5A MAX 1.0V @12.5A MAX
1
C1120 10UF
20% 6.3V 2 CERM-X5R 0402-9
1
C1121
1
10UF
1
20% 6.3V X5R-CERM 0201
20% 6.3V 2 X5R-CERM 0201
2.2UF
20% 6.3V 2 CERM-X5R 0402-9
ROOM=SOC
C1122
2
ROOM=SOC
C1123
C1125
1
2.2UF
ROOM=SOC
2.2UF
20% 6.3V X5R-CERM 0201
2
ROOM=SOC
ROOM=SOC
TP1100 0.50MM SM 1 PP
PP_CPU
10
14
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1126
C1127
C1128
C1129
C1130
C1131
4.3UF 1
20% 4V CERM 0402
3
4.3UF 1
2 4
20% 4V CERM 0402
4.3UF 3
1
2 4
20% 4V CERM 0402
4.3UF
3
1
2 4
20% 4V CERM 0402
4.3UF 3
1
2 4
20% 4V CERM 0402
4.3UF
3
1
20% 4V CERM 0402
2 4
T12
MAUI-2GB-25NM-DDR-H
AB6
FCMSP
M6
SC58980X0B-A040
U9
AB12
SYM 8 OF 14
V12 W9
ROOM=SOC
CRITICAL
AD6
ROOM=SOC
W13
AB10 AC13
2 4
ROOM=SOC
1UF
20% 4V CERM 0402 1
1
G15
U0600
AA9
4.3UF
3
2 4
ROOM=SOC
1UF
20% 4V CERM 0402
1
OMIT_TABLE
AA7
M12
AD8
M18
AD10
N15
AD12
N21
AE7
N9
AE9
F10
AE11
H14
AE13
H16
AF8
H20
AF10
H22
AF12
H6
AH6
H8
AH8
J11
AH10
J13
AH12
J17
VDD_CPU
AJ5
J19
AJ7
J23
AJ9
J7
AJ11
K10
AJ13
K14
AK6
K16
AK10
K20
AL7
K22
AL9
K6
AL11
K8
AM6
L11
AM8
L13
AM10
L15
AN7
L17
AN11
L19
AL13
VDD_GPU
Y8 3
2 4
L21 M24
Y10
L7
Y12
L9
AM12
F8 M8 N11 N13 N17
B
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1132
C1133
C1134
C1135
C1136
C1137
4.3UF 1
20% 4V CERM 0402
3
4.3UF 1
2 4
20% 4V CERM 0402
1UF 3
1
2 4
20% 4V CERM 0402
1UF
20% 4V CERM 0402 1
3
2 4
1UF 3
2 4
1
20% 4V CERM 0402
N19 P10
1UF
G11
20% 4V CERM 0402 1
3
2 4
P12 P14
3
P16 P20
2 4
R15 R19 G13 R9 ROOM=SOC
ROOM=SOC
ROOM=SOC
T10
ROOM=SOC
C1138
C1139
C1140
C1141
0.47UF
0.47UF
0.47UF
0.47UF
1
20% 6.3V CERM 0402
3
1
20% 6.3V CERM 0402
3
1
20% 6.3V CERM 0402
3
1
20% 6.3V CERM 0402
T14 T16 U11 V14
3
V16 G7
2 4
2 4
2 4
2 4
R23 G9 H10 T24
XW1100
14
OUT
45_BUCK0_PP_CPU_FB
SHORT-10L-0.1MM-SM 1
P22 W17
2
ROOM=SOC
N23 G17
A
G21
PP1100 P2MM-NSM
PP1101 P2MM-NSM
SM PP
ROOM=SOC
SM PP
AP_CPU_SENSE_P
Y6 VDD_CPU_SENSE
VDD_GPU_SENSE
AP_CPU_SENSE_N
Y7 VSS_CPU_SENSE
VSS_GPU_SENSE
14
0.825V @4.7A MAX 0.725V @TBDA MAX
C1151 10UF
20% 6.3V 2 CERM-X5R 0402-9
ROOM=SOC
XW1120
SHORT-10L-0.1MM-SM 1 2 45_BUCK2_PP_SOC_FB
ROOM=SOC
OUT
VDD_SOC
G29
AB26
AA27
AC17
F17
AC19
F20
AC23
L29
AD16
N29
AD20
V28
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1153
C1154
C1155
C1156
4.3UF 1
20% 4V CERM 0402
2 4
AD22
1UF 3
1
20% 4V CERM 0402
2 4
1UF 3
1
20% 4V CERM 0402
3
2 4
3 2
4
C1157 0.47UF
20% 4V CERM 0402 1
D
ROOM=SOC
1UF
1
20% 6.3V CERM 0402
3
2 4
AD24 AD26 AE5
L22
AE15
L24
AE17
L26
AE19
L28
AE23
M1
AF14
M5
AF16
M7
AF20
M9
AF22
M11
AF24
M13
AF26
M17
AG17
M21
AG19
M23
AG23
M25
AH16
M27
AH20
M29
AH22
N6
AH26
N10
AJ15
N12
AJ17
N14
AJ19
N16
AJ23
N18
AK14 J29
G19 VDD_SOC
N22
G23
N24
AK22
N26
F6
N28
F14
N30
AL15
N33
AM5
P9
G25
P11
G27
P13
H24
P15
H26
P17
H28 VSS
J27
P19 P21
K24
P23
K26
P25
K28
P27
L27
P29
L23
P35
M26
R4
M28
B
R6
AL19
R8
N7
R10
N27
R12
P24
R14
P26
M19
P28
R18
R17
R20
R27
R22
R29
R24
T22
R26
T26
R28
T7
R30
T28
T1
U17
T2
V8
R33
V20
T9
V22
T11
V24
T13
V26
T15
W7
T17
W11
P7
Y28
T23
AJ20 VDD_SOC_SENSE AK21
C
M35
AH24
T25 T27
VSS_SOC_SENSE
T30 T35 U6
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SOC:POWER (1/3)
U10
G20
DRAWING NUMBER
U12
H19
Apple Inc.
1
051-00648 REVISION
4.0.0
R
ROOM=SOC
PP1102 P2MM-NSM
SM PP
1
AP_GPU_SENSE_N
ROOM=SOC
14
ROOM=SOC
Y24
T18 T20
1
20% 6.3V 2 CERM-X5R 0402-9
1
Y26
CRITICAL
AB24
10UF
Y22
ROOM=SOC
AB22
C1150
Y20
SYM 9 OF 14
AB20
XW1110
C1105
1
Y16
SC58980X0B-A040
AB16
C1100
Y14
FCMSP
AB14
1
W23
MAUI-2GB-25NM-DDR-H
AA23
PP_GPU 0.8V @10.5A MAX
1
OMIT_TABLE
AA17 AA19
10
1 PP_SOC
SOC - CPU, GPU & SOC RAILS 14
2
AP_SOC_SENSE_N
1
SM PP
ROOM=SOC
PP1104 P2MM-NSM
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
SOC - POWER SUPPLIES DDR IMPEDANCE CONTROL 1.06 - 1.17V @635mA MAX INTERNALLY SUPPLIES VDDQ
D 14
11
14
1
C1240
1
20% 6.3V 2 CERM-X5R 0402-9
2
C1241
1
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=SOC
ROOM=SOC
C1242
1
20% 6.3V X5R-CERM 0201
2
2.2UF
C1243
1
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=SOC
C1244
1
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1245
C1246
4.3UF
1UF
1
20% 4V CERM 0402
3
1
2 4
20% 4V CERM 0402
1
20% 6.3V X5R-CERM 0201
ROOM=SOC
C1247
1
1.0UF
2
2 OMIT_TABLE
A20
U0600
A22
20% 6.3V X5R
MAUI-2GB-25NM-DDR-H
B15
FCMSP
C1249
B23
SC58980X0B-A040
20% 6.3V X5R
D16
1.0UF
2
0201-1
0201-1
ROOM=SOC
ROOM=SOC
3
2 4
B25
SYM 11 OF 14
VDDIO11_DDR0
D20
ROOM=SOC
DDR0_RREF DDR1_RREF
C21 AP17
DDR2_RREF
V31
DDR3_RREF
P5
DDR0_ZQ DDR3_ZQ
B21 P2
D22
DDR0_RET*
E15
DDR1_RET*
E17
DDR2_RET*
E19
DDR3_RET*
C18
AA15
U0600
AA21 1
C1200 10UF
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1201
C1202
C1203
4.3UF
20% 2 6.3V CERM-X5R 0402-9 ROOM=SOC
1
20% 4V CERM 0402
1UF
3
20% 4V CERM 0402 1
0.47UF 3
1
20% 6.3V CERM 0402
MAUI-2GB-25NM-DDR-H FCMSP SC58980X0B-A040
AA25 AB18
2 4
2
4
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1220
C1221
C1222
AG9
0.47UF
CRITICAL
1
20% 6.3V CERM 0402
3
1UF
20% 4V CERM 0402 1
1
20% 4V CERM 0402
2
4
2 4
H18 R21
AG15
U15
AG21
J15
AH25
J21
ROOM=SOC
ROOM=SOC
ROOM=SOC
AH14
J9
C1224
C1225
C1226
AH18
K12
0.47UF
AJ21 F12
M14
G10
M16
V18
M20 P18
J25
R11
L25
R13
14
AM14
1
R1205
240 2
240
1% 1/32W MF 01005
ROOM=SOC
1% 1/32W MF 01005
2
ROOM=SOC
IN
9 16
FL1280
100OHM-25%-0.12A
1.1V @7mA MAX 45_PP1V1_DDR_PLL
1
PP1V1
2
11
14
01005
1
ROOM=SOC
C1280 0.22UF 20% 6.3V X5R 01005-1
ROOM=SOC
C
VDDIO11_DDR1
AM18
C1223
D19
AM20
AN17
AR15
20% 6.3V X5R-CERM 0201
VDDIO11_RET_DDR
AN13
W31
PP1V1_SDRAM
12
14
15
1.06 - 1.17V
T4
AN15
ROOM=SOC
V10
R7
M22
DDR0_SYS_ALIVE C19 DDR1_SYS_ALIVE AP16
V29
PP_GPU_SRAM
14
SYSTEM_ALIVE
IN
13
16
17
DDR2_SYS_ALIVE W32 T3 DDR3_SYS_ALIVE
Y29 Y35 AB35
1
20% 6.3V CERM 0402
3
1UF
20% 4V CERM 0402 1
1
3
1
20% 4V CERM 0402
2
3
C1227 2.2UF
4.3UF
20% 6.3V X5R-CERM 0201
ROOM=SOC
AG34 M34
VDDIO11_DDR2
R35 T29 T34 AA30
2
4
2 4
2 4
U30 AC30
U13
R25
AA1 ROOM=SOC
C1228 4.3UF
AN6
20% 4V CERM 0402
U25 1
4
B
AC2 V6 W2 H2
3 2
M2 U5
VDDIO11_DDR3
P6
Y18
T6
F21
U1
F26
PMU_TO_OWL_SLEEP1_READY
2
AB29
M10
AL17
W25
W26
AR8
0.8V @0.5A MAX
K18 VDD_GPU_SRAM
W21
ROOM=SOC
R1204
2 4
H12
AF18
W15
1
AT16
2.2UF
2
3
AE25
VDD_FIXED
1
4.3UF 3
AE21
N25
2
ROOM=SOC
1% 1/32W MF 01005
AK12
AD18
AK16
B
AG11
2
R1203 240
1% 1/32W MF 01005
AM16
AG7
ROOM=SOC
AD14 2 4
AA13
SYM 10 OF 14
AC25
PP_CPU_SRAM
AC11
240
45_DDR0_ZQ 45_DDR3_ZQ
U4
AT13
AC7 AC9
VDD_CPU_SRAM
AC15 AC21
3
ROOM=SOC
1
R1202
45_DDR0_RREF 45_DDR1_RREF 45_DDR2_RREF 45_DDR3_RREF
P8
AR21
PP_FIXED
2
1% 1/32W MF 01005
AK18 VDDIO11_PLL_DDR
AR18
6
1
240
Y31
F19
0.8V @TBDA MAX 0.9V @TBDA MAX 1.0V @1.0A MAX
ROOM=SOC
R1201
AP15
E21
7
1
CRITICAL
AN19
OMIT_TABLE
1% 1/32W MF 01005
C1248 2.2UF
ROOM=SOC
B11
14
R1200 240
10UF
C
D
PP1V1
PP1V1 1
0.802-TBDV @1.1A MAX
11
N5
AB28
R5
AC27
W5
G18 AK20 F16 R16 T8 V7 U19 W27 U27 AF4 AF27 U21
A
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
15
0.756-TBDV @44mA MAX PP0V8_OWL 1
C1250 1.0UF
20% 2 6.3V X5R 0201-1
ROOM=SOC
SOC:POWER (2/3)
AH29 AD29
DRAWING NUMBER
VDD_LOW
Apple Inc.
AF29
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
OMIT_TABLE
A1
U0600
A2
MAUI-2GB-25NM-DDR-H
A11
FCMSP
A16
SC58980X0B-A040
A21
AN18
AG1
AN29
OMIT_TABLE
E22
SYM 14 OF 14
AP2
A34
AG10
AP20
E32
A35
AG14
AP25
F4
AA6
AG16
AP26
F5
E24
ROOM=SOC
E26
CRITICAL
E29 33
30
26
24
17
16
15
14
1.70-1.95V @100mA(TBD) PP1V8_SDRAM
8
AA8
AG18
AP27
F7
AG20
AP30
F9
AG22
AP31
F11
AA14
AG24
AP32
F13
AP33
F15
AR1
F18
1.06-1.17V @1.3A(TBD) MAX
PP1V1_SDRAM
AG33
AR5
D18
AA22
AG35
AR9
F23
AA24
AH5
AR14
E30
AA26
AH7
AR16
F25
N8
C1300
1
20% 6.3V X5R-CERM 0201
2
2.2UF
2
14
11
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=SOC
15
C1301
1
C1302 2.2UF
ROOM=SOC
20% 6.3V X5R-CERM 0201
ROOM=SOC
1
C1310
1
10UF
C1312
1
2.2UF
20% 2 6.3V CERM-X5R 0402-9
20% 6.3V X5R-CERM 0201
C1313
1
2.2UF
C1314 2.2UF
20% 6.3V X5R-CERM 0201
20% 6.3V X5R-CERM 0201
AR35
F29
AR17
AB1
AH15
AT1
G4
AR22
C17
AH17
AT2
G5
AR7
AB3
AH19
AT6
G6
2
ROOM=SOC
2
ROOM=SOC
G8
2
ROOM=SOC
ROOM=SOC
ROOM=SOC
ROOM=SOC
C1316
C1317
1UF
1UF
AT15
G12
AB9
AH27
AT14
G14
AB11
AJ6
AT17
G16
AB13
AJ8
AT18
E6
AB15
AJ10
AT21
G22
AB17
AJ12
AT25
G24
U34
AB19
AJ14
AT34
G26
V2
AB21
AJ16
AT35
G28
W35
AB23
AJ18
B1
G33
B2
H1
1
3
20% 4V CERM 0402
1
2 4
21
20
14
13
12
9
8
7
6
5
3 29
3
2 4
PP1V8
H7
B20
H9
AK24
B22
H11
AC6
AJ28
B24
H13
AC8
AK2
B27
H15
AC10
AK3
B34
H17
K5
AC12
AK5
B35
E28
AN9
AK7
C2
H21
AA5
AC16
AK9
C3
H23
AC5
AC18
AK11
C4
H25
AG5
AC20
AK13
C5
H27
AC22
AK15
C6
H29
AC24
B28
C7
J2
C1320
1
20% 6.3V 2 CERM-X5R 0402-9
2
1
10UF
ROOM=SOC
19
14
C1321
1
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=SOC
C1322
1
20% 6.3V X5R-CERM 0201
2
2.2UF
C1323 2.2UF
ROOM=SOC
20% 6.3V X5R-CERM 0201
V27 W30 W1 W6
ROOM=SOC
W12 W14 W16
AM23
PP1V8_IMU_OWL
AE28
M15
C9
J6
AC28
AP28
C10
J30
AC34
AK26
C11
J8
AC35
AK30
C12
J10
AD5
AK34
C13
J12
AD7
AK29
C14
J14
AD9
AL6
C20
J16
AD11
AL8
C22
J18
AD15
AL10
C23
J20
AD17
AL12
C24
J22
N20
7
15
6
5
8
3 29
PP1V8_ALWAYS
1.62-1.98V @1mA
MAX
W22
1
C1330 2.2UF
2
20% 6.3V X5R-CERM 0201
ROOM=SOC
W24 W28 W29
VDDIO18_GRP2
W34 Y1 Y9 Y11
VDDIO18_GRP3
Y13 Y15 Y17
VDDIO18_GRP4 VDDIO18_GRP10
Y5 VDDIO18_GRP11
PP1V8 VDD18_FMON :1.62-1.98V @1mA MAX VDD18_UVD :1.62-1.98V @5mA MAX VDD18_AMUX :1.62-1.98V @1mA MAX VDD18_TSADC:1.645-1.89V @2mA MAX
W20
VSS
AL5
AG28 17
W18
VDDIO18_GRP1
H5
VDDIO18_GRP10:1.62-1.98V @8mA MAX VDDIO18_LPOSC:1.62-1.98V @1mA MAX
C
W10
P30
J5
8
V25
N31
C8
9
V23
K30 M30
AK17
12
V21
H30
B16
AG12
13
V19
F30
AJ22
14
V17
R1
AC1
20
V15
VDD2
N2
AB30
21
V13
L34
AB27
28
V11
G2
1.62-1.98V @41mA MAX 28
V9
B26
AT9
20% 4V CERM 0402
U29
B10
AH23
T5
V5
AR13
AB7
AC26
V1
AH34
AH13
VSS
U35
AA29
AD2
AA35
VSS
U28
AB34
F28
VSS
U26
A23
F27
VSS
U24
CRITICAL
A15
AR34
AC14
U22
SC58980X0B-A040 ROOM=SOC
G1
AR25
W8
U18
SYM 12 OF 14
L35
AH11
AB25
VDD1
AT7
AH9
AT8
U16
FCMSP
AH35 AT22
U14
U0600 MAUI-2GB-25NM-DDR-H
AD1
AA28
AH21
OMIT_TABLE
A10 A26
AA12
AA20
D
MAX
1
AA10
AB5
1
E20
AP14
AG29
2
SOC - POWER SUPPLIES
E18
SC58980X0B-A040
AP13
U7
3
E16
FCMSP
AN33
4
E12
U0600 MAUI-2GB-25NM-DDR-H
AG8
AA18
A
AN14
AF30
AG6
CRITICAL
A27
AA16
B
AN12
AF25
5
AG3
ROOM=SOC
A25
C
AF23
AG2
SYM 13 OF 14
A24
D
6
(OWL) (AON)
Y19 Y21 Y23 Y25
AG26
VDD18_LPOSC
AM22
VDD18_FMON
AD13 VDD18_UVD AN24 VDD18_AMUX AG13
Y27 Y34 AC29 AD28 AE27
AK8
AG27
AB8 VDD18_TSADC
B
AJ30 AJ35
AD19
AF28
C25
J24
U23
AD21
AL14
C26
J26
AK23
AD23
AM29
C27
J28
D31
AD25
AL16
C28
K7
G30
AD27
AR27
C29
K9
L30
AD33
AL18
C30
K11
P4
AE6
Y30
C31
K13
AE8
AL20
C32
K15
V30
AE10
AL25
C33
K17
A28
AE12
AL28
D3
K19
AL32
AE14
AL30
D4
K21
T21
AE16
AL31
D5
K23
AE18
AM7
D6
K25
AE20
AM9
D11
K27
AE22
AM11
D17
K29
AE24
AM13
D21
K34
AE26
AM15
D23
K35
AE29
AM17
D26
L1
AE30
AM19
D27
L5
AE35
AM21
D28
L6
AF5
AM33
D29
K4
AF7
AM34
D30
L8
AF9
AM35
E1
L10
AF11
AN3
E3
L12
AF15
AN5
E4
L14
SYNC_MASTER=N/A
AF17
AN16
E5
L16
PAGE TITLE
AF19
AN8
D7
L18
AF21
AN10
E9
L20
AK19 AT27
U8
A
SYNC_DATE=N/A
SOC:POWER (3/3) DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
S3E NAND R1530 28
21
20
14
13
12
9
8
7
6
5
3 29
PP1V8
1
24.9
PP1V8_NAND_AVDD
2
1% 1/32W MF 01005
D
1
C1530
1
20% 6.3V X5R-CERM 0201
2
2 13
1
C1520
1
20% 6.3V X5R 0402-1
2
15UF
2
1
20% 6.3V X5R 0402-1
2 CERM-X5R
15UF
ROOM=NAND
C1522
C1521
10UF
1
2
0402-9
ROOM=NAND
0.1UF
20% 6.3V X5R-CERM 01005
ROOM=NAND
C1524
1
20% 6.3V X5R-CERM 01005
2
0.1UF
20% 6.3V
ROOM=NAND
NAND_AGND
ROOM=NAND
C1525
1
5% 16V NP0-C0G 01005
2
100PF
ROOM=NAND
D
C1531
2.2UF
ROOM=NAND
C1526
1
5% 16V NP0-C0G 01005
2
C1523
100PF
ROOM=NAND
15UF 20% 6.3V X5R 0402-1
ROOM=NAND
ROOM=NAND
PP3V0_NAND 1 1
C1527
1
20% 6.3V X5R-CERM 0201
2
2.2UF
2
ROOM=NAND
C1500
1
15UF
C1528 2.2UF
2
20% 6.3V X5R-CERM 0201
20% 6.3V X5R 0402-1
1
20% 6.3V X5R 0402-1
2
15UF
C
2
C1540
1
20% 6.3V X5R 0402-1
2
15UF
ROOM=NAND
1
C1541
C1542 10UF
15UF
ROOM=NAND
C1504
1
20% 6.3V X5R 0402-1
2
20% 6.3V 2 CERM-X5R 0402-9
20% 6.3V X5R 0402-1
ROOM=NAND
ROOM=NAND
1
C1543
28
21
20
14
13
12
9
8
7
6
5
3 29
PP1V8
1
20% 6.3V X5R 0402-1
2
ROOM=NAND
1
C1560
1
1
ROOM=NAND
10% 2 6.3V X5R 01005
ROOM=NAND
1
C1561
2
1
ROOM=NAND
C1550
1
20% 6.3V X5R-CERM 01005
2
0.1UF
C1551
1
20% 6.3V X5R-CERM 01005
10% 6.3V 2 X5R-CERM 01005
0.1UF
ROOM=NAND
ROOM=NAND
C1554 1000PF
4 5 M J 1 K L C _ D D V A _ I C P
ROOM=NAND
R1560 1% 1/32W MF 01005
ROOM=NAND
2
8
IN
13
6
IN
13
6
R1561 1% 1/32W MF 01005
IN
6
OUT
13
6
IN
13
6
IN
13
6
IN
13
6
IN
ROOM=NAND
NOSTUFF 1
R1501 3.01K
2
B
2 K L C _ D D V A _ I C P
7 J
4 6 K K
H _ D D V A _ I C P
1 D D V _ I C P
2 D D V _ I C P
3 C 1 D D V A
5 E
3 7 2 1 9 3 7 A A F J J R R
F E R V
15UF
2
20% 6.3V X5R 0402-1
ROOM=NAND
1% 1/20W MF 201
ROOM=NAND
6
OUT
6
OUT
6
OUT
6
OUT
5
IN
C1506
1
20% 6.3V X5R 0402-1
2
C1505 15UF
ROOM=NAND
20% 6.3V X5R 0402-1
ROOM=NAND
1
5% 16V NP0-C0G 01005
2
0 0 0 1 0 1 5 B B F F 5 A O O O O R
D D D D D D D D D D D D D D V V V V V V V
O O O O O O I I I I I I D D D D D D D D D D D D V V V V V V
C1507
1
5% 16V NP0-C0G 01005
2
100PF
C1508
1
5% 16V NP0-C0G 01005
2
100PF
ROOM=NAND
ROOM=NAND
C
C1510 100PF 5% 16V NP0-C0G 01005
ROOM=NAND
0 0 0 0 1 0 1 0 1 A A D D G G O O O O O O C C C C C C C C C C C C V V V V V V
U1500
THGBX5G7D2KLFXG
NAND_VREF
10K
0.01UF
10% 2 6.3V X5R 01005
NOSTUFF
C1509 100PF
10K
0.01UF
15
C1503
10UF
20% 6.3V 2 CERM-X5R 0402-9
ROOM=NAND
C1546 15UF
2
1
20% 6.3V X5R 0402-1
ROOM=NAND
15UF
ROOM=NAND
2 1
2
ROOM=NAND
15UF
2
C1548
C1502 15UF
20% 6.3V X5R 0402-1
2
ROOM=NAND
PP0V9_NAND 1
1
15UF
ROOM=NAND
1
15
C1501
WLGA
AP_TO_NAND_SYS_CLK 90_PCIE_AP_TO_NAND_REFCLK_P 90_PCIE_AP_TO_NAND_REFCLK_N
D2
CLK_IN
H8
PCIE_REFCLK_P
H6
PCIE_REFCLK_M
PCIE_NAND_TO_AP_CLKREQ_L
G9
PCIE_CLKREQ*
45_PCIE_NAND_RESREF
M6
PCI_RESREF
90_PCIE_AP_TO_NAND_TXD0_P 90_PCIE_AP_TO_NAND_TXD0_N
M8
PCIE_RX0_P
K8
PCIE_RX0_M
90_PCIE_AP_TO_NAND_TXD1_P 90_PCIE_AP_TO_NAND_TXD1_N
N5
PCIE_RX1_P
N3
PCIE_RX1_M
90_PCIE_NAND_TO_AP_RXD0_P 90_PCIE_NAND_TO_AP_RXD0_N
P8
PCIE_TX0_P
90_PCIE_NAND_TO_AP_RXD1_P 90_PCIE_NAND_TO_AP_RXD1_N
VER-1 BOMOPTION=OMIT_TABLE ROOM=NAND CRITICAL
EXT_D0
G3
EXT_D1
J3
EXT_D2
H2
EXT_D3
E3
EXT_D4
E7
EXT_D5
F6
EXT_D6
C7
EXT_D7
B8
EXT_NCE
PMU_TO_NAND_LOW_BATT_BOOT_L AP_TO_NAND_FW_STRAP
IN
16
IN
8
SYSTEM_ALIVE
IN
11
IN
6
NC NC
ROOM=NAND
P3MM-NSM SM 1
NC NC NC
G1
PCIE_AP_TO_NAND_RESET_L
EXT_NRE
F4
SWD_AP_BI_NAND_SWDIO_R
EXT_NWE
C5
SWD_AP_NAND_SWCLK_R
N7
PCIE_TX0_M
EXT_RNB
G5
M2
PCIE_TX1_P
EXT_CLE
H4
K2
PCIE_TX1_M
EXT_ALE
D4
NC NC
PP1520
PP
16
17
R1520 0.00
1 0% MF
SWD_AP_BI_NAND_SWDIO
2 1/32W
01005
BI
9
ROOM=NAND
R1521 1 0% MF
0.00
2
B SWD_AP_PERIPHERAL_SWCLK 1/32W
01005
IN
9 33
ROOM=NAND
1
PP
PP1521
SM
AP_TO_NAND_RESET_L NC
45_NAND_ZQ 1
P3MM-NSM
F8
RESET*
D8
TRST*
D6
ZQ A S S V
R1500
2 B
34.8
2
0.5% 1/32W MF 01005
ROOM=NAND
13
S S S S S S S S S S S S S S S S S S S S S S S S S S V V V V V V V V V V V V V 4 6 0 7 3 5 7 2 4 6 0 0 0 B B 1 G L L L P P P C 1 E E O C O O O
NAND_AGND
ROOM=NAND
PCIE RECEIVE-SIDE PROBE POINTS ROOM=NAND
13
6
90_PCIE_AP_TO_NAND_REFCLK_P
13
6
90_PCIE_AP_TO_NAND_REFCLK_N
P3MM-NSM SM 1 PP
1
PP
PP1500 PP1501
SM
P3MM-NSM
ROOM=NAND
A
A
ROOM=NAND
13
6
90_PCIE_AP_TO_NAND_TXD0_P
13
6
90_PCIE_AP_TO_NAND_TXD0_N
P3MM-NSM SM 1 PP
1
PP
PP1502 PP1503
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
NAND DRAWING NUMBER
SM
P3MM-NSM
Apple Inc.
ROOM=NAND ROOM=NAND
13
6
90_PCIE_AP_TO_NAND_TXD1_P
13
6
90_PCIE_AP_TO_NAND_TXD1_N
P3MM-NSM SM 1 PP
1
PP
PP1504 PP1505
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
ANTIGUA PMU - Buck Supplies CRITICAL
D
U2000
OMIT_TABLE
33
26
25
24
22
21
17
15
PP_VCC_MAIN
VCC_MAIN_SNS
IN
V3 VDD_MAIN_SNS R6 F10
C2085
1
1
10UF
C2086
1
10UF
C2087
C2088
1
10UF
10UF
20% 20% 20% 20% VOLTAGE=6.3V VOLTAGE=6.3V VOLTAGE=6.3V VOLTAGE=6.3V 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 0402-9 0402-9 0402-9 0402-9 ROOM=PMU
ROOM=PMU
ROOM=PMU
ROOM=PMU
L13 L5
VDD_MAIN
R8 L4
B4 C4
C2089
1
20% VOLTAGE=6.3V X5R-CERM 0201
2
2.2UF
2
C2090
1
20% VOLTAGE=6.3V X5R-CERM 0201
2
2.2UF
ROOM=PMU
C2091
1
20% VOLTAGE=6.3V X5R-CERM 0201
2
C2092
2.2UF
ROOM=PMU
2.2UF
20% VOLTAGE=6.3V X5R-CERM 0201
ROOM=PMU
BUCK0_LX0
B8
1
C2093
1
20% VOLTAGE=6.3V X5R-CERM 0201
2
2.2UF
2
C2094
1
20% VOLTAGE=6.3V X5R-CERM 0201
2
2.2UF
ROOM=PMU
C2095 20% VOLTAGE=6.3V CERM-X5R 0402-9
B12 C12
ROOM=SOC
BUCK0_LX1
A5 BUCK0_LX1
J18 J19
C2099
1
100PF
5% VOLTAGE=16V NP0-C0G 01005
2
ROOM=PMU
T19
Y12
N19
J2
BUCK0_LX2
VDD_BUCK0_23
E2
E18 E19 8
7
6
5
3
BUCK0_LX2
PP1V8
VOLTAGE=1.8V
BUCK0_LX3
BUCK0_FB
VDD_BUCK1_23
VDD_BUCK2
PIQA20161T-SM
CRITICAL
BUCK0_LX3
2 PIQA20121T-SM
C9
CRITICAL
6
K C U B
F8
VDD_BUCK4
BUCK1_LX0
C2050
1
15UF
2
20% VOLTAGE=6.3V X5R 0402-1
BUCK1_LX1
BUCK1_LX0
B17
2
ROOM=PMU
VDD_BUCK7
VDD_BUCK8
BUCK1_LX3
BUCK1_FB
21
BUCK1_LX1
1
C2060
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
2
X
11
1
20% VOLTAGE=6.3V X5R 0402-1
2
45_BUCK5_FB
ROOM=PMU
5% VOLTAGE=16V NP0-C0G 01005 ROOM=PMU
21
M13
1
C2070
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
1
2
BUCK3_SW1
BUCK2_LX0
15UF
ROOM=PMU
20% VOLTAGE=6.3V X5R 0402-1
2
X 8 A K M
C U A 1 B . 1
PP_GPU_SRAM
BUCK7_LX0
1
VOLTAGE=1.0V 0.80V/0.90V/1.0V
1
C2080
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
2
ROOM=PMU
C2081 15UF
20% VOLTAGE=6.3V X5R 0402-1
ROOM=PMU
BUCK4_SW1 BUCK2_FB
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
C2009
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
ROOM=PMU
ROOM=PMU
C2010
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
ROOM=PMU
C2011 15UF
20% VOLTAGE=6.3V X5R 0402-1
ROOM=PMU
20% VOLTAGE=6.3V X5R 0402-1
1
C2013
1
15UF
2
20% VOLTAGE=6.3V X5R 0402-1
C2014
1
15UF
2
ROOM=PMU
20% VOLTAGE=6.3V X5R 0402-1
C2015
1
15UF
2
ROOM=PMU
20% VOLTAGE=6.3V X5R 0402-1
10
VOLTAGE=0.9V 0.70V/0.80V/0.9V
C2016
C
15UF
2
ROOM=PMU
1 0 . 5 A
20% VOLTAGE=6.3V X5R 0402-1
ROOM=PMU
M A X
C2017
1
20% VOLTAGE=6.3V X5R 0402-1
2
CRITICAL
C2018
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
ROOM=PMU
C2019 15UF
ROOM=PMU
20% VOLTAGE=6.3V X5R 0402-1
2X 15UF BULK CAPS REMOVED FOR N69
B11 C11 F12
NC
ROOM=PMU
NC
4TH PHASE INDUCTOR REMOVED FOR N69
NC
45_BUCK1_PP_GPU_FB
BUCK2_LX0
1
IN
10
16
H18
PP_SOC
2 ROOM=PMU
CRITICAL
1
BUCK2_LX1
1
K18
C2022
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
2
2
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
ROOM=PMU
PIQA20121T-SM
C2023
C2024
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
ROOM=PMU
C2025
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
ROOM=PMU
10
4 . B 7 U A
VOLTAGE=0.825V 0.725V/0.825V
PIQA20161T-SM
H19
C2026
C K 2
M A X
15UF
ROOM=PMU
20% VOLTAGE=6.3V X5R 0402-1
ROOM=PMU
B
ROOM=PMU
K19
CRITICAL
J14
45_BUCK2_PP_SOC_FB
R18
BUCK3_LX0 CRITICAL
IN
10
BUCK5_LX0
BUCK3_LX0
R19
1
BUCK3_FB
V19
XW2030
SHORT-10L-0.1MM-SM 1 2
45_BUCK3_FB
8 12
15
16
17
24
26
30
1 . B 5 U A
33
VOLTAGE=1.8V
PIQA20161T-SM
ROOM=PMU
BUCK5_FB
PP1V8_SDRAM
2
1
C2030
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
2
C2031
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
ROOM=PMU
C
C2032
M K A 3 X
100PF
ROOM=PMU
5% VOLTAGE=16V NP0-C0G 01005 ROOM=PMU
V17 VBUCK3_SW BUCK6_LX0
Y17 Z17
4 . B 7 U A
L2040
V11 F1 F2
BUCK7_LX0
BUCK4_LX0
BUCK4_LX0
1
Y11
PP1V1_SDRAM
2
45_BUCK7_FB
ROOM=PMU
CRITICAL
1
0.47UH-20%-3.8A-0.048OHM
C1 BUCK7_FB
V13 BUCK4_LX1
BUCK8_LX0
1
F17 F18
PIXB2016FE-SM ROOM=PMU
F19
CRITICAL
BUCK4_FB
45_BUCK8_FB
C19 BUCK8_FB
BUCK4_LX1 CRITICAL
Z13 T9
BUCK8_LX0
XW2080
2
Y13
1
2 PIQA20121T-SM ROOM=PMU
XW2040
45_BUCK4_FB
11
12
SHORT-10L-0.1MM-SM 1 2
C2040
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
2
ROOM=PMU
C2041
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
ROOM=PMU
C2042
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
ROOM=PMU
C2043
1
20% VOLTAGE=6.3V X5R 0402-1
2
15UF
ROOM=PMU
C2044 100PF
5% VOLTAGE=16V NP0-C0G 01005
A
ROOM=PMU
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SYSTEM POWER:PMU (1/3) DRAWING NUMBER
ROOM=PMU
Apple Inc.
V15 VBUCK4_SW
Y15 Z15
C K 4
M A X
15
VOLTAGE=1.1V
PIQA20161T-SM
Z11
L2041
2
B U C K 1
1.0UH-20%-3.6A-0.060OHM
L2080
ROOM=PMU
2
ROOM=PMU
C13
K17 BUCK2_LX1
ROOM=PMU
SHORT-10L-0.1MM-SM 1
C2012
15UF
PIQA20161T-SM
XW2070
SHORT-10L-0.1MM-SM 1
2
1
1
B13
L2021
1.0UH-20%-2.25A-0.15OHM 11
2
C2008
1.0UH-20%-3.6A-0.060OHM
ROOM=PMU
ROOM=PMU
20% VOLTAGE=6.3V X5R 0402-1
15UF
ROOM=PMU
ROOM=PMU
0.47UH-20%-3.8A-0.048OHM
1.0UH-20%-2.25A-0.15OHM
C2071
2
1
ROOM=PMU
BUCK1_LX2
J5 BUCK6_FB
PIXB2016FE-SM
A
20% VOLTAGE=6.3V X5R 0402-1
C2007
PIQA20121T-SM
L2020
H1 H2
2
1 2 . B 5 U A C
ROOM=PMU
CRITICAL
L2070
PP_CPU_SRAM VOLTAGE=1.0V 0.80V/0.90V/1.0V
BUCK6_LX0
CRITICAL 45_BUCK6_FB CRITICAL
IN
2
2
U17 1
ROOM=PMU
C2062 100PF
15UF
ROOM=PMU
7 A K M C A U 1 B .
C2061
20% VOLTAGE=6.3V X5R 0402-1
1.0UH-20%-3.6A-0.060OHM
L2060 0603
0 4
1
15UF
ROOM=PMU
2
VOLTAGE=1.2V
ROOM=PMU
15UF
L2030
M19 2
1
1
ROOM=PMU
PP1V2_CAMERA
ROOM=PMU
C2005
PP_GPU
ROOM=PMU
C15
H17
M17 M18
ROOM=PMU
SHORT-10L-0.1MM-SM 1
ROOM=PMU
2
10
CRITICAL
B15
A11
1UH-20%-1.2A-0.320OHM
X
6 A K M C A U m B 0
BUCK5_LX0
1
XW2050
20% VOLTAGE=6.3V X5R 0402-1
1
20% VOLTAGE=6.3V X5R 0402-1
15UF
VDD_BUCK6
V16
15UF
C2004
PIQA20161T-SM
C17
A13 BUCK1_LX2
VOLTAGE=1.1V
C2051
2
2
0.47UH-20%-3.8A-0.048OHM
VDD_BUCK5
VOLTAGE=1.8V
PIQA20161T-SM 1
ROOM=PMU
L2012
PP1V1
Z16
IN
1
1.0UH-20%-3.6A-0.060OHM
12
VOLTAGE=0.85V
1
1
20% VOLTAGE=6.3V X5R 0402-1
15UF
1.0UH-20%-3.6A-0.060OHM
A15
11
2
C2006
ROOM=PMU
45_BUCK0_PP_CPU_FB
A17
VDD_BUCK3
U16 BUCK3_SW2 U15 BUCK3_SW3
PP_FIXED
C2003
ROOM=PMU
L2050
7
2
1
B9
1.0UH-20%-3.6A-0.060OHM 11
ROOM=PMU
15UF
2
ROOM=PMU
L2011
VOLTAGE=1.8V
CRITICAL X
1
20% VOLTAGE=6.3V X5R 0402-1
15UF
K
L2010
T U P N I
PP1V8_TOUCH PP1V8_IMU_OWL
Y16
5 A K M C U A 1 B .
C2002
0.47UH-20%-3.8A-0.048OHM
Z18
19
2
M A 0 X
1
1
C7
U18 Y18
B
2
B7
A9 VDD_BUCK1_01
V18
29
1
20% VOLTAGE=6.3V X5R 0402-1
15UF
ROOM=PMU
L2003
E17
9
C2001
L2002
J1
12
2
1.0UH-20%-3.6A-0.060OHM
E1
13
2
ROOM=PMU
A7
V12
N18
20
1
20% VOLTAGE=6.3V X5R 0402-1
CRITICAL
T18
Z12
21
2
PIQA20121T-SM
C5
N17
28
C2000 15UF
1
B5
VDD_BUCK0_01
J17
C
29
1
A12
10UF
ROOM=PMU
ROOM=PMU
CRITICAL
10
VOLTAGE=1.03V 0.625V/0.9V/1.03V
PIQA20161T-SM
C3
L2001
A16 B16
PP_CPU
2
B3
ROOM=PMU
C16
1
0.47UH-20%-3.8A-0.048OHM
A8 C8
BUCK0_LX0
A3
B S U / T A B
A4
1
1.0UH-20%-3.6A-0.060OHM
CSP SYM 2 OF 5 ROOM=PMU
D
L2000
ANTIGUA-D2255A080 15
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
ANTIGUA LDO SPECS
ANTIGUA PMU - LDOs 33
26
25
24
22
21
17
14
LDO#
PP_VCC_MAIN
D
1
C2120
1
10UF
XW2105
C2121
1
10UF
20% 6.3V 2 CERM-X5R 0402-9 ROOM=PMU
C2122 10UF
20% 6.3V 2 CERM-X5R 0402-9
20% 6.3V 2 CERM-X5R 0402-9
ROOM=PMU
ROOM=PMU
SHORT-10L-0.1MM-SM 14
OUT
VCC_MAIN_SNS
1
2
ADJ.RANGE
ACCURACY
MAX.CURRENT
LDO1 (A)
2.5-3.3V
+/-2.5%
50mA
LDO2 (B)
1.2-1.9V
+/-2.5%
50mA
LDO3 (A)
2.5-3.3V
+/-2.5%
50mA
LDO4 (D)
0.7-1.2V
+/-2.5%
50MA
LDO5 (F)
2.5-3.3V
+/-2.5%
1000mA
LDO6 (C1)
1.2-3.6V
+/-2.5%
150mA
LDO7 (C)
2.5-3.3V
+/-25MV
200MA
LDO8 (C)
2.5-3.3V
+/-25mV
LDO9 (C)
2.5-3.3V
+/-25mV
250mA
LDO10 (G)
0.7-1.2V
+/-2.5%
1335mA
LDO11 (C)
2.5-3.3V
+/-25mV
250mA
LDO12 (E)
1.8V
+/-5%
10mA
LDO13 (C)
2.5-3.3V
+/-25mV
250mA
LDO14 (H)
0.8-1.5V
+/-2.5%
250mA
LDO15 (B)
1.2-2.0V
+/-2.5%
50mA
D
200MA
ROOM=PMU
1
C2123
1
10UF
10UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V CERM-X5R 0402-9
ROOM=PMU
C2126
1
10UF
C2125 10UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=PMU
1
C2124
1
ROOM=PMU
C2127
CRITICAL
10UF
20% 2 6.3V CERM-X5R 0402-9
20% 2 6.3V CERM-X5R 0402-9
ROOM=PMU
U2000 ANTIGUA-D2255A080
ROOM=PMU
CSP SYM 1 OF 5 ROOM=PMU
M3
14
12
11
VDD_LDO1_3 V2 VDD_LDO2 M2 VDD_LDO4
PP1V1_SDRAM
C2130 1 2.2UF
C
U1
C2131 1
U2
2.2UF
20% 6.3V X5R-CERM 2 0201
20% 6.3V X5R-CERM 0201
ROOM=PMU
VDD_LDO5
L2 VDD_LDO6 Y6 VDD_LDO7
2
Y4 VDD_LDO8 Y3 VDD_LDO9
ROOM=PMU
VLDO1
M1
VOLTAGE=3.3V
T U P N I
VLDO2
V1
VOLTAGE=1.8V
VLDO3
L1
VOLTAGE=3.0V
O D L
VLDO4
N1
VOLTAGE=0.8V
T1
VOLTAGE=3.0V
PP3V3_USB PP1V8_VA PP3V0_TRISTAR PP0V8_OWL PP3V0_NAND
VOLTAGE=3.3V
PP3V3_ACC
VOLTAGE=3.0V VOLTAGE=2.5V
PP3V0_PROX_ALS PP3V1_VIBE PP2V5_RCAM_AF
VLDO5
Y9 Z9
VDD_LDO10
R3 VDD_LDO11 Y5 VDD_LDO13 33
30
26
24
17
16
14
12
8
OMIT_TABLE
PP1V8_SDRAM
O D L
Y7 VDD_LDO14 N2 VDD_LDO15
C2132 1
K1
VBYPASS
K2
VLDO7
Z6
VLDO8
Z4
VLDO9
Z3
VLDO9_FB
Y2
VOLTAGE=3.1V
RCAM_AF_FB
ROOM=PMU
U2000 CSP
VOLTAGE=0.9V
PP0V9_NAND
R2
VOLTAGE=3.0V
VLDO12
K6
VOLTAGE=1.8V
VLDO13
Z5
VOLTAGE=3.1V
VLDO14
Z7
VOLTAGE=1.2V
VLDO15
P2
PP3V0_PROX_IRLED PP1V8_ALWAYS PP3V1_MESA PP1V2 PP1V9_MESA
VPUMP
U19
B
K15 K16
D16
L15
A
ANTIGUA-D2255A080
L16
A10
D18
M14
A14
CRITICAL
D2
M15
A18
D5
M16
A19
N12
D6
N14
A2
N13
D7
N15
A6
N9
D8
N16
B1
P10
D9
P13
B10
P11
D3
P14
B14
P18
E10
P15
B18
P19
E11
P16
B19
P5
E12
P17
B2
R10
R13
B6
R11
R14
C10
R12
E15
R15
C14
E16
R16
C18
E3
R17
C2
E4
T10
C6
E5
T11
D1
T8
E7
T12
D19
U3
E8
T13
E14
U9
NC
OMIT_TABLE
1
20% 6.3V X5R-CERM 0201
2
2.2UF
20% 6.3V X5R-CERM 0201
2
ROOM=PMU
C2107
1
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=PMU
33
11
C
21
LDO7 LDO8 LDO9
13
LDO10
20 32
LDO11 LDO12 LDO13 LDO14 LDO15
20 8 12
17
27 5 6
7
C2109
1
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=PMU
C2111
1
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=PMU
C2113
1
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=PMU
C2115
1
27
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=PMU
ROOM=PMU
C2116 2.2UF 20% 6.3V X5R-CERM 0201
ROOM=PMU
20% 6.3V X5R-CERM 0201
1
C2104
1
20% 6.3V X5R-CERM 0201
2
2.2UF
2
ROOM=PMU
C2106
1
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=PMU
C2108
1
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=PMU
C2110
1
20% 6.3V X5R-CERM 0201
2 6.3V
2.2UF
ROOM=PMU
C2112
1
20%
X5R-CERM 01005 ROOM=SOC
C2114 2.2UF
0.1UF 2
20% 6.3V X5R-CERM 0201
B
ROOM=PMU
R9 T16 VSS
T3 T6
G1
V10
T15
G17
V14
F15
T17
G18
V8
F16
U10
G19
V9
F3
U11
G2
Y1
F4
U12
H7
Y10
G14
U13
J6
Y14
G15
U14
K12
Y19
G16
U4
K7
G3
U5
L17
Z10
Z1
G4
U6
L18
Z14
H15
V4
L19
Z19
H16
V5
L6 L7
C2102
ROOM=PMU
N10
T14
V6
2
C2103
2.2UF
M9
E9
H4
1
2.2UF
47NF
20% 6.3V X5R-CERM 01005
C2101
2
M8
F14
H3
1
L9
D17
NC
VOLTAGE=1.9V
C2100
1
CSP SYM 4 OF 5
A1
ROOM=PMU
E13
31
U2000
J4
D15
30
45_PMU_VPUMP
ROOM=PMU
J3
D14
D4
SHORT-10L-0.1MM-SM
2
J16
OMIT_TABLE
D13
ROOM=PMU
VPUMP:10nF min. @ 4.6V J15
ROOM=PMU
CRITICAL
D12
XW2100
2
1
SYM 5 OF 5
D11
LDO6
25
26
Z8
ANTIGUA-D2255A080 D10
1
VLDO11
VLDO10
P12 VPP_OTP
30
24
T2
VLDO6
Y8
K3 VDD_BYPASS
2.2UF
20% 6.3V X5R-CERM 2 0201
13
LDO1 LDO2 LDO3 LDO4 LDO5
5
45_PMU_VSS_RTC 16 NOTE: T3 IS XTAL REF GND
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SYSTEM POWER:PMU (2/3) DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
Z2 NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
CONTROL PIN NOTES:
ANTIGUA PMU - GPIOs, NTCs
NOTE (1):INPUT PULL-DOWN 100-300k NOTE (2):INPUT PULL-DOWN 1M NOTE (3):INPUT PULL-UP OR DOWN 100k-300k NOTE (4):OUTPUT OPEN-DRAIN, REQUIRES PULL-UP
D
D CRITICAL ROOM=PMU
33
30
26
24
17
15
14
12
8
1
R2260
1
100K
2 9 5 3
OUT
5% 1/32W MF 01005
ROOM=PMU
ANTIGUA-D2255A080 CSP
R2261
SYM 3 OF 5
100K
2
5% 1/32W MF 01005
ROOM=PMU
5
IN
30
IN
8
IN
PMU_TO_SYSTEM_COLD_RESET_L 1
9
C2260
IN
1000PF
10% 2 6.3V X5R-CERM 01005
9 11 9 30
26
9
33
13
11
OUT
IN 9 OUT
ROOM=PMU
17
IN 5 OUT 9
OUT
16
OUT
AP_TO_PMU_WDOG_RESET TRISTAR_TO_PMU_HOST_RESET AP_TO_PMU_SOCHOT1_L
P7 RESET_IN1 P8 RESET_IN2 P9 RESET_IN3 K4 RESET*
OWL_TO_PMU_SLEEP1_REQUEST PMU_TO_OWL_SLEEP1_READY OWL_TO_PMU_ACTIVE_REQUEST PMU_TO_OWL_ACTIVE_READY
N3
SLEEP1_REQ
(1)
N7
SLEEP1_RDY
26
16 26
8
BI
9 26
16
FOREHEAD NTC
32
R2210
100PF
5% 16V NP0-C0G 2 01005 ROOM=PMU
10KOHM-1% 2
01005 ROOM=PMU
IN OUT
9 16
9 28
30
FOREHEAD_NTC_RETURN
5
IN
8
IN
8
IN
5
IN
8
IN
26
16 26
REAR CAMERA NTC
IN
9 9
1 16
IN
8
IN IN
16
IN
3
OUT
33
IN
33
IN
32
8
IN
33
16
IN
33 32
1
8 33
B
C2220 1
R2220
100PF
5% 16V NP0-C0G 2 01005 ROOM=PMU
10KOHM-1% 2
3
IN IN IN OUT
PMU_TO_AP_IRQ_L I2C0_AP_SCL I2C0_AP_SDA
01005 ROOM=PMU
1
2
SHORT-10L-0.1MM-SM ROOM=PMU
1
2
XW2220
(4)
M5
VDROOP
G5
(1)
S N O T T U B X U M A
TCAL
C2230 1
R2230
100PF
5% 16V NP0-C0G 2 01005 ROOM=PMU
ROOM=PMU
10KOHM-1% 2
01005 ROOM=PMU
1
2
XW2230 1
SHORT-10L-0.1MM-SM
PA_NTC_RETURN
ROOM=PMU
1
2
5% 16V NP0-C0G 2 01005 ROOM=PMU
14
C
E6
BUTTON4
F5
TRISTAR_TO_PMU_USB_BRICK_ID CHESTNUT_TO_PMU_ADCMUX
16
26
C2203
BUTTON_MENU_KEY_BUFF_L BUTTON_HOLD_KEY_BUFF_L BUTTON_RINGER_A
GPIO14 J10 GPIO15 F11 GPIO16 G11 GPIO17 H11
TIGRIS_TO_PMU_INT_L BB_TO_PMU_HOST_WAKE_L PMU_TO_BB_PMIC_RESET_R_L TRISTAR_TO_AP_INT STOCKHOLM_TO_PMU_HOST_WAKE PMU_TO_NAND_LOW_BATT_BOOT_L WLAN_TO_PMU_HOST_WAKE CODEC_TO_PMU_MIKEY_INT_L PMU_TO_BT_REG_ON BT_TO_PMU_HOST_WAKE PMU_TO_WLAN_REG_ON
CODEC_TO_AP_PMU_INT_L PMU_TO_BB_USB_VBUS_DETECT PMU_TO_STOCKHOLM_EN WLAN_TO_PMU_PCIE_WAKE_L
GPIO18 K9 NC GPIO19 J11 PMU_TO_LCM_PANICB
L A T X
IN
16
IN
8 9
30
16
IN
8 9
16
ROOM=CHESTNUT
IN
8 16
BUTTON1 + BUTTON2 ASSERTED FOR >TBD SECONDS CAUSES TWO-FINGER RESET
32
NC
GPIO12 G10 NC GPIO13 H10 PMU_TO_CODEC_DIGLDO_PULLDN C T N
10% 6.3V 2 X5R-CERM 01005
IN
17
IN
33
8 30
IN
33
OUT
13
IN
33
IN
24
OUT
33
IN
33
OUT
OUT IN OUT
2
PMU_TO_BB_PMIC_RESET_L
OUT
33
5% 1/32W MF 01005 ROOM=PMU
B
33
24
33 33
IN
33
IN
1.00K
8 24
OUT
OUT
GPIO20 G12 NC GPIO21 H12 I2C0_AP_SCL
R2200 1
IN
28
8 16
26
C2202 0.22UF
XW2240
20% 6.3V 2 X5R 0201
CRITICAL
Y2200
32.768KHZ-20PPM-12.5PF 1
10KOHM-1% 2
10
IN
NOTE:VDROOP_DET R/C Low-pass Fc=1.06MHz
ROOM=PMU
R2240
100PF
BUTTON3
GPIO7 K8 GPIO8 F9
P6 VDD_RTC
1
C2240 1
F6
GPIO9 G9 GPIO10 H9 GPIO11 J9
O I P G
AP NTC
A
BUTTON2
GPIO5 H8 GPIO6 J8
P1 XTAL1 R1 XTAL2
PMU_VDD_RTC
G6
GPIO1 F7 GPIO2 G7
SHORT-10L-0.1MM-SM 1
BUTTON1
GPIO3 J7 GPIO4 G8
K14 AMUX_BY
TDEV4
45_BUCK1_PP_GPU_FB
1/32W 01005
IN
L12 AMUX_B5 M11 AMUX_B6 L10 AMUX_B7
N6
150 ROOM=PMU
1000PF
M10 AMUX_B3 L14 AMUX_B4
N5
R2205 2
NO_XNET_CONNECTION=1
10% 10V X5R 01005
1
BRICK_ID T5 ADC_IN R5
N11 AMUX_B0 M12 AMUX_B1 L11 AMUX_B2
TDEV3
1 MF 1%
C2205
R G M P
C D A
J13 AMUX_AY
TDEV2
8
OUT
1/32W 01005
(1)
K13 AMUX_A7
N4
2
ROOM=PMU
K11 AMUX_A6
M7
PMU_VDROOP_DET_IN
H5
1000PF
K10 AMUX_A5
TDEV1
ROOM=PMU
PMU_TO_AP_SOCHOT0_L 0.00
1 MF 0%
ROOM=PMU
2
SCLK
M6
1% 1/20W MF 201
R2201 PMU_VDROOP_OUT
1
H13 AMUX_A3 H14 AMUX_A4
45_PMU_XTAL1 45_PMU_XTAL2
RADIO PA NTC
PRE_UVLO
VDROOP_DET (2)
MOSI V7 MISO
FOREHEAD_NTC REAR_CAMERA_NTC RADIO_PA_NTC AP_NTC 45_PMU_TCAL
200K
0.22UF
R O T A R A P M O C
(4)
L8 IRQ*
U8
NC
R2270
C2270
ROOM=PMU
F13 AMUX_A0 G13 AMUX_A1 J12 AMUX_A2
BB_TO_PMU_AMUX_LDO5 BUTTON_VOL_DOWN_L 45_PMU_TO_WLAN_CLK32K BB_TO_PMU_AMUX_LDO11 BUTTON_VOL_UP_L BB_TO_PMU_AMUX_SMPS4 PMU_AMUX_BY
PMU_VREF 1
SCL T7 SDA
BB_TO_PMU_AMUX_SMPS1
XW2210
M4
(1)
L3 TMPR_DET
U7
AP_TO_PMU_AMUX_OUT BUTTON_MENU_KEY_BUFF_L BUTTON_RINGER_A AP_TO_PMU_TEST_CLKOUT BUTTON_HOLD_KEY_BUFF_L LCM_TO_CHESTNUT_PWR_EN TRISTAR_TO_PMU_USB_BRICK_ID CHESTNUT_TO_PMU_ADCMUX PMU_AMUX_AY
SHORT-10L-0.1MM-SM ROOM=PMU
VREF
20% 2 6.3V X5R 0201
OUT_32K SYS_ALIVE
S F E R
R7
45_DWI_PMGR_TO_PMU_SCLK 45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI DWI_PMU_TO_PMGR_MISO
RCAM_NTC_RETURN
S T E S E R
T4 SLEEP_32K R4 H6
C
(4) (1)
NC OUT
(3)
SHDN
PMU_TO_OWL_CLK32K 45_PMU_TO_WLAN_CLK32K
45_PMU_IREF
(3)
N8
P3 ACTIVE_REQ P4 ACTIVE_RDY
IREF K5
(3)
OWL_TO_PMU_SHDN
SYSTEM_ALIVE
8
C2210 1
OMIT_TABLE
U2000
PP1V8_SDRAM
C2250
R2250
C2200 1
5% 16V 2 NP0-C0G 01005 ROOM=PMU
0.1% 1/20W MF 0201 ROOM=PMU
5% 16V CERM 2 01005
1
AP_NTC_RETURN
01005 ROOM=PMU
100PF
3.92K
ROOM=PMU
18PF
ROOM=PMU
2
1.60X1.00-SM
15
45_PMU_VSS_RTC
1
C2201 18PF
5% 16V 2 CERM 01005
ROOM=PMU
XW2200 SHORT-10L-0.1MM-SM 1 2 ROOM=PMU
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SYSTEM POWER:PMU (3/3) DRAWING NUMBER
Apple Inc.
NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
D
D
TIGRIS CHARGER APN:343S00033 PP_VCC_MAIN VOLTAGE=4.3V
1
C2330 10UF
20% 2 6.3V CERM-X5R 0402-9
1
14
15
21
22
24
25
26
33
C2331 10UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=CHARGER
C
ROOM=CHARGER
C
TIGRIS_LDO 1
TIGRIS_PMID 1
C2320
C2321
1
10% 16V 2 X5R-CERM 0402-1
2
1
4.2UF
4.2UF
10% 16V 2 X5R-CERM 0402-1 ROOM=CHARGER
C2322
N I A M _ D D V
100PF
ROOM=CHARGER
5% 35V NP0-C0G 01005
30
3
PP5V0_USB
15
12
8
PP1V8_ALWAYS
C2310
1
10% 2 16V X5R-CERM 0402-1
2
1
4.2UF
R2310
ROOM=CHARGER
100K 5% 1/32W MF 01005
C2311
TIGRIS_TO_PMU_INT_L
1
100
2
1% 1/32W MF 01005 ROOM=CHARGER
B
VBUS
B5
VBUS VBUS
SN2400AB0 WCSP ROOM=CHARGER
VBUS
25
8
BI
SDA
25
8
IN
I2C1_AP_SDA I2C1_AP_SCL
G3
30
E4
SCL
13
SYSTEM_ALIVE
E3
SYS_ALIVE
TRISTAR_TO_TIGRIS_VBUS_OFF
F4
VBUS_OVP_OFF
TIGRIS_TO_PMU_INT_R_L
G2
INT
TIGRIS_VBUS_DETECT
F1
VBUS_DET
30
IN
11
OUT
USB_VBUS_DETECT
1
30.1K 2
20% 6.3V X5R-CERM 0201
2 3 1 2 3 A A B B B
S
ROOM=CHARGER
G4
BOOT
G5
1
BUCK_SW
D4
BUCK_SW
C4
BAT
D1
BAT
C1
2
1
F3 TEST
D D D D N N N N G G G G P P P P
ROOM=CHARGER
2
D
PIQA20161T-SM
10% 16V X5R 0201
1 2 3 C C C
ROOM=CHARGER
C2301 1
ROOM=CHARGER
100PF
TIGRIS_BUCK_LX
C2302 1 100PF
5% 16V NP0-C0G 2 01005 ROOM=CHARGER
5% 16V NP0-C0G 2 01005 ROOM=CHARGER
PP_BATT_VCC
E1
VBATT_SENSE
ACT_DIODE
E2
TIGRIS_ACTIVE_DIODE
HDQ_HOST
G1
HDQ_GAUGE
F2
SWI_AP_BI_TIGRIS TIGRIS_TO_BATTERY_SWI_1V8
BAT_SNS
Q2300 BGA
G
1.0UH-20%-3.6A-0.060OHM
0.047UF TIGRIS_BOOT
CRITICAL
CSD68827W
A1
L2300
C2300
BAT A1 BAT B1
R2320 5
LDO
BUCK_SW A4 B4 BUCK_SW
CRITICAL
VBUS
E5 30
16
R2311 OUT
2
ROOM=CHARGER
U2300
PMID
A5
C5
5% 35V NP0-C0G 01005
ROOM=CHARGER
16
2.2UF
5% 2 16V NP0-C0G 01005
N I A M _ D D V
C2305
CRITICAL
D5
100PF
ROOM=CHARGER
N I A M _ D D V
1
ROOM=CHARGER
F5 31
N I A M _ D D V
C2307 100PF
2 2 2 2 A B D C
IN
1
C2306
1
100PF
BI
3 18
33
18
NOSTUFF
8 9
R2300
17
100K
5% 16V 2 NP0-C0G 01005 ROOM=CHARGER
C2303
1
20% 6.3V X5R-CERM 0201
2
2.2UF
2
ROOM=CHARGER
C2304 2.2UF 20% 6.3V X5R-CERM 0201
B
ROOM=CHARGER
5% 1/32W MF 01005 ROOM=CHARGER
3 3 3 3 A B D C
1% 1/32W MF 01005 ROOM=CHARGER
R2303 18
TIGRIS_TO_BATTERY_SWI
BI
R2301 0.00
1 MF 0%
2 1/32W 01005
NOSTUFF 3
TIGRIS_TO_BATTERY_SWI_1V8_R
1
100
2
TIGRIS_TO_BATTERY_SWI_1V8
17
5% 1/32W MF 01005 ROOM=CHARGER
D
33
A
30
26
24
16
15
14
12
8
PP1V8_SDRAM
2
Q2301
G S
40.2K 1% 1/32W MF 01005
DMN2990UFA DFN0806
A
SYNC_MASTER=N/A
R2302
SYNC_DATE=N/A
PAGE TITLE
1
SYSTEM POWER:CHARGER DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
D
D
C
C
BATTERY CONNECTOR THIS ONE ON MLB
--->
516S00104 (RCPT) 516S00105 (PLUG)
PP_BATT_VCC 1
RCPT-BATT-2BLADES 11
7
8
1
5
C2414
1
5% 16V NP0-C0G 01005
2
27PF
J2400 F-ST-SM
3 17
33
VOLTAGE=4.3V
CRITICAL
ROOM=BATTERY_B2B
2
ROOM=BATTERY_B2B
C2413
1
5% 16V NP0-C0G 01005
5% 2 16V NP0-C0G 01005
56PF
ROOM=BATTERY_B2B
C2410 56PF
ROOM=BATTERY_B2B
1
C2411 100PF
5% 2 16V NP0-C0G 01005 ROOM=BATTERY_B2B
1
C2412 220PF
10% 2 10V X7R-CERM 01005 ROOM=BATTERY_B2B
FL2400
120-OHM-210MA 17
BI
T IG RI S_ TO _B AT TE RY _S WI
1
T IG RI S_ BA TT ER Y_ SW I_ CO NN
2 01005
ROOM=BATTERY_B2B
1
3
2
4
6
9
10
C2400 56PF
5% 2 16V NP0-C0G 01005
XW2400
SHORT-10L-0.25MM-SM 1 2
VBATT_SENSE
OUT
17
ROOM=BATTERY_B2B
12
ROOM=BATTERY_B2B
B
B
A
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SYSTEM POWER:BATTERY CONN DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
D
6
5
4
3
MAGNESIUM - COMPASS
INVENSENSE (APN 338S00017): C3013=0.22UF INVENSENSE 1.1 (APN 338S00087): C3013=0.22UF
ALPS (APN:338S00084) PP1V8_IMU_OWL
PP1V8_IMU_OWL
12
14
19
C3011
1
20% 6.3V 2 X5R-CERM 01005
2
1
0.1UF
0.1UF
20% 6.3V 2 X5R-CERM 01005 ROOM=CARBON 6 1
C3012 20% 6.3V X5R-CERM 0201
VDDIO
NC
U3010
NC
MPU-6700-12-COMBO
NC
LGA 9
IN
SPI_OWL_TO_ACCEL_GYRO_CS_L
5
CS
SCL/SPC
8 FSYNC/GND 14 REGOUT/GND_CAP
GYRO_CHARGE_PUMP 9
OUT
ACCEL_GYRO_TO_OWL_INT2
7
SPI_OWL_TO_IMU_SCLK SPI_OWL_TO_IMU_MOSI SPI_IMU_TO_OWL_MISO
2
SDA/SDI 3 4
SA0/SDO
DRDY/INT1 6
INT/INT2
IN
9 19
IN
9 19
OUT
9 19
14
12
PP1V8_IMU_OWL
C2
FLGA-POP
VPP
B1 RSV B3 RSV D1
RSV
D2
RSV
D4
RST*
ACCEL_GYRO_TO_OWL_INT1
OUT
20% 6.3V X5R 01005-1
1 D N G
ROOM=CARBON
9
2 D N G 0 1
3 D N G 1 1
19
2.2UF
2
ROOM=MAGNESIUM
20% 6.3V X5R-CERM 0201
ROOM=MAGNESIUM
B4
SPI_IMU_TO_OWL_MISO
OUT
9 19
SDA/SDI A4
SPI_OWL_TO_IMU_MOSI
IN
9 19
SPI_OWL_TO_IMU_SCLK
IN
9 19
IN
9
OUT
9
SDO
SPI_OWL_TO_COMPASS_CS_L
CSB A2 C3
114K INT PD
NC
COMPASS_TO_OWL_INT
ROOM=MAGNESIUM
CRITICAL
C
VSS
1 C
4 D N G 2 1
14
C3000
OMIT_TABLE
9
CRITICAL
0.22UF
1
SCL/SCK A3
TRG/SE
1.09M INT PU
OMIT_TABLE
C3013
2
2
20% 6.3V X5R-CERM 01005
114K INT PU 19
ROOM=CARBON
1
C3001 0.1UF
ROOM=MAGNESIUM
DRDY A1
C
1
5% 16V NP0-C0G 01005
COMPASS-MODULE
1
VDD
2
VDD
U3000
ROOM=CARBON
C3002 56PF
4 C
2.2UF
ROOM=CARBON
12
NOSTUFF
1
C3010
1
D
CARBON - ACCEL & GYRO
1
2
5 D N G 3 1
6 D N G 5 1
DISCRETE ACCEL BOSCH (APN:338S1163)
PP1V8_IMU_OWL
B
1
C3020
1
20% 6.3V X5R-CERM 01005
2
0.1UF
2
OMIT_TABLE
C3021
1
1.0UF
12
14
19
B
C3022 0.1UF
20% 6.3V X5R 0201-1
8
VDD
OMIT_TABLE
7
2
VDDIO
20% 6.3V X5R-CERM 01005
OMIT_TABLE
U3020 BMA282
9
IN
SPI_OWL_TO_DISCRETE_ACCEL_CS_L
LGA OMIT_TABLE
4 CS*
OMIT_TABLE
R3021 9
OUT
ACCEL_TO_OWL_INT1_R
1 OMIT_TABLE
R3020 9
OUT
ACCEL_TO_OWL_INT2_R
1
20.0 5% 1/32W MF 01005
A
2
20.0 5% 1/32W MF 01005
SCX
1
SDX
2
SDO
3
2
ACCEL_TO_OWL_INT1 ACCEL_TO_OWL_INT2
6 INT1 5 INT2
PS
GND 9 1 2 4 1 1 1
13
SPI_OWL_TO_IMU_SCLK SPI_OWL_TO_IMU_MOSI ACCEL_TO_OWL_SDO
IN
9 19
IN
9 19
OMIT_TABLE
R3022 1
20.0 2
SPI_IMU_TO_OWL_MISO
OUT
9 19
5% 1/32W MF 01005
GNDIO 0 1
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
SENSORS:MOTION SENSORS DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
FOREHEAD FLEX (FCAM)
4
C3120
1
5% 16V NP0-C0G 01005
2
100PF
C3121
1
20% 6.3V X5R-CERM 01005
2
0.1UF
ROOM=CG_B2B
CAMERA POWER 14
13
12
9
8
7
6
5
3
1
PP1V8
PP1V8_FCAM_CONN
C3101
1
20% 6.3V 2 X5R-CERM 01005
2
1
0.1UF
20
15
20% 6.3V X5R-CERM 0201
2
20% 6.3V X5R-CERM 0201
20
20
C3125
1
2
PP2V85_FCAM_AVD D_CONN
0201 ROOM=CG_B2B
1
2.2UF
C3105
1
C3104
2
5% 16V NP0-C0G
0.1UF
20% 2 6.3V X5R-CERM 01005
20% 6.3V X5R-CERM 2 0201 ROOM=CG_B2B
ROOM=CG_B2B
C3130
20
1
2.2UF
20% 6.3V X5R-CERM 0201
100PF
2.2UF
2
ROOM=CG_B2B
01005
C3129
1
20% 6.3V X5R-CERM 0201
ROOM=CG_B2B
2.2UF
2
ROOM=CG_B2B
C3128
01005
ROOM=CG_B2B
4
5
6
45_PROX_TO_CUMULUS_RX_CONN
10 12
13
14
15
16
17
18
19
20
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
37
38
CUMULUS_TO_PROX_RX_EN_1V8_CONN I2C2_AP_BI_ALS_SDA_CONN ALS_TO_AP_INT_CONN_L I2C2_AP_TO_ALS_SCL_CONN 20 PP3V0_ALS_CONN 20 CODEC_TO_HAC_CONN_N 20 CODEC_TO_HAC_CONN_P 20 CODEC_TO_RCVR_CONN_P 20 CODEC_TO_RCVR_CONN_N 20
C3127
1
0.1UF
ROOM=CG_B2B
20
C3126 100PF
2
5% 16V NP0-C0G 01005
ROOM=CG_B2B
AP_TO_FCAM_CLK_CONN
PP2V85_FCAM_AVDD_CONN 20 PP1V8_FCAM_CONN 20 FRONTMIC3_TO_CODEC_AIN4_CONN_P 20 FRONTMIC3_TO_CODEC_AIN4_CONN_N 20 PP_CODEC_TO_FRONTMIC3_BIAS_CONN20 PGND_IRLED_K 20 PP3V0_PROX_IRLED 15
40
MIC3/HAC/RCVR INTERFACE
11.5
24
PP_CODEC_TO_FRONTMIC3_BIAS
1
2 01005
45_AP_TO_FCAM_CLK
01005
AP_TO_FCAM_CLK_CONN 1
C3110
2
5% 16V NP0-C0G 01005
FL3151
2
AP_TO_FCAM_SHUTDOWN_CONN_L 1
C3111
23
IN
CODEC_TO_HAC_N
2
1
2
5% 16V NP0-C0G 01005
01005-1 2 ROOM=CG_B2B
1 MF 0%
2
1/32W 01005
ROOM=CG_B2B
I2C_ISP_TO_FCAM_SCL_CONN
R3143
70-OHM-25%-0.28A 23
IN
CODEC_TO_HAC_P
2
1
CODEC_TO_HAC_CONN_P
01005
OUT
0.00
2
1
IN
1
CODEC_TO_RCVR_CONN_N 1
IN
CODEC_TO_RCVR_P
1
OUT
CODEC_TO_RCVR_CONN_P
3
2
1
9 0_ MI PI _F C AM _T O_ AP _D AT A0 _C O NN _N
20
DZ3154
OUT
FRONTMIC3_TO_CODEC_AIN4_N
1
OUT
9 0_ MI PI _F CA M _T O_ AP _C LK _P
7
OUT
9 0_ MI PI _F CA M _T O_ AP _C LK _N
2 ROOM=CG_B2B
ALS_TO_AP_INT_L
2
1 01005
ALS_TO_AP_INT_CONN_L 1
2
FRONTMIC3_TO_CODEC_AIN4_CONN_N
01005
20
NO_XNET_CONNECTION=1
1
20
C3146 100PF
ROOM=CG_B2B
2
5% 16V NP0-C0G 01005
ROOM=CG_B2B
DZ3155
6.8V-100PF 01005
2 ROOM=CG_B2B
9 0_ M IP I_ FC AM _T O_ AP _ CL K_ CO NN _P
20
9 0_ M IP I_ FC AM _T O_ AP _ CL K_ CO NN _N
20
FL3156
120-OHM-210MA 3
OUT
120-OHM-210MA
ROOM=CG_B2B
20
C3145
ROOM=CG_B2B
FL3146
FL3155
23
ROOM=CG_B2B
I2C2_AP_TO_ALS_SCL_CONN
2 01005
5% 2 16V NP0-C0G 01005
8
L3102
7
1
12V-33PF
CRITICAL
A
MAKE_BASE=TRUE
56PF
01005-1 2 ROOM=CG_B2B
ROOM=CG_B2B
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
I2C2_AP_SCL
20
120-OHM-210MA 9 0_ MI PI _F CA M _T O_ AP _D AT A0 _N
IN
NO_XNET_CONNECTION=1
ROOM=CG_B2B
CRITICAL
L3100
20
5% 16V 2 NP0-C0G 01005
FL3102
1
2
B
20
C3144
120-OHM-210MA 8
01005
90_MIPI_FCAM_TO_AP_DATA0_CONN_P
NOSTUFF
1
DZ3153
70-OHM-25%-0.28A 23
ROOM=CG_B2B
I2C2_AP_BI_ALS_SDA_CONN
2 01005
56PF
FL3154
CAMERA MIPI
7
1
MAKE_BASE=TRUE
01005-1 2 ROOM=CG_B2B
ROOM=CG_B2B
90_MIPI_FCAM_TO_AP_DATA0_P
I2C2_AP_SDA
NO_XNET_CONNECTION=1
20
5% 16V 2 NP0-C0G 01005
OUT
5% 2 16V NP0-C0G 01005
20
12V-33PF
BI
56PF
7
BI
20
C3143 56PF
120-OHM-210MA 8
2
C3113
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
1
FL3101
CODEC_TO_RCVR_N
ROOM=CG_B2B
I2C_ISP_BI_FCAM_SDA_CONN
1/32W 01005
45_PROX_TO_CUMULUS_RX_CONN
2
0% 1/32W MF 01005
70-OHM-25%-0.28A 23
R3103 ROOM=CG_B2B
0.00
1
ROOM=CG_B2B
FL3153 01005
1 MF 0%
45_PROX_TO_CUMULUS_RX
01005-1 2 ROOM=CG_B2B
20
ROOM=CG_B2B
I2C_ISP_BI_FCAM_SDA
OUT
C3112
1
5% 16V 2 NP0-C0G 01005
BI
29
DZ3152
12V-33PF
56PF
7
20
NO_XNET_CONNECTION=1
1
R3102 I2C_ISP_TO_FCAM_SCL
2
ROOM=CG_B2B
FL3152
ROOM=CG_B2B
IN
DFN1006H4-3 ROOM=CG_B2B
5% 1/32W MF 2 01005
DZ3151
DMN3730UFB4 SYM_VER_1
1.00M
20
NO_XNET_CONNECTION=1
1
20
ROOM=CG_B2B
7
R3140
CODEC_TO_HAC_CONN_N
CRITICAL
Q3140
G S
01005
100PF
ROOM=CG_B2B
B
1
12V-33PF
120-OHM-210MA
0.00
IN
CUMULUS_TO_PROX_TX_EN_BUFF
70-OHM-25%-0.28A
ROOM=CG_B2B
01005
D
29
FL3111 1
3
2 ROOM=CG_B2B
20
ROOM=CG_B2B
AP_TO_FCAM_SHUTDOWN_L
20
DZ3150 01005
100PF
ROOM=CG_B2B
IN
PGND_IRLED_D
6.8V-100PF
2
120-OHM-210MA
7
PP_CODEC_TO_FRONTMIC3_BIAS_CONN 1
ROOM=CG_B2B
FL3110
C
1% 1/20W MF 2 201
PROX & ALS INTERFACE
120-OHM-210MA
CAMERA I/O
20
R3101
FL3150
IN
20
ROOM=CG_B2B
C
7
D
90_MIPI_FCAM_TO_AP_DATA0_CONN_N20 90_MIPI_FCAM_TO_AP_DATA0_CONN_P20
PGND_IRLED_K
1
20
90_MIPI_FCAM_TO_AP_CLK_CONN_N20 90_MIPI_FCAM_TO_AP_CLK_CONN_P20
8
9 11
20
20% 2 6.3V X5R-CERM 01005
20% 6.3V X5R-CERM 2 0201
2
3
28
PP3V0_ALS_CONN 1
36
1
5% 16V NP0-C0G 01005
2
120-OHM-210MA 1
35
ROOM=CG_B2B
100PF
2
F-ST-SM
7
PP3V0_PROX_CONN
20
FL3126
1
J3100
AA22L-S034VA1 39
PP3V0_PROX_CONN
ROOM=CG_B2B
1
(PLUG)
C3124
I2C_ISP_TO_FCAM_SCL_CONN 20 20 AP_TO_FCAM_SHUTDOWN_CONN_L I2C_ISP_BI_FCAM_SDA_CONN 20
01005
100PF
(RCPT)
516S0987
ROOM=CG_B2B
1
5% 16V NP0-C0G 01005
516S0986
2.2UF
ROOM=CG_B2B
ROOM=CG_B2B
FL3104
C3106 1
1
2.2UF
120-OHM-210MA
FERR-22-OHM-1A-0.055OHM PP2V 85_CAM_AVDD_LDO
2
2
PP3V0_PROX_ALS
C3100
ROOM=CG_B2B
21
20% 6.3V X5R-CERM 0201
C3123
FL3125
2 0201 ROOM=CG_B2B
1
ROOM=CG_B2B
FL3100
21
C3122 2.2UF
ROOM=CG_B2B
FERR-22-OHM-1A-0.055OHM 28
--->
PP3V0_PROX_IRLED
2
1
FOREHEAD CONNECTOR THIS ONE ON MLB
15
1
29
2
PROX & ALS POWER 20
D
3
23
OUT
FRONTMIC3_TO_CODEC_AIN4_P
2
1 01005
ROOM=CG_B2B
FRONTMIC3_TO_CODEC_AIN4_CONN_P NO_XNET_CONNECTION=1
1
DZ3156
6.8V-100PF
A
SYNC_MASTER=N/A 20
SYNC_DATE=N/A
PAGE TITLE
CAMERA:FOREHEAD FLEX B2B DRAWING NUMBER
01005 2 ROOM=CG_B2B
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
REAR CAMERA FLEX
2
1
RCAM CONNECTOR XW3202
R3202 21
15
PP2V5_RCAM_AF
1 1% MF
3.00
THIS ONE ON MLB
--->
516S00100 (RCPT)
SHORT-10L-0.1MM-SM
2 PP2V5_RCAM_AF_COMP 1/32W 01005
1
516S00101 (PLUG)
2
CRITICAL
ROOM=RCAM_B2B
ROOM=RCAM_B2B
J3200
AA27D-S030VA1
D
D
F-ST-SM
32
PP2V5_RCAM_AF_CONN
21
21
CAMERA POWER
21
BI 21
IN 21
FL3200
U3200 25
24
22
17
15 33
14 26
LP5907SNX-2.85 X2SON 4 VIN VOUT
PP_VCC_MAIN
10-OHM-1.1A 1
20
PP2V85_CAM_AVDD_LDO
1
1
3 EN
C3210
2
8
1
2
C3200
1
2.2UF
GND EPAD
20% 6.3V X5R-CERM 0201
21
IN
21
OUT
21
IN
2
5
20% 6.3V X5R-CERM 0201
C3211
ROOM=RCAM_B2B
2.2UF
2
ROOM=RCAM_B2B
1
C3201 0.1UF
20% 2 6.3V X5R-CERM 01005
20% 6.3V X5R-CERM 0201 ROOM=RCAM_B2B
ROOM=RCAM_B2B
1
C3202
I2C_ISP_BI_RCAM_SDA_CONN I2C_ISP_TO_RCAM_SCL_CONN PP1V8_RCAM_CONN AP_TO_RCAM_SHUTDOWN_CONN_L RCAM_TO_LED_DRIVER_STROBE_EN_CONN AP_TO_RCAM_CLK_CONN
01005
ROOM=RCAM_B2B
2.2UF
PP2V85_RCAM_AVDD_CONN
2
VOLTAGE=2.85V
21
PP1V2_RCAM_DIGITAL_CONN
21
PP2V85_RCAM_AVDD_CONN
31
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
34
33
90_MIPI_RCAM_TO_AP_DATA3_CONN_N 90_MIPI_RCAM_TO_AP_DATA3_CONN_P
BI
7
BI
7
90_MIPI_RCAM_TO_AP_DATA1_CONN_N 90_MIPI_RCAM_TO_AP_DATA1_CONN_P
BI
7
BI
7
BI
7
90_MIPI_RCAM_TO_AP_CLK_CONN_N 90_MIPI_RCAM_TO_AP_CLK_CONN_P
BI
7
90_MIPI_RCAM_TO_AP_DATA0_CONN_N 90_MIPI_RCAM_TO_AP_DATA0_CONN_P
BI
7
BI
7
90_MIPI_RCAM_TO_AP_DATA2_CONN_N 90_MIPI_RCAM_TO_AP_DATA2_CONN_P
BI
7
BI
7
100PF
5% 2 16V NP0-C0G 01005 ROOM=RCAM_B2B
CAM_EXT_LDO_EN
C
C
FL3201
FERR-22-OHM-1A-0.055OHM 14
1
PP1V2_CAMERA
2
PP1V2_RCAM_DIGITAL_CONN
21
0201 ROOM=RCAM_B2B
1
2
C3203
1
20% 6.3V X5R-CERM 0201
2
2.2UF
XW3203
SHORT-10L-0.1MM-SM
2
ROOM=RCAM_B2B
1
C3204
1
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=RCAM_B2B
C3206
1
20% 6.3V X5R-CERM 0201
2
2.2UF
ROOM=RCAM_B2B
ROOM=RCAM_B2B
C3205 100PF
DIGITAL I/O
5% 16V NP0-C0G 01005
ROOM=RCAM_B2B
FL3230
14
120-OHM-210MA
45_BUCK6_FB
FL3220
7
IN
28
20
14
13
12
9
8
7
6
5
3
1
PP1V8
2
PP1V8_RCAM_CONN
0201 1
ROOM=RCAM_B2B
C3220
1
1.0UF
C3230 5% 16V NP0-C0G 01005
C3221
ROOM=RCAM_B2B
2
5% 16V NP0-C0G 01005
2
ROOM=RCAM_B2B
120-OHM-210MA
ROOM=RCAM_B2B IN
1
AP_TO_RCAM_SHUTDOWN_L
2
AP_TO_RCAM_SHUTDOWN_CONN_L
01005 ROOM=RCAM_B2B
FERR-22-OHM-1A-0.055OHM 1
100PF
FL3231
7
PP2V5_RCAM_AF
PP2V5_RCAM_AF_CONN
2
0201 1
ROOM=RCAM_B2B
C3207
1
20% 6.3V X5R 0201-1
2
1.0UF
B 2
C3208 1.0UF
ROOM=RCAM_B2B
21
C3299
1
ROOM=RCAM_B2B
5% 2 16V NP0-C0G 01005
L3205
15
AP_TO_RCAM_CLK_CONN NOSTUFF
ROOM=RCAM_B2B
1
100PF
21
100PF
20% 6.3V 2 X5R 0201-1
21
2 01005
FERR-22-OHM-1A-0.055OHM 29
1
45_AP_TO_RCAM_CLK
1
1
21
C3231 100PF
21
2
C3209
5% 16V NP0-C0G 01005
ROOM=RCAM_B2B
B
100PF
20% 6.3V X5R 0201-1
ROOM=RCAM_B2B
5% 16V 2 NP0-C0G 01005
FL3232
120-OHM-210MA
ROOM=RCAM_B2B 22
OUT
1
RCAM_TO_LED_DRIVER_STROBE_EN
2
RCAM_TO_LED_DRIVER_STROBE_EN_CONN
01005 ROOM=RCAM_B2B
1
IN
21
C3232 100PF
MIPI COMMON-MODE CHOKES
2
5% 16V NP0-C0G 01005
ROOM=RCAM_B2B
L3200
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
R3203 22
3
7
BI
I2C_ISP_BI_RCAM_SDA
0.00
1 MF 0%
2
L3201
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
BI
21
OUT
21
C3233
5% 2 16V NP0-C0G 01005
L3203
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
2
3
ROOM=RCAM_B2B
2 ROOM=RCAM_B2B
NOSTUFF
L3202
7
IN
I2C_ISP_ TO_RCAM_SCL
0.00
1 MF 0%
2
I2C_ISP_TO_RCAM _SCL_CONN
1/32W 01005
ROOM=RCAM_B2B
1
C3234 56PF
NOSTUFF
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
ROOM=RCAM_B2B
R3204 22
A
1
56PF
NOSTUFF
3
I2C_ISP_BI_RCAM_SDA_CONN
1/32W 01005
ROOM=RCAM_B2B
2 ROOM=RCAM_B2B
L3204
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
5% 2 16V NP0-C0G 01005 ROOM=RCAM_B2B
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
3
2 ROOM=RCAM_B2B
NOSTUFF
3
2 ROOM=RCAM_B2B
NOSTUFF
CAMERA:REAR CAMERA B2B DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
PLACEHOLDER FOOTPRINTS
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
D
D
DUAL LED STROBE DRIVER C
C
APN:353S3899 PP_LED_BOOST_OUT 33
26
25
24
21
17
15
14
U3300
PP_VCC_MAIN
C3384 1
C3385 1
C3386 1
C3387 1
20% 6.3V X5R-CERM 2 0201
20% 6.3V X5R-CERM 2 0201
20% 6.3V X5R-CERM 2 0201
20% 6.3V CERM-X5R 2 0402-9
2.2UF
ROOM=STROBE
VOLTAGE=5.0V
2.2UF
ROOM=STROBE
2.2UF
ROOM=STROBE
1.0UH-20%-3.6A-0.060OHM 1
2 PIQA20161T-SM
ROOM=STROBE
D1 IN
PP_LED_DRIVER_SW
OUT
A2
VOLTAGE=5.0V
B2
A3
CRITICAL
33
8
IN IN
26
IN
21
7
BI
21
7
IN
1
C3396 10UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=STROBE
ROOM=STROBE
C3 A4
200K PD D3 INT ENABLE 200K PD E3 INT STROBE
AP_TO_LED_DRIVER_EN RCAM_TO_LED_DRIVER_STROBE_EN BB_TO_LED_DRIVER_GSM_BURST_IND I2C_ISP_BI_RCAM_SDA I2C_ISP_TO_RCAM_SCL
B3
20% 2 6.3V CERM-X5R 0402-9
SW
ROOM=STROBE
21
C3394 10UF
WLCSP
L3300
ROOM=STROBE
1
LM3564A1TMX
CRITICAL
10UF
NC
200K C2 INT TORCH 200K E4 INT TX
LED1
PD PD
LED2
GND 1 1 A B
AGND 1 C
32
VOLTAGE=5.0V
D4 1
TEMP
32
PP_LED_DRIVER_WARM_LED
VOLTAGE=5.0V
C4
E2 SDA D2 SCL
PP_LED_DRIVER_COOL_LED
B4
E1
C3308 100PF
5% 16V 2 NP0-C0G 01005 ROOM=STROBE
1
C3373 100PF
5% 16V 2 NP0-C0G 01005 ROOM=STROBE
LED_MODULE_NTC
OUT
32
B
B
A
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
CAMERA:STROBE DRIVER DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
CALTRA AUDIO CODEC (ANALOG INPUTS & OUTPUTS) D
D
U3500 VOICE MIC
31 31
LOWERMIC1_TO_CODEC_AIN1_P LOWERMIC1_TO_CODEC_AIN1_N
L2 AIN1+ L1 AIN1-
NC NC
K3 AIN2+ L3 AIN2-
C ANC REF MIC
ANC ERROR MIC
32 32
20 20
REARMIC2_TO_CODEC_AIN3_P REARMIC2_TO_CODEC_AIN3_N
K2 AIN3+ K1 AIN3-
FRONTMIC3_TO_CODEC_AIN4_P FRONTMIC3_TO_CODEC_AIN4_N
J3 AIN4+ J4 AIN4-
WLCSP-1 SYM 1 OF 3
AOUT1+
L9
1 7 L 2 4 S C
AOUT1-
M9
AOUT2+
L8
AOUT2-
M8
HPOUTA
K10
HPOUTB
K11
ROOM=CODEC CRITICAL
HS3
M5
HS4
M4
HS3_REF
L10
HS4_REF
M10
CODEC_TO_RCVR_P 20 CODEC_TO_RCVR_N 20 CODEC_TO_HAC_P 20 CODEC_TO_HAC_N 20 CODEC_TO_HPHONE_L 31 CODEC_TO_HPHONE_R 31 CODEC_TO_HPHONE_HS3 31 CODEC_TO_HPHONE_HS4 31
ROOM=CODEC
C3505
R3515
0.1UF
HSIN+ D1 HSIN- E1
CODEC_HSIN_R_P
1 2 20% 01005 6.3V X5R-CERM
CODEC_HSIN_P CODEC_HSIN_N
NC NC
C3506
2
NC NC
HPHONE_TO_CODEC_DETECT
2
NO_XNET_CONNECTION=1
10% 10V X7R-CERM 01005
R3550 1
CODEC_HSIN_R_N
ROOM=CODEC
J9
1.33K 1% 1/32W MF 01005
C3504 220PF
0.1UF
F1 AIN5+ G1 AIN5-
1
ROOM=CODEC
1
ROOM=CODEC
1 2 20% 01005 6.3V X5R-CERM
HPDETECT
1.33K 2
1% 1/32W MF 01005 ROOM=CODEC NO_XNET_CONNECTION=1
31
F2 AIN6+ F3 AIN6-
ROOM=CODEC
C3552 100PF 1
B
NC NC
NC NC NC NC NC NC NC NC
NC NC
A
DMIC1_CLK
B4
DMIC1_DATA
C4
DMIC2_CLK
C3
DMIC2_DATA
A3
DMIC3_CLK
B3
DMIC3_DATA
A2
DMIC4_CLK
B2
DMIC4_DATA
A9
PDM_CLK
B9
PDM_DATA
1
DP
J12
DN
H12
MBUS_REF
90_MIKEYBUS_CALTRA_DATA_P 90_MIKEYBUS_CALTRA_DATA_N
G10 MBUS_REF_U3500
XW3500 1
2
SHORT-10L-0.1MM-SM ROOM=CODEC
20.0
2
5% 16V NP0-C0G 01005
R3502
G2 AIN7+ G3 AIN7 A4
C
CODEC_TO_HPHONE_HS3_REF 31 CODEC_TO_HPHONE_HS4_REF 31
B
2
5% 1/32W MF 01005
90_MIKEYBUS_DATA_P 90_MIKEYBUS_DATA_N
ROOM=CODEC
30 30
R3503 1
20.0
2
5% 1/32W MF 01005 ROOM=CODEC
C3554 100PF 1
2
5% 16V NP0-C0G 01005 ROOM=CODEC
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
AUDIO:CALTRA CODEC (1/2) DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
CALTRA AUDIO CODEC (POWER & I/O) 25
PP1V8_VA
15
1
C3640
D
2.2UF
D 2
20% 6.3V X5R-CERM 0201
ROOM=CODEC
CODEC_AGND 33
26
25
22
21
17
15
24
PP_VCC_MAIN
14
1
C3600
1
10UF
0.1UF
20% 6.3V 2 CERM-X5R 0402-9
30
26
24
17
16
15
14
12
8
1
C3602 0.1UF
20% 6.3V 2 X5R-CERM 01005
20% 2 6.3V X5R-CERM 01005
ROOM=CODEC
ROOM=CODEC
ROOM=CODEC
33
C3601
PP1V8_SDRAM
33
1
C3610
1
10UF
C3611 0.1UF
20% 2 6.3V CERM-X5R 0402-9 ROOM=CODEC
1
20% 2 6.3V X5R-CERM 01005
ROOM=CODEC
ROOM=CODEC
C3650 1
16
15
14
12
8
PP1V8_SDRAM
31
2
R3650 5% 1/32W MF 01005
ROOM=CODEC
CODEC_RESET_L
C3670 1 1 J P C V
ROOM=CODEC
LOWERMIC1_BIAS_FILT_RET
17
1.00K
PP1V2_VD_FILT
20% 6.3V 2 X5R 0201-1
31
24
2
1.0UF
4.7UF
26
0.1UF
1
C
30
1
C3612
20% 2 6.3V X5R-CERM 01005
PP_CODEC_TO_LOWERMIC1_BIAS LOWERMIC1_BIAS_FILT_IN
M6 K7
2 2 1 1 D G D D V V
2 1 1 C E T T L L I I F F _ _ D D V V
MIC1_BIAS
5 A L V
1 1 H
7 M P V
P C _ G O R P V
A V
16
16
NC
8
NC
MIC2_BIAS J7 MIC2_BIAS_FILT
1
C3660
ROOM=CODEC
25
ROOM=CODEC
1 32
2
PP_CODEC_TO_REARMIC2_BIAS REARMIC2_BIAS_FILT_IN
MIC3_BIAS
L5
MIC3_BIAS_FILT
FRONTMIC3_BIAS_FILT_RET
4.7UF 1
2
20
PP_CODEC_TO_FRONTMIC3_BIAS FRONTMIC3_BIAS_FILT_IN
2
K9
SPI_AP_TO_CODEC_CS_L SPI_AP_TO_CODEC_SCLK
INT*
C9
CS*
C8
CCLK
8
A8
MISO
8
45_I2S_AP_TO_CODEC_MCLK
C12
MCLK
8 8
25
8
25
8
9 8
20% 6.3V X5R-CERM 0201
9 8 8
ROOM=CODEC
CALTRA_FLYN
9 8
1 7 L 2 4 S C
CRITICAL ROOM=CODEC
CALTRA_GNDCP
L11
1
1
45_I2S_AP_TO_CODEC_MSP_BCLK I2S_AP_TO_CODEC_MSP_LRCLK I2S_AP_TO_CODEC_MSP_DOUT I2S_CODEC_TO_AP_MSP_DIN
NC
TSTI
D7
TSTI D9 TSTI E8
TSTI
TSTI M1
XSP_SDOUT
H4
GND
B12
GND
E2
GND
E3
GND
E4
GND
E10
GND
F4
GND
F5
GND
F6
GND
F7
C3663
GND
F8
GND
F9
20% 6.3V 2 X5R-CERM1 402
GND
F10
GND
G4
GND
G5
GND
G6
GND
G7
GND
G8
GND
G9
GND
H6
GND
H7
GND
H8
GND
H9
GND
J8
20% 2 6.3V X5R-CERM1 402
16
H5
PMU_TO_CODEC_DIGLDO_PULLDN
DIGLDO_PULLDN
J5 DIGLDO_PDN
ROOM=CODEC
2
C3665
ROOM=CODEC
HS_BIAS_FILT
CALTRA_FILTP
C3654
20% 6.3V 2 X5R-CERM1 402
K4
TSTI C10 TSTI D10
XSP_SDIN/DAC2B_MUTE
CALTRA_LP_FILTP
4.7UF
NC
A10
CALTRA_VCP_FILTN
FILT+ H1
NC
GND A1 GND A12
C3662
1
C
NC
A11
A7
NC NC
E7
TSTI E9 TSTI G11
20% 2 6.3V X5R-CERM 01005 HS_BIAS_FILT_REF
TSTO
XSP_LRCK/FSYNC
0.1UF
M2
TSTO
E6
MSP_SDOUT
1
M3
TSTO
E5
NC NC
D6
XSP_SCLK
ROOM=CODEC
CALTRA_HS_BIAS_FILT
D5
TSTO
B11
4.7UF
LP_FILT+ F12
TSTO
MSP_SDIN
1
-VCP_FILT M11
B10
C11
ROOM=CODEC
B
TSTO
MSP_LRCK/FSYNC
SM
GNDCP
45_I2S_AP_OWL_TO_CODEC_XSP_BCLK I2S_AP_OWL_TO_CODEC_XSP_LRCLK I2S_AP_TO_CODEC_XSP_DOUT I2S_CODEC_TO_AP_OWL_XSP_DIN
NC
D11
MSP_SCLK
8
4.7UF
XW3660
B5 ASP_SDIN B6 ASP_SDOUT
NC
TSTO
B7
8
1
ROOM=CODEC
C6 ASP_SCLK C5 ASP_LRCK/FSYNC
NC
D8
8
MIC4_BIAS_FILT
20% 6.3V X5R-CERM1 402
45_I2S_AP_TO_CODEC_ASP_BCLK I2S_AP_TO_CODEC_ASP_LRCLK I2S_AP_TO_CODEC_ASP_DOUT I2S_CODEC_TO_AP_ASP_DIN
NC
C2
C7
8
CALTRA_VCP_FILTP
+VCP_FILT J10
J6 MIC4_BIAS K5
CODEC_TO_AP_PMU_INT_L
MOSI
C3661 2.2UF
K6
FLYN M12
C3653
XW3630 2
1
20% 6.3V X5R-CERM1 402
SHORT-10L-0.1MM-SM 1
4.7UF
WAKE*
D3
JTAG_TCK D4 JTAG_TDI D2 JTAG_TDO
TSTO
20% 6.3V X5R-CERM 0201
25
C3651
K8
B8
ROOM=CODEC
CRITICAL ROOM=CODEC
XW3620
JTAG_TMS
WLCSP-1
2.2UF
2
CALTRA_FLYC
FLYC L12
ROOM=CODEC
SHORT-10L-0.1MM-SM 1 2 REARMIC2_BIAS_FILT_RET
CODEC_TO_PMU_MIKEY_INT_L
SPI_AP_TO_CODEC_MOSI SPI_CODEC_TO_AP_MISO
8
1 7 L 2 4 S C
L6
8
8
CALTRA_FLYP
K12
SYM 2 OF 3
ROOM=CODEC
RESET*
SYM 3 OF 3
WLCSP-1
20% 6.3V X5R-CERM1 402
H3
U3500
S U B M _ P V
FLYP
U3500
MIC1_BIAS_FILT
1 J
0 1 H
B
C3664 10UF
20% 2 6.3V CERM-X5R 0402-9
ROOM=CODEC
CALTRA_HS_BIAS_FILT_IN D D D D D D D D N N N N G G G G 6 1 1 1 A B 1 1 E F
S H D N G 4 L
ROOM=CODEC P D N G 7 L
A D N G
FILT- H2
2 J
A
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
AUDIO:CALTRA CODEC (2/2) XW3600
SHORT-10L-0.1MM-SM 1 2 ROOM=CODEC
DRAWING NUMBER
24
Apple Inc.
CODEC_AGND
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
D
D
SPEAKER AMPLIFIER APN: 338S1285
33
26
24
22
21
17
15
14
PP_VCC_MAIN
PP1V8_VA 1
C3709
1
0.1UF
15
24
C3730 2.2UF
20% 2 6.3V X5R-CERM 01005
2
ROOM=SPKR_AMP
20% 6.3V X5R-CERM 0201
ROOM=SPKR_AMP
VOLTAGE=8.0V
PP_SPKR_VBOOST
C3741
1
20% 10V 2 X5R-CERM 0402-8
2
1
10UF
C
C3742
1
C3745
1
20% 10V X5R-CERM 0603-1
10% 16V 2 X5R-CERM 0201
2
22UF
0.1UF
ROOM=SPKR_AMP
C3746 100PF
ROOM=SPKR_AMP
5% 16V NP0-C0G 01005
1 1 1 1 A B C D
ROOM=SPKR_AMP
4 5 A A
VBST
VP
5 F
1
U3700
1.2UH-20%-3.0A-0.080OHM 1
PP_SPEAKERAMP_SW
2
30
17
8
17
8
8
8
IN
B2
I2C1_AP_SDA
D5
IN
I2C1_AP_SCL
OUT
SPEAKERAMP_TO_AP_INT_L
D6 A7 A6
AP_TO_SPEAKERAMP_RESET_L 1
WLCSP
SW
VER1 ROOM=SPKR_AMP
CRITICAL
SDA SCL
RESET*
D7 ALIVE
5% 1/32W MF 01005
C7 ADO
2
FILT+ F2 LDO_FILT C5 VSENSE-
E3
VSENSE+
E2
ISENSE- F1 ISENSE+ E1
INT*
R3729 100K
2
CS35L21-XWZR
A2
VOLTAGE=8.0V
BI
PIQA20161T-SM
ROOM=SPKR_AMP
30
C3729
1
20% 6.3V X5R-CERM 0201
2
2.2UF
L3700
OUT+
IN
45_I2S_AP_TO_SPEAKERAMP_MCLK
ROOM=SPKR_AMP
E7
8
45_I2S_AP_TO_CODEC_ASP_BCLK
E6
IN
24
8
I2S_AP_TO_CODEC_ASP_LRCLK
F6
IN
24
8
I2S_AP_TO_CODEC_ASP_DOUT
F7
IN
I2S_CODEC_TO_AP_ASP_DIN
E5
24
8 OUT
4.7UF
ROOM=SPKR_AMP
20% 6.3V CER-X5R 0402
ROOM=SPKR_AMP
NC NC
XW3703
SHORT-10L-0.1MM-SM 1 2
SPEAKERAMP_IREF
XW3704
MCLK 1
SCLK
R3735 44.2K
1M INT PD
LRCK/FSYNC 1M INT PD
2
SDIN
C3740
VSENSE_NEG VSENSE_POS
D2
IREF+ B7
1M INT PD
24
SPEAKERAMP_FILT SPEAKERAMP_LDO_FILT
OUT- C2
1M INT PD 8
C
VA
CRITICAL
SHORT-10L-0.1MM-SM 1 2
1% 1/32W MF 01005
ROOM=SPKR_AMP
1M INT PD
SDOUT 1M INT PD
GNDP 3 3 4 3 4 3 4 A B B C C D D
GNDA 5 6 6 4 3 4 B B C E F F
B
SPEAKERAMP_TO_SPEAKER_OUT_POS
SPEAKERAMP_TO_SPEAKER_OUT_NEG
C3760 1 1000PF
10% 10V X5R 2 01005
ROOM=SPKR_AMP
A
1
C3763 1000PF
10% 10V 2 X5R 01005
ROOM=SPKR_AMP
C3700 1 1000PF
10% 10V X5R 2 01005
1
B
31
31
C3702 1000PF
10% 10V 2 X5R 01005
ROOM=SPKR_AMP
ROOM=SPKR_AMP
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
AUDIO:SPEAKER DRIVER DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
DISPLAY & TOUCH - POWER SUPPLIES
D
D
CHESTNUT DISPLAY PMU APN:338S1172 33
26
25
24
22
21
17
15
PP_VCC_MAIN
14
C4000 1
1
10UF
CRITICAL
20% VOLTAGE=6.3V 2 CERM-X5R 0402-9
L4000
1.0UH-20%-2.25A-0.15OHM
BGA
ROOM=CHESTNUT
D1 2
VIN
ROOM=CHESTNUT
CRITICAL
B2 SW
PP_CHESTNUT_SW VOLTAGE=6.3V
A2 SYNC NO INT PULL
26
16
I2C0_AP_SCL
D3
SCL
BI
I2C0_AP_SDA
D2
SDA
IN
LCM_TO_CHESTNUT_PWR_EN
C3
LCM_EN
5
IN
PMU_TO_OWL_ACTIVE_READY
C2
16
16
OUT
CHESTNUT_TO_PMU_ADCMUX
E1 ADCMUX
8
8
28
30
IN
16
26
9
16
PP_CHESTNUT_CP
U4000
VOLTAGE=6.0V
TPS65730A0PYFF
ROOM=CHESTNUT
PIXB2016FE-SM
1
CF1 C4 CF2 E4
C4002 10UF
20% 2 VOLTAGE=10V X5R-CERM 0402-8
VOLTAGE=-6.0V
PN_CHESTNUT_CN
ROOM=CHESTNUT
LCMBST
B3
PP6V0_LCM_BOOST
CPUMP
B4
VOLTAGE=6.0V
VNEG
E3
PN5V7_SAGE_AVDDN
28
29
VOLTAGE=-5.7V
VNEG(SUB) E2
200K INT PD
RESET*
HVLDO1 A4 HVLDO2 A3 HVLDO3 A1
VOLTAGE=5.7V
PP5V7_SAGE_AVDDH
29
VOLTAGE=5.7V
PP5V7_LCM_AVDDH
28
VOLTAGE=5.1V
PP5V1_GRAPE_VDDH
29
NO INT PULL
D N G A
C
1 C
1 2 D D N N G G P P 1 4 B D
1
C4003
C4004
1
1UF
2
1
10UF
20% VOLTAGE=16V CER-X5R 0201
20% VOLTAGE=10V X5R-CERM 0402-8
2
ROOM=CHESTNUT
C4005
1
10UF
2
20% VOLTAGE=10V X5R-CERM 0402-8
ROOM=CHESTNUT
C4006
1
10UF
2
ROOM=CHESTNUT
C
C4007 22UF
20% VOLTAGE=10V X5R-CERM 0402-8
2
ROOM=CHESTNUT
20% VOLTAGE=10V X5R-CERM 0603-1 ROOM=CHESTNUT
LED BACKLIGHT DRIVER APN:353S00640
MOJAVE MESA BOOST APN:353S4207 (A1)
CRITICAL
CRITICAL
L4021
D4021
1.0UH-20%-3.6A-0.060OHM
B 33
26
25
24
22
21
17
15
14
PP_VCC_MAIN
1
VOLTAGE=25V
C4020 1
C4021 1
20% VOLTAGE=6.3V 2 CERM-X5R 0402-9
20% VOLTAGE=6.3V 2 CERM-X5R 0402-9
10UF
ROOM=BACKLIGHT
10UF
ROOM=BACKLIGHT
CRITICAL
NSR05F30NXT5G
33
26
25
24
22
21
17
15
14
PP_VCC_MAIN
2
A
ROOM=MOJAVE
VOLTAGE=18.0V
ROOM=MOJAVE
ROOM=BACKLIGHT
B1 SW
ROOM=MOJAVE
1
CRITICAL
A2 VIN
VOUT
PP12V0_MOJAVE_LDOIN
C2 LDOIN
C4042
C3 2
5% VOLTAGE=25V NP0-C0G 0201 ROOM=MOJAVE
D N G P
D N G A
B
3 27
VOLTAGE=11.5V 1
56PF
B2 EN_M A3 EN_S VOLTAGE=12.0V
SOD-923-1
PP11V3_MESA
BGA
PP13V0_MESA_SW
20% VOLTAGE=6.3V 2 CERM-X5R 0402-9
K
VOLTAGE=25V
PITA32251T-SM ROOM=BACKLIGHT
2
10UF
D4020
NSR0530P2T5G PP_BL_SW1
1 0403
C4040 1
CRITICAL
L4020
1
LM3638A1
1.0UH-20%-0.4A-0.636OHM
K
ROOM=BACKLIGHT
15UH-20%-0.72A-0.9OHM
ROOM=BACKLIGHT
A
U4040
L4040
DSN2
PP_BL_SW2
2 PIQA20161T-SM
CRITICAL
C4043 2.2UF
2
20% VOLTAGE=25V X5R-CERM 0402-1 ROOM=MOJAVE
PMID C1
ROOM=BACKLIGHT 1 A
3 B
1
U4020
D4 IN 33
16
9
IN
9
IN
30
24
17
16
15
14
12
PP1V8_SDRAM
8
45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI 45_DWI_PMGR_TO_BACKLIGHT_SCLK 1
R4020 200K
2
A
26
16
26
16
33
8
BI
8
IN
7
IN
22
IN
1% 1/32W MF 01005
ROOM=BACKLIGHT
I2C0_AP_SDA I2C0_AP_SCL AP_TO_MUON_BL_STROBE_EN
DSBGA
CRITICAL
D3
VIO/HWEN
C2
SDI
C3
SCK
B2
SDA
A2
SCL
C4041 2.2UF
LM3539A1
VOLTAGE=35V
PP_LCM_BL_ANODE
OUT A1 SW1
C4
SW2_1 A3 SW2_2 A4 LED1 C1 LED2 B1
1
C4022
1
5% VOLTAGE=35V NP0-C0G 01005
2
100PF
2
VOLTAGE=21V
PP_LCM_BL_CAT1 PP_LCM_BL_CAT2
ROOM=BACKLIGHT
C4023
33
31
30
15
IN
28 27
3
IN
PP3V0_TRISTAR
2
MESA_TO_BOOST_EN
20% VOLTAGE=25V X5R-CERM 0402-1
ROOM=MOJAVE
10UF
20% VOLTAGE=35V X5R-CERM 0603
ROOM=BACKLIGHT
28 28
VOLTAGE=21V
D1
TRIG
D2
INHIBIT D D N N G G 3 4 B B
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
DISPLAY:POWER
BB_TO_LED_DRIVER_GSM_BURST_IND
DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
MESA POWER AND IO FILTERS D
D
MESA POWER FL4100
80-OHM-25%-1000MA PP3V1_MESA
15
1
PP3V1_MESA_CONN
2
31
0201 1
C4104
1
20% 6.3V X5R-CERM 0201
2
2.2UF
2
C4103
1
2.2UF
ROOM=MAMBA_MESA
20% 6.3V X5R-CERM 0201
C4102
2
ROOM=MAMBA_MESA
C4101
1
20% 6.3V 2 X5R-CERM 01005
2
1
ROOM=MAMBA_MESA
0.1UF
2.2UF 20% 6.3V X5R-CERM 0201
ROOM=MAMBA_MESA
ROOM=MAMBA_MESA
C4100 100PF 5% 16V NP0-C0G 01005
ROOM=MAMBA_MESA
FL4105
70-OHM-25%-0.28A 15
1
PP1V9_MESA
2
PP1V9_MESA_CONN
31
PP11V3_MESA_CONN
31
01005 1
C4106
ROOM=MAMBA_MESA
1
2.2UF
2
C4105 100PF
20% 6.3V X5R-CERM 0201
2
ROOM=MAMBA_MESA
5% 16V NP0-C0G 01005
ROOM=MAMBA_MESA
FL4107
70-OHM-25%-0.28A
C
26
3
1
PP11V3_MESA
2
C
01005 ROOM=MAMBA_MESA
1
C4107 100PF
2
5% 35V NP0-C0G 01005
ROOM=MAMBA_MESA
MESA DIGITAL I/O FL4110
120-OHM-210MA 8
IN
SPI_AP_TO_MESA_MOSI
1
SPI_AP_TO_MESA_MOSI_CONN
2
31
01005
ROOM=MAMBA_MESA
1
C4110 56PF
2
5% 16V NP0-C0G 01005 ROOM=MAMBA_MESA
R4111 8
IN
SPI_AP_TO_MESA_SCLK
1
0.00
SPI_AP_TO_MESA_SCLK_CONN
2
0% 1/32W MF 01005
B
1
2
FL4112
SPI_MESA_TO_AP_MISO
1
5% 16V NP0-C0G 01005 ROOM=MAMBA_MESA
120-OHM-210MA OUT
B
56PF
ROOM=MAMBA_MESA
8
31
C4111
SPI_MESA_TO_AP_MISO_CONN
2
31
01005
ROOM=MAMBA_MESA
1
C4112 56PF
2
5% 16V NP0-C0G 01005 ROOM=MAMBA_MESA
FL4114
120-OHM-210MA 8
OUT
MESA_TO_AP_INT
1
MESA_TO_AP_INT_CONN
2
31
01005
ROOM=MAMBA_MESA
1
C4115 100PF
2
5% 16V NP0-C0G 01005
ROOM=MAMBA_MESA
R4116 26
3
OUT
MESA_TO_BOOST_EN
1
681
MESA_TO_BOOST_EN_CONN
2
1% 1/32W MF 01005
1
2
5% 16V NP0-C0G 01005 ROOM=MAMBA_MESA
FL4143
A
31
C4116 56PF
ROOM=MAMBA_MESA
8
OUT
BUTTON_MENU_KEY_L
1
BUTTON_MENU_KEY_CONN_L
2
NOSTUFF
01005
1
C4117
ROOM=MAMBA_MESA
1
56PF
2
5% 16V NP0-C0G 01005 ROOM=MAMBA_MESA
A
SYNC_MASTER=N/A
120-OHM-210MA
MESA POWER AND IO FILTERS DRAWING NUMBER
12V-33PF
Apple Inc.
01005-1
2
SYNC_DATE=N/A
PAGE TITLE 31
DZ4101
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
DISPLAY FLEX C4201 1
C4202 1
2
20% 6.3V X5R-CERM 2 0201
20% 6.3V X5R-CERM 2 0201
ROOM=LCM_B2B
ROOM=LCM_B2B
ROOM=LCM_B2B
2.2UF
2.2UF
0201
1
ROOM=LCM_B2B
2.2UF
PP5V7_LCM_AVDDH_CONN
1
1
20% 6.3V X5R-CERM 0201
5% 16V 2 NP0-C0G 01005
CRITICAL
J4200
100PF
BM15AP-0.8-22DP-0.35V 24
ROOM=LCM_B2B
ROOM=LCM_B2B
2
29
PP1V8_LCM_CONN
1 0201
1
ROOM=LCM_B2B
C4205
1
20% 6.3V X5R-CERM 0201
5% 16V 2 NP0-C0G 01005
2.2UF
2
FL4207
28
28
DISPLAY CONTROL SIGNALS
C4206 100PF
ROOM=LCM_B2B
29
PN5V7_SAGE_AVDDN
26
2
28 28
28
PN5V7_SAGE_AVDDN_CONN
1 01005
1
ROOM=LCM_B2B
28
PN_SAGE_TO_TOUCH_VCPL
90_MIPI_AP_TO_LCM_DATA0_CONN_P 90_MIPI_AP_TO_LCM_DATA0_CONN_N 9 0_ MI PI _A P_ TO _L CM _D AT A1 _C ON N_ P 90_MIPI_AP_TO_LCM_DATA1_CONN_N
ROOM=LCM_B2B
70-OHM-25%-0.28A
D
M-ST-SM
23
FL4205
PP1V8
516S1051 (RCPT) 516S1050 (PLUG)
ROOM=LCM_B2B
C4204
C4203 2.2UF
2
28
240OHM-350MA 29 21 9 8 7 6 5 3 20 14 13 12
--->
240OHM-350MA 2
C4200 1 20% 6.3V X5R-CERM 0201
THIS ONE ON MLB
FL4200
PP5V7_LCM_AVDDH
D
1
DISPLAY CONNECTOR
DISPLAY POWER 26
2
3
LCD_TO_AP_PIFA_CONN
OUT
28
1 28
C4208
28
90_MIPI_AP_TO_LCM_CLK_CONN_P 90_MIPI_AP_TO_LCM_CLK_CONN_N
56PF
C4207
2
100PF
5% 16V 2 NP0-C0G 01005
5% 16V NP0-C0G 01005
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
PN5V7_SAGE_AVDDN_CONN 28 PP5V7_LCM_AVDDH_CONN 28 PP1V8_LCM_CONN 28 LCM_TO_CHESTNUT_PWR_EN_CONN 28 AP_TO_LCM_RESET_CONN_L 28 L CM _T O_ AP _H IF A_ BS YN C_ CO NN 28 PMU_TO_LCM_PANIC_CONN 28 LCD_TO_AP_PIFA_CONN 3 28 PP_LCM_BL_ANODE_CONN 3 28 PP_LCM_BL_CAT1_CONN 3 28 PP_LCM_BL_CAT2_CONN 3 28
25 26
ROOM=LCM_B2B
ROOM=LCM_B2B
BACKLIGHT 26
PP_LCM_BL_ANODE
FL4220
FL4211
120-OHM-210MA
240OHM-350MA 1
PP_LCM_BL_ANODE_CONN
2 0201
1
ROOM=LCM_B2B
26
3 28
16
LCM_TO_CHESTNUT_PWR_EN
OUT
2
1 01005
C4211
ROOM=LCM_B2B
5% 35V 2 NP0-C0G 01005
C
PP_LCM_BL_CAT1_CONN
2 0201
1
ROOM=LCM_B2B
8
R4220
100PF
16
PP_LCM_BL_CAT2_CONN
2
1
ROOM=LCM_B2B
PMU_TO_LCM_PANICB
IN
7
IN
90_MIPI_AP_TO_LCM_CLK_N
B
5% 16V NP0-C0G 01005
ROOM=LCM_B2B
FL4222
2
1 01005
3 28
ROOM=LCM_B2B
100PF
PMU_TO_LCM_PANIC_CONN 1
100PF
2
5% 16V NP0-C0G 01005
ROOM=LCM_B2B
SUICIDAL
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
OWL TO TOUCH INTERFACE 9 0_ MI PI _A P_ TO _L CM _C LK _C ON N_ P
FL4230
28
120-OHM-210MA 3
2
90_MIPI_AP_TO_LCM_CLK_CONN_N
28
33
29
9
8
OUT
LCM_TO_AP_HIFA_BSYNC
2
1 01005
ROOM=LCM_B2B
ROOM=LCM_B2B
CRITICAL
L4201
7
IN
90_MIPI_AP_TO_LCM_DATA0_P
7
IN
90_MIPI_AP_TO_LCM_DATA0_N
IN
90_MIPI_AP_TO_LCM_DATA1_P
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
3
2
90_MIPI_AP_TO_LCM_DATA0_CONN_P
28
90_MIPI_AP_TO_LCM_DATA0_CONN_N
28
90_MIPI_AP_TO_LCM_DATA1_CONN_P
28
FL4241 29
OUT
CUMULUS_TO_PROX_RX_EN_1V8
1
2
120-OHM-210MA 01005
CUMULUS_TO_PROX_RX_EN_1V8_CONN 1
IN
3 ROOM=LCM_B2B
2
90_MIPI_AP_TO_LCM_DATA1_CONN_N
28
20
C4241 100PF
ROOM=LCM_B2B
90_MIPI_AP_TO_LCM_DATA1_N
B
56PF
ROOM=LCM_B2B
CRITICAL
7
28
C4230
PROX TO TOUCH INTERFACE
ROOM=LCM_B2B
65-OHM-0.1A-0.7-2GHZ TAM0605 SYM_VER-2 4 1
LCM_TO_AP_HIFA_BSYNC_CONN 1
5% 2 16V NP0-C0G 01005
L4202
7
28
C4222
ROOM=LCM_B2B
L4200
9 0_ MI PI _A P_ TO _L CM _C LK _P
100PF
C4213
5% 35V 2 NP0-C0G 01005
IN
28
C4221
120-OHM-210MA
0201
7
AP_TO_LCM_RESET_CONN_L 1
2
ROOM=LCM_B2B
240OHM-350MA
DISPLAY MIPI
ROOM=LCM_B2B
1% 1/32W MF 01005
FL4213
1
1 01005
100K
ROOM=LCM_B2B
PP_LCM_BL_CAT2
2
AP_TO_LCM_RESET_L
IN
3 28
C4212
5% 35V 2 NP0-C0G 01005
26
C
FL4221
120-OHM-210MA
240OHM-350MA 1
5% 16V NP0-C0G 01005
ROOM=LCM_B2B
ROOM=LCM_B2B
PP_LCM_BL_CAT1
28
C4220 100PF
2
FL4212
26
LCM_TO_CHESTNUT_PWR_EN_CONN 1
100PF
2
5% 16V NP0-C0G 01005
ROOM=LCM_B2B
A
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
DISPLAY FLEX DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
D403 (B2B,DRIVER ICS)
29
28
4
3
2
SAGE2 C0
PN_SAGE_TO_TOUCH_VCPL -12V
1
C4307
1
0.1UF
2
10% 16V X5R-CERM 0201
C4308
1
0.1UF
2
C4309
1
1UF
10% 16V X5R-CERM 0201
ROOM=SAGE
2
ROOM=SAGE
C4311
1
1UF
10% 16V X6S-CERM 0402
2
ROOM=SAGE
APN: 343S0645 (CD3246C0, T6)
C4316 1UF
10% 16V X6S-CERM 0402
10% 16V X6S-CERM 0402
2
ROOM=SAGE
29
PP_SAGE_TO_TOUCH_VCPH 13.5V
ROOM=SAGE
C4324 1 10% 16V X5R-CERM 0201
R4307 28
26
PN5V7_SAGE_AVDDN
4.7
1
1
C4312
2
10UF
20% 10V X5R-CERM 0402-1
1
1
2
PP_CUMULUS_VDDANA
ROOM=CUMULUS
14
29
1
4.7UF
2
2
R4301
1000PF 1
2
45_PROX_TO_CUMULUS_RX_FILT
10% 6.3V X5R-CERM 01005
1 1% 1/32W
22.1K
2 MF 01005
ROOM=CUMULUS
C4303 1 27PF
5% 16V NP0-C0G 01005
2
ROOM=CUMULUS
PP4301
P2MM-NSM PP 1
ROOM=CUMULUS
SM
PP4302 ROOM=CUMULUS
8 8 8 8
8
P2MM-NSM PP 1
VDDIO
U4301
R4304
1 A
ROOM=CUMULUS
O D L D D V
1
220K 2
5% 1/32W
MF 01005
R4302
1 MF 01005
2
10.2
29
SM
TOUCH_TO_SAGE_SENSE_IN<12>
A4
SNS_IN4
SAGE_TO_CUMULUS_IN<12>
29
29
TOUCH_TO_SAGE_SENSE_IN<7>
A6
SNS_IN5
SNS_OUT4 A5 SNS_OUT5 A7
SAGE_TO_CUMULUS_IN<7>
29
29
TOUCH_TO_SAGE_SENSE_IN<10>
B6
SNS_IN6
SNS_OUT6
B7
SAGE_TO_CUMULUS_IN<10>
29
29
TOUCH_TO_SAGE_SENSE_IN<1>
C6
SNS_OUT7
C7
SAGE_TO_CUMULUS_IN<1>
29
TOUCH_TO_SAGE_SENSE_IN<11>
D6
SNS_OUT8
D7
SAGE_TO_CUMULUS_IN<11>
29
29
TOUCH_TO_SAGE_SENSE_IN<2>
E6
SNS_OUT9
E7
SAGE_TO_CUMULUS_IN<2>
29
29
TOUCH_TO_SAGE_SENSE_IN<13>
E8
E9
SAGE_TO_CUMULUS_IN<13>
29
29
TOUCH_TO_SAGE_SENSE_IN<14>
D8
D9
SAGE_TO_CUMULUS_IN<14>
29
29
TOUCH_TO_SAGE_SENSE_IN<8>
29 29
AA21
M-ST-SM 44
C8
SNS_IN12
SNS_OUT12
C9
SAGE_TO_CUMULUS_IN<8>
29
TOUCH_TO_SAGE_SENSE_IN<9>
B8
SNS_IN13
SNS_OUT13
B9
SAGE_TO_CUMULUS_IN<9>
29
TOUCH_TO_SAGE_SENSE_IN<6>
A8
SNS_IN14
SNS_OUT14 A9
SAGE_TO_CUMULUS_IN<6>
29
29 29
B6 IN4_0 A8 IN5_0
VSTM_4
E7
CUMULUS_TO_SAGE_VSTM_OUT<17>
29
VSTM_5
F8
CUMULUS_TO_SAGE_VSTM_OUT<11>
SAGE_TO_CUMULUS_IN<3>
B5 IN6_0
VSTM_6
G9
CUMULUS_TO_SAGE_VSTM_OUT<13>
SAGE_TO_CUMULUS_IN<5>
B4 IN7_0 A7 IN8_0 B3 IN9_0
VSTM_7
D6
CUMULUS_TO_SAGE_VSTM_OUT<7>
VSTM_8
D7
CUMULUS_TO_SAGE_VSTM_OUT<3> CUMULUS_TO_SAGE_VSTM_OUT<9>
29
SAGE_TO_CUMULUS_IN<9>
29
SAGE_TO_CUMULUS_IN<0>
29
SAGE_TO_CUMULUS_IN<14>
29
SAGE_TO_CUMULUS_IN<10>
29
SAGE_TO_CUMULUS_IN<13>
29
SAGE_TO_CUMULUS_IN<11>
29
SAGE_TO_CUMULUS_IN<12>
DRV_OUT1
H6
SAGE_TO_TOUCH_VSTM_OUT<6>
29
CUMULUS_TO_SAGE_VSTM_OUT<12>
J1
DRV_IN2
DRV_OUT2
J6
SAGE_TO_TOUCH_VSTM_OUT<12>
29
CUMULUS_TO_SAGE_VSTM_OUT<1>
K1
DRV_IN3
DRV_OUT3
K6
SAGE_TO_TOUCH_VSTM_OUT<1>
29
29
CUMULUS_TO_SAGE_VSTM_OUT<7>
L1
DRV_IN4
DRV_OUT4
L6
SAGE_TO_TOUCH_VSTM_OUT<7>
29
29
29
CUMULUS_TO_SAGE_VSTM_OUT<15>
G2
DRV_IN5
DRV_OUT5
G7
SAGE_TO_TOUCH_VSTM_OUT<15>
29
29
29
CUMULUS_TO_SAGE_VSTM_OUT<14>
H2
DRV_IN6
DRV_OUT6
H7
SAGE_TO_TOUCH_VSTM_OUT<14>
29
29
29
CUMULUS_TO_SAGE_VSTM_OUT<18>
J2
DRV_IN7
DRV_OUT7
J7
SAGE_TO_TOUCH_VSTM_OUT<18>
29
29
CUMULUS_TO_SAGE_VSTM_OUT<5>
K2
DRV_IN8
DRV_OUT8
K7
SAGE_TO_TOUCH_VSTM_OUT<5>
29
L7
SAGE_TO_TOUCH_VSTM_OUT<9>
29
29
L2
THESE ARE ROUTED TOGETHER
VSTM_9 VSTM_10
F9
CUMULUS_TO_SAGE_VSTM_OUT<10>
VSTM_11
D5
CUMULUS_TO_SAGE_VSTM_OUT<1>
29
A5 IN12_0 A4 IN13_0
VSTM_12
F6
CUMULUS_TO_SAGE_VSTM_OUT<4>
VSTM_13
F5
B2 IN14_0 A2 IN14_1
VSTM_14
DRV_IN10
DRV_OUT10
SAGE_TO_TOUCH_VSTM_OUT<10>
29
CUMULUS_TO_SAGE_VSTM_OUT<4>
K3
DRV_IN11
DRV_OUT11
K8
SAGE_TO_TOUCH_VSTM_OUT<4>
29
29
29
CUMULUS_TO_SAGE_VSTM_OUT<19>
J3
DRV_IN12
DRV_OUT12
J8
SAGE_TO_TOUCH_VSTM_OUT<19>
29
CUMULUS_TO_SAGE_VSTM_OUT<8>
29
29
CUMULUS_TO_SAGE_VSTM_OUT<13>
H3
DRV_IN13
DRV_OUT13
H8
SAGE_TO_TOUCH_VSTM_OUT<13>
29
G4
CUMULUS_TO_SAGE_VSTM_OUT<12>
29
29
CUMULUS_TO_SAGE_VSTM_OUT<16>
G3
DRV_IN14
DRV_OUT14
G8
SAGE_TO_TOUCH_VSTM_OUT<16>
29
VSTM_15
E8
CUMULUS_TO_SAGE_VSTM_OUT<0>
29
29
CUMULUS_TO_SAGE_VSTM_OUT<3>
L4
DRV_IN15
DRV_OUT15
L9
SAGE_TO_TOUCH_VSTM_OUT<3>
29
VSTM_16
G8
CUMULUS_TO_SAGE_VSTM_OUT<15>
29
29
CUMULUS_TO_SAGE_VSTM_OUT<2>
K4
DRV_IN16
DRV_OUT16
K9
SAGE_TO_TOUCH_VSTM_OUT<2>
29
E4 H_CS* F1 H_INT*
VSTM_17
G7
CUMULUS_TO_SAGE_VSTM_OUT<19>
29
29
CUMULUS_TO_SAGE_VSTM_OUT<0>
J4
DRV_IN17
DRV_OUT17
J9
SAGE_TO_TOUCH_VSTM_OUT<0>
29
VSTM_18
G6
CUMULUS_TO_SAGE_VSTM_OUT<14>
29
29
CUMULUS_TO_SAGE_VSTM_OUT<11>
H4
DRV_IN18
DRV_OUT18
H9
SAGE_TO_TOUCH_VSTM_OUT<11>
29
D3
VSTM_19
G5
CUMULUS_TO_SAGE_VSTM_OUT<6>
29
CUMULUS_TO_SAGE_VSTM_OUT<17>
G4
DRV_IN19
DRV_OUT19
G9
SAGE_TO_TOUCH_VSTM_OUT<17>
D3
VBIAS
BSYNC
K5
H_SCLK
H_SDI E1 H_SDO
GPIO_1/CK G1
29
C4
JTAG_TCK
GPIO_2/SD D4 GPIO_3 F2
C3
JTAG_TDI
GPIO_4 F3
E2 JTAG_TDO C6 JTAG_TMS
D1
CLKIN/RESET*
D9
RSTOVR*
SAGE_VBIAS
NOTE: LCM_TO_AP_HIFA_BSYNC_BUFF CUMULUS_TO_SAGE_BOOST_EN 29 SM 1 U12_GPIO_3 PP P4MM-NSM ROOM=CUMULUS CUMULUS_TO_SAGE_GCM_SEL 29
PP4303
29
SAGE_TO_TOUCH_VCPH_REF
29
SAGE_TO_TOUCH_VCPL_REF
C4310 1 0.01UF
TM_ACS*
C2
TM_OVR
G3
CUMULUS_TO_PROX_RX_EN_1V8
10% 6.3V X5R 2 01005
28
ROOM=SAGE
R4303
A2
C4313 1
C4318 1
0.01UF
0.1UF
10% 6.3V X5R 2 01005
ROOM=SAGE
10% 6.3V CERM-X5R 2 0201
TOUCH_TO_SAGE_SENSE_IN<5>
TOUCH_TO_SAGE_SENSE_IN<6>
C4
29
TOUCH_TO_SAGE_SENSE_IN<4>
C0
29
TOUCH_TO_SAGE_SENSE_IN<0>
29
TOUCH_TO_SAGE_SENSE_IN<3>
SAGE_TO_TOUCH_VCPH_REF
29
C6
TOUCH_TO_SAGE_SENSE_IN<13>
29
GS3
TOUCH_TO_SAGE_SENSE_IN<7>
29
GS1
29
TOUCH_TO_SAGE_SENSE_IN<11>
SAGE_TO_TOUCH_VCPL_REF
C7
29
VGH_REF
29
VGL_REF
C2
29
TOUCH_TO_SAGE_SENSE_IN<2>
29
VCOM
C1
29
TOUCH_TO_SAGE_SENSE_IN<1>
GS0
29
TOUCH_TO_SAGE_SENSE_IN<10>
TOUCH_TO_SAGE_VCM_IN TOUCH_TO_SAGE_SENSE_IN<12>
29
GS2
TOUCH_TO_SAGE_SENSE_IN<9>
29
C9
28
PN_SAGE_TO_TOUCH_VCPL
TOUCH_TO_SAGE_SENSE_IN<8>
29
C8
VGH
29
PP_SAGE_TO_TOUCH_VCPH
TOUCH_TO_SAGE_SENSE_IN<14>
29
GS4
R10
29
SAGE_TO_TOUCH_VSTM_OUT<10>
R7
29
SAGE_TO_TOUCH_VSTM_OUT<7>
SAGE_TO_TOUCH_VSTM_OUT<17>
29
R17
R1
29
SAGE_TO_TOUCH_VSTM_OUT<1>
SAGE_TO_TOUCH_VSTM_OUT<16>
29
R16
R5
29
SAGE_TO_TOUCH_VSTM_OUT<5>
SAGE_TO_TOUCH_VSTM_OUT<15>
29
R15
R6
29
SAGE_TO_TOUCH_VSTM_OUT<6>
SAGE_TO_TOUCH_VSTM_OUT<14>
29
R14
R8
29
SAGE_TO_TOUCH_VSTM_OUT<8>
SAGE_TO_TOUCH_VSTM_OUT<13>
29
R13
R9
29
SAGE_TO_TOUCH_VSTM_OUT<9>
SAGE_TO_TOUCH_VSTM_OUT<12>
29
R12
R4
29
SAGE_TO_TOUCH_VSTM_OUT<4>
SAGE_TO_TOUCH_VSTM_OUT<11>
29
R11
R3
29
SAGE_TO_TOUCH_VSTM_OUT<3>
SAGE_TO_TOUCH_VSTM_OUT<0>
29
R0_RIGHT
R2
29
SAGE_TO_TOUCH_VSTM_OUT<2>
SAGE_TO_TOUCH_VSTM_OUT<18>
29
R18
R0_LEFT
29
SAGE_TO_TOUCH_VSTM_OUT<0>
SAGE_TO_TOUCH_VSTM_OUT<19>
29
R19
VCPH_REF/EN
F2
VCPL_REF/EN
PP_SAGE_VBST_OUTH
B1
VBST_OUTH
PN_SAGE_VBST_OUTL
E1
ROOM=SAGE
PP_SAGE_LX
C1
PP_SAGE_LY
D1
5% 1/32W MF 01005
L_Y
PP1V8_TOUCH
14
C4314 1
29
0.33UF
26
C4319 1
28
10% 25V X7R-CERM 0201
F7
VCM_IN
J5
1 2 3 4 5 6 D D D D D D N N N N N N G G G G G G A A A A A A
BOOST_EN
B2
LCM_TO_AP_HIFA_BSYNC
8 9
CUMULUS_TO_SAGE_GCM_SEL
C
1
SM PP
PP4306 P4MM-NSM ROOM=SAGE
29
28 2 9
33
1
SM PP
PP4305 P4MM-NSM ROOM=SAGE
29
NC
TOUCH_TO_SAGE_VCM_IN
29
B
NC NC
CUMULUS_TO_SAGE_BOOST_EN
29
1
2 3 4 8 3 5 C B F F E L
SM PP
PP4304 P4MM-NSM ROOM=SAGE
C4321 1
1000PF
20% 20V 2 TANT 0402
F9
GO
I2C_SCL F5 I2C_SDA G5
L_X
1
ROOM=CUMULUS
GCM_TEST
VBST_OUTL
100K
1000PF
L4301
10% 25V X7R-CERM 2 0201
2
ROOM=SAGE
10UH-0.32A-1.56OHM PSB12101T-SM
ROOM=SAGE
ROOM=SAGE
PP5V7_SAGE_AVDDH 2
TOUCH B2B
29
DRV_OUT9
29
SPECIAL - CANNOT SWAP
L3
DRV_IN9
L8
SPECIAL - CANNOT SWAP
29
C5
29
DRV_IN1
A6 IN10_0 A3 IN11_0
E3 BCFG_RTCK
AP_TO_TOUCH_RESET_L
SAGE_TO_TOUCH_VSTM_OUT<8>
H1
D8
TOUCH_TO_AP_SPI1_MISO_R
CUMULUS_TO_PROX_TX_EN_1V8_L
G6
DRV_OUT0
ROOM=TOUCH_B2B
J4300
SNS_OUT11
29
45_AP_TO_TOUCH_CLK32K_RESET_L_XW 8
SNS_IN11
29
SAGE_TO_CUMULUS_IN<8>
SNS_IN9
SNS_OUT10
CUMULUS_TO_SAGE_VSTM_OUT<18>
29
SNS_IN8 SNS_IN10
CUMULUS_TO_SAGE_VSTM_OUT<16>
29
SNS_IN7
DRV_IN0
ROOM=SAGE
29
29
29
E6
GND
VGL
29
SAGE_TO_CUMULUS_IN<0>
F7
7 9 2 C C G
A
29
SAGE_TO_CUMULUS_IN<5>
B5
VSTM_3
PP1V8_CUMULUS_VDDLDO
29
2
ROOM=CUMULUS
C3
29
SAGE_TO_CUMULUS_IN<3>
C5
SNS_OUT3
VSTM_2
1% 1/32W
XW4301
43
SAGE_TO_CUMULUS_IN<4>
D5
SNS_OUT2
D2
SPI_TOUCH_TO_AP_MISO
516S1071 PLUG 516S1070 RCPT
E5
SNS_OUT1
WLBGA
NC
ON MLB -> ON FLEX->
SNS_OUT0
CUMULUS_TO_SAGE_VSTM_OUT<6>
29
CSP ROOM=SAGE
SNS_IN3
29
SAGE_TO_CUMULUS_IN<4>
21
20% 6.3V X5R-CERM 01005
SNS_IN2
29
29
20
ROOM=SAGE
B4
CUMULUS_TO_SAGE_VSTM_OUT<5>
A9 IN2_0 B7 IN3_0
14
C4327
C4
E5
SAGE_TO_CUMULUS_IN<7>
2
TOUCH_TO_SAGE_SENSE_IN<0>
VSTM_1
SAGE_TO_CUMULUS_IN<6>
13
0.1UF
O I D D V
TOUCH_TO_SAGE_SENSE_IN<5>
CUMULUS-C1
29
9 12
29
CUMULUS_TO_SAGE_VSTM_OUT<8>
29
8
29
29
SAGE_TO_CUMULUS_IN<1>
7
SNS_IN1
29
29
6
SNS_IN0
CUMULUS_TO_SAGE_VSTM_OUT<2>
B9 IN0_0 B8 IN1_0
45_PROX_TO_CUMULUS_RX_IN
1
5 4 C F
H D D V
1
5
E4
E9
SAGE_TO_CUMULUS_IN<2>
SPI_AP_TO_TOUCH_CS_L TOUCH_TO_AP_INT_L SPI_AP_TO_TOUCH_SCLK SPI_AP_TO_TOUCH_MOSI
45_AP_TO_TOUCH_CLK32K_RESET_L
E R O C D D V
8 C
F _ L P C V
3
D4
VSTM_0
29
SM
B
1 C
L P C V
3 C
TOUCH_TO_SAGE_SENSE_IN<3>
G1
ROOM=CUMULUS
8
1 B
H P C V
2 E
TOUCH_TO_SAGE_SENSE_IN<4>
ROOM=CUMULUS
ROOM=CUMULUS
1 L D D V A
1 F
29
29
20% 6.3V X5R-CERM1 402
20
C4301
20% 6.3V X5R 0201-1
C4305
A N A D D V
ROOM=CUMULUS
C
C4306
4.7UF
ROOM=CUMULUS
45_PROX_TO_CUMULUS_RX
1 2 3 4 H H H H D D D D D D D D V V V V A A A A
1 A
29
ROOM=CUMULUS
20% 6.3V X5R-CERM1 402
10UF
20% 10V X5R-CERM 2 0402-4
TO CLAMP THE NEGATIVE RAIL
5 H
SAGE2-C06 PP1V8_TOUCH
2
1.0UF
C4304
C4323 1
ROOM=SAGE
2 3 3 6 D A F F
U4300
PP1V8_CUMULUS_VDDLDO
PP_CUMULUS_VDDCORE
1
D PP1V8
5.45-5.98V
ROOM=SAGE
SM
20% 10V X5R-CERM 0402-1
2
PP5V7_SAGE_AVDDH
26
GDZ-0201
K
ROOM=SAGE
ROOM=CUMULUS
2
29
DZ4301
GDZT2R6.2B
20% 10V X5R-CERM 0402-1
2
ROOM=SAGE
XW4302 29
10UF
10% 25V X5R-CERM 0201
ROOM=SAGE
343S0638
C4302
0.01UF
ROOM=SAGE
A
C4317
1
10UF
ROOM=SAGE
1
C4326 1
PN5V7_SAGE_AVDDN_INT
2
CUMULUS C1 PP5V1_GRAPE_VDDH
3.5V
0.1UF
10% 16V X5R-CERM 2 0201
2
ROOM=SAGE
1% 1/32W MF 01005
26
PP_SAGE_VCPL_F
C4325 1
0.1UF
(TURN ON LATER THAN PP1V8_TOUCH) (TURN OFF SAME TIME AS PP1V8_TOUCH)
1
0603-LLP TANT 25V 20%
2
C4315
1
C4320 1 1000PF
1UF-10OHM
ROOM=SAGE
10% 25V X7R-CERM 0201
ROOM=SAGE
C4322 1 1000PF 10% 25V X7R-CERM 0201
2
2
ROOM=SAGE
PP1V8_TOUCH
100K 5% 1/32W
20
CUMULUS_TO_PROX_TX_EN_BUFF
6 1Y
1A 1
4 2Y
2A 3 GND
PAGE TITLE
D403 (TOUCH B2B, DRIVER ICS)
100K
74AUP2G3404GN SOT1115 LCM_TO_AP_HIFA_BSYNC_BUFF
A
29
R4306
U4302
R4305
14
ROOM=CUMULUS
5
VCC
5% 1/32W MF 01005
DRAWING NUMBER
Apple Inc. LCM_TO_AP_HIFA_BSYNC
CUMULUS_TO_PROX_TX_EN_1V8_L
8 9
28 2 9
33
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
29
SIZE
D
8
7
6
5
4
3
2
1
D
D
TRISTAR 2 (A3) APN:343S0695 33
31
26
15
PP3V0_TRISTAR
PP3V3_ACC
PP5V0_USB
3 17
31
15 3
1
C4500 1.0UF
20% 6.3V 2 X5R 0201-1
ROOM=TRISTAR
1
C4501 0.1UF
20% 6.3V 2 X5R-CERM 01005
33
26
24
17
16
15
14
12
8
D
PP1V8_SDRAM 1
ROOM=TRISTAR
Q4500
C4502 0.01UF
REVERSE_GATE
10% 6.3V 2 X5R 01005
C
3 F
ROOM=TRISTAR
8 V 1 _ D D V
4 F 0 V 3 _ D D V
5 D
1
CSD68822F4
G
0402
C
ROOM=TRISTAR
CRITICAL
S
R4500
ROOM=TRISTAR
10K
R W P _ C C A
CRITICAL
2
5% 1/32W MF 01005
ROOM=TRISTAR
U4500
CBTL1610A3UK
R4510 16
OUT
TRISTAR_TO_PMU_USB_BRICK_ID
1 1
C4510 0.01UF
10% 6.3V 2 X5R 01005
ROOM=PMU
23
BI
23
BI
33
BI
33
BI
6.34K
C4 A1
90_USB_BB_DATA_P 90_USB_BB_DATA_N
B1 C2
TRISTAR_USB_BRICK_ID_R
2
1% 1/32W MF 01005
C3
90_MIKEYBUS_DATA_P 90_MIKEYBUS_DATA_N
5
BI
5
BI
ROOM=PMU 8
IN
8
OUT
8
IN
8
OUT
A3
90_USB_AP_DATA_P 90_USB_AP_DATA_N
B3
UART_AP_TO_ACCESSORY_TXD UART_ACCESSORY_TO_AP_RXD
E2
UART_AP_DEBUG_TXD UART_AP_DEBUG_RXD
F2
E1
F1 D2 D1 NC
B
5
OUT
5
BI
SWD_DOCK_TO_AP_SWCLK SWD_DOCK_BI_AP_SWDIO
A5 B5
DIG_DP
WLCSP
DIG_DN
P_IN F6 ACC1 C5 ACC2
USB1_DP USB1_DN BRICK_ID USB0_DP USB0_DN
E5
PP_TRISTAR_PIN PP_TRISTAR_ACC1 PP_TRISTAR_ACC2
3 31
90_TRISTAR_DP1_CONN_P 90_TRISTAR_DP1_CONN_N
BI
3 31
BI
3 31
DP2 A4 DN2 B4
90_TRISTAR_DP2_CONN_P 90_TRISTAR_DP2_CONN_N
BI
3 31
BI
3 31
CON_DET_L
E3
TRISTAR_CON_DETECT_L
POW_GATE_EN*
D6
TRISTAR_TO_TIGRIS_VBUS_OFF
UART1_TX
SWITCH_EN
E4
UART1_RX
HOST_RESET
B6
PMU_TO_OWL_ACTIVE_READY TRISTAR_TO_PMU_HOST_RESET
UART2_TX
SDA
D3
SCL
D4
UART2_RX
INT C6 E6
JTAG_CLK
BYPASS
JTAG_DIO S S S S S S V V V D D D 5 1 6 F C A
IN
I2C1_AP_SDA I2C1_AP_SCL TRISTAR_TO_AP_INT TRISTAR_BYPASS
C4503 1UF
DP1 A2 B2
UART0_RX
UART0_TX
1
3 31
DN1
OUT
IN OUT
IN BI OUT
2
20% 16V CER-X5R 0201 ROOM=TRISTAR
3 31
17
30
5 9
16
26
16
8 17 8 17
25 25
8 16
B 1
C4504 1.0UF
20% 2 6.3V X5R 0201-1
ROOM=TRISTAR
PP4500 30
17
TRISTAR_TO_TIGRIS_VBUS_OFF
P3MM-NSM SM 1 PP
ROOM=TRISTAR
A
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
I/O:TRISTAR 2 DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
3
ANTENNA 33
30
26
PP3V0_TRISTAR
15
R4600
THIS ONE ON MLB
FL4620
HPHONE_TO_CODEC_DETECT
1
HPHONE_TO_CODEC_DETECT_CONN
2
5% 1/32W MF 01005
D
2
PP3V0_LAT_CONN
CRITICAL
J4600
5% 16V NP0-C0G 01005
2
56PF
AA27D-S038VA1 F-ST-SM
40
ROOM=DOCK_B2B
5% 2 16V NP0-C0G 01005
31
SPEAKERAMP_TO_SPEAKER_OUT_POS
25
ROOM=DOCK_B2B
NC
1
CODEC_TO_HPHONE_HS3_CONN
2
31
1
DZ4600
1
01005
10% 10V 2 X7R-CERM 01005
6.8V-100PF ROOM=DOCK_B2B
2
NO_XNET_CONNECTION=1
C4699
27
220PF
27
ROOM=DOCK_B2B
FL4601
31
FERR-33-OHM-0.8A-0.09-OHM BI
CODEC_TO_HPHONE_HS4
1
31
CODEC_TO_HPHONE_HS4_CONN
2 0201
1
ROOM=DOCK_B2B
DZ4601
6.8V-100PF
01005 2 ROOM=DOCK_B2B NO_XNET_CONNECTION=1
1
31
31
31
C4698
FL4608
220PF
10% 2 10V X7R-CERM 01005
33
ROOM=DOCK_B2B
FL4602
IN
BB_LAT_GPIO2
1
OUT
CODEC_TO_HPHONE_HS4_REF
1
1
BB_LAT_GPIO2_CONN 1
2
01005 2 ROOM=DOCK_B2B NO_XNET_CONNECTION=1
CODEC_TO_HPHONE_HS3_REF
24
5% 16V NP0-C0G 01005
1
33
CODEC_TO_HPHONE_HS3_REF_CONN
2 0201
1
ROOM=DOCK_B2B
BB_LAT_GPIO1
IN
1
2
30
BB_LAT_GPIO1_CONN
01005 31
ROOM=DOCK_B2B
1
C4624 56PF
DZ4603
5% 2 16V NP0-C0G 01005
6.8V-100PF 01005
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
42
41
PP3V1_MESA_CONN MESA_TO_BOOST_EN_CONN SPI_AP_TO_MESA_SCLK_CONN BUTTON_MENU_KEY_CONN_L SPI_AP_TO_MESA_MOSI_CONN MESA_TO_AP_INT_CONN HPHONE_TO_CODEC_DETECT_CONN PP3V0_LAT_CONN BB_LAT_GPIO2_CONN BB_LAT_GPIO1_CONN
D 27 27 27 27 27 27 31 31 31 31
90_TRISTAR_DP1_CONN_P 90_TRISTAR_DP1_CONN_N 90_TRISTAR_DP2_CONN_N 90_TRISTAR_DP2_CONN_P TRISTAR_CON_DETECT_CONN_L PP_TRISTAR_ACC1_CONN PP_TRISTAR_ACC2_CONN
BI
3 30
BI
3 30
BI
3 30
BI
3 30
31 31 31
VOLTAGE=5.0V
FL4624
120-OHM-210MA
FL4603
OUT
31
CODEC_TO_HPHONE_L_CONN CODEC_TO_HPHONE_HS4_REF_CONN CODEC_TO_HPHONE_R_CONN CODEC_TO_HPHONE_HS3_CONN CODEC_TO_HPHONE_HS4_CONN CODEC_TO_HPHONE_HS3_REF_CONN LOWERMIC1_TO_CODEC_AIN1_CONN_P LOWERMIC1_TO_CODEC_AIN1_CONN_N PP_CODEC_TO_LOWERMIC1_BIAS_CONN LOWERMIC1_BIAS_FILT_RET
39
2
ROOM=DOCK_B2B
600-OHM-25%-0.28A-0.75OHM 23
C4601 56PF
31
DZ4602
6.8V-100PF
C
31 31 31
ROOM=DOCK_B2B
CODEC_TO_HPHONE_HS4_REF_CONN
2 0201
ROOM=DOCK_B2B
2
31
01005
600-OHM-25%-0.28A-0.75OHM 23
31
120-OHM-210MA
NC
SPEAKERAMP_TO_SPEAKER_OUT_NEG PP11V3_MESA_CONN PP1V9_MESA_CONN SPI_MESA_TO_AP_MISO_CONN
25
31 27
0201
ROOM=DOCK_B2B
23
516S00116 (RCPT)
ROOM=DOCK_B2B
100PF
31
C4600
1
FL4600
CODEC_TO_HPHONE_HS3
--->
31
C4620
1
ROOM=DOCK_B2B
FERR-33-OHM-0.8A-0.09-OHM BI
1
516S00117 (PLUG)
1 01005
3.3K
ROOM=DOCK_B2B
23
2
120-OHM-210MA
AUDIO JACK OUT
4
DOCK FLEX CONNECTOR
DOCK FLEX CONNECTOR 23
5
ROOM=DOCK_B2B
31
17
3
PP5V0_USB
C4650 1
C4651 1
C4652 1
C4653 1
C4654 1
10% 25V 2 X5R 0201
10% 25V 2 X5R 0201
10% 25V 2 X5R 0201
5% 25V NP0-C0G-CERM 2 01005
5% 35V NP0-C0G 2 01005
ROOM=DOCK_B2B
ROOM=DOCK_B2B
0.1UF
ROOM=DOCK_B2B
0.1UF
ROOM=DOCK_B2B
0.1UF
56PF
100PF
ROOM=DOCK_B2B
C4655 1 220PF
10% 25V X7R-CERM 0201
C
2
ROOM=DOCK_B2B
ROOM=DOCK_B2B
NO_XNET_CONNECTION=1
FL4604
FERR-33-OHM-0.8A-0.09-OHM 23
IN
CODEC_TO_HPHONE_L
1
CODEC_TO_HPHONE_L_CONN
2 0201
1
ROOM=DOCK_B2B
DZ4604
1
01005
10% 10V 2 X7R-CERM 01005
6.8V-100PF
2 ROOM=DOCK_B2B NO_XNET_CONNECTION=1
31
C4697 220PF
TRISTAR
ROOM=DOCK_B2B
FL4605
R4640
FERR-33-OHM-0.8A-0.09-OHM 23
IN
CODEC_TO_HPHONE_R
1
CODEC_TO_HPHONE_R_CONN
2 0201
1
ROOM=DOCK_B2B
DZ4610
1
01005
10% 2 10V X7R-CERM 01005
6.8V-100PF
2 ROOM=DOCK_B2B NO_XNET_CONNECTION=1
LOWER MIC1
31
30
B
LOWERMIC1_TO_CODEC_AIN1_CONN_P
1 01005
1
ROOM=DOCK_B2B
LOWERMIC1_TO_CODEC_AIN1_N
2
C4610 56PF
ROOM=DOCK_B2B
31
25
24
PP_CODEC_TO_LOWERMIC1_BIAS
2
1 01005 ROOM=DOCK_B2B
31
2
5% 16V NP0-C0G 01005
30
3
PP_TRISTAR_ACC2
1
25
01005 ROOM=DOCK_B2B
B
ROOM=DOCK_B2B
PP_TRISTAR_ACC2_CONN
2
31
C4642
1
100PF
5% 16V NP0-C0G 01005
2
SPEAKERAMP_TO_SPEAKER_OUT_NEG
31
100PF
ROOM=DOCK_B2B
1
ROOM=DOCK_B2B
1
5% 16V NP0-C0G 01005
C4641
10-OHM-1.1A
C4634 100PF
PP_TRISTAR_ACC1_CONN 1
ROOM=DOCK_B2B
C4611
PP_CODEC_TO_LOWERMIC1_BIAS_CONN
ROOM=DOCK_B2B
2
FL4642
31
5% 16V 2 NP0-C0G 01005
FL4612
1
SPEAKERAMP_TO_SPEAKER_OUT_POS 1
56PF
120-OHM-210MA
5% 2 16V NP0-C0G 01005
01005
2
LOWERMIC1_TO_CODEC_AIN1_CONN_N 1
PP_TRISTAR_ACC1
31
C4640 27PF
ROOM=DOCK_B2B
ROOM=DOCK_B2B
1 01005
3
SPEAKER
31
5% 16V 2 NP0-C0G 01005
FL4611
OUT
1
FL4641
120-OHM-210MA 23
TRISTAR_CON_DETECT_CONN_L
1
10-OHM-1.1A 30
2
1.00K
ROOM=DOCK_B2B
ROOM=DOCK_B2B
LOWERMIC1_TO_CODEC_AIN1_P
2
5% 1/32W MF 01005
FL4610
OUT
TRISTAR_CON_DETECT_L
OUT
220PF
120-OHM-210MA 23
3
C4696
2
C4635 100PF
5% 16V NP0-C0G 01005 ROOM=DOCK_B2B
31
C4612 100PF
2
5% 16V NP0-C0G 01005
ROOM=DOCK_B2B
A
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
I/O:DOCK FLEX B2B DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
BUTTON FLEX BUTTON FLEX CONNECTOR 516S1040 (PLUG) THIS ONE ON MLB
FL4700
D
--->
516S1041 (RCPT)
D
120-OHM-210MA 24
2
PP_CODEC_TO_REARMIC2_BIAS
1
PP_CODEC_TO_REARMIC2_BIAS_CONN
01005
BUTTON_B2B CRITICAL
J4700
C4700
1
ROOM=BUTTON_B2B
32
205847-018
100PF
F-ST-SM
5% 16V NP0-C0G 01005
2
20 19
ROOM=BUTTON_B2B 32
PP_LED_DRIVER_WARM_LED
22
2
1
4
3
6
5
8
7
10
9
12
11
14
13
FL4701
120-OHM-210MA
MIC2 ANC REF MIC
23
OUT
2
REARMIC2_TO_CODEC_AIN3_P
1
REARMIC2_TO_CODEC_AIN3_CONN_P
01005 ROOM=BUTTON_B2B
1
32
32
C4701 56PF
15
5% 2 16V NP0-C0G 01005
PP3V1_VIBE 32
1
ROOM=BUTTON_B2B
FL4702
OUT
2
REARMIC2_TO_CODEC_AIN3_N
C4714
1
5% 16V NP0-C0G 01005
2
100PF
2
120-OHM-210MA 23
REARMIC2_TO_CODEC_AIN3_CONN_N
C4715
1
5% 16V NP0-C0G 01005
2
100PF
BUTTON_B2B
1
BUTTON_HOLD_KEY_CONN_L
C4716 4.7UF
BUTTON_B2B
20% 6.3V X5R-CERM1 402
32
BUTTON_RINGER_A_CONN BUTTON_VOL_DOWN_CONN_L
16 18
LED_MODULE_NTC_CONN 32 PP_CODEC_TO_REARMIC2_BIAS_CONN 32 REARMIC2_TO_CODEC_AIN3_CONN_P 32 REARMIC2_TO_CODEC_AIN3_CONN_N 32
VIBE_RETURN BUTTON_VOL_UP_CONN_L 32
15 17
K
D4701 LLP-DFN1006-2
21
A
PP_LED_DRIVER_COOL_LED 22
22
BAS40LP
BUTTON_B2B
32
BUTTON_B2B
32
01005 1
ROOM=BUTTON_B2B
C4702
3
56PF
5% 16V 2 NP0-C0G 01005
D
XW4701
Q4701
SM
ROOM=BUTTON_B2B
AP_TO_VIBE_TRIG
1
8
C
2
VIBE_PWM_G
1
G S
R4701
1
DFN1006H4-3
2
BUTTON_B2B
10K
C4703 100PF
DMN3730UFB4 SYM_VER_1
C
5% 16V NP0-C0G 01005
BUTTON_B2B
1% 1/32W MF 2 01005
2
BUTTON_B2B
32
22
PP_LED_DRIVER_WARM_LED
C4724
1
C4723 1
27PF
100PF
5% 2 16V NP0-C0G 01005
5% 16V NP0-C0G 2 01005
ROOM=BUTTON_B2B
ROOM=BUTTON_B2B
R4710 8
OUT
BUTTON_HOLD_KEY_L
1
0.00
BUTTON_HOLD_KEY_CONN_L
2
0% 1/32W MF 01005
C4710 1 27PF
5% 6.3V NP0-C0G 2 0201
32
1
DZ4710
ROOM=BUTTON_B2B
5.5V-6.2PF
STROBE: WARM LED COOL LED MODULE NTC
32
22
PP_LED_DRIVER_COOL_LED
C4721 1
0201
ROOM=BUTTON_B2B
1
100PF
C4722 27PF
5% 16V NP0-C0G 2 01005
5% 16V 2 NP0-C0G 01005
ROOM=BUTTON_B2B
ROOM=BUTTON_B2B
ROOM=BUTTON_B2B
2
B
B
FL4720
120-OHM-210MA 22
8
OUT
1
BUTTON_RINGER_A
R4720
2
BUTTON_RINGER_A_CONN
51.1K
32
01005
C4711 1
ROOM=BUTTON_B2B
27PF
1
LED_MODULE_NTC
2
LED_MODULE_NTC_CONN
32
01005
FL4711 120-OHM-210MA 16
OUT
1
ROOM=BUTTON_B2B
DZ4711
5% 6.3V NP0-C0G 2 0201
1% 1/32W MF 01005 2
ROOM=BUTTON_B2B
1
C4720 100PF
2
5% 16V NP0-C0G 01005
ROOM=BUTTON_B2B
5.5V-6.2PF 0201
ROOM=BUTTON_B2B
ROOM=BUTTON_B2B
2
BUTTONS: HOLD RINGER VOL UP/DOWN
FL4712
120-OHM-210MA 16
8
OUT
1
BUTTON_VOL_DOWN_L
2 01005
C4712
1
ROOM=BUTTON_B2B
100PF
5% 16V NP0-C0G 2 01005
BUTTON_VOL_DOWN_CONN_L 1
32
DZ4712
12V-33PF 01005-1
2
ROOM=BUTTON_B2B
ROOM=BUTTON_B2B
FL4713
A
120-OHM-210MA 16
8
OUT
1
BUTTON_VOL_UP_L
C4713 1
2 01005 ROOM=BUTTON_B2B
BUTTON_VOL_UP_CONN_L 1
5% 16V NP0-C0G 2 01005 ROOM=BUTTON_B2B
DZ4713
12V-33PF
100PF
A
SYNC_MASTER=N/A 32
SYNC_DATE=N/A
PAGE TITLE
I/O:BUTTON FLEX B2B DRAWING NUMBER
01005-1
2
ROOM=BUTTON_B2B
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
BASEBAND, WLAN, BT & STOCKHOLM
3
2
1
RF I566
N69 CELLULAR/WLAN/BT/STOCKHOLM SUBDESIGN SYMBOL
D
33
33
51
18
17
3
IN
PP_BATT_VCC
58
26
25
24
22
21
17
15
14
IN
PP_VCC_MAIN
30
26
24
17
16
15 14 12 58 57 56
8
IN
PP1V8_SDRAM
36
16
PMU_TO_BB_USB_VBUS_DETECT PP1V8_SDRAM PP3V0_TRISTAR
30
26
24
17
16
15 14 58 57
12 56
8
IN IN
56
31
26
15
IN
30
SHARED POWER ADC_PP_LDO11 PP_VCC_MAIN
5
BI
36
5
BI
8
OUT
36
8
IN
BB_TO_AP_HSIC_DEVICE_RDY AP_TO_BB_HSIC_HOST_RDY
36
16
41
8
OUT IN
BB_TO_PMU_HOST_WAKE_L AP_TO_BB_WAKE_MODEM
36
36
30
36
BI
8
36 36
8
8
IN
8
IN
36
8
IN
36
8
IN 8
OUT
IN
LCM_TO_AP_HIFA_BSYNC
IN
UART_OWL_TO_BB_TXD
OUT
UART_BB_TO_OWL_RXD
IN
8
IN
28
9
8
36
9
36
9
45_I2S_AP_TO_BB_BCLK I2S_AP_TO_BB_DOUT I2S_AP_TO_BB_LRCLK UART_BB_TO_AP_RXD UART_AP_TO_BB_TXD UART_AP_TO_BB_RTS_L UART_BB_TO_AP_CTS_L
8
36
8
I2S_BB_TO_AP_DIN
OUT
36
36
AP_TO_BB_RADIO_ON_L BB_TO_AP_RESET_DETECT_L AP_TO_BB_RESET_L PMU_TO_BB_PMIC_RESET_L
OUT
36
36
29
OUT IN
16
36
C
IN
8
36
90_USB_BB_DATA_N 90_USB_BB_DATA_P
BI
30
36
36
50_AP_BI_BB_HSIC0_DATA 50_AP_BI_BB_HSIC0_STB
ADC_SMPS1 ADC_SMPS4
PP_WL_BT_VDDIO_AP RFFE_VIO_S2R BB_USB_VBUS PP_STOCKHOLM_1V8_S2R
40
13
9
36
36
IN
8
8
BB_TO_AP_GPS_TIME_MARK
OUT
IN
41 36
SWD_AP_BI_BB_SWDIO SWD_AP_PERIPHERAL_SWCLK
BI
AP_TO_BB_COREDUMP 8
BB_TO_AP_IPC_GPIO
AP_TO_BB_MESA_ON
8
OUT
26
22
OUT
BB_TO_LED_DRIVER_GSM_BURST_IND
41
31
OUT
BB_LAT_GPIO1
41
31
OUT
BB_LAT_GPIO2
16
36
OUT
16
36
OUT
16
36
OUT
16
36
OUT
16
36
IN
16
36
IN
9 36
D
WLAN
50_BB_HSIC_STROBE
BB_DEVICE_RDY BB_HOST_RDY BB_WAKE_HOST_L AP_WAKE_MODEM
HOST_WAKE_WLAN
RADIO_MLB
WLAN_REG_ON
90_BB_USB_N
OSCAR_CONTEXT_A
90_BB_USB_P
OSCAR_CONTEXT_B WLAN_UART_TXD
RADIO_ON_L
WLAN_UART_RXD
BB_RESET_DET_L
WLAN_UART_CTS_L
BB_RST_L RF_PMIC_RESET_L
WLAN_UART_RTS_L PCIE_DEV_WAKE WLAN_PCIE_WAKE_L
BB_I2S_TXD
WLAN_PCIE_PERST_L WLAN_PCIE_CLKREQ_L
WLAN_TO_PMU_HOST_WAKE PMU_TO_WLAN_REG_ON OWL_TO_WLAN_CONTEXT_A OWL_TO_WLAN_CONTEXT_B UART_WLAN_TO_AP_RXD UART_AP_TO_WLAN_TXD UART_AP_TO_WLAN_RTS_L UART_WLAN_TO_AP_CTS_L PCIE_AP_TO_WLAN_DEV_WAKE WLAN_TO_PMU_PCIE_WAKE_L PCIE_AP_TO_WLAN_RESET_L PCIE_WLAN_TO_AP_CLKREQ_L
IN
9 36
OUT
8 36
IN
8 36
IN
8 36
OUT
8 36
OUT
8 57
OUT
16
IN BI
57
C
6 57 6 57
BB_I2S_CLK BB_I2S_RXD BB_I2S_WS
90_WLAN_PCIE_REFCLK_N
BB_UART_TXD
90_WLAN_PCIE_REFCLK_P 90_WLAN_PCIE_RDN
BB_UART_RXD
90_WLAN_PCIE_RDP 90_WLAN_PCIE_TDN 90_WLAN_PCIE_TDP
BB_UART_CTS_L BB_UART_RTS_L
90_PCIE_AP_TO_WLAN_REFCLK_N 90_PCIE_AP_TO_WLAN_REFCLK_P 90_PCIE_AP_TO_WLAN_TXD_N 90_PCIE_AP_TO_WLAN_TXD_P 90_PCIE_WLAN_TO_AP_RXD_N 90_PCIE_WLAN_TO_AP_RXD_P
IN
6 57
IN
6 57
IN
6 36
IN
6 36
OUT
6 36
OUT
6 36
BLUETOOTH BB_FORCE_PWM BB_OTHER_RXD
BT_UART_RXD BT_UART_TXD
BB_OTHER_TXD
BT_UART_CTS_L 9
OUT
50_BB_HSIC_DATA
BT_UART_RTS_L
36
BB_TO_PMU_AMUX_LDO5 BB_TO_PMU_AMUX_LDO11 BB_TO_PMU_AMUX_SMPS1 BB_TO_PMU_AMUX_SMPS4
PAC_VDD_3V0
BASEBAND 36
ADC_PP_LDO5
PP_BATT_VCC
UART_AP_TO_BT_TXD UART_BT_TO_AP_RXD UART_BT_TO_AP_CTS_L UART_AP_TO_BT_RTS_L
IN
8 36
OUT
8 36
OUT
8 36
IN
8 36
BB_JTAG_TMS BB_JTAG_TCK
BT_PCM_IN BT_PCM_OUT BT_PCM_CLK BT_PCM_SYNC
I2S_AP_TO_BT_DOUT I2S_BT_TO_AP_DIN 45_I2S_AP_TO_BT_BCLK I2S_AP_TO_BT_LRCLK
IN
8 36
OUT
8 36
BI IN
8 36
PMU_TO_BT_REG_ON AP_TO_BT_WAKE
IN
16
IN
8 36
8 36
BB_GPS_SYNC BT_REG_ON BB_CORE_DUMP
WAKE_BT HOST_WAKE_BT
BB_IPC_GPIO1
CLK32K_AP
BT_TO_PMU_HOST_WAKE 45_PMU_TO_WLAN_CLK32K
36
OUT
16
36
IN
16
36
AP_TO_BB_MESA_ON
B
B 41
GSM_TXBURST_IND
ANTENNA
BB_LAT_GPIO1 BB_LAT_GPIO2
STOCKHOLM
STOCKHOLM_UART_TXD STOCKHOLM_UART_RXD STOCKHOLM_UART_RTS STOCKHOLM_UART_CTS
AP_TO_STOCKHOLM_EN AP_TO_STOCKHOLM_FW_DWLD_REQ STOCKHOLM_TO_PMU_HOST_WAKE AP_TO_STOCKHOLM_DEV_WAKE
A
UART_STOCKHOLM_TO_AP_RXD
IN
8 36
UART_AP_TO_STOCKHOLM_TXD
OUT
8 36
UART_STOCKHOLM_TO_AP_CTS_L
OUT
8 36
IN
8 36
IN
16
IN
7 36
UART_AP_TO_STOCKHOLM_RTS_L
PMU_TO_STOCKHOLM_EN AP_TO_STOCKHOLM_DWLD_REQUEST STOCKHOLM_TO_PMU_HOST_WAKE AP_TO_STOCKHOLM_DEV_WAKE
OUT IN
16
36
36
8 58
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
BASEBAND:RADIO SYMBOL DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
1.ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
4
3
2
1
REV
ECN
4
0004752417
CK APPD
DESCRIPTION OF REVISION
2.ALL CAPACITANCE VALUES ARE IN MICROFARADS.
DATE
3.ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
D
ENGINEERING RELEASED
2015-08-24
N69 RADIO_MLB SUBDESIGN - EVT 8/19/2015
D
LAST_MODIFICATION=Wed Aug 19 10:34:24 2015
PAGE
C
CONTENTS
34
1
page1
35
3
CELL:ALIASES
36
4
37
5
38
6
39
7
BASEBAND (1 OF 2)
40
8
BASEBAND (1 OF 2)
41
9
MOBILE DATA MODEM (2 OF 2)
42
10
RF TRANSCEIVER (1 0F 3)
43
11
RF TRANSCEIVER (2 OF 3)
44
12
RF TRANSCEIVER (3 OF 3)
45
13
QFE DCDC
46
15
2G PA
47
20
VERY LOW BAND PAD
48
21
LOW BAND PAD
49
22
50
23
HIGH BAND PAD
51
24
ANTENNA SWITCH
52
30
HIGH BAND SWITCH
53
31
RX DIVERSITY
54
32
55
33
56
35
57
36
WIFI/BT: MODULE AND FRONT END
58
37
STOCKHOLM
59
40
OMIT_TABLE_RF
60
41
Radio Subdesign Ports
SYNC
DATE
AP INTERFACE & DEBUG CONNECTORS BASEBAND PMU (1 0F 2) BASEBAND PMU (2 OF 2)
C
MID BAND PAD
RX DIVERSITY (2) GPS ANTENNA FEEDS
42
B
B
43 45
?
A DRAWING
A
TITLE
SCH,MLB,N69 DRAWING
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY: THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC.
NUMBER
BRANCH
SIZE
D
8
BLANK
7
6
5
4
3
2
1
PAGE
D
D
C
C
B
B
A
A PAGE TITLE
CELL:ALIASES DRAWING NUMBER
Apple Inc.
051-00648 REVISION
R
4.0.0
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
AP INTERFACE & DEBUG CONNECTORS NOT UNDER SIM
UNDER THE SIM
PP3105_RF P2MM-NSM SM PP
1 CLK32K_AP
24
27
24
27
OPTIONAL
PP3119_RF P2MM-NSM SM
D
PP
1 BT_UART_TXD
NOSTUFF
J3100_RF
SM PP
53
1 BT_UART_RXD
24
PP3131_RF P4MM-NSM SM PP3132_RF
27
WIFI_BT
PP3101_RF P2MM-NSM SM PP
PP3102_RF P2MM-NSM SM PP
24
25
PP3124_RF P2MM-NSM
PP
SM PP
PP
BT_PCM_SYNC STOCKHOLM
PP3127_RF P2MM-NSM SM PP
SM PP
WIFI_BT
PP
SM PP
WIFI_BT
PP3173_RF P2MM-NSM SM PP
1
PP
SM PP
PP
1 WAKE_BT
24
27
24
27
PP
PP
PP
SM PP
PP
PP
WLAN_UART_RTS_L
1
WIFI_BT
PP
PP
24
27
24
27
PP
12
11
10
8
7
6
4
PP
1 WLAN_UART_RXD
24
SM
1 WLAN_UART_TXD
8 3
BB_SIM_CLK
22
8 3
BB_SIM_DATA
24
8 3
BB_SIM_DETECT
26
25 27
8
25
6
6
4
7
4
3
3 5 8
25
5
7 5
24
PP
27
7
6
8 12
13
14
15
16
17
8 12
13
14
15
16
17
SM PP
90_WLAN_PCIE_RDN
24
27
90_WLAN_PCIE_RDP
24
39
BB_DEVICE_RDY
42
41
STOCKHOLM_UART_TXD
44
43
BB_OTHER_TXD
STOCKHOLM_UART_CTS
46
45
BB_OTHER_RXD
STOCKHOLM_UART_RTS STOCKHOLM_TO_PMU_HOST_WAKE
48
47
BB_COEX_UART_RXD
50
49
BB_COEX_UART_TXD
54
52
27
25
3
27
25
3
27
25
3
8 27
7 27
PP
7 27
PP3111_RF 8
27
8
27
P4MM-NSM SM 1 SPMI_DATA PP
P4MM-NSM SM 1 SPMI_CLK PP
25
5 7
PP3112_RF
8 27
AP_TO_STOCKHOLM_FW_DWLD_REQ AP_TO_STOCKHOLM_EN
STOCKHOLM_UART_RXD
PP
P4MM-NSM SM 1 50_BB_HSIC_DATA
8
27
8
24
8
24
5 7
PP3104_RF
27
P4MM-NSM SM 1 MDM_CLK
8 27
PP
5 7
C
27
90_WLAN_PCIE_TDN
24 27
90_WLAN_PCIE_TDP
24
WIFI_BT
1
1
BB_UART_TXD
8 27
BB_UART_RXD
8 27
1
BB_UART_CTS_L
8 27
27
SIM CARD ESD PROTECTION
1
VR3101_RF ESD5004
19
B
LGA-1
5.5V-6.2PF 8 3
BB_UART_RTS_L
8 3
BB_SIM_DATA
1
8 3
BB_SIM_RESET
2
BB_SIM_DETECT
1
STOCKHOLM_TO_SIM_SWP
3
BB_SIM_CLK
4
2
8 27
0201
8 3
5
21
SIM CARD CONNECTOR RADIO_BB
RADIO_BB
R3103_RF
10K
PART NUMBER
R3104_RF
1% 1/32W MF 01005 2
10K
25
1% 1/32W MF 01005 2
6
4
3
PP_LDO5
3 77 S0 16 3 1
R3101_RF
15.00K
BOOT_HSIC BOOT_HSIC_USB WATCHDOG_DISABLE
PP_LDO11
PP_LDO5
37
40
5 27
PP3116_RF
8 27
10V 5% NP0-C0G 01005 8 18
4
3
35
38
PMIC_RESOUT_L
P4MM-NSM SM 1 50_BB_HSIC_STROBE
8 27
BB_I2S_WS BB_I2S_RXD BB_I2S_TXD
3
RFFE2_CLK
1
6 4
4
36
PS_HOLD_PMIC
8 27
100PF
1% 1/32W MF 2 01005
1
VCC
J3101_RF
ADC_SMPS1
ADC_PP_LDO11
OUT
33
60
OUT
33
60
41 3 6
IN
41 3 6
IN
BB_SIM_RESET
2 RST
BB_SIM_CLK
3 CLK
SIM-CARD-N48 F-ST-SM
ADC_PP_LDO5
SWP
GND
OUT
33
60
5
ALTERNATE FOR PART NUMBER
371S00044
BOM OPTION
REF DES
A LT ER NA TE
V R3 10 1
T A B L E _ A L T _ H E
A D
T A B L E _ A L T _ I T
E M
COMMENTS:
E SD A LT ER NA TI VE
C3101_RF
2.2UF
2
20% 6.3V X5R-CERM 0201
A
SYNC_MASTER=N/A I/O DETECT
8 9 0 1 3 1 1 1
SHORT-10L-0.1MM-SM 6
33
3
C3102_RF
XW3103_RF
25
31
34
25
RFFE1_DATA
1
VREG_SMPS1_0V90
3
29
32
24
XW3102_RF
8
30
BB_FORCE_PWM
PP3115_RF
8 27
BB_WAKE_HOST_L BB_GPS_SYNC
25
PP3199_RF P2MM-NSM
RFFE1_CLK
1
SHORT-10L-0.1MM-SM 10
PP_LDO5 PP_LDO11 RADIO_ON_L BB_DEBUG_ERROR RF_PMIC_RESET_L
AP_TO_BB_MESA_ON
1
5 27
27
7
BB_SIM_DATA
12
BB_SIM_DETECT
BI
36 41
XW3101_RF
11
23
DZ3102_RF
SHORT-10L-0.1MM-SM
12
21
8
27
WIFI_BT
1% 1/32W MF 01005 2
8
BB_RESET_DET_L 8 27
19
PP3198_RF P2MM-NSM
10K
8
BB_RST_L
17
1
PP3191_RF P2MM-NSM PP
15
28
PP
SM
PP
SM
20
27
WIFI_BT
R3102_RF
8
16
BB_I2S_CLK
1
PP3197_RF P2MM-NSM SM
RADIO_BB
A
13
P4MM-NSM
WIFI_BT
PP_LDO11
3
14
STOCKHOLM_TO_BBPMU_CLK_REQ
5 3
SM
SM
CORONA PCIE RX/TX TP
PP3196_RF P2MM-NSM SM
WIFI_BT
PP3172_RF P2MM-NSM SM
11
PP3190_RF P2MM-NSM
SM
WIFI_BT
27
PP
WLAN_UART_CTS_L
1
PP3171_RF P2MM-NSM SM
12
PP3138_RF 1 PP 2 7 8 PP3139_RF 1 PP3140_RF P4MM-NSM PP
WIFI_BT
SM
24
PP3170_RF P2MM-NSM SM
BB_JTAG_TRST_L
8
P4MM-NSM
WIFI_BT
PP3163_RF P2MM-NSM SM
7
WIFI_BT
27
PP3162_RF P2MM-NSM
B
90_BB_USB_P
24
WLAN_JTAG_SWDIO
PP3195_RF P2MM-NSM
1 HOST_WAKE_WLAN
PP3158_RF P2MM-NSM SM
10
WIFI_BT
1
SM
24
WIFI_BT
PP3157_RF P2MM-NSM SM
WLAN_JTAG_SWDCLK
1
PP3194_RF P2MM-NSM
PP3155_RF P2MM-NSM SM PP
9
5
SM
WIFI_BT
1 BT_REG_ON
10
STOCKHOLM
PP3193_RF P2MM-NSM
PP3154_RF P2MM-NSM SM
BB_JTAG_TDI
18
27
45_BBPMU_TO_STOCKHOLM_19P2M_CLK 5
SM
1 WLAN_REG_ON
7
STOCKHOLM
PP3192_RF P2MM-NSM
WIFI_BT
PP3153_RF P2MM-NSM SM
11
PP3186_RF P2MM-NSM
HOST_WAKE_BT
WIFI_BT
PP3152_RF P2MM-NSM SM
90_BB_USB_N
BB_SIM_RESET
25
PP3185_RF P2MM-NSM SM
C
STOCKHOLM_TO_SIM_SWP
1
BT_PCM_OUT
1
BB_CORE_DUMP BB_USB_VBUS
7
8 3
27
1
PP3129_RF P2MM-NSM
PP3128_RF P2MM-NSM SM
12
PP3174_RF P2MM-NSM
BT_PCM_IN
1
5
BB_HOST_RDY
STOCKHOLM
1
3
8
27
STOCKHOLM
BT_PCM_CLK
1
4
BB_JTAG_TMS
7
OSCAR_CONTEXT_B
1
PP3122_RF P2MM-NSM SM
BB_JTAG_TCK_IN
6
27
27
WIFI_BT
PP3121_RF P2MM-NSM SM
OSCAR_CONTEXT_A
PP
24
BB_DEBUG_STATUS
7
P2MM-NSM SM 1
51
1
BB_JTAG_TDO
27
1
PP3123_RF
BT_UART_RTS_L
1
SM
PP
27
WIFI_BT
M-ST-SM
2
BB_JTAG_RST_L
P4MM-NSM
PP
BT_UART_CTS_L
1
D
AXE650124
WIFI_BT
PP3120_RF P2MM-NSM
6
STOCKHOLM_TO_SIM_SWP
OUT
BI
SYNC_DATE=N/A
PAGE TITLE
AP INTERFACE & DEBUG CONNECTORS DRAWING NUMBER
36 41
36
Apple Inc.
58
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
BASEBAND PMU (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
SWITCHERS OUTPUT CAPS VREG_SMPS1_0V90
D
RADIO_PMIC 1 C3229_RF
20UF 2
FOOTPRINT SAME AS 138S0716
RADIO_PMIC 3
20UF
20% 6.3V CERM-X5R
2
0402
2
D 4
1 C3239_RF
20UF
6
20% 6.3V CERM-X5R 0402
RADIO_PMIC
1 C3237_RF
4
20UF
20% 6.3V CERM-X5R 0402
2
20% 6.3V CERM-X5R 0402
PP_VCC_MAIN
27 25 24 13 4
RADIO_PMIC 1
C3270_RF
RADIO_PMIC 1 C3224_RF
5% 16V NP0-C0G 01005
RADIO_PMIC 1 C3223_RF
2.2UF
100PF 2
2
20% 6.3V X5R-CERM
RADIO_PMIC 1 C3222_RF
2.2UF 2
0201
20% 6.3V X5R-CERM 0201
1
2.2UF 2
C3216_RF
1
15UF
20% 6.3V X5R-CERM 0201
2
20% 6.3V X5R 0402-1
C3221_RF 15UF 20% 6.3V X5R 0402-1
2
VREG_SMPS3_0V95 RADIO_PMIC
RADIO_PMIC
1 C3232_RF
20UF 2
VREG_SMPS4_2V075
RADIO_PMIC
1 C3230_RF
1 C3238_RF
4
20UF
20% 6.3V CERM-X5R 0402
2
20% 6.3V CERM-X5R 0402
2
3 4
RADIO_PMIC 1 C3240_RF
20UF
C
20% 6.3V CERM-X5R 0402
20UF 2
20% 6.3V CERM-X5R 0402
C
VREG_RF_CLK_BYP
SWITCHERS BULK CAPS
AVDD_BYP RADIO_PMIC
1 C3228_RF
REF_BYP
FOOTPRINT SAME AS 138S0716 RADIO_PMIC
1 C3226_RF 60
46 37 58 57
33
IN
PP_VCC_MAIN
MAKE_BASE=TRUE
VBATT_S1
VBATT_S1 1
60
46 37 58 57
33
IN
2
4
4
C3217_RF
4
20% 6.3V X5R 0402-1
PP_VCC_MAIN
MAKE_BASE=TRUE
VBATT_S2
60
46 37 58 57
33
IN
VBATT_S2
X5R 01005
21 15 22 88
VBATT_S3
47
4
VBATT_S4
1
4
VREG_SMPS2_1V25
92
4 3
VREG_SMPS4_2V075
4 3
VREG_SMPS4_2V075
2 4 77 72
V B AT T _S 3
4
VREG_SMPS3_0V95
38
VREG_SMPS4_2V075
85
C3219_RF 15UF
60
46 58
37 57
33
IN
20% 6.3V X5R 0402-1
PP_VCC_MAIN
MAKE_BASE=TRUE
60 57 37 46 58
VBATT_S4
VBATT_S4 1
C3220_RF 15UF
2
20% 6.3V X5R 0402-1
REF_BYP GND_REF VDD_S1 VDD_S2 VDD_S2 VDD_S3 VDD_S4 VDD_L1 VDD_L2_3 VDD_L7_8_11 VDD_L9 VDD_L10 VDD_L12 VDD_XO_RFC
4
49
2
VDD_INT_BYP
4 4 3
VBATT_S3 1
0201-1
SYM 5 OF 5
VREG_RFCLK REG
VREG_XO VREG_S1 VSW_S1_1 VSW_S1_2 VREG_S2 VSW_S2 VREG_S3 VSW_S3_1 VSW_S3_2
91 74
VREG_XO_PMIC L3201_RF
27
2.2UH-20%-1.5A-0.16OHM
PP_VSW_S1
11
1
40
OUT
MDM_VREF_LPDDR2
52
33
IN
PP_VCC_MAIN
43 54
GND VREF_DDR2 VIN_VPH1 VIN_VPH2
VREG_S4 VSW_S4_1 VSW_S4_2 VREG_L1 VREG_L2 VREG_L3 VREG_L4 VREG_L5 VREG_L6 VREG_L7 VREG_L8
4
VREG_L9
4
VREG_L10 VREG_L11 VREG_L12 VREG_L13 VREG_L14
2
MAKK2016-SM
1235MA
VREG_SMPS1_0V90
OUT
36 37 39
MAKK2016-SM
1100MA
VREG_SMPS2_1V25
OUT
37
MAKK2016-SM
1350MA
VREG_SMPS3_0V95
OUT
37
VREG_SMPS4_2V075
VOLTAGE=4.50V
16
L3203_RF
82
2.2UH-20%-1.5A-0.16OHM
PP_VSW_S2
93
1
VOLTAGE=4.50V
2
L3204_RF
62
2.2UH-20%-1.5A-0.16OHM
PP_VSW_S3
53
1
2
VOLTAGE=4.50V
58
L3202_RF
4
20% 6.3V X5R 0402-1
MAKE_BASE=TRUE
2
BGA
4
C3218_RF
P P _V C C_ M AI N
X5R-CERM 0201-1
20% 2 10V X5R-CERM
PM8019
26
4
15UF
2
VBATT_S1
20% 10V
20% 4V
94
VBATT_S2 1
0.1UF
1.0UF
U_PMICRF_RF
RADIO_PMIC
1 C3227_RF
1.0UF 4
15UF
2
B
VREG_SMPS2_1V25
RADIO_PMIC 1 C3231_RF
RADIO_PMIC
2.2UH-20%-1.2A-0.15OHM
23
PP_VSW_S4
6
1
2
550MA
0806
VOLTAGE=4.50V
12
VREG_RX
86
VOLTAGE=1.225V
7
VOLTAGE=1.80V
8
VOLTAGE=1.80V VOLTAGE=3.075V
68
VREG_SIM
59 48
VOLTAGE=1.80V
OUT
36 37
PP_LDO1
OUT
39 43 44
PP_LDO2
OUT
39
PP_LDO3
OUT
38 39
PP_LDO4
OUT
39
PP_LDO5
OUT
36 39 25
PP_LDO7
OUT
39 41
PP_LDO8
OUT
43
PP_LDO9
B
NC VOLTAGE=1.90V
10
VREG_TX
3
VOLTAGE=2.05V
71
VOLTAGE=1.20V
83
VOLTAGE=0.90V
VREG_IO
9
VOLTAGE=1.80V
33
VOLTAGE=0.95V
34
VOLTAGE=2.95V VOLTAGE=5.0V
28
RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC 1 C3201_RF 1 C3202_RF1 C3203_RF 1 C3204_RF 1 C3205_RF 1 C3206_RF
1.0UF 2
20% 10V
X5R-CERM 0201-1
1.0UF
10UF 2
20% 6.3V CERM-X5R 0402-9
2
20% 10V
X5R-CERM 0201-1
1.0UF 2
20% 10V
X5R-CERM 0201-1
1.0UF 2
20% 10V
X5R-CERM 0201-1
1.0UF 2
20% 10V
X5R-CERM 0201-1
RADIO_PMIC RADIO_PMIC C3212_RF C3213_RF
1.0UF
1.0UF
10UF
20% 10V
2 X5R-CERM 0201-1
2
20% 6.3V CERM-X5R 0402-9
10UF 2
20% 6.3V CERM-X5R 0402-9
10UF 2
20% 6.3V CERM-X5R 0402-9
10UF
20% 10V
2 X5R-CERM 0201-1
39
OUT
39
PP_LDO11
OUT
36 39 40 41 43 44 45
PP_LDO12
OUT
39
PP_LDO13
OUT
39 56
OUT
47
PP_LDO14_RFSW
RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC C3208_RF C3209_RF C3210_RF C3211_RF
2
20% 6.3V CERM-X5R 0402-9
44
OUT
PP_LDO10
RADIO_PMIC C3214_RF
RADIO_PMIC C3215_RF
1.0UF
1.0UF
20% 10V
48
58
56
20% 10V
2 X5R-CERM
2
0201-1
X5R-CERM 0201-1
A
A PAGE TITLE
BASEBAND PMU (1 0F 2) DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
C401 R411 L400 U404
BASEBAND PMU (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
REVISION N69/69H PRE-PROTO SPARE N69/69H PROTO1 N69/69H PROTO2 N69/69H EVT1 N69/69H EVT2 SPARE N69/69H DVT SPARE N69/69H PVT
BOARD_ID D
0.00V 0.50V 0.70V 0.90V 1.10V 1.30V 1.40V 1.50V 1.60V 1.70V
SKU_ID 0.5V 1.1V
REVISION N69 N69H
REF DES
COMMENTS:
197S0565
PART NUMBER
ALTERNATE FOR PART NUMBER
197S0593
ALTERNATE
BOM OPTION
Y3301_RF
XTAL 19MHZ
197S0598
197S0593
ALTERNATE
Y3301_RF
XTAL 19MHZ
T A B L E _ A L T _ H E A
D
T A B L E _ A L T _ I T E
M
T A B L E _ A L T _ I T E
M
D
RADIO_PMIC
Y3301_RF 19.2MHZ-10PPM-7PF-80OHM 2.0X1.6-SM 1 3
RADIO_PMIC IN
PP_LDO3
39 3 8 3 7
C
4
U_PMICRF_RF
XTAL19M_IN
R3305_RF 90.9K 1
W 5 2 0 % F 3 0 1 M / 1 1 0
BGA
5
5
5
WITH 10M
39
IN PARALLEL TO GND
OUT
2
R3306_RF 150K
XTAL19M_OUT
PM8019
1.10V(EVT) BOARD_ID
CALCULATE
U_PMICRF_RF
41
W 5 2 0 % F 3 0 1 / M 1 1 0
OUT
SYM 4 OF 5
39
BOARD_ID SKU_ID VDDPX_BIAS VREF_DAC_BIAS
NC
MPP_01
29
MPP_02
18
MPP_03
44
MPP_04
35
MPP_GPIO
MPP_05
24
NC
40
MPP_06
GPIO_01
13
NC BB_GPS_ENABLE GPIO_02 30 STOCKHOLM_TO_BBPMU_CLK_REQ GPIO_03 55 NC GPIO_04 19 NC 14 BB_BUA_SIM GPIO_05 25 BB_FORCE_PWM GPIO_06
IN
79
RADIO_PMIC
R3308_RF IN
36 58 39 3 8 3 7
IN
41
IN
33 36
IN
PP_LDO3
1
100K 2 1% 1/32W MF 01005
60
1
84 73
XO_OUT_D0_EN
XO_THERM_Y1
C3303_RF
BGA 90
2
RADIO_PMIC
PM8019
2
1000PF
SYM 2 OF 5
XTAL_19M_IN
XO_OUT_A0
CLOCK
XTAL_19M_OUT
XO_OUT_A1
GND_XO
XO_THERM
46
GND_XOADC
XO_OUT_D0
RADIO_PMIC
1 C3301_RF
78
PA_THERM1
42
PA_THERM2
32
BATT_ID_THERM
1000PF
50_A0_PMCLK OUT
SLEEP_CLK_32K
OUT
MDM_CLK
OUT
NC
RADIO_PMIC
R3309_RF
1
100
2
50_PMIC_RF_CLK
67 45_BBPMU_TO_STOCKHOLM_19P2M_CLK
SLEEP_CLK 80
XO_OUT_D0_EN
57
64
PA_CTL_QFE
10% 6.3V X5R-CERM 01005 40
50_RF_CLK
OUT
1% MF 1/32W 01005
C
36 40
12
37
10% 6.3V 2 X5R-CERM 01005
XO_GND PP_LDO3
4 5
XW3301_RF
6
SHORT-10L-0.25MM-SM
1 RADIO_PMIC
NOSTUFF
R3311_RF
XW <2.0MM FROM XTAL GROUND PATCH
100K
B
2
1% 1/32W MF 2 01005
E L B A T _ T I M O
SKU_ID
5
B
2
R3312_RF
162K 01005
W 2 % F 3 1 / M 1
U_PMICRF_RF PM8019 BGA
1
U_PMICRF_RF PM8019 BGA
RADIO_PMIC
R3301_RF 60
36
33
IN
BB_RST_L
1
1.00K 2
36
60 33
RADIO_ON_L
IN
31
1% MF 1/32W 01005 RADIO_PMIC
R3307_RF 40
IN
PS_HOLD
1
40 3 6
OUT
20.0K 2
5% MF 1/32W 01005
3
36
33 60
IN
40 3 6
BI
40 3 6
BI
70
PON_TRIG
PMIC_RESOUT_L
75
PS_HOLD_PMIC
65
RF_PMIC_RESET_L
20
RESIN*
SPMI_CLK SPMI_DATA
81
SPMI_CLK
76
PON_RST* PS_HOLD
CONTROL
GND_S1 GND_S2
63
GND_S3
17
GND_S4
INPUT_PWR
GND
36
GND
40
GND
41
GND
50
GND
SYM 1 OF 5
CBL_PWR*
SYM 3 OF 5
5 87
OPT
66
GND
89
GND
56
GND
NC
GND
51 60
GND
61
GND
69
45
SPMI_DATA
A
A PAGE TITLE
BASEBAND PMU (2 OF 2) DRAWING NU NUMBER
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
C538 R500 L500 U502
BASEBAND (1 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. RADIO_BB
U_BB_RF
ASIC-MDM9625M-2 WLBGA 39 3 7
IN
(MSM CORE)
PP_LDO10
J15 K14
D
K15 L13 L14 M8 M9 M12
VDD_P1
M1
VDD_CORE
VDD_P1 VDD_P2
VDD_CORE
B20
VDD_CORE
VDD_P3
N8
VDD_CORE
VDD_P3
V2
N11
VDD_CORE
VDD_P3
V5
VDD_CORE
VDD_P3
V19
E15 F8 F9
VDD_CORE VDD_CORE
VDD_P5
VDD_MEM
VDD_P6
VDD_MEM VDD_MEM
G8
VDD_MEM
K10 L9 L10 P14 P15 R7
C
R8 E5
(MODEM SUB SYSTEM) VREG_SMPS1_0V90
F6 F7
F10 F11 G6 G9 G10 G13 G14 G15
VREF_SDC
VDD_MEM
F15
N15
VREF_UIM VDD_USB_CORE
VDD_MEM
VDD_USB_1P8
VDD_MEM VDD_MEM
VDD_USB_3P3
VDD_MEM
VDD_A2
VDD_MEM
VDD_A2
VDD_MEM VDD_MEM
VDD_A2
VDD_MEM
VDD_A1 VDD_A2
VDD_MEM
VDD_A1
VDD_MODEM
IN
37
39
56
IN
36
37
39
U19
PP_LDO5
IN
36 37 25
V9
PP_LDO9
IN
37 39
A19
VDDPX_BIAS
IN
U20
VDD_MODEM
VDD_DDR_CORE_1P8
VDD_MODEM
VDD_DDR_CORE_1P8
VDD_MODEM
VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2 VDD_DDR_CORE_1P2
VDD_MODEM
VDD_DDR_CORE_1P2
VDD_MODEM VDD_MODEM
J11
VDD_MODEM
J12
VDD_MODEM
VDD_QFPROM_PRG
F12
GND
GND
F13
GND
GND
F14
GND
GND
N9
GND
N10
GND GND
GND
GND
H11
GND
GND
R20
H14
GND
GND
T20
GND
GND
V20
GND
GND
38 39
IN
IN
37 39
PP_LDO4
IN
37
IN
37 39 41
H10
H15 J1 J6
B12 IN
37 39 43 44
B6
PP_LDO3
IN
(LPDDR2)
PP_LDO11
IN
K1
36 37 39 40 41 43
44
45
58
W9
GND
GND
W20
GND
GND
IN
37 39
(QFUSE PROGRAMMING) PP_LDO3
IN
37 38 39
A12
GND
GND
K8
GND
K9
GND
GND A6 GND E12
GND
GND
GND
GND
E6
GND
GND
GND
L1
GND
GND A17 GND C17
L11 L12 L15
B17
GND
GND
GND
GND
GND
GND
R13
GND
GND
R14
GND
GND A15
GND
C
E9 A9
K20
M7
H1
W12
K12
M6
(LPDDR2_CORE) PP_LDO9
W5
J10
L8
37 38 39
W1
GND
K19
NC
P9
GND
L7
E16
P8
GND
K13
D17
P6
P12
GND
J14
PP_LDO1
C6
N14
J9 J13
B9
GND
N6
N13
GND
PP_LDO2
C9
GND
N1
GND
V10
PP_LDO7
GND
G7
M20
GND
U11
E20
M15
GND
GND
37 39
J20
M14
GND
GND
GND
PP_LDO12
T17
GND
GND
GND
V13
C12
M11
GND
GND
GND
C20
H7
37 39
VDD_PLL
GND
C14
H6
37 39 43 44
VDD_PLL2
58
G12
IN
VDD_ALWAYS_ON
45
G11
IN
VDD_MODEM
44
(HSIC PAD)
PP_LDO1
VDD_MODEM
43
M10
GND
SYM 6 OF 6
(UIM2 PAD)
PP_LDO10
VDD_MODEM
41
(UIM1 PAD)
NC
R12
VDD_MODEM
A20 40
F20
U13
VDD_A1
GND
E14
B15
VDD_MODEM
K7
(SDC1 PAD) PP_LDO13 (GENIO PAD) PP_LDO11
K2
R19
D
WLBGA
A2
VDD_PLL
H9
K6
RADIO_BB
U_BB_RF ASIC-MDM9625M-2
VDD_PLL
H12
J8
39
VDD_MODEM
VDD_MODEM
J7
37
VDD_MODEM
VDD_MODEM
H8
H13
VDD_P4
VDD_CORE
IN
T19
B2
P11
IN
VDD_CORE
J19
P10
39 3 7 3 6
L20
VDD_CORE
(EBI1 PAD) PP_LDO9
L19
VDD_P3
P7
(MSM MEMORY)
F19
VDD_P1
VDD_P3
N12
PP_LDO12
VDD_P1
VDD_CORE
VDD_CORE
N7
IN
VDD_P1
PWR
VDD_CORE
VDD_CORE
M13
39 3 7
SYM 5 OF 6
VDD_CORE
P13
GND
P1 P20 W8
VDD_MODEM VDD_MODEM
K11
VDD_MODEM
L6
VDD_MODEM
B
B RADIO_BB 39 3 7
IN
(MSM CORE)
RADIO_BB
PP_LDO10
39 3 7
RADIO_BB
1 C3401_RF
2.2UF
2
20% 4V X5R-CERM 0201
RADIO_BB
1 C3404_RF
2.2UF
2
20% 4V X5R-CERM 0201
RADIO_BB
1 C 34 07 07 _R F
2.2UF
2
20% 4V X5R-CERM 0201
RADIO_BB
1 C 34 34 10 _R _R F
2.2UF
2
20% 4V X5R-CERM 0201
RADIO_BB
1 C 34 13 13 _R F
2.2UF
2
20% 4V X5R-CERM 0201
RADIO_BB
IN
1 C 34 34 16 _R _R F
2.2UF
20% 4V X5R-CERM 0201
RADIO_BB 39 3 7
RADIO_BB
1 C 3 41 9 _R F
2.2UF
2
(EBI1 PAD) PP_LDO9
2
20% 4V X5R-CERM 0201
RADIO_BB
IN
1 C 3 42 2 _R F
RADIO_BB 39 3 7
RADIO_BB
IN
(USB 1.8V) PP_LDO2
1 C3427_RF
2.2UF
20% 4V X5R-CERM 0201
2.2UF
20% 4V X5R-CERM 0201
2
RADIO_BB 44
RADIO_BB
1 C3424_RF
2.2UF
2
(HSIC PAD) PP_LDO9
2
20% 4V X5R-CERM 0201
43
3 9 37
RADIO_BB
IN
(GPS ADC) PP_LDO1 45
44
43
RADIO_BB
1 C3430_RF
41 40 3 9 37 36 58
IN
(LPDDR2) PP_LDO11 RADIO_BB
1 C3432_RF
0.1UF
2
RADIO_BB
1 C3435_RF
2.2UF
20% 4V X5R 01005
2
2.2UF
20% 4V X5R-CERM 0201
20%
4V 2 X5R-CERM 0201
NOSTUFF RADIO_BB 39 3 7
IN
(MSM MEMORY)
RADIO_BB
PP_LDO12
56
RADIO_BB
1 C3402_RF
2.2UF
2
20% 4V X5R-CERM 0201
RADIO_BB
1 C 34 34 05 _R _R F
2.2UF
2
20% 4V X5R-CERM 0201
RADIO_BB
1 C 34 08 08 _R F
2.2UF
2
20% 4V X5R-CERM 0201
RADIO_BB
1 C 34 34 11 _R _R F
2.2UF
2
20% 4V X5R-CERM 0201
RADIO_BB
1 C 34 14 14 _R F
2.2UF
2
20% 4V X5R-CERM 0201
39 37
RADIO_BB
IN
1 C 34 34 17 _R _R F
RADIO_BB 39 3 8
RADIO_BB
IN
1 C3420_RF
2.2UF
2
(SDC1 PAD) NOSTUFF PP_LDO13
2
RADIO_BB 41 3 9 3 7
RADIO_BB
IN
(COMBO DAC/BBRX) PP_LDO7
2
3 9 37
IN
(PLL) PP_LDO10
2
39 3 7
RADIO_BB IN
(MODEM SUB SYSTEM) VREG_SMPS1_0V90 RADIO_BB
1 C3403_RF
2.2UF 20%
4V 2 X5R-CERM 0201
RADIO_BB 45
RADIO_BB
1 C3406_RF
2.2UF 20%
4V 2 X5R-CERM 0201
RADIO_BB
1 C3409_RF
2.2UF 20%
4V 2 X5R-CERM 0201
RADIO_BB
1 C3412_RF
2.2UF 20%
4V 2 X5R-CERM 0201
RADIO_BB
1 C3415_RF
2.2UF 20%
4V 2 X5R-CERM 0201
44
43
RADIO_BB
41 40 3 9 37 36 58
1 C3418_RF
2.2UF 20%
4V 2 X5R-CERM 0201
IN
(GENIO PAD) PP_LDO11 RADIO_BB
1 C3421_RF
2.2UF 20%
4V 2 X5R-CERM 0201
RADIO_BB 39 3 7
RADIO_BB
1 C3423_RF
2.2UF 20%
4V 2 X5R-CERM 0201
IN
(USB CORE) PP_LDO12
2
2.2UF 20%
4V 2 X5R-CERM 0201
2.2UF
20% 4V X5R-CERM 0201
2
20% 4V X5R-CERM 0201
RADIO_BB
1 C3438_RF
2.2UF 20%
4V 2 X5R-CERM 0201
NOSTUFF RADIO_BB
44
RADIO_BB
1 C3426_RF
RADIO_BB
1 C3436_RF
2.2UF
20% 4V X5R-CERM 0201
NOSTUFF
39 3 7 3 6
IN
(LPDDR2 CORE) PP_LDO9
1 C3433_RF
2.2UF
20% 4V X5R 01005
RADIO_BB RADIO_BB
1 C3428_RF
0.1UF
20% 4V X5R-CERM 0201
RADIO_BB
RADIO_BB
1 C3425_RF
2.2UF
20% 4V X5R-CERM 0201
(SDC/UIM) VDDPX_BIAS
43
39 3 7
IN
(BBRX) PP_LDO1
RADIO_BB 39 3 8 3 7
RADIO_BB
1 C3429_RF
IN
(PLL) PP_LDO3
RADIO_BB 3 9 38 37
RADIO_BB
1 C3434_RF
2.2UF
2.2UF 20%
4V 2 X5R-CERM 0201
2
20% 4V X5R-CERM 0201
IN
(QFUSE) PP_LDO3 RADIO_BB
1 C3437_RF
2.2UF 20%
4V 2 X5R-CERM 0201
NOSTUFF
A
A PAGE TITLE
BASEBAND (1 OF 2) DRAWING NU NUMBER
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
C600 R606 L600 U602
BASEBAND (2 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
26 11 9 7
PP_LDO11
U3501_RF 5
60
33
IN
BB_JTAG_TCK
74AUP1G34GX SOT1226 4
2 C N
1
C
C
C N
RADIO_BB
U_BB_RF ASIC-MDM9625M-2
60
38 3 6
IN
36
IN
38
IN
36
36
IN
33
IN
36
IN
W14
PMIC_RESOUT_L BB_JTAG_RST_L SLEEP_CLK_32K
N2 W17 R2
BB_JTAG_TCK_IN BB_JTAG_TDI BB_JTAG_TMS BB_JTAG_TRST_L
P3 P2 T4 NC
38
OUT
NC
B19
NC NC 60
B
36
33
BB_USB_VBUS
IN
7
5
3
NC
MDM_CLK
TCK
PMIC_SPMI_DATA
TDI
RADIO_BB
NC
P5 W15
HSIC_STROBE
PS_HOLD
OUT
38
BB_JTAG_TDO
OUT
36
SPMI_DATA SPMI_CLK BB_HSIC_CAL 50_BB_HSIC_DATA 50_BB_HSIC_STROBE
R10
1
BI
36 38
BI
36 38
CXO_EN
SDC1_DATA_3
BI
33 36
60
BI
33 36
60
SDC1_CLK
240 2
RADIO_BB
R3502_RF
240
2
1% 1/32W MF 01005
R1
EBI1_CAL BDM_ZQ
RADIO_BB
R3506_RF 1
240 2
1% MF 1/32W 01005
NC NC NC NC NC NC
G1
EBI1_CAL
EBI1_EBI2
EBI2_CS*
F16
EBI2_CLE*
G19 G18 G16
USB_HS_ID USB_HS_SYSCLK
USB_HS_DP
V11
USB_HS_DM
W11
USB_HS_REXT
90_BB_USB_P 90_BB_USB_N BB_USB_TRXTUNE
BI
33 36
60
BI
33 36
60
MDM_VREF_LPDDR2
IN
37 40
R16
EBI2_AD_7 H20 NC EBI2_AD_6 H19 NC EBI2_AD_5 H18 NC H16 EBI2_AD_4 NC J18 EBI2_AD_3 NC EBI2_AD_2 K18 NC EBI2_AD_1 J16 NC EBI2_AD_0 K16 NC
EBI2_ALE* EBI2_WE* EBI2_OE* EBI2_BUSY*
NC
W10
EBI1_VREF N20 EBI1_VREF M5 EBI1_VREF
F18 G20
SYM 2 OF 6
EBI1_ZQ
SDC1_DATA_2 A18 NC SDC1_DATA_1 D20 NC SDC1_DATA_0 D19 NC
SDC1_CMD
USB_HS_VBUS
B18
ASIC-MDM9625M-2 WLBGA
1% MF 1/32W 01005
M19 NC UIM1_CLK N18 NC UIM1_DATA P19 NC
UIM1_DETECT
U_BB_RF
RADIO_BB
R3505_RF
UIM1_RESET
U12 W13
W18
HSIC_CAL U9 HSIC_DATA U10
CXO
C19
V12
V17
PMIC_SPMI_CLK V15
TMS
MODE_1
N19
TDO
TRST* MODE_0
V18
PS_HOLD
DIGITAL
SLEEP_CLK
R9 W19
MDM_CLK XO_OUT_D0_EN
IN
RESOUT*
SYM 1 OF 6
SRST*
R11
NC 4 0 38 36
WLBGA
RESIN*
B
RADIO_BB
R3501_RF
200
2
1% 1/32W MF 01005
MDM_VREF_LPDDR2 1
4 7
C3501_RF 1.0UF
PP_LDO11
3
4
6
7
8 1 0 11
2
12
PP_LDO11
3
4
6
7
8 1 0 11
20% 6.3V X5R 0201-1
12
1 A
VCC
R 35 35 07 _R _R F
U_EEP_RF
10K
CAT24C08C4A 8 7
BB_EEPROM_SCL
B1 SCL
WLCSP
SDA
B2
BB_EEPROM_SDA
VSS 2 A
A
8 7
8 7
7 8
1% 1/32W MF 2 01005
R 35 35 08 08 _R F
10K
1% 1/32W MF 2 01005
BB_EEPROM_SCL
BB_EEPROM_SDA
A PAGE TITLE
BASEBAND (1 OF 2) DRAWING NU NUMBER
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
C704 R700 L700 U702
BASEBAND (3 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
PP_LDO11
3
4
6
7
8 10
11
12
RADIO_BB
RADIO_BB
R3601_RF
U_BB_RF
10K
1% 1/32W MF 01005 2
ASIC-MDM9625M-2 WLBGA 36
BB_SIM_DETECT
RADIO_BB
3 8
IN
36
IN
36
OUT
U_BB_RF ASIC-MDM9625M-2 WLBGA
C
42
IN
42
IN
42
IN
42
IN
42
IN
42
IN
42
IN
42
IN
44 44
IN IN
44
IN
44
IN
44
IN
44
IN
44
IN
44
IN
42 42
IN IN
42
IN
42
IN
WTR_BB_PRX_I_P WTR_BB_PRX_I_N WTR_BB_PRX_Q_P WTR_BB_PRX_Q_N
BBRX_IP_CH0 BBRX_IM_CH0
E10
BBRX_QP_CH0
C10
WTR_BB_DRX_I_P WTR_BB_DRX_I_N WTR_BB_DRX_Q_P WTR_BB_DRX_Q_N
B11
BBRX_IP_CH1 BBRX_IM_CH1
A10 B5 A5 B4 A4
WFR_BB_DRX_I_P WFR_BB_DRX_I_N WFR_BB_DRX_Q_P WFR_BB_DRX_Q_N
TX_DAC0_IREF C13 E13
WTR_TX_IDAC VREF_DAC_BIAS
TX_DAC0_IP A14 B14 TX_DAC0_IM TX_DAC0_QP B13
WTR_BB_TX_I_P WTR_BB_TX_I_N WTR_BB_TX_Q_P WTR_BB_TX_Q_N
TX_DAC0_VREF
TX_DAC0_QM A13
BBRX_QP_CH1
TX_DAC1_IREF
BBRX_QM_CH1
TX_DAC1_VREF
C8
BBRX_IP_CH2
TX_DAC1_IP A8
BBRX_IM_CH2
TX_DAC1_IM B8 A7 TX_DAC1_QP B7 TX_DAC1_QM
BBRX_QP_CH2 BBRX_QM_CH2 BBRX_IP_CH3
ET_DAC_M
C7
C5
BBRX_IM_CH3
ET_DAC_P
E7
A3 C15 C16 B16 A16
BBRX_QP_CH3
DNC
BBRX_QM_CH3 GNSS_BB_IP GNSS_BB_IM
PP_LDO7
OUT
41 42
5 8
OUT
42
OUT
42
OUT
42
OUT
42
4 6
8
E8
C4 B3
WTR_BB_GPS_I_P WTR_BB_GPS_I_N WTR_BB_GPS_Q_P WTR_BB_GPS_Q_N
ANALOG
BBRX_QM_CH0
A11 B10
WFR_BB_PRX_I_P WFR_BB_PRX_I_N WFR_BB_PRX_Q_P WFR_BB_PRX_Q_N
SYM 4 OF 6
E11 C11
V16
DNC
W16
DNC
D4
DNC
C3
OUT
41 3 6
60
36
33
OUT
60
36
33
IN
60
36
33
IN
60
36
33
OUT
R18
BB_SIM_DATA BB_SIM_DETECT BB_SIM_RESET BB_SIM_CLK BB_UART_TXD BB_UART_RXD BB_UART_CTS_L BB_UART_RTS_L NC NC
60
36
33
OUT
60
36
33
IN
60
36
33
OUT
36 33
OUT
60
NC
BB_I2S_WS BB_I2S_RXD BB_I2S_TXD BB_I2S_CLK
NC
ET_DAC_N ET_DAC_P
OUT
45
60
36
33
OUT
OUT
45
60
36
33
IN
NC NC
60
NC
40
BI
40
BI
36
33
OUT
60
33
IN
NC
GNSS_BB_QP GNSS_BB_QM
NC
BB_OTHER_TXD BB_OTHER_RXD BB_EEPROM_SDA BB_EEPROM_SCL BB_RESET_DET_L AP_WAKE_MODEM
IN
36
IN
36
IN
8
WTR_TX_IDAC
B
8 RADIO_BB
1 C3601_RF
0.1UF 10%
2 6.3V X7R 0201
8 6 4
PP_LDO7
5
U15
GPIO_4
GPIO_41 G3 GPIO_42 G2
GPIO_5
GPIO_43
V14
GPIO_6
U16
GPIO_7
U3 U4 W2
BB_LAT_GPIO0
NC
BB_LAT_GPIO1
NC
BB_LAT_GPIO2
NC
BB_LAT_GPIO3
NC
BB_LAT_GPIO4
NC
BB_LAT_GPIO5
NC
NC
WATCHDOG_DISABLE BOOT_HSIC BOOT_HSIC_USB
GPIO_10 GPIO_11 GPIO_12 GPIO_13 GPIO_14
U8
GPIO_15
M18
GPIO_16
M16
GPIO_17
GRFC
L16
GPIO_19 GPIO_20
C18
GPIO_21
F1
GPIO_44 F2 GPIO_45 D3
BLSP3
GPIO_46 C1 G5 GPIO_47 F3 GPIO_48 GPIO_49 E3
BLSP4
GPIO_50 F5 N5 GPIO_51 N3 GPIO_52 GPIO_53 T3
BLSP5
GPIO_18
D18
P16
BLSP2
GPIO_9
V7
N16
GPIO_39 H2 GPIO_40 H3
GPIO
BLSP1
GPIO_8
V3
E18
NC 9
GPIO_3
E19
NC 36
P18
W7
NC
H5
GPIO_2
V6
NC
GPIO_38
SYM 3 OF 6
GPIO_1
T18
U14
NC
GPIO_0
U18
SSBI
GPIO_56
D2
GPIO_57 E1 GPIO_58 T1 GPIO_59 R6 R3 GPIO_60 U7 GPIO_61 GPIO_62 V8
GPIO_23 GPIO_24
L18
GPIO_25
L5
GPIO_26
GPIO_63 W4 GPIO_64 W3
M3
U6
GPIO_27
GPIO_65
K3
GPIO_28
L3
GPIO_29
GPIO_66 T2 GPIO_67 R15
M2
GPIO_30
K5
GPIO_31
B1 C2
GRFC
GPIO_32
GPIO_70
W6
GPIO_71
GPIO_34
L2
GPIO_35
GPIO_72 U2 GPIO_73 U5
J3
GPIO_36
J2
GPIO_37
RFFE
33
60
OUT
33
60
23
LAT_SELECT
NC
BB_UAT_GPIO0
NC
BB_UAT_GPIO1
NC
BB_UAT_GPIO3
NC NC NC NC WLAN_TX_BLANK NC NC
NC
BB_COEX_UART_TXD BB_COEX_UART_RXD WTR_SSBI_TX_GPS WTR_SSBI_PRX_DRX WFR_SSBI
OUT
36 57
IN
36 57
OUT
42
IN
42
OUT
44
C
NC BB_DEBUG_SYNC (DEV)
GSM_TX_PHASE_D1 GSM_TX_PHASE_D0 BB_CORE_DUMP BB_DEBUG_STATUS BB_DEBUG_ERROR
42
OUT
42
OUT
33 36
IN OUT
36
OUT
36
60
NC BB_SWD_ENABLE
AP_TO_BB_MESA_ON BB_HOST_RDY BB_WAKE_HOST_L BB_DEVICE_RDY BB_BUA_SIM BB_GPS_SYNC
V1
GPIO_33
BB_IPC_GPIO1
NC
GPIO_68 V4 GPIO_69 U17
J5
OUT
CTRL_FWD_REV UAT_SELECT
GPIO_54 E2 GPIO_55 D1
BLSP6
GPIO_22
GSM_TXBURST_IND NC
NC
GPIO_74 U1 GPIO_75 R5
RFFE2_DATA RFFE2_CLK RFFE1_DATA RFFE1_CLK
33 36
BI
60
IN
33 36
60
OUT
33 36
60
33 36
60
OUT
38
IN
33 36
OUT
60
BI
41 51 52 5 4
BI
36 41 51 52
54
BI
36 45
46
47
48
49
50
BI
36 45
46
47
48
49
50
VREF_DAC_BIAS RADIO_BB
1 C3603_RF
2200PF 10%
2 6.3V X5R-CERM 01005
RADIO_BB
B
1 C3604_RF
2200PF 10%
2 6.3V X5R-CERM 01005
NOSTUFF
U_BUFFER_RF RF1352 21
19
18
17
16
21
14
19
21
18
19
4 VIO
13
8
RFFE_VIO
8
3
RFFE2_CLK
2 SCLK
18
8
RFFE2_DATA
3 SDATA
WLCSP GPO1
1
GPO2
8
SCLK_A 5 SDATA_A
6
BB_LAT_GPIO1 BB_LAT_GPIO2 RFFE2_CLK_BUFFER RFFE2_DATA_BUFFER
OUT
33
60
OUT
33
60
OUT
56
OUT
56
GND 7
MAKE_BASE=TRUE 12
11
10
8
7
6
4
3
PP_LDO11
RFFE_VIO
8 13
14
16
17
18
19
21
VOLTAGE=1.80V
A
A PAGE TITLE
RFFE2_DATA
MOBILE DATA MODEM (2 OF 2) DRAWING NUMBER
1
Apple Inc.
C3602_RF 22PF
2
5% 16V CERM 01005
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
C802 R802 L800 U803
WTR TRANSCEIVER (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D U_WTR_RF
U_WTR_RF
WTR1625
WTR1625
BGA
BGA 15
LB1 LB2
DC
DC
LB4
DC
MB1
NO DC
44
44
MB2
DC
MB3
DC
HB1
NO DC
HB2
DC
HB3
DC
H BM B4
C
PRX_LB1_IN
15
50_B20_PRX_WTR_IN
92
PRX_LB2_IN
15
50_B26_PRX_WTR_IN
73
PRX_LB3_IN
14
50_B13_B17_B28_B29_PRX_WTR_IN65
PRX_LB4_IN
DC
LB3
102
50_B8_PRX_WTR_IN
OUT
91
50_WFR_PRX_LB_CA_IN
50
PRX_MB_CA_IN
18
50_B34_B39_PRX_WTR_IN
51
PRX_MB1_IN
20
50_DCS_WTR_IN
43
50_PCS_WTR_IN
27
PRX_MB3_IN
19
50_B40A_PRX_WTR_IN
19
PRX_HMB4_IN
19
50_B40B_B38X_PRX_WTR_IN
19
50_B41A_PRX_WTR_IN
17
PRX_HB2_IN
17
50_B7_PRX_WTR_IN
18
PRX_HB3_IN
NO DC
NC
33
107 97
OUT
41
OUT
41
OUT
41
OUT
41
LB1
DC
LB2
DC
LB3
DC
LB4
DC
MB1
NO DC
MB2
PRX_MB2_IN
20
9
PRX_BB_QP PRX_BB_QM
WTR_BB_PRX_I_P WTR_BB_PRX_I_N WTR_BB_PRX_Q_P WTR_BB_PRX_Q_N
PRX_LB_CA_OUT
50_WFR_PRX_MB_CA_OUT
IN
PRX_BB_IP 99 PRX_BB_IM 108
SYM 1 OF 5
44
44
DC
20
50_B8_B28B_DRX_WTR_IN
5
20
50_B13_B17_DRX_WTR_IN
15
20
50_B26_B28A_DRX_WTR_IN
16
20
50_B20_B29_DRX_WTR_IN
7
DRX_LB2_IN DRX_LB3_IN DRX_LB4_IN
50_WFR_DRX_LB_CA_IN
32 29
DRX_MB_CA_IN
20
50_WFR_DRX_MB_CA_OUT 50_B34_DRX_WTR_IN
28
DRX_MB1_IN
20
50_B39_DRX_WTR_IN
20
OUT
IN
DRX_LB_CA_OUT
MB3
DC
HB1
NO DC
1
DRX_MB3_IN
HB2
DC
DRX_HMB4_IN
DC
20
50_B40_DRX_WTR_IN 50_B38X_DRX_WTR_IN
2
HB3 HBMB4
NO DC
20
50_B41A_DRX_WTR_IN
12
DRX_HB2_IN
20
50_B7_DRX_WTR_IN
13
DRX_HB3_IN
30
DRX_HB_CA_OUT
36
GNSS_RF_INP
44
GNSS_RF_INM
NC 20
PRX_HB1_IN
SYM 2 OF 5
DRX_LB1_IN
4
NC
PRX_HB_CA_OUT 22 22
100_GPS_WTR_IN_P 100_GPS_WTR_IN_N
DRX_BB_IP DRX_BB_IM DRX_BB_QP DRX_BB_QM GNSS_BB_IP GNSS_BB_IM
76 61 68 60
WTR_BB_GPS_I_P WTR_BB_GPS_I_N WTR_BB_GPS_Q_P WTR_BB_GPS_Q_N
53
GNSS_BB_QP
67
GNSS_BB_QM
85
DNC
WTR_BB_DRX_I_P WTR_BB_DRX_I_N WTR_BB_DRX_Q_P WTR_BB_DRX_Q_N
86
37
OUT OUT OUT OUT
OUT OUT OUT OUT
RADIO_WTR RADIO_WTR RADIO_WTR RADIO_WTR 41
RADIO_WTR RADIO_WTR RADIO_WTR RADIO_WTR 41
NC
DRX_MB2_IN
DRX_HB1_IN
C
U_WTR_RF WTR1625 BGA
WTR_BB_TX_I_P WTR_BB_TX_I_N WTR_BB_TX_Q_P WTR_BB_TX_Q_N WTR_TX_IDAC
8 8 8 8 8
GSM_TX_PHASE_D0 GSM_TX_PHASE_D1
8 8
B
151
1
2
WTR_RTUNE
1% 1/32W MF 01005
8 8
11
5
WTR_SSBI_TX_GPS WTR_SSBI_PRX_DRX
TX_LB1_OUT
162
TX_LB2_OUT
153
152
TX_BB_QP
TX_LB3_OUT
163
161
TX_BB_QM
TX_LB4_OUT
154
127
DAC_REF
123 104 141 94
R3702_RF
SYM 3 OF 5
TX_BB_IM
RADIO_WTR
4.75K
TX_BB_IP
160
71 140
146
TX_MB2_OUT
138
GP_DATA1
TX_MB3_OUT
139
GND
TX_MB4_OUT
155
GND
TX_HB1_OUT
RTUNE
TX_HB2_OUT
GP_DATA0
GND
55
GND
118
GND
105
SSBI_TX_GNSS
95
TX_MB1_OUT
ADC_IN
NC
50_LB_2G_WTR_TX_OUT 50_B8_B26_B20_WTR_TX_OUT 50_B13_B17_B28_WTR_TX_OUT
13 15 14
50_B3_B4_WTR_TX_OUT 16 50_HB_2G_WTR_TX_OUT 13 50_B1_B25_B34_B39_WTR_TX_OUT 16
B
NC
130
50_B7_WTR_TX_OUT
17
121
50_B40_B38_B41_WTR_TX_OUT
17
109
PDET_RFFB
117
GND
122
50_FWD_OR_REV_RF
18
SSBI_PRX_DRX
156
GND
131
XO_IN
50_RF_CLK
A
A PAGE TITLE
RF TRANSCEIVER (1 0F 3)
RF_CLK IS SHARED BETWEEN WTR AND WFR.
DRAWING NUMBER
LENGTH DIFFERENCE BETWEEN THE TWO SHOULD BE < 5MM.
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
WTR TRANSCEIVER (2 OF 2)
C934 R926 L3802_RF U902
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. XW3801_RF 11
4
PP_LDO8 MAKE_BASE=TRUE
6 4 11
VREG_2V_WTR
WTR DECOUPLING CAPS
10
XW3802_RF
PP_LDO1
VREG_1P3V_WTR
10
L3801_RF
MAKE_BASE=TRUE
22NH-3%-0.25A
RADIO_WTR 10
VREG_2V_WTR
VDD_DRX_BB_2V
MAKE_BASE=TRUE
10
10
VREG_1P3V_WTR
D
1
MAKE_BASE=TRUE
2
VDD_PRX_PLL_1P3V 10
10
VREG_1P3V_WTR
10UF
0.1UF 20%
4V 2 X5R 01005
10UF
20% 6.3V
2
CERM-X5R 0402-9
VDD_SHDR_PLL_1P3V
10
RADIO_WTR
20% 6.3V
CERM-X5R 0402-9
VDD_DRX_LB_1P3V
10
10
1 C3821_RF
100PF
0.1UF
5%
20%
10V 2 NP0-C0G 01005
4V 2 X5R 01005
RADIO_WTR VDD_PRX_BB_2V VDD_TX_BBF_2V
10
VDD_PRX_HBMB_1P3V
10
VDD_PRX_LB_1P3V
10
I188
VDD_PRX_VCO_2V
VDD_SHDR_VCO_1P3V
10
RADIO_WTR
VDD_DRX_LO2_1P3V
10
RADIO_WTR
1 C3815_RF
VDD_PRX_VCO_1P3V
90
10
VDD_PRX_VCO_2V
80
10
VDD_PRX_LO_HB_1P3V
25
10
VDD_PRX_LB_1P3V
72
10
VDD_PRX_HBMB_1P3V
34
10
VDD_PRX_LO_HBMB_1P3V
57
10
VDD_PRX_PLL_1P3V
79
10
VDD_PRX_BB_2V
98
20%
VDD_PRX_VCO_1P3V
10
VDD_DRX_LO1_1P3V
14
10
VDD_DRX_LO2_1P3V
38
10
VDD_DRX_LB_1P3V
31
10
VDD_DRX_HB_1P3V
22
10
VDD_DRX_MB_1P3V
11
VDD_DRX_BB_2V
54
10
VDD_SHDR_VCO_1P3V
48
10
VDD_SHDR_VCO_2V
62
10
VDD_SHDR_PLL_1P3V
78
20%
2 4V X5R 01005
2 4V X5R 01005
VDD_DRX_LO1_1P3V
10
RADIO_WTR
VDD_RF2_P_VCO
VDD_DRX_MB_1P3V
10
10
83 82
0.1UF 20%
2 4V X5R 01005
58
2 4V X5R 01005
35 8 26 64
VDD_TX_SYNTH_1P3V
10
VDD_DRX_HB_1P3V
10
10
42
RADIO_WTR
41
1 C3824_RF
B
81
0.1UF 20%
4V 2 X5R 01005
21 6 24 39
VDD_TX_LO_1P3V
10
RADIO_WTR
VDD_GPS_LNA_1P3V
10
RADIO_WTR
1 C3803_RF
RADIO_WTR
1 C3825_RF
0.1UF
10
10
3
MAKE_BASE=TRUE
1 C3828_RF
0.1UF
23
0.1UF
20%
10% 2 10V X5R-CERM 0201
2 4V X5R 01005
VDD_GPS
MAKE_BASE=TRUE
46
20%
2 4V X5R 01005
49 69 88 70
VDD_TX_UPC_1P3V
10
RADIO_WTR
VDD_GPS_BB_1P3V
10
1 C3818_RF
1 C3826_RF
0.1UF
VDD_GPS_PLL_1P3V
100PF
20%
63 40
RADIO_WTR
5%
10V 2 NP0-C0G 01005
10
47
MAKE_BASE=TRUE
87
1 C3829_RF
77
0.1UF 20%
96
4V 2 X5R 01005
XW3803_RF MAKE_BASE=TRUE
10
RADIO_WTR
4V 2 X5R 01005
PP_LDO11
10
VDD_RF1_T_UPC
VDD_RF1_P_HMB
VDD_RF1_T_LO
135
VDD_TX_LO_1P3V
10
VDD_RF1_P_HMB_LO
VDD_RF2_T_BB
126
VDD_TX_BBF_2V
10
VDD_RF1_P_PLL
VDD_RF2_FBRX
116
VDD_FBRX_2V
10
157
VDD_TX_VCO_2V
10
149
VDD_TX_VCO_1P3V
10
115
VDD_TX_SYNTH_1P3V
10
114
VDD_TX_PLL_2V
52
VDD_GPS_LNA_1P3V
10
74
VDD_GPS_VCO_1P3V
10
93
VDD_GPS_PLL_1P3V
10
59
VDD_GPS_BB_1P3V
10
147
VDD_XO_2V
10
103
VDD_MSM_1P8V
10
VDD_RF2_P_BB
56
RADIO_WTR
20%
12 11 8 7 6 4 3
10
VDD_TX_UPC_1P3V
VDD_RF2_T_VCO
VDD_RF2_P_RX
VDD_RF1_T_VCO
VDD_RF1_D_LB_LO
VDD_RF1_T_SYN
VDD_RF1_D_LOM
VDD_RF2_T_PLL
VDD_RF1_D_LB
VDD_RF1_G_LNA
VDD_RF1_D_HB
VDD_RF1_G_VCO
VDD_RF1_D_MB
VDD_RF1_G_PLL
VDD_RF2_D_BB
VDD_RF1_G_BB
10
VDD_RF1_S_VCO
GND
VDD_RF2_S_VCO
VDD_RF2_XO
VDD_RF1_S_PLL
VDD_DIO
C
113
10
1 C3806_RF
0.1UF
10
10
VDD_TX_DA_1P3V
136
VDD_RF1_P_LB
89
VDD_PRX_LO_HBMB_1P3V
10
RADIO_WTR
VDD_PRX_2V
VDD_TX_DA_2V
137
2 4V X5R 01005
1 C3817_RF
I175
129
20%
4V 2 X5R 01005
VDD_FBRX_2V
VDD_RF1_T_DA
0.1UF
DELETED C3805 PR REVIEW FEEDBACK
20%
VDD_XO_2V
VDD_RF2_T_DA
1 C3809_RF
0.1UF
VDD_TX_PLL_2V
BGA
VDD_RF1_P_HB_LO
RADIO_WTR
1 C3816_RF
VDD_TX_VCO_2V
WTR1625 SYM 4 OF 5
10
0.1UF
20%
2 4V X5R 01005
VDD_PRX_2V
10
1 C3833_RF
0.1UF
VDD_RF1_P_VCO
100
10
RADIO_WTR 10
1 C3823_RF
0.1UF
VDD_SHDR_VCO_2V
10
10
MAKE_BASE=TRUE
NBC
U_WTR_RF
RADIO_WTR
1 C3813_RF
RADIO_WTR
D
1 C3830_RF
1 RADIO_WTR C3808_RF
VDD_TX_DA_2V
10
RADIO_WTR
RADIO_WTR
1 C3801_RF 2
VDD_PRX_LO_HB_1P3V
MAKE_BASE=TRUE
0201
WTR DECOUPLING SHARED WITH C3808_RF
RADIO_WTR
GND GND
U_WTR_RF WTR1625 BGA
GND GND
GND
SYM 5 OF 5
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND
GND
GND
GND
GND
GND GND
GND
GND
GND
GND
GND GND
GND GND
GND
111 101 110 145 144 143 128 120 119
B
106 150 134 159 142 125 124 148 158 133 112 132 45 66 84 75 164
GND GND
RADIO_WTR VDD_MSM_1P8V
VDD_TX_VCO_1P3V
10
10
RADIO_WTR 1 C3811_RF
A
1 C3807_RF
1.0UF
0.1UF
10%
VDD_GPS_VCO_1P3V
10
A
20%
2 6.3V X5R-CERM 0201-1
2 4V X5R 01005
RADIO_WTR
PAGE TITLE
RF TRANSCEIVER (2 OF 3)
L3802_RF
DRAWING NUMBER
8.2NH-3%-0.19A-1.6OHM 1
2 01005
VDD_TX_DA_1P3V
Apple Inc. 10
051-00648
REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
C1019 R1016 L1000 U1002
WFR TRANSCEIVER
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. XW3900_RF 10
4
PP_LDO8
1
2
VREG_2V_WFR
U_WFR_RF
11
MAKE_BASE=TRUE
WFR1620 BGA
D
MB1
DC 16
MB2
XW3901_RF 10
6
4
PP_LDO1
1
2
MB3
V D D_ D IG _ 1P 3 V 1 1 V R EG _ 2V _ WF R 11 RADIO_WFR 1 C3904_RF
PPLDO1_WFR MAKE_BASE=TRUE
MAKE_BASE=TRUE
0.1UF
RADIO_WFR
20% 2 4V X5R 01005
1 C3901_RF
10UF
20% 6.3V 2 CERM-X5R
NO DC
16 16
DC
VDD_PRX_VCO_WFR_2V 1 1
MAKE_BASE=TRUE
RADIO_WFR
42
MB1
0.1UF
1 C3903_RF
20% 2 4V X5R 01005
10UF
20% 2 6.3V CERM-X5R
IN
DC 20
0402-9
MB2
NO DC
MB3
DC
20 20
16 6
RADIO_WFR 1 C3905_RF
RADIO_WFR 1 C3913_RF
20% 4V 2 X5R 01005
20% 4V 2 X5R 01005
0.1UF
PRX_LB_CA_IN
50_B25_DRX_WFR_IN 50_B1_B4_DRX_WFR_IN 50_B3_DRX_WFR_IN
49
DRX_MB2_IN
66
DRX_MB3_IN
43
RADIO_WFR
52
GND
19
R_TUNE
4.75K
1
2
7
1% 1/32W MF 01005
GND
DRX_MB_CA_OUT
D
13
WFR_SSBI
8
34 5
50_WFR_PRX_MB_CA_OUT
OUT
42
65
50_WFR_DRX_MB_CA_OUT
OUT
42
PRX_BB_IP 29 PRX_BB_IM 28 PRX_BB_QP
DRX_HB_CA_IN
36
WFR_RTUNE
61
PRX_MB_CA_OUT
DRX_MB1_IN
54
RADIO_WFR 50_WFR_DRX_LB_CA_IN IN R3901_RF
0.1UF
PRX_MB3_IN PRX_HB_CA_IN
NC 42
VDD_XO_WFR_2V 11
1
GND SSBI_PRX_DRX
3
0402-9
VDD_DRX_LO_1P3V 11
RX_OTHER
PRX_MB2_IN
27
NC
GND
SYM 1 OF 2
PRX_MB1_IN
50_WFR_PRX_LB_CA_IN
50_WFR_PRX_HB_CA_IN
RADIO_WFR 1 C3912_RF
22
50_B3_PRX_WFR_IN 50_B1_B4_PRX_WFR_IN 50_B25_PRX_WFR_IN
PRX_BB_QM
DRX_LB_CA_IN
WFR_BB_PRX_I_P WFR_BB_PRX_I_N 25 WFR_BB_PRX_Q_P 30 WFR_BB_PRX_Q_N
8 8 8 8
DRX_BB_IP 62 DRX_BB_IM 63 DRX_BB_QP
DRX_BB_QM
WFR_BB_DRX_I_P WFR_BB_DRX_I_N 57 WFR_BB_DRX_Q_P 64 WFR_BB_DRX_Q_N
8 8 8 8
XO_IN
VDD_DRX_LB_WFR_1P3V11 9 5
50_RF_CLK
C
C I113
VDD_DRX_MB_HB_FE_1P3V 11
VDD1_DRX_BB_2V 11 RADIO_WFR 1 C3915_RF
0.1UF
20% 2 4V X5R 01005
U_WFR_RF WFR1620
I114
VDD_PRX_MBHB_FE_1P3V 11
BGA
VDD1_PRX_BB_2V 11 RADIO_WFR
1 C3916_RF
0.1UF
20% 2 4V X5R 01005
VDD_PRX_LB_FE_1P3V
11
VDD_PRX_VCO_WFR_2V
37
11
VDD_PRX_VCO_WFR_1P3V
33
VDD_RF1_P_VCO
GND
35
11
VDD_PRX_LO_WFR_1P3V
31
VDD_RF1_P_LO
GND
42
11
VDD_PRX_PLL_WFR_1P3V
44
VDD_RF1_P_PLL
GND
11
VDD_PRX_LB_FE_1P3V
15
VDD_RF1_P_LB_FE
GND
20
11
VDD1_PRX_BB_2V
23
VDD_RF2_P_BB
GND
51
11
VDD_PRX_MBHB_FE_1P3V
10
VDD_RF1_P_MHB_FE
GND
11
VDD_DRX_LO_1P3V
47
VDD_RF1_D_LO
GND
45
VDD1_DRX_BB_2V
56
VDD_RF2_D_BB
GND
50
GND
18
GND
9
VDD_RF2_P_VCO
SYM 2 OF 2
GND
PWR_GND
46
53
11
11
B VDD_PRX_VCO_WFR_1P3V 11 RADIO_WFR 1 C3910_RF
0.1UF
20% 2 4V X5R 01005
12
10
8
7
6
4
3
PP_LDO11 MAKE_BASE=TRUE
1
2
VDD_DRX_LB_WFR_1P3V
39
11
VDD_DRX_MB_HB_FE_1P3V
59
VDD_RF1_D_MHB_FE
GND
11
11
VDD_DIG_1P3V
24
VDD_RF1_DIG
GND
21
14
GND
GND
32
VDD_DIO
GND
4
VDD_RF2_XO
GND
11
XW3902_RF
VDD1_1P8V
11
RADIO_WFR 1 C3917_RF
0.1UF
20% 2 4V X5R 01005
41
11
VDD1_1P8V
11
VDD_XO_WFR_2V
2 17
VDD_RF1_D_LB_FE
VDD_PRX_PLL_WFR_1P3V 11 RADIO_WFR 1 C3911_RF
0.1UF
20% 2 4V X5R 01005
55
GND
40
48
GND
58
GND
RADIO_WFR
60
GND
GND
VDD_PRX_LO_WFR_1P3V11
38
GND
GND
GND
B
26 8 12
1 C3902_RF
0.1UF
A
20% 2 4V X5R 01005
A PAGE TITLE
RF TRANSCEIVER (3 OF 3) DRAWING NUMBER
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
C1110 R1102 L1104 U1101
QFE DCDC
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
XW4001_RF SHORT-10L-0.25MM-SM 27
21
19
18
12
PP_BATT_VCC
1
VBATT_SW
2
NOSTUFF
SHOULD BE PLACED MAX 0.25MM AWAY FROM QPOET
XW4002_RF SHORT-10L-0.25MM-SM
1
2
U_QPOET_RF
L4002_RF
12
QFE1100
22-OHM-25%-1800MA
RADIO_QPOET
1
C4001_RF
10UF
27
21
19
18
20% 6.3V 2 CERM-X5R 0402-9
17
SW_GROUND
1
PP_BATT_VCC
12
16
15
14
VPA_ET
12
41
IN
41
IN
12
VBATT_SW
12
SW_GROUND
27
27
21
50
49
48
47
46
41 3 6
BI
RFFE1_DATA
26
50
49
48
47
46
41 3 6
BI
RFFE1_CLK
21
19
18
12
13
PA_CTL_QFE
BST_L
1
PP_BATT_VCC
BGA
VDD_BUCK
2
20
0805
2.2UH-20%-0.7A-0.23OHM
19
RADIO_QPOET
22
GND_BUCK
24
12 27
18
19
15 16
VDD_1P8
5
AMP_OUT
SDATA
MPP1
C_SW_BUCK C_SW_BUCK
VSW_BOOST USID_LSB
C_GSM
(USID)
PA_VBAT
GND
VOUT_BOOST
GND_BOOST
21
12
APT_VINPUT
12
18
19
21
27
PP_LDO11
1.5UH-1.95A-0.111OHM PSB25201T-SM
QPOET_VSW
4
L4003_RF
RADIO_QPOET
VPA_ET
C_BUCK 11 C_BUCK 12
SCLK
PP_BATT_VCC
17
VSW_BUCK
L4001_RF PP_BATT_VCC
VDD_BATT VDD_BATT VDD_AMP
7 AMP_INP 2 AMP_INM
ET_DAC_P ET_DAC_N
5
C
0201
QPOET_BATT 14 BYP_BATT 10 BYP_LOAD 28
12
NOSTUFF
BOTH XW'S > 1.0MM TO CREATE INDUCTANCE
2
VPA_APT
12 13
12
14
GSM_CAP
14 17
12 16
RADIO_QPOET
20% 2 10V X5R-CERM 0402
GSM_CAP
12
VPA_ET
1 C4008_RF
470PF
10% 2 10V
X5R 01005
C
VPA_ET_FILTER RADIO_QPOET
R4001_RF
18
VPA_BATT
25
3
15
4.7UF
6
1
17
RADIO_QPOET
9
GND
16
1 C4007_RF
8
GND_AMP
15
VPA_APT
17
14 17
VOUT_BOOST
15
2.2
16
RADIO_QPOET
1
12
RADIO_QPOET
CRITICAL TO STAY @ 4.7UF TO MEET QPOET TIMING
C4005_RF 20UF
2
20% 6.3V CERM-X5R 0402
5% 1/32W MF 2 01005
(CAN BE CHANGED TO 20UF)
RADIO_QPOET
1 C4010_RF
VOUT_BOOST_GND
470PF 2
12
10% 10V X5R 01005
MITIGATE RX1 DESENSE IN VLB (B13)
B
B
BOOST FILTER
I/O @ 1.8V
L4004_RF
22-OHM-25%-1800MA 12
11
10
8
7
6
4
3
PP_LDO11
12
VOUT_BOOST
1
2
APT_VINPUT
12
0201 RADIO_QPOET
RADIO_QPOET
1 RADIO_QPOET C4002_RF
1 C4003_RF
1 C4006_RF
10UF
10UF
10UF
20% 2 6.3V CERM-X5R
20% 2 6.3V CERM-X5R
0402-9
0402-9
12
2
20% 6.3V
CERM-X5R 0402-9
VOUT_BOOST_GND
2
XW4004_RF SHORT-10L-0.25MM-SM
NOSTUFF
1
A
A PAGE TITLE
QFE DCDC DRAWING NUMBER
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
C1208 R1200 L1204 U1201
2G PA
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
R4100_RF 600-OHM-25%-0.1A 27
25
24
4
PP_VCC_MAIN
1
2
VPA_APT
2G_PA_VBATT_10UA
0201-1
RADIO_2G
RADIO_2G
1 C4108_RF
1 C4109_RF
12
17
RADIO_2G
1 C4107_RF
56PF
2.2UF
5% 2 16V NP0-C0G 01005
2
20% 6.3V X5R-CERM 0201
1
2.2UF 0201
L4101_RF 4.7NH+/-0.3%-0.4A
100PF
20%
2 6.3V X5R-CERM
C4112_RF
2
5% 16V NP0-C0G 01005
1
50_LB_2G_PA_OUT
2 0201
50_LB_2G_ASM_IN
18
C4118_RF
1
0.5PF
+/-0.05PF 16V C0G-CERM 01005
2
RADIO_2G
C4104_RF
100PF 9
VBATT
50_LB_2G_WTR_TX_OUT
50_LB_2G_PA_IN
C
SKY77357
C4103_RF
21 19 18 17 16 14 8
100PF 50_HB_2G_WTR_TX_OUT
50_HB_2G_PA_IN
17 16 15 14 12 8 3 17 16 15 14 12 8 3
5% 16V NP0-C0G 01005
C
LGA
RADIO_2G
9
VCC
U_2GPA_RF
5% 16V NP0-C0G 01005
RFFE_VIO RFFE1_DATA RFFE1_CLK
LBRFIN
LBRFOUT
HBRFIN
HBRFOUT
VIO SDATA SCLK GND EPAD
L4102_RF
1.5NH+/-0.1NH-1.0A
50_HB_2G_PA_OUT
1 RADIO_2G
1 C4113_RF
2
50_HB_2G_ASM_IN 18
0201
0.8PF
2
+/-0.1PF 16V NP0-C0G 01005 NOSTUFF
B
B
A
A
2G PA
PAGE TITLE
DRAWING NUMBER
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
C1332 R1300 L4215_RF U1304
VERY LOW BAND PAD (B13, B17, B28) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
OMIT_TABLE
L4216_RF 7.5NH+/-3%-0.2A 1
D
2
50_B28A_ASM_TRX
D
18
01005
OMIT_TABLE 1 17
16
15
12
C4211_RF 2.2PF
VPA_ET
+/-0.1PF 16V NP0-C0G 01005-1
2
1
C4208_RF 68PF
2
5% 16V NP0-C0G 01005
OMIT_TABLE
L4217_RF
10NH-3%-0.170A 17
16
15
12
VPA_BATT
PLACE INDUCTOR CLOSE TO PA
1
2
50_B28B_ASM_TRX
18
01005
RADIO_VLB_PAD
OMIT_TABLE
1 C4207_RF
1
1.0UF
20% 2 10V X5R-CERM 0201-1
C4213_RF 2.5PF
2
+/-0.1PF 16V NP0-C0G 01005
FL_B17LP_RF
VBAT 14 14 14
C
14 14
50_B28_PAD_IN 50_B12B17_PAD_IN 50_B13_PAD_IN
B28B_ANT
U_VLBPAD_RF
B17_IN
B17_ANT
SKY77802-23
B13_IN
B13_ANT
LGA USE OMIT TABLE TO SELECT SKU VARIANT.
SW1
1
1
50_B29_PAD_ANT
VIO SCLK
15
2 2
LB_VLB_VIO
RFFE1_CLK RFFE1_DATA
RFFE_VIO
01005 3
8
12
13
50_B17_PAD_LPF_IN
THRM
15
16
OUT
50_B17_ASM_TRX
2
18
8 13 21
16
17
18
C
1 3
+/-0.1PF 16V NP0-C0G 01005-1
19
OMIT_TABLE
17
L4223_RF
5.1NH-3%-0.250A 1
PAD
IN GND
C4227_RF
1
GND
4
2.7PF
L4224_RF
SDATA
2 01005
22-OHM-25%-0.2A-0.9DCR
RX_OUT
0402
7.5NH+/-3%-0.2A PLACE INDUCTOR CLOSE TO PA
B29_RX_IN
SW2
BAND17 LFL15710MTCTD717
L4222_RF
50_B28A_PAD_ANT 50_B28B_PAD_ANT 50_B17_PAD_ANT 50_B13_PAD_ANT
B28A_ANT
OMIT_TABLE
B28_IN
CTRL_VLB_BAND_SELECT_1 CTRL_VLB_BAND_SELECT_2
VCC
C4230_RF
2
OMIT_TABLE
01005
15PF 2
1
5% 16V NP0-C0G-CERM 01005
50_B13_ASM_TRX
18
C4231_RF 1.5PF
2
+/-0.05PF 16V NP0-C0G-CERM 01005
PLACE INDUCTOR CLOSE TO PA
L4221_RF
2.4NH+/-0.1NH-0.370A 1
2
50_B29_ASM_TRX
18
01005
B
B
L4211_RF
C4221_RF
22NH-5%-0.1A
100PF 50_B13_B17_B28_B29_PAD_RX
XW4200_RF SHORT-10L-0.1MM-SM
PP_LDO14_RFSW
VCC_VLB_SW
50_B13_B17_B28_B29_MCH_RX 5% 16V NP0-C0G 01005
1
2
50_B13_B17_B28_B29_PRX_WTR_IN 9
01005
1 C4219_RF
1.0PF 4 15
+/-0.1PF
23
2 16V NP0-C0G 01005
NOSTUFF
1 C4201_RF
47PF
5% 2 16V CERM 01005
C4206_RF 100PF 5% 10V NP0-C0G 01005
14 14
A
CTRL_VLB_BAND_SELECT_1 CTRL_VLB_BAND_SELECT_2
VDD
U_VLB_SW_RF CXA2973GC
V1
BGA
V2
RF1
50_B13_B17_B28_WTR_TX_OUT
RF2
50_B12B17_PAD_IN 14 50_B13_PAD_IN 14 50_B28_PAD_IN 14
RF3
C4224_RF 100PF
GND
RF4
9
PAGE TITLE
3.3PF
+/-0.1PF 2 16V NP0-C0G 01005
5% 10V NP0-C0G 01005
OUT V2 V1 BAND RF3 0 1 B12B17 RF2 1 0 B13
A
NOSTUFF
1 C4223_RF
OMIT_TABLE
VERY LOW BAND PAD DRAWING NUMBER
Apple Inc.
P2 DOE
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
C4318_RF R1400 L4322_RF U1402
LOW BAND PAD (B8, B26, B20) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
L4322_RF
C4309_RF 100PF
18NH-3%-0.140A 50_B20_MATCH_1
D
50_B20_PRX_WTR_IN
C4314_RF
L4312_RF
47PF
7.5NH+/-3%-0.2A 1
2 01005
50_B26_PRX_WTR_IN
50_B26_MATCH 5% 16V CERM 01005
1
VPA_ET
C4300_RF
12
14
16
L4313_RF
17
8.2NH-3%-0.19A-1.6OHM
1
01005
47PF
17
16
14
12
5% 16V CERM 2 01005
VPA_BATT
D
9
01005-1
5% 16V NP0-C0G 01005
2
CAPACITOR THAT'S SUPPOSED TO GO HERE IS LOCATED ON VERY LOW BAND PAD. THE 2 PAD'S NEED TO SHARE DECOUPLING
C4304_RF 100PF
50_B20_WTR_TX_OUT
15
5% 10V NP0-C0G 01005
C
15NH-3%-0.140A 5 0_ B8 _M AT CH _1
5% 16V NP0-C0G 01005
15
C4303_RF
CTRL_LB_BAND_SELECT_1 CTRL_LB_BAND_SELECT_2
C4321_RF
5% 16V CERM 01005
B26RX
TQF6410
B20IN
2
5 0_ B8 _P RX _W TR _I N
9
1
C4313_RF 0.9PF
B20RX
U_LBPAD_RF
SW2
50_B20_PAD_IN 50_B26_PAD_IN 50_B8_PAD_IN
18PF
50_B26_WTR_TX_OUT
15
SW1
1 01005
VBATT VCC1 VCC2 15
C
L4315_RF
C4311_RF 100PF
B8RX
LGA
B26IN
B20ANT
B8IN
B26ANT B8ANT VIO
0.7PF
+/-0.1PF 16V NP0-C0G 01005
SCLK SDATA
2
50_B20_PAD_RX 50_B26_PAD_RX 50_B8_PAD_RX
+/-0.05PF 16V CERM 01005
50_B20_PAD_ANT 50_B26_PAD_ANT 50_B8_PAD_ANT LB_VLB_VIO RFFE1_CLK RFFE1_DATA
L4316_RF 5.1NH-3%-0.250A 14
1
3 8
12
13
14
16
17
3 8
12
13
14
16
17
2
50_B20_ASM_TRX
1
C4317_RF 1.0PF
THRM
GND
18
01005
PAD
2
+/-0.1PF 16V NP0-C0G 01005
L4320_RF
B
B
5.6NH-3%-0.23A-1.3OHM 1
2
50_B26_ASM_TRX
18
01005
1
C4318_RF 1.5PF
XW4300_RF SHORT-10L-0.1MM-SM
2
PP_LDO14_RFSW
VCC_LB_SW
+/-0.1PF 16V NP0-C0G 01005
C4305_RF 47PF
L4321_RF
5% 16V CERM 01005
3.3NH+/-0.1NH-290MA 1
2
50_B8_ASM_TRX
18
01005
CTRL_LB_BAND_SELECT_1 CTRL_LB_BAND_SELECT_2
15 15
1
VDD 50_LB_SW_MCH_IN
U_LB_SW_RF CXA2973GC
50_LB_SW_T_MCH 1
50_B8_B26_B20_WTR_TX_OUT
WTR OUTPUT HAS DC FIRST SHUNT MUST BE A CAPACITOR.
BGA
6.8NH-140MA
100PF
9
A
3 V1 2 V2
L4301_RF
C4301_RF
1
RADIO_LB_PAD
2
50_LB_SW_MCH_IN
15
GND
01005
5% 10V NP0-C0G 01005
RF1
6
RF2
5
RF3
7
RF4
4
L4306_RF
15
50_B8_PAD_IN 50_B26_WTR_TX_OUT 50_B20_WTR_TX_OUT
18NH-3%-140MA
15 15 15
V2 V1 A B ND 0 1 B8 1 0 B26 B20
01005
NOSTUFF 2
A
8 9
PAGE TITLE
1
LOW BAND PAD
C4320_RF 2.7PF
2
+/-0.1PF 16V NP0-C0G 01005
DRAWING NUMBER
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
MID BAND PAD (B1, B25, B3, B4, B34, B39)
1
C4426_RF R1500 L4409_RF U1501
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
L4404_RF
C4425_RF
2.2NH+/-0.1NH-0.380A 1
33PF
2 50_B3_PRX_MATCH 01005
D
3.6NH+/-0.1NH-0.280A 1
50_B3_PRX_WFR_IN
11
5% 16V NP0-C0G-CERM 01005
L4403_RF
D
RADIO_WFR
2 01005
VPA_ET
12
14
15
L4405_RF
17
RADIO_MB_PAD
1.5NH+/-0.1NH-0.400A
1 C4408_RF
1
47PF
2
5% 2 16V CERM 01005
50_B1_B4_PRX_WFR_IN
11
01005
L4406_RF 2.7NH+/-0.1NH-0.370A 1
2 01005 RADIO_WFR
17
15
14
12
VPA_BATT
L4409_RF
RADIO_MB_PAD
1
1.0UF
20% 10V 2 X5R-CERM 0201-1
9
50_B3_B4_WTR_TX_OUT
35
B3/4IN
34
B25RX
5
4 6 7 9 1 4 3 5 7 8 9 0 1 2 3 5 8 9 0 1 2 3 1 1 1 1 1 1 1 2 2 2 2 2 2 2 3 3 3 3
FL_B39LP_RF BAND34-39 LFL151G95TCSD734 0402
OMIT_TABLE
L4421_RF 0.8NH+/-0.1NH-0.630A
50_B25_PAD_ANT B25ANT 8 B34_39_OUT 24 50_B34_B39_PAD_ANT
SDATA D D D D D D D D D D D D D D D D D D D D D D N N N N N N N N N N N N N N N N N N N N N N G G G G G G G G G G G G G G G G G G G G G G
OMIT_TABLE
50_B25_PAD_RX
B1/3/4ANT 16 50_B1_B3_B4_PAD_ANT
SCLK 2
50_B1_B25_B34_B39_WTR_TX_OUT
C
B3RX 12 50_B3_PAD_RX B1/4RX 10 50_B1_B4_PAD_RX
VIO 1
9
RADIO_WFR
2
RADIO_MB_PAD
B1/25/34/39IN
11
5% 16V NP0-C0G-CERM 01005
01005
1 2 C C C C V V
LGA
50_B25_PRX_MATCH
2.2NH+/-0.1NH-200MA
7 2
U_MBPAD_RF AFEM-8020-AP1
50_B25_PRX_WFR_IN
01005
L4402_RF
6 2
T T A B V
33PF
2
1
6 3
C
C4423_RF
1.2NH+/-0.1NH-220MA
1 C4407_RF
3
RFFE_VIO RFFE1_CLK RFFE1_DATA
50_B34_B39_LPF_IN 4
IN
OUT
2
50_B34_B39_HB_SWITCH_IN
19
01005 8 13 21
14
17
18
19
GND
3 8 1 2 13 14 1 5 1 7
1 3
3 8 1 2 13 14 1 5 1 7
D D D D D D D D D D D D A A A A A A A A A A A A P P P P P P P P P P P P E E E E E E E E E E E E
7 8 9 0 1 2 3 4 5 6 7 8 3 3 3 4 4 4 4 4 4 4 4 4
L4407_RF 1.3NH+/-0.1NH-0.400A 1
2
50_B1_B3_B4_ASM_TRX
18
01005 1
C4418_RF 0.2PF
2
+/-0.1PF 16V NP0-C0G 01005
NOSTUFF
B
L4401_RF
L4408_RF
2.5NH+/-0.1NH-0.2A 2
1
B
3.6NH+/-0.1NH-180MA
50_B25_ASM_MATCH
1
01005
2
50_B25_ASM_TRX
18
01005
1
C4413_RF 1.4PF
2
+/-0.1PF 16V NP0-C0G 01005
A
A PAGE TITLE
MID BAND PAD DRAWING NUMBER
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
C4533_RF R1600 L1616 U1601
HIGH BAND PAD (B7, B38, B40, B41, XGP) CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
L4512_RF
3.3NH+/-0.1NH-290MA 1
2
D
VPA_ET
12
14
15
16
1
50_B7_PRX_WTR_IN 9
01005
RADIO_WTR
D
OMIT_TABLE
C4522_RF 1.8PF
1
C4507_RF
OMIT_TABLE
68PF OMIT_TABLE
2
2
5% 16V NP0-C0G 01005
+/-0.1PF 16V NP0-C0G 01005
R4509_RF 1
RADIO_HB_PAD
C4501_RF 1
18PF
OMIT_TABLE
50_B7_WTR_TX_OUT
9
0.7PF
2% 16V CERM 01005
RADIO_HB_PAD 16
15
14
12
1.0PF
VPA_BATT
+/-0.1PF 16V 2 NP0-C0G 01005
1 C4505_RF
VPA_APT
1.0UF
OMIT_TABLE
12
2.7NH+/-0.1NH-0.6A
13
RADIO_HB_PAD
20% 2 10V X5R-CERM 0201-1
1 C4506_RF
1
1.0UF
2
50_B41B_FILTER_IN 17
C4532_RF
0201
68PF
20% 10V X5R-CERM 0201-1
2
5% 25V NP0-C0G-CERM 01005
1
C
1 2 C C C C V V
T P A V
50_B7_PAD_IN
9
B7IN
RADIO_HB_PAD
U_HBPAD_RF TQF6430
OMIT_TABLE
50_B40_B38_B41_WTR_TX_OUT
5% 16V NP0-C0G 01005
50_B38_B40_B41_PAD_IN
LGA
B38_40_41
B7ANT
B40B B41C
OMIT_TABLE
+/-0.5PF 16V CERM 01005
B40A/B41A
1
2
50_B40B_TX_FILTER_IN
RFFE_VIO RFFE1_CLK RFFE1_DATA
VIO
C4502_RF
SCLK
1PF
OMIT_TABLE
2
SDATA
+/-0.1PF 16V NP0-C0G 01005
21 8 1 3 14 16 1 8 19
L4523_RF 9.1NH-3%-0.17A-1.7OHM
01005
01005
2
D A P E
0.00
2
2
50_B41C_FILTER_IN 17 0201
50_B40A_TX_HB_SWITCH_IN
OMIT_TABLE
1 1
L4528_RF 01005
2
4.3NH-3%-0.270A 01005
FTB40A41A_RF SAW-BAND-40A-41A-TDD-LX 885058 7 ANT_B40A B40A_PORT 4 8 ANT_B41A LGAB41A_PORT 1
2
5
2
OMIT_TABLE
3.0PF
B
50_B40A_B41A_FILTER_IN 50_B41A_TX_HB_SWITCH_IN
19
+/-0.1PF 16V NP0-C0G 01005
1
1 6
+/-0.1PF 16V NP0-C0G 01005
C4521_RF
OMIT_TABLE
D D D D D D N N N N N N G G G G G G 0 9 1
OMIT_TABLE
2
C4528_RF 0.3PF
7.5NH-5NH%-140MA
L4506_RF OMIT_TABLE
OMIT_TABLE
L4515_RF 2.7NH+/-0.1NH-0.6A
0% 1/32W MF 01005
1
1
OMIT_TABLE
9.1NH-3%-0.17A-1.7OHM
3 8 1 2 16 13 14 15
250_B40B_TX_HB_SWITCH_IN
01005
1
L4527_RF
3 8 1 2 16 13 1 4 15
R4531_RF 50_B40A_TX_HB_SWITCH_MCH 1
50_B40A_B41A_FILTER_IN
4 50_B40B_TX_FILTER_OUT 1
D D D N N N G G G
OMIT_TABLE
OMIT_TABLE D D D D D D D D D D D D D N N N N N N N N N N N N N G G G G G G G G G G G G G
17
OMIT_TABLE 1 UNBAL_PRT1 UNBAL_PRT4
2.2NH+/-0.1NH-0.380A
2 3 5
1
B
L4526_RF
LGA
01005 1
C
FT_B40_RF TX-BAND40-LTE SAFFU2G35MA0F57
L4520_RF 1.3NH+/-0.1NH-0.400A
50_B41B_TX_PAD 50_B40B_TX_PAD 50_B41C_TX_PAD 50_B40A_B41A_TX_PAD
B41B
RADIO_HB_PAD
OMIT_TABLE
OMIT_TABLE
50_B7_RX_PAD 50_B7_ANT_PAD
B7RX
RADIO_HB_PAD
100PF
C4520_RF 0.3PF
2
OMIT_TABLE T T A B V
C4533_RF
18
L4522_RF
OMIT_TABLE
OMIT_TABLE
RADIO_HB_PAD
50_B7_ASM_TRX
2
OMIT_TABLE
+/-0.1PF 16V NP0-C0G 01005
2
OMIT_TABLE
1 C4503_RF
0.00 0% 1/32W MF 01005
C4500_RF
OMIT_TABLE
3
L4517_RF
L4516_RF
L4507_RF
1.5NH+/-0.1NH-0.400A
3.1NH-+/-0.1NH-0.29A
7.5NH+/-3%-0.2A
01005
01005
01005
2
OMIT_TABLE
2
OMIT_TABLE
OMIT_TABLE
2
L4524_RF 1.8NH+/-0.1%-0.380A 1
50_B41B_TX_HB_SWITCH_MCH
OMIT_TABLE
OMIT_TABLE
RADIO_HB_PAD
2
50_B41B_TX_HB_SWITCH_IN
01005
FT_41BC_RF
A 17 17
50_B41B_FILTER_IN 50_B41C_FILTER_IN
SAWEN2G58QA0F57 9 RF2/ RF1/ 1 B41BOUT
6 RF4/
B41BIN
LGA
RF3/
B41COUT
B41CIN
4
A
L4525_RF
SAW-BAND-41B-41C-TDD-TX
1.4NH+/-0.1NH-1.1A 5 0 _B 4 1C _ TX _ HB _ SW I TC H _M C H
PAGE TITLE
HIGH BAND PAD
5 0 _B 4 1C _ TX _ HB _ SW I TC H _I N 0201
D D D D D D N N N N N N G G G G G G 0 1
8
7
5
3
2
DRAWING NUMBER
OMIT_TABLE
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
C1702 R1700 L4608_RF U1702
ANTENNA SWITCH
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
R4607_RF VCC_ASM_FILTERED
1
1
0.00
2
PP_BATT_VCC
12
19
21
27
0% 1/32W MF 01005
C4602_RF 47PF
5% 2 16V CERM 01005
C
C 9 2
OMIT_TABLE
FRX34B39_RF
OMIT_TABLE
BAND34-39 SAWFD1G90LC0F57
L4601_RF
LGA
2.4NH+/-0.1NH-200MA 9
50_B34_B39_PRX_WTR_IN
1
VDD
2
50_B34_B39_FILT_RX
1 INPUT
19
50_HB_SWITCH_TX
1
RF1
U_ASM_RF_RF
19
50_HB_SWITCH_RX
2
RF3
RF5159
17
50_B7_ASM_TRX
3
RF7
50_B39_RX_ASM_OUT
4
RX1
50_B34_RX_ASM_OUT
22
TRX6
OUT_FIL1 9
01005
OUT_FIL2 6
1
50_B1_B3_B4_ASM_TRX
23
TRX7
16
50_B25_ASM_TRX
24
TRX8
13
50_HB_2G_ASM_IN
12 HBTX
21
50_HB_DIVERSITY_ASM
20
14
50_B17_ASM_TRX
15
50_B8_ASM_TRX
16
GND
L4602_RF 3.3NH+/-0.1NH-180MA
2 3 4 5 7 8 0 1
01005
2
TO DIVERSITY MODULE
OMIT_TABLE
TRX2 TRX3
50_B28A_ASM_TRX
9
TRX0
14
50_B28B_ASM_TRX
10
TRX1
15
50_B26_ASM_TRX
16
TRX4
14
50_B13_ASM_TRX
17
TRX5
15
50_B20_ASM_TRX
11
TRX11
50_B29_ASM_TRX
7
14
TO DIVERSITY MODULE 1
1
21
B L 46 03 _R F
L 46 04 _R F 1.0NH+/-0.1NH-0.22A-0.9OHM
01005
01005
NOSTUFF
NOSTUFF
2
32
A2
21
A1
5
50_FWD_OR_REV_RF
50_ANT2_CONN
50_LB_2G_ASM_IN
14 LBTX
50_LB_DIVERSITY_ASM
19
50_ANT1_CONN
26 RFFE_VIO SCLK 28 RFFE2_CLK 27 RFFE2_DATA SDATA
RX2
VIO
9
23
8
13
3
8
8
19
14 19
16
17
19
23
21
21
21
LBRF2 GND
1.0NH+/-0.1NH-0.22A-0.9OHM
FWD/REV
HBRF2
8 18
14
LGA
1
B
C4606_RF 22PF
3 5 5 0 6 1 3 1 1 2 3 3 3
2
5% 16V CERM 01005
2
A
A PAGE TITLE
ANTENNA SWITCH DRAWING NUMBER
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
HIGH BAND SWITCH
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
OMIT_TABLE
C4703_RF 18PF 9
50_B40A_PRX_WTR_IN
50_B40A_PRX_FILTER 5% 16V CERM 01005
XW4700_RF SHORT-10L-0.1MM-SM
1
V CC _H BS
OMIT_TABLE
L4705_RF
OMIT_TABLE
2.0NH+/-0.1NH-0.380A
1
FR40A41A_RF
01005
ANT
2 50_B40A_B41A_RX19
0 8 1
C 9
50_B41A_PRX_WTR_IN
7
5
4
3
1
50_B41A_PRX_MATCH
1
0.00
50_B41A_PRX_FILTER
0% 1/32W MF 01005
5% 6.3V CERM 01005
50_B40B_TX_HB_SWITCH_IN
01005
2
2
27
VBATT
2.2NH+/-0.1NH-200MA
R4700_RF
100PF
21
1
OMIT_TABLE
L4709_RF
OMIT_TABLE
OMIT_TABLE
C4720_RF
18
OMIT_TABLE
1 D D D D D D D N N N N N N N G G G G G G G
12
5% 16V 2 CERM 01005
SAW-BAND-40A-41A-TDD-RX
885055 9 RX_B40A 6 RX_B41A LGA
2
P P_ BA TT _V CC
C4710_RF 47PF
1
11 TX1 12 TX2
17
50_B41B_TX_HB_SWITCH_IN
16
50_B34_B39_HB_SWITCH_IN
17
50_B40A_TX_HB_SWITCH_IN
17
50_B41C_TX_HB_SWITCH_IN
17
50_B41A_TX_HB_SWITCH_IN
19
50_B40A_B41A_RX
19
50_B38X_RX
14 RX1 13 RX2
19
50_B40B_RX
15 RX3
U_HBS_RF
C
CXM3652UR UQFN OMIT_TABLE
7 TX3 8 TX4
TX RF1 5
50_HB_SWITCH_TX
RX RF1 16
50_HB_SWITCH_RX
18
9 TX5 10 TX6
OMIT_TABLE
L4706_RF 1.4NH+/-0.1NH-0.4A 01005
2 21
18
17
16 21
14 18 21
13
8
8 3 18
8
RFFE2_CLK
4 VIO 3 SCLK
RFFE2_DATA
2 SDATA
RFFE_VIO
THRM GND
PAD
6
7 1
OMIT_TABLE OMIT_TABLE
2.7NH+/-0.1NH-0.370A
100PF 50_B40B_B38X_PRX_WTR_IN
50_B40B_B38X_PRX_MATCH2 5% 10V NP0-C0G 01005
B
FR38X40B_RF SAW-BAND-40B-38X-TDD-RX
L4713_RF
C4701_RF 9
1
2
50_B40B_B38X_PRX_FILTER
01005 1
OMIT_TABLE
D D D D D D D N N N N N N N G G G G G G G
1
L4704_RF
L4712_RF
3.7NH-+/-0.1NH-0.27A
01005
OMIT_TABLE
OMIT_TABLE
19 19
50_B40B_RX 1
50_B38X_RX 1
RADIO_HBSWITCH
L4710_RF
12NH-3%-0.140A
L4708_RF
1 3 4 5 7 8 0 1
2.7NH+/-0.1NH-0.370A
01005
2
885056 RF3/RX_B40B 9 2 RF1/ANT LGA RF2/RX_B38X 6
B
01005
OMIT_TABLE
2.9NH-+/-0.1NH-0.36A 01005
OMIT_TABLE
2
2
2
A
A PAGE TITLE
HIGH BAND SWITCH DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
C4826_RF R1800 L1829 U1801
RX DIVERSITY (1)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
MIDBAND MIDBAND DIVERSITY - WFR
D
HIGHBAND DIVERSITY - WTR
L4806_RF
50_B1_B4_DRX_WFR_IN
1
50_B1_B4_DRX_DSM
2
21
50_B7_DRX_WTR_IN
9
1
50_B3_DRX_MATCH 1
1
OMIT_TABLE
9
50_B38X_DRX_DSM
1
+/-0.05PF 16V C0G-CERM 01005
21
9
50_B13_B17_DRX_WTR_IN 1
2
50_B13_B17_DRX_DSM
21
01005
5% 10V NP0-C0G 01005
2.4NH+/-0.1NH-0.370A
OMIT_TABLE 1
L4814_RF
2
1
C4831_RF 0.8PF
1.8NH+/-0.1%-0.380A
01005
C
C4820_RF
L4826_RF 22NH-5%-0.1A
50_B38X_DRX_WTR_IN
L4801_RF
21
0.3PF
C4827_RF 100PF 21
01005
5% 16V NP0-C0G 01005
50_B8_B28B_DRX_DSM
NOSTUFF
2
50_B3_DRX_DSM
2
2 01005
+/-0.1PF 16V NP0-C0G 01005
1.8NH+/-0.1%-0.380A
100PF
1
50_B8_B28B_DRX_WTR_IN
21
1.1PF
+/-0.1PF 16V NP0-C0G 01005-1
L4805_RF
C4805_RF
50_B7_DRX_DSM
OMIT_TABLE C4809_RF
C4803_RF 2.2PF
2
50_B3_DRX_WFR_IN
2 01005
1
11
22NH-5%-0.1A
3.3NH+/-0.1NH-290MA
01005
D
L4825_RF
L4813_RF
1.1NH+/-0.1NH-220MA 11
LOWBAND DIVERSITY - WTR
OMIT_TABLE
2
2
+/-0.05PF 16V C0G-CERM 01005
C
01005
OMIT_TABLE
L4830_RF
L4804_RF
C4804_RF
1.6NH+/-0.1NH-0.390A
100PF
50_B25_DRX_MATCH 1
50_B25_DRX_WFR_IN
11
2
21
9
50_B40_DRX_WTR_IN
1
2
50_B40_DRX_FILTER
21
9
50_B20_B29_DRX_WTR_IN
L4802_RF
2
50_B20_B29_DRX_DSM
1
OMIT_TABLE
2.3NH+/-0.1NH-0.370A 1
1
21
01005
01005
01005
5% 16V NP0-C0G 01005
L4823_RF 22NH-5%-0.1A
0.4NH+/-0.1NH-0.990A 50_B25_DRX_DSM
L4816_RF
2
1
C4832_RF 0.8PF
2.4NH+/-0.1NH-200MA
01005
2
2
+/-0.05PF 16V C0G-CERM 01005
01005
PLACE AT WTR END OF TRACE OMIT_TABLE OMIT_TABLE
C4816_RF
B
9
5 0 _B 4 1A _ DR X _W T R_ I N
C4826_RF 100PF
R4815_RF
100PF
MIDBAND DIVERSITY - WTR
5 0 _B 4 1A _ DR X _W T R_ M CH
1
0.00
2
50_B41A_DRX_FILTER
1
2
50_B26_B28A_DRX_DSM 1
OMIT_TABLE
50_B34_DRX_DSM
1
21
01005
B
L4827_RF
1.3NH+/-0.1NH-0.400A
2
21
01005
L4817_RF
L4807_RF
2.0NH+/-0.1NH-0.380A 50_B34_DRX_WTR_IN
9
L4829_RF
8.2NH-3%-0.19A-1.6OHM
50_B26_B28A_DRX_WTR_MCH1
50_B26_B28A_DRX_WTR_IN 5% 16V NP0-C0G 01005
0% 1/32W MF 01005
5% 16V NP0-C0G 01005
9 21
10NH-3%-0.170A 01005
2 01005 2
PLACE AT WTR END OF TRACE
L4808_RF
3.6NH+/-0.1NH-180MA 1
2 01005
NOSTUFF
C4817_RF 100PF
9
C4808_RF 100PF 9
2
50_B39_DRX_DSM
2
21
21
L4820_RF
01005
5% 16V NP0-C0G 01005
50_PCS_DSM_OUT
01005
5% 16V NP0-C0G 01005
2.4NH+/-0.1NH-0.370A
50_B39_DRX_MATCH 1
50_B39_DRX_WTR_IN
L4819_RF 2.2NH+/-0.1NH-0.380A
50_PCS_DRX_MATCH 1
50_PCS_WTR_IN
L4809_RF
2.7NH+/-0.1NH-0.370A
L4810_RF
1
2.2NH+/-0.1NH-0.380A 1
2 01005
2 01005
C4818_RF
A
100PF 9
50_DCS_WTR_IN
L4822_RF
A
2.2NH+/-0.1NH-0.380A
50_DCS_DRX_MATCH 1
50_DCS_DSM_OUT
2
21
PAGE TITLE
RX DIVERSITY
01005
5% 16V NP0-C0G 01005
DRAWING NUMBER
L4821_RF 5.6NH-3%-0.23A-1.3OHM 1
Apple Inc.
051-00648
REVISION
R
2 01005
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
RX DIVERSITY (2)
C1900 R1900 L1900 U1901
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
L4905_RF 22-OHM-25%-0.2A-0.9DCR
C
1
VCC_DSM
2
PP_BATT_VCC
12
18
19
C
27
01005 1
C4901_RF 15PF
2
5% 16V NP0-C0G-CERM 01005
2 D D V
20 20 20 20 20 20 20 20
OMIT_TABLE
20
FD40B41A_RF
20
SAW-2-1-BAND-40-41A-DRX
20 20
6 9
50_B40_DRX_FILTER 50_B41A_DRX_FILTER
B39252B9920P810 B40OUT B41AOUT
B40IN
LGA
B41AIN
20
4 1
50_B1_B4_DRX_DSM 50_B3_DRX_DSM 50_B7_DRX_DSM 50_B8_B28B_DRX_DSM 50_B13_B17_DRX_DSM 50_B25_DRX_DSM 50_B26_B28A_DRX_DSM 50_B20_B29_DRX_DSM 50_B34_DRX_DSM 50_B39_DRX_DSM 50_B38X_DRX_DSM 50_B40_DRX_DSM 50_B41A_DRX_DSM
D D D D D D N N N N N N G G G G G G
1
OMIT_TABLE
B
OMIT_TABLE
L4901_RF
7
5
3
2
OMIT_TABLE
RX_BAND_3
16 19
RX_BAND_7 RX_BAND_8+28B
25
RX_BAND_12+13
34
RX_BAND_25
21
RX_BAND_26+28A
23
RX_BAND_20
12
RX_BAND_34
13
RX_BAND_39
17
RX_BAND_38X
14
RX_BAND_40
15
RX_BAND_41A
VIO 3
U_DSM_RF LGA
2
8 13
14
RFFE2_DATA
8 18
19
SCLK 5
RFFE2_CLK
3 8
ANT_LB
7
50_LB_DIVERSITY_ASM
18
ANT_HB
9
50_HB_DIVERSITY_ASM
18
PCS
29
50_PCS_DSM_OUT
20
DCS
30
50_DCS_DSM_OUT
20
OMIT_TABLE
1 6 8 0 1 8 0 2 4 6 7 8 1 1 1 1 2 2 2 2 2 2 3
RFFE_VIO
4
SDATA
M472B
18
16
17
18
19
19
THRM PAD
5 6 7 8 9 0 3 3 3 3 3 4
B
L4904_RF 5.1NH-3%-0.250A
01005
01005
2
OMIT_TABLE
5.6NH-3%-140MA
5.6NH-3%-0.23A-1.3OHM
01005
1
L4903_RF
L4902_RF
15NH-3%-0.140A
2
0 8 1
RX_BAND_1_4
33
D D D D D D D D D D D D D N N N N N N N N N N N N N G G G G G G G G G G G G G
1
1
32
01005
2
A
A PAGE TITLE
RX DIVERSITY (2) DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
C1900 R1900 L1900 U1901
GPS
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
D
D
C
C
L5002_RF
10NH-3%-0.170A
FL_GPSRF_RF
1
100_GPS_FIL_OUT_P
2
LNA-GNSS-BAL B8821 50_GPS_DSM_IN
1
UNBAL_PORT
9
100_GPS_WTR_IN_N
9
01005
LGA 23
100_GPS_WTR_IN_P
BAL_PORT
3
BAL_PORT
4
RADIO_GPS 1
C5001_RF
1.0PF
+/-0.1PF 16V 2 NP0-C0G 01005
D D N N G G 2 5
L5003_RF
10NH-3%-0.170A 100_GPS_FIL_OUT_N
1
2 01005
B
B
A
A PAGE TITLE
GPS DRAWING NUMBER
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
ANTENNA FEEDS
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST. L5107_RF
ANT & COAX CONNECTOR FOR LOWER & UPPER SECTION OF MLB
20NH-3%-.14A-2.9OHM PAC_VDD_3V0_IN
PAC_VDD_3V0
4 14
15
23
01005 1
VBAT
D
FL5146_RF
UPPER_LBMB_ANT_RF SM-NSP
L5101_RF
FLTR-GPS-0603
1.6X1.21MM 1
1
50_UPPER_LBMB
IN
OUT
U_ANTPAC_RF
3
1
50_NTCH_FILT_OUT
2
2
RF1346
2.4NH+/-0.2NH-0.57A-0.07OHM
LFE18832MHC1D449
C5106_RF 33PF 5% 16V NP0-C0G-CERM 01005
1
2
C5107_RF 0.01UF
RADIO_LOW_ANT
10% 6.3V X5R 01005
50_UAT_PAC
RF1
MM5829-2700
50_UAT_CELL_F
RF2
F-ST-SM1
VIO_FILT
VIO
23
23
SDATA SCLK
1
C5105_RF 0.8PF +/-0.05PF 16V C0G-CERM 01005
2
GND
BYPASS CAPS FOR ALTERNATE ANTENNA WITHOUT U_ASWNT
RFFE2_PAC_DATA_FILT 23
R5137_RF
RFFE2_PAC_CLK_FILT23
OMIT_TABLE
NC
NC
NC
NC
NC
NC
0.00
1% 1/20W MF 0201 XW5100_RF SHORT-10L-0.1MM-SM 23
15
14
4
PP_LDO14_RFSW
C5109_RF
VCC_SWANT
47PF 5% 16V CERM 01005
L5103_RF 20NH-3%-.14A-2.9OHM RFFE_VIO_S2R
27
50_ANT2_CONN
18
03015
NC
2
NC
D
LOW_COAX_RF
WLCSP
VIO_FILT
23
TO THE PAC FOR LBMB
01005
C5103_RF 0.01UF
1
10% 6.3V X5R 01005
2
UP_COAX_RF
C5104_RF 33PF
1
F-ST-SM1
5% 16V NP0-C0G-CERM 01005
2
VDD
U_SWUANT_RF
MM5829-2700
CXA4011GC 50_ANT2_UPPER_COAX_CONN UAT_SELECT 0=UPPER_LBMB_ANT 1=UPPER_HB_ANT 8
C
R5104_RF 8
0.00
RFFE2_DATA_BUFFER
2.5NH+/-0.1NH-500MA
2.5NH+/-0.1NH-500MA
1
23
2
1
50_UAT_CELL_LPF
0201
GND
2
C5110_RF
RFFE2_PAC_CLK_FILT 23
C5102_RF
1
C
L5111_RF 7.5NH-+/-0.2NH-440MA 03015
+/-0.05PF 25V C0G-CERM 0201
2
120PF 2
0.00 0% 1/32W MF 01005
50_UAT_CELL_F
1
1.1PF
1
2 0201
RF2
1
R5105_RF RFFE2_CLK_BUFFER
50_UAT_CELL
RF1 OMIT_TABLE XFLGA
VC1
L5109_RF
RFFE2_PAC_DATA_FILT 23
0% 1/32W MF 01005
8
RF
L5108_RF
10% 10V CER-X7R 01005
C5101_RF 120PF
2
10% 10V CER-X7R 01005
50_WIFI_2G_NOTCHPLEXER_IN
BI
57
L5123_RF 1.7NH-+/-0.1NH-0.8A-0.07OHM 0201
DPX165950DT-8030D1
FLCELWIF_RF
FLWIFDIP_RF
DIPLEXER-CELL-WIFI 885072
R5101_RF
SM
B
MM5829-2700 F-ST-SM1
1
50_UPPER_HB_ANT_FEED 1
2
6
50_WIFI_2G_DIPLEXER_IN2
HIGH_BAND
4
50_WIFI_5G_IN_OUT
COMMON
2
1
BI
0.00
2
1% 1/20W MF 0201
57
NOSTUFF
L5122_RF 12NH-3%-0.140A
LGA
50_WIFI_2G_DIPLEXER_IN
9 RF1
RF3
7 SMD2_RF1/SMD4_GND
RF2 4
1
SMD1_RF2
GND 5
3
L5120_RF 1
0 1
3.0NH+/-0.1NH-0.6A
8
5
P2 DOE
1 50_WIFI_2G_NOTCHPLEXER_IN2
L5106_RF
F R 2 _ 49.9 2 1% 0 MF 1/20W 1 5 1 201 NOSTUFF R
4.3NH+/-3%-0.5A 3 2
1
50_WICE_CELL2_IN
0201
2
50_UPPER_HB_CELL
0201
L5102_RF 1.2NH-+/-0.05NH-1.1A-0.04OHM 5 0_ UP PE R_ HB _A NT _F EE D2
2
5 0_ UP PE R_ HB _A NT _F EE D1
B
01005
6
GND
F R _ 8 F F P 3 P 1 . 1 2 0 1 V R 0 5 . / 5 E 2 C 8 + 2 C 0
RADIO_LOW_ANT
UPPER_HB_ANT_RF
LOW_BAND
50_WICE_ANT2_GND
0201
NOSTUFF
2 3 4
1
1
C5139_RF 0.2PF
2
L5121_RF
+/-0.05PF 25V COG-CERM 0201
5.6NH-3%-0.23A-1.3OHM 01005
R5136_RF 0.00
PP_LDO13_GPS VOLTAGE=2.95V
1
C5129_RF 22PF
2
MODULE INCLUDES INTERNAL DECOUPLING
GPS FEED
GPS_SP1_RF
A
1.6X1.21MM SM-NSP
5% 16V CERM 01005
1% 1/20W MF 0201
2
PP_LDO13 1
4 6
C5130_RF 2.2UF
2
20% 6.3V X5R 0201-2
NOSTUFF
NOSTUFF
RADIO_LOW_ANT
VCC
C5136_RF
1 50_GPS_ANT_FEED
50_GPS_ANT_MATCH
+/-0.05PF 25V C0G-CERM 0201
1
1
I248 NOSTUFF
0.00
2
22NH-100MA
RFIN
LGA
RFOUT
50_GPS_DSM_IN
18
NOSTUFF1
50_ANT1_CONN 1
GND
MM5829-2700
THRM_PAD 2
C5128_RF 0.3PF +/-0.05PF 25V C0G-CERM 0201
2
A
F-ST-SM1
1.4NH+/-0.1NH-1.1A
22
50_ANT1_CONN_R
PAGE TITLE
1
0201 4
3
ANTENNA FEEDS DRAWING NUMBER
2
Apple Inc.
051-00648
REVISION
R
0201
SPRING-OVERPASS-GND-NORTH-X145 1 CLIP-SM
50_GPS_ANT
LOW_ANT_RF
L5129_RF
SKY65736
1% 1/20W MF 0201
L5135_RF SP3_RF
U_GPSLNA_RF
R5135_RF
1.8PF
2
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
2
1
WLAN/BT WIFI_BT 60
58
46
37
33
PP_VCC_MAIN
IN
D
C5221_RF
C5220_RF
20% 6.3V X5R-CERM 0201
20% 6.3V CER-X5R 0402
2.2UF
1 WIFI_BT C5202_RF
1 WIFI_BT C5203_RF
4.7UF
4.7UF
2
27PF
20% 6.3V CER-X5R
2
0402
5% 16V NP0-C0G
WIFI_BT
1 WIFI_BT C5222_RF
01005
5% 16V NP0-C0G 01005
5% 1/20W MF 201
WIFI_BT 1
C5213_RF 0.2PF
2
WIFI_BT R5208_RF 60
33
PP_WL_BT_VDDIO_AP
IN
1
0.00
2
24
PP_WLAN_VDDIO_1V8
+/-0.1PF 16V NP0-C0G 01005
1 WIFI_BT C5204_RF
0.01UF
2
10% 6.3V X5R 01005
CLK32K_AP
IN
2
L5216_RF
5% 16V NP0-C0G 01005
C5201_RF
WLAN_SR_VLX
7.5UF
WIFI_BT
20% 4V CERM 0402
1
C
LFH185G53RG1D868
4 IN
L5201_RF
1
2
WLAN_SR_LC 2
3 4 2 2 T T T T A A B B V V
0201
4 5 5 5
1 C C V _ F R _ T T A B V
C C V _ F R _ T T A B V
WIFI_BT
5G_ANT
WIFI_BT
26 VIN_LDO 28 SR_VLX
U5201_RF
60
36
33
IN
60
36
33
IN
WLAN_REG_ON BT_REG_ON
GPIO_1 8 43 BT_HOST_WAKE
LGA
9 WL_REG_ON 10 BT_REG_ON
60
60
36
33
60
33
OUT
57
33
IN
60
33
60
33
IN
60
33
IN
36
33
36
33
IN
36
33
OUT
36
33
WLAN_PCIE_PERST_L
14 PCIE_PRST* 13 PCIE_CLKREQ*
WLAN_PCIE_CLKREQ_L 90_WLAN_PCIE_REFCLK_N
16 PCIE_REFCLK_N 17 PCIE_REFCLK_P
90_WLAN_PCIE_REFCLK_P 90_WLAN_PCIE_RDN
IN
60
30 GPIO_0 12 PCIE_WAKE*
WLAN_PCIE_WAKE_L
BI
60 60
HOST_WAKE_WLAN
OUT
90_WLAN_PCIE_RDP 90_WLAN_PCIE_TDN 90_WLAN_PCIE_TDP
OUT
24 36 36 60 36 33
IN
WAKE_BT
BT_UART_CTS*
38
BT_UART_CTS_L
BT_UART_RTS*
39
BT_UART_RTS_L
BT_UART_RXD
41
BT_UART_RXD
BT_UART_TXD
40
BT_UART_TXD
BT_PCM_CLK 49 50
BT_PCM_CLK
BT_PCM_SYNC
18 PCIE_TDN 19 PCIE_TDP
BT_PCM_OUT
BT_PCM_IN
BI IN
11 JTAG_SEL 31 JTAG_TCK(GPIO_2)
JTAG_SEL
WLAN_JTAG_SWDCLK OSCAR_CONTEXT_A
34 JTAG_TMS(GPIO_3) 32 JTAG_TDI(GPIO_4)
OSCAR_CONTEXT_B
35 JTAG_TDO(GPIO_5) 33 JTAG_TRST(GPIO_6)
WLAN_JTAG_SWDIO
NC 60 36 33
IN
BT_PCM_IN
47
BT_PCM_OUT
WLAN_UART_RTS_L
UART_RX(GPIO_9) 3 UART_TX(GPIO_10) 2
WLAN_UART_RXD
SECI_TX(GPIO_13) 6 SECI_RX(GPIO_14) 5
WLAN_COEX_TXD
THRM_PAD
1 5 5 7 9 7 4 6 1 2 3 7 1 2 2 2 3 4 4 5 5 5 5
B
BT_PCM_SYNC
48
9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 5 6 6 6 6 6 6 6 6 6 6 7 7 7 7 7 7 7 7 7 7 8 8 8 8 8 8 8 8 8 8 9 9 9 9 9 9 9 9 9
7
IN
33
36
WLAN_UART_CTS_L WLAN_UART_TXD
IN
33 36 60 33 36 60
IN
33 36 60
OUT
33 36 60
BI
+/-0.05PF 25V COG-CERM 0201
33 60
OUT
BI
C5212_RF
NOSTUFF
2
OUT
50_WIFI_5G_IN_OUT
0.2PF
2
2.7NH+/-0.1NH-0.50A
60
IN
UART_RTS(GPIO_7) 56 UART_CTS(GPIO_8) 4
RF_SW_CTRL_8
GND
33 33
33 36
60
C
WIFI_BT R5210_RF
100K
5% 1/32W MF 2 01005
36
60
36
60
IN
33
36
60
OUT
33
36
60
OUT
33 36 60
IN
33 36 60
IN
33 36 60
OUT
33 36 60
WIFI_BT R5206_RF 1
WLAN_COEX_RXD
0.00 2
BB_COEX_UART_RXD
3 8
BB_COEX_UART_TXD
3 8
0% 1/32W MF 01005
NC
WIFI_BT R5205_RF 1
0.00 2
B
0% 1/32W MF 01005
27
24
PP_WLAN_VDDIO_1V8
WLAN_PCIE_PERST_L
1
C5215_RF 100PF
2
5% 16V NP0-C0G 01005
24
WIFI_BT R5201_RF
10K
5% 1/32W MF
2 01005
NOSTUFF JTAG_SEL
A
42
20 PCIE_RDN 21 PCIE_RDP
DC BLOCKS LOCATED ON AP SIDE SWIZZLE DATA LANE ON TOP-LEVEL
PCIE_DEV_WAKE HOST_WAKE_BT
BT_DEV_WAKE
0603
4 60
45 50_WLAN_G_ANT 58 50_WLAN_A_ANT
OUT 2
WIFI_BT 1
0201
2G_ANT
SM GND
NOSTUFF
L5208_RF
LBEE5U8ZKC-646
2.2UH-20%-0.3A-0.38OHM 3
56
FL5201_RF
1.3NH+/-0.1NH-1.1A
36 CLK32K
WLAN_BUCK_OUT
WIFI_BT
BI
+/-0.1PF 16V NP0-C0G 01005
WIFI_BT
27PF
V 8 P 1 _ O I D D V
32K INTERFACE TO AP 33
56
NOSTUFF
1 WIFI_BT C5205_RF
2 2
36
BI
C5211_RF 0.2PF
2
NOSTUFF
50_WIFI_5G_BPF_RADIO
60
50_WIFI_2G_NOTCHPLEXER_IN WIFI_BT 1
VOLTAGE=1.80V
0% 1/32W MF 01005
WIFI_BT
D
R5214_RF 0 2 1
27PF
2
WIFI_BT R5202_RF
10K
5% 1/32W MF
2 01005
24
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
WIFI/BT: MODULE AND FRONT END DRAWING NUMBER
Apple Inc.
051-00648 REVISION
4.0.0
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
SIZE
D
8
7
6
5
4
3
2
1
C2101 R2100 L2102 U2100
STOCKHOLM
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
U5302_RF WLCSP
27
25
24
13
4
PP_VCC_MAIN
L5303_RF
D
B1 SW B2 SW
1.8UH-0.7A
1
C5321_RF
1
15UF
2
2 0603 STOCKHOLM_BOOST_SW
20% 6.3V X5R 0402-1
X 0 5 C U B 4 1 6 8 4 N A F
A3 VIN
VOUT A1 VOUT A2
STOCKHOLM_5V
B3 EN
1 D D N N G G P P 1 2 C C
25
C5322_RF
1
20% 6.3V X5R 0402-1
2
15UF
D N G A
2
3 C
D
C5323_RF 15UF
20% 6.3V X5R 0402-1
USE LDO11 TO MATCH IMPLEMENTATION OF N71/66
STOCKHOLM_5V
25
PP_LDO11
R5313_RF 0.00 27
25
24
13
4
PP_VCC_MAIN
1
STOCKHOLM_TVDD
RADIO_STOCKHOLM
1UF
1UF
2
2
R5310_RF 0.00 2 1
1 C5324_RF 20% 10V X5R 0201
0% 1/32W MF 01005
25
20% 10V X5R 0201
25
1 C5302_RF
1UF
6 7 5 3 C C B D
20% 10V X5R 0201
2 7 G E
D T D D A C D V B C V V V P _ U M P _ M I S
D D V A
1UF
RADIO_STOCKHOLM
1 C5303_RF
2
0.1UF
D D D D V V S _ E S E
20% 10V X5R 0201
33
36
33 60
OUT
D1
STOCKHOLM_TO_PMU_HOST_WAKE NC
58
58 60
IN
38 3 6
OUT
38 3 6
IN
36
33 60
IN
36
33
58
36
33 60
IN
60
36
33
OUT
36
33 60
IN
58
OUT
AP_TO_STOCKHOLM_FW_DWLD_REQ
A5 B2 A2
STOCKHOLM_TO_BBPMU_CLK_REQ 45_BBPMU_TO_STOCKHOLM_19P2M_CLK
A3
SVDD_REQ
UFLGA
DWL CLK_REQ
STOCKHOLM_SIM_PRES
SPIM_NSS A6 NC D5
STOCKHOLM_DC_BOOST
STOCKHOLM_TO_SIM_SWP
TX_PWR_REQ
NFC_CLK_XTAL1
ESE_DWPM_DBG
G7
ESE_DWPS_DBG
G6
STOCKHOLM_UART_TXD
B1
TX
STOCKHOLM_UART_CTS
D2
CTS
RXP
F6
STOCKHOLM_RXP
STOCKHOLM_UART_RTS
A1 E1
RTS
RXN
PP_STOCKHOLM_ESE NC NC NC NC NC
B
NC
E3
SMX_RST*
E4
SMX_CLK
F4
ESE_IO1
B3
SPIM_MOSI
B4
SPIM_MISO
E6
SPIM_SCK
C3
XTAL2
STOCKHOLM_RXN
G3
STOCKHOLM_TX1
TX2
G5
STOCKHOLM_TX2
VMID
SE2_SVDD_IN
2 E
C5310_RF 2% 25V NPO-C0G 0201
1 1 0 F 0 R 2 _ E 5 1 6 0 0 0 8 0 3 2 5 1 0 T 2 B T A
36
1
E5
STOCKHOLM_BAL0 1
AP_TO_STOCKHOLM_DEV_WAKE
IN
33
58
60
S S S S S S V V V A A A 4 6 3 D D F
S S S S V V D D
SE2_SVDD_IN
6 4 B C
S S S S V V T P
1
2% 50V NP0-C0G 0201
STOCKHOLM_ANT
C5313_RF 560PF
NOSTUFF 1
0 L D A N B G
1
2% 25V NPO-C0G 0201
C5316_RF 1000PF
C5315_RF
1000PF
2
2% 25V C0G-NP0 0201
2% 25V C0G-NP0 0201
C5318_RF 330PF 2% 25V NPO-COG 0201
1
C5319_RF
100PF
2
2% 50V C0G 0201
TP5303_RF A TP-P55
C5314_RF 22PF
USE FIDUCIAL FOR SH ANTENNA GND 5% 50V C0G 0201
2% 25V NPO-C0G 0201
NOSTUFF
SM PP
STOCKHOLM
25
C5309_RF
25
R5304_RF
STOCKHOLM_RXN_CAP
NOSTUFF RADIO_STOCKHOLM
1 C5317_RF
4 2 G C
82PF
PP5304_RF P2MM-NSM
SE2_PWR_REQ
G1
C5311_RF
560PF
F7 STOCKHOLM_VMID F2
1 L L A A B B N U
2
2 0402
STOCKHOLM_ANT_MATCH
3 4
560PF 2
2
0.1UF
20% 6.3V X5R-CERM 01005
2
STOCKHOLM_SIM_PRES
1
1000PF S S V
TP5301_RF
0402
L5302_RF 160NH-10%-0.48A-0.33OHM
F5
WKUP_REQ
STOCKHOLM_BAL1
1
SH_DWP_S
TX1
SE2_PWR_REQ
PP
C5312_RF
2
SH_DWP_M
RX
VEN
1
25
C1
25
A
BI
STOCKHOLM_UART_RXD
AP_TO_STOCKHOLM_EN
PP
1
PP5303_RF P2MM-NSM
SPIM_IRQ F1 NC SIM_SWIO A4 GPIO0 A7
C
NOSTUFF
SM
STOCKHOLM
SM
PN66VEU3-A101D003
IRQ
2
5% 1/20W MF 201
L5301_RF 160NH-10%-0.48A-0.33OHM
PP5302_RF P2MM-NSM
10% 10V X5R-CERM 0201
2
560
1
2% 25V C0G-NP0 0201
RADIO_STOCKHOLM
1 C5304_RF
PP_STOCKHOLM_ESE VOLTAGE=1.80V
7 5 B C
7 D
P D U D V V T
U5301_RF 36
R5303_RF
STOCKHOLM_RXP_CAP VOLTAGE=1.80V
STOCKHOLM
60
STOCKHOLM_DC_BOOST_EN
1000PF
RADIO_STOCKHOLM
2
2
0% 1/32W MF 01005
C5308_RF
STOCKHOLM_SVDD_IN
PP_STOCKHOLM_1V8_S2R
C
1
PP_PN66_SIM_PMU
STOCKHOLM_DVDD 27
R5309_RF 0.00
27
0% 1/32W MF 01005
1 C5330_RF
RADIO_STOCKHOLM
25
2
R5316_RF 0.00 1
2
PP_STOCKHOLM_1V8_S2R
25
1
27
560
B
2
5% 1/20W MF 201
2% 25V C0G-NP0 0201
0% 1/32W MF 01005
25
TP-P55
PU FOR MAUI IO WAKE GLITCH
27
25
PP_STOCKHOLM_1V8_S2R 27
25
PP_STOCKHOLM_1V8_S2R
RADIO_STOCKHOLM RADIO_STOCKHOLM
R5301_RF
R5306_RF
100K
100K
5% 1/32W MF 2 01005 60
60
58
58
36
36
33
33
IN
IN
5% 1/32W MF 2 01005
AP_TO_STOCKHOLM_EN 60
58
36
33
STOCKHOLM_UART_CTS
IN
AP_TO_STOCKHOLM_FW_DWLD_REQ RADIO_STOCKHOLM
R5302_RF
100K
2
27
5% 1/32W MF 01005
25
PP_STOCKHOLM_1V8_S2R RADIO_STOCKHOLM
R5307_RF
100K
A
2 60
58
33
IN
AP_TO_STOCKHOLM_DEV_WAKE
60
58
36
33
IN
STOCKHOLM_UART_RXD
5% 1/32W MF 01005
A
SYNC_MASTER=N/A
SYNC_DATE=N/A
PAGE TITLE
STOCKHOLM
RADIO_STOCKHOLM
R5305_RF
DRAWING NUMBER
100K
5% 1/32W MF 2 01005
Apple Inc.
051-00648
REVISION
R
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
4.0.0
SIZE
D
8
7
6
5
4
3
N69 SKU BOM OPTION TABLE N69H N69H TDD
N69
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE
DESIGNATOR(S)
CRITICAL
BOM OPTION
PART#
QTY
DESCRIPTION
2
1
TABLE_5_HEAD
REFERENCE
CRITICAL
BOM OPTION
U_DSM_RF
DESIGNATOR(S)
CRITICAL
N69
U_VLBPAD_RF
CRITICAL
N69
39K 1% 01005
R 33 12 _R F
C RI TI CA L
N69
1
0R 0201
R5137_RF
CRITICAL
N69
1
5.1NH 0.1NH 01005 250MA
L 42 23 _R F
C RI TI CA L
N69
131S0599
1
01005 1.5PF
C 42 31 _R F
C RI TI CA L
N69
118S0652
1
01005 49.9R
C4211_RF
CRITICAL
N69
118S0652
1
01005 49.9R
C4213_RF
CRITICAL
N69
118S0652
1
01005 49.9R
C4500_RF
CRITICAL
N69
1 1 7S 0 16 1
1
0 R 0 1 00 5
R4509_RF
CRITICAL
N69
TABLE_5_ITEM
D
353S4180
1
RADIO HIGH BAND PAD
131S0417
1
18PF 01005 16V
U_HBPAD_RF
CRITICAL
N69H
C4501_RF
CRITICAL
N69H
1
1.0PF 01005 16V
C4503_RF
CRITICAL
N69H
131S0635
1
68PF 01005 16V
138S0706
1
1UF 0201 10V
C4507_RF
CRITICAL
N69H
C4505_RF
CRITICAL
N69H
1
100PF 01005
C4827_RF
CRITICAL
N69H
152S1720
1
1.8NH 01005
L4814_RF
CRITICAL
N69H
152S1544
1
0.4NH 01005
L4830_RF
CRITICAL
N69H
152S1564
1
2.4NH 01005
L4816_RF
CRITICAL
N69H
L4512_RF
CRITICAL
N69H
131S0247
1
1.8PF 01005 16V
C4522_RF
C R IT I CA L
N 6 9H
1
SKY77826
118S0729
1
118S0724 152S1993
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
3.3NH 01005 +/-0.1NH
353S00331
TABLE_5_ITEM
TABLE_5_ITEM
1
DSM M471A NO B7
TABLE_5_ITEM
TABLE_5_ITEM
152S1907
1
TABLE_5_ITEM
131S0307 TABLE_5_ITEM
131S0375
TABLE_5_ITEM
TABLE_5_ITEM
131S0307
1
100PF 01005
C4816_RF
CRITICAL
N69H
117S0161
1
0R 01005
R4815_RF
CRITICAL
N69H
T AB LE _5_ IT EM
TABLE_5_ITEM
T AB LE _5_ IT EM
TABLE_5_ITEM
152S1900
1
1.3NH 01005
L4817_RF
CRITICAL
N69H
TABLE_5_ITEM
TABLE_5_ITEM
353S00374
1
TDK MODULE M472A NO B12/B13/B17
U_DSM_RF
C R IT I CA L
N 6 9H
152S1998
1
IND 0.8NH 630MA 01005
L4421_RF
CRITICAL
N69H
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
152S1996
1
15NH 01005
L4901_RF
CRITICAL
N69H
T AB LE _5_ IT EM
353S00390
1
SKY77827
U_VLBPAD_RF
CRITICAL
N69H
1
2.2PF 0.1PF 01005 COG
C4211_RF
CRITICAL
N69H
152S1567
1
3.3NH 01005
L4813_RF
C R IT I CA L
N 6 9H
131S0376
1
1.1PF 01005
C4809_RF
CRITICAL
N69H
152S1571
1
5.6NH 01005
L4902_RF
CRITICAL
N69H
152S1571
1
5.6NH 01005
152S1623
1
5.1NH 01005
155S0908
1
SAW DRX B40B41A
117S0161
1
152S1907
L4903_RF
CRITICAL
N69H TABLE_5_ITEM
L4904_RF
CRITICAL
N69H
FD40B41A_RF
CRITICAL
N69H
0R 01005
R4509_RF
CRITICAL
N69H
1
3.3NH 01005 290MA
L4602_RF
CRITICAL
N69H
155S0981
1
F LT R SA W DU AL F IL TE R B3 4B 39
FRX34B39_RF
C RI TI CA L
N69H
152S1988
1
2.4NH 01005 370MA
L4601_RF
CRITICAL
N69H
155S0906
1
SAW FILTER B40A B41A
FTB40A41A_RF
CRITICAL
N69H
152S1983
1
1.5NH 01005 +/-0.1NH
L4517_RF
CRITICAL
N69H
152S2061
1
7.5NH 01005 3%
L4507_RF
CRITICAL
N69H
117S0161
1
0R 01005
R4531_RF
CRITICAL
N69H
152S2040
1
4.3NH 01005 3%
L4506_RF
CRITICAL
N69H
131S00042
1
0.3PF +-0.05PF 01005 16V
C4528_RF
CRITICAL
N69H
131S0307
1
100PF 01005 16V
C4533_RF
CRITICAL
N69H
131S0244
1
1PF 01005 16V
C4502_RF
CRITICAL
N69H
138S0706
1
1UF 0201 10V
C4506_RF
CRITICAL
N69H
131S0644
1
68PF 01005 25V
C4532_RF
CRITICAL
N69H
131S00042
1
0.3PF 01005 16V
C4520_RF
CRITICAL
N69H
152S2002
1
2.7NH 0201 +/-0.1NH
L4522_RF
CRITICAL
N69H
152S1982
1
1.3NH 01005 +/-0.1NH
L4520_RF
CRITICAL
N69H
155S0982
1
FILTER B40
FT_B40_RF
CRITICAL
N69H
152S1986
1
2.2NH 01005 +/-0.1NH
L4526_RF
CRITICAL
N69H
152S1853
1
9.1NH 01005 3%
L4523_RF
CRITICAL
N69H
152S2002
1
2.7NH 0201 +/-0.1NH
L4515_RF
CRITICAL
N69H
152S1408
1
7.5NH 01005 5%
L4528_RF
CRITICAL
N69H
152S00035
1
3.1NH 01005 +/-0.1NH
L4516_RF
CRITICAL
N69H
131S0395
1
3.0PF 01005 +/-0.1PF
C4521_RF
CRITICAL
N69H
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
1
10NH 01005 170MA
L4217_RF
CRITICAL
N69H
TABLE_5_ITEM
TABLE_5_ITEM
131S0390
1
2.5PF 0.1PF 01005 COG
C4213_RF
CRITICAL
N69H
TABLE_5_ITEM
TABLE_5_ITEM
152S1853
1
7.5NH 3% 01005 200MA
L4216_RF
CRITICAL
N69H
118S0726
1
162K 1% 01005
R3312_RF
CRITICAL
N69H
TABLE_5_ITEM
TABLE_5_ITEM
C
TABLE_5_ITEM
TABLE_5_ITEM
3 5 3S 3 87 6
1
SWTICH SPDT 1.1X1.1
U _ SW U AN T _R F
C R IT I CA L
N69H
1
3.0NH 0201
L5120_RF
CRITICAL
N69H
152S1851
1
5.6NH 01005
L5121_RF
CRITICAL
N69H
118S0652
1
01005 49.9R
C4231_RF
CRITICAL
N69H
C
TABLE_5_ITEM
TABLE_5_ITEM
152S2045
T ABL E_ 5_ IT EM
TABLE_5_ITEM
TABLE_5_ITEM
152S1977
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
131S0387
D
TABLE_5_ITEM
TABLE_5_ITEM
353S00373
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
B
B
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
152S1853
1
1 55 S0 90 0
1
152S1965
1
152S2024
9.1NH 01005 3%
L4527_RF
CRITICAL
N69H
F T_ 41 BC _R F
CRITICAL
N69H
1.8NH 01005 380MA
L4524_RF
CRITICAL
N69H
1
1.4NH 0201 1.1A
L4525_RF
CRITICAL
N69H
353S4167
1
SWITCH IC LGA16
U_HBS_RF
CRITICAL
N69H
155S0903
1
FILTER SAW B40B 38X
FR38X40B_RF
CRITICAL
N69H
155S0881
1
FILTER LOW PASS B39
FL_B39LP_RF
CRITICAL
N69H
131S0214
1
18PF 01005
C4703_RF
CRITICAL
N69H
152S1917
1
2.0NH 01005 380MA
L4705_RF
CRITICAL
N69H
117S0161
1
0OHM 01005
R4700_RF
CRITICAL
N69H
131S0307
1
100PF 01005
C4720_RF
CRITICAL
N69H
155S0902
1
FILTER SAW BAND 40A B41A
FR40A41A_RF
CRITICAL
N69H
152S1619
1
2.2NH 01005 200MA
L4709_RF
CRITICAL
N69H
1 3 1S 0 21 4
1
1 8 PF 0 1 00 5
C4701_RF
CRITICAL
N69H
152S00036
1
3.7NH 01005 270MA
L4704_RF
CRITICAL
N69H
152S1989
1
2.7NH 01005 370MA
L4713_RF
CRITICAL
N69H
15 2S 19 89
1
2 .7 NH 0 10 05 3 70 MA
L4 71 2_ RF
CRITICAL
N69H
TABLE_5_ITEM
F I L TE R S AW B AN D 4 1B 4 1C
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
A
A
TABLE_5_ITEM
PAGE TITLE
OMIT_TABLE_RF
TABLE_5_ITEM
D R AW I NG N U MB E R
TABLE_5_ITEM
152S00034
1
2.9NH 01005 360MA
L4708_RF
CRITICAL
N69H
152S1576
1
12NH 01005 140MA
L4710_RF
CRITICAL
N69H
131S0216
1
47PF 01005
C4710_RF
CRITICAL
N69H
Apple Inc.
TABLE_5_ITEM
051-00648 REVISION
4.0.0
R TABLE_5_ITEM
TABLE_5_ITEM
NOTICE OF PROPRIETARY PROPERTY:
BRANCH
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
S I ZE
D