5
4
3
2
1
Project Name : NH14CU D
Platform : Ivy Bridge(PROCESSOR)+Panther Bridge(PROCESSOR)+Panther Poinrt(PCH)
D
PAGE CONTENT
C
B
1.
INDEX
2.
SYSTEM BLOCK DIAGRAM
3.
POWER DIAGRAM & SEQUENCE
4.
GPIO & Power Consumption
5.
CPU_DMI/PEG/FDI (1 of 7)
6.
CPU_CLK/MISC/JTAG (2 of 7)
7.
CPU_DDR3 BUS (3 of 7)
8.
CPU_PWR (4 of 7)
9.
CPU_GRAPHICS POWER (5 of 7)
10.
CPU_GND (6 of 7)
11.
CPU_RESERVED (7 of 7)
12.
DDR3 SODIMM-A
13.
DDR3 SODIMM-B
14.
PCH_HDA/JTAG/SATA (1 of 9)
15.
PCH_PCIE/CLK/SMBUS (2 of 9)
16.
PCH_DMI/FDI/PM (3 of 9)
17.
PCH_LVDS/CRT/HDMI (4 of 9)
18.
PCH_PCI/USB (5 of 9)
19.
PCH_GPIO/CPU (6 of 9)
20.
PCH POWER-A (7 of 9)
21.
PCH POWER-B (8 of 9)
22.
PCH GND (9 of 9)
23.
EC IT8500BX/BIOS/KB CONN
24.
CRT/LVDS/PWR SW
25.
HDD/ODD /MINI CARD
26.
LAN/CARD READER/15DB/JMC251
27.
CODEC(ALC269Q)/INT MIC/SPKR
28.
EXT_MIC/FingerPrint/USB/FAN/G-SENSOR/Q-key
29.
DC IN/MDC/BT/D-Resistor
30.
CPU CORE (OZ8293)
31.
CPU VCCSA
32.
+1.05V(OZ8116)/+0.75VS/+1.8V
33.
+1.5VS/+5VA (OZ8153)
34.
BATT IN/CHARGER(OZ8602)
35.
iGPU Core(OZ8293)
M/B Schematic Version Change List Release Date
Version
PCB P/N
PCB Description
PCBA P/N
Note
C
B
Daughter Board Schematic Version Change List Release Date
Version
PCB P/N
PCB Description
PCBA P/N
Note
5
4
3
2
1
SYSTEM BLOCK DIAGRAM
CPU Dual Channel DDR3 1333/1066 MHz
SO-DIMM1 200 Pin
Ivy Bridge
13
D
D
5,6,7,8,9,10,11
Internal SPK 4Ω 1.5W x 2
AMic
Internal Mic In
DMI X4
FDI
27
Codec
27
USB
AZALIZA
ALC269Q
Headphone Out x 1 External JACK Mic In+Line-In x 1 28
32.768KHZ
14
27
I/O Board
LVDS
LCD
SPI
C
PCH
CRYSTAL 25MHZ
RJ45
LAN
26
PCIE2
RT8411(Giga)
TMDS
HDMI
Panther Point
26
RGB
LAN Board
Cardreader 26
RT8411
C
38
17
CRT
24
PCIE3 USB 0
26
USB 10
USB
28
USB
28
USB1
USB2.0&3.0
Location CN25(20pinExternalUSB BD) CN19(USB CHARGER) Minicard Express CARD nouse FP nouse nouse C N2 ( WE BC AM ) Express CARD CN25(20pinExternalUSB BD) Touchpannel nouse nouse
OR
989 Pin FCBGA
ASM1042 (USB 3.0)
24
TPM ROM
26
Card CON
USB 0 USB 1 USB 2 USB 3 USB 4 USB5 USB 6 USB 7 U SB 8 USB9 USB 10 USB 11 USB 12 USB 13
RTC
I/O Board
Enhance 2A 36
Bluetooth 29
USB2 PCIE1
B
Mini Card x 1
SATA0
HDD x 1 2.5" SATAI/II
Webcam
USB 8
SATA1
14,15,16,17,18,19,20,21,22
36
LPC
25
M-SATA x 1
USB 11
Touch Pannel
Embedded Controller (EC) Charger A
GPIO
PS/2 K/B Matrix
128 Pin LQFP
FAN
23
BIOS ROM 8 Pin M-SOP
SMBUS 1
Flash Rom 23
8 Pin M-SOP
G-Sense 23
28
Internal K/B 24 Pin
3 Pin 28
SPI
T/P 12 Pin 36
IT8518
34
B
25
ODD x 1 25
SATA5
Mini Card Debug Port
25
SMBUS 0
Battery 34
23
A
5
4
3
2
1
100ms(min) 5ms
POWER BLOCK DIAGRAM
System Poewr On Sequence
VIN H_CPU_SVIDDAT
SM3316 x2 SM3317 x 2
D
+CPU_CORE 33A
Adaptor or Battery
D
PWRSW
H_VIDALERT#
+3VA / +5VA
CPU CORE (OZ8293)
VIN SM3316 x1 SM3317 x 1
H_CPU_SVIDCLK
+3.3VS_ON
*
+VGFX_CORE 26A
+5VS
3.3VS_ON_HV
+3.3VS
3.3VS_ON_HV
5ms
2ms
+1.2VS_ON
*
1ms
1ms 10ms
*
5V
+1.05V
+1.8VS_ON
15A
+1.8VS +0.9VS
OZ80116
20ms
* RSMRST# * PWRBTN#
C
5V
VCCSA 6A
**
PM_SLP_S4#
**
PM_SLP_S3# 1880ms
*
OZ80116
+5V_ON +5V
VIN
+1.5VS
C
320ms
+3.3V
15A
5V_ON_HV
1ms
1ms
5V_ON_HV
5ms
* +1.5V_ON
SM3316 SM3317
FP6137E
+1.5V
+0.75VS 2A
1ms
* +1.05V_ON +1.05V
B
100ms
OZ8153
* VCORE_ON
VIN SM3316 SM3317
+5VA
B
+CPU_CORE
16A
650ms
* PWROK
GIBRATAR
H_PWRGD
+5VS
PCIRST# / PLTRST#
+5V GIBRATAR
CPURST#
OZ8033 +3VA 6A
OZ8013
+1.8V 1A
* **
EC Control Pin (O/P) EC Control Pin(I/P)
+3.3VS
GIBRATAR APL5930
+1.2Vsus 400mA
5
4
3
2
1
SANDYBRIDGE PROCESSOR (CLK,MISC,JTAG) This pin is for compability with future platforms. A pull up resistor to VCPLL is required if connected to the DF_TVS strap on the PCH. U7B D
F49
19 H_SNB_IVB#
C57
layout note : connect to EC Keep L_EC < 0.25 inches, spacing to other 18 mils
This signal should be driven low when processor is turned off in S3. From S3 to S0, this signal should go high only after 1.5V_CPU_VDDQ stable.
23
EC_PECI
19
H_PECI
C49
TP3 R159 43-04
A48
R 16 16 4
30 PROCHOT#
5 66- 04 04
H_PROCHOT#_D
C45
D45
19 H_THRMTRIP#
PROC_SELECT# PROC_DETECT#
CATERR#
PECI
PROCHOT#
M I S C
T H E R M A L
THERMTRIP#
S K C O L C
BCLK BCLK# DPLL_REF_CLK DPLL_REF_CLK#
H_PM_SYNC_R
TP14
C48
B46
19 H_CPUPWRGD R 16 16 0
C
16 PM_DRAM_PWRGD +1.5VS
R 150
1 0K -0 -0 4 R154 130-1-04 VDDPWRGOOD_R BE45
PM_SYNC
UNCOREPWRGOOD
SM_DRAMPWROK
200-04
R148 2K-1-04 CPURST#
18,23,25,26,29,38 PLT_RST#
R152 1K-1-04
D44
RESET#
P W R M A N A G E M E N T
BCLK_CPU_P 15 BCLK_CPU_N 15
AG3 AG1
CLK_DP_P 15 CLK_DP_N 15
+1.5VS R213
BCLK_ITP BCLK_ITP#
N59 N58 1K-04
SM_DRAMRST#
3 C R S D I D M
AT30
DDR3_DRAMRST_R#
BF44 SM_RCOMP[0] BE43 SM_RCOMP[1] BG43 SM_RCOMP[2]
PRDY# PREQ#
16 H_PM_SYNC
D
J3 H2
TCK TMS TRST#
M P B
TDI TDO
&
DBR#
G A T J
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
DDR3_DRAMRST# 13
SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2
R214 5.1K-1-04
N53 N55 L56 L55 J58 M60 L59
K58 C
G58 E55 E59 G55 G59 H60 J59 J61
@IC,SNB_2CBGA,1P0
+1.05V
R165 75-04
PROCHOT#
Q11
+CPU_CORE
D
R133 100K-04
G B
2N7002K
EC_PROCHOT# 23
S
R115 100K-04
B
AUX_OFF 33
C B
H_THRMTRIP# R151 1K-1-04
E C161 .1U-25-04X-K
Q12 2N3904
DDR3 Compensation Signals
SM_RCOMP_2 SM_RCOMP_1 SM_RCOMP_0
R158 R15 8
R163
140-1-04
R166 200-1-04
25.5-1-04
C139 1U-10-06R-K
5
4
3
2
1
IVY BRIDGE PROCESSOR (POWER) D
D
+1.5VS U7G
C625 @ 1 U -1 0 0 6 R -K
PWM SENSE PIN
+VGFX_CORE
+VGFX_CORE
C134 1 U -1 0 0 6 R -K
C618 @ .1 U -2 5 0 4 X -K
C621 @ 1 U -1 0 0 6 R -K
C629 @ .1 U -2 5 0 4 X -K
C631 @ 1 U -1 0 0 6 R -K
C620 @ .1 U -2 5 0 4 X -K
C116 4 .7 U -1 6 0 8 Y -Z
C99 4 .7 U -1 6 0 8 Y -Z
C127 4 .7 U -1 6 0 8 Y -Z
C109 4 .7 U -1 6 0 8 Y -Z
C136 1 U -1 0 0 6 R -K
C98 4 .7 U -1 6 0 8 Y -Z
C630 @ 1 0 0 0 P 5 0 0 4 X -K
AA46 AB47 AB50 AB51 AB52 AB53 AB55 AB56 AB58 AB59 AC61 AD47 AD48 AD50 AD51 AD52 AD53 AD55 AD56 AD58 AD59 AE46 N45 P47 P48 P50 P51 P52 P53 P55 P56 P61 T48 T58 T59 T61 U46 V47 V48 V50 V51 V52 V53 V55 V56 V58 V59 W50 W51 W52 W53 W55 W56 W61 Y48 Y61
C131 4 .7 U -1 6 0 8 Y -Z
C619 @ .1 U -2 5 0 4 X -K
C
R147 1K-1-04
VAXG[1] VAXG[2] VAXG[3] VAXG[4] VAXG[5] VAXG[6] VAXG[7] VAXG[8] VAXG[9] VAXG[10] VAXG[11] VAXG[12] VAXG[13] VAXG[14] VAXG[15] VAXG[16] VAXG[17] VAXG[18] VAXG[19] VAXG[20] VAXG[21] VAXG[22] VAXG[23] VAXG[24] VAXG[25] VAXG[26] VAXG[27] VAXG[28] VAXG[29] VAXG[30] VAXG[31] VAXG[32] VAXG[33] VAXG[34] VAXG[35] VAXG[36] VAXG[37] VAXG[38] VAXG[39] VAXG[40] VAXG[41] VAXG[42] VAXG[43] VAXG[44] VAXG[45] VAXG[46] VAXG[47] VAXG[48] VAXG[49] VAXG[50] VAXG[51] VAXG[52] VAXG[53] VAXG[54] VAXG[55] VAXG[56]
SM_VREF
S L I A R
R E W O P G R A P H I C S
V 5 . 1 3 R D D
VDDQ[1] VDDQ[2] VDDQ[3] VDDQ[4] VDDQ[5] VDDQ[6] VDDQ[7] VDDQ[8] VDDQ[9] VDDQ[10] VDDQ[11] VDDQ[12] VDDQ[13] VDDQ[14] VDDQ[15] VDDQ[16] VDDQ[17] VDDQ[18] VDDQ[19] VDDQ[20] VDDQ[21] VDDQ[22] VDDQ[23] VDDQ[24] VDDQ[25] VDDQ[26]
AY43
AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33
C145 4 .7 U 6 . 3 0 6 R -K
R145 1K-1-04
+1.5VS
C189
4 .7 U 6 . 3 0 6 R -K
C603 C616 @ @ .1 4 .7 U U -2 -1 5 6 0 4 0 X 8 Y -K -Z
C179 K R 6 0 0 1 U 7 . 4
C609 @ .1 U -2 5 0 4 X -K
C
+1.5VS
R131
100-1-04
+VGFX_CORE
F45 G45
30,35 VCC_AXG_SENSE 30,35 VSS_AXG_SENSE R125 B
B8 +1.8V_VCCSFR
BB3 BC1 BC4
BD-QT1608RL-60 C264 @ .1 U -2 5 0 4 X -K
Main
C265
4 .7 U 6 . 3 0 6 R -K
C263 . 1 U -2 5 0 4 X -K
VCCSA
C225 4.7U-16-08Y-Z
C221 @ .1 U -2 5 0 4 X -K
VAXG_SENSE VSSAXG_SENSE
100-1-04
1.2A
+1.8V
L S I E N N E S S E
C219 @ .1 U -2 5 0 4 X -K
C226 4 .7 U -1 6 0 8 Y -Z
C251 4 .7 U -1 6 0 8 Y -Z
C257 @ .1 U -2 5 0 4 X -K
L17 L21 N16 N20 N22 P17 P20 R16 R18 R21 U15 V16 V17 V18 V21 W20
1 . 8 V
VCCPLL[1] VCCPLL[2] VCCPLL[3]
VCCSA[1] VCCSA[2] VCCSA[3] VCCSA[4] VCCSA[5] VCCSA[6] VCCSA[7] VCCSA[8] VCCSA[9] VCCSA[10] VCCSA[11] VCCSA[12] VCCSA[13] VCCSA[14] VCCSA[15] VCCSA[16]
R A I L
S A
@IC,SNB_2CBGA,1P0
R A I L
S L I A R
AM28 VCCDQ[1] AN26 VCCDQ[2] C216
T E I U Q
4 .7 U 6 . 3 0 6 R -K
C598 @ 4 .7 U -1 6 0 8 Y -Z
B
+1.5VS VCCSA
BC43 VDDQ_SENSE BA43 SVSS_SENSE_VDDQ E N I L
E S N E S
VCCSA_SENSE
VCCSA_VID[0] VCCSA_VID[1]
R233 100-1-04
U10
0.85V PWM SENSE PIN
D48 D49
VCCSA_VID0 31 VCCSA_VID1 31
VCCSA R155
R123
10K-04
10K-04
5
4
3
2
1
IVY BRIDGE PROCESSOR (RESERVED) D
D
SA_DIMM_VREFDQ SB_DIMM_VREFDQ
U7E
B50 C51 B54 D53 A51 C53 C55 H49 A55 H51 K49 K53 F53 G53 L51 F51 D52 L53 C
H43 K43 H45 K45 F48 H48 K48 BA19 AV19 AT21 BB21 BB19 AY21 BA22 AY22 AU19 AU21 BD21 BD22 BD25 BD26 BG22 BE22 BG26 BE26 BF23 BE24
CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17]
D E V R E VAXG_VAL_SENSE VSSAXG_VAL_SENSE S E R VCC_VAL_SENSE VSS_VAL_SENSE
BE7 BG7
RSVD28 RSVD29
N42 L42 L45 L47
RSVD30 RSVD31 RSVD32 RSVD33
SMDDR_VREF_DQ0_M3 SMDDR_VREF_DQ1_M3 13
R224 @10K-04
R228 @10K-04
M13 M14 U14 W14 P13
RSVD34 RSVD35 RSVD36 RSVD37 RSVD38 RSVD39 RSVD40
BE7 BG7
AT49 K24
C
AH2 RSVD41 AG13 RSVD42 AM14 RSVD43 AM15 RSVD44 N50
RSVD45
VCC_DIE_SENSE RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27
B
DC_TEST_A4 DC_TEST_C4 DC_TEST_D3 DC_TEST_D1 DC_TEST_A58 DC_TEST_A59 DC_TEST_C59 DC_TEST_A61 DC_TEST_C61 DC_TEST_D61 DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58 DC_TEST_BG4 DC_TEST_BG3 DC_TEST_BE3 DC_TEST_BG1 DC_TEST_BE1 DC_TEST_BD1
A4 C4 D3 D1 A58 A59 C59 A61 C61 D61 BD61 BE61 BE59 BG61 BG59 BG58 BG4 BG3 BE3 BG1 BE1 BD1
B
@IC,SNB_2CBGA,1P0
5
4
3
2
1
D
D
C
C
B
B
5
4
3
2
1
Panther Point Chipset (LVDS,CRT,Digital Display) Display) D
D
U16D
J47 M45
23 PCH_BL_EN 24 PCH_LCDVDD_EN
P45
24 PCH_BL_PWM
T40 K47
24 PCH_LVDS_CLK 24 PCH_LVDS_DAT L_CTRL_CLK L_CTRL_DATA
T45 P39 AF37 AF36 AE48 AE47
R408 2.37K-1-04 24 PCH_LVDSA_CLKN 24 PCH_LVDSA_CLKP 24 PCH_LVDSA_N0 24 PCH_LVDSA_N1 24 PCH_LVDSA_N2
C
24 PCH_LVDSA_P0 24 PCH_LVDSA_P1 24 PCH_LVDSA_P2
PCH_LVDSA_CLKN PCH_LVDSA_CLKP
AK39 AK40
PCH_LVDSA_N0 PCH_LVDSA_N1 PCH_LVDSA_N2
AN48 AM47 AK47 AJ48
PCH_LVDSA_P0 PCH_LVDSA_P1 PCH_LVDSA_P2
AN47 AM49 AK49 AJ47 AF40 AF39 AH45 AH47 AF49 AF45 AH43 AH49 AF47 AF43
N48 P49 T49
24 PCH_CRT_B 24 PCH_CRT_G 24 PCH_CRT_R
3 2 4 R
9 1 4 R
3 1 4 R
4 0 1 0 5 1
4 0 1 0 5 1
4 0 1 0 5 1
T39 M40
24 PCH_CRT_CLK 24 PCH_CRT_DAT
M47 M49
24 PCH_CRT_HSYNC 24 PCH_CRT_VSYNC
T43 T42 B
R411 931-1-04
SDVO_TVCLKINN SDVO_TVCLKINP SDVO_STALLN SDVO_STALLP SDVO_INTN SDVO_INTP
L_BKLTEN L_VDD_EN L_BKLTCTL L_DDC_CLK L_DDC_DATA
L_CTRL_CLK L_CTRL_DATA
R404 R456
2. 2K-04 2. 2K-04
PCH_LVDS_CLK PCH_LVDS_DAT
R437 R430
2. 2K-04 2. 2K-04
PCH_CRT_CLK PCH_CRT_DAT
R438 R435
2. 2K-04 2. 2K-04
+3.3V
AP43 AP45 AM42 AM40 AP39 AP40
L_CTRL_CLK L_CTRL_DATA LVD_IBG LVD_VBG
LVDSA_CLK# LVDSA_CLK LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3
P38 M39
SDVO_CTRLCLK SDVO_CTRLDATA
LVD_VREFH LVD_VREFL
S D V L
LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3
e c a f r e t n I y a l p s i D
LVDSB_CLK# LVDSB_CLK LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3
l a t i g i D
LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3
CRT_BLUE CRT_GREEN CRT_RED
AT49 DDPB_AUXN AT47 DDPB_AUXP AT40 DDPB_HPD AV42 DDPB_0N AV40 DDPB_0P AV45 DDPB_1N AV46 DDPB_1P AU48 DDPB_2N AU47 DDPB_2P AV47 DDPB_3N AV49 DDPB_3P P46 P42
DDPC_CTRLCLK DDPC_CTRLDATA
AP47 DDPC_AUXN AP49 DDPC_AUXP AT38 DDPC_HPD AY47 DDPC_0N AY49 DDPC_0P AY43 DDPC_1N AY45 DDPC_1P BA47 DDPC_2N BA48 DDPC_2P BB47 DDPC_3N BB49 DDPC_3P M43 M36
DDPD_CTRLCLK DDPD_CTRLDATA
T
CRT_DDC_CLK R CRT_DDC_DATA C CRT_HSYNC CRT_VSYNC DAC_IREF CRT_IRTN PantherPoint_Rev_1p0
C
AT45 DDPD_AUXN AT43 DDPD_AUXP BH41 DDPD_HPD DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P
BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42 B
