5
4
3
2
1
LNB1
ALi M3602 M3602 DEMO DEMO BOARD BOARD DB-M3602-05V02
D
share with SF_CS1
Ver.
D
5.2
share with SF_CS2
GPIO MAPPING:
MODE_0
C
USAGE
Version Info
USAGE DETAIL
NOTE
GPIO8
LNB1
FULL_NIM1_LNB_CUT
GPIO9
USB
USB_OVERLOAD_INT
GPIO31
Panel
FP_STANDBY
GPIO33
Panel
FP_DATA
GPIO34
Panel
FP_CLOCK
GPIO36
LNB2
LNB2_OVERLOAD_DETEC
0:normal 1:overload. Share with CI2
GPIO37
LNB2
FULL_NIM2_LNB_CUT
1:LNB power cut 0:Normal. Share with CI2
GPIO38
Full Nim1
FUL L_ L_NIM1 _I _INT
Sh ar ar e wi th CI2
GPIO40
Crypto memory
CPTMEM_SCL
Share with CI2
Ver.
1:LNB power cut 0:Normal. Share with TS1
DESCRIPTION
NOT E
05V01
Create for 2 layers PCB application
2009/04/18
05V02
improve DDR design
2009/06/10
0:normal 1:standby float:standby share with CA2 share with CA2
C
share with CA2
GPIO42
LNB1
LNB1_OVERLOAD_DETEC
0:normal 1:overload. Shar e with CI2
GPIO45
Crypto memory
CPTMEM_SDA
Share wi with CI CI2
GPIO52
LAN
INTJ_FROM_LAN
GPIO53
NC
Share with sflash_CS2 Share with sflash_CS3
GPIO59
SCART
VCR_DETEC
Input: 0- VCR Playing
GPIO61
Power
STANDBY
0-power on 1-standby float-standby
GPIO62
Panel
FP_COM2/VFD_STB
GPIO69
Panel
MUTE
1: mute 0: normal
GPIO72
Panel
AK470 AK4707_P 7_PWR WR_D _DWN WN
1:Normal ormal 0: powe powerr down down
GPIO74
Panel
FP_COM3/VFD_CLK
GPIO77
Panel
FP_COM1
GPIO84
Panel
FP_KEY1
GPIO85
NIM
LOCK2
GPIO88
Panel
FP_COM4/VFD_IN/OUT
share with CI2
GPIO89
Panel
LOCK1
TS1 I/F lockled driver 1: lock led light
GPIO91
Full Nim 2
FULL_NIM2_INT
Share with CI2
GPIO9 3
Demo ul ul at ato r
DEMO_RST/FULL_NIM1_RST
Share with CI2
GPIO94
Full Nim 2
FULL_NIM2_RST
Share with CI2
GPIO99
SDIO
SD_CDN
Share with CI2
GPIO100
SDIO
SD_WP
Share with CI2
，
Copyright Ali Corporation, 2009. All rights reserved.
，
B
B
A
Information in this document is provided in connection with Ali product. Ali makes no representations or warranties with respect to the accuracy or completeness of the contents of this document. Ali also reserves the right to make changes to specification and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights are granted by this document.
Low Active TS2 I/F lock led driver 1: lock led light.share with CI2
This document contains confidential proprietary information that is not to be disclosed to any unauthorized person without prior written consent of Ali Corporation. Third-party brands and name mentioned in this publication are for identification purpose only and may be the property of their respective owners.
A
Title COVER
5
4
3
2
Size B
Doc ument Numbe r DB-M3602-05V02
Date :
Tuesday, October 20, 2009
Rev 1.0 Sheet 1
1
of
20
5
4
5V
3
2
1
5V
1
1
R132 R133 150R
4.7K
2
2 3
D
2 R134
3 RGB/CVBS
1150R
D VCR RGB-INFO: 0 (0~0.4V) CVBS 1 (1~3V) RGB
Q10 2N3904
1 2
1:CVBS ACTIVE 0:RGB ACTIVE
CVBS_RGB
1R140 5V
5V 3V3 1K
2
1 R142
GND 4.7K
2
R144
1
3 DVB_RATION
3 2
1:DVB 16:9 0:DVB 4:3
1.5K 1.5 K1
2
GND
C113
VCR ASPECT INFO: 12V 4:3AV 6V 16:9AV 0V ABSENCE
R147 1.5K
N C_ C_ B RA RA D _6 0 R
NC_2N3906
RF_PWR
1
2
N C_ C_ B RA RA D _6 0 R
F B 82 82 6 Q607
ASPECT_TV
Q12 2N3904
1
1.5K R0603
2R143
F B 82 82 8
NC_0.1uF
1 NC_10K
2 R152
2
12V
3V3
R151 NC_270R
2 R153
C
C
1
NC_10K
1 RF_ON/OFF
1 NC_10K
3 R150
2
Q13 NC_2N3904
1 2
TV SCART 9 R 9 G 9 B 9 SCART_AV 9 Audio_R 9 Audio_L
SCART_AV F B881 FB8 FB 81 6
B E A D_ 1 20 20 R
FB8 FB 817
B E A D_ 1 20 20 R
CVBS_RGB R
[3,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19]
GND G
[3,14] I2CSDA0 [3,14] I2CSCL0 [3] RF_ON/OFF B
FB8 FB 820 GPIO38
B E A D_ 1 20 20 R
ASPECT_TV B FB821
BEAD_120R
Audio_L F B8 B8 22 22
B E AD AD _1 _1 20 20 R
F B8 B8 23 23
B E AD AD _1 _1 20 20 R
Audio_R
CON2 SCART/21p/Female NC_220uF,10V
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
TC59
+
C110 NC_0.1uF
TU1 Audio_L
Audio_R
1 R145 NC_1K,1% 2
1R146
NC_1K,1% 2
C620
RF_PWR NC_10uF,10V I2CSDA0
F B 82 82 5
N C_ C_ B RA RA D _6 _6 0 R
1R1 48
1 2 3 4 5 6
2 NC_ 22 R
I2CSCL0 1R1 49 82 7 SCART_AV F B 82
2 NC_ 22 R N C_ C_ B RA RA D _6 _6 0 R
7 8 9 10
B
NC_RF_MODU C122 NC_100pF
C124 NC_100pF
2 R154 NC_10K
SCART3-PB
FB829 NC_BRAD_60R
1 AGND 5V
A
R W P _ F R
A
Title
S i ze A3<br />
<br />
Do cu me nt Numb er <Doc ><br />
<br />
Re v <Re vCo de ><br />
<br />
5<br />
<br />
4<br />
<br />
AUDIO DIGITAL DIGITAL OUT COAXIAL<br />
<br />
3<br />
<br />
2<br />
<br />
1<br />
<br />
AUDIO ANALOG OUT<br />
<br />
TV & VCR SCART<br />
<br />
CS4344 2CH<br />
<br />
YPbPr HDMI r P b P Y<br />
<br />
D<br />
<br />
AK4707<br />
<br />
S B V C<br />
<br />
D<br />
<br />
HD VIDEO BUFFER THS7316<br />
<br />
B G R<br />
<br />
C<br />
<br />
C<br />
<br />
USB 2.0 DEMOD M3501 (SSI1 or SPI)<br />
<br />
TUNER SHARP BS2S7VZ7306<br />
<br />
M3602 EJTAG FULL NIM ADAPTER(SSI1) ADAPTER(SSI1)<br />
<br />
FULL NIM ADAPTER(SSI2) ADAPTER(SSI2)<br />
<br />
B<br />
<br />
B<br />
<br />
RS232 CI*1<br />
<br />
PANEL 7 KEY 4*[8]<br />
<br />
A<br />
<br />
POWER +12V +5V +24V <br />
<br />
DDR SDRAM 32M* 16 BIT * 2<br />
<br />
S-FLASH 2M BYTE<br />
<br />
A<br />
<br />
Title BLOCK Size A<br />
<br />
Document Number DB-M3602-05V02<br />
<br />
Date:<br />
<br />
Tuesday, October 20, 2009<br />
<br />
Rev 1.0 Sheet<br />
<br />
2<br />
<br />
of<br />
<br />
20<br />
<br />
5<br />
<br />
[5] [5] [5] [5] [5] [5] [5] [5] [5] [5] D [5,17] [5] [5] [5]<br />
<br />
DDR_DQ[31..0] DDR_MA[12..0] DDR_DQS[3..0] DDR_DQM[3..0] DDR_WE# DDR_CKE0 DDR_RAS# DDR_CAS# DDR_BA0 DDR_BA1 VREF DDR_CS0 CK# CK<br />
<br />
4<br />
<br />
DDR_DQ[31..0] DDR_MA[12..0] DDR_DQS[3..0] DDR_DQM[3..0] DDR_WE# DDR_CKE0 DDR_RAS# DDR_CAS# DDR_BA0 DDR_BA1 VREF DDR_CS0 CK# CK<br />
<br />
DQ[31..0]<br />
<br />
W19 W20 V19 V20 U19 U20 T19 T20 Y21 Y22 W21 W22 V21 V22 U21 U22 E21 E22 F21 F22 G21 G22 H21 H22 J20 J19 H20 H19 G20 G19 F20 F19<br />
<br />
MA[12..0] MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12<br />
<br />
B<br />
<br />
R22 P21 P22 N21 M21 L22 L21 K22 K21 M20 R21 M19 L20<br />
<br />
M3602<br />
<br />
2<br />
<br />
DQ[31..0]<br />
<br />
DQ8 DQ9<br />
<br />
0.1UF 0.1UF 0.1UF<br />
<br />
DDR_DQ[31..0]<br />
<br />
RS3<br />
<br />
BC19 BC20 BC21<br />
<br />
2 4 6 8<br />
<br />
1 3 5 7<br />
<br />
MA[12..0]<br />
<br />
DDR_MA[12..0] MA0 MA1 MA2 MA3<br />
<br />
DDR_DQ8 DDR_DQ9<br />
<br />
DDR_MA0 DDR_MA1 DDR_MA2 DDR_MA3<br />
<br />
DDR_DQS[3..0] DDR_DQS0 DDR_DQS1 DDR_DQS2 DDR_DQS3<br />
<br />
4X56R/0402 RS2 DQ10 DQ11 DQ12 DQ13<br />
<br />
XMD[0] XMD[1] XMD[2] XMD[3] XMD[4] XMD[5] XMD[6] XMD[7] XMD[8] XMD[9] XMD[10] XMD[11] XMD[12] XMD[13] XMD[14] XMD[15] XMD[16] XMD[17] XMD[18] XMD[19] XMD[20] XMD[21] XMD[22] XMD[23] XMD[24] XMD[25] XMD[26] XMD[27] XMD[28] XMD[29] XMD[30] XMD[31] XMA[0] XMA[1] XMA[2] XMA[3] XMA[4] XMA[5] XMA[6] XMA[7] XMA[8] XMA[9] XMA[10] XMA[11] XMA[12]<br />
<br />
2 4 6 8<br />
<br />
VDDO<br />
<br />
VDDO VDDO VDDO VDDO VDDO VDDO VDDO VDDM VDDM VDDM VDDM VD25 VDDCORE VDDCORE VDDCORE VREF XDQS[0] XDQS[1] XDQS[2] XDQS[3] XDQM[0] XDQM[1] XDQM[2] XDQM[3] XDCLKJ_O XDCLK_O<br />
<br />
U18 R18 K18 H18 G18 F18 E16 V17 V18 T18 J18 V16<br />
<br />
DQ0 DQ1 VDDCORE DQ2 DQ3 DQ4 DQ5<br />
<br />
E20<br />
<br />
VREF<br />
<br />
R19 T21 J21 K19 R20 T22 J22 K20<br />
<br />
DQS0 DQS1 DQS2 DQS3 DQM0 DQM1 DQM2 DQM3<br />
<br />
1 3 5 7<br />
<br />
DDR_DQ14 DDR_DQ15 DDR_DQS1 DDR_DQM1<br />
<br />
7 5 3 1<br />
<br />
DDR_MA4 DDR_MA5 DDR_MA6 DDR_MA7<br />
<br />
MA8 MA10<br />
<br />
DDR_MA8 DDR_ MA10<br />
<br />
MA9 MA11 MA12<br />
<br />
DDR_MA9 DDR_MA11 DDR_MA12<br />
<br />
D_CK# D_CK<br />
<br />
M18 L19 N18 P18 P19 N19 N20 P20 L18<br />
<br />
DQM[3..0]<br />
<br />
8 6 4 2<br />
<br />
8 6 4 2<br />
<br />
DDR_DQM[3..0] DDR_DQM0 DDR_DQM1 DDR_DQM2 DDR_DQM3<br />
<br />
DQS[3..0] DQS0 DQS1 DQS2 DQS3 DQM[3..0]<br />
<br />
DDR_DQ0 DDR_DQ1<br />
<br />
DQM0 DQM1 DQM2 DQM3<br />
<br />
7 5 3 1<br />
<br />
DDR_DQ2 DDR_DQ3 DDR_DQ4 DDR_DQ5<br />
<br />
C<br />
<br />
7 5 3 1<br />
<br />
DDR_DQ6 DDR_DQ7 DDR_DQS0 DDR_DQM0<br />
<br />
RS17<br />
<br />
1<br />
<br />
4 7R 47R 4 7R 47R<br />
<br />
2 2<br />
<br />
RS6 S6 1R RS5 S5 1R<br />
<br />
CK# CK<br />
<br />
CKE0 WE# CAS# RAS# BA0 BA1 CS0<br />
<br />
RS9 R20 NC DQ31 DQ30<br />
<br />
2 4 6 8<br />
<br />
1 3 5 7<br />
<br />
DDR_DQ31 DDR_DQ30<br />
<br />
4X56R/0402 RS14 DQ29 DQ28 DQ27 DQ26<br />
<br />
2 4 6 8<br />
<br />
1 3 5 7<br />
<br />
DDR_DQ29 DDR_DQ28 DDR_DQ27 DDR_DQ26<br />
<br />
CS0 C KE 0 WE# CAS# R AS # B A0 B A1<br />
<br />
4X56R/0402 RS10 DQ25 DQ24 DQS3 DQM3<br />
<br />
2 4 6 8<br />
<br />
1 3 5 7<br />
<br />
DDR_CS0 DDR_ CKE0 DDR_WE# DDR_CAS# DD R_ RA S # DDR_ BA0 DD R_ B A 1<br />
<br />
DDR_DQ2 5 DDR_DQ24 DDR_DQS3 DDR_DQM3<br />
<br />
B<br />
<br />
VDDO<br />
<br />
R21 .<br />
<br />
4X56R/0402 RS4 DQM2 DQS2 DQ23 DQ22<br />
<br />
VDDO A<br />
<br />
1 C11 10uF,10V<br />
<br />
2<br />
<br />
C117 10uF,10V<br />
<br />
2 4 6 8<br />
<br />
8 6 4 2<br />
<br />
C9<br />
<br />
DDR_DQM2 1 DDR_DQS2 3 DDR_DQ23 5 DDR_DQ22 7 4X56R/0402 4X56R/0402 DDR_DQ18 7 DDR_DQ19 5 DDR_DQ20 3 DDR_DQ21 1<br />
<br />
1K,1%<br />
<br />
VREF<br />
<br />
[5,17] 1 7]<br />
<br />
C10<br />
<br />
1K,1%<br />
<br />
0.1UF<br />
<br />
[3,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19]<br />
<br />
DQ16 DQ17<br />
<br />
8 6 4 2<br />
<br />
7 5 3 1<br />
<br />
GND<br />
<br />
A<br />
<br />
DDR_DQ16 DDR_DQ17<br />
<br />
Title SOC_DDR<br />
<br />
RS8<br />
<br />
4<br />
<br />
0.1UF<br />
<br />
R22 .<br />
<br />
RS7 4X56R/0402<br />
<br />
Placed under M3602<br />
<br />
1 2<br />
<br />
D<br />
<br />
RS16 4X56R/0402 DQ6 DQ7 DQS0 DQM0<br />
<br />
DQ18 DQ19 DQ20 DQ21<br />
<br />
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF<br />
<br />
8 6 4 2<br />
<br />
DQS[3..0]<br />
<br />
E E E R R R T T T T T T T O O O S S S S S S S M M M C C C P P P P P P P 5 M 2 S S S S S S S S S S S S S S S S S S S S S S S S S S S S S V V V V V V V V V V V V V V V<br />
<br />
BC22 BC23 BC24 BC25 BC26 BC27 BC28 BC29 BC30 BC31 BC32 BC33<br />
<br />
2 4 6 8<br />
<br />
MA4 MA5 MA6 MA7<br />
<br />
RS15 4X56R/0402<br />
<br />
2 XCKE[1] XCKE[0] XWEJ XSCASJ XSRASJ XBA[0] XBA[1] XCSJ[0] XCSJ[1]<br />
<br />
DDR_DQ10 DDR_DQ11 DDR_DQ12 DDR_DQ13<br />
<br />
4X56R/0402 4X56R/0402<br />
<br />
P12 P13 P14<br />
<br />
N22 M22<br />
<br />
1 3 5 7 4X56R/0402 RS1<br />
<br />
DQ14 DQ15 DQS1 DQM1<br />
<br />
5 4 2 3 4 4 2 3 0 1 2 3 4 1 9 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 V V L L L M K K K K K L E M M<br />
<br />
5<br />
<br />
1<br />
<br />
VDDCORE<br />
<br />
U1A DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31<br />
<br />
C<br />
<br />
3<br />
<br />
3<br />
<br />
2<br />
<br />
Size B<br />
<br />
Doc ument Numbe r DB-M3602-05V02<br />
<br />
Date :<br />
<br />
Wednesday, June 30, 2010<br />
<br />
Rev 1.0 Sheet 1<br />
<br />
4<br />
<br />
of<br />
<br />
20<br />
<br />
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