Half Adder A + B = Σ and a carry ( this is math not logic) A
B
Σ
Carry
0
0
0
0
0
1
1
0
1
0
1
0
1
1
0
1
Σ=A⊕B Carry = AB This is logic not math
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Half adder logic diagram
Full adder
Σ = (A ⊕ B) Cin + (A ⊕ B ) Cin or Σ = (A ⊕ B) ⊕ Cin Cout = AB + (A ⊕ B)Cin
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Full adder logic diagram
Full-adder implemented with halfadders
3
Examples 1
0
0
0
1
1
Determine the outputs
Block diagram of a basic 2-bit parallel adder using two full-adders
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Example
A 4-bit parallel adder
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Four-bit parallel adders
Examples of adder expansion
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Two 74LS83A adders connected as an 8-bit parallel adder (pin numbers are in parentheses).
A voting system using fulladders and parallel binary adders
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Ripple Carry vs. Look-Ahead Carry? Both types of adders are the same in terms of inputs and outputs. Difference is the speed at which they can add numbers. Look-ahead carry adder are faster than the ripple carry adder.
Ripple Carry adder
Look-Ahead Carry adder (1) Carry generation
Carry propagation
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Look-Ahead Carry adder (2) All the output carries are immediately available! No need to wait for ripple carry through all stages
Comparator
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Logic diagram for equality comparison of two 2-bit numbers
Example
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Logic symbol for a 4-bit comparator with inequality indication
Example What is the outputs?
HIGH
LOW
LOW
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74HC85 4-bit magnitude comparator (pin numbers are in parentheses).
An 8-bit magnitude comparator using two 74HC85s
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Functions of Combination Logic
Kod Çözücüler (Decoders) Kod çözücülerin işlevi, belirtilen bir giriş kombinasyonu girişte oluştuğunda bunu çıkışında bir lojik seviye veya başka bir biçimde gösteren devrelerdir. Binary to decimal decoders BCD to decimal decoders BCD to 7-segment decoders vs.
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Basic binary decoder Girişte 1001 kombinasyonu olduğunda 1 çıkışı veren bir kodçözücü devresi
Girişte 1011 kombinasyonu olduğunda 1 çıkışı veren bir kodçözücü devresi
3 to 8 binary to decimal decoder Doğruluk tablosu (Truth table) Decimal
Binary Inputs
Logic Function
D0
D1
D2
Outputs D3 D4
D5
D6
0
0
0
0
1
0
0
0
0
0
0
D7 0
1
0
0
1
0
1
0
0
0
0
0
0
2
0
1
0
0
0
1
0
0
0
0
0
3
0
1
1
0
0
0
1
0
0
0
0
4
1
0
0
0
0
0
0
1
0
0
0
5
1
0
1
0
0
0
0
0
1
0
0
6
1
1
0
0
0
0
0
0
0
1
0
7
1
1
1
0
0
0
0
0
0
0
1
Decoding functions and truth tables for the 3-line-to-8-line decoder
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Lojik devresi
3 to 8 binary to decimal decoder
74LS138 3 to 8 binary to decimal decoder
Active-low !!
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Decimal number
Figure 6--24 Logic symbol for a 4-line-to16-line (1-of-16) decoder. Open file F06-24 to verify operation.
Binary number
4 to 16 binary to decimal decoder
Pin diagram and logic symbol for the 74HC154 1-of-16 decoder.
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A 5-bit decoder using 74HC154s.
A simplified computer I/O port system with a port address decoder with only four address lines shown.
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The 74HC42 BCD-to-decimal decoder
The 74HC42 BCD-to-decimal decoder
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Logic symbol for a BCD-to-7-segment decoder/driver with active-LOW outputs.
Two 7-segment display
Pin diagram and logic symbol for the 74LS47 BCD-to-7-segment decoder/driver
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Examples of zero suppression using the 74LS47 BCD to 7segment decoder/driver.
Kodlayıcılar (Encoders) Kod çözücü (decoding) işleminin tersini yaparlar. Decimal to binary encoders Decimal to BCD encoders Line encoders (like 8-to-3 line encoders) vs.
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Logic symbol for a decimal-to-BCD encoder.
A3=8+9 A2=4+5+6+7 A1=2+3+6+7 A0=1+3+5+7+9
Basic logic diagram of a decimal-to-BCD encoder. A 0-digit input is not needed because the BCD outputs are all LOW when there are no HIGH inputs.
A3=8+9 A2=4+5+6+7 A1=2+3+6+7 A0=1+3+5+7+9
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74HC147 decimal-to-BCD priority encoder (HPRI means highest value input has priority).
74F148 8-line-to-3-line priority encoder.
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A 16-line-to-4 line encoder using 74F148s and external logic.
87 = 80+0+0+0+0+4+2+1 Her bir bit’in ağırlıkları toplanırsa binary karşılık elde edilir.
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BCD to Binary – Method 2
BCD sayıyı sağa bir kaydır. Her bir basamağı (decade) incele. Değeri 7’den büyük olan basmaklardan 3 çıkar.
Gray Code
Gray code is a code that is not weighted
Decimal
Gray Code
Binary
0
0000
0000
1
0001
0001
2
0011
0010
3
0010
0011
4
0110
0100
5
0111
0101
6
0101
0110
7
0100
0111
Note that in gray code only one bit is changing at a time while in binary code many bits may change at a time
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Binary Gray conversions
Example
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Multiplexer
Multiplexer
S0 ve S1 “data select” girişlerinin değerine bağlı olarak “Data inputs” girişlerinden bir tanesi seçilerek Y çıkışına aktarılır S1
S0
Input selected
0
0
D0
0
1
D1
1
0
D2
1
1
D3
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Multiplexer
74HC157A quadruple 2-input data selector/multiplexer
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74LS151 8-input data selector/multiplexer
A 16-input multiplexer
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Multiplexer Application
Simplifying 7-segment display
Implementing a logic function using multiplexer
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Implementing a logic function using multiplexer Implementing a logic function 4-input
Implementing a logic function using multiplexer
F(X,Y,Z) = X'Y'Z + X'YZ + XY'Z + XYZ' + XYZ
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Demultiplexer
Demultiplexers
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The 74HC154 decoder used as a demultiplexer
Implementing a logic function using decoder
F(X,Y,Z) = X'YZ' + X'YZ + XYZ' + XYZ + XY'Z
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Implementing a logic function using decoder
F(X,Y,Z) = X'Y'Z + X'YZ + XY'Z + XYZ' + XYZ
Parity
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The 74LS280 9-bit parity generator/checker
Parity application
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Example of data transmission with and without error for the system in previous application
Glitch Birden çok giriş aynı anda durum değiştirirse, geçiş anlarında farklı giriş kombinasyonları oluşur. Bun bağlı olarak çıkış farklı (istenmeyen) değerler alır.
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Figure 6--59 Decoder waveform displays showing how transitional input states produce glitches in the output waveforms.
