Basic Logic Gates Prateek Chauhan M.Sc Physics Roll No-16510054 No-16510054
[email protected]
Jan 09,2017
1
Physics Lab Report
I IT GANDHINAGAR
Contents
1 OBJECTIVE
3
2 THEORY
3
3 OBSERVATIONS 3.1 OR Gate . . . . . . . . . 3.2 AND Gate . . . . . . . . 3.3 NOT Gate . . . . . . . . 3.4 NAND Gate . . . . . . . 3.5 NOR Gate . . . . . . . . 3.6 AND Gate from NAND 3.7 OR Gate from NAND . 3.8 NOT Gate from NAND 3.9 AND Gate from NOR . 3.10 OR O R Gate from NOR . . 3.11 NO N OT Gate from NOR .
5 5 5 5 5 5 6 6 6 6 6 6
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
. . . . . . . . . . .
4 CONCLUSION
7
5 REFERENCES
7
Page 2
Physics Lab Report 1
I IT GANDHINAGAR
OBJECTIVE IVE
This experiment will examine the operation of the AND, NAND, OR, and NOR logic gates and compar com paree the expected expected outputs outputs to the truth tables tables for these these devices. devices. The NOT function function will be implemented using NAND and NOR gates..
2
THEORY
A logic gate is an elementar elementary y building block of a digital digital circuit. Most logic gates have have two inputs and one output. At any given given moment, moment, every terminal terminal is in one of the two binary binary conditions low (0) or high (1), represented by different voltage levels. Here are diagrams and truth table for basic logic gates OR, AND, NOT, NOR and NAND.
Figure 1: Basic Logic Gates Logic Gates1 NAND and NOR are known as Universal Logic Gates, because all other gates can be formed by Page 3
Physics Lab Report
I IT GANDHINAGAR
combining one or more than one of these gates with itself. This can be seen by following diagram.
Figure 2: Formation of logic gates using NAND and N and N OR 2
For experimental purpose we use Inetgrated Circuits(IC Circuits(IC)) to study study the logic logic gates gates.. An IC is a flat chip on which electronic electronic circuits circuits are fabricated. fabricated. For different different logic gates different different ICs are available. For NAND gate the IC structure is shown by Figure 3.
Figure 3: Integrated Circuit IC and NAND gate in IC 7400 IC 74003
Page 4
Physics Lab Report 3
I IT GANDHINAGAR
OBSERVATIONS
High end voltage = 5.02 V Low end voltage = 0.0 V 3.1
OR Gate
Input A B 0 0 0 1 1 0 1 1 3.2
AND Gate
Input A B 0 0 0 1 1 0 1 1 3.3
Output X V out out (volt) 1 5.2 0 0
NAND AND Gat Gate
Input A B 0 0 0 1 1 0 1 1 3.5
X 0 0 0 1
Output V out out (Volt) 0 0 0 4.67
NOT Gate
Input A 0 1 3.4 3.4
X 0 1 1 1
Output V out out (Volt) 0 4.53 4.61 4.67
X 1 1 1 0
Output V out out (Volt) 4.90 4.89 4.87 0
NOR Gate
Input A B 0 0 0 1 1 0 1 1
X 1 0 0 0
Output V out out (volt) 4.93 0 0 0
Page 5
Physics Lab Report 3.6 3.6
AND AND Gat Gate e fro from m NAN NAND D
Input A B 0 0 0 1 1 0 1 1 3.7 3.7
X 0 1 1 1
Output V out out (volt) 0 4.96 4.92 4.88
NOT NOT Gat Gate e from from NAND NAND
Input A 0 1 3.9 3.9
X 0 0 0 1
Output V out out (volt) 0 0 0 5.02
OR Gate Gate from from NAND NAND
Input A B 0 0 0 1 1 0 1 1 3.8 3.8
I IT GANDHINAGAR
Output X V out out (Volt) 1 4.98 0 0
AND AND Gat Gate e ffro rom m NOR NOR
Input A B 0 0 0 1 1 0 1 1 3.10 3.10
Input A B 0 0 0 1 1 0 1 1 3.11 3.11
Input A 0 1
X 0 0 0 1
Output V out out (volt) 0 0 0 4.89
OR Gate Gate from from NOR NOR
X 0 1 1 1
Output V out out (volt) 0 4.42 4.42 4.36
NOT NOT Gat Gate e fro from m NOR NOR
Output X V out out (Volt) 1 4.98 0 0
Page 6
Physics Lab Report 4
I IT GANDHINAGAR
CONC CO NCL LUSI SIO ON
The operational operational beha b ehaviour viour of all the logic gates has been verified verified by experimental experimental readings. readings. Also universal nature of NAND and NOR gate can be seen by observations. 5
REFE REFERE RENC NCES ES
1. http : http : //www.inetdaemon.com/tutorials/basic //www.inetdaemon.com/tutorials/basic c oncepts/numbers ystems/binary/gates.shtml 2. http : http : //benschonken176226 //benschonken 176226.blogspot.in/ .blogspot.in/2016 2016/ /02 02/activity /activity − 222 − universal − logic − gates − nand.html 3. https : https : //www.pinterest.com/explore/nand //www.pinterest.com/explore/nand − gate/ 4. IITGN Physics Laboratory (https://sites.google.com/a/iitgn.ac.in/ph102/) 5. Wikipedia 6. Digital Fundamentals by Thomas L. Floyd
Page 7
