Aim: To study Voltage Transfer Characteristic of NMOS inverter with resistive load and to observe changes in characteristics with change in value of RL Apparatus Required : Tanner tool installed on given PC Theory: An inverter circuit outputs a voltage representing the opposite logic-level to its input. Inverters can be constructed using a single NMOS transistor or a single PMOS transistor coupled with a resistor. Digital inverter quality is often measured using the Voltage Transfer Curve, which is a plot of input vs. output voltage. From such a graph, device parameters including noise tolerance, gain, and operating logic-levels can be obtained. Ideally, the voltage transfer curve (VTC) appears as an inverted step-function - this would indicate precise switching between on and off - but in real devices, a transition region exists. The VTC indicates that for low input voltage, the circuit outputs high voltage; for high input, the output tapers off towards 0 volts. The slope of this transition region is a measure of quality - steep (close to -Infinity) slopes yield precise switching. The output voltage, VOH, can be a measure of signal driving strength when cascading many devices together. The logic symbol and truth table of ideal inverter is shown in figure given below. Here A is the input and B is the inverted output represented by their node voltages. Using positive logic, the Boolean value of logic 1 is represented by Vdd and logic 0 is represented by 0. Vth is the inverter threshold voltage, which is Vdd /2, where Vdd is the output voltage. The output is switched from 0 to Vdd when input is less than Vth. So, for 0
Resistive Load Inverter The basic structure of a resistive load inverter is shown in the figure given below. Here, enhancement type nMOS acts as the driver transistor. The load consists of a simple linear resistor RL. The power supply of the circuit is VDD and the drain current ID is equal to the load current IR. Circuit Operation
When the input of the driver transistor is less than threshold voltage VTH (Vin < VTH), driver transistor is in the cut – off region and does not conduct any current. So, the voltage drop across the load resistor is ZERO and output voltage is equal to the VDD. Now, when the input voltage increases further, driver transistor will start conducting the non-zero current and nMOS goes in saturation region. Mathematically,
ID=(Kn/2)[VGS−VTO]2 Increasing the input voltage further, driver transistor will enter into the linear region and output of the driver transistor decreases.
ID=(Kn/2)2[VGS−VTO]VDS−V2DS VTC of the resistive load inverter, indicates the operating mode of driver transistor and voltage points.
Fig : Depicting Resistive load inverter
The VTC describing Vout as a function of Vin under DC condition • Very low voltage level –Vout=VOH – nMOS off, no conducting current, voltage drop across the load is very small, the output voltage is high
•As Vin increases – The driver transistor starts conducting, the output voltage starts to decrease – The critical voltage point, dVout/dVin=-1 • The input low voltage VIL • The input high voltage VIH • Determining the noise margins
• Further increase Vin – Output low voltage VOLwhen the input voltage is equal to VOH – The inverter threshold voltage Vth • Define as the point where Vin=Vout
