myRIO Analog Analo g Basics Due Date: Today Tod ay +1 Week Week
In thi s lab experi ment, the the student will be introduced to the concept of data acquisiti acquisiti on using the analog analog input AI pins avail able on the myRIO. Anal og input pins are directly connected connected to the FPGA. This experiment expe riment presents different different techniques for sampling analog si gnals. The LM35 LM35 temperature te mperature sensor is used for its simplicity and and linearit li nearity. y.
Objectives
Understand myRIO analog functions and data acquisitions techniques. Understand myRIO analog ADC sampling rate and timing specifications Understand LM35 LM35 temperature sensor and functionalitie functional itiess .
Hardware Architecture Overview The NI myRIO-190 myRI O-1900 0 has analog i nput channels on myRIO Expansion Po rt (MXP) (MXP) connectors A and B, Mini System Port (MSP) connector C, and a stereo audi o input connector. The analog analog inputs in puts are multiplexed to a single singl e analog-to-digital converter converter (ADC) that samples all channels at an aggregate sample rate of 500KS/s 500KS/s wi th 12-bits 12-bits resolution. resoluti on. MXP MXP connectors A and and B have four single -ended analog input channels per connector, AI0-AI3, which you can can use to measure 0-5 V signals. MSP connector C has two highimpedance, di fferential fferential analog input channels, AI0 and and AI1, which y ou can use to me asure signals up to ±10 ±10 V. The audio inputs are left lef t and right stereo line -level -level inputs with a ±2.5 ±2.5 V f ull -scale range. Figure 1 shows the rele vant hardware hardware architecture. ADC on the myRIO returns raw raw data. You can use the following fol lowing equations to convert raw data values to volts: V = V = Raw Data Value * LSB Weight LSB Weight = Weight = Nominal Range ÷ 2^ Resolution 2^ ADC Resolution *LSB Weight MXPA/B = (5-0) ÷ 4096 = 1.221 mV Where Where Raw Data Value is the value returned by the the FPGA I/O Node, LSB Weight Weight is the value in volts of the increment betwe en data values and the smallest level an ADC can can convert, Nominal N ominal Range is the absolute value i n volts of the ful l, peak -to-peak -to-peak nominal nominal range of the channel, channel, and ADC Resolution is i s the resolution resoluti on of the ADC in bits. (ADC Reso lution luti on = 12.) 12.)
LM35 Temperature Sensor The LM35 LM35 series serie s are precision inte grated-circuit grated-circuit temperatur temperature e devices with an output voltage linearly 10-mV/°C Scale Scal e Factor F actor.. The LM35 proportional to the Centigrade temperature - Linear - Linear + 10-mV/°C LM35 device devi ce has an advantage over li near temperature sensors cali calib brated in Kelvin, Ke lvin, as the user is not required to subtract a large constant voltage from the output to obtain conveni ent Centigrade scaling. The LM35 LM35 device does doe s not requi re any external cali bration bration or trimming to provide typical accuracies of ±¼°C at room
temperature and ±¾°C over a full −55°C to 150°C temperature range. The low -output impedance, li near
output and precise i nherent calibration of the LM35 device makes interfacing to readout or control circuitry especially easy. The devi ce is used with single power supplies, or with plus and minus suppli es (4-30V Supply) . As the LM35 device draws only 60 µA from the supply, it has very low self -heating of less than 0.1°C in still air.
Figure 1 – Analog Hardware Block Diagram
Figure 2 – LM35 Temperature Sensor
Simple Data Acquisition Procedure This data acquisiti on experiment uses the FPGA defaul t personality and standard myRIO project . The foll owing experiment introduces the analog input libraries and express Vis while highlighting the most common design and timing problems. Connect the temperature sensor with the output pin (2) to the MXPB pi n AI0, the fi rst pin to 5V VCC and the third pin to ground (Use the analog GND pin noted AGND for analog inputs).
Express VIs An Express VI is a VI whose settings you can configure interactively through a dialog box. Express VIs appears on the block diagram as expandable nodes with icons surrounded by a blue field. This part uses the Analog input ex press VI for data acquisition. The analog input express VI, interfaces directly with the FPGA’s VI and provides the user one sample per iteration. Create a new project using the standard myRIO project (discussed in Lab 1) and save it in the folder previously created under “myRIOAnalog” save the VI as AnalogBasics.
Modify the block di agram to include an analog input express VI and the data to voltage convers ion functions for display. Use a numeric indicator and a waveform chart for display. Figure 3 shows the modified block diagram. The modified design i ncludes additional shift register to display the timing of each iteration. Task: Experiment by changing the timing constant connected to the wait VI to ‘5’ and then ‘1’
Figure 3 – Express VI Analog Input
Low Level Functions Modify the previous block diagram code to include low level analog input functions from the myRIO toolbox -> Low Level. The external structure used is called a “ Flat Sequence Structure ” the implemented structure divides the program into three main parts operating sequentially from left to right, a transition from one sequence to another only occurs whenever that sequence has completed a ll implemented tasks. Figure 4 shows the modified design on low l evel Vis. 1) Initialize: A llocate resource, set up ini tial configurations. 2) This part is the “Acquire and Process Data”. The foll owing sequence is the core program, it includes a
while loop for continuous operation. 3) The final sequence is the close structure it is used to free allocated memory and channels and reset the device to its default settings. Task: Experiment by changing the timing constant connected to the wait VI to ‘5’ and then ‘1’ Warning: The RT main VI is independent from the PC it runs until an error occurs or stopped manually. Do not close the project before stopping the VI .
Figure 4 – Low Level VI Analog Input
Multiple Samples Acquisition This experiment introduces the user to advanced sampling techniques to acquire multiple samples per channel with a custom sampling rate and frequency . Modify the previous design to include customize d Sampling rate and Period controls. Figure 5 shows the modifie d design.
Figure 5 – Multiple Sampling
The following design includes a for loop structures that iterates from 0 to N -1. A single iteration represents an acquired sample. The For loop includes a flat sequence structures of two frames. The first frame holds a more accurate Wait f unction, from the RT library (RT -> Timing), representing the loopi ng period in mSecs. The second frame consists of the data acquisi tion block and operation previously discussed.
Tips
Use CTRL+SPACE for a quick drop search for a nee ded function.
Use CTRL+H to di splay the hel p window and display additional information
Data representations are identified by colors: Green -> Boolean, Pink -> String, Orange -> floating point, Blue -> Integers.
Read the device guide and specifications for correct wiring and proje ct design.
Questions
Explain the A/D conversion process and provide clear calculation for a 12-bi t ADC with differential voltage reference (Vref- = -10V and V ref+ = 10V). calculate the LSB and Full scale range value.
Calculate the conversion function from Raw Data to Vol tage for the Temperature sensor using the previously discussed equations in the overview. (Hint 10mV = 1C). Identify the Block Diagram components, what are the used functions, VIs and structures? Indentify the timing functions used; provide a brief e xplanation of each. Compare the “Wait” function and “Wait unti l next multiple”; what is the main difference? Deduce why an Express VI, placed inside a loop structure, causes timing and synchronization problems. Explain the diff erence between “Single Ended Analog Input” and “Differential Input”; which mode is supported by myRIO? How many connection pins avail able?
Pre Lab 3 Questions – PWM and Motors
Research the main operating modes of a BJT transistor. What is the rel ationship between the base current and the collector current? What is the required current to drive a DC motor connected to a 12V source and ground? How do you drive a motor in di fferent directions (Clock-Wise, Anti-Clock-Wise)? What is the connection scheme for using a single transistor to drive a DC motor (How is the motor connected); If the output pin supplies 3.3V TTL what is the value of the re sistor R1 placed at the base of the chosen BJT transistor?
Explain the basics of a PWM technique; what is the relationship between “Period”, “DuctyCyle” and “Pulse duration”?
Provide an overview of a motor driver (H-Drive) and its bene fits in controlling motors and direction; what is a freewheeling diode? How does it operate in protecting the connected transistor? Comment on diodes switching speeds.
Lab Report Submit an i ndividual lab report at the beginning of the next lab session with the following sections and requirements:
Cover Sheet – Include titl e, name, class, section, date due, date submitted, and professor and lab assistant names Introduction – Summarize the lab procedure in a f ew sentences. Do not rewrite what is written in this lab handout. Design – Explain your design and its purpose, testing results, obstacles encountered and how you resolved them. Include images. Conclusion – Discuss your overall experienceand how it relates to digital logic and electronics concepts. Post-Lab Questions – Answer all questions completely.
The lab report should be singl e-spaced, typed, and a minimum of 1½ pages (ex cluding images). Neatness and clarity are also required.
