LEARNING OUTCOMES At the end of this course, the students would be able to: Differentiate between digital and analogue system principles. Convert numbers between different numerical systems and codes.
Manipulate Boolean expression using Boolean theorem and Karnaugh Map. Synthesize logic circuit its relation with Boolean algebra. Design register and counter using memory element circuit. Justify data converters design based on its application.
MUHAMMAD SHUKRI BIN AHMAD DR. MUHAMMAD MAHADI BIN ABDUL JAMIL AHMAD ALABQARI BIN MA’RADZI ROKIAH BINTI NASARUDDIN TENGKU NADZLIN BIN TENGKU IBRAHIM MAZITA BINTI MOHAMAD IDA LAILA BINTI AHMAD FAKULTI KEJURUTERAAN ELEKTRIK DAN ELEKTRONIK UNIVERSITI TUN HUSSEIN ONN MALAYSIA
6th EDITION
CHAPTER 1
INTRODUCTION TO DIGITAL SYSTEM OUTLINE •
NUMERICAL REPRESENTATION
•
DIGITAL AND ANALOG SYSTEM
•
ADVANTAGES OF USING DIGITAL OVER ANALOG
•
LIMITATION OF DIGITAL SYSTEM
•
OVERCOMING THE LIMITATION OF THE ANALOG WORLD
•
DIGITAL NUMBER SYSTEM
•
REPRESENTING BINARY QUANTITIES
•
DIGITAL DATA TRANSMISSION
•
MEMORY AND NON-MEMORY CIRCUIT
•
DIGITAL COMPUTERS
1.1 NUMERICAL REPRESENTATION For a physical system to manipulate quantities, the quantities must be represented in a numerical value. Let‟s look at temperature for an example, our body can feel hot or cold, but for a physical system to understand „hot‟ and „cold‟, the temperature quantities must be represented in numerical values (in this case in unit degree Celsius, oC). There are basically two ways of representing numerical value of quantities; analog and digital Analog Representations In analog representation, a quantity is represented by a variable that will change proportionally with the quantity. Lets look at this three example: Car speedometer: the deflection of the needle is proportional to the car speed and follows any changes that occur ( speed up or slows down) Mercury thermometer: the height of the mercury in the column will go up and down proportional to the room temperature. The level of mercury represents the value of temperature. An important characteristic of analog quantities is that it can vary over a continuous range of data. Analog or analogue? In the U.S., the spellings analog and analogue are interchangeable for the noun (except, for example, in the literary sense above); the adjective is usually spelled analog. In the rest of the English-speaking world the spelling is usually analogue for both noun and adjective; see og/ogue. However, the spellings given above should be retained in cases where it forms part of a name or is an acronym.
Digital Representation A digital system is one that uses discrete numbers, especially binary numbers, or non-numeric symbols such as letters or icons, for input, processing, transmission, storage, or display, rather than a continuous spectrum of values (an analog system). A digital clock provides time in decimal digit that represents hours and minutes (and also seconds). Time itself change continuously but the changes shown in a digital clock are in steps (of one second for example). An important characteristic of digital quantities is that it can vary over a discrete range of data.
Did you know? The word digit comes from word digitus: the Latin word for finger (counting on the fingers as these are used for discrete counting). REMEMBER analog = continuous digital = discrete
1.2 DIGITAL AND ANALOG SYSTEM A digital system is combinations of devices that takes digital data (logical information or physical value in digital form) and manipulate/processed them. These devices are mostly electronics, but can also be a mechanical, magnetic or pneumatic. An analog system in the other hand is a combination of devices that manipulate values that are represented in analog form (continuous). Some of the common analog systems are amplifier and simple light dimmer.
1.3 ADVANTAGES OF USING DIGITAL OVER ANALOG The usual advantages of digital circuits when compared to analog circuits are: Less affected by noise. In fact, if the noise is below a certain level (the noise margin), a digital circuit behaves as if there was no noise at all, this is a necessary and sufficient property for a circuit to be considered a digital circuit. However, if the noise exceeds this level, the digital circuit can give catastrophically wrong results. Analog signal transmission and processing, by contrast, always introduces noise.
Ease of design: Digital systems are easier to design compared to analog system because only two level of signal are involved.
Programmable: Digital systems interface well with computers and are easy to control with software. It is often possible to add new features to a digital system without changing hardware, and to do this remotely, just by uploading new software. Design errors or bugs can be worked-around with a software upgrade, after the product is in customer hands.
Fabrication technique advancement: More digital circuitry can be fabricated per square millimeter of integrated-circuit material (wafer).
Ease of information storage: Information storage can be much easier in digital systems than in analog ones. In particular, the great noise-immunity of digital systems makes it possible to store data and retrieve it later without degradation. In an analog system, aging and wear and tear will degrade the information in storage, but in a digital system, as long as the wear and tear is below a certain level, the information can be recovered perfectly.
Higher accuracy and precision: Theoretically, there is no dataloss when copying digital data. This is a great advantage over analog systems, which faithfully reproduce every bit of noise that makes its way into the signal.
1.4 LIMITATION OF A DIGITAL SYSTEM The usual disadvantages of digital circuits when compared to analog circuits are:
The world in which we live is analog, and signals from this world such as light, temperature, sound, electrical conductivity, electric and magnetic fields, and phenomena such as the flow of time, are analog quantities rather than discrete digital ones. For a digital system to do useful things in the real world, translation from the continuous realm to the discrete digital realm must occur (analog to digital conversion) [see 1.5].
Digital systems can be fragile, in that if a single piece of digital data is lost or misinterpreted, the meaning of large blocks of related data can completely change. This problem can be mitigated by designing the digital system for robustness. For example, a parity bit or other error-detecting or error-correcting code can be inserted into the signal path so that if less than a certain fraction of the data is corrupted, the system can determine that this has occurred and possibly uncorrupt the data, or ask for the corrupted data to be resent.
Digital circuits are made from analog components, and care has to be taken in design so that the analog natures of these components don't dominate over the desired digital behavior. In particular, attention must be paid to all noise and timing margins, to parasitic inductances and capacitances that can cause
intermittent problems such as "glitches". Digital circuits use more energy than analog circuits to accomplish the same calculations and signal processing tasks, thus producing more heat as well. In portable or battery-powered systems this can be a major limiting factor, but in a situation where power is plentiful, a digital system is often preferred because of all the advantages listed above, especially that of (re-) programmability and ease of upgrading without requiring hardware changes. Digital circuits are sometimes more expensive, especially in small quantities.
1.5 OVERCOMING THE LIMITATION OF THE ANALOG WORLD To enable a digital system to process analog information, these analog information needs to be translated into a representation that can be understand by a digital system (digital form). So a process of translation (or conversion) from analog to digital form must be done by circuit called Analog-to-Digital Converter, in shorts ADC. Similarly, for a digital system to control an analog devices, digital data need to be converted to analog form. This process is done by a Digital-to-Analog Converter, in short DAC. ADC AND DAC Besides the abbreviation ADC, some books and authors uses A/D or A to D. For this module, we will use ADC abbreviation for Analog-to-Digital converter and DAC for Digital-to-Analog Converter.
Figure 1.1 shows a block diagram for a digital temperature control system. Explanations for each block are shown in table 1.1.
FIGURE 1.1 Block diagram for a digital temperature control system
ANALOG
CONVERSION
ANALOG-TODIGITAL CONVERTER
SENSOR / TRANSDUCER
DIGITAL SIGNAL
ANALOG SIGNAL
DIGITAL PROCESSING
ANALOG SIGNAL CONTROLLER
TABLE 1.1 Block explanation of a digital temperature control system
Sensor/transducer
ADC Digital Processing
DAC Controller
DIGITAL-TOANALOG CONVERTER
DIGITAL SIGNAL
Convert physical variable to electrical signal (analog form). In this case, it is a thermostat that will measure the temperature. Change analog signal to digital signal Will do the processing to determine the necessary adjustment. In can be a microcontroller. Change digital signal to analog signal Will take action to adjust the temperature. It can be a fan or an air conditioner circuit.
1.6 DIGITAL NUMBER SYSTEM Within this subject, we will look at the four most common numbering systems for digital use, decimal, binary, octal and hexadecimal. In this topic, an introduction for decimal and binary system will be given and for the other two system, we will look at it in the next chapter. Abbreviation DEC = Decimal BIN = Binary OCT =Octal HEX = Hexadecimal
Decimal System This is the most common numbering system. It is called base-10 because it consists of ten symbols that are 0, 1, 2, 3, 4, 5, 6,7, 8, and 9. The decimal system is a positional numeral system; it has positions for units, tens, hundreds, etc. The position of each digit conveys the multiplier (a power of ten) to be used with that digit, each position has a value ten times that of the position to its right. Take 345 for an example, 3 is for three hundred, 4 is for forty, and 5 is for five. So we can say that:
345 3 10 2 4 101 5 10 0 3 100 4 10 5 1 300 40 5 The number three is the most significant digit because it has the weight of 100 while number 5 is the least significant digit because it has the weight of 1. Abbreviation MSD = most significant digit LSD = Least significant digit
Binary System This system in the other hand only consists of 2 symbols, 0 and 1. Thus, it is also known as a base-2 system. Counting in binary is similar to counting in any other number system. Beginning with a single digit, counting proceeds through each symbol, in increasing order. Decimal counting uses the symbols 0 through 9, while binary only uses the symbols 0 and 1. When the symbols for the first digit are exhausted, the next-higher digit (to the left) is incremented, and counting starts over at 0. In decimal, counting proceeds like this: 000, 001, 002, ... 007, 008, 009, (rightmost digit starts over, and next digit is incremented) 010, 011, 012, ... ... 090, 091, 092, ... 097, 098, 099, (rightmost two digits start over, and next digit is incremented) 100, 101, 102, ...
After a digit reaches 9, an increment resets it to 0 but also causes an increment of the next digit to the left. In binary, counting is the same except that only the two symbols 0 and 1 are used. Thus after a digit reaches 1 in binary, an increment resets it to 0 but also causes an increment of the next digit to the left:
000, 001, (rightmost digit starts over, and next digit is incremented) 010, 011, (rightmost two digits start over, and next digit is incremented) 100, 101, ...
Binary system are also a positional numeral system that has different weight for each bit (in decimal we call it digit) depending on the position. Let take the number binary 1101 as an example.
11012 1 23 1 2 2 0 21 1 2 0 8 4 0 1 1310 Binary Notation Notice that in the previous example that subscript 2 and 10 are use to differentiate between binary and decimal. These conventions are user to avoid confusion when multiple number systems are used. Other than subscript notation, there are other type of notation such as: 100101 binary (explicit statement of format) 100101b (a suffix indicating binary format) bin 100101 (a prefix indicating binary format)
Pronouncing a Binary Number When pronounce, binary numerals are usually pronounced by pronouncing each individual digit, in order to distinguish them from decimal numbers. For example, the binary numeral "100" is pronounced "one zero zero", rather than "one hundred", to make its binary nature explicit, and for purposes of correctness. 1.7 REPRESENTING BINARY QUANTITIES To represent quantities in a digital system, it makes more sense to make use binary system because we only concern about two state rather than decimal (10 states). Things that has only two operating states in two extreme conditions such as switch (on-off), light bulb (bright-dark), transistor (cutoff-saturated) etc. Transistor - Digital or Analog Devices Device such as transistor actually can perform as both digital and analog device. Cut-off and saturation region are used for digital purposes, while active/linear region are used for analog purposes.
Digital electronics is based on a number of discrete voltage levels, usually two, as distinct from analog electronics which uses voltages to represent variables directly. In most cases the number of states is two, and these states are represented by two voltage levels: one near to zero volts and one at a higher level depending on the supply voltage in use. These two levels are often represented as "Low" and "High." The two states of a wire are usually represented by some measurement of electric current and voltage (voltage is the most common), but current is used in some logic families. A threshold is designed for each logic family. When below that threshold, the wire is "low," when above "high." Digital circuit establish a "no man's area" or "exclusion zone" that is wider than the tolerances of the components. The circuits avoid that area, in order to avoid indeterminate results. It is usual to allow some tolerance in the voltage levels used; for example (see figure 1.2), 0 to 2 volts might represent logic 0, and 3 to 5 volts logic 1. A voltage of 2 to 3 volts would be invalid and would occur only in a fault condition or during a logic level transition, as most circuits are not purely resistive, and therefore cannot instantly change voltage levels. However, few logic circuits can detect such a fault, and most will just choose to interpret the signal randomly as either a 0 or a 1.
Figure 1.2 Presenting binary values using voltage level.
The levels represent the binary integers or logic levels of 0 and 1. In active-high logic, "low" represents binary 0 and "high" represents binary 1. Active-low logic uses the reverse representation. Table 1.2 shows examples of binary logic levels. Table 1.2 Binary logic level for different technology.
Technology CMOS TTL ECL
L voltage 0V to VCC/2 0V to 0.8V -1.175V to -VEE
H voltage VCC/2 to VCC 2V to VCC .75V to 0V
Notes VCC = supply voltage VCC is 4.75V to 5.25V VEE is about -5.2V VCC=Ground
1.8 DIGITAL DATA TRANSMISSION Other than operation of a digital system, another issue is the transmission of the information from one place to another. The distance maybe as small as in the same PCB (printed circuit board), a few meters (such as printing or networking) or over several miles (internet or phone line). This section will look at the two most common transmission method, serial and parallel data transmission. Serial Data Transmission In serial data transmission, data are send bit by bit (one after another) in a predefine interval of time for each bit starting from the LSB (typical for serial communication) over a single wire. Figure 1.3 shows the serial transmission for 8-bit binary data 10110011 2 . Figure 1.3 Serial transmission diagram
Serial transmission
OUT
Computer
IN
Printer
Nibble, Bit, Byte, Word and Longword 4 bit = 1 nibble 2 nibble = 1 byte (8 bit) 2 byte = 1 word (16 bit) 2 word = 1 longword (32 bit)
In parallel data transmission, data are sent simultaneously. Let take the same 8-bit binary as the previous example transmitted via an 8-bit data bus. Each bit will occupy one line and all 8-bit are sent simultaneously.
Figure 1.4 Parallel Transmission Diagram
1 0 1 1 0 0 1
Computer
1 LSB
Printer
Parallel Transmission
Data Bus 8-bit data bus means that there are 8 line connections for data transmission. Figure 1.5 show symbolic representation of an 8bit data bus
Figure 1.5 Parallel Transmission Diagram using Data bus symbol 8
Computer
Printer
The common trade off between these two methods is speed versus simplicity. We can see from the previous example that parallel transmission is 8 times faster than serial transmission because all eight bits are sent simultaneously. On the other hand, serial transmissions offer more simplicity because only one wire is required (low cost). Therefore, parallel transmission is used for high-speed data transfer while serial transmission is used for long distant data transfer. Is one wire enough for serial transmissions? Theoretically yes, but practically no. Usually extra wires are added for ensuring the reliability of the transfer such as ground reference line.
1.9 MEMORY AND NON MEMORY CIRCUIT For a non-memory circuit, the change in input will also result in the change of output, and when it changes back to its original state, the output will also change to its original states. Memory circuit however will retain (hold) the output states although the input reverts back to its original state. Figure 1.6 Non-memory and memory circuit comparison
INPUT
OUTPUT
NON-MEMORY CIRCUIT
MEMORY CIRCUIT
In analog electronics, device such as inductor and capacitor are memory element. Take capacitor for an example, its ability to „store‟ energy through charging process and „release‟ energy through discharging process will allow the circuit to retain (for some amount of time) the voltage are basically a memory characteristic. In digital electronics, flip-flop is the basic memory element circuit. We will see this later in chapter 4.
1.10 DIGITAL COMPUTER In a digital computer, there are many parts that can be broken down into five functional blocks, Arithmetic Logic Unit (ALU), Control Unit, memory, input and output. Table 1.3 summarizes each block description. Table 1.2 Basic functional block of a digital computer
Block ALU Input Output Control Unit
Description All the processing such as arithmetic and logical operation are done here. Takes input from the outside world. E.g. USB (scanner) and serial or USB or P/S2 (keyboard and mice) Used for outputting data. E.g. USB or parallel port (printing) and VGA or DVI port (display). Takes instruction from memory, interprets (decodes) it and then executes it by sending instruction to other units.
Figure 1.7 Functional diagram of a digital Computer
Central Processing Unit (CPU) Arithmetic Logic Unit (ALU) INPUT
OUTPUT Control Unit
RAM
ROM
MEMORY
1.20 EXTRA READING ASSIGNMENTS
What is „Fuzzy Logic‟. Besides analog and digital system, there is also a „Mixed Mode System‟. Explain what it is. USB connection is serial or parallel data transmission system?
TUTORIAL OBJECTIVE QUESTION 1.
2.
3.
4.
5.
Which of the following quantities is a digital quantity? (a)
Altitude of an aircraft
(b)
Pressure in a bicycle
(c)
Current through a resistor
(d)
The amount of time before the buzzer goes off
A quantity that has continuous values is (a)
a digital quantity
(b)
an analog quantity
(c)
a binary quantity
(d)
a natural quantity
Which quantity below representing an analog quantity? (a)
the hourly changes of air temperature
(b)
original sound wave
(c)
vehicle speed over an hour
(d)
recorded data on CD tracks
Which of the following is not an advantage of digital system? (a)
Digital circuits are less affected by noise
(b)
Energy usage is minimal
(c)
Operation can be programmed
(d)
Information storage is easy.
The following are analog information processing system except (a)
FM radio
(b)
Television receiver
(c)
Handphone
(d)
Electronic organ
6.
7.
8.
9.
10.
11.
Based on figure above, what is the name of the component in the box? (a)
Voltmeter
(b)
Digital-Analogue Converter
(c)
Ammeter
(d)
Analogue-Digital Converter
The term bit means (a)
a small amount of data
(b)
a „1‟ or „0‟
(c)
binary digit
(d)
both answers (b) and (c)
Numbers are entered into a microcontroller-based system in BCD, but stored in straight binary. If the system takes a 3-digit decimal entry, how many bytes of your storage location will be allocated for this? (a)
4 bytes
(b)
3 bytes
(c)
2 bytes
(d)
1 bytes
If a high logic level is assigned a binary „0‟ and a low is assigned „1‟ the logic is called (a)
binary logic
(b)
positive logic
(c)
invalid logic
(d)
negative logic
How much time is required for a parallel transfer of 16 bits data if the clock frequency is 100 MHz? (a)
10ms
(b)
1μs
(c)
16μs
(d)
10ns
Suppose that the decimal integer values from 0 to 125 are to be transmitted in binary. How many lines will be needed if parallel representation is used? (a)
8
(b)
7
(c)
6
(d)
5
12.
13.
Serial data transmission is employed to send data from a computer to a modem. The least significant bit is sent first. What is the data received at the modem if the data is 01001110? (a)
01001110
(b)
01110010
(c)
01100010
(d)
01011110
Central Processing Unit (CPU) comprises of control unit and (a)
input unit
(b)
memory unit
(c)
output unit
(d)
arithmetic/logic unit
STRUCTURED QUESTION 1.
Data transmission is the common operation that occurs in any digital system. State two types of digital data transmission.
2.
Suppose a digital system is used to transmit the decimal integer values from 0 to 20. (i)
If the system has unlimited number of connection lines, what is the type of transmission would be best employed so that the time delay would be as minimum as possible?
(ii)
What are the minimum lines required in this transmission?
(iii) If the number of connection lines available is only 1, what type of transmission should be employed here?
3.
(iv) Suppose the type of transmission in part b(ii) is employed with the least significant bit is sent first, what would be received by the receiver if number 2010 is sent by the transmitter? Elaborate some applications which use digital system in the field of: (i)
Image Processing.
(ii)
Medical Equipment.
(iii) Power plant.
4.
There are two mostly employed data transmissions for a digital system. (i)
Compare between serial and parallel data transmission.
(ii)
What is the main advantage of parallel transfer of binary data?
(iii) In terms of design, which approach offers a better solution?
5.
Explain the difference between analog and digital quantities Give an example that is combination of both analog and digital system.
6.
Discuss the advantages of using digital system over analog.
7.
Explain how a digital system can process analog information.
CHAPTER 2
NUMERICAL REPRESENTATION OUTLINE •
BINARY SYSTEM
•
BINARY ARITHMETIC
•
SIGN AND UNSIGNED NUMBERS
•
SIGNED NUMBERS ARITHMETIC OPERATION
•
HEXADECIMAL NUMBERING SYSTEM
•
DIGITAL NUMBER SYSTEM
•
OCTAL NUMBERING SYSTEM
•
DIGITAL CODE
•
ERROR DETECTION
In this chapter, we will look binary, hexadecimal and octal numbering system. 2.1 Binary System This is the fundamental of digital system. In digital system, mostly we dealt with binary number rather than decimal because it only has two „states‟. We can always convert binary to and from other system depending on our needs. Binary to Decimal Conversion
16
8
4
2
1
0.5
0.0625
27
26
25
24
23
22
21
20
2-1 2-2 2-3 2-4
Weight
0.125
32
Decimal value
0.25
64
Figure 2.1 Binary weight
128
Because of binary is a positional numbering system, each bit has a different weight. The following figure 2.1 shows the weight for each bit position.
Binary point
Example 2.1
Convert 0101 1001. 11012 to decimal. Binary point Whole number (positive power of two)
Fractional number (negative power of two)
27 2 6 2 5 2 4
23 22 21 20
2-1 2-2 2-3 2-4
0 1 0 1
1 0 0 1
. 1 1 0 1
0101 1001. 11012
Weight
(1 2 6 ) (1 2 4 ) (1 2 3 ) (1 2 0 ) (1 2 1 ) (1 2 2 ) (1 2 4 ) 64 16 8 1 0.5 0.25 0.0625 89.812510
Example 2.2
Convert 1100 1011. 1100 2 to decimal.
Example 2.3
(1 2 7 ) (1 2 6 ) (1 2 3 ) (1 21 ) (1 2 0 ) (1 2 1 ) (1 2 2 ) 128 64 8 2 1 0.5 0.25 203.7510 Convert 0110 1001. 10012 to decimal. 1100 1011. 1100 2
0110 1001. 10012
(1 2 6 ) (1 2 5 ) (1 2 3 ) (1 2 0 ) (1 2 1 ) (1 2 4 ) 64 32 8 1 0.5 0.0625 105.562510
Decimal to Binary Conversion To convert decimal numbers to binary, the decimal number are divided by 2 using repeated-division-method. Figure 2.2 shows the step for conversion of 1310 to binary. The result is 11012 . Figure 2.2 Repeateddivisionmethod for decimal to binary conversion
remainder 2
13
1
2
6
0
2
3
1
2
1
1
13 6 1(remainder) 1 2
0
Read from bottom 5
6 3 0(remainder) 2
2
3 1 1(remainder) 2
3
1 0 1(remainder) 2
4
1310 = 11012
Example 2.4
Convert 8910 to 8-bit binary. remainder 2
89
1
2
44
0
2
22
0
2
11
1
2
5
1
2
2
0
2
1
1
TIPS AND TRICKS It is always a good practice to write binary numbers in group of four to avoid mistake (add space between them).
0 8910 = 0101 10012
Example 2.5
Convert 10010 to 8-bit binary. remainder 2
100
0
2
50
0
2
25
1
2
12
0
REMEMBER
2
6
0
2
3
1
2
1
1
Add an extra zero‟s in the in front of the answer to make it 8-bit. We will see the practicality of this when we start discussing about signed numbers
0
10010 = 0110 01002
Now let‟s take a look at converting a decimal number with fraction to binary. The digit to the left of the decimal point can be converted using the repeated-division-method as previous example, but for the digit to the right of the decimal point (fractional part), we will do repeatedmultiplication-method. Figure 2.3 shows how to convert fractional decimal ( 0.687510 ) to binary. Figure 2.3 Repeatedmultiplicationmethod for decimal to binary conversion
0.6875 X 2 = 0.375 +
5
Read from top
1
1
0.375 X 2 =
0.75
+
0
2
0.75 X 2 =
0.5
+
1
3
0.5 X 2 =
0
+
1
4
Stop when 0
0.687510 = 0.10112
Example 2.6
Convert 237.312510 to binary. Stop at the 4th fractional bit. From previous example we already know that 23710 = 1110 11012 . For the fractional part,
0.3125 X 2 = 0.625 +
5
Read from top
0
1
0.625 X 2 =
0.25
+
1
2
0.25 X 2 =
0.5
+
0
3
0.5 X 2 =
0
+
1
4
0.312510 = 0.01012
Therefore, 237.312510 = 1110 1101. 01012
Stop when 0
Example 2.7
Convert 100.87610 to binary. Stop at the 4th fractional bit. From previous example we already know that 10010 = 0110 0100 2 . For the fractional part, 5
Read from top
0.876 X 2 = 0.752 +
1
1
0.752 X 2 = 0.504 +
1
2
0.504 X 2 = 0.008 +
1
3
0.008 X 2 = 0.016 +
0
Stop conversion at the 4th bit. Always refer to the question for this.
4
0.87610 = 0.11102
Therefore, 100.87610 = 0110 0100 . 1110 2
2.2 BINARY ARITHMETIC OPERATION Let‟s look at the basic of binary arithmetic. Addition Subtraction Multiplication 00 0 00 0 00 0 0 1 1 0 1 0 0 1 1 1(borrow) 1 0 1 1 0 0 1 0 1 1 1 0 1(carry) 1 1 1 1 1 0 Now let us do some arithmetic operation in binary and compare it with the same operation in decimal. Example 2.8
add 0101 10012 with 1001 10112 Carry forward
1
1
1
1
0
1
0
1
1
0
0
1
8910
+ 1
0
0
1
1
0
1
1
15510
1
1
1
1
0
1
0
0
24410
Example 2.9
Example 2.10
add 0011 00112 with 0111 1010 2 1
1
1
0
0
1
1
0
0
1
1
1
5110
+ 0
1
1
1
1
0
1
0
12210
1
0
1
0
1
1
0
1
17310
Subtract 0110 2 from 10112 Borrow 1, so here become 10 (210)
REMEMBER
0 1
1 -
Example 2.11
0
1
1
11
0
1
1
0
6
0
1
0
1
5
It means that: B-A
Subtract 0110 2 from 1000 2 1
Borrow 1, so here
0
-
Borrow 1, so here become 10 (210)
2
And here become 1
3
become 10 (210)
1
Example 2.12
If the instruction is: Subtract A from B
1
0
1
0
0
8
0
1
1
0
6
0
0
1
0
2
Multiply 1000 2 with 0010 2 1
Borrow 1, so here become 10 (210)
Borrow 1, so here become 10 (210)
2
And here become 1
3
1
0
0
0
8
0
0
1
0
6
0
0
0
0
1st partial product
1
0
0
0
0
0
0
0
+ 0
0
0
0
0
0
1
0
-
2nd partial product 3rd partial product 4th partial product
0
0
0
Final product (16)
Example 2.13
Divide 1000 2 with 0010 2
1
0
1 - 1
1 1 0 1 - 1
1 0
0 0
0 0 0 - 0
0 0
.
.
2.3 Signed and Unsigned Numbers Up to this point, we‟ve been only discussing about positive numbers. This are called unsigned numbers. Unlike decimal, we don‟t have (-) sign in binary to express negative value. So for binary, there are three ways (form) to represent negative value, sign-magnitude form, 1‟s complement form and 2‟s complement form. Sign-magnitude form In this form, the leftmost bit are used as sign indicator (0=positive, 1=negative) while the rest are the same as other negative numbers. Example 2.14
Represent 5410 in sign magnitude form using 8-bit binary. 1
Find the binary for +5410 using repeated-division-method 2
54
0
2
27
1
2
13
1
2
6
0
2
3
1
2
1
1
+5410 =1101102
0 2
Write the result from 1 in 8-bit 0 0 1 1
2
0 1 1 0
Change the leftmost bit (MSB) to 1 to indicate a negative value in sign-magnitude form 1 0 1 1
0 1 1 0
Example 2.15
Represent 8310 in sign magnitude form using 8-bit binary. 1
Find the binary for +8310 using repeated-division-method 2
83
1
2
41
1
2
20
0
2
10
0
2
5
1
2
2
0
2
1
1
+8310 = 101 00112
0 2
Write the result from 1 in 8-bit 0 1 0 1
2
0 0 1 1
Change the leftmost bit (MSB) to 1 to indicate a negative value in sign-magnitude form 1 1 0 1
0 0 1 1
1’s complement form In this form, all the bits are inverted ( 0 1 and 1 0) . Example 2.16
Represent 5410 in 1‟s complement form using 8-bit binary. 1
Find the binary for +5410 using repeated-division-method
2
54
0
2
27
1
2
13
1
2
6
0
2
3
1
2
1
1
0
2
Write the result from 1 in 8-bit 0 0 1 1
2
0 1 1 0
Invert all the bit 1 1 0 0
1 0 0 1
+5410 =1101102
Example 2.17
Represent 8310 in 1‟s complement form using 8-bit binary. 1
Find the binary for +8310 using repeated-division-method 2
83
1
2
41
1
2
20
0
2
10
0
2
5
1
2
2
0
2
1
1
+8310 = 101 00112
0 2
Write the result from 1 in 8-bit 0 1 0 1
2
0 0 1 1
Invert all the bit 1 0 1 0
1 1 0 0
2’s complement form In this form, all the bits are inverted ( 0 1 and 1 0) and then add 1. Example 2.18
Represent 5410 in 2‟s complement form using 8-bit binary. 1
Find the binary for +5410 using repeated-division-method 2
54
0
2
27
1
2
13
1
2
6
0
2
3
1
2
1
1
+5410 =1101102
0 2
Write the result from 1 in 8-bit
0 0 1 1
0 1 1 0
2
Invert all the bit
1 1 0 0
1 0 0 1
3
Add 1
1 1 0 0
1 0 1 0
Example 2.19
Represent 8310 in 2‟s complement form using 8-bit binary. 1
Find the binary for +8310 using repeated-division-method 2
83
1
2
41
1
2
20
0
2
10
0
2
5
1
2
2
0
2
1
1
+8310 = 101 00112
0
Example 2.20
2
Write the result from 1 in 8-bit
0 1 0 1
0 0 1 1
2
Invert all the bit
1 0 1 0
1 1 0 0
3
Add 1
1 0 1 0
1 1 0 1
Determine the value of 1011 1100 2 if it is expressed in (i) sign-magnitude-form (ii) 1‟s complement form (iii) 2‟s complement form Solution (i) sign-magnitude-form
1 0 1 1 This is the sign bit
1
2
After conversion:
3
Add (-)ve sign:
1 1 0 0
Convert this part to decimal
0 1 1 -6010
1 1 0 0
= 6010
(ii) 1‟s complement form
1 0 1 1 This is the sign bit
1
1 1 0 0
Complement this part
2
After complement:
1 0 0
0 0 1 1
3
Convert to decimal:
1 0 0
0 0 1 1
4
Add (-)ve sign:
= 6710
-6710
(iii) 2‟s complement form
1 0 1 1 This is the sign bit
1
1 1 0 0
Complement this part
2
After complement:
1 0 0
0 0 1 1
3
Add 1:
1 0 0
0 1 0 0
4
Convert to decimal:
1 0 0
0 1 0 0
5
Add (-)ve sign:
= 6810
- 6810
Range of Signed and Unsigned Numbers For unsigned numbers, all the bits are used to represent the value. Therefore, in an 8-bit binary numbers, the range are between 0000 0000 2 ( 010 ) to 1111 11112 ( 25510 ). In mathematical form, the range is from 0 to 2 n 1 , where n is the bit. For signed numbers (in 2‟s complement), the MSB is used for the sign and the range are form negative number to positive. Therefore, in an 8-bit system, the range are between 1000 0000 2 ( 12810 ) to 0111 11112 ( 25510 ). In mathematical form, the range is between
(2 n1 ) to (2 n1 1) .
2.4 SIGNED NUMBERS ARITHMETIC OPERATION In most microcontroller and microprocessor, the ALU only capable of doing addition operation. For subtraction operation, the subtrahends are change into its 2‟s complement form. Let say, subtract 7(subtrahend) from 24(minuend). It actually means that 12 7 12 (7) . All numbers are in 16-bit binary.
0 0 0 1
1 0 0 0
+ 1 1 1 1
1 0 0 1
0 0 0 1
0 0 0 1
2410 -710 (in 2's complement form) 1710
Lets look at these 4-bit signed binary arithmetic operation
1
0 1 0 1
+510
+ 0 0 0 1
+110
0 1 1 0
+610
0 1 0 1
+510
+ 1 0 0 0
-810
1 1 0 1
-310
0 1 0 1
+510
+ 1 1 1 0
-210
0 0 1 1
+310
Positive numbers add with positive numbers
Positive numbers add with larger negative numbers
Positive numbers add with smaller negative numbers
discard
1
1 1 0 1
-310
+ 1 1 1 0
-210
1 0 1 1
-510
discard
Negative numbers add with negative numbers
All the examples we seen so far give the right answer. Observe these following example:
1
0 1 0 1
+510
+ 0 1 0 0
+410
1 0 0 1
-710
1 0 0 1
-710
+ 1 1 1 0
-210
0 1 1 1
+710
Positive numbers add with positive number give negative result???
Negative numbers add with negative number give positive result???
discard
The above two example show what we call overflow condition. It happens when the bit are not enough to represent the answer. Usually in a computer system, there will be a flag that indicates every time an overflow occurs.
REMEMBER (Range) Unsigned
Signed
0 to 2 n 1
(2 n1 ) to (2 n1 1)
2.5 HEXADECIMAL NUMBERING SYSTEM As a base-16 system, hexadecimal has a combination of numbers and alphabet (0, 1, 2, 3, 4, 5, 6, 7, 8, and 9, A, B, C, D, E and F). Each digit in hexadecimal is equal to 4 bit binary or a nibble. Because of most microprocessor and microcontroller has memory and register with the size of byte, word and long word, its easier to see the data in hex rather than binary.
Microcontroller and Microprocessor Most microcontroller has smaller register size (mostly 8-bit such as Microchip PIC) compared to microprocessor (32-bit such as Motorola 68000)
Binary to Hexadecimal Conversion Binary numbers can be converted to octal by grouping the binary bit in group of four because a digit in hex is equal to four digits in binary (two to the power of four equal 16). Take a look at figure 2.4. It shows the step for binary to Hexadecimal conversion. Figure 2.4 Binary to hexadecimal conversion
Binary Number
1
Group the bit in four starting from LSB. Add 0 infront make group of four
2
Convert
3
Result in Hex
1 0 1 1 0 0 1 1 1 0 1
0 1 0 1
1 0 0 1
1 1 0 1
0+4+0+1
8+0+0+1
8+4+0+1
5 9 D
Example: Convert these following binary numbers hexadecimal. (i) 1100 1011 0100 2 (ii) 0110 1001 00112 Solution Binary Number
1 1 0 0 1 0 1 1 0 1 0 0
1 1 0 0
1 0 1 1
0 1 0 0
8+4+0+0
8+0+2+1
0+4+0+0
C B 4 Binary Number
0 1 1 0 1 0 0 1 0 0 1 1
0 1 1 0
1 0 0 1
0 0 1 1
0+4+2+0
8+0+0+1
0+0+2+1
6 9 3
Hexadecimal to Binary Conversion From previous example, each of the hex digits is equal to four bit of binary. So we expand each hex digit to four bit just like in figure F 4 D 8
Hexadecimal Number
1
Expand each hex digit to four binary bit
2
Result in Binary
1 1 1 1
0 1 0 0
1 1 0 1
1 0 0 0
1 1 1 1 0 1 0 0 1 1 0 1 1 0 0 0
F4D816= 1111 0100 1101 10002
Decimal to Hexadecimal Conversion To convert decimal numbers to octal, the decimal numbers are divided by 16 using the same repeated-division-method. For remainder larger than 9 (10, 11, 12, 13, 14 and 15), alphabet A, B, C, D, E and F are used to represent them respectively. Figure 2.5 shows the step for conversion of 4429810 to octal. The result is AD0116 . Figure 2.5 Repeateddivisionmethod for decimal to hexadecimal conversion
remainder 16
44289
1
16
2768
0
16
173
D
16
10
A
44289 2768 1(remainder) 16
1
2768 173 0(remainder) 16
2
173 10 13(remainder,13 D) 3 16
0
Read from bottom 5 44298910 = AD0116
10 0 10(remainder,10 A) 16
4
For fractional decimal number, repeated-multiplication-method is used. Figure 2.6 show step to convert 0.678510 to hexadecimal. Figure 2.6 Repeatedmultiplicationmethod for decimal to hexadecimal conversion
5
Read from top
0.6785 X16 = 0.856 + 10
1
0.856 X 16 = 0.696 + 13
2
0.696 X 16 = 0.136 + 11
3
0.136 X 16 = 0.176 +
2
4
Stop after 4th octal point digit but always refer to the question.
0.687510 = 0.ADB216
Example 2.21
Convert these following decimal numbers hexadecimal. (i) 4657910 (ii) 100010 Solution remainder
REMEMBER 16
46579
3
16
2911
F
16
181
5
16
11
B
For hexadecimal system, if remainder larger than 9, replace as follow: 10 = A 11 = B 12 = C
0
4657910 = B5F38
remainder 16
38358
6
16
2397
D
16
149
5
16
9
9
0
4657910 = B5F38
13 = D 14 = E 15 = F
Hexadecimal to Decimal Conversion
163 162 161 160
A 5 C 1
16-1 16-2
.
Weight
1 0 Hex point
A5C1. 18
(10 16 3 ) (5 16 2 ) (12 161 ) (1 16 0 ) (1 16 1 ) (10 4096) (5 256) (12 16) 1 (1 0.0625) 42433.062510
2.6 OCTAL NUMBERING SYSTEM Octal also offered a simpler way to expressed binary numbers, but is the least used numbering system in computer system. Octal to Binary Conversion We have seen how to convert binary to octal by grouping the bit into a group of three. So, a digit in octal is equal to three bit in binary.
Figure 2.7 Octal to binary conversion
4 6 2 3
Octal Number
1
2
Expand each octal digit to three binary bit
Result in Binary
1 0 0
1 1 0
0 1 0
0 1 1
1 0 0 1 1 0 0 1 0 0 1 1
46218= 1001 1001 00112
Octal to Decimal Conversion Just like the other system, octal is also a positional-numbering –system. So each digit has a different weight depending on its position. Figure 2.8 show the weight of each digit and converting 2534.18 to decimal Figure 2.8 Binary to decimal conversion
83 8 2 8 1 8 0
2 5 3 4
8-1 8-2
.
Weight
1 0 Octal point
2534. 10 8
Example 2.22
(2 83 ) (5 8 2 ) (3 81 ) (4 80 ) (1 8 1 ) (2 512) (5 64) (3 8) 4 (1 0.125) 1372.12510
Convert these following octal numbers decimal. (i) 1251. 4 8 (ii) 1032. 2 8
Solution 1251. 4 8
1032. 2 8
(1 83 ) (2 8 2 ) (5 81 ) (1 80 ) (4 8 1 ) 512 (2 64) (5 8) 1 (4 0.125) 681.510 (1 83 ) (3 81 ) (2 80 ) (2 8 1 ) 512 (3 8) 2 (2 0.125) 538.2510
Octal to Hexadecimal Conversion Unfortunately, there is no direct method to convert between these two systems. You can either convert octal to decimal and then decimal to hexadecimal, or convert octal to binary and then binary to hexadecimal. Comparing these two methods, the latter is easier.
Figure 2.9 Octal to hexadecimal conversion
7 4 2 1
Octal Number
1
Expand each octal digit to three binary bit
2
Result in Binary
3
Group in four
4
Convert
1 1 1
1 0 0
0 1 0
0 0 1
1 1 1 1 0 0 0 1 0 0 0 1
1 1 1 1
0 0 0 1
0 0 0 1
F 1 1
74218= F1116
Example 2.23
Convert these following decimal numbers to octal. (i) 1372.140610 (ii) 1000.324210 Solution remainder 8
1372
4
8
171
3
8
21
5
8
2
2
REMEMBER For octal system, the number will appear „larger‟ than its decimal counterpart.
0
137210 = 25348 5
Read from top
0.1406 X 8 = 0.1248 +
1
1
0,1248 X 8 = 0.9984 +
0
2
0.9984 X 8 = 0.9872 +
7
3
0.9872 X 8 = 0.8976 +
7
4
Stop after 4th octal point digit but always refer to the question.
0.140610 = 0.10778
1372.140610 = 2534.10778
Solution remainder 8
1000
0
8
125
5
8
15
7
8
1
1
0
100010 = 17508 5
Read from top
0.3242 X 8 = 0.5936 +
2
1
0.5936 X 8 = 0.7488 +
4
2
0.7488 X 8 = 0.9904 +
5
3
0.9904 X 8 = 0.9232 +
7
4
Stop after 4th octal point digit but always refer to the question.
0.324210 = 0.24578 1372.140610 = 1750.24578
Binary to Octal Conversion We can convert binary to octal by grouping the binary bit in group of three starting from LSB. Why three? Remember that octal is a base-8 system and eight is equal to two to the power of three. So, a digit in octal is equal to three digit in binary (digit in binary are called bit). Take a look at figure 2.6. It shows the step for binary to octal conversion.
Figure 2.10 Binary to octal conversion
Binary Number
1
Group the bit in three starting from LSB. Add 0 infront make group of three
2
Convert
3
Result in Octal
1 0 1 1 0 0 1 1 1 0 1
0 1 0
1 1 0
0 1 1
1 0 1
0+2+0
4+2+0
0+2+1
4+0+1
2 6 3 5
101 1001 11012 = 26358
Example 2.24
Convert these following binary numbers decimal. (i) 1100 1011 1100 2 (ii) 0110 1001 10012 Solution Binary Number
1 1 0 0 1 0 1 1 1 1 0 0
1 1 0
0 1 0
1 1 1
1 0 0
4+2+0
0+2+0
4+2+1
4+0+0
6 2 7 4
Result in Octal
1100 1011 11002 = 62748 Binary Number
Result in Octal
0 1 1 0 1 0 0 1 1 0 0 1
0 1 1
0 1 0
0 1 1
0 0 1
0+2+1
0+2+0
0+2+1
0+0+1
3 2 3 1 0110 1001 10012 = 32318
Hexadecimal to Octal Conversion Same with octal to hexadecimal conversion, you can either use hex-decoct method or hex-bin-oct method (this one is easier). Figure 2.11 Hexadecimal to octal conversion
Hexadecimal numbers Expand each hex digit to four binary bit
1
2
Result in Binary
3
Group in three
4
E 6 4 B
1 1 1 0
1 1 0 0
1 0 0 0
1 0 1 1
1 1 1 0 1 1 0 0 1 0 0 0 1 0 1 1
1
Convert
1 1 0
1 1 0
0 1 0
0 0 1
0 1 1
1 6 6 2 1 3 E64B16= 1662138
2.7 DIGITAL CODES Other than numbering system, codes are also used to represent value in digital system. Some codes are strictly numbers, and some also contains alphanumeric character. Binary-coded-decimal (BCD) BCD is a way to express each decimal digit in 4-bit decimal. Therefore, for a 4 digit decimal numbers, 16-bit are needed. Figure below show how conversion between decimal and BCD are done. Figure 2.12 Decimal to BCD conversion
Decimal numbers
1
Expand each digit to four binary bit
2
Result in BCD
8 6 4 9
1 0 0 0
0 1 1 0
0 1 0 0
1 0 0 1
1 0 0 0 0 1 1 0 0 1 0 0 1 0 0 1
Figure 2.13 BCD to Decimal conversion
BCD
1
1 0 1 1 0 0 1 0 1 0 0
Group the bit in four starting from LSB. Add 0 infront make group of four
2
Convert
3
Result in DEC
0 1 0 1
1 0 0 1
0 1 0 0
0+4+0+1
8+0+0+1
0+4+0+0
5 9 4
From the previous figure, we can see the simplicity of converting between BCD and decimal. That is the main advantage of us (human). But that is not the case for digital system. This is because BCD required more bit to represent decimal value. Take 10010 for example, it requires only 7-bit in binary form but in BCD, 12-bit are required. Another disadvantage is that BCD has „illegal code‟. Because of 4-bit binary can take value from up to 1510 . Allowed BCD codes are only up to 10012 910 and extra circuitry is needed to detect these „illegal codes‟.
Gray Code Gray code is unweighted and not an arithmetic code. The important characteristic of gray code is that only one bit can change in a sequence. The purpose of this code is to minimize error when counting in sequence. Figure 2.14 show how to convert binary to gray code. The steps are: (i) Retain the MSB (ii) Add adjacent binary bit, discard carry. Figure 2.14 Binary to Gray code conversion
Start from left to right
Binary numbers
1
0 + 0
1 + 0
1 + 1
0 + 1
0 + 0
0
1
0
1
0
1
0
1
0
1
1
0
0
Discard carry
1
0 + 1
Discard carry
Retain MSB
Gray code
1 + 1
0
Figure 2.15 show how to convert gray code to binary. The steps are: (i) Retain the leftmost bit. (ii) Add the converted gray bit to the adjacent binary bit, discard carry. Figure 2.15 Gray code to Binary conversion
Start from left to right
Gray code
1
0 + 0
1 + 0
1 + 1
0 + 0
0 + 0
0
0
0
1
0
0
0
0
0
1
0
0
0
Discard carry
1
0 + 0
Discard carry
Retain leftmost bit
Binary numbers
1 + 1
0
ASCII Code ASCII (American Standard Code for Information Interchange), generally pronounced „aski‟, is a character encoding based on the English alphabet. ASCII codes represent text in computers, communications equipment, and other devices that work with text. Most modern character encodings have a historical basis in ASCII. ASCII is, strictly, a seven-bit code, meaning that it uses the bit patterns represented with seven binary digits (a range of 0 to 127 decimal) to represent character information. At the time ASCII was introduced, many computers dealt with eight-bit groups (bytes) as the smallest unit of information; the eighth bit was commonly used as a parity bit for error checking on communication lines or other device-specific functions.
Figure 2.16 ASCII Table
2.8 ERROR DETECTION In the previous chapter, we have discussed about digital data transmission. In ideal case, data sent by the sender are identical when it received by the receiver. But in practice, error can happen when digital data is transmitted. Therefore, the receiver needs a means to detect whether the digital data it received contains any error or not. The simplest method for error detection is parity bit. String of transmitted digital data is added with one extra bit. This extra bit is a parity bit. There are two parity bit scheme, the odd parity and even parity scheme. In this odd parity scheme, the parity bit will ensure that the total numbers of „1‟ in the data string (including itself) is odd. In contrast, even parity bit will ensure that the total numbers of „1‟ in the data string (including itself) is even. Example 2.25
Digital data to be transmitted:
1 0 1
1 0 0 1
Numbers of „1‟ = 4 Parity bit
Transmitted Digital Data: (using odd parity scheme)
1 1 0 1
1 0 0 1
Parity bit
Transmitted Digital Data: (using even parity scheme)
0 1 0 1
1 0 0 1
Example 2.26
Digital data to be transmitted:
1 1 1
0 1 0 1
Numbers of „1‟ = 5 Parity bit
Transmitted Digital Data: (using odd parity scheme)
0 1 1 1
0 1 0 1
Parity bit
Transmitted Digital Data: (using even parity scheme)
0 1 1 1 1
0 1 0 1
When the receiver receives the data string, it will check for error using the parity bit. Parity bit offers a very simple method of error detection but the limitation is that if error affected more than one bit, detection will give a wrong result.
TUTORIAL 1.
Fill in the blank space with the correct value. All numbers are unsigned. DECIMAL
(i)
BINARY
HEXADECIMAL
345
(ii)
4D
(iii)
64
(iv)
1100 0000
(v)
58
(vi)
173
(vii) (viii)
EA 222
(ix)
110 1111
(x)
178
(xi)
0.275
(xii)
0.99
(xiii) (xiv) (xv)
OCTAL
0.45 0.0001 1001 0.1E
2.
3.
Arrange these unsigned numbers from the smallest to the largest. 1010 1110 2
0100 10112
0010 1010 2
7810
10010
7816
778
0011 1110 2
E316
5610
AA16
77 8
Fill in the blank space with the correct value. All numbers are unsigned. BINARY
(i)
3510
(ii)
7816
(iii)
110 10102
(iv)
1010 11002
(v)
0110 1001 (BCD)
4.
BCD
GRAY
Fill in the empty boxes with the correct value for the series below
(i)
1 0010
,
1 0100
,
,
1 1000
,
,
(ii)
8516
,
8816
,
,
8E16
,
,
(iii)
668
,
1028
,
(iv)
10 0111 (bcd)
,
10 1000 (bcd)
(v)
1008
,
4116
,
748
,
,
10 1001 (bcd)
,
, 10000102 ,
1128
,
,
8
,
,
16
,
2
5.
Fill in the blank space with the correct value. All numbers are 8-bit 2‟s complement signed binary numbers. 2‟s COMPLEMENT
DECIMAL
DECIMAL
(i)
1001 0011
(vi)
-67
(ii)
1111 0001
(vii)
98
(iii)
1000 0000
(viii)
-128
(iv)
0101 1010
(ix)
123
(v)
1111 1111
(x)
-180
6.
2‟s COMPLEMENT
Convert the following decimal numbers into 8-bit signed binary numbers.
DECIMAL (i)
-3510
(ii)
-10510
(iii)
-9910
(iv)
-110
(v)
-25610
SIGN MAGNITUDE
1‟s COMPLEMENT
2‟s COMPLEMENT
7.
8.
Arrange these 2‟s complement 8-bit signed binary numbers from the smallest to the largest 1001 0011
1111 0110
1011 1000
1000 0000
0100 1100
1001 0001
0011 0111
1010 0101
Perform the following unsigned arithmetic operation 1110 00112 + 110 00112 = 1110 11112 - 010 00012 =
2
238 + 130 8 =
8
104 8 - 77 8 =
8
5816 + E316 = 21716 - 9316 =
2
16
16
100 0010 (BCD) + 1 1001 (BCD) = 1001 0111 (BCD) - 11 1001 (BCD) =
(BCD)
(BCD)
9.
Perform the following 2‟s complement 8-bit signed binary arithmetic operation and compare the operation with a normal decimal addition. Identify if there is an overflow occurs. BINARY
(i) +
DECIMAL
0010 0011
=
0111 1101
= =
BINARY (i) +
DECIMAL
1010 0010
=
1001 1010
= =
BINARY (i) +
DECIMAL
1110 1000
=
0111 1011
= =
BINARY (i) +
DECIMAL
0010 1011
=
1111 0101
= =
BINARY (i) +
DECIMAL
1010 0011
=
1100 1001
= =
CHAPTER 3
BASIC & COMBINATIONAL LOGIC CIRCUIT OUTLINE •
INTRODUCTION TO BASIC GATES
•
ANALYZING A COMBINATIONAL LOGIC CIRCUIT
•
DESIGNING A LOGIC CIRCUIT FROM BOOLEAN EXPRESSION
•
DESIGNING A LOGIC CIRCUIT FROM TRUTH TABLE
•
BOOLEAN THEOREM
•
KARNAUGH-MAP APPROACH
•
THE DON‟T CARE CONDITION
•
UNIVERSALITY OF NAND AND NOR GATES
In this chapter, we move into the circuit part of digital system. We will look at basic logic gate and combinational logic circuit operation and application. 3.1 INTRODUCTION TO BASIC GATES In this topic, we will take a look basic gate symbol, operation, truth table, timing diagram and logic expression. The Inverter Also known as NOT gate. Inverter has only one input and one output. It will invert or complement the input to its opposite logic level and send it to output. Figure 3.1 show the different symbol for inverter. Figure 3.1 Inverter symbol (ANSI/IEEE std. 91-1984)
REMEMBER A
B
A
1
B
Rectangular outline symbol
Distinctive shape symbol
Take note that the bubble shape in the inverter symbol is a negate sign, means that it will inversion or complement operation
Whenever the input is high (1), the output is low (0) and when the input is low (0), the output will become high (1). Table 3.1 shows the truth table of inverter with input A and output B. Table 3.1 Truth table for inverter
A (input) 0 (low) 1 (high)
B (output) 1 (high) 0 (low)
TRUTH TABLE Truth table is a table that relates input combination with output.
If truth table shows the relation between input and output in form of table, timing diagram shows the relation between input and output using waveform, more like a graph. Figure 3.2 Waveform response of an inverter
Input
1 0
Output
1 0
A simpler (or more practical) way to represent logic circuit is by using Boolean expression. In this expression, input and output of a logic circuit are illustrated in mathematical form. Not only it takes form of mathematical equation, but also inherits some of its property (we will look at this more in Boolean theorem topics).
Inverter with input A and output B can be expressed in Boolean expression below:
AB The bar indicates negate operation
BOOLEAN EXPRESSION Write the output variable at the left side of the expression while the input variable in the right side.
If output of an inverter with input A are connected to the input of a second inverter, the output of the second inverter will be the same as A.
AA
Two „bar‟ with the same size can cancel of each other.
Figure 3.3 shows the pin connection diagram of IC 7404 (inverter). Figure 3.3 Inverter IC pin connection
The AND Gate Unlike inverter, AND gate can have two or more input but only one output. Figure 3.4 show the different symbol for AND gate. Figure 3.4 AND gate symbol (ANSI/IEEE std. 91-1984)
A B
A B
x
Distinctive shape symbol
0
& 0
0
x
Rectangular outline symbol
AND gate will only produce output high (1) when all the input are high (1), else the output are low (0). Table 3.2 shows the truth table of AND gate with two input A and B, and output X. Table 3.2 Truth table for two input AND gate
A (input) 0 (low) 0 (low) 1 (high) 1 (high)
B (input) 0 (low) 1 (high) 0 (low) 1 (high)
X (output) 0 (low) 0 (low) 0 (low) 1 (high)
Write input on the left side in binary counting order.
Timing diagram in figure 3.5 shows the output waveform of a AND gate X, when input waveform A and B are applied. Figure 3.5 Waveform response of an AND gate
Input (A)
1 0 1
Input (B)
0 1
Output
0
Two input AND gate with input A and B and output X can be expressed in Boolean expression below: X AB
The „dot‟ indicates an AND operation and its also inherits the properties of a normal multiply operation. If any of the input is low (0), output will also become low (0) because any other input multiply with „0‟ is equal to‟0‟ (same as normal math). Therefore, it can be summarize as: A0 0
A
„0‟
„1‟
A 1 A
A
A
If both the inputs are the same variable, and it is low (0), we will get low (0) output (0 multiply by 0 equal 0) and if both inputs are high (1), we will get high (1) output (1 multiply by 1 equal to 1). This can be summarize as below: AA A
A
A
If the two input are the same variable but with one is complement of the other, the output will always be low (0). This can be written as:
AA 0
A
‘0’
Figure 3.6 shows the pin connection diagram of IC 7408 (AND). Figure 3.6 AND gate IC pin connection
The OR Gate Similar to AND gate, OR gate can have two or more input but only one output. Figure 3.7 show the different symbol for an OR gate. Figure 3.7 OR gate symbol (ANSI/IEEE std. 91-1984)
A B
A B
x
Distinctive shape symbol
0
>=1 0
0
x
Rectangular outline symbol
OR gate will only produce output low (0) when all the input are low (0), else the output are high (1). In other words, it will produce high (1) when one or more inputs are high (1). Table 3.3 shows the truth table of OR gate with two input A and B, and output X. Table 3.3 Truth table for two input OR gate
A (input) 0 (low) 0 (low) 1 (high) 1 (high)
B (input) 0 (low) 1 (high) 0 (low) 1 (high)
X (output) 0 (low) 1 (high) 1 (high) 1 (high)
Timing diagram in figure 3.8 shows the output waveform of a OR gate X, when input waveform A and B are applied. Figure 3.8 Waveform response of an two inputs OR gate
1 Input (A) 0 1 Input (B)
0 1
Output 0
Two input OR gate with input A and B and output X can be expressed in Boolean expression below: X AB
The „plus‟ indicates an OR operation and its also inherits the properties of a normal addition operation with an exception. If any of the input is high (1), output will also become high (1) because any other input add with „1‟ is equal to‟1‟ (same as normal math) But how about when both input are high (1)? In math it supposed to be like this: 1 1 2 (or 10 in binary)
The exception is that for Boolean expression, 1 1 1 , and also applied for 1 1 1 1 Therefore, it can be summarize as: A0 A
A
A
„1‟
A 1 1
A
„1‟
If both the inputs are the same variable, and it is low (0), we will get low (0) output (0 plus 0 equal 0) and if both inputs are high (1), we will get high (1) output (1 add 1 equal to 1). This can be summarize as below: AA A
A
A
If the two input are the same variable but with one is complement of the other, the output will always be high (1). This can be written as:
A A 1
A
„1‟
Figure 3.9 shows the pin connection diagram of IC 7432 (OR). Figure 3.9 OR gate IC pin connection
The NAND Gate NAND gate can have more than one input but only one output. Figure 3.10 show the different symbol for an NAND gate. Figure 3.10 OR gate symbol (ANSI/IEEE std. 91-1984)
A B
A B
x
Distinctive shape symbol
0
& 0
0
x
Rectangular outline symbol
NAND gate will only produce output low (0) when all the input are high (1), else the output are high (1). Table 3.4 shows the truth table of OR gate with two input A and B, and output X. Table 3.4 Truth table for two input NAND gate
A (input) 0 (low) 0 (low) 1 (high) 1 (high)
B (input) 0 (low) 1 (high) 0 (low) 1 (high)
X (output) 1 (high) 1 (high) 1 (high) 0 (low)
NAND gate is the same with AND gate with inverted output
Timing diagram in figure 3.11 shows the output waveform of a NAND gate X, when input waveform A and B are applied. Figure 3.11 Waveform response of an two inputs NAND gate
1 Input (A) 0 1 Input (B)
0 1
Output 0
Two input NAND gate with input A and B and output X can be expressed in Boolean expression below:
X (A B)
Its always a good practice to put expression in bracket
The part in the bracket is a AND operation. The bar above the bracket indicates that any result from the bracket will be complimented. Figure 3.12 shows the pin connection diagram of IC 7400 (NAND).
Figure 3.12 NAND gate IC pin connection
The NOR Gate NOR gate can have two or more input but only one output. Figure 3.13 show the different symbol for an OR gate. Figure 3.13 NOR gate symbol (ANSI/IEEE std. 91-1984)
A B
x
Distinctive shape symbol
A B
0
>=1 0
0
x
Rectangular outline symbol
NOR gate will only produce output high (1) when all the input are low (0), else the output are low (0). Table 3.5 shows the truth table of OR gate with two input A and B, and output X. Table 3.5 Truth table for two input NOR gate
A (input) 0 (low) 0 (low) 1 (high) 1 (high)
B (input) 0 (low) 1 (high) 0 (low) 1 (high)
X (output) 1 (high) 0 (low) 0 (low) 0 (low)
Timing diagram in figure 3.14 shows the output waveform of a NOR gate X, when input waveform A and B are applied. Figure 3.14 Waveform response of an two inputs NOR gate
1 Input (A) 0 1 Input (B)
0 1
Output 0
Two input NOR gate with input A and B and output X can be expressed in Boolean expression below:
X (A B) The part in the bracket is an OR operation. The bar above the bracket indicates that any result from the bracket will be complimented. Figure 3.15 shows the pin connection diagram of IC 7402 (NOR). Figure 3.15 NOR gate IC pin connection
The Exclusive-OR Gate Exclusive-OR gate (or XOR gate for short) can only have two inputs but only one output. Figure 3.16 show the different symbol for an XOR gate. Figure 3.16 XOR gate symbol (ANSI/IEEE std. 91-1984)
A B
x
Distinctive shape symbol
A B
0
=1 0
0
x
Rectangular outline symbol
XOR gate will only produce output high (1) when the input has different state, one is high (1) and the other is low (0), else the output are low (0). Table 3.6 shows the truth table of OR gate with two input A and B, and output X. Table 3.6 Truth table for two input XOR gate
A (input) 0 (low) 0 (low) 1 (high) 1 (high)
B (input) 0 (low) 1 (high) 0 (low) 1 (high)
X (output) 0 (low) 1 (high) 1 (high) 0 (low)
Timing diagram in figure 3.17 shows the output waveform of a XOR gate X, when input waveform A and B are applied. Figure 3.17 Waveform response of an two inputs NOR gate
1 Input (A) 0 1 Input (B)
0 1
Output 0
XOR gate with input A and B and output X can be expressed in Boolean expression below:
X AB AB AB
symbol is indicating exclusive operation
Figure 3.18 shows the pin connection diagram of IC 7402 (XOR).
Figure 3.18 XOR gate IC pin connection
The Exclusive-NOR Gate Exclusive-NOR gate (or XNOR gate for shorts) can only have two inputs but only one output. Figure 3.19 show the different symbol for an XOR gate. Figure 3.19 XNOR gate symbol (ANSI/IEEE std. 91-1984)
A B
x
Distinctive shape symbol
A B
0
= 0
0
x
Rectangular outline symbol
XNOR gate will only produce output high (1) when the input has same state, else the output are low (0). Table 3.7 shows the truth table of OR gate with two input A and B, and output X. Table 3.7 Truth table for two input XOR gate
A (input) 0 (low) 0 (low) 1 (high) 1 (high)
B (input) 0 (low) 1 (high) 0 (low) 1 (high)
X (output) 1 (high) 0 (low) 0 (low) 1 (high)
Timing diagram in figure 3.20 shows the output waveform of a XNOR gate X, when input waveform A and B are applied. Figure 3.20 Waveform response of an two inputs NOR gate
1 Input (A) 0 1 Input (B)
0 1
Output 0
XOR gate with input A and B and output X can be expressed in Boolean expression below:
X AB AB AB
3.2 ANALYZING A COMBINATIONAL LOGIC CIRCUIT A single gate cannot do much by itself. In digital system, different gate are connected to perform different function. Such circuits are called combinational logic circuit (combination of gates). Given a combinational logic circuit, we must be able to understand what it does. In order to do that, we must know what are the output corresponding to all the possible input combination. What better way to present this than to use truth table. The only problem is that we have to analyze each output of each gate for every input combination. To overcome this problem this problem, we will obtain the Boolean expression first, and the analyze it to build the truth table. Let take a look at example 3.1. It shows the process of building truth table for a combinational logic circuit. Example 3.1 Build the truth table for the combinational logic circuit below A B C
Z
1.
Obtain the Boolean expression at each node (this step can be skip when you have become familiar with combinational logic circuit) d
dB
e
A
e Ad AB Z
B
f d C B C
C f
2.
Write the complete Boolean expression for Z
Z e f (A B) (B C) 3.
Built an empty truth table for the circuit. Fill all input combinations in binary counting order. A 0 0 0 0 1 1 1 1
4.
B 0 0 1 1 0 0 1 1
C 0 1 0 1 0 1 0 1
Z A three input circuit has eight possible input combinations. Possible input combination = 2 (n is the number of input)
n
Using Boolean expression for Z, evaluate Z for each input combination. A
B
C
Z
0
0
0
Z (0 0) (0 0) (0 1) (1 0) 1 0 1 0
0
0
1
Z (0 0) (0 1) (0 1) (1 1) 1 1 1 0
0
1
0
Z (0 1) (1 0) (0 0) (0 0) 0 0 0 1
0
1
1
Z (0 1) (1 1) (0 0) (0 1) 0 0 0 1
1
0
0
Z (1 0) (0 0) (1 1) (1 0) 1 0 1 0
1
0
1
Z (1 0) (0 1) (1 1) (1 1) 1 1 1 0
1
1
0
Z (1 1) (1 0) (1 0) (0 0) 1 0 1 0
1
1
1
Z (1 1) (1 1) (1 0) (0 1) 1 0 1 0
5.
Fill in the Z column of the truth table A 0 0 0 0 1 1 1 1
6.
B 0 0 1 1 0 0 1 1
C 0 1 0 1 0 1 0 1
Z 0 0 1 1 0 0 0 0
Done!
Example 3.2 Build the truth table for the combinational logic circuit below A B C Z
1.
Obtain the Boolean expression at each node (this step can be skip when you have become familiar with combinational logic circuit) d
d AB
e
A B
e C d (A B) C
C
Z
f BC
f
2.
Write the complete Boolean expression for Z
Z e f (( A B) C ) ( B C )
3.
Evaluate Z, and fill in the truth table. A 0 0 0 0 1 1 1 1
4.
B 0 0 1 1 0 0 1 1
C 0 1 0 1 0 1 0 1
Z 1 0 1 0 1 0 1 0
A three input circuit has eight possible input combinations. Possible input combination = 2 (n is the number of input)
n
Done!
3.3 DESIGNING A COMBINATIONAL LOGIC CIRCUIT FROM BOOLEAN EXPRESSION To design a circuit from a given Boolean expression, the important thing you must do is, group the variable in bracket. Then start the design from either input or output. Example 3.3 shows how both methods are used. Example 3.3 Design a combinational logic circuit for Boolean expression
Z A BC BC C 1.
Group in bracket
Z (A B C) (B C) C 2.
Draw the circuit. A B C Z
Example 3.4 Design a combinational logic circuit for Boolean expression
Z A BC A 1.
Group in bracket
Z A B C A
2.
Draw the circuit.
Z
A B C
3.4 DESIGNING A COMBINATIONAL LOGIC CIRCUIT FROM TRUTH TABLE To design a combinational logic circuit from truth table, first thing we need to do is to get the Boolean expression. Then we follow the step shown in previous example. Each row of a truth table represents an input combination. Each of the input combination is a „product term‟ (because the multiply) or minterm.. All the minterm for a three input combinational logic circuit are shown in figure 3.21. Figure 3.21 Minterm of a three input combinational logic circuit
A 0
B 0
C 0
→
0 0 0 1
0 1 1 0
1 0 1 0
→ → → →
1
0
1
→
1
1
0
→
1
1
1
→
A BC A BC A BC A BC
We will used the the minterm system because you will use this term in microelectronics subject
A BC A BC A BC A B C
Example 3.5 Write the Boolean expression for Z for a circuit that produce a truth table below in SOP form Figure 3.22 Truth table for example 3.5
A 0 0 0 0 1 1 1 1
B 0 0 1 1 0 0 1 1
C 0 1 0 1 0 1 0 1
Z 0 0 1 0 1 1 0 0
To design a combinational logic circuit for truth table in figure 3.16, first we list out all the minterm that produce high (1) output. A 0 0 0 0 1 1 1 1
B 0 0 1 1 0 0 1 1
C 0 1 0 1 0 1 0 1
Z 0 0 1 0 1 1 0 0
→
A BC
→ →
A BC A BC
Then we add (OR-ed) all the minterm to get Z
Z A B C A B C A B C Because of the minterm are product and being „add‟ (OR-ed) to express Z, this form are called Sum-of-Product (SOP). This is also a standard form of SOP because all the product have all the input variable in them (we will find other SOP form later) Writing product term can be tedious for a complex circuit, therefore a short-hand notation can be used. Figure 3.23 shows short-hand for each minterm. Figure 3.23 Short-hand notation for minterm
A 0
B 0
C 0
→
0 0 0 1
0 1 1 0
1 0 1 0
→ → → →
1
0
1
→
1
1
0
→
1
1
1
→
A BC A BC A BC A BC A BC A BC A BC A B C
Short-hand m0 m1 m2 m3 m4
REMEMBER Don‟t use capital letter for „m‟ in minterm short-hand
m5 m6 m7
As a result, Z in the example 3.5 can also be expressed as Z m2 m4 m5
Simpler is it? We can also use canonical form to make it even simpler. For the same example, the form canonical are:
Z ( A, B, C ) m(2,4,5)
Figure 3.24 Explanation for canonical form
Z ( A, B, C ) m(2,4,5) Output Variable
Input Variable (MSB on the left)
Sigma (sum)
All minterm that produce high (1) output m for minterm
Other than SOP, there is another form called the Product-of-Sum (POS). Figure 3.25 shows the „summation term‟ (or maxterm) for each of the input combination and also the shorthand notation for each of the maxterm Figure 3.25 Maxterm and shorthand notation
A 0 0
B 0 0
C 0 1
→ →
0 0 1
1 1 0
0 1 0
→ → →
1
0
1
→
1
1
0
→
1
1
1
→
A BC
A BC ABC ABC A BC
A BC A BC ABC
Short-hand M0 M1 M2 M3 M4
REMEMBER Use capital „M‟ in maxterm short-hand
M5 M6 M7
For writing a Boolean expression in POS form, take the maxterm for all the input combination that produce a low (0) outputs. Therefore, the expression for Z in example 3.5 are:
Z ( A, B, C ) M (0,1,3,6,7)
Canonical form
Z ( A, B, C) M0 M1 M3 M6 M7
Maxterm shorthand
Z (A B C) (A B C) (A B C) (A B C) (A B C) POS form For this subject, we will only use SOP form. The POS are introduced to make you familiar with it as you will often use it in microelectronics subject.
3.5 BOOLEAN THEOREM As other mathematical expression, Boolean expressions also have certain theorem or rules that must be followed when applying Boolean algebra. This is important in reducing expression to its simplest form.
Commutative law Rule 1:
A B B A
Rule 2:
A B B A
A B
A B
A B
A B
Associative law Rule 3:
A ( B C) ( A B) C A B C A B C
Rule 4:
A B C
B C
A ( B C ) ( A B) C A B C
A B C
A B C
Distributive law Rule 5:
A
A (B C) A B A C A B C
A B A C
( A B) (C D) A C A D B C B D
A B C D
A C A D B C B D
A B C
Single variable theorem Most of these theorems we have seen in topic 3.1. Rule 6:
AA
Rule 7:
A0 0
Rule 8:
A 1 A
Rule 9:
AA A
Rule 10:
AA 0
Rule 11:
A0 A
Rule 12:
A 1 1
Rule 13:
AA A
Rule 14:
A A 1
Rule 15:
A AB A
Rule 16:
A AB A B
This can be proven by: factorizing the expression: A A B A (1 B) By applying rule 12 : A A B A (1) A This rule is can be proven as follows:
A A B (A A B) A B
Rule 15
(A A A B) A B
Rule 9
AA AB AB AA A (A A) B (A A) A (1) B (1) AB
Rule 10 Rule 14
Beside these 16 rules, there are two other rules called the Demorgan‟s theorem. The theorem are: Rule 17:
A B AB A B
A B A B
A 0 0 1 1
B 0 1 0 1
A B 1 0 0 0
A B 1 0 0 0
Rule 18:
AB A B A B
A 0 0 1 1
A B A B
B 0 1 0 1
A B 1 1 1 0
A B 1 1 1 0
The easiest way to understand Demorgan‟s theorem is to break (or connect) bar above the sign that change. Figure 3.27 Demorgan‟s simplified
Sign „+‟ change to „.‟ breaks the bar
AB CD
A BC D
Now that we have all the „tools‟ needed, lets try to do expression minimization. The advantage of getting a minimize expression is that its need less logic gate to be implemented. Thus, reduce cost and increase speed (also lower the cost).
In reality, each gate will introduce some delay. That means lesser gate, higher speed
Example 3.6
Simplify the expression y A B C A B C A B C
y A B C A BC A B C A C (B B) A B C
Factorize the 1st and 3rd product
A C (1) A B C
Rule 14: B B 1
A C A B C
Rule 8: (A C) (1) A C
A C A (B C)
Rule 18: B C B C
A C A B A C
multiply out the bracket
A (C C) A B
Factorize the 1st and 3rd product
A (1) A B
Rule 14: A A 1
A AB
Rule 8: (A) (1) A
A (1 B)
Factorize
A (1)
Rule 12: 1 B 1
A
Rule 8: (A) (1) A
In example 3.6, the solution shown is a very detail step by step simplification process. Most of these steps can be skipped or combined when you get more familiar with all these laws. The rest of the example will not show the simplification process as detail as this. The simplified expressions are still in form of SOP but not the standard SOP form. Example 3.7
Simplify the expression y (A C) (B D)
y (A C) (B D)
(A C) (B D) A C B D A C B D Example 3.8
Simplify the expression y A B (C D)
y A B (C D) A B (C D) Example 3.9
A B C D Simplify the expression y (A B) (A B) y (A B) (A B)
A A A B A B B B A AB AB A (1 B B) A Example 3.10
Simplify the expression y A B C A C
y A BC A C C (A B A)
C (B A) BC A C Example 3.11
Simplify the expression y (Q R ) (Q R )
y (Q R ) (Q R ) QR QR
Example 3.12
Simplify the expression y (Q R) (Q R )
y (Q R) (Q R ) (Q R) (Q R ) 0 Example 3.13
Simplify the expression y R S T (R S T)
y R S T ( R S T) ( R S T) ( R S T ) R S T Or
y R S T ( R S T) R S T R S T R (S T 1) S T R ST Now we take a look at circuit simplification using Boolean algebra. First step is to obtain the Boolean expression, minimized the expression and re-draw using the minimized expression. Example 3.14 Simplify the circuit in figure 3.28 using Boolean algebra Figure 3.28 Circuit for example 3.14
A B C Z
Obtain the Boolean expression
Z (A B C) (A C C) Simplify
Z (A B C) (A C C) (A B C) (C) (A C B C C) C Re-draw the simplified circuit.
C
Z
Example 3.15 Simplify the circuit in figure 3.29 using Boolean algebra Figure 3.29 Circuit for example 3.15
A B
Z
C
Obtain the Boolean expression Z (A B) (B C) (A B) (B C)
A B B C Re-draw the simplified circuit. A B
Z
C
Example 3.16 Simplify the circuit in figure 3.30 using Boolean algebra Figure 3.30 Circuit for example 3.15
A B C
Z
Obtain the Boolean expression Z A (B C) A 1
3.6 KARNAUGH-MAP APPROACH Boolean algebra uses mathematical approach for minimizing logic function and sometimes given a not so minimize expression because of the choice of theorem used. Karnaugh map (or k-map for short) approach on the other hand uses graphical method for minimizing logic function. The steps for minimizing using k-map are: (i) Map the output in k-map (ii) Group the „1‟ (iii) Determine the minimum product term for each group (iv) Summed all the term to obtain the minimize SOP Step 1: Mapping the k-map Given a logic function in form of truth table or Boolean expression, the first thing you must (be able to) do is map the output level in the k-map. Mapping the k-map from truth table Mapping from truth table is easier than mapping from Boolean expression. Figure 3.31 and 3.32 shows a three input (A, B, and C) logic circuit k-map and how the mapping are done from a truth table while figure 3.33 shows a k-map for a four input logic circuit. Figure 3.31 Mapping kmap from truth table for a three input logic circuit.
A B C
Z
A BC A BC A BC A BC
0 0 0 0
0 0 1 1
0 1 0 1
0 1 2 3
A BC A BC A BC A BC
1 1 1 1
0 0 1 1
0 1 0 1
4 5 6 7
C
C
REMEMBER
AB
0
1
AB
2
3
AB
6
7
AB
4
5
The 3 and th 4 row of the k-map is not in normal order because the counting order is in gray code.
rd
Figure 3.32 Mapping kmap from truth table for a three input logic circuit.
Figure 3.33 Mapping kmap from truth table for a four input logic circuit.
A B C
Z
A BC A BC A BC A BC
0 0 0 0
0 0 1 1
0 1 0 1
0 1 2 3
A BC A BC A BC A BC
1 1 1 1
0 0 1 1
0 1 0 1
4 5 6 7
A B C D
Z
0 0 0 0
0 0 0 0
0 0 1 1
0 1 0 1
0 1 2 3
0 0 0 0
1 1 1 1
0 0 1 1
0 1 0 1
4 5 6 7
1 1 1 1
0 0 0 0
0 0 1 1
0 1 0 1
8 9 10 11
1 1 1 1
1 1 1 1
0 0 1 1
0 1 0 1
12 13 14 15
BC BC BC BC
A
0
1
3
2
A
4
5
7
6
C D C D
C D
C D
AB
0
1
3
2
AB
4
5
7
6
AB
12
13
15
14
AB
8
9
11
10
Input are also called varible (because the value varies), so a 4 input logic circuit kmap can also be called 4 variable k-map
Mapping from Boolean expression To map a k-map from a Boolean expression, the easiest way (and to avoid mistake) is to change the expression into SOP (or also POS) standard form. You can also map it directly from a non-standard Boolean expression (not recommended for beginner). Figure 3.34 and 3.35 show how standard product terms of SOP are mapped in k-map for a three input and four input logic circuit.
Figure 3.34 Mapping kmap from Boolean expression for a three input logic circuit.
Figure 3.35 Mapping kmap from Boolean expression for a four input logic circuit.
C
C
C
0
A B
1
A B A B C A B C
0 0
A BC A BC
A B
A BC A BC
0 1
A BC A BC
A B
A BC A BC
1 1
A BC A BC
A B
A BC A BC
1 0
A BC A BC
CD
A B
0 0
0 1
1 1
1 0
0 0 A B C D ABCD ABCD ABCD
0 1
ABCD ABCD ABCD ABCD
1 1
A BC D ABCD ABCD A BC D
1 0
ABCD A BC D ABCD ABCD
Transforming a non-standard SOP to standard SOP form A non-standard SOP doesn‟t have the complete variable set for its product term. A simplified expression is usually in form of non-standard SOP. So, we need to add up the „missing‟ variable in each term. Example 3.16 Change the Boolean expression below to its standard SOP form Z (B C) (A B) (A B C) A
Figure 3.36 Solution for example 3.16
Z (B C) (A B) (A B C) A Missing ‘A’
Missing ‘C’
Missing ‘B’ and ‘C’
(B C) (A A) A B (C C) A B C A (B C B C B C B C) Delete redundant term
(A B C) (A B C) (A B C) (A B C) (A B C) (A B C) (A B C) (A B C) (A B C)
(A B C) (A B C) (A B C) (A B C) (A B C)
Direct mapping from a non-standard Boolean expression. You can also directly map a non-standard Boolean expression to k-map. Be very careful to avoid any mistake. Example 3.17 Map the Boolean expression directly into k-map. Figure 3.37 Solution for example 3.17
Z (B C) (A B) (A B C) A ( A B C) (A B C)
(A B C) (A B C)
C
C
AB
1
0
AB
0
0
AB
1
1
AB
1
1
(A B C) (A B C) (A B C) (A B C)
Delete redundant term
Step 2: Grouping of ‘1’s Before you can start grouping the „1‟s in k-map, you must familiarized yourself with the adjacent cell concept. Adjacent cell in k-map One more thing that you must know is the adjacent cell of a k-map. Adjacent cell are define as cell that are left, right, above and below and not diagonal. The 4th column is adjacent to the 1st column and the 4th row is adjacent to the 1st row. As a result, the four corner cells are adjacent to each other. Figure 3.38 Adjacent cell of a 4variable kmap
CD A B 0 0
01
11 1 0
0 0 1
0 1
Each cell are adjacent to the cell at its right, left, above and below
1 1 1 0
A B
0 0
CD 00
01
11
10 2
0 1 1 1
Each cell at the outer left column are adjacent to the corresponding cell at the outer right corner. (‘wrap around’ adjacency)
1 0
CD 00
A B
01
11 1 0
0 0 0 1 1 1 1 0
3
Each cell at the top row are adjacent to the corresponding cell at the bottom row. (‘wrap around’ adjacency)
After the Boolean expresson are fully mapped, all „1‟s in adjacent cell in the k-map must be enclosed together (we will call this group). To obtain the minimal Boolean expression, the aim is the smallest number of group and largest group possible according to these rule:
Rule 1: A group can only contain either 1,2,4,8 or 16 cells, which are all power of two. Figure 3.39 Explanation of rule 1.
CD 00
A B
01
11 1 0
CD 00
A B
01
11 1 0
0 0
0
1
0
0
0 0
1
1
0
1
0 1
0
1
0
0
0 1
1
1
0
1
1 1
0
0
0
0
1 1
0
0
0
1
1 0
0
0
1
1
1 0
0
0
0
1
01
11 1 0
CD 00
A B
0 0
0
1
1
0
0 1
0
1
1
0
1 1
0
1
1
0
1 0
0
1
1
0
Rule 2: Each cell in a group must be adjacent to one or more cell in that same group, but all cells in the group do not have to be adjacent to each other. Figure 3.40 Explanation of rule 2.
CD 00
A B
01
11 1 0
0 0
0
1
0
0
0 1
0
1
0
0
1 1
0
1
0
0
1 0
0
1
1
1
These two is not adjacent but still in group
Rule 3: The group must be the largest group possible. Figure 3.41 Explanation of rule 3.
CD A B 0 0
0 0
0
01
11 1 0
1
1
0
0 1
0
1
1
0
1 1
0
1
1
0
1 0
0
1
1
0
Select the largest group (contains 8 cells)
Rule 4: All „1‟ must be enclosed in a group (at least one) and „1‟s that already in a group can overlap (included) in other group as long as it contains the non-common 1‟s Figure 3.42 Explanation of rule 4.
CD A B 0 0
01
11 1 0
0 0
0
1
1
0
0 1
0
1
1
1
1 1
0
1
1
1
1 0
0
1
1
0
Overlapped cell
Non-common cell
Step 3: Determining the minimum SOP expression from k-map When cells are group together, the contradictory variable (one complemented or non-complemented) in the group can be eliminated. For a three variable k-map: (i) a group of 1 cell produce a 3-varible product term (ii) a group of 2 cells produce a 2-variable product term (iii) a group of 4 cells produce a 1-variable product term (iv) a group of 8 cells produce a value 1 For a four variable k-map: (i) a group of 1 cell produce a 4-varible product term (ii) a group of 2 cells produce a 3-variable product term (iii) a group of 4 cells produce a 2-variable product term (iv) a group of 8 cells produce a 1-variable product term (v) a group of 16 cells produce a value 1
Step 4: Summed all the term to obtain the minimize SOP DONE! To make better understanding of this approach, lets take a look at some examples. Example 3.18 Obtain the simplest SOP form for the Boolean expression below:
Z A BC D A BC D A BC D A BC D A BC D A BC D A BC D Solution Because of the expression is in standard SOP form, we can straight away mapped it in k-map (i)
Map the output in k-map CD A B 0 0
(ii)
0 1 11
10
0 0
0
1
1
0
0 1
0
1
1
1
1 1
0
0
0
0
1 0
0
1
1
0
0 1 11
10
Group the „1‟ CD A B 0 0
0 0
0
1
1
0
0 1
0
1
1
1
1 1
0
0
0
0
1 0
0
1
1
0
(iii)
Determine the minimum product term for each group
CD A B 0 0
(iv)
0 1 11
10
0 0
0
1
1
0
0 1
0
1
1
1
1 1
0
0
0
0
1 0
0
1
1
0
AD A BC
BD
Summed all the term to obtain the minimize SOP
Z A D B D A B C
Example 3.19 Obtain the simplest SOP form for the Boolean expression below:
Z A BC D A BC D A BC D A BC D A BC D A BC D A BC D A BC D A BC D A BC D Solution Because of the expression is in standard SOP form, we can straight away mapped it in k-map (i)
Map the output in k-map CD A B 0 0
0 1 11
10
0 0
1
1
1
1
0 1
0
1
0
0
1 1
0
0
1
0
1 0
1
1
1
1
(ii)
Group the „1‟ CD A B 0 0
(iii)
10
0 0
1
1
1
1
0 1
0
1
0
0
1 1
0
0
1
0
1 0
1
1
1
1
Determine the minimum product term for each group CD A B 0 0
(iv)
0 1 11
0 1 11
10
0 0
1
1
1
1
0 1
0
1
0
0
1 1
0
0
1
0
1 0
1
1
1
1
B
ACD ACD
Summed all the term to obtain the minimize SOP
Z B ACD ACD
Example 3.20 Obtain the simplest SOP form for the Boolean expression below:
Z A B A B C D A B C D A B C D Solution Because of the expression is in non-standard SOP form, we can convert it to standard SOP form or straight away map it in k-map.
(i)
Map the output in k-map CD 00
A B
(ii)
1
1
1
1
0 1
1
1
0
0
1 1
0
0
1
0
1 0
0
0
0
0
Group the „1‟ 0 1 11
10
0 0
1
1
1
1
0 1
1
1
0
0
1 1
0
0
1
0
1 0
0
0
0
0
Determine the minimum product term for each group CD A B 0 0
(iv)
10
0 0
CD A B 0 0
(iii)
0 1 11
0 1 11
10
0 0
1
1
1
1
0 1
1
1
0
0
1 1
0
0
1
0
1 0
0
0
0
0
AB
A BCD
AC
Summed all the term to obtain the minimize SOP
Z A B A C A B C D
Example 3.21 Obtain the simplest SOP form for truth table below:
Figure 3.43 Truth table for example 3.21
Solution (i)
A B C D
Z
0 0 0 0
0 0 0 0
0 0 1 1
0 1 0 1
1 0 1 1
0 0 0 0
1 1 1 1
0 0 1 1
0 1 0 1
0 0 0 0
1 1 1 1
0 0 0 0
0 0 1 1
0 1 0 1
1 0 1 1
1 1 1 1
1 1 1 1
0 0 1 1
0 1 0 1
0 1 0 1
Map the output in k-map CD 00
A B
(ii)
0 1 11
10
0 0
1
0
1
1
0 1
0
0
0
0
1 1
0
1
1
0
1 0
1
0
1
1
Group the „1‟ CD A B 0 0 0 1 1 1
10
0 0
1
0
1
1
0 1
0
0
0
0
1 1
0
1
1
0
1 0
1
0
1
1
(iii)
Determine the minimum product term for each group CD A B 0 0
(iv)
0 1 11
10
0 0
1
0
1
1
0 1
0
0
0
0
ABD
1 1
0
1
1
0
BD
1 0
1
0
1
1
BC
Summed all the term to obtain the minimize SOP
Z B C B D A B D
Example 3.22 Re-draw the simplified circuit of the logic circuit in figure 3.44. Figure 3.44 Circuit for example 3.22
A
B
C
D
A BCD
A BCD A BCD Z
AB A BC
Solution (i)
Obtain the Boolean expression for Z
Z A B C D A B C D A B C D A B A B C
(ii)
Map the output in k-map CD A B 0 0
(iii)
10
0 0
0
0
0
0
0 1
0
0
0
0
1 1
0
1
1
0
1 0
1
1
1
1
Group the „1‟ and determine the minimum product term for each group CD A B 0 0
(iv)
0 1 11
0 1 11
10
0 0
0
0
0
0
0 1
0
0
0
0
1 1
0
1
1
0
1 0
1
1
1
1
A B
A D
Summed all the term to obtain the minimize SOP
Z A B A D A (B D) (v)
Draw the simplified circuit
A B D
Z
3.7 THE DON’T CARE CONDITION In many design, there will sometimes a non-existent input combination. For example, let say we have two sensor for the same tank, one for full and one for empty, and both will produce HIGH (1) when active. Therefore, condition for both are HIGH (1) is not valid. We may use this combination to produce error or just take it as don‟t care condition. By taking it as a don‟t care (usually represented by X), we can take its value as either „1‟ or „0‟ depending on which will give us the more simplified expression. Although it‟s good to have a simplified more expression (cost, speed), using don‟t care also make the circuit more vulnerable to error (because there always an output even when invalid input are applied). Don‟t care simplification Simplification is done using k-map approach. Mapping the k-map are the same as before but use „X‟ for every don‟t care condition. Example 3.23 Obtain the simplest SOP form for truth table below:
Figure 3.45 Truth table for example 3.23
A B C D
Z
0 0 0 0
0 0 0 0
0 0 1 1
0 1 0 1
0 0 0 0
0 0 0 0
1 1 1 1
0 0 1 1
0 1 0 1
0 0 0 X
1 1 1 1
0 0 0 0
0 0 1 1
0 1 0 1
1 X 1 1
1 1 1 1
1 1 1 1
0 0 1 1
0 1 0 1
0 1 0 0
Solution (i)
Map the output in k-map CD A B 0 0
(ii)
10
0 0
0
0
0
0
0 1
0
0
x
0
1 1
0
1
0
0
1 0
1
x
1
1
0 1 11
10
Group the „1‟ CD A B 0 0
(iii)
0 1 11
0 0
0
0
0
0
0 1
0
0
X
0
1 1
0
1
0
0
1 0
1
X
1
1
Take this as ‘0'
Take this as ‘1'
Summed all the term to obtain the minimize SOP
Z A B C A C D Example 3.24 Obtain the simplest SOP form for truth table below:
Figure 3.46 K-map for example 3.24
CD 00
A B
0 1 11
10
0 0
X
0
0
X
0 1
0
1
0
0
1 1
x
x
0
0
1 0
1
0
0
1
Solution (iv)
Group the „1‟ CD A B 0 0
10
0 0
X
0
0
X
0 1
0
1
X
0
1 1
X
X
0
0
1 0
(v)
0 1 11
1
0
0
1
Take this as ‘1'
Take this as ‘0'
Summed all the term to obtain the minimize SOP
Z B D B C D
3.8 UNIVERSALITY OF NAND AND NOR GATE Both NAND and NOR gate are called universal circuit because it can be used to produce NOT, the AND, the OR and NOR function shown in figure 3.39 and 3.40 respectively. Figure 3.47 Universality of NAND gate
A B
Z AB
A
Z AA A
A B A
A
Z
Z AB AB
A B
Z
Z AB A B A B
A B
Z
A B
Z
B A B
Z AB A B A B
Figure 3.48 Universality of NOR gate
A B
ZAB
A
ZAAA
A B A B A
A
Z
ZABAB
A B
Z
Z A B AB AB
A B
Z
A B
Z
Z A B AB AB
B
Designing a circuit using only NAND gate. For designing this kind of circuit, there are two kinds of approach, the direct translation method and Boolean manipulation method. Using direct translation method, we just replace the gate other than NAND with the equivalent NAND shown in figure 3.39. Though this is easier (assuming you remember the entire equivalent NAND gate), the resulting circuit will consist of many NAND gate. Using Boolean manipulation in the other hand, require you to use Boolean theorem to transform the expression into a NAND gate only expression. Example 3.25 Re-draw the logic circuit in figure 3.41 using only NAND gate. Figure 3.49 Logic circuit for example 3.25
A B C D
Z
Direct Translation
A B Z
C D
Boolean manipulation Firstly, we need to obtain the Boolean expression for Z.
Z AB CD Then use Boolean theorem to manipulate it into NAND form. (i.e. no „+‟ sign and a long „bar‟ on top)
Z AB CD
AB CD
A BC D Finally, draw the circuit A B C D
Z
Comparing the total NAND gate used in the two approaches, the Boolean manipulation uses lesser gate (4 gates) than direct translation (8 gates). So, if you were instructed to design a NAND gate only circuit with the least gate, you must use the Boolean manipulation approach.
Designing a circuit using only NOR gate. Just like circuit using only NAND gate, there are the same two kinds of approach, the direct translation method and Boolean manipulation method.
Example 3.26 Re-draw the logic circuit in figure 3.50 using only NOR gate. Figure 3.50 Logic circuit for example 3.26
A B
Z
C D
Direct Translation
A B
Z
C D
Boolean manipulation Firstly, we need to obtain the Boolean expression for Z.
Z A BC D Then use Boolean theorem to manipulate it into NAND form. (i.e. no „∙‟ sign and a long „bar‟ on top)
Z A BC D A BC D A BC D
A (B C) D A (B C) D
Finally, draw the circuit A B C D
Z
3.9 CONSTRUCTING DIGITAL LOGIC CIRCUIT There are several things we need to know before circuit construction can be started, the protoboard, the Digital Lab Trainer and the IC‟s.
Solderless Breadboard for Prototyping This is a way of making a temporary circuit, for testing purposes or to try out an idea. No soldering is required and all the components can be reused afterwards. It is easy to change connections and replace components. We will use this to construct our circuit on during lab experiment. Figure 3.51 A Solderless Breadboard
Connections on Breadboard Breadboards have many tiny sockets (called 'holes') arranged on a 0.1" grid. The leads of most components can be pushed straight into the holes. ICs are inserted across the central gap with their notch or dot to the left. Wire links can be made with single-core plastic-coated wire of 0.6mm diameter (the standard size) usually referred as jumper wire. Stranded wire is not suitable because it will crumple when pushed into a hole and it may damage the board if strands break off.
Figure 3.52 Solderless Breadboard Connection
The top and bottom rows are linked horizontally all the way across as shown by the red and black lines on the diagram. The power supply is connected to these rows, + at the top and 0V (zero volts) at the bottom. I suggest using the upper row of the bottom pair for 0V, then you can use the lower row for the negative supply with circuits requiring a dual supply (e.g. +9V, 0V, -9V). The other holes are linked vertically in blocks of 5 with no link across the centre as shown by the blue lines on the diagram. Notice how there is separate blocks of connections to each pin of ICs.
Large Breaboards On larger breadboards there may be a break halfway along the top and bottom power supply rows. It is a good idea to link across the gap before you start to build a circuit, otherwise you may forget and part of your circuit will have no power!
IC pin numbers IC pins are numbered anti-clockwise around the IC starting near the notch or dot. The diagram shows the numbering for 8-pin and 14-pin ICs, but the principle is the same for all sizes.
Figure 3.53 IC Pins Numbering
Components without suitable leads Some components such as switches and variable resistors do not have suitable leads of their own so you must solder some on yourself. Use single-core plastic-coated wire of 0.6mm diameter (the standard size). Stranded wire is not suitable because it will crumple when pushed into a hole and it may damage the board if strands break off. Figure 3.54 A push button switch with soldered wire
Building a Circuit on Breadboard Converting a circuit diagram to a breadboard layout is not straightforward because the arrangement of components on breadboard will look quite different from the circuit diagram. When putting parts on breadboard you must concentrate on their connections, not their positions on the circuit diagram. The IC (chip) is a good starting point so place it in the centre of the breadboard and work round it pin by pin, putting in all the connections and components for each pin in turn.
Building a Logic Circuit Based on Logic Gates Diagram. 1. Labeled all the gates with the IC numbers. E.g. 7400 for NAND, 7402 for NOR or you can also write NAND in the gates symbols. This will make it easier to identify the IC for each gate.
A
7400
B
7400
Z
7432
7400
C
7404
2. Labeled all the pins at every interconnection. Refer to pin configuration. Remember that every IC pin configuration is NOT THE SAME. Check all IC”s using IC TESTER first.
1
A
3
7400
1
2
2
4
B
9 7400
1
7404
3
Z
6
7400
5
C
7432
2
8
10
3. Connect the VCC pin to +5V and GND pin to ground for EVERY IC‟s. MAKE SURE YOU DIDN‟T USE THE 0~15V SOURCE. (refer to Section 2) 4. Connect IC‟s using jumper wire. 5. Connect the input (A, B and C) to the DATA SWITCH and output (Z) to LED. (refer to Section 2) CHECK BEFORE TURNING ON THE POWER.
Breadboarding tips: It is important to breadboard a circuit neatly and systematically, so that one can debug it and get it running easily and quickly. It also helps when someone else needs to understand and inspect the circuit. Here are some tips: Always use the side-lines for power supply connections. Power the chips from the side-lines and not directly from the power supply.
Use black wires for ground connections (0V), and red for other power connections.(if possible)
Keep the jumper wires on the board flat, so that the board does not look cluttered.
Route jumper wires around the chips and not over the chips. This makes changing the chips when needed easier.
Assume you will have to make changes. Whether it is correcting design flaws, fixing mistakes in wiring, adding extra circuitry, tweaking component values, or re-engineering your entire concept, the odds that you will NOT have to make any changes to your circuit are very close to zero. So choose methods that allow for easy changes, leave yourself enough space on your boards, and don't set anything in stone until you are certain it's working how you want it.
Account for ALL your pins. Whether or not they appear on your schematic or in an example circuit you are borrowing from, make sure you take a look at the data sheet for each IC and be sure that every pin is appropriately connected if it needs to be. The classic mistake here is the student who can't figure out why his op-amp circuit doesn't work, when they didn't bother hooking up the + and voltage supply pins that didn't appear on the schematic. Besides power and ground connections, there may be chip enables, clocks,resets, and other similar inputs that have to be made happy before things will work. Unused inputs on extra gates should be connected to ground or the logic supply: left unconnected, some kinds of gates can oscillate and cause wierd problems. Unused outputs can be left open, as a rule.
"It's must be a bad chip" . . .NOT!!! When a circuit design doesn't work, the first impulse is to blame a failed component because we just know the design and wiring are right. In practice, it is really quite amazing how seldom the chips are at fault, and how much abuse (wrong wiring, wrong power supplies) many common chips will withstand without damage. (DO watch that static electricity, though.) The problem is almost invariably somewhere else.
Build one whole device first, if you are intending to make several identical units. It's tempting to save time by, for example, drilling all
the chasses for all the units while you have your drill set up: soldering all the boards at once; etc. etc. But if you then find you've got to undo or redo something that didn't work the way you thought it would, you've multiplied your mistake across all the units. Finish one unit completely to find all the mistakes and optimize the design, then go into "mass production."
Make sure you can get the parts before basing a design on it. You may find the ideal integrated circuit for your application in a data book, but it may not be in production, may be unavailable from distributors, or may be too expensive. Especially if you are creating a design you hope to produce for a while, it's wise to choose devices that are widely available and that (you hope) won't be discontinued.
THE IDL-800 DIGITAL TRAINER RULES TO FOLLOW ALWAYS SWITCH OFF THE IDL BEFORE BUILDING/MODIFYING YOUR CIRCUIT USE APPROPIATE TOOLS TO PULL THE IC FROM THE PROTOBOARD
POWER SWITCH
FUNCTION GENERATOR Amplitude Frequency Multiplier Frequency Waveform type Signal Out
VOLTMETER
8-bit data display panel
7 segment display Variable power supply 3-way switch panel
Pulser switch panel
8-bit data switch panel
Integrated Circuit (IC’s)
There are several families of logic chips numbered from 74xx00 onwards with letters (xx) in the middle of the number to indicate the type of circuitry, eg 74LS00 and 74HC00. The original family (now obsolete) had no letters, eg 7400. The 74LS (Low-power Schottky) family (like the original) uses TTL (Transistor-Transistor Logic) circuitry which is fast but requires more power than later families. The 74 series is often still called the 'TTL series' even though the latest chips do not use TTL! The 74HC family has High-speed CMOS circuitry, combining the speed of TTL with the very low power consumption of the 4000 series. They are CMOS chips with the same pin arrangements as the older 74LS family. Note that 74HC inputs cannot be reliably driven by 74LS outputs because the voltage ranges used for logic 0 are not quite compatible, use 74HCT instead. The 74HCT family is a special version of 74HC with 74LS TTL-compatible inputs so 74HCT can be safely mixed with 74LS in the same system. In fact 74HCT can be used as low-power direct replacements for the older 74LS ICs in most circuits. The minor disadvantage of 74HCT is a lower immunity to noise, but this is unlikely to be a problem in most situations. The CMOS circuitry used in the 74HC and 74HCT series ICs means that they are static sensitive. Touching a pin while charged with static
electricity (from your clothes for example) may damage the IC. In fact most ICs in regular use are quite tolerant and earthing your hands by touching a metal water pipe or window frame before handling them will be adequate. ICs should be left in their protective packaging until you are ready to use them. 3.10 EXTRA ASSIGNMENTS
Give one example where don‟t care condition exist and from your example, explain the advantage and disadvantage of using a don‟t care. It can clearly be seen that K-map method is a more preferred than Boolean simplification method is simplifying a Boolean expression. But, there is one simplification case where k-map cannot be used, and Boolean theorem must be used instead. Identify the case. Constructing a logic circuit from SOP expression is more complex than constructing from simplified expression because the number of gates and wiring involved. Nevertheless, there is one main advantage of doing so. Identify it. Show how can the K-map method being use to simplify a 5 variable expression.
TUTORIAL Input A Input B Output X 1.
2.
3.
4.
What is gate X? (a)
AND
(c)
XOR
(b)
NAND
(d)
XNOR
Find the Boolean expression for the combinational logic circuit in Figure Q17.
(c)
Z AB ABC BC
(d)
Z AB ABC BC
(a)
Z AB ABC BC
(b)
Z AB ABC BC
Given that Z AB C DE ABC D . Find the complement of Z. (a)
AB CD C E ABC AB D
(c)
A BC DE A B CD
(b)
A BC DE A CD
(d)
AB CD CE ABC ABD
The Boolean expression X= AB + CD represents (a)
2 ORs ANDed together
(c)
a 4-bit input AND gate
(b)
2 ANDs ORed together
(d)
an XOR gate
5.
6.
7.
8.
9.
A 5 variable K-Map contains (a)
16 cells
(c)
64 cells
(b)
32 cells
(d)
25 cells
On a Karnaugh Map, grouping the 0s produces (a)
a POS expression
(c)
a SOP expression
(b)
a “don‟t care” condition
(d)
AND-OR logic
According to De Morgan theorems, the following equality(s) is (are) correct (a)
AB A B
(c)
XYZ X Y Z
(b)
A B C ABC
(d)
all of these
The domain of expression Y ABCD AB CD B is (a)
A and D
(c)
A,B,C and D
(b)
B only
(d)
none of them
Which one is NOT a valid rule for Boolean algebra (a)
A+1 = 1
(c)
A A A
(b)
A A
(d)
A 1 A
10. Which of the following NOT helpful in simplifying any Boolean expression: (a)
Boolean Theorem
(c)
De‟ Morgan Law
(b)
Karnaugh Map
(d)
logic gates
11. An example of a SOP expression is (a)
A B(C D)
(c)
AB AC ABC
(b)
( A B C )( A B C )
(d)
Both answers A and B
12. The expression ABCD ABC D ABCD (a)
cannot be simplified
(c)
can be simplified to ABC D ABC
(b)
can be simplified to ABC AB
(d)
None of the answers is correct
13. The AND operation can be produced with (a)
two NAND gates
(c)
three NAND gates
(b)
one NOR gate
(d)
three OR gates
14. In a 4 variable Karnaugh map , a 2- variable a product term is produced by grouping (a)
two adjacent cells of bit 1s
(c)
four adjacent cells of bit 1s
(b)
two adjacent cells of bit 0s
(d)
Eight adjacent cells of bit 1s
PROBLEMS 1.
Identify the correct Boolean expression. TRUE/ FALSE (i)
X (X Y) X
(ii)
X XYZ X YZ
(iii)
XY XYZ XY Z
(iv)
XY XY 1
(v)
XY XY 1
(vi)
X (X Y) X
(vii)
X (X Y) 1
(viii)
XX Y X
(ix)
XXY X
(x)
XY XY 0
(xi)
XY Z X X Y Z
(xii)
XY X 1
(xiii)
XY XY 1
(xiv)
Y Z Z 1
2.
(xv)
X Y Z X 1
(xvi)
X (X Z Y) 1
(xvii)
XZ XZ 1
(xviii)
XZ XZ 0
(xvix)
XY Z X X
(xx)
XXYXYZ XYZ
For the following Boolean expression, simplify using Boolean theorem obtain the truth table obtain the standard SOP form simplify using k-map draw the circuit (i)
Z A B C A B C A B C A B C A B C
(ii)
Z A B C A B C A B C
(iii)
Z A B C A B C A B C
(iv)
Z C A B C A B C
(v)
Z ABC
(vi)
Q R S T (R S T)
(vii)
Z (B C) (B C) A B C
(viii)
J ( A B)( A C ) ( B C )
(ix)
Z ( B D)( B D) B(CD AD)
(x) (xi) (xii) (xiii) 3.
f ( A, B, C, D) m(1,2,6,7,11,12,14,15)
f ( A, B, C, D) m(0,2,5,9,11,12,13,14) f ( A, B, C, D) m(3,7,8,12,13,15)
Simplify Boolean expression below using k-map (i) (ii) (iii) (iv) (v)
f ( A, B, C, D) m(1,2,6,7,11,12,14,15) d (0,5)
f ( A, B, C, D) m(0,2,5,9,11,12,13,14) d (1,4,8,15) f ( A, B, C, D) m(3,7,8,12,13,15) d (0,1,2,10)
f ( A, B, C, D) m(0,1,8,10,13,14) d (2,4,5,15) f ( A, B, C, D) M (3,5,13,15)
Design Question 1.
Design a combinational logic circuit with four inputs and four outputs that converts a 4bit BCD number into the equivalent 4-bit Excess-3 code. Obtain the truth table and the sum-of-products expression for the outputs. Simplify the expression by using the Karnaugh map method and include all don‟t care conditions. Draw the resulting circuit.
2.
For the Boolean expression T A B A B , show that the circuit can be connected using four dual input NAND gates.
3.
Figure below shows a display of a seven-segment indicator. Each segment of the indicator can be illuminated by applying logic 1 to the input for that segment. By simultaneously illuminating the appropriate segments, the device can be used to display the digits from 0 to 5. Design a logic circuit whose seven outputs drive the seven-segment display. The circuit has three inputs, the logic levels at this inputs represent the five decimal digits (0, 1, 2, 3, 4, and 5) in pure binary code.
a f
g
e
b
c d
b and c segments 4.
Figure below shows four switches that are part of a control circuitry in a copy machine. The switches are at various points along the path of the copy paper as the paper passes through the machine. Each switch is normally open, and as paper passes over a switch, the switch closes. It is impossible for switches SW1 and SW4 to be closed at the same time. Design the logic circuit to produce HIGH (1) output whenever two or more switches are closed at the same time. Use karnaugh map and take advantage of the don‟t care condition. 5V SW1 5V SW2 Z 5V SW3 5V SW4
LOGIC CIRCUIT
5.
Design an electronic circuit that takes two 2-bit binary numbers X(x1, x0) and Y(y1, y0) and produces an output binary number Z(z3, z2, z1, z0) that is equal to the function Z = X+3Y of the two input numbers. Draw the logic circuit for each output functions separately.
6.
For the Boolean expression T A B A B , show that the circuit can be connected using four dual input NAND gates.
7.
Design a logic circuit to produce an output HIGH only if the input, represented by a 4bit binary numbers, is greater than 12 or less than 3. Show all the steps required.
8.
Design an electronic circuit that takes two 2-bit binary numbers X(x1, x0) and Y(y1, y0) and produces an output binary number Z(z3, z2, z1, z0) that is equal to the function Z = X+2Y of the two input numbers.
9.
Design an electronic circuit that takes two 2-bit binary numbers X(x1, x0) and Y(y1, y0) and produces an output binary number Z(z3, z2, z1, z0) that is equal to the function Z = X*Y of the two input numbers.
10. Design a logic circuit to produce an output HIGH only if the inputs, represented by a 4bit binary numbers, have an odd numbers of HGH inputs. Show all the steps required.
11. Design a logic circuit with four input (A, B, C and D) that will produce a HIGH output whenever both A and C is HIGH as long as both B and D are either both HIGH or both LOW.
12. Design a logic circuit with four input (A, B, C and D) that will produce a HIGH output whenever majority of the input are HIGH.
13. By using only 2 input NAND gate, draw the circuit to implement the following function : Z A BC D
14. Develop a NOR only logic circuit for an octal that will encodes each key closure to binary. (Assume that the input are active-high). This circuit has eight inputs and three outputs.
15. Figure below shows the intersection of a main highway with a secondary access road. Vehicle-detection sensors are places along lanes C and D (main road) and lanes A and B (access road). These sensor outputs are LOW (0) when no vehicle is present and HIGH (1) when a vehicle is present. The intersection traffic light is to be controlled according to the following logic:
Access road
N W
E S
A Main road
C B
D
The east-west (EW) traffic light will be green whenever both lanes C and D are occupied.
The E-W light will be green whenever either C or D is occupied but lanes A and B are not both occupied.
The north-south (NS) light will be green whenever both lanes A and B are occupied but C and D are not both occupied.
The N-S light will also be green when either A or B is occupied while C and D are both vacant.
The E-W light will be green when no vehicle present.
Using the sensor output A, B, C and D as inputs, design a logic circuit to control the traffic light. There should be two outputs, N-S and E-W, that go HIGH when the corresponding light is to be green.
Build the truth table for the circuit.
Using Karnaugh map approach, obtain the simplest Boolean expression for N-S and E-W.
16. Figure below shows the intersection of a main highway with a secondary access road. Vehicle-detection sensors are places along lanes C and D (main road) and lanes A and B (access road). There is also sensor E for pedestrian crossing. Sensor A, B, C and D outputs are LOW (0) when no vehicle is present and HIGH (1) when a vehicle is present. Sensor E output will be LOW (0) when no pedestrian is present and HIGH (1) when a pedestrian is present. If there is a pedestrian detected at E, all the lights will be red. Else, the intersection traffic light is to be controlled according to the following logic:
Access road
N W
E S
E
A Main road
C B
D
The east-west (EW) traffic light will be green whenever both lanes C and D are occupied.
The E-W light will be green whenever either C or D is occupied but lanes A and B are not both occupied.
The north-south (NS) light will be green whenever both lanes A and B are occupied but C and D are not both occupied.
The N-S light will also be green when either A or B is occupied while C and D are both vacant.
The E-W light will be green when no vehicle present.
Design a logic circuit to control the traffic light using the sensor output A, B, C, D and E as inputs. There should be two outputs, N-S and E-W, that go HIGH (1) when the corresponding light is to be green and LOW (0) when it is to be red.
17. An assembly line has 3 active-HIGH failsafe sensors and 1 emergency shutdown active-LOW switch. The line should keep moving unless any of the following conditions arise: If the emergency switch is pressed. If sensor 1 and sensor 2 are activated at the same time. If sensor 2 and sensor 3 are activated at the same time. If all three sensors are activated at the same time. To stop the assembly line, signal HIGH must be generated at the output, Z. Derive the truth table for this system. Obtain the simplest Boolean expression for Z. 18. An electronic dice may be constructed from seven LEDs laid out in the pattern shown in figure below. The LEDs are to be driven by binary input b2, b1 and b0. Design the circuit.
Input (decimal)
Output (dice display)
Input (decimal)
1
4
2
5
3
6
Output (dice display)
SUBJECT:
Experiment 1
ELECTRICAL ENGINEERING LABORATORY BEE 2291 DIGITAL ELECTRONICS Analyzing and Building a Combinational Logic Circuit.
A Z B Figure 1 PRELAB TASK
1. Obtain the simplest Boolean expression for Z in Figure 1.
2. Fill in truth table 1 (in data analysis section in this lab sheet) for this circuit. Evaluate Z using the Boolean expression you obtained in step 1 and fill in the column Z (theory). 3. Re-draw the circuit in figure 1 complete with IC and pin numbers. (Refer to the IC‟s datasheet). Name this circuit as circuit 1. LAB TASK
1. Construct the circuit in figure 1 on the protoboard. 2. Connect the inputs (A and B) to the data switch and output (Z) to the LED. Make sure every IC is connected to +5V and ground properly. 3. By using all the possible input combination, fill in the column Z (exp) in truth table 1. 4. Compared Z (theory) with Z (exp). Write a conclusion on your findings.
DATA & ANALYSIS
INPUT A
B
Truth Table 1 CONCLUSION
OUTPUT Z (theory) Z (exp)
Experiment 2
Designing a Combinational Logic Circuit with only NAND gates
A X B Figure 2 PRELAB TASK
1. Prove that the output Boolean expression in figure 4 is Boolean theorem.
X A B using
2. Evaluate X using the Boolean expression and fill in the column Z (theory) in truth table 2. 3. Re-draw the circuit in figure 2 complete with IC and pin numbers. (Refer to the IC‟s datasheet). Name this circuit as circuit 2. LAB TASK
1. Construct the circuit in figure 2 on the protoboard. 2. Connect the inputs (A and B) to the data switch (Refer to theory in 3.4) and output (Z) to the LED. Make sure every IC is connected to +5V and ground properly. 3. By using all the possible input combination, fill in the column X (exp) in truth table 2. 4. Write a conclusion: (i) On your findings by comparing X (theory) with X (exp). (ii) Circuit 1 in task 1 has a similar truth table with circuit 2. This shows that circuit 2 can perform the same logical function as circuit 1 by using a singe type of gates. What are the advantages and disadvantages of using a single type of gates in a design?
DATA & ANALYSIS
INPUT A
B
Truth Table 1 CONCLUSION
OUTPUT X (theory) X (exp)
Experiment 3
Designing a Combinational Logic Circuit from truth table
A B C
Z
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 1 1 1
0 0 1 1
0 1 0 1
1 0 0 1
Figure 3
PRELAB TASK
1. From figure 3, obtain the standard SOP Boolean expression for Z. (You don‟t need to simplify it yet.) 2. Draw the logic circuit for the Boolean expression you obtain in step 1 complete with IC and pin numbers. Name this circuit as circuit 3. 3. Using Boolean theorem, show that the Boolean expression in step 1 can me simplified into Z A B C 4. Draw the logic circuit for the Boolean expression in step 3 complete with IC and pin numbers (use XOR gate). Name this circuit as circuit 4.
LAB TASK
1. Construct circuit 3 on the protoboard. 2. Connect the inputs (A, B and C) to the data switch (refer to theory in 3.5) and output (Z) to the LED. Make sure every IC is connected to +5V and ground properly. 3. By using all the possible input combination, build a truth table for this circuit. 4. Construct the circuit 4 on the protoboard. 5. Connect the inputs (A, B and C) to the data switch (refer to theory in 3.5) and output (Z) to the LED. Make sure every IC is connected to +5V and ground properly. 6. By using all the possible input combination, build a truth table for this circuit. 7. Write a conclusion on the two advantages of building a circuit from a simplified Boolean expression.
Experiment 4
Designing a Combinational Logic Circuit from a Design Instuction.
Design a logic circuit whose output (Z) is HIGH whenever A and B are both HIGH as long as C and D are either both LOW or both HIGH. PRELAB TASK
1. Obtain the Boolean expression for Z based on the instruction above. 2. Construct the truth table for this circuit and evaluate the Z based on the expression in step 1. 3. Draw the logic circuit for the Boolean expression you obtain in step 1 complete with IC and pin numbers. Name this circuit as circuit 4.
LAB TASK
1. Construct circuit 4 on the protoboard. 2. Compare the output with the theoretical output obtained earlier (step 2).
Experiment 5:
Designing a 2-bit Relative Magnitude Detector Figure 5 shows a relative magnitude detector that takes two 2-bit binary numbers; x1x0 and y1y0, and determines whether they are equal and if not, which one is larger. There are three outputs, defined as follows:
M=1 only if the two input numbers are equal N=1 only if x1x0 is greater than y1y0 P=1 only if y1y0 is greater than x1x0 Output
Input
X1
Relative magnitude detector
Binary number x
X0
(LSB)
Binary number y
Y1 Y0
M (x=y) N (x>y) P (x
(LSB)
Figure 5 PRELAB TASK
1. Construct the truth table for this circuit. Note: your truth table should have four inputs and three outputs. Refer to teaching module. 2. Obtain the simplest Boolean expression for M, N and P. Show all steps. 3. Draw the combined circuit (circuit 1) complete with IC and pin numbers.
LAB TASK
1. Construct circuit 2 on the protoboard. 2. Verify that the circuit output is correct.
POST LAB TASK
Show how two unit of 2-bit magnitude relative detector can be cascaded to implement a 4-bit magnitude relative detedtor.
