Mark v Hardware

g GE Power Systems Training And Development

SPEEDTRONIC TM MARK V HARDWARE cores and their relationship with the I/O termination’s. termination’s.

CABINET (CASE) Size TMR = Triple Modular Redundant cabinet size (54"w x 20"d x 90"h). Simplex = cabinet size (36"w x 20"d x 90"h).

Figure 2 is a descriptive layout of the MK V cabinet showing the actual card and I/O locations within the different cores. Back up panel The back operator interface , (Figure (Figure 3) is located on the right front door. The back up operator interface provides access to control and monitoring functions for the operator, allowing continuous operation of the turbine if the main operator interface fails. The is connected directly to , , and .

Grounding The cabinet is equipped with a ground bar and lug which must be connected to the plant's ground grid system or earth ground with a minimum #4 AWG cable size. This cable is for electrical grounding and noise interference reduction. The cable resistance should be no greater than 1/2 ohm. Radio transmitters Operation of a 5 watt or less radio transmitter at 27 MHz, 150 MHz and 480 MHz with panel doors closed will not disrupt control operation. If at all practical, try not to key radio transmitters near the control panel.

E-stop The E-Stop (emergency stop) push-button is located below the back up panel on the right front door (Figure 1). This push-button is used to trip the turbine in an emergency situation only and should not be used as a normal turbine stop. (Note: Steam turbine applications use this as the last step of a normal shutdown)

Power requirements 100 - 144 VDC at a minimum of 7 amps. Add 0.5 amps for each solenoid used.

Cores There are at usually 8 different cores used in the gas turbine and steam turbine control system for TMR panels (6 for a simplex panel.) Additional cores are added as required by the application.

108 - 132 VAC at a minimum of 7 amps. Add 6 amps for each ignition transformer used (2 maximum) and 0.5 amps continuous (3 amps inrush) for each AC solenoid used.

******** CAUTION ******** It is not required to remove power from the cores when pulling out the card carriers. Be careful not to touch any of the components while doing this. If you must remove power pow er from the core, remove the power cable or use the switches in the core. DO NOT remove the fuse.

216 - 264 VAC at a minimum of 3.5 amps. Add 3.5 amps for each ignition transformer used (2 maximum) and 0.5 amps continuous (3 amps inrush) for each AC solenoid used. Layout Figure 1 is a functional layout of the MK V cabinet showing the location of the different

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g GE Power Systems T r a i n i n g A n d D e v el el o p m e n t

LOW LEVEL SHIELD BUS BAR

CCOM

Core

Core

Core

TB for LVDT/R Servo's etc.

TB for LVDT/R Servo's etc.

TB for mA inputs/outputs

Not Used

Vibration, PR, Vdc etc.

Not Used

Not Used

TB for Themopcouples

TB for Themopcouples

LVDT feedback, mA inputs

TB for RTD

Not Used

Core

Core

HIGH LEVEL SHIELD BUS BAR

Backup Operator Interface

Core

Emergency Stop PB TB for LVDT/R Servo's etc.

Core or Core or Rectfiers

LEFT FRONT DOOR

LEFT SIDE WALL

Overspeed, flame Synch & trip

AC & DC power supply inputs

Core

Core

Contact Input Terminal Board




Contact Output Terminal Board




BACK PANEL

RIGHT SIDE WALL

RIGHT FRONT DOOR

Ground Lug

NOTES: 1 - High level wiring on right side of case, low level on left side. 2 - Cable support rails provided on both side walls. 3 - Refer to case outline drawings for additional site specific details.

Figure 1 Functional Layout of a typical SPEEDTRONIC Mark V Cabinet

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LOW LEVEL SHIELD BUS BAR

CCOM

Core 1 - DCC /LCC 2 - TCQA 3 - TCQB* 4 - TCQC 5 - TCPS


Core 1 - DCC /LCC 2 - TCCA 3 - TCCB* 4 - TCCC 5 - TCPS

6 - QTBA

6 - QTBA

6 - CTBA

Not Used (*5)

7 - TBQB

Not Used

Not Used

8 - TBQA

8 - TBQA

Not Used


9 - TBQC (*4)

Core 1 - TCEA 2 - TCEB 3 - TCEA 4 - TCTn 5 - TCEA

HIGH LEVEL SHIELD BUS BAR


9 - TBCA

Core 1 - TCPD

Emergency Stop PB 6 - QTBA

Core or Core or Rectfiers

LEFT FRONT DOOR

LEFT SIDE WALL

6 - PTBA

Core 1 - TCDA 2 - TCDA 3 - TCDA 4 - TCRA 5 - TCRA

TB1 & TB2

Core 1 - TCDA 2 - OPEN 3 - OPEN 4 - TCRA 5 - TCRA

6 - DTBA

6 - DTBA

7 - DTBB

7 - DTBB

8 - DTBC

8 - DTBC

9 - DTBD

9 - DTBD

BACK PANEL

RIGHT SIDE WALL

RIGHT FRONT DOOR

Ground Lug

NOTES: 1 - High level wiring on right side of case, low level on left side. 2 - Cable support rails provided on both side walls. ("B" type panels have shield termination bars located adjacent to the terminal boards). 3 - Refer to case outline drawings for additional site specific details. 4 - Location 9 of could be used for extended I/O, eg. a TBQF card installed on a large steam turbine application. 5 - Location 7 of could be used for extended I/O, eg. proximeter inputs terminated on a TBQE card. Figure 2 Descriptive Layout of a typical SPEEDTRONIC Mark V Cabinet

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g GE Power Systems T r a i n i n g A n d D e v el o p m e n t

Core Types -Redundant control Cores - Common or communication Core
- Protective Core - Power Distribution Core - Digital I/O Core for - Digital I/O #1 Core for Optional cores: - Digital I/O #2 Core for . - Digital I/O #2 Core for . - Redundant communications core. Power Load Unbalance (Large Steam Applications)

LIQUID CRYSTAL DISPLAY GE Drive Systems Control Products MENU ALARM SIL

DSP

PROC ALARM ACK

NORMAL

F11 F1

F16 F6

F12

F13

F2

F17

F14 F3

F18

F7

F8

F4

F19 F9

ALLP ALARM RESET

ALARMS

SCROLL UP

PREV DSP

ESC

F15 F5

F20

SET

B 1

D

F10

FORCE RAISE

A

SCROLL DOWN

NEXT DSP

HELP

2

E 4

R

5

7

<

>

CLEAR

6

DELETE

T 8

9 E N T E R

DZ LOWER

3

F

S

DEM SHIFT

C

0

Figure 3 Backup Operator Interace Panel

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carriers are movable and swing out for easy card maintenance. The third card carriers is fixed in place and contains the power supply for the core. Each circuit card is held in place with 6 plastic clips. For ease in installation there are 8 locator pins mounted on the card carrier.

Layout and arrangement

Each core has a place for 5-circuit boards (location 1 through 5) and 1 to 4 - I/O terminal boards (location 6 through 9) as shown in Figure 4. The circuit boards are mounted in carriers. The first two card

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g GE Power Systems T r a i n i n g A n d D e v el o p m e n t Loc. 2

Loc. 1

Loc. 3 Loc. 4

Loc. 5 Indicates Board Orientation (Top Left Hand Corner of Card)

Loc. 6

Cards mounted on Card Carriers (Max. of Three Per Core)

Loc. 7

Loc. 8

Shield Termination Strips (B Panels)

Loc. 9

Figure 4 Core Layout (Typical)

The I/O termination boards come in many different styles. Some are used for digital input, analog input/output, relay output and extended analog signals. The termination cards contain terminal strips (Phoenix terminal) for field wire termination, and may also have hardware jumpers to program the

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function on the termination card, active components such as transistors and diodes, and passive components such as resistors and capacitors. Figure 5 illustrates the proper way to terminate field wiring on the termination card. As can be seen in Figures 1 and 2 there are separate wire

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runs for high and low level wiring. This must be conformed to for noise and cross talk reduction. Each termination terminal has a wire size limitation of 1-#12 AWG wire. Use the proper size screw driver to tighten the

termination screws. These termination strips are plastic and can be damaged by using a screw driver larger than the hole in the termination strip.

Strip Insulation Back Approx. 1/4"

INSULATION SLEEVE Slide sleeve over aluminum shield

SIGNAL WIRES

INSULATION SLEEVE Slide sleeve over Drain Wire

DRAIN WIRE

SHIELD BUS BAR FERRULE DETAIL A Optional Arrangement: Ferrule over wire ends to prevent wire from flaring out. (Commonly used for stranded wire.)

Figure 5 Field Wire Termination Speedtronic Mark V Panel

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Note: Color Trace Indicates Pin Number One Color Trace 1 1

Connector

Ribbon Cable

1 2

View A Connector Pin Numbering Arrangement

Figure 6 SpeedtronicTM Mark V Ribbon Cables

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g GE Power Systems Training And Development Pin (Male/Female)

TOP VIEW Polarized (Keyed)

TYPE 1

Wires

Polarized (Keyed)

PIN

CIRCUIT BOARD

Figure 7 Polarized Connectors Mark V Hardware.doc

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Ribbon cables are used to inter-connect the different circuit boards within each core. These cables are also used to inter-connect the different cores. The ribbon cables are NOT polarized to the mating ribbon connector. Proper care should be taken when installing the cables, observing proper polarity. Figure 6 illustrates a typical ribbon connector with its polarity identification.

LCCB - - This is the LAN (Local Area Network) daughter board for the voter link. The LCCB board mounts on the DCCA CPU board and contains the 80196 microprocessor, a key pad and display. The key pad and display are used for system diagnostics and troubleshooting. TCCA - - analog I/O board. The operator interface or processor is connected to this board via the CTBA card. The TCCA board has an 80196 microprocessor.

Power connectors are polarized. Proper care should be taken when inserting these connectors making sure the polarization is observed. By forcing the connectors in backwards or offsetting the pins, the core power supply and associated circuit boards can be damaged. Figure 7 illustrates two different types of polarized connectors used on the MK V.

TCCB - - This is the extended analog I/O board #1 for the processor. TCDA - - Digital I/O board. The TCDA board contains an 80196 microprocessor and the optical isolation for the contact inputs coming in from the field.

Circuit boards and termination boards

TCEA -
- The TCEA board is responsible for processing the over speed and flame detection trip signals. The TCEA board also contains an 80196 microprocessor. There are a series of berg jumpers that program the board to the location in the
core where it resides. If you move the board within the core, you must move the berg jumpers.

As stated above, each core can contain up to 5 circuit boards and 4 termination boards. Below is a list and brief description of those boards.

Circuit boards DCCA - - CPU or control processor board contains the 80186 microprocessor which is the heart of the system. The CPU board also contains the 80196 microprocessor, 32010 math co processor used for auto sync functions, EEPROM and dual ported RAM. There is a small push-button switch mounted on the board for re-booting the processor after down loading new software into the EEPROM.

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TCEB -
- Contains the common circuits for the protective core.

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2. Communication link for IONET. 3. Communication link to processor (ARCNET). 4. Mounted on the TBQA board is a 9-pin RS232 connector for TIMN (Terminal Interface Monitor New) diagnostics.

TCPD - - Power distribution board. This board contains fuses, LED's and power distribution connectors and cables that distribute the 125 VDC to all the cores. Each fuse has an indicating green LED that when lit indicates the fuse is good. There are additionally two red LED's on the board that when lit indicate the fuse is bad. These are dedicated to specific outputs.

DTBA - - Termination for digital contact inputs #1-#46. It is recommended to bring field contacts back in pairs to the correct input terminals. There are series of berg jumpers on the DTBA that, when removed, will isolate sections of contact inputs to ease in trouble-shooting ground faults. The input voltage range is 24 VDC to 125 VDC. When using 24 VDC inputs an external power supply must be used. To do this, remove the power connector from the and connect 24 VDC to the card. Note: Solid state field contacts may still present a sufficient voltage in an “open” state to cause the Mark V to read the contact as “closed”.

TCPS - - DC input power supply board with signal conditioning. There is one card for each core (R, S, T, & C.) TCQA - - Analog I/O board. This board processes the analog input and output signals. The TCQA board contains an 80196 microprocessor. TCQB - - extended analog I/O board #1. This is used in conjunction with the TCQA board.

DTBB - - Termination for digital contact inputs #47-#96. It is recommended to bring field contacts back in pairs to the correct input terminals. There are series of berg jumpers on the DTBB that, when removed, will isolate sections of contact inputs to ease in trouble-shooting ground faults. The input voltage range is 24 VDC to 125 VDC. When using 24 VDC inputs an external power supply must be used. To do this, remove the power connector from the and connect 24 VDC to the card. Note: Solid state field contacts may still present a sufficient voltage in an “open” state to cause the Mark V to read the contact as “closed”.

TCQC - - extended analog that is used in conjunction with the TCQA and TCQB boards. TCRA - - Relay board. The TCRA board contains 30 plug in relays. Each relay has a contact rating of 0.5 amps. TCTG,L,S,E -
- (G) Gas turbine trip board. (L) (S) and (E) are steam turbine trip boards.

Termination boards CTBA - Termination for core. The termination signals are as follows: 1. Ma. input and Ma. output.

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DTBC - - Termination for relay and solenoid outputs. The relays outputs are divided as follows: Relay output #1-#15 are either dry contact or 125 VDC for solenoids (berg jumper selected), #16 and #17 are fused for solenoids such as 20CB or 20FD, #18 has a current limiting resistor for 20CF, and #19#30 are dry contacts.

5. LVDT excitation.

DTBD - - Termination for relay and solenoid outputs. The relays outputs are divided as follows: Relay outputs #31-#46 are either dry contact or 125 VDC for solenoids (berg jumper selected), #47 and #48 are AC contacts for ignition transformer power, #49-#60 are dry contacts.

TBCA - Termination for analog signals. The TCBA has 30 inputs for 3-wire RTD's.

******** CAUTION ******** DO NOT short these outputs to ground.

6. MW transducer. 7. Mounted on the TBQA board is a 9-pin RS232 connector for TIMN (Terminal Interface Monitor New) diagnostics.

TBCB - Termination for analog signals. There are 22 inputs for milliamp transducers and 14 inputs for 3-wire RTD's. TBQA - Termination for or thermocouple signals. The TBQA has 42 inputs for thermocouple termination’s and cold junction compensation. Figure 8 illustrates how the thermocouple to are terminated.

PTBA - Termination board for
core. The termination signals are as follows: 1. Overspeed magnetic pickups. 2. Flame detectors. ******** CAUTION ******** UV flame detector tube polarity must be observed.

TBQB - Termination for analog signals. The termination signals are as follows: 1. Pulse rate inputs 2. Compressor discharge transmitters (CPD) (mA or Voltage). 3. DC Voltage inputs (Fuel Gas Press.) 4. Vibration transducer (seismic).

3. Bus volts. 4. Generator volts and current. 5. Synchronizing. 6. Protective inputs. 7. Alarm horn enable and disable hardware jumper location.

TBQC - Termination for analog signals. The termination signals are as follows: 1. Milliamp input signals. 2. LVDT input signals. 3. Milliamp outputs

QTBA - Termination board for core. The termination signals are as follows: 1. HP and LP magnetic pickups for speed. 2. Flow divider magnetic pickups. 3. Water injection flow meters. 4. Servo valve outputs.

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1. Proximitors. 2. LVDT input signals. 3. Milliamp outputs.

TBQD - Termination for extended analog signals. The termination signals are as follows: All TC's Terminate in on TBQA Card Location 8

24

8

T B Q A 8

8

Figure 8 Speedtronic Mark V Thermocouple Terminations

connection is called the "Stage Link". The ARCNET communications rate is 2.5 Megabaud. The processor can communicate with up to 8 turbines (any combination of gas and steam). Figure 10 illustrates a typical connection. The last on each link must be terminated with a termination resistor.

Operator Interface Processor The processor is an IBM compatible (Texas Micro) computer that includes a special communication card used for ARCNET LAN communications. Additional support devices include a positioning device (mouse, track ball, touch screen) and a printer (dot matrix, laser jet, paint jet). Figure 9 illustrates a typical operator interface connection.

The processor contains all the software for turbine operation and control, screen displays and files for modification of the application software.

The processor is connected to the MK V panel using a RG62/U co-ax cable between the communication card (ARCNET card) and the CTBA card in core. This

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Primary Operator Interface

One of three printers: HP Deskjet HR Laserjet Dot Matrix

HEWLETT PACKARD

Vectra Office

Track Ball


Emergency Stop

SPEEDTRONIC MARK V PANEL

Figure 9 Speedtronic Mark V Operating Equipment Connections

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MARK V PANEL JAI 93 R HEWLETT PACKARD

Vectra Office

93 Termination Resistor

"T" Connector

JAJ

HEWLETT PACKARD

MARK V PANEL

Vectra Office

JAI

Processors Maximum of 6

JAJ HEWLETT PACKARD

Vectra Office

Additional Mark V Panels and/or 's

Figure 10 Typical Configuration

2. DENET (Data Exchange NETwork) connects to to to running at 2.5 Megabaud. 3. IONET (Input/Output NETwork) Connects the protective and digital I/O to running at 760 Kbaud. 4. BUNET (Back Up NETwork) connects the back up display to running at 9600 Baud.

Processor interconnection diagram

Figure 11 is a one-line diagram showing how the different cards and cores are interconnected. There are 4 different communication links connecting the cores together: 1. ARCNET (stage link) connects the to running at 2.5 Megabaud.

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g GE Power Systems T r a i n i n g A n d D e v el o p m e n t TO DCS (MODBUS LINK) LAP TOP COMPUTER TIMN (Troubleshooting Tool)

CONTROL PROCESSOR LCC

80186

80196

ANALOG I/O

EEPROM 80196

D P M

D P M DPM

TCCn

DCC(Drive Control Card)

LCC

A R C

RS232

80196

A R C

32010 DPM

STAGE LINK

A R C

RG 62/A-U COAX 2.5 MEGA BAUD 93 Termination Resistor

486 DX 32 BIT I/O ADDRESS BUS

DIGITAL I/O

(DUAL PORTED MEMORY)

DE NET

TCDn

(DATA EXCHANGE NETWORK) (2.5 MEGA BAUD)

I/O NET 760K BAUD

TCRn TCRn

80196

RS232

CONTROL PROCESSOR

TCQn


LCC 80186

80196 A R C

A R C

EEPROM 80196

D P M

D P M DPM

A R C

ANALOG I/O

80196

E T H

A R C

TO DCS

32010 DPM

TCEn

BUNET 9600 BAUD

I/O NET 760K BAUD

80196

RS232

80196 A R C

80186

ANALOG I/O

EEPROM 80196

D P M

D P M DPM

80196

TCQn


LCC

TCDn

Loc. 1

SYNC CHECK ONLY

CONTROL PROCESSOR

DIGITAL I/O

(ETHERNET LINK) RG 58 C/U Cable 10 Mega Baud 50 Termination Resistor

80196

TCT(L,S,G) A R C

32010 DPM

BUNET 9600 BAUD

DIGITAL I/O

80196

TCDn

Loc. 3

CONTROL PROCESSOR

RS232

80196

TCRn

ANALOG I/O

EEPROM

80186

D P M

D P M DPM

TCRn

80196

TCQn


LCC

A R C

TCEn

I/O NET 760K BAUD

80196

80196

A R C

32010 DPM

TCEn

BUNET 9600 BAUD

I/O NET 760K BAUD

80196 Loc. 5

RS422

DIGITAL I/O TCDn 80196 Rev 1.0

Figure 11 SPEEDTRONICTM Mark V Processor Interconnection Diagram

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functions are performed by the processor, with inputs to both and . Commands to start, stop, load, or unload the unit (turbine, auxiliaries, and driven devices) are issued to through using the primary operator interface. Unit operation can be monitored and process and diagnostic alarms can be monitored, silenced, acknowledged, and reset using the primary operator interface (), communicating with the SPEEDTRONICTM Mark V control panel through the core. Process alarms are alarms related to turbine, auxiliary, and driven device operation. Diagnostic alarms are SPEEDTRONICTM Mark V control panel related alarms such as; printed circuit board functionality, memory problems, inter-processor or internal communications problems. The primary operator interface is connected to the SPEEDTRONICTM Mark V control panel with a coaxial cable terminated in the core. An ARCNET style of LAN communications protocol is used for transmitting information. The physical connection between the operator interface and the Mark V panel is known as the stage link . The core is connected the controlling cores by another, separate ARCNET style of LAN communication network called the DENET - the Data Exchange NETwork. (Refer to figures 12 and 13) The physical connections of the DENET are made using unshielded, twisted pair wiring. Unit commands issued from the primary operator interface are communicated to over the stage link and then transmitted to the controlling cores through the DENET (Figure 12). Information, including process and diagnostic alarms, generated in the

TM

SPEEDTRONIC MARK V CONTROL PANEL HARDWARE The typical SPEEDTRONICTM Mark V control panel consists of a communicator core , control core(s) (, in a Simplex configuration), , ~~, & , in a TMR panel, a protective core~~
, a power distribution core , and Digital I/O cores and . Additional cores; , , and are added as needed. These additional cores allow extended digital I/O and Power Load Unbalance (Large Steam Applications.) The basic function of each core (the assembly containing printed circuit cards, fuses, etc.) in the SPEEDTRONICTM Mark V control panel is described as follows:

The Core The basic function of the core is to provide a means for communicating with the control cores and the operator interface processor. A second function of the core is to process and condition non-critical inputs and outputs (analog and digital) to the turbine control panel. (In some Simplex configurations, may process critical I/O). In a TMR control panel, all of the critical control and some protection sequencing is performed by the control cores , , & . Critical sequencing, protection, and I/O conditioning can best be defined as sequencing and I/O necessary for safe operation of the turbine, including over temperature control and protection, speed control, and lube oil system monitoring as a few examples. The loss of critical inputs should cause a turbine trip. In a Simplex configuration, control and protection

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controlling cores is transmitted to the operator through the core by way of the DENET and the stage link. is capable of executing control algorithms and relay ladder sequencing, although in a TMR application, no critical sequencing or protection should be performed by the control sequencing program in . The typical card arrangement for is shown in figure 15. The cards in location 1, the Drive Control Card (DCC) as well as the LAN Control Card (LCC), contain the 80186 microprocessor as well as 80196 microprocessors. These are used for executing the control sequence program as well as communications and data transfer respectively. The cards in location 2, and 3 are used for conditioning of the I/O terminated in the core. I/O, terminated

Stage Link

Primary Operator Interface

in is scaled using the constants from the IO Configuration program. These signals are then written into the control signal database, where they will be used for control, monitoring and/or logging of the unit operation. Location 5 of the core contains a power supply card. This card converts the 125VDC input into the necessary voltages required by the microprocessors, as well as the power supply voltages for the RTD inputs, the Milliamp outputs, etc. The cards in location 6, 7, 8, and 9 of the core are used for termination of noncritical I/O. The communication stage link is terminated on the CTBA card in location 6. Two BNC connectors are provided on the CTBA card for connections to operator interfaces, additional SPEEDTRONICTM Mark V control panels or a communications core.

DENET

SPEEDTRONIC MARK V CONTROL PANEL Figure 12 As the Bridge between the and the Control Processors

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LCC_

LCC_

DCC_

TCQC

TCQC

TCQC

LCC_

LCC_

LCC_

DCC_

DCC_

DCC_

----- DENET ___ CORE WIRING HARNESS

SPEEDTRONIC MARK V CONTROL PANEL

Figure 13.

DCC_

DENET (TMR Control Panel shown with optional Redundant Communications Processor)

LCC_ TCDA DCC_

TCCA

TCCB

NOT USED

TCPS

* Loc. 1

Loc. 2

Loc. 3

CTBA

TBCB

TBQA

Loc. 1 Loc. 4

Digital I/O Core

Loc. 5

TBCA

*

Loc. 6

Loc. 7

Loc. 8

Indicates Optional Card

Loc. 9

IONET

Figure 14 Core (Non-Critical I/O and Communications)

loss of flame. is one of three redundant control processors in a TMR panel. In a SIMPLEX configuration, is the only control processor. The control and protection functions are identical to those of

Control and Protection Core Critical control and protection sequencing are performed by the controlling processors , , and in a TMR panel. The exceptions are emergency overspeed, and

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the and cores. Inputs to the control cores are voted in software by way of the DENET. Outputs are hardware voted. The cards which comprise the core, for a TMR control panel, are shown in block diagram number 15. The cards in the core have a similar function as those in the core. Commands such as start, stop, or loading commands, are issued to (, , and collectively) through the core. The cards in location 1, the Drive Control Card (DCC) as well as the LAN Control Card (LCC), contain the 80186 microprocessor as well as 80196 microprocessors. These are used for executing the control sequence program as well as communications and data transfer respectively. The cards in location 2, 3, and 4 are used for conditioning of the I/O terminated in . I/O, terminated in is scaled using the constants from the IO Configuration program. These signals are then written into the control signal database, where they will be used for control, protection, monitoring and/or logging of the unit operation. The core communicates with (and with and in a TMR panel) over the DENET (figures 12 & 13). The DENET is in

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a TMR panel is formed by the three TCQC cards. Each TCQC card has two DENET connections, or ports, making a six-port passive bridge for the DENET. This design permits uninterrupted operation / communication of the DENET even if one of the control processors is powered down or rebooted while the unit is running. (Note that removing the TCQC card and connections will affect the DENET operation). Location 5 of the core contains a power supply card. This card converts the 125VDC input into the necessary voltages required by the microprocessors, as well as the power supply voltages for the Milliamp outputs, etc. The cards in location 6, 7, 8, and 9 of the core are used for termination of critical I/O. The QTBA in location 6 handles I/O from redundant devices such as actuator servo valve signals and speed pickup signals communicating to and from the core. The TBQB in location 7, the TBQA in loc. 8, and the TBQC in loc. 9 distribute analog I/O to and from all three control cores in a TMR panel. The terminal boards are connected to the three control cores by the use of ribbon cables.

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LCC_ TCDA

TCDA

Loc. 1

Loc. 1

Loc. 1

Protective Core

Digital I/O Core

Digital I/O Core *

TCEA DCC_

TCQA

TCQB

TCQC

TCPS

* Loc. 1

Loc. 2

Loc. 3

QTBA

TBQB

TBQA

Loc. 4

Loc. 5

TBQC

Indicates Optional Cards

*

IONET Loc. 6

Loc. 7

Loc. 8

Loc. 9

Figure 15 Core (Critical I/O) Shown for a TMR configuration with optional extended I/O

In a SIMPLEX configuration, the core must communicate via the IONET with all three protective processors in the
core,

processor for a Simplex control This panel utilizes the same I/O cards and terminal boards as in a TMR panel.

as well it’s TCDA card in location 1 of the core(s). This arrangement is shown in figure 16.

TCEA

TCEA

TCEA

Loc. 1

Loc. 3

~~Protective Core~~

~~Protective Core~~

Protective Core

TCDA

TCDA

Loc. 5

Loc. 1

Loc. 1

Protective Core

Digital I/O Core

Digital I/O Core *

*

Indicates Optional Cards

IONET

Core (Critical I/O for a Simplex panel) (Optional Extended Analog and Digital I/O - )

way of the DENET. Outputs are hardware voted. The cards which comprise the core, for a TMR control panel, are shown in block diagram number 17. The cards which comprise the core, for a TMR control panel, are shown in block diagram number 18. The cards in location 1, the Drive Control Card (DCC) as well as the LAN Control

& Control and Protection Cores & are two of three redundant control processors in a TMR panel. (A SIMPLEX does not include the or cores) The control and protection functions are identical to those of the core. Inputs to the control cores are voted in software by

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Card (LCC), contain the 80186 microprocessor as well as 80196 microprocessors. These are used for executing the control sequence program as well as communications and data transfer respectively. The cards in location 2, 3, and 4 are used for conditioning of the I/O terminated in . I/O, terminated in is scaled using the constants from the IO Configuration program. These signals are then written into the control signal database, where they will be used for control, protection, monitoring and/or logging of the unit operation. The & core communicates with and with over the DENET (figures 12 & 13). The DENET is in a TMR panel is formed by the three TCQC cards. Each TCQC card has two DENET connections, or ports, making a six-port passive bridge for the DENET. This design permits uninterrupted operation /communication of the DENET even if one of the control processors is powered down or rebooted while the unit is running. (Note that removing the TCQC card and connections will affect the DENET operation).

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Location 5 of the & cores contains a power supply card. This card converts the 125VDC input into the necessary voltages required by the microprocessors, as well as the power supply voltages for the Milliamp outputs, etc. The cards in location 6, 7, 8, and 9 of the core are used for termination of critical I/O. The QTBA in location 6 handles I/O from redundant devices such as actuator servo valve signals and speed pickup signals communicating to and from the core. The TBQB in location 7, the TBQA in loc. 8, and the TBQC in loc. 9 distribute analog I/O to and from all three control cores in a TMR panel. The terminal boards are connected to the three control cores by the use of ribbon cables. The card in location 6 of the core are used for termination of critical I/O. The QTBA in location 6 handles I/O from redundant devices such as actuator servo valve signals and speed pickup signals communicating to and from the core. The core does not have a location 7, 8, or 9.

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LCC_ TCEA DCC_

TCQA

TCQB

TCQC

QTBA

Loc. 2

Loc. 3

Loc. 4

Not Used *

Not Used *

Not Used *

TCDA

Loc. 3

Loc. 2

Loc. 2

Protective Core

Digital I/O Core

Digital I/O Core *

TCPS

* Loc. 1

TCDA

Loc. 5

* Indicates Optional Cards

IONET Loc. 6

Loc. 7

Loc. 8

Loc. 9

Figure 17 Core (Critical I/O for a TMR panel) (Optional Extended Analog and Digital I/O - )

LCC_ TCEA DCC_

TCQA

TCQB

TCQC

TCPS

* Loc. 1

Loc. 2

Loc. 3

Loc. 4

TCDA

TCDA

Loc. 5

Loc. 3

Loc. 3

Protective Core

Digital I/O Core

Digital I/O Core *

Loc. 5

QTBA

* Indicates Optional Cards

IONET Loc. 6

Figure 18 Core (Critical I/O for a TMR panel) (Optional Extended Analog and Digital I/O - )

protection is provided by connection of three magnetic speed pickups terminated on the PTBA card in location 6. This core also provides 335 VDC for excitation to the ultraviolet flame detectors for the loss of flame protection. Generator and bus potential transformer (PT) signals and current transformer (CT) signals are terminated on the PTBA card and then conditioned by the protective processors.

~~Protection Core The protective core,~~
, gets its name because it contains the three protective processors present in every SPEEDTRONICTM Mark V control panel TMR or SIMPLEX. The TCEA cards are referred to as protective processors. The protective processors perform several functions; overspeed protection, loss of flame, and unit synchronization. Overspeed

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These signals are used by the synchronization program in the
~~core. The emergency trip pushbuttons are also connected to this core. The cards which comprise the~~
core are shown in figure 19. The protective processors in a TMR control panel each communicate with their respective control processors via the individual IONET’s. ’s protective processor (TCEA card) is in location 1 and is called the processor, ’s protective processor (TCEA card) is in location 3 and is called the processor, and ’s protective processor (TCEA card) is in location 5 and is called the processor. In a SIMPLEX control panel, communicates with all three of the protective processors.

energize the unit’s trip solenoid(s), used to trip the unit in an emergency situation. The trip card, in location 4, will differ depending on the application. A SPEEDTRONICTM Mark V being used to control a heavy-duty or aero-derivative gas turbine will be supplied with a TCTG card. (Where the fourth character in the card name indicates the turbine type) A TCTL card will be supplied for a large steam application, and a TCTS for medium and small steam applications. A TCTE card may be used for some medium and large steam applications. Different cards are required for different applications because of the tripping schemes incorporated with the various types of turbines. This arrangement allows for the SPEEDTRONICTM Mark V to be used on a large variety of turbines. The TCEB card in location 2 is an “expander” card used to condition PT and CT signals. This card also contains the audible alarm horn among other functions.

Trip Card - TCTn The
core also houses the trip card which receives signals from either or the protective processors to energize or de-

TCEA

TCEB

TCEA

TCT_

TCEA

Loc. 1

Loc. 2

Loc. 3

Loc. 4

Loc. 5

PTBA

Loc. 6

Figure 19
Protective Core

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SPEEDTRONICTM Mark V control panel, is provided when additional I/O capacity is required for unit control and protection. In a TMR control panel, two energize signals must be received by the TCDA cards in order to energize a relay coil. In this manner, contact output signals (either relay output or solenoid output) are hardware voted. The digital terminal boards in location 6 through 9 are labeled DTBA through DTBD, the DTBA and DTBB are used for termination of the contact inputs, the DTBC and DTBD are for the relay and solenoid outputs. Note: Solid state field contacts may still present a sufficient voltage in an “open” state to cause the Mark V to read the contact as “closed”. The high impedance inputs in or may not be enough of a drain to drop the solid state “field contact” to a zero state. This may be overcome by adding a low resistance in parallel to the “field contact” device.

’s Digital I/O Core The digital I/O for the core are located in the core(s). All digital inputs, also known as contact inputs, are terminated and conditioned in this core. The inputs are conditioned on the TCDA cards in location 1, 2, and 3 of the QD core(s), according to the setup in the IO configuration program. (i.e. The input sense may be inverted so that a closed field contact that inputs a high voltage will generate a zero logic into the control signal database) This core also contains the relay outputs, or contact outputs, for the core. Location 4 and 5 contain the TCRA cards each containing 30 relays. Many of these relays may be configured for solenoid outputs, and all can be used as dry or isolated contacts. Communications between the cores and the core is by way of the IONET (refer to the previous core descriptions). The lower case “n” in the mnemonic signifies a number, in this case either 1 or 2. is always shipped with the

TCDA

TCDA

TCDA

TCRA

TCRA

Loc. 1

Loc. 2

Loc. 3

Loc. 4

Loc. 5

DTBA

DTBB

DTBC

DTBD

Loc. 6

Loc. 7

Loc. 8

Loc. 9

Figure 20 Digital I/O Core

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database) This core also contains the relay outputs, or contact outputs, for the core. Location 4 and 5 contain the TCRA cards each containing 30 relays. Many of these relays may be configured for solenoid outputs, and all can be used as dry or isolated contacts. Communications between the core and the core, as shown in figure 14, is by way of the IONET. Terminal boards are exactly the same as the core.

’s Digital I/O Core The digital I/O for the core are located in the core. All digital inputs, also known as contact inputs, are terminated and conditioned in this core. The inputs are conditioned on the TCDA card in location 1 of the CD core, according to the setup in the IO configuration program. (i.e. The input sense may be inverted so that a closed field contact that inputs a high voltage will generate a zero logic into the control signal

TCDA

Not Used

Not Used

TCRA

TCRA

Loc. 1

Loc. 2

Loc. 3

Loc. 4

Loc. 5

DTBA

DTBB

DTBC

DTBD

Loc. 6

Loc. 7

Loc. 8

Loc. 9

Figure 21 Digital I/O Core

power down, or a failure in the core that results in a loss of communications, the core will provide the operator with a redundant path with which to send commands or monitor the unit operation. The core is NOT a redundant , as the core is unable to take over the ’s I/O functions in the event that there is a loss of the core. The core uses the DENET (figure 13) for communications between the and cores.

Backup Communications Core As an option, an additional core may be installed to provide a redundant path for the stage link communication between the operator interface(s) and the SPEEDTRONICTM Mark V control panel. This core, known as the core, can be connected to the or ’s (Operator Interface) with a redundant stage link connection. In the event that a failure occurs in the core, requiring the core to be

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Collectively, the and the are referred to as the . If provided, the core is usually located on the lower left side of the back panel. On some units this space is occupied by the core, in which case the and/or AC power transformers will be located in a separate auxiliary panel. The processor is downloaded with the same information as the , even though it performs no I/O functions.

The is located on the right door of the SPEEDTRONICTM Mark V control panel. The can be configured to send most command to the turbine such as stopping or changing load settings. The is connected directly to via the backup operator interface network, the BUNET. Figure 22 shows the communications layout of the . The cannot be used to start a turbine in the event that the is not functioning. All processors are required to be functioning normally in order to start the turbine. The can be used during operation, to send commands or monitor operation of the unit in the event that the or fails.

Back Up Operator Interface An LCD display with a keypad is provided as a backup means of sending commands and monitoring the operation of the turbine.

TCQC

TCQC

TCQC

TCQC

SIMPLEX BUNET

TMR BUNET LCC

LCC

LCC

LCC

Figure 22 Communications Layout for a TMR and SIMPLEX Configuration

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