1
2
3
4
5
6
7
8
AX2/7 SYSTEM DIAGRAM
01
DDR3 channel A
DDR3-SODIMM1
CPU THERMAL SENSOR
AMD Champlain
PAGE 6
35mm X 35mm
A
S1G4 Processor
DDR3 channel B
DDR3-SODIMM2
A
PAGE 5
638P (PGA)35W/25W PAGE 3,4,5
PAGE 7
HT3 PCI-Express 16X
PCI-E X1
NORTH BRIDGE
X1 Mini PCI-E Card
LAN Realtek PCIE-LAN RTL8103E
(Wireless LAN)
(10/100)
LVDS PAGE 23
21mm X 21mm, 528pin BGA Side port
PAGE 33
DDR3 RAM for UMA only
0,5,8
SATA0 150MB
SATA - HDD
PAGE 34
2
BT softbreeze PAGE 29
3
Webcam X1 PAGE 23
10
Flash Media RTS5159
SB820 A12
SATA4 150MB
SATA - CD-ROM
PCI-E WLAN Card x1 PAGE 33
PAGE 26
21mm X 21mm, 605pin FCBGA
PAGE 29
4.5W(Ext)
Azalia
4.3W(Int)
PAGE 37
C
VRAM PAGE 22
15
USB2.0 Ports PAGE 29 X3
SOUTH BRIDGE
PAGE 29
DDR II SMDDR_VTERM 1.8V/1.8VSUS(RT8207)
PAGE 17,18,19 20,21
USB2.0
SYSTEM CHARGER(ISL6251)
SYSTEM POWER ISL6237
B
PAGE 8
ALINK X4
PAGE 30 PAGE 40
23mm X 23mm DDR3
PAGE 8,9,10,11 RJ45
ATI PARK-LP
CRT PAGE 24
RS880M A12
B
PAGE 30
HDMI PAGE 25
C
PAGE 12,13,14,15,16
VCCP +1.1V AND +1.2V(RT8204)
PAGE 35
Realtek ALC270-GR
MDC CONN LPC
PAGE 28
VGACORE(1.1V~1.2V)Oz8118
PAGE 27
PAGE 38
ENE KBC CPU CORE ISL6265HRTZ-T
RJ11 Ang MIC
KB3926 Dx
PAGE 36
PAGE 32
PAGE 27
AUDIO CONN (Phone/ MIC)
PAGE 28
SMBUS TABLE SB--SCL0/SD0
Clock gen/Robson/TV tuner /DDR2/DDR2 thermal/Accelerometer
+3V
D
Keyboard Touch Pad
epress card
PAGE 31 PAGE 31
FAN PAGE 28
Wlan Card
+3VS5
EC --SCL/SD
Battery charge/discharge
+3VPCU
EC--SCL2/SD2
VGA thermal/system thermal
+3V
SPI
D
PAGE 31
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2
1
2
3
4
http://laptop-schematic.com/ 5
6
Document Number
Date: Thursday, December 24, 2009 7
Rev 1A
Block Diagram Sheet
1 8
of
42
5
4
3
2
1
02 D
D
PV,delete all external clock GEN reserve material
C
C
B
B
A
A
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2 5
4
http://laptop-schematic.com/ 3
2
Document Number
Rev 1A
Clock Generator
Date: Wednesday, December 23, 2009 Sheet 1
2
of
42
5
4
3
BLM21PG221SN1D(220,100M,2A)_8
R164
*0_6/S
R83
*0_6/S
CPU CLK
C418 LS0805-100M-N 4.7U/6.3V_6
C392 4.7U/6.3V_6
C302 C304 0.22U/25V_6 3300P/50V_4
12 12
+CPUVDDA
U21A
D
10U/6.3V_8 0.22U/6.3V_4 180P/50V_4
HT_NB_CPU_CAD_H[15..0]
8 HT_NB_CPU_CAD_H[15..0]
HT_NB_CPU_CAD_L[15..0]
8 HT_NB_CPU_CAD_L[15..0]
HT_NB_CPU_CLK_H[1..0]
8 HT_NB_CPU_CLK_H[1..0]
HT_NB_CPU_CLK_L[1..0]
8 HT_NB_CPU_CLK_L[1..0]
HT_NB_CPU_CTL_H[1..0]
8 HT_NB_CPU_CTL_H[1..0]
HT_NB_CPU_CTL_L[1..0]
8 HT_NB_CPU_CTL_L[1..0]
HT_CPU_NB_CAD_H[15..0]
8 HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_L[15..0]
8 HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CLK_H[1..0]
8 HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CLK_L[1..0]
8 HT_CPU_NB_CLK_L[1..0]
HT_CPU_NB_CTL_H[1..0]
8 HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CTL_L[1..0]
8 HT_CPU_NB_CTL_L[1..0]
+1.1V_VLDT +1.1V_VLDT +1.1V_VLDT +1.1V_VLDT
D1 D2 D3 D4
HT_NB_CPU_CAD_H0 HT_NB_CPU_CAD_L0 HT_NB_CPU_CAD_H1 HT_NB_CPU_CAD_L1 HT_NB_CPU_CAD_H2 HT_NB_CPU_CAD_L2 HT_NB_CPU_CAD_H3 HT_NB_CPU_CAD_L3 HT_NB_CPU_CAD_H4 HT_NB_CPU_CAD_L4 HT_NB_CPU_CAD_H5 HT_NB_CPU_CAD_L5 HT_NB_CPU_CAD_H6 HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H7 HT_NB_CPU_CAD_L7 HT_NB_CPU_CAD_H8 HT_NB_CPU_CAD_L8 HT_NB_CPU_CAD_H9 HT_NB_CPU_CAD_L9 HT_NB_CPU_CAD_H10 HT_NB_CPU_CAD_L10 HT_NB_CPU_CAD_H11 HT_NB_CPU_CAD_L11 HT_NB_CPU_CAD_H12 HT_NB_CPU_CAD_L12 HT_NB_CPU_CAD_H13 HT_NB_CPU_CAD_L13 HT_NB_CPU_CAD_H14 HT_NB_CPU_CAD_L14 HT_NB_CPU_CAD_H15 HT_NB_CPU_CAD_L15
E3 E2 E1 F1 G3 G2 G1 H1 J1 K1 L3 L2 L1 M1 N3 N2 E5 F5 F3 F4 G5 H5 H3 H4 K3 K4 L5 M5 M3 M4 N5 P5
HT_NB_CPU_CLK_H0 HT_NB_CPU_CLK_L0 HT_NB_CPU_CLK_H1 HT_NB_CPU_CLK_L1
J3 J2 J5 K5
HT_NB_CPU_CTL_H0 HT_NB_CPU_CTL_L0 HT_NB_CPU_CTL_H1 HT_NB_CPU_CTL_L1
N1 P1 P3 P4
FOX PZ63826-284R-41F DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) MLX 47296-4131 DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2) TYC 4-1903401-2 DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)
VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3
HT LINK
L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15
VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3
L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15
L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1
L0_CLKOUT_H0 L0_CLKOUT_L0 L0_CLKOUT_H1 L0_CLKOUT_L1
L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1
L0_CTLOUT_H0 L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1
AE2 AE3 AE4 AE5
+1.1V_VLDT_R +1.1V_VLDT_R +1.1V_VLDT_R +1.1V_VLDT_R
AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3
HT_CPU_NB_CAD_H0 HT_CPU_NB_CAD_L0 HT_CPU_NB_CAD_H1 HT_CPU_NB_CAD_L1 HT_CPU_NB_CAD_H2 HT_CPU_NB_CAD_L2 HT_CPU_NB_CAD_H3 HT_CPU_NB_CAD_L3 HT_CPU_NB_CAD_H4 HT_CPU_NB_CAD_L4 HT_CPU_NB_CAD_H5 HT_CPU_NB_CAD_L5 HT_CPU_NB_CAD_H6 HT_CPU_NB_CAD_L6 HT_CPU_NB_CAD_H7 HT_CPU_NB_CAD_L7 HT_CPU_NB_CAD_H8 HT_CPU_NB_CAD_L8 HT_CPU_NB_CAD_H9 HT_CPU_NB_CAD_L9 HT_CPU_NB_CAD_H10 HT_CPU_NB_CAD_L10 HT_CPU_NB_CAD_H11 HT_CPU_NB_CAD_L11 HT_CPU_NB_CAD_H12 HT_CPU_NB_CAD_L12 HT_CPU_NB_CAD_H13 HT_CPU_NB_CAD_L13 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H15 HT_CPU_NB_CAD_L15
Y1 W1 Y4 Y3
HT_CPU_NB_CLK_H0 HT_CPU_NB_CLK_L0 HT_CPU_NB_CLK_H1 HT_CPU_NB_CLK_L1
R2 R3 T5 R5
HT_CPU_NB_CTL_H0 HT_CPU_NB_CTL_L0 HT_CPU_NB_CTL_H1 HT_CPU_NB_CTL_L1
10U/6.3V_8 0.22U/6.3V_4 180P/50V_4 10U/6.3V_8
CPUCLKIN
C99 C113 C120 C594
R149
CPUCLKP CPUCLKN
CPUCLKIN#
169/F_4
C402 C401
+1.5VSUS
VDDA1 VDDA2
CPUCLKIN CPUCLKIN#
A9 A8
CLKIN_H CLKIN_L
5 5 5
CPU_SIC CPU_SID CPU_ALERT
CPU_SIC CPU_SID CPU_ALERT R114 R115
+1.1V_VLDT
CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI
CPUTEST25H CPUTEST25L
T7 T26 T30
+1.5VSUS
R172
300/F_4
CPU_DBREQ#
R338
1K/F_4
CPUTEST27
R339
10K/F_4
W9 Y9
Y6 AB6
VDD1_FB_H VDD1_FB_L
VDDNB_FB_H VDDNB_FB_L
H6 G6
AD7
CPUTEST18 CPUTEST19
H10 G9
DBREQ_L TDO
TEST23
TEST28_H TEST28_L
TEST18 TEST19 TEST25_H TEST25_L TEST21 TEST20 TEST24 TEST22 TEST12 TEST27
C2 AA6
TEST9 TEST6
A3 A5 B3 B5 C1
RSVD1 RSVD2 RSVD3 RSVD4 RSVD5
+1.5VSUS
300_4
32 CPU_PROCHOT#
1
R219
0_4
+1.5VSUS
R181
+1.5VSUS
R180
5 CPU_THERMTRIP_L#
0_4
2
R205
R170 *1K/F_4 CPU_SVC_R CPU_SVD_R CPU_PWRGD
C3 K8 C4
CPUTEST17 CPUTEST16 CPUTEST15 CPUTEST14 R156
C
T37 T38 T29 T49 +1.1V_VLDT
*300/F_4
CPUTEST29H
T46 R130
C9 C8
80.6/F_4 CPUTEST29L H18 H19 AA7 D5 C5
T45
Route as 80ohm, diff
R189 R190
R176 R175 R177
1K/F_4 1K/F_4
+1.5VSUS +1.5V
CPU_SVC CPU_SVD CPU_PWRGD_SVID_REG
0_4 0_4 0_4
CPU_SVC 36 CPU_SVD 36 CPU_PWRGD_SVID_REG
SVC
SVD
0 0 1 1
0 1 0 1
VID Override table (VDD) B
Output Voltage
1.1V 1.0V 0.9V 0.8V
36
*220_4 *220_4 *220_4
CPUTEST20 CPUTEST21 CPUTEST22 CPUTEST24
R340 R81 R80 R69
1K/F_4 1K/F_4 1K/F_4 1K/F_4
CPUTEST12 CPUTEST19 CPUTEST18
R70 R124 R125
1K/F_4 1K/F_4 1K/F_4
HDT Connector
10K/F_4
1
1K/F_4
CPU_THERMTRIP_L#
1
Q18 MMBT3904 3
CPU_THERMTRIP# 13
CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO
Q22
CPU_PROCHOT_R# 3 MMBT3904
CPU_PROCHOT_R#
12
C74
*0.1U/10V_4
1 3 5 7 9 11 13 15 17 19 21 23 KEY
2 4 6 8 10 12 14 16 18 20 22 24 25
A
PROJECT : AX2/7 Quanta Computer Inc.
CPU_LDT_RST_HTPA# Size Custom
CN6 *HDT CONN
NB5/RD2
Document Number
4
3
http://laptop-schematic.com/ 2
Rev 1A
S1G4 HT,CTL I/F 1/3
Date: Thursday, December 24, 2009
5
36 36
J7 H8
VFIX MODE
R171 *1K/F_4
SI , add R205 for P-state implement
EC new option
VDDIO_FB_H 37 VDDIO_FB_L 37
+1.5VSUS
A
CPU_PROCHOT_L#
CPU_TDO
TEST7 TEST10
RSVD10 RSVD9 RSVD8 RSVD7 RSVD6
+1.5V R186 1K/F_4
Q19 MMBT3904 CPU_LDT_RST_HTPA# 3
2
10K/F_4
R225
CPU_DBREQ#
AE9
D7 E7 F7 C7
TEST29_H TEST29_L
T15
CPU_VDDNB_RUN_FB_H CPU_VDDNB_RUN_FB_L
E10
TEST17 TEST16 TEST15 TEST14
TEST8
+3V
CNTR_VREF
2 R224
VDDIO_FB_H VDDIO_FB_L
VDDIO_FB_H VDDIO_FB_L
Serial VID
R184 R183 R185
+1.5VSUS
H_THRMDC H_THRMDA
VDD0_FB_H VDD0_FB_L
+1.5VSUS
CPU_LDT_RST#
THERMDC THERMDA
W7 W8
SOCKET_638_PIN
MV can remove reserve for debug R207
CPU_THERMTRIP_L# CPU_PROCHOT_L# CPU_MEMHOT_L#
F6 E6
SOCKET_638_PIN
B
+1.5VSUS
AF6 AC7 AA8
HT_REF0 HT_REF1
CPUTEST23
*300/F_4
CPU_SVC_R CPU_SVD_R
THERMTRIP_L PROCHOT_L MEMHOT_L
DBRDY TMS TCK TRST_L TDI
D
A6 A4
SVC SVD
R6 P6
G10 AA9 AC9 AD9 AF9
*0_4/S
M11 W18
SIC SID ALERT_L
CPUTEST25H E9 CPUTEST25L E8 place them to CPU within 1.5" CPUTEST21 AB8 CPUTEST20 AF7 T127 CPUTEST24 AE7 CPUTEST22 AE8 T8 CPUTEST12 AC8 T6 CPUTEST27 AF8 R157
VSS RSVD11
AF4 AF5 AE6
R162 510/F_4
+1.5V
RESET_L PWROK LDTSTOP_L LDTREQ_L
44.2/F_4 CPU_HTREF0 CPU_HTREF1 44.2/F_4 place them to CPU within 1.5"
36 CPU_VDD1_RUN_FB_H 36 CPU_VDD1_RUN_FB_L
510/F_4
R146 R148 R166 R144
B7 A7 F10 C6
36 CPU_VDD0_RUN_FB_H 36 CPU_VDD0_RUN_FB_L
R163
300_4 300_4 300_4 *300/F_4
U21D F8 F9
CPU_LDT_RST# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_REQ#_CPU
12 CPU_LDT_RST# 12 CPU_PWRGD 10,12 CPU_LDT_STOP#
SideBand Temp sense I2C
250mA
W/S= 15 mil/20mil +CPUVDDA +CPUVDDA
3900P/25V_4 3900P/25V_4
03
H_THRMDC 5 H_THRMDA 5
CPU_PWRGD CPU_LDT_RST# CPU_LDT_STOP# CPU_LDT_REQ#_CPU
CPUCLKP CPUCLKN
CPUCLKP CPUCLKN
Keep trace from resisor to CPU within 0.6" keep trace from caps to CPU within 1.2"
+1.1V_VLDT_R
C396 C390 C389
1
H_THRMDC H_THRMDA
L34
+1.1V_VLDT
+1.1V
C
+CPUVDDA
+2.5V
VLDT use 1.5A Max current +1.1V
2
W/S= 15 mil/20mil
1
Sheet
3
of
42
A
B
C
+1.5VSUS +0.9V
R337
4
C593 10U/6.3V_8
39.2/F_4 M_ZP 39.2/F_4 M_ZN
AF10 AE10
PV,change to short pad 6 MEM_MA0_CS#0
MA_RESET_L
T19 T17
T19 V22 U21 V19
MA0_ODT0 MA0_ODT1 MA1_ODT0 MA1_ODT1
T18 T16
T20 U19 U20 V20
MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1
J22 J20
MA_CKE0 MA_CKE1
6 MEM_MA0_ODT0 6 MEM_MA0_ODT1
6 MEM_MA0_CS#1
6 MEM_MA_CKE0 6 MEM_MA_CKE1
N19 N20 E16 F16 Y16 AA16 P19 P20
6 MEM_MA_CLK5_P 6 MEM_MA_CLK5_N T39 T34 T13 T14 6 MEM_MA_CLK4_P 6 MEM_MA_CLK4_N 6 MEM_MA_ADD[0..15]
VDDR1 MEM:CMD/CTRL/CLKVDDR5 VDDR2 VDDR6 VDDR3 VDDR7 VDDR4 VDDR8 VDDR9 MEMZP MEMZN VDDR_SENSE
MEM_MA_RESET# H16
6 MEM_MA_RESET#
VDDR = 0.9V for 25W & 35W CPU VDDR = 1.05V for 35V & 45W CPU
D10 C10 B10 AD10
*0_4/S R344 R342
+0.9V
U21B
PLACE THEM CLOSE TO CPU WITHIN 1"
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEMVREF MB_RESET_L
MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4
CPU_VTT_SENSE
B18 MEM_MB_RESET#
MB0_ODT0 MB0_ODT1 MB1_ODT0
W 26 W 23 Y26
T132
MB0_CS_L0 MB0_CS_L1 MB1_CS_L0
V26 W 25 U22
T20
MB_CKE0 MB_CKE1
J25 H26 P22 R22 A17 A18 AF18 AF17 R26 R25
R113 *0_4 CPU_VTT_SENSE 37
6,7,37
Reserved
MEM_MB_RESET# 7 MEM_MB0_ODT0 7 MEM_MB0_ODT1 7
C181 0.1U/10V_4
C175 1000P/50V_4
MEM_MB0_CS#0 7 MEM_MB0_CS#1 7 MEM_MB_CKE0 7 MEM_MB_CKE1 7
SI , change from 0.01u to 0.1u from AMD recommand
MEM_MB_CLK5_P 7 MEM_MB_CLK5_N 7 T142 T141 T128 T129
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB_CLK4_P 7 MEM_MB_CLK4_N 7 MEM_MB_ADD[0..15]
N21 M20 N22 M19 M22 L20 M24 L21 L19 K22 R21 L22 K20 V24 K24 K19
MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15
MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15
P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W 24 J23 J24
6 MEM_MA_BANK0 6 MEM_MA_BANK1 6 MEM_MA_BANK2
R20 R23 J21
MA_BANK0 MA_BANK1 MA_BANK2
MB_BANK0 MB_BANK1 MB_BANK2
R24 U26 J26
MEM_MB_BANK0 7 MEM_MB_BANK1 7 MEM_MB_BANK2 7
6 MEM_MA_RAS# 6 MEM_MA_CAS# 6 MEM_MA_WE#
R19 T22 T24
MA_RAS_L MA_CAS_L MA_W E_L
MB_RAS_L MB_CAS_L MB_W E_L
U25 U24 U23
MEM_MB_RAS# 7 MEM_MB_CAS# 7 MEM_MB_WE# 7
3
7
SOCKET_638_PIN
Place close to socket
+0.9V
C95 4.7U/6.3V_6
2
C94 4.7U/6.3V_6
C420 4.7U/6.3V_6
C419 4.7U/6.3V_6
C91 0.22U/6.3V_4
C400 1000P/50V_4
C397 1000P/50V_4
C90 0.22U/6.3V_4
C411 0.22U/6.3V_4
C407 0.22U/6.3V_4
7 MEM_MB_DM[0..7]
+0.9V
C98 C96 1000P/50V_4 1000P/50V_4
C105 180P/50V_4
C104 180P/50V_4
C393 180P/50V_4
7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7
C93 180P/50V_4
+1.5VSUS
R211
0_4
+3VPCU
Reserved for AMD suggest
C435
R229
04
U21C DDR_VTTREF
W 17 MEMVREF_CPU
MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4
E
Processor Memory Interface
7 MEM_MB_DATA[0..63]
W 10 AC10 AB10 AA10 A10 Y10
D
MEM_MB_DQS0_P MEM_MB_DQS0_N MEM_MB_DQS1_P MEM_MB_DQS1_N MEM_MB_DQS2_P MEM_MB_DQS2_N MEM_MB_DQS3_P MEM_MB_DQS3_N MEM_MB_DQS4_P MEM_MB_DQS4_N MEM_MB_DQS5_P MEM_MB_DQS5_N MEM_MB_DQS6_P MEM_MB_DQS6_N MEM_MB_DQS7_P MEM_MB_DQS7_N
MEM:DATA MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63
C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
A12 B16 A22 E25 AB26 AE22 AC16 AD12
MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7
C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12
MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W 22 W 21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W 16 W 14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W 11 AB14 AA14 AB12 AA12
MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7
E12 C15 E19 F24 AC24 Y19 AB16 Y13
MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7
G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W 15 W 12 W 13
MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
MEM_MA_DATA[0..63]
6
4
3
MEM_MA_DM[0..7]
6 2
MEM_MA_DQS0_P MEM_MA_DQS0_N MEM_MA_DQS1_P MEM_MA_DQS1_N MEM_MA_DQS2_P MEM_MA_DQS2_N MEM_MA_DQS3_P MEM_MA_DQS3_N MEM_MA_DQS4_P MEM_MA_DQS4_N MEM_MA_DQS5_P MEM_MA_DQS5_N MEM_MA_DQS6_P MEM_MA_DQS6_N MEM_MA_DQS7_P MEM_MA_DQS7_N
6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6
5
1K/F_4
3
+
4
-
R222
C439
1K/F_4
*0.47u/6.3V_4
SOCKET_638_PIN
*.1U/10V_4
1
R200 1
*10_4 2
MEMVREF_CPU
1
*OPA343NA/3K
2
1
U14
R220
PROJECT : AX2/7 Quanta Computer Inc.
*10K/F_4 R193
*0_4
R204
*0_4 Size Custom NB5/RD2
A
B
http://laptop-schematic.com/ C
D
Document Number
Rev 1A
S1G4 DDRII MEMORY I/F 2/3
Date: Thursday, December 24, 2009 E
Sheet
4
of
42
5
4
3
2
1
05
U21F U21E
+VCORE
D
+CPUVDDNB
+1.5VSUS
VDD0_1 VDD0_2 VDD0_3 VDD0_4 VDD0_5 VDD0_6 VDD0_7 VDD0_8 VDD0_9 VDD0_10 VDD0_11 VDD0_12 VDD0_13 VDD0_14 VDD0_15 VDD0_16 VDD0_17 VDD0_18 VDD0_19 VDD0_20 VDD0_21 VDD0_22 VDD0_23
K16 M16 P16 T16 V16
VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5
H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17
VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12
2A
C
+VCORE
G4 H2 J9 J11 J13 J15 K6 K10 K12 K14 L4 L7 L9 L11 L13 L15 M2 M6 M8 M10 N7 N9 N11
4A
AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4
VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8 VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26
P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2
VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13
Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18
+1.5VSUS
SOCKET_638_PIN +1.5VSUS
R228 2K/F_4
D19
3
B
R187 1K/F_4
R178 1K/F_4
CPU_SIC 3
Q21 MMBT3904 1
1 RB501V-40
VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129
J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6
+VCORE
BOTTOM SIDE DECOUPLING
C180 22U/6.3V_8
C216 22U/6.3V_8
C230 22U/6.3V_8
C247 22U/6.3V_8
C256 0.22U/6.3V_4
C255 0.01U/16V_4
C254 180P/50V_4 D
+VCORE
C242 22U/6.3V_8
C250 22U/6.3V_8
C228 22U/6.3V_8
+CPUVDDNB
C215 22U/6.3V_8
C177 0.22U/6.3V_4
C178 C176 0.01U/16V_4 180P/50V_4
+1.5VSUS
C223 22U/6.3V_8
C212 22U/6.3V_8
C235 22U/6.3V_8
C214 22U/6.3V_8
C227 22U/6.3V_8
C238 C257 0.22U/6.3V_4 0.22U/6.3V_4
C258 180P/50V_4
C
DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE +1.5VSUS
C115 4.7U/6.3V_6
C126 4.7U/6.3V_6
C291 4.7U/6.3V_6
C288 4.7U/6.3V_6
C119 0.22U/6.3V_4
C123 0.22U/6.3V_4
+1.5VSUS
C135 C133 C188 C172 0.22U/6.3V_4 0.22U/6.3V_4 0.01U/16V_4 0.1U/10V_4
C287 180P/50V_4
C284 180P/50V_4
C189 0.1U/10V_4
SOCKET_638_PIN CPU_SID
CPU_SID 3 B
2
2
2
MBDATA
MBDATA
R214 1K/F_4
CPU_SIC
1
1 RB501V-40 32,40
R173 2K/F_4
2
Q23 MMBT3904 MBCLK 3
MBCLK
R198 2K/F_4
2
SI , change SMB connection
32,40
+1.5VSUS
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65
D16
SMBALERT#
Q17 *MMBT3904 CPU_ALERT 1
3
PROCESSOR POWER AND GROUND
CPU_ALERT 3
SI , add Q21,Q23,D16,D19 +3V
+3V +1.5V_VGA
R405 R212
*0_4
SYS_SHDN#
SYS_SHDN#
200/F_6
10K/F_4
10K/F_4
MBDATA2
VCC
7
SDA
DXP
2
6
ALERT#
DXN
3
OVERT#
GND
5
4
13 PM_THERM#
H_THRMDA 3 C695 1000P/50V_4
R203
H_THRMDC
0.01U/16V_4
EC8
0.01U/16V_4
+VIN
EC7
0.01U/16V_4
+5V
EC1
*0.01U/16V_4
3
+VGA_CORE
+3V
EC15
EC6
0.1U/10V_4
*0.1U/10V_4
+3V
+VGA_CORE
+3V
*CH500H
*0_4/S
3920_RST#
+3V +1.5V_VGA +3V
3920_RST# 32 +1.5VSUS
EC9
0.01U/16V_4
+3V
EC11
0.01U/16V_4
+1.1V
D18
MMBT3904 2
2
ECPWROK
1
ECPWROK 16,32
+VGA_CORE
EC2
*0.01U/16V_4
R218
+1.8V_VGA
For fix HyperTransport nets across plane splits
CH501H-40PT
SMBALERT#
G786P8
+3V
Q20
MSOP
PV ,Change from +1.5VSUS to +1.5V for leakage current issue
10K/F_4
A
+3V
3
+VIN R428
+1.5V
10K/F_4
R174
SI , add Q33,R428 2 CPU_THERMTRIP_L#
3 CPU_THERMTRIP_L#
1
PQ18 Q33 MMBT3904 3
*10K/F_4
2
*2N7002E-G
ADD VGA TEMP_ FAIL function M92 is active Hi
SMBALERT#
PROJECT : AX2/7 Quanta Computer Inc.
EC13
PV,add for EMI suggest
TEMP_FAIL 18 0.1U/10V_4
Size Custom
1
A
SCLK
1
1
18,32
8
MBCLK2
D17
C693 0.1U/10V_4
U25 18,32
0.01U/16V_4
1
10K/F_4
2
R416
3
R423
EC10 EC12
+1.8V_VGA
reserve for power shutdown ( if can )
R424
34
NB5/RD2
Document Number
Date: Thursday, December 24, 2009
5
4
3
http://laptop-schematic.com/ 2
Rev 1A
S1G4 PWR & GND 3/3 1
Sheet
5
of
42
5
4
3
2
1
06
+1.5VSUS
MEM_MA_DATA[0..63] 4
4 MEM_MA_BANK[0..2]
4 4 4 4 4 4 4 4 4 4 4
MEM_MA0_CS#0 MEM_MA0_CS#1 MEM_MA_CLK5_P MEM_MA_CLK5_N MEM_MA_CLK4_P MEM_MA_CLK4_N MEM_MA_CKE0 MEM_MA_CKE1 MEM_MA_CAS# MEM_MA_RAS# MEM_MA_WE#
7,13,33 PCLK_SMB 7,13,33 PDAT_SMB
C
MEM_MA_BANK0 109 MEM_MA_BANK1 108 MEM_MA_BANK2 79 114 121 101 103 102 104 73 74 115 110 113 197 201 PCLK_SMB 202 PDAT_SMB 200
BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA
116 120
ODT0 ODT1
11 28 46 63 136 153 170 187
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
4 MEM_MA0_ODT0 4 MEM_MA0_ODT1 MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
4 MEM_MA_DM[0..7]
4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4
B
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15
MEM_MA_DQS0_P MEM_MA_DQS1_P MEM_MA_DQS2_P MEM_MA_DQS3_P MEM_MA_DQS4_P MEM_MA_DQS5_P MEM_MA_DQS6_P MEM_MA_DQS7_P MEM_MA_DQS0_N MEM_MA_DQS1_N MEM_MA_DQS2_N MEM_MA_DQS3_N MEM_MA_DQS4_N MEM_MA_DQS5_N MEM_MA_DQS6_N MEM_MA_DQS7_N
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194
MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63
CN23B 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 199
+3V
T12 14 MEM_MA_EVENT# 4 MEM_MA_RESET# 7
C413 1000P/50V_4
VDDSPD
MEM_MA_TEST
77 122 125
NC1 NC2 NCTEST
MEM_MA_RESET#
198 30
EVENT# RESET#
+VREF_DQ
+VREF_DQ +VREF_CA_A
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18
1 126 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43
C603 1000P/50V_4
VREF_DQ VREF_CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15
PC2100 DDR3 SDRAM SO-DIMM (204P)
D
98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
VTT1 VTT2
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
D
C
203 204
+0.75V_DDR_VTT
DDR3-DIMM1
Place close to DIMMs
+1.5VSUS
R159
*0_4
+3VPCU C421
R169
C415
1K/F_4
B
.1U/10V_4 5
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
PC2100 DDR3 SDRAM SO-DIMM (204P)
CN23A 4 MEM_MA_ADD[0..15]
DDR3-DIMM1
H=5.2 footprint: "ddr-c-2013289-204p" C412
Place these Caps near So-Dimm1.
1K/F_4
1n/50V_4
3
+
4
-
.1U/10V_4 1
R160 10_4 1 2
+VREF_DQ
OPA343NA/3K
2
SO-DIMM BYPASS PLACEMENT :
R158
U11
+1.5VSUS
R161 10K/F_4
No Vias Between the Trace of PIN to CAP.
DE-COUPLING FOR DIMM1(ONE CAP PER POWER PIN)
R179
0_4
R182
*0_4
C414 0.01U/16V_4
SI , add C226 from EMI suggest
PV,add from EMI suggestion C651 .1U/10V_4
C635 .1U/10V_4
C606 .1U/10V_4
C129 .1U/10V_4
C199 .1U/10V_4
C153 .1U/10V_4
C609 *.1U/10V_4
C642 *.1U/10V_4
C615 *.1U/10V_4
C226 .1U/10V_4
C168 *.1U/10V_4
C142 .1U/10V_4
+1.5VSUS
SI , remove C100 , C136 . add C100 , C136 C843 Reserve C901
DE-COUPLING FOR DIMM1
+VREF_CA_A
R348 *2K/F_4
A
A
+3V
+0.75V_DDR_VTT
+0.75V_DDR_VTT
4,7,37 DDR_VTTREF
C40 *.1U/10V_4
C31 4.7U/6.3V_6
*.1U/10V_4
C34 *22U/6.3V_8
+1.5VSUS C33
.1U/10V_4
+ C901 C100 10U/6.3V_8
C136 C843 10U/6.3V_8 10U/6.3V_8
2
C35 C39 1U/6.3V_4
*0_4/S
*150u_6.3V_3528
VREF_CA_A R349 *2K/F_4
1
+1.5VSUS
R347
PROJECT : AX2/7 Quanta Computer Inc.
PV,change to short pad Size Custom NB5/RD2
5
4
http://laptop-schematic.com/ 3
2
Document Number
Rev 1A
DDR3 SODIMMS: A/B CHANNEL
Date: Thursday, December 24, 2009 1
Sheet
6
of
42
5
4
3
2
1
07 MEM_MB_DATA[0..63] 4
4 MEM_MB_BANK[0..2]
4 4 4 4 4 4
+3V
R335 4.7K_4
DIM2_SA0
MEM_MB0_CS#0 MEM_MB0_CS#1 MEM_MB_CLK5_P MEM_MB_CLK5_N MEM_MB_CLK4_P MEM_MB_CLK4_N 4 MEM_MB_CKE0 4 MEM_MB_CKE1 4 MEM_MB_CAS# 4 MEM_MB_RAS# 4 MEM_MB_WE#
6,13,33 PCLK_SMB 6,13,33 PDAT_SMB
C
4 MEM_MB0_ODT0 4 MEM_MB0_ODT1 4 MEM_MB_DM[0..7]
4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4
B
98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78
MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2
109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200
DIM2_SA0 PCLK_SMB PDAT_SMB
116 120 MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
MEM_MB_DQS0_P MEM_MB_DQS1_P MEM_MB_DQS2_P MEM_MB_DQS3_P MEM_MB_DQS4_P MEM_MB_DQS5_P MEM_MB_DQS6_P MEM_MB_DQS7_P MEM_MB_DQS0_N MEM_MB_DQS1_N MEM_MB_DQS2_N MEM_MB_DQS3_N MEM_MB_DQS4_N MEM_MB_DQS5_N MEM_MB_DQS6_N MEM_MB_DQS7_N
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA ODT0 ODT1
11 28 46 63 136 153 170 187
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194
MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63
CN24B 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 199
+3V
T11 14 MEM_MB_EVENT# 4 MEM_MB_RESET# 6
MEM_MB_TEST
77 122 125
MEM_MB_RESET#
198 30
+VREF_DQ
+VREF_DQ +VREF_CA_B
C395 1000P/50V_4
1 126 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43
C112 1000P/50V_4
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDDSPD NC1 NC2 NCTEST EVENT# RESET# VREF_DQ VREF_CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15
PC2100 DDR3 SDRAM SO-DIMM (204P)
D
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
PC2100 DDR3 SDRAM SO-DIMM (204P)
CN24A 4 MEM_MB_ADD[0..15]
+1.5VSUS
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52
VTT1 VTT2
44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196
203 204
D
C
+0.75V_DDR_VTT
DDR3-DIMM2
B
DDR3-DIMM2
H=9.2 footprint: "ddr-c-2013310-204p-1"
SO-DIMM BYPASS PLACEMENT : Place these Caps near So-Dimm1. No Vias Between the Trace of PIN to CAP.
+1.5VSUS
C197 .1U/10V_4
DE-COUPLING FOR DIMM2(ONE CAP PER POWER PIN)
C151 .1U/10V_4
C127 .1U/10V_4
C198 .1U/10V_4
C152 .1U/10V_4
C128 .1U/10V_4
C229 *.1U/10V_4
C166 *.1U/10V_4
C140 *.1U/10V_4
C225 *.1U/10V_4
C167 *.1U/10V_4
C141 *.1U/10V_4 +1.5VSUS
SI , remove C165 , C236 add C845 , C846 ,C844 Reserve C902 +VREF_CA_B
DE-COUPLING FOR DIMM2
R99 *2K/F_4
A
A
+3V
+0.75V_DDR_VTT
+0.75V_DDR_VTT
+1.5VSUS R88
*0_4/S
1
4,6,37 DDR_VTTREF
+VREF_CA_B
C36 1U/6.3V_4
C37 *.1U/10V_4
C32 4.7U/6.3V_6
*.1U/10V_4
C43 *22U/6.3V_8
+ C902 +1.5VSUS
C38
.1U/10V_4
C845 10U/6.3V_8
C846 C844 10U/6.3V_8 10U/6.3V_8
2
C30
*150u_6.3V_3528
PROJECT : AX2/7 Quanta Computer Inc.
R96 *2K/F_4
PV,change to short pad Size Custom NB5/RD2
Document Number
Date: Thursday, December 24, 2009 5
4
3
2
http://laptop-schematic.com/
Rev 1A
DDR3 SODIMMS TERMINATIONS 1
Sheet
7
of
42
5
4
3
2
1
U22A
HT_CPU_NB_CAD_L[15..0] HT_CPU_NB_CLK_H[1..0] HT_CPU_NB_CLK_L[1..0] HT_CPU_NB_CTL_H[1..0]
D
HT_CPU_NB_CTL_L[1..0] HT_NB_CPU_CAD_H[15..0] HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CLK_L[1..0] HT_NB_CPU_CTL_H[1..0] HT_NB_CPU_CTL_L[1..0]
HT_CPU_NB_CAD_H[15..0]
3
HT_CPU_NB_CAD_L[15..0]
3
HT_CPU_NB_CLK_H[1..0]
3
HT_CPU_NB_CLK_L[1..0]
3
HT_CPU_NB_CTL_H[1..0]
3
HT_CPU_NB_CTL_L[1..0]
3
HT_NB_CPU_CAD_H[15..0]
3
HT_NB_CPU_CAD_L[15..0]
3
HT_NB_CPU_CLK_H[1..0]
3
HT_NB_CPU_CLK_L[1..0]
3
HT_NB_CPU_CTL_H[1..0]
3
HT_NB_CPU_CTL_L[1..0]
3
U18 SPM_VREF1 SPM_VREF2
C
SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13
M9 H2
VREFCA VREFDQ
N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15
M3 N9 M4
BA0 BA1 BA2
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E4 F8 F3 F9 H4 H9 G3 H8
SPM_DQ2 SPM_DQ1 SPM_DQ5 SPM_DQ3 SPM_DQ7 SPM_DQ0 SPM_DQ4 SPM_DQ6
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D8 C4 C9 C3 A8 A3 B9 A4
SPM_DQ13 SPM_DQ8 SPM_DQ10 SPM_DQ12 SPM_DQ15 SPM_DQ11 SPM_DQ14 SPM_DQ9
R412
Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25
HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N
PART 1 OF 6
HT_CPU_NB_CAD_H8 HT_CPU_NB_CAD_L8 HT_CPU_NB_CAD_H9 HT_CPU_NB_CAD_L9 HT_CPU_NB_CAD_H10 HT_CPU_NB_CAD_L10 HT_CPU_NB_CAD_H11 HT_CPU_NB_CAD_L11 HT_CPU_NB_CAD_H12 HT_CPU_NB_CAD_L12 HT_CPU_NB_CAD_H13 HT_CPU_NB_CAD_L13 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H15 HT_CPU_NB_CAD_L15
AC24 AC25 AB25 AB24 AA24 AA25 Y22 Y23 W 21 W 20 V21 V20 U20 U21 U19 U18
HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N
HT_CPU_NB_CLK_H0 HT_CPU_NB_CLK_L0 HT_CPU_NB_CLK_H1 HT_CPU_NB_CLK_L1
T22 T23 AB23 AA22
HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N
HT_CPU_NB_CTL_H0 HT_CPU_NB_CTL_L0 HT_CPU_NB_CTL_H1 HT_CPU_NB_CTL_L1
M22 M23 R21 R20
HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N
C23 A24
HT_RXCALP HT_RXCALN
301/F_4
HT_RXCALP HT_RXCALN
HYPER TRANSPORT CPU I/F
HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_H0 HT_CPU_NB_CAD_L0 HT_CPU_NB_CAD_H1 HT_CPU_NB_CAD_L1 HT_CPU_NB_CAD_H2 HT_CPU_NB_CAD_L2 HT_CPU_NB_CAD_H3 HT_CPU_NB_CAD_L3 HT_CPU_NB_CAD_H4 HT_CPU_NB_CAD_L4 HT_CPU_NB_CAD_H5 HT_CPU_NB_CAD_L5 HT_CPU_NB_CAD_H6 HT_CPU_NB_CAD_L6 HT_CPU_NB_CAD_H7 HT_CPU_NB_CAD_L7
HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N
D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22
HT_NB_CPU_CAD_H0 HT_NB_CPU_CAD_L0 HT_NB_CPU_CAD_H1 HT_NB_CPU_CAD_L1 HT_NB_CPU_CAD_H2 HT_NB_CPU_CAD_L2 HT_NB_CPU_CAD_H3 HT_NB_CPU_CAD_L3 HT_NB_CPU_CAD_H4 HT_NB_CPU_CAD_L4 HT_NB_CPU_CAD_H5 HT_NB_CPU_CAD_L5 HT_NB_CPU_CAD_H6 HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H7 HT_NB_CPU_CAD_L7
HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N
F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18
HT_NB_CPU_CAD_H8 HT_NB_CPU_CAD_L8 HT_NB_CPU_CAD_H9 HT_NB_CPU_CAD_L9 HT_NB_CPU_CAD_H10 HT_NB_CPU_CAD_L10 HT_NB_CPU_CAD_H11 HT_NB_CPU_CAD_L11 HT_NB_CPU_CAD_H12 HT_NB_CPU_CAD_L12 HT_NB_CPU_CAD_H13 HT_NB_CPU_CAD_L13 HT_NB_CPU_CAD_H14 HT_NB_CPU_CAD_L14 HT_NB_CPU_CAD_H15 HT_NB_CPU_CAD_L15
HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N
H24 H25 L21 L20
HT_NB_CPU_CLK_H0 HT_NB_CPU_CLK_L0 HT_NB_CPU_CLK_H1 HT_NB_CPU_CLK_L1
HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N
M24 M25 P19 R18
HT_NB_CPU_CTL_H0 HT_NB_CPU_CTL_L0 HT_NB_CPU_CTL_H1 HT_NB_CPU_CTL_L1
HT_TXCALP HT_TXCALN
B24 B25
HT_TXCALP R411 HT_TXCALN
08 D
signals
RS880
RX880
HT_TXCALP HT_TXCALN
R430 301 ohm 1%
R430 1.21k ohm 1%
R434 301 ohm 1%
R434 1.21k ohm 1%
HT_RXCALP HT_RXCALN
C
301/F_4
RS880
This block is for UMA only , DIS can remove all component
+1.5V_MEM_VDDQ +1.5V
R95
*100_4
SPM_CLKP SPM_CLKN SPM_CKE
J8 K8 K10
CK CK CKE
SPM_ODT SPM_CS# SPM_RAS# SPM_CAS# SPM_WE#
K2 L3 J4 K4 L4
ODT CS RAS CAS WE
VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10
B3 D10 G8 K3 K9 N2 N10 R2 R10
VDDQ#A2 VDDQ#A9 VDDQ#C2 VDDQ#C10 VDDQ#D3 VDDQ#E10 VDDQ#F2 VDDQ#H3 VDDQ#H10
A2 A9 C2 C10 D3 E10 F2 H3 H10
VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10
A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10
U22D
+1.5V_MEM_VDDQ
B
+1.5V_MEM_VDDQ
R343
SPM_DQS0P SPM_DQS1P
F4 C8
DQSL DQSU
SPM_DM0 SPM_DM1
E8 D4
DML DMU
SPM_DQS0N SPM_DQS1N
G4 B8
DQSL DQSU
*10K/F_4
13 SP_DDR3_RST# VMA_ZQ2
A
T3
RESET
L9
ZQ
R91 *243/F_4
J2 L2 J10 L10
NC#J2 NC#L2 NC#J10 NC#L10
VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 VSSQ#E9 VSSQ#F10 VSSQ#G2 VSSQ#G10
T21
AB12 AE16 V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14 Y14
MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)
SPM_BA0 SPM_BA1 SPM_BA2
AD16 AE17 AD17
MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)
SPM_RAS# SPM_CAS# SPM_WE# SPM_CS# SPM_CKE SPM_ODT
W 12 Y12 AD18 AB13 AB18 V14
MEM_RASb(NC) MEM_CASb(NC) MEM_W Eb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)
V15 W 14
MEM_CKP(NC) MEM_CKN(NC)
SPM_CLKP SPM_CLKN R357 R352
*40.2/F_4 SPM_COMPP *40.2/F_4 SPM_COMPN
AE12 AD12
+1.5V_MEM_VDDQ
B2 B10 D2 D9 E3 E9 F10 G2 G10
40mils wdith or more
PAR 4 OF 6
SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13
SBD_MEM/DVO_I/F
SI,exchange net name
SPM_BA0 SPM_BA1 SPM_BA2
MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC) MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC) MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC) MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC) MEM_DQ12(NC) MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)
AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21
SPM_DQ0 SPM_DQ1 SPM_DQ2 SPM_DQ3 SPM_DQ4 SPM_DQ5 SPM_DQ6 SPM_DQ7 SPM_DQ8 SPM_DQ9 SPM_DQ10 SPM_DQ11 SPM_DQ12 SPM_DQ13 SPM_DQ14 SPM_DQ15
MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC) MEM_DQS1P(NC) MEM_DQS1N(NC)
Y17 W 18 AD20 AE21
SPM_DQS0P SPM_DQS0N SPM_DQS1P SPM_DQS1N
MEM_DM0(NC) MEM_DM1/DVO_D8(NC)
W 17 AE19
MEM_COMPP(NC) MEM_COMPN(NC)
R341 C86 *1U/10V_4
C84 *0.1U/10V_4
*0_6
C66 *10U/6.3V_8
C92 *0.1U/10V_4
C87 *1U/10V_4
SPM_DM0 SPM_DM1
AE23 AE24
IOPLLVSS(NC)
AD23
*PBY160808T-221Y-N *PBY160808T-221Y-N C630
AE18 SPM_VREF
*2.2U/6.3V_6
L54 L16
+1.8V +1.1V
C146 *2.2U/6.3V_6
RS880 R356
*1K/F_4
R355
*1K/F_4
C619
*0.1U/10V_4
C620
*0.1U/10V_4
A
SPM_VREF1
R73
*1K/F_4
R75
*1K/F_4
C85
*0.1U/10V_4
C77
*0.1U/10V_4
SPM_VREF2
R100
*1K/F_4
R101
*1K/F_4
C121
*0.1U/10V_4
C138
*0.1U/10V_4
+1.5V_MEM_VDDQ
PROJECT : AX2/7 Quanta Computer Inc.
100-BALL SDRAM DDR3 *H5TQ1G63AFR-14C +1.5V_MEM_VDDQ
+1.5V_MEM_VDDQ
Size Custom NB5/RD2
5
C71 *10U/6.3V_8
B
+1.8V_IOPLLVDD18 +1.1V_IOPLLVDD
IOPLLVDD18(NC) IOPLLVDD(NC)
MEM_VREF(NC)
+1.5V_MEM_VDDQ
4
3
http://laptop-schematic.com/ 2
Document Number
Rev 1A
RS880-HT LINK I/F 1/5
Date: Thursday, December 24, 2009 1
Sheet
8
of
42
5
4
3
SI , for routing smooth GFX_RX can remove at next stage for MUXLESS
2
1
UMA can remove all GFX_TX CAP
09
GFX_TX 0/1/3/9/10/11 SI remove C711,C713,C710, C712,C708,C709,C703,C704 for MUXLESS
U22B
D
C
AE3 AD4 PCIE_RXP1 AE2 PCIE_RXN1 AD3 PCIE_RXP2_LAN AD1 PCIE_RXN2_LAN AD2 V5 W6 U5 U6 U8 U7
33 PCIE_RXP1 33 PCIE_RXN1 30 PCIE_RXP2_LAN 30 PCIE_RXN2_LAN
12 12 12 12 12 12 12 12
D4 C4 A3 B3 C2 C1 E5 F5 G5 G6 H5 H6 J6 J5 J7 J8 L5 L6 M8 L8 P7 M7 P5 M5 R8 P8 R6 R5 P4 P3 T4 T3
AA8 Y8 AA7 Y7 AA5 AA6 W5 Y5
PCIE_SB_NB_RX0P PCIE_SB_NB_RX0N PCIE_SB_NB_RX1P PCIE_SB_NB_RX1N PCIE_SB_NB_RX2P PCIE_SB_NB_RX2N PCIE_SB_NB_RX3P PCIE_SB_NB_RX3N
GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N
PART 2 OF 6
PCIE I/F GFX
PEG_RX15 PEG_RX#15 PEG_RX#14 PEG_RX14 PEG_RX13 PEG_RX#13 PEG_RX12 PEG_RX#12 PEG_RX11 PEG_RX#11 PEG_RX10 PEG_RX#10 PEG_RX9 PEG_RX#9 PEG_RX8 PEG_RX#8 PEG_RX7 PEG_RX#7 PEG_RX6 PEG_RX#6 PEG_RX5 PEG_RX#5 PEG_RX4 PEG_RX#4 PEG_RX3 PEG_RX#3 PEG_RX2 PEG_RX#2 PEG_RX1 PEG_RX#1 PEG_RX0 PEG_RX#0
PCIE I/F GPP
PCIE I/F SB
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N
PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)
A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2 AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2
C_PEG_TX#15 C_PEG_TX15 C_PEG_TX#14 C_PEG_TX14 C_PEG_TX13 C_PEG_TX#13 C_PEG_TX12 C_PEG_TX#12 C_PEG_TX11 C_PEG_TX#11 C_PEG_TX10 C_PEG_TX#10 C_PEG_TX9 C_PEG_TX#9 C_PEG_TX8 C_PEG_TX#8 C_PEG_TX7 C_PEG_TX#7 C_PEG_TX6 C_PEG_TX#6 C_PEG_TX5 C_PEG_TX#5 C_PEG_TX4 C_PEG_TX#4 C_PEG_TX3 C_PEG_TX#3 C_PEG_TX2 C_PEG_TX#2 C_PEG_TX1 C_PEG_TX#1 C_PEG_TX0 C_PEG_TX#0
C708 C709 C698 C696 C691 C694 C690 C688 C686 C687 C685 C682
C670 C674 C669 C667 C662 C666 C656 C658
C_PEG_TX15 C711 C_PEG_TX#15 C713 C_PEG_TX14 C710 C_PEG_TX#14 C712 PEG_TX13 *0.1U/10V_4 PEG_TX#13 *0.1U/10V_4 C_PEG_TX#12 C703 C_PEG_TX12 C704 PEG_TX11 *0.1U/10V_4 PEG_TX#11 *0.1U/10V_4 PEG_TX10 *0.1U/10V_4 PEG_TX#10 *0.1U/10V_4 *0.1U/10V_4 PEG_TX9 PEG_TX#9 *0.1U/10V_4 PEG_TX8 *0.1U/10V_4 PEG_TX#8 *0.1U/10V_4 PEG_TX7 0.1U/10V_4 0.1U/10V_4 PEG_TX#7 C_PEG_TX#6 C679 C_PEG_TX6 C681 C_PEG_TX#5 C675 C_PEG_TX5 C676 C_PEG_TX#4 C677 C_PEG_TX4 C678 PEG_TX3 0.1U/10V_4 PEG_TX#3 0.1U/10V_4 PEG_TX2 0.1U/10V_4 0.1U/10V_4 PEG_TX#2 PEG_TX1 0.1U/10V_4 PEG_TX#1 0.1U/10V_4 PEG_TX0 0.1U/10V_4 PEG_TX#0 0.1U/10V_4
*0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4
PEG_TX15 PEG_TX#15 PEG_TX14 PEG_TX#14
*0.1U/10V_4 *0.1U/10V_4
PEG_TX12 PEG_TX#12
D
Close to North Bridge
C_PEG_TX15 C_PEG_TX#15
PV,change to reserve for MUXLESS
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
PEG_TX6 PEG_TX#6 PEG_TX5 PEG_TX#5 PEG_TX4 PEG_TX#4
C155 C156 C618 C631
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
C622 C621 C623 C624 C157 C158 C626 C625
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5
A_TX0P_C A_TX0N_C A_TX1P_C A_TX1N_C A_TX2P_C A_TX2N_C A_TX3P_C A_TX3N_C
AC8 AB8
NB_PCIECALRP NB_PCIECALRN
R104 R107
1.27K/F_4 2K/F_4
C_PEG_TX14 25 C_PEG_TX#14 25
C_PEG_TX13 C_PEG_TX#13
C_PEG_TX13 25 C_PEG_TX#13 25
C_PEG_TX12 C_PEG_TX#12
C_PEG_TX12 25 C_PEG_TX#12 25
To HDMI CONN
17 PEG_RX#[15:0] PCIE_TXP1_C PCIE_TXN1_C PCIE_TXP2_C PCIE_TXN2_C
C_PEG_TX15 25 C_PEG_TX#15 25
C_PEG_TX14 C_PEG_TX#14
17 PEG_RX[15:0] PCIE_TXP1 33 PCIE_TXN1 33 PCIE_TXP2_LAN 30 PCIE_TXN2_LAN 30
PCIE_NB_SB_TX0P PCIE_NB_SB_TX0N PCIE_NB_SB_TX1P PCIE_NB_SB_TX1N PCIE_NB_SB_TX2P PCIE_NB_SB_TX2N PCIE_NB_SB_TX3P PCIE_NB_SB_TX3N
PEG_RX#[15:0]
PEG_TX#[15:0]
PEG_RX[15:0]
PEG_TX[15:0]
PEG_TX#[15:0] 17 PEG_TX[15:0] 17
C
TO WLAN TO PCIE-LAN
12 12 12 12 12 12 12 12
+1.1V
RS880
RS880 Display Port Support (muxed on GFX)
B
B
GFX_TX0,TX1,TX2 and TX3 DP0 AUX0 and HPD0 GFX_TX4,TX5,TX6 and TX7 DP1 AUX1 and HPD1
A
A
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2
Document Number
5
4
3
http://laptop-schematic.com/ 2
Rev 1A
RS880-PCIE I/F 2/5
Date: Thursday, December 24, 2009
Sheet 1
9
of
42
5
4
3
2
1
10
U22C
+1.8V_AVDDQ_NB
R91 for UMA use 140 ohm
140ohm CS11402FB19 133ohm CS11332FB00
18,24
CRT_G
18,24
CRT_B
18,24 HSYNC_COM 18,24 VSYNC_COM 18,24 DDCDATA 18,24 DDCCLK
CRT_R_1
0_4 0_4 0_4 0_4
HSYNC_INT VSYNC_INT DDCDATA_INT DDCCLK_INT
A11 B11 E8 F8
DAC_HSYNC(PWM_GPIO4) DAC_VSYNC(PWM_GPIO6) DAC_SDA(PCE_TCALRN) DAC_SCL(PCE_RCALRN)
R133
715/F_6
DAC_RSET_NB
G14
DAC_RSET(PWM_GPIO1)
+1.1V_PLLVDD +1.8V_PLLVDD18
A12 D14 B12
PLLVDD(NC) PLLVDD18(NC) PLLVSS(NC)
H17
VDDA18HTPLL
CRT_B_1
+1.8V_VDDA18HTPLL
12 NBHT_REFCLKP 12 NBHT_REFCLKN 12 NB_REFCLK_P 12 NB_REFCLK_N
T24 T22
R116 12 SBLINK_CLKP 12 SBLINK_CLKN
4.7K_4
18,23 18,23
+1.8V_VDDA18PCIEPLL
D7 E7
VDDA18PCIEPLL1 VDDA18PCIEPLL2
NB_RST#_IN NB_PWRGD_IN NB_LDT_STOP# NB_ALLOW_LDTSTOP
D8 A10 C10 C12
SYSRESETb POWERGOOD LDTSTOPb ALLOW_LDTSTOP
NBHT_REFCLKP NBHT_REFCLKN
C25 C24
HT_REFCLKP HT_REFCLKN
NB_REFCLK_P NB_REFCLK_N
E11 F11
REFCLK_P/OSCIN(OSCIN) REFCLK_N(PWM_GPIO3) GFX_REFCLKP GFX_REFCLKN
I/O
NBGPP_CLKP NBGPP_CLKN
U1 U2
GPP_REFCLKP GPP_REFCLKN
I/O
SBLINK_CLKP SBLINK_CLKN
V4 V3
GPPSB_REFCLKP(SB_REFCLKP) GPPSB_REFCLKN(SB_REFCLKN)
A9 B9 B8 A8 B7 A7
25 HDMI_DDC_CLK 25 HDMI_DDC_DATA DYN_PWR_EN
35 DYN_PWR_EN
I
T2 T1
NB_I2C_DATA NB_I2C_CLK
EDIDDATA EDIDCLK
STRP_DATA
G11
RSVD
C8
T140
TXOUT_U0P(NC) TXOUT_U0N(NC) TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2) TXOUT_U2P(NC) TXOUT_U2N(NC) TXOUT_U3P(PCIE_RESET_GPIO5) TXOUT_U3N(NC)
B18 A18 A17 B17 D20 D21 D18 D19
LB_DATAP0 LB_DATAN0 LB_DATAP1 LB_DATAN1 LB_DATAP2 LB_DATAN2
TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3) TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)
B16 A16 D16 D17
LA_CLK LA_CLK# LB_CLK LB_CLK#
LA_DATAP0 LA_DATAN0 LA_DATAP1 LA_DATAN1 LA_DATAP2 LA_DATAN2
23 23 23 23 23 23
LB_DATAP0 LB_DATAN0 LB_DATAP1 LB_DATAN1 LB_DATAP2 LB_DATAN2
23 23 23 23 23 23
SI , remove test point from AMD recommand D
LA_CLK LA_CLK# LB_CLK LB_CLK#
VDDLTP18(NC) VSSLTP18(NC)
A13 B13
+1.8V_VDDLTP18_NB
VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)
A15 B15 A14 B14
+1.8V_VDDLT_18_NB
VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)
C14 D15 C16 C18 C20 E20 C22
LVDS_DIGON(PCE_TCALRP) LVDS_BLON(PCE_RCALRP) LVDS_ENA_BL(PWM_GPIO2)
E9 F7 G12
23 23 23 23
SI,add R24,R26,R52 for MUXLESS
R24 R26 R52
0_4 0_4 0_4
DISP_ON DPST_PWM LVDS_BLON
DISP_ON 19,23 DPST_PWM 19,23 LVDS_BLON 18,23
Only for UMA
I2C_DATA I2C_CLK DDC_DATA/AUX0N(NC) DDC_CLK/AUX0P(NC) DDC_CLK1/AUX1P(NC) DDC_DATA1A/AUX1N(NC)
B10
A22 B22 A21 B21 B20 A20 A19 B19
I
NBGFX_CLKP NBGFX_CLKN
T135 T133
SI , Change HDMI CLK/DATA PIN from AMD recommand
RED(DFT_GPIO0) REDb(NC) GREEN(DFT_GPIO1) GREENb(NC) BLUE(DFT_GPIO3) BLUEb(NC)
R361 R358 R147 R151
CRT_G_1
12 NB_PLTRST# 16 NB_PWRGD_IN
4.7K_4
G18 G17 E18 F18 E19 F19
0_4 140/F_4 0_4 150/F_4 0_4 150/F_4
SI,add all material for MUXLESS
R117
C_Pr(DFT_GPIO5) Y(DFT_GPIO2) COMP_Pb(DFT_GPIO4)
R22 R135 R17 R136 R13 R134
Only for UMA
C
E17 F17 F15
TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC) TXOUT_L2N(DBG_GPIO0) TXOUT_L3P(NC) TXOUT_L3N(DBG_GPIO2)
PART 3 OF 6
PLL PWR LVTM
CRT_R
AVDD1(NC) AVDD2(NC) AVDDDI(NC) AVSSDI(NC) AVDDQ(NC) AVSSQ(NC)
PM
D
18,24
F12 E12 F14 G15 H15 H14
CRT/TVOUT
+1.8V_AVDDDI_NB
LA_DATAP0 LA_DATAN0 LA_DATAP1 LA_DATAN1 LA_DATAP2 LA_DATAN2
CLOCKs
+3V_AVDD_NB
C
SI , remove R427 TMDS_HPD(NC) HPD(NC)
D9 D10
TMDS_HPD0 TMDS_HPD1
SUS_STAT#(PWM_GPIO5)
D12
SUS_STAT#_NB
THERMALDIODE_P THERMALDIODE_N
AE8 AD8
MIS.
INT_TMDS_HPD
25
T137 R154
0_4
SUS_STAT# 13
D13 TEST_EN
TESTMODE
R414 1.8K_4
AUX_CAL(NC)
RS880
65 mA +1.1V_PLLVDD
PBY160808T-221Y-N(220,2A)
SI , for MUXLESS need add PLL power for LVDS
+3V
L33 PBY160808T-221Y-N(220,2A)
110 mA +3V_AVDD_NB
+1.1V
C702
AVDD-DAC Analog not applicable to RX780
VDDLTP18 - LVDS or DVI/HDMI PLL not applicable to RX780
L65
2.2U/6.3V_6
C374 2.2U/6.3V_6
PLLVDD - Graphics PLL not applicable to RX780
+1.8V 15 mA +1.8V_VDDLTP18_NB
PBY160808T-221Y-N(220,2A) L68 C705
B
+1.8V
STRAP_DEBUG_BUS_GPIO_ENABLEb
B
R131
Enables the Test Debug Bus using GPIO. RS880M 1 Disable 0 Enable
2.2U/6.3V_6
+1.8V
L35 PBY160808T-221Y-N(220,2A) VSYNC_INT
R422
3K_4
0_6
+1.8V_AVDDDI_NB
+1.8V_PLLVDD18 C336
AVDDI-DAC Digital not applicable to RX780
300 mA
PBY201209T-221Y-N(220,2A) +1.8V_VDDLT_18_NB L66
0.1U/10V_4
+3V
C405 10U/6.3V_8
C360 2.2U/6.3V_6
PLLVDD18 - Graphics PLL not applicable to RX780
4 mA PBY160808T-221Y-N(220,2A) +1.8V_AVDDQ_NB L32 C356 2.2U/6.3V_6
C706
C700
4.7U/6.3V_6
0.1U/10V_4
VDDLT18 - LVDS or DVI/HDMI digital not applicable to RX780
AVDDQ-DAC Bandgap Reference not applicable to RX780
RS880M: Enables Side port memory RS880M:HSYNC# +1.8V
Selects if Memory SIDE PORT is available or not 1 = Memory Side port Not available 0 = Memory Side port available Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]
VDDA18PCIEPLL -PCIE PLL L31
+1.8V
20mils width +1.8V_VDDA18PCIEPLL +1.8V
PBY160808T-221Y-N(220,2A)
R137 HSYNC_INT
C388 2.2U/6.3V_6
R418
3K_4
R419
*3K_4
1K/F_4
+3V
C717 0.1U/10V_4
VDDA18HTPLL -HT LINK PLL A
L30
20 mA +1.8V_VDDA18HTPLL
3,12 CPU_LDT_STOP#
1
NC VCC
2
IN
3
For external EEPROM Debug only
PBY160808T-221Y-N(220,2A)
RS780/RX780 DYN_PWR_EN
R426
R167 2K/F_4
U10
GND OUT
5
12 ALLOW_LDTSTOP R141
4
*0_4/S
A
NB_ALLOW_LDTSTOP
NB_LDT_STOP#
74LVC1G07GW C363 2.2U/6.3V_6
2K/F_4
PROJECT : AX2/7 Quanta Computer Inc. Size Custom
http://laptop-schematic.com/ NB5/RD2
Document Number
5
4
3
2
Rev 1A
RS880-SYSTEM I/F 3/5
Date: Thursday, December 24, 2009 1
Sheet
10
of
42
4
PART 6/6
VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8 VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40
VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34
+1.1V 2A for RS880M 0.6A
0.7A
RS880
+1.1V_VDDHT
0.5A
L12 *0_8/S
C607 4.7U/6.3V_6
C259 0.1U/10V_4
C311 0.1U/10V_4
C707 10U/6.3V_8
C340 0.1U/10V_4
C334 0.1U/10V_4
L67 *0_8/S
C277 0.1U/10V_4
+1.1V_VDDHTRX
+1.1V 2A for RS880M C179 4.7U/6.3V_6
B
C211 0.1U/10V_4
C701 0.1U/10V_4
+1.1V_VDDHTTX
C222 0.1U/10V_4
C241 0.1U/10V_4
C203 0.1U/10V_4
+1.8V 1A for RS780M+SB700 +1.8V
RS880M
VDDHT
+1.1V
IOPLLVDD
+1.1V
VDDHTRX
+1.1V
AVDD
+3.3V
VDDHTTX
+1.2V
AVDDDI
+1.8V
VDDA18PCIE
+1.8V
AVDDQ
+1.8V
VDDG18
+1.8V
PLLVDD
+1.1V
VDD18_MEM
+1.8V
PLLVDD18
+1.8V
VDDPCIE
+1.1V
VDDA18PCIEPLL
+1.8V
VDDC
+1.1V
VDDA18HTPLL
+1.8V
VDDLTP18
+1.8V
+1.8V/1.5V
VDDG33
+3.3V
VDDLT18
+1.8V
IOPLLVDD18
+1.8V
VDDLT33
NC
D
700mA
L19
+1.8V_VDDA18PCIE
PBY201209T-221Y-N(220,2A) C196 4.7U/6.3V_6
VDDA18PCIE PCIE TX stage I/O for RX780/RS780
VDD18 - RS780 I/O transform
+1.8V
C182 4.7U/6.3V_6
R138
C248 0.1U/10V_4
*0_6/S
C219 0.1U/10V_4
R353
*0_6/S
VDD18_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform
C262 0.1U/10V_4
C234 0.1U/10V_4
25mA C310 1U/10V_4
+1.8V
VDDPCIE - PCIE-E Main power
U22E
L51 *0_8/S
VDDHTTX - HT LINK TX I/O for RS880 +1.1V
PIN NAME
+1.1V
25mA C616 1U/10V_4
+1.8V_VDDG18_NB +1.8V_VDD18_MEM
J17 K16 L16 M16 P16 R16 T16
VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7
H18 G19 F20 E21 D22 B23 A23
VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7
AE25 AD24 AC23 AB22 AA21 Y20 W 19 V18 U17 T17 R17 P17 M17 J10 P10 K10 M10 L10 W9 H9 T10 R10 Y9 AA9 AB9 AD9 AE9 U10 F9 G9 AE11 AD11
PART 5/6
VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13
POWER
VDDHTRX - HT LINK RX I/O for RX780/RS780
11
RS880M
VDD_MEM
L12 M14 N13 P12 P15 R11 R14 T12 U14 U11 U15 V12 W11 W15 AC12 AA14 Y18 AB11 AB15 AB17 AB19 AE20 AB21 K11
VSSAHT1 VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27 A25 D23 E22 G22 G24 G25 H19 J22 L17 L22 L24 L25 M20 N22 P20 R19 R22 R24 R25 H20 U22 V19 W22 W24 W25 Y21 AD25
VDDHT - HT LINK digital I/O for RX780/RS780
C
1
RS880M POWER TABLE PIN NAME
GROUND
D
2
AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15
U22F
3
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10
A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2
5
VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15
VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8 VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)
VDDG18_1(VDD18_1) VDDG18_2(VDD18_2) VDD18_MEM1(NC) VDD18_MEM2(NC)
VDDG33_1(NC) VDDG33_2(NC)
RS880
A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9 K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16
2.5A
+1.1V_VDD_PCIE C297 0.1U/10V_4
C372 0.1U/10V_4
C320 1U/10V_4
C352 1U/10V_4
R143
*0_8/S
C
+1.1V
C382 4.7U/6.3V_6
7A
VDDC - Core Logic power +1.1V_DYN
C246 0.1U/10V_4
C286 0.1U/10V_4
C296 0.1U/10V_4
C299 0.1U/10V_4
C29 10U/6.3V_8
B
C280 0.1U/10V_4
C270 0.1U/10V_4
C245 0.1U/10V_4
C41 10U/6.3V_8
VDD_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform
SI , change footprint to 0603
AE10 AA11 Y11 AD10 AB10 AC10
+1.5V_VDD_MEM
H11 H12
+3V_VDDG33
C207 *0.1U/10V_4
C364 0.1U/10V_4
L55 C186 *0.1U/10V_4
C185 *0.1U/10V_4 RS780 *0_6/S
R139 C353 0.1U/10V_4
C205 0_4
*0_8
+1.5V
C204 *4.7U/6.3V_6
3.3V(0.06A) +3V
VDD33 - 3.3V I/O Not applicable to RX780
This is side port power DIS remove L55 , change C205 to 0 ohm and short to GND
A
A
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2
Document Number
Date: Tuesday, December 22, 2009
5
4
3
http://laptop-schematic.com/ 2
Rev 1A
RS880-POWER5/5 1
Sheet
11
of
42
5
4
3
2
1
12 U29A
A_RST#
2 A_RST#_R
4 1
SB_GPIO_RST# 13
*150P/50V_4
3
C404
GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N
SI , add AND gate for the reset input of PCIE devices from AMD recommand
10 SBLINK_CLKP 10 SBLINK_CLKN 10 NB_REFCLK_P 10 NB_REFCLK_N 10 NBHT_REFCLKP 10 NBHT_REFCLKN 3 3
CPUCLKP CPUCLKN
17 EXT_GFX_CLKP 17 EXT_GFX_CLKN 33 PCIE_MINI1_CLKP 33 PCIE_MINI1_CLKN
SBLINK_CLKP SBLINK_CLKN
RP23
2 4
1 0_4P2R_4 3
SBLINK_CLKP_R SBLINK_CLKN_R
M23 P23
PCIE_RCLKP/NB_LNK_CLKP PCIE_RCLKN/NB_LNK_CLKN
NB_REFCLK_P NB_REFCLK_N
RP22
2 4
1 0_4P2R_4 3
NB_REFCLK_P_R NB_REFCLK_N_R
U29 U28
NB_DISP_CLKP NB_DISP_CLKN
NBHT_REFCLKP NBHT_REFCLKN
RP24
2 4
1 0_4P2R_4 3
NBHT_REFCLKP_R NBHT_REFCLKN_R
T26 T27
NB_HT_CLKP NB_HT_CLKN
CPUCLKP CPUCLKN
RP25
4 2
3 0_4P2R_4 1
EXT_GFX_CLKP EXT_GFX_CLKN
RP21
4 2
3 0_4P2R_4 1
EXT_GFX_CLKP_R EXT_GFX_CLKN_R
PCIE_MINI1_CLKP PCIE_MINI1_CLKN
RP26
2 4
1 0_4P2R_4 3
PCIE_MINI1_CLKP_R L29 PCIE_MINI1_CLKN_R L28
CPUCLKP_R CPUCLKN_R
B
PCIE_LAN_CLKP RP20 PCIE_LAN_CLKN
3 0_4P2R_4 1
4 2
PCIE_LAN_CLKP_R PCIE_LAN_CLKN_R
+3V_DELAY
R19
SI , change pull high from +3V_VGA to +3V_DELAY
A_RST#
SI , change from VGA_RSTA to A_RST#_R
SI,add R616 for CR CLK
VGA_RSTB R616
26 CLK_48M_CR
C792
27P/50V_4
R494
33_4
GPP_CLK0P GPP_CLK0N
GPP_CLK2P GPP_CLK2N GPP_CLK3P GPP_CLK3N
L24 L23
GPP_CLK4P GPP_CLK4N
P25 M25
GPP_CLK5P GPP_CLK5N
N26 N27
GPP_CLK6P GPP_CLK6N
Y7
GPP_CLK8P GPP_CLK8N
L25
14M_25M_48M_OSC
25M_X1
R493 25M_X2 L27
SI , change to 27P C793
25MHZ
1M/F_4
27P/50V_4
LPCCLK0 LPCCLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0# LDRQ1#/CLK_REQ6#/GPIO49 SERIRQ/GPIO48
25M_X2
ALLOW _LDTSTP/DMA_ACTIVE# PROCHOT# LDT_PG LDT_STP# LDT_RST#
D
PCIRST#
PCIRST# 32
C752 150P/50V_4
D23 RB500V-40 1 2
+AVBAT
20MIL R319
499/F_4
+3VRTC_1
R318
10_4 +3VRTC
20MIL
D24 RB500V-40
20MIL
1U/10V_4
20MIL R320
VDDR_1.05_EN 16,39 AD23 16 AD24 16,39 AD25 16 AD26 16 AD27 16
AD23 AD24 AD25 AD26 AD27 SB_MEMHOT#
RTC_X1
1K/F_4
Y6
3
20MIL
2
C
T68
4
1
RTC_X2
R441
All the PCI bus has build-in Pull-UP/Down resistors
32.768KHZ *20M_6
R462
20M_6
BT1 BAT_CONN
C753 18P/50V_4
SERR#
SERR#
C755 18P/50V_4
32
SI , change CN14 to BT1 PV, change from 22p to 18p from vendor update
T92
H=4.2 footprint: "BAT-23_2-4_2"
footprint check ok
VGA_ON_SB
VGA_ON_SB 32 T86 CLKRUN# 32 T85
R615
0_4
AJ6 AG6 AG4 AJ4
VGA_RSTB
H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19
LPC_CLK0 LPC_CLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0#_SB LDRQ1#_SB SERIRQ
R297 R306
PCLK_LPC_DEBUG 33 PCLK_LPC_KB3920 32
LAD0 LAD1 LAD2 LAD3 LFRAME#
32,33 32,33 32,33 32,33 32,33
SERIRQ
32
C551
RTC_X1
32K_X2
C2
RTC_X2
RTCCLK INTRUDER_ALERT# VDDBT_RTC_G
D2 B2 B1
RTC_CLK INTRUDER_ALERT# +AVBAT
C535 22P/50V_4
5.6P/50V_6
T124 T113
C1
B
LPC_CLK0 16 LPC_CLK1 16
22_4 22_4
EMI suggestion
10K/F_4
ALLOW_LDTSTOP CPU_PROCHOT_R# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_RST#
G21 H21 K19 G22 J24
SI add R615 for reserve VGA_PWROK to BIOS
VGA_PWROK 32,37,38
+3VS5 ALLOW_LDTSTOP 10 CPU_PROCHOT_R# 3 CPU_PWRGD 3 CPU_LDT_STOP# 3,10 CPU_LDT_RST# 3
+AVBAT
+AVBAT
20MIL
G2 *SHORT_ PAD1
RTC_CLK 16
R469
*1M/F_4
C481 0.1U/10V_4 A
+AVBAT
PROJECT : AX2/7 Quanta Computer Inc.
SB820M A12
INTRUDER_ALERT# Left not connected (Southbridge has 50-kohm internal pull-up to VBAT).
Size Custom NB5/RD2
Document Number
3
http://laptop-schematic.com/ 2
Rev 1A
SB820-PCIE/PCI/CPU/LPC 1/4
Date: Thursday, December 24, 2009
4
+3VPCU
2
PV,add for 1.05V control
32K_X1
PV,change to short pad
5
1
C568
R290
GPP_CLK7P GPP_CLK7N
T29 T28
*0_4/S 25M_X1 L26
INTE#/GPIO32 INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35
GPP_CLK1P GPP_CLK1N
T25 V25
P29 P28
2 1 D22 RB501V-40 2 1 D21 RB501V-40
SLT_GFX_CLKP SLT_GFX_CLKN
M29 M28
10K/F_4
PCIE_RST#
CPU_HT_CLKP CPU_HT_CLKN
1
A
SI , remove R483,R286 from AMD recommand
2
17
V23 T23
N29 N28
Place within 0.5" of SB 30 PCIE_LAN_CLKP 30 PCIE_LAN_CLKN
V21 T21
33_4
+VCCRTC_2
AA22 Y21 AA25 AA24 W 23 V24 W 24 W 25
CLOCK GENERATOR
C
GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N
R449
+BAT
U36 TC7SH08FU
SI , C404 change to reserve only
5
C841 0.1U/10V_4
AA28 AA29 Y29 Y28 Y26 Y27 W 28 W 29
AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5 AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7
PCIRST#_L
1
A_RST#_R
33_4 33_4
PCIE_CALRP PCIE_CALRN
AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31 CBE0# CBE1# CBE2# CBE3# FRAME# DEVSEL# IRDY# TRDY# PAR STOP# PERR# SERR# REQ0# REQ1#/GPIO40 REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42 GNT0# GNT1#/GPO44 GNT2#/GPO45 GNT3#/CLK_REQ7#/GPIO46 CLKRUN# LOCK#
V2
PCI_CLK_TPM 16 PCI_CLK2 16 PCI_CLK3 16 PCI_CLK4 16
2
R451 R450
A_RX0P A_RX0N A_RX1P A_RX1N A_RX2P A_RX2N A_RX3P A_RX3N
PCIE_CALRP_SB AD29 PCIE_CALRN_SB AD28
+3V
30 LAN_PLTRST# 33 MINI_PLTRST#
AE24 AE23 AD25 AD24 AC24 AC25 AB25 AB24
PCIRST#
T62
1
590/F_4 2.0K/F_4
A_TX0P A_TX0N A_TX1P A_TX1N A_TX2P A_TX2N A_TX3P A_TX3N
W2 W1 W3 W4 Y1
2
R492 R490
AD26 AD27 AC28 AC29 AB29 AB28 AB26 AB27
PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38 PCICLK4/14M_OSC/GPO39
PCI INTERFACE
PCIE_NB_SB_TX0P PCIE_NB_SB_TX0N PCIE_NB_SB_TX1P PCIE_NB_SB_TX1N PCIE_NB_SB_TX2P PCIE_NB_SB_TX2N PCIE_NB_SB_TX3P PCIE_NB_SB_TX3N
PCIE_NB_SB_TX0P PCIE_NB_SB_TX0N PCIE_NB_SB_TX1P PCIE_NB_SB_TX1N PCIE_NB_SB_TX2P PCIE_NB_SB_TX2N PCIE_NB_SB_TX3P PCIE_NB_SB_TX3N
+1.1V_PCIE_VDDR
A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C A_RX2P_C A_RX2N_C A_RX3P_C A_RX3N_C
Part 1 of 5
LPC
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
SB800 PCIE_RST# A_RST#
CPU
PCIE_SB_NB_RX0P PCIE_SB_NB_RX0N PCIE_SB_NB_RX1P PCIE_SB_NB_RX1N PCIE_SB_NB_RX2P PCIE_SB_NB_RX2N PCIE_SB_NB_RX3P PCIE_SB_NB_RX3N 9 9 9 9 9 9 9 9
To RS880
C554 C555 C557 C556 C559 C558 C553 C552
P1 L1
A_RST#
RTC
PLACE THESE PCIE AC COUPLING CAPS CLOSE TO SB
D
33_4
PCI CLKS
9 9 9 9 9 9 9 9
R456
NB_PLTRST#
PCI EXPRESS INTERFACES
10
1
Sheet
12
of
42
5
NC,no install by default
SB_TEST1
R245
*2.2K_4
SB_TEST2
SI , Add SB_GPIO_RST# form AMD recommand
R459 R460
32 32
2.2K_4 SB_SMBCLK1 2.2K_4 SB_SMBDATA1
GATEA20 RCIN#
32 32
KBSMI# SCI#
SCI# SYS_RST#
30,33 PCIE_WAKE# 3 CPU_THERMTRIP# +3V SCL0/SDATA0
is 3V tolerance AMD datasheet define it R312
2.2K_4 PCLK_SMB
R311
2.2K_4
PDAT_SMB
C500 100P/50V_4
+3V
R561
RB501V-40 D38 1
VGA_REQ
SI , add R561,D38 for VGA_CLK_REQ
2.2K_4 2.2K_4 *10K_4
SB_SCLK2 SB_SDATA2 SYS_RST#
+3VS5
R243 R244
PM_THERM# +3VS5
DNBSWON#
2.2K_4
G1
AD19 AA16 *0_4 LAN_DISABLE#_SB AB21 AC18 AF20 AE19 ACZ_SPKR AF19 PCLK_SMB AD22 PDAT_SMB AE22 SB_SMBCLK1 F5 SB_SMBDATA1 F4 AH21 VGA_REQ_R AB18 E1 AJ21 H4 D5 D7 G5 K3 EXT_SB_OSC AA20
PCI_PME#/GEVENT4# RI#/GEVENT22# SPI_CS3#/GBE_STAT1/GEVENT21# SLP_S3# SLP_S5# PW R_BTN# PW R_GOOD SUS_STAT# Part 4 of 5 TEST0 TEST1/TMS TEST2 GA20IN/GEVENT0# KBRST#/GEVENT1# LPC_PME#/GEVENT3# LPC_SMI#/GEVENT23# GEVENT5# SYS_RESET#/GEVENT19# W AKE#/GEVENT8# IR_RX1/GEVENT20# THRMTRIP#/SMBALERT#/GEVENT2# NB_PW RGD
SB800
USBCLK/14M_25M_48M_OSC
A10
CLK_48M_USB
USB_RCOMP
G19
USB_RCOMP_SB
USB_FSD1P/GPIO186 USB_FSD1N
J10 H11
USB_FSD0P/GPIO185 USB_FSD0N
H9 J8
T83 T82
USB_HSD13P USB_HSD13N
B12 A12
T99 T88
USB_HSD12P USB_HSD12N
F11 E11
T90 T100
USB_HSD11P USB_HSD11N
E14 E12
USBP11+ USBP11-
26 26
13
USB
USB_HSD10P USB_HSD10N
J12 J14
USBP10+ USBP10-
33 33
CLK_REQ4#/SATA_IS0#/GPIO64 CLK_REQ3#/SATA_IS1#/GPIO63 SMARTVOLT1/SATA_IS2#/GPIO50 CLK_REQ0#/SATA_IS3#/GPIO60 SATA_IS4#/FANOUT3/GPIO55 SATA_IS5#/FANIN3/GPIO59 SPKR/GPIO66 SCL0/GPIO43 SDA0/GPIO47 SCL1/GPIO227 SDA1/GPIO228 CLK_REQ2#/FANIN4/GPIO62 CLK_REQ1#/FANOUT4/GPIO61 IR_LED#/LLB#/GPIO184 SMARTVOLT2/SHUTDOW N#/GPIO51 DDR3_RST#/GEVENT7# GBE_LED0/GPIO183 GBE_LED1/GEVENT9# GBE_LED2/GEVENT10# GBE_STAT0/GEVENT11# CLK_REQG#/GPIO65/OSCIN
WLAN Min-Card
USB_HSD9P USB_HSD9N
A13 B13
T103 T87
USB_HSD8P USB_HSD8N
D13 C13
T105 T94
USB_HSD7P USB_HSD7N
G12 G14
T101 T96
USB_HSD6P USB_HSD6N
G16 G18
USBP6+ USBP6-
29 29
USB Connector
USB_HSD5P USB_HSD5N
D16 C16
USBP5+ USBP5-
29 29
USB Connector
USB_HSD4P USB_HSD4N
B14 A14
T148 T150
USB_HSD3P USB_HSD3N
E18 E16
T109 T112
USB_HSD2P USB_HSD2N
J16 J18
+3V
*0_4 SMBALERT#_1 10K/F_4 SB_JTAG_TDO SB_JTAG_TCK SB_JTAG_TDI SB_JTAG_RST#
H3 D1 E4 D4 E8 F7 E7 F8
BLINK/USB_OC7#/GEVENT18# USB_OC6#/IR_TX1/GEVENT6# USB_OC5#/IR_TX0/GEVENT17# USB_OC4#/IR_RX0/GEVENT16# USB_OC3#/AC_PRES/TDO/GEVENT15# USB_OC2#/TCK/GEVENT14# USB_OC1#/TDI/GEVENT13# USB_OC0#/TRST#/GEVENT12#
USB_HSD1P USB_HSD1N
B17 A17
USB_HSD0P USB_HSD0N
A16 B16
M3 N1 L2 M2 M1 M4 N2 P2
AZ_BITCLK AZ_SDOUT AZ_SDIN0/GPIO167 AZ_SDIN1/GPIO168 AZ_SDIN2/GPIO169 AZ_SDIN3/GPIO170 AZ_SYNC AZ_RST#
SCL2/GPIO193 SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196 EC_PW M0/EC_TIMER0/GPIO197 EC_PW M1/EC_TIMER1/GPIO198 EC_PW M2/EC_TIMER2/GPIO199 EC_PW M3/EC_TIMER3/GPIO200
D25 F23 B26 E26 F25 E22 F22 E21
KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208
G24 G25 E28 E29 D29 D28 C29 C28
KSO_0/GPIO209 KSO_1/GPIO210 KSO_2/GPIO211 KSO_3/GPIO212 KSO_4/GPIO213 KSO_5/GPIO214 KSO_6/GPIO215 KSO_7/GPIO216 KSO_8/GPIO217 KSO_9/GPIO218 KSO_10/GPIO219 KSO_11/GPIO220 KSO_12/GPIO221 KSO_13/GPIO222 KSO_14/GPIO223 KSO_15/GPIO224 KSO_16/GPIO225 KSO_17/GPIO226
B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22
PV,delete R272 R291
11.8K/F_6
SI,add R272 for PARK LP 14M CLK source CLK_48M_USB
RSMRST#
PV,Reserve for system stable 5
R458
R444
T69 T152 8 SP_DDR3_RST# T67 T78 T77 T74 T121
SCL2/SDATA2 is 3V/S5 tolerance AMD datasheet define it
RSMRST#
RSMRST#
33 WLAN_CLKREQ#
2
C
R296 R292 R576
32
T119 30 LAN_CLKREQ# 30,32 LAN_DISABLE# 12 SB_GPIO_RST# T123 T114 27 ACZ_SPKR 6,7,33 PCLK_SMB 6,7,33 PDAT_SMB
10K/F_4
37
WD_PWRGD
16 WD_PWRGD
Clock gen/Robson/TV tuner /DDR2/DDR2 thermal/Accelerometer
J2 K1 D3 F1 H1 F2 H5 G6 B3 C4 F6 AD21 AE21 K2 J29 H2 J1 H6 F3 J6 AC19
USB 1.1 USB MISC
*2.2K_4
RI# SPI_CS3# SUSB# SUSC# DNBSWON# SB_PWRGD_IN SUS_STAT# SB_TEST0 SB_TEST1 SB_TEST2 GATEA20 RCIN#
USB 2.0
R470
14 MEM_GEVEN# T144 T73 32 SUSB# 32 SUSC# 32 DNBSWON# 16 SB_PWRGD_IN 10 SUS_STAT#
remove pull hi ( chip internal have pull hi )
SCL1/SDATA1 is 3V/S5 tolerance AMD datasheet define it
+3VS5
1
U29D
SB_TEST0
ACPI / WAKE UP EVENTS
*2.2K_4
GPIO
+3VS5
2
PV,remove workaround
R253
D
3
USB OC
+3VS5
4
USBP15+ USBP15-
USBP2+ USBP2-
29 29
BLUETOOTH D
C509 *2.2P/50V_4
for EMI
card reader
C
23 23
Carama USB
29 29
USB Connector
T107 T149 USBP0+ USBP0-
SI , add from HP request R255 16
R247
33_4
ACZ_SDOUT_AUDIO C478
R455 R453 R454 R452
HD audio interface is 3.3S5 voltage
To Azalia ACZ_SDOUT
*10K/F_4
ACZ_SDOUT
*10K/F_4 *10K/F_4 *10K/F_4 *10K/F_4
ACZ_BCLK ACZ_SDOUT ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2_R ACZ_SDIN3_R ACZ_SYNC ACZ_RST#
27
*10P/50V_4
B
ACZ_SYNC
R251
33_4
ACZ_SYNC_AUDIO C484
*10P/50V_4
C479
27P/50V_4
PV, change to 27P from EMI suggest ACZ_BCLK ACZ_RST#
R254
BIT_CLK_AUDIO
33_4
R242
33_4
ACZ_SDIN0
+3VS5
SI , add pull up resistor from AMD recommend
33_4
EMI suggestion
ACZ_SYNC
R248
33_4
ACZ_BCLK
R256
33_4
ACZ_RST#
R249
33_4
ACZ_SDIN1
C833 10P/50V_4
28
27P/50V_4
ACZ_RST#_AUDIO_MDC
28
SB JTAG
GBE_COL GBE_CRS GBE_MDCK GBE_MDIO GBE_RXCLK GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0 GBE_RXCTL/RXDV GBE_RXERR GBE_TXCLK GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0 GBE_TXCTL/TXEN GBE_PHY_PD GBE_PHY_RST# GBE_PHY_INTR
E23 E24 F21 G29
PS2_DAT/SDA4/GPIO187 PS2_CLK/SCL4/GPIO188 SPI_CS2#/GBE_STAT2/GPIO166 FC_RST#/GPO160
D27 F28 F29 E27
PS2KB_DAT/GPIO189 PS2KB_CLK/GPIO190 PS2M_DAT/GPIO191 PS2M_CLK/GPIO192
1 2 3 4 5 6 7 8
SB_SCLK2 SB_SDATA2 SB_SCLK3 5159_RST_R# SB_GPIO199 SB_GPIO200
T168 5159_RST_R# 26 SB_GPIO199 16 SB_GPIO200 16
SPI/LPC define
B
A
SB820M A12
SB_JTAG_TCK SB_JTAG_TDO SB_JTAG_TDI SB_TEST1
PROJECT : AX2/7 Quanta Computer Inc.
SB_JTAG_RST# Size Custom
28 *S/W JTAG DEBUG
Remove short pad 5
T1 T4 L6 L5 T9 U1 U3 T2 U2 T5 V5 P5 M5 P9 T7 P7 M7 P4 M9 V7
+3VSUS CN32
ACZ_SDIN1
10K/F_4
28
*10P/50V_4
BIT_CLK_AUDIO_MDC C486
R545
T167
A
PV, change to 27P from EMI suggest
10K/F_4
28
*10P/50V_4
ACZ_SYNC_AUDIO_MDC C473
R511
T118 T166
ACZ_SDOUT_AUDIO_MDC C477
10K/F_4
27
To Modem Board R246
R509
27
Remove short pad
ACZ_SDOUT
10K/F_4 10K/F_4
27
ACZ_RST#_AUDIO
ACZ_SDIN0
PV,change from pull high to pull low from AMD update
27
R483 R505
EMBEDDED CTRL
WLAN_CLKREQ# LAN_CLKREQ#
EMBEDDED CTRL
SUS_STAT#
8.2K_4 8.2K_4
HD AUDIO
4.7K_4
R332 R334
GBE LAN
R457
NB5/RD2
Document Number
Date: Thursday, December 24, 2009
4
3
http://laptop-schematic.com/ 2
Rev 1A
SB820-ACPI/GPIO/USB 2/4 1
Sheet
13
of
42
5
4
29 29
SATA_RXN0 SATA_RXP0
SATA ODD 31 31
SATA_TXP1 SATA_TXN1
31 31
SATA_RXN1 SATA_RXP1
SATA1
D
IF THERE IS NO IDE, TEST POINTS FOR DEBUG BUS IS MANDATORY
SB800
C490 C493
0.01U/16V_4 0.01U/16V_4
SATA_TXP0_C SATA_TXN0_C
AH9 AJ9
SATA_TX0P SATA_TX0N
C498 C503
0.01U/16V_4 0.01U/16V_4
SATA_RXN0_C SATA_RXP0_C
AJ8 AH8
SATA_RX0N SATA_RX0P
C489 C485
0.01U/16V_4 0.01U/16V_4
SATA_TXP1_C SATA_TXN1_C
AH10 AJ10
SATA_TX1P SATA_TX1N
C487 C482
0.01U/16V_4 0.01U/16V_4
SATA_RXN1_C SATA_RXP1_C
AG10 AF10
SATA_RX1N SATA_RX1P
AG12 AF12
SATA_TX2P SATA_TX2N
AJ12 AH12
SATA_RX2N SATA_RX2P
PLVDD_SATA-SATA PLL POWER
XTLVDD_SATA-- SATA crystal power
PLACE SATA_CAL RES VERY CLOSE TO BALL OF SB820
NOTE: R361 IS 1K 1% FOR 25MHz XTAL, 4.99K 1% FOR 100MHz INTERNAL CLOCK R476 R472
C
+1.1V_AVDD_SATA
1K/F_4 931/F_4
SATA_CALRP SATA_CALRN
SB_SATA_LED# +3V
AH14 AJ14
SATA_TX3P SATA_TX3N
AG14 AF14
SATA_RX3N SATA_RX3P
AG17 AF17
SATA_TX4P SATA_TX4N
AJ17 AH17
SATA_RX4N SATA_RX4P
AJ18 AH18
SATA_TX5P SATA_TX5N
AH19 AJ19
SATA_RX5N SATA_RX5P
AB14 AA14
SATA_CALRP SATA_CALRN
AD11
Part 2 of 5
SATA_ACT#/GPIO67
10K/F_4 SATA_X1
*22P/50V_4
2
C518
R486
AD16
SATA_X1
AC16
SATA_X2
Y4 R284 *25MHZ
*22P/50V_4
SI , change to reserve only
J5 E2 K4 K9 G2
ROM_RST#
T72 +3V
SPI_DI/GPIO164 SPI_DO/GPIO163 SPI_CLK/GPIO162 SPI_CS1#/GPIO165 ROM_RST#/GPIO161
FC_CLK FC_FBCLKOUT FC_FBCLKIN
AH28 AG28 AF26
FC_OE#/GPIOD145 FC_AVD#/GPIOD146 FC_W E#/GPIOD148 FC_CE1#/GPIOD149 FC_CE2#/GPIOD150 FC_INT1/GPIOD144 FC_INT2/GPIOD147
AF28 AG29 AG26 AF27 AE29 AF29 AH27
FC_ADQ0/GPIOD128 FC_ADQ1/GPIOD129 FC_ADQ2/GPIOD130 FC_ADQ3/GPIOD131 FC_ADQ4/GPIOD132 FC_ADQ5/GPIOD133 FC_ADQ6/GPIOD134 FC_ADQ7/GPIOD135 FC_ADQ8/GPIOD136 FC_ADQ9/GPIOD137 FC_ADQ10/GPIOD138 FC_ADQ11/GPIOD139 FC_ADQ12/GPIOD140 FC_ADQ13/GPIOD141 FC_ADQ14/GPIOD142 FC_ADQ15/GPIOD143
AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26
R466 R477 R443
*0_4/S *0_4/S *0_4
FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58
W7 V9 W8
SB_FANIN0 SB_FANIN1 R468
*0_4/S
TEMPIN0/GPIO171 TEMPIN1/GPIO172 TEMPIN2/GPIO173 TEMPIN3/TALERT#/GPIO174 TEMP_COMM
B6 A6 A5 B5 C7
TEMPIN0 TEMPIN1 MB_THRMDA_SB
VIN0/GPIO175 VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180 VIN6/GBE_STAT3/GPIO181 VIN7/GBE_LED3/GPIO182
A3 B4 A4 C5 A7 B7 B8 A8
SIDE_PORT_ID0 SIDE_PORT_ID1 SIDE_PORT_ID2 BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4
TEMP_COMM
G27 Y2
SB820M A12
5
2
SIDE_PORT_ID0
1
0
0
Samsung
1
0
1
Hynix
0
0
0
PV,change to short pad
C764 0.1U/10V_4
RF_OFF# 33 BT_OFF# 29 BT_COMBO_EN# 33 T76 T84 LCD_BK
23
No support side port
+3VS5
R259
*10K/F_4
SIDE_PORT_ID0
R471
10K/F_4
+3VS5
R265
*10K/F_4
SIDE_PORT_ID1
R475
10K/F_4
+3VS5
R264
*10K/F_4
SIDE_PORT_ID2
R260
10K/F_4
+3VS5
For blue tooth & wireless merge card
R474
*10K/F_4
BOARD_ID0
R262
10K/F_4
R268
10K/F_4
BOARD_ID1
R274
*10K/F_4
R478
*10K/F_4
BOARD_ID2
R277
10K/F_4
R479
*10K/F_4
BOARD_ID3
R280
10K/F_4
R267
*10K/F_4
BOARD_ID4
R273
10K/F_4
C
T147 T145 T146 T70
SI define board ID
ID4
ID3
ID2
ID1
ID0
0
0
0
0
0
AX2 UMA DF
0
0
0
0
1
AX7 UMA DF
0
0
0
1
0
AX2 PARK DF
0
0
0
1
1
AX7 PARK DF
0
0
1
0
0
AX2 UMA FF
0
0
1
0
1
AX7 UMA FF
0
0
1
1
0
AX2 PARK FF
0
0
1
1
1
AX7 PARK FF
0
1
0
1
0
AX2 M93 DF
0
1
0
1
1
AX7 M93 DF
0
1
1
1
0
AX2 M93 FF
0
1
1
1
1
AX7 M93 FF
B
SB_SATA_LED#
4
SATA_LED#
1 3
33
SIDE_PORT_ID1
SI , remove test point from AMD recommand
B
U30 TC7SH08FU
14 D
W5 W6 Y9
NC1 NC2
1
SI define side port ID
SIDE_PORT_ID2
FANOUT0/GPIO52 FANOUT1/GPIO53 FANOUT2/GPIO54
SPI ROM
*1M/F_4 SATA_X2
1
C514
2
U29B
FLASH
SATA_TXP0 SATA_TXN0
PLACE SATA AC COUPLING CAPS CLOSE TO SB820
SERIAL ATA
29 29
3
HW MONITOR
SATA PORT 0,1,2,3 can support AHCI mode
R250
2
+1.5VSUS
+1.5VSUS
2.2K_4
3
A
3
13 MEM_GEVEN#
MEM_MA_EVENT# 6
2.2K_4
2
R233
Q25 MMBT3904 1
R238 2.2K_4
Q24 MMBT3904 1
R234 2.2K_4
PV define for M93 A
MEM_MB_EVENT# 7
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2
Document Number
Date: Thursday, December 24, 2009
5
4
3
http://laptop-schematic.com/ 2
Rev 1A
SB820-ACPI/GPIO/USB 2/4 Sheet 1
14
of
42
4
3
2
PLACE ALL THE DECOUPLING CAPS ON THIS SHEET CLOSE TO SB AS POSSIBLE.
1
+1.1V_VCC_SB_R
U29C
C494 0.1U/10V_4
C526 0.1U/10V_4
D
1.8V : FLASH MEMORY MODE(DEFAULT) VDD33_18--3.3V IDE I/O power 3.3V: IDE MODE R310
1.8V flash memory I/O power
*0_8/S
VDDIO_18_FC
AF22 AE25 AF24 AC22
PV,change to short pad L75
+1.1V_PCIE_VDDR
PCIE_VDDR--PCIE I/O power
600mA
L82
BLM18PG181SN1D(180,1.5A)_6 C797 10U/6.3V_8
C
C550 1U/10V_4
L42
C788 10U/6.3V_8
C547 0.1U/10V_4
C542 0.1U/10V_4
93mA
VDDPL_3.3V_SATA
PBY160808T-221Y-N(220,2A) C513 2.2U/6.3V_4
C508 *0.1U/10V_4
+1.1V_AVDD_SATA
AVDD_SATA--SATA phy power +1.1V
567mA
L49
AE28 U26 V22 V26 V27 V28 V29 W 22 W 26
VDDPL_33_PCIE VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8
AD14
VDDPL_33_SATA
AJ20 AF18 AH20 AG19 AE18 AD18 AE16
VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7
C520 1U/10V_4
+3V_AVDD_USB
AVDDTX--USB Phy Analog I/O power
658mA
L73
PBY160808T-221Y-N(220,2A) C766 10U/6.3V_8
C767 10U/6.3V_8
C769 1U/10V_4
C765 1U/10V_4
A18 A19 A20 B18 B19 B20 C18 C20 D18 D19 D20 E19
VDDAN_33_USB_S_1 VDDAN_33_USB_S_2 VDDAN_33_USB_S_3 VDDAN_33_USB_S_4 VDDAN_33_USB_S_5 VDDAN_33_USB_S_6 VDDAN_33_USB_S_7 VDDAN_33_USB_S_8 VDDAN_33_USB_S_9 VDDAN_33_USB_S_10 VDDAN_33_USB_S_11 VDDAN_33_USB_S_12
B
+1.1VS5
L43
TBDmA
VDDAN_1.1V_USB
C515 0.1U/10V_4
C11 D11
VDDAN_11_USB_S_1 VDDAN_11_USB_S_2
M6 P8
VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8
A21 D21 B21 K10 L10 J9 T6 T8
VDDCR_11_S_1 VDDCR_11_S_2
F26 G26
CKVDD_1.1V-Internal clock Generator I/O power
TBDmA
C507 1U/10V_4
*0_8/S
+1.1V_CKVDD BLM18PG181SN1D(180,1.5A)_6 L77
C537 1U/10V_4
C539 1U/10V_4
C543 0.1U/10V_4
+1.1V
C528 0.1U/10V_4
C791 22U/6.3V_8
C770 *0.1U/10V_4
R487 C771 2.2U/6.3V_6
*0_6/S
C773 2.2U/6.3V_6
VDDIO_AZ_S
M8
VDDCR_1.1V
113mA
TBDmA
+3VS5
PV,change to short pad
C545 1U/10V_4
+VDDIO_AZ
*0_6/S
VSSIO_SATA_1 VSSIO_SATA_2 VSSIO_SATA_3 VSSIO_SATA_4 VSSIO_SATA_5 VSSIO_SATA_6 VSSIO_SATA_7 VSSIO_SATA_8 VSSIO_SATA_9 VSSIO_SATA_10 VSSIO_SATA_11 VSSIO_SATA_12 VSSIO_SATA_13 VSSIO_SATA_14 VSSIO_SATA_15 VSSIO_SATA_16 VSSIO_SATA_17 VSSIO_SATA_18 VSSIO_SATA_19 VSSIO_USB_1 VSSIO_USB_2 VSSIO_USB_3 VSSIO_USB_4 VSSIO_USB_5 VSSIO_USB_6 VSSIO_USB_7 VSSIO_USB_8 VSSIO_USB_9 VSSIO_USB_10 VSSIO_USB_11 VSSIO_USB_12 VSSIO_USB_13 VSSIO_USB_14 VSSIO_USB_15 VSSIO_USB_16 VSSIO_USB_17 VSSIO_USB_18 VSSIO_USB_19 VSSIO_USB_20 VSSIO_USB_21 VSSIO_USB_22 VSSIO_USB_23 VSSIO_USB_24 VSSIO_USB_25 VSSIO_USB_26 VSSIO_USB_27 VSSIO_USB_28
+1.1VS5
C549 1U/10V_4
Y4
EFUSE
D8
VSSAN_HW M
VDDCR_1.1V_USB
VDDCR_11_USB_S_1 VDDCR_11_USB_S_2
A11 B11
VDDPL_33_SYS
M21
+VDDPL_3.3V
47mA
VDDPL_11_SYS_S
L22
+VDDPL_1.1V
62mA
VDDPL_33_USB_S
F19
+VDDPL_3.3V_USB
17mA
D6
+VDDAN_3.3VHWM
5mA
L20
VDDXL_3.3V
VDDAN_33_HW M_S
R303
SB800
Y14 Y16 AB16 AC14 AE12 AE14 AF9 AF11 AF13 AF16 AG8 AH7 AH11 AH13 AH16 AJ7 AJ11 AJ13 AJ16 A9 B10 K11 B9 D10 D12 D14 D17 E9 F9 F12 F14 F16 C9 G11 F18 D9 H12 H14 H16 H18 J11 J19 K12 K14 K16 K18 H19
S5_3.3--3.3v standby power
32mA
U29E
+1.1V
C510 10U/6.3V_8
S5_1.1V--1.1V standby power
VDDXL_33_S C506 0.1U/10V_4
C511 1U/10V_4
M10
VDDIO_GBE_S_1 VDDIO_GBE_S_2
PBY160808T-221Y-N(220,2A) C505 2.2U/6.3V_4
R276 C516 0.1U/10V_4
V1
L7 L9
CORE S5
C521 1U/10V_4
USB I/O
+3VS5
C538 0.1U/10V_4
PLL
For support USB wakeup-->3V_S5
C531 0.1U/10V_4
K28 K29 J28 K26 J21 J20 K21 J22
510mA
+3VALW_R
BLM18PG181SN1D(180,1.5A)_6 C544 22U/6.3V_8
N13 R15 N17 U13 U17 V12 V18 W 12 W 18
VDDCR_11_GBE_S_1 VDDCR_11_GBE_S_2
3.3V_S5 I/O
43mA
VDDPL_3.3V_PCIE
GBE LAN
C785 *0.1U/10V_4
VDDIO_33_GBE_S
PCI EXPRESS
C787 2.2U/6.3V_4
+3V
VDDRF_GBE_S
POWER
PBY160808T-221Y-N(220,2A)
+1.1V
VDDIO_18_FC_1 VDDIO_18_FC_2 VDDIO_18_FC_3 VDDIO_18_FC_4
SERIAL ATA
+3V
VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6 VDDAN_11_CLK_7 VDDAN_11_CLK_8
71mA
Delete Cap and change +1.8V to pull low from AMD command , due to no IDE & flash mode
VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7 VDDCR_11_8 VDDCR_11_9
CORE S0
PV,change to short pad
C492 0.1U/10V_4
Part 3 of 5
SB800 VDDIO_33_PCIGP_1 VDDIO_33_PCIGP_2 VDDIO_33_PCIGP_3 VDDIO_33_PCIGP_4 VDDIO_33_PCIGP_5 VDDIO_33_PCIGP_6 VDDIO_33_PCIGP_7 VDDIO_33_PCIGP_8 VDDIO_33_PCIGP_9 VDDIO_33_PCIGP_10 VDDIO_33_PCIGP_11 VDDIO_33_PCIGP_12
CLKGEN I/O
C474 22U/6.3V_8
AH1 V6 Y19 AE5 AC21 AA2 AB4 AC8 AA7 AA9 AF7 AA19
PCI/GPIO I/O
131mA
*0_8/S
FLASH I/O
VDDQ--3.3V I/O power R241
+3V
15
PV,change to short pad
VDD-- S/B CORE power
+3.3V_SB_R
PBY160808T-221Y-N(220,2A) L71 +1.1VS5
197mA C760 10U/6.3V_8
C759 0.1U/10V_4
C758 0.1U/10V_4
32mA
PBY160808T-221Y-N(220,2A) L45 +3V
C529 *0.1U/10V_4
C527 2.2U/6.3V_6
SB820M A12
M19
VSSXL
P21 P20 M22 M24 M26 P22 P24 P26 T20 T22 T24 V20 J23
VSSIO_PCIECLK_1 VSSIO_PCIECLK_2 VSSIO_PCIECLK_3 VSSIO_PCIECLK_4 VSSIO_PCIECLK_5 VSSIO_PCIECLK_6 VSSIO_PCIECLK_7 VSSIO_PCIECLK_8 VSSIO_PCIECLK_9 VSSIO_PCIECLK_10 VSSIO_PCIECLK_11 VSSIO_PCIECLK_12 VSSIO_PCIECLK_13
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52
GROUND
5
VSSPL_SYS VSSIO_PCIECLK_14 VSSIO_PCIECLK_15 VSSIO_PCIECLK_16 VSSIO_PCIECLK_17 VSSIO_PCIECLK_18 VSSIO_PCIECLK_19 VSSIO_PCIECLK_20 VSSIO_PCIECLK_21 VSSIO_PCIECLK_22 VSSIO_PCIECLK_23 VSSIO_PCIECLK_24 VSSIO_PCIECLK_25 VSSIO_PCIECLK_26 VSSIO_PCIECLK_27
AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W 10 AJ28 B29 U4 Y18 Y10 Y12 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8
D
C
M20 H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W 21 W 20 AE26 L21 K20
B
Part 5 of 5 SB820M A12 +3V
SI , remove R272 from AMD recommand +VDDIO_AZ
+VDDPL_3.3V
L76 PBY160808T-221Y-N(220,2A) C790 2.2U/6.3V_6
C496 2.2U/6.3V_6
+3VS5
+VDDPL_1.1V
L81 PBY160808T-221Y-N(220,2A)
+3VS5
A
+1.1V
C534 *0.1U/10V_4
C799 2.2U/6.3V_6
C546 *0.1U/10V_4
+VDDAN_3.3VHWM +3VS5 L41
*0_6/S C499 *2.2U/6.3V_6
C501 0.1U/10V_4
A
+VDDPL_3.3V_USB
To meet SB800 SCL1.02: Separate ferrite bead is not required for VDDPL_33_USB_S, Del B603/600ohm bead.
C533 2.2U/6.3V_6
PROJECT : AX2/7 Quanta Computer Inc.
C536 0.1U/10V_4
SI , remove L48 Size Custom NB5/RD2
Document Number
Date: Tuesday, December 22, 2009
5
4
3
http://laptop-schematic.com/ 2
Rev 1A
SB820-PWR/DECOUPLING 4/4 1
Sheet
15
of
42
5
4
3
2
1
16
intermal have pull Hi 10K , confirm AMD ward this pull Hi not need
OVERLAP COMMON PADS WHERE POSSIBLE FOR DUAL-OP RESISTORS.
REQUIRED STRAPS
It must ready before RSMRST# +3VS5
D
D
+VDDIO_AZ
+3V
+3VS5
+3VS5
INT CLK GEN
R307 10K/F_4
R257 *10K/F_4 13
ACZ_SDOUT
12 PCI_CLK_TPM
R258 10K/F_4
12
PCI_CLK2
12
PCI_CLK3
12
R446
R304
10K/F_4
10K/F_4
PCI_CLK4
12
LPC_CLK0
12
R448
R447
R445
R298
10K/F_4
10K/F_4
10K/F_4
10K/F_4
LPC_CLK1
R461 *10K/F_4
12
13 13
RTC_CLK
SB_GPIO200 SB_GPIO199
R305
GPIO199
R309 *2.2K_4
*10K/F_4
R299 2.2K_4
GPIO200
EXT CLK GEN PV, add it to force PCIE of SB820 at Gen I
C
C
REQUIRED STRAPS
PULL HIGH
AZ_SDOUT
PCI_CLK1
PCI_CLK2
LOW POWER MODE
ALLOW PCIE Gen2
Watchdog Timer Enabled
USE DEBUG STRAP
Watchdog Timer Disabled
IGNORE DEBUG STRAP
DEFAULT
DEFAULT
DEFAULT
PULL LOW
PERFORMANCE FORCE MODE PCIE Gen1 DEFAULT
PCI_CLK3
PCI_CLK4 non_Fusion CLOCK MODE
LPC_CLK0 EC ENABLED
DEFAULT
FUSION CLOCK MODE
LPC_CLK1
GPIO200
CLKGEN ENABLED
H,H = Reserved
DEFAULT
EC DISABLED
GPIO199
H,L = SPI ROM
CLKGEN DISABLED
L,H = LPC ROM (Default) L,L = FWH ROM
DEFAULT
NB_PWRGD_IN: RS780/RX780 = 1.8V; RS740 = 3.3V Do NOT share it with SB_PWRGD when use Internal Clk Gen (Need SB PLL initialize firstly)
DEBUG STRAPS SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23] B
B
R271
+3VS5
10K/F_4
R270
SB_PWRGD_IN
*0_4/S
SB_PWRGD_IN 13
C475 *2.2U/6.3V_6 12 12 12 12,39 12
NB/SB POWER GOOD CIRCUIT
+1.8V
AD27 AD26 AD25 AD24 AD23
+1.8V U15 1 2
36 VRM_PWRGD R442 *2.2K_4
R463 *2.2K_4
R467 *2.2K_4
R464 *2.2K_4
R465 *2.2K_4
2 3
Use 2.2K PD.
C465
5
*0.1U/10V_4
RX780,RS780
A GND
R237 300_4
Y
R235
4
*33_4
NB_PWRGD_IN
D20 BAT54A
A
PULL LOW
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
USE PCI PLL
DISABLE ILA AUTORUN
USE FC PLL
USE DEFAULT PCIE STRAPS
DISABLE PCI MEM BOOT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
BYPASS PCI PLL
ENABLE ILA AUTORUN
BYPASS FC PLL
USE EEPROM PCIE STRAPS
*0_4/S
WD_PWRGD 13
AL17SZ17000
IC(5P) NL17SZ17DFT2G(SOT-353)
SOT-353
ALUC1G17000
IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5)
SOT23-5
ENABLE PCI MEM BOOT
Size Custom
Document Number
3
http://laptop-schematic.com/ 2
Rev 1A
SB820-STRAPS
Date: Thursday, December 24, 2009
4
A
PROJECT : AX2/7 Quanta Computer Inc. NB5/RD2
5
10
PV,change to short pad R232
PULL HIGH
NB_PWRGD_IN
*NL17SZ17DFT2G SOT-353
1
5,32 ECPWROK
3
NC VCC
1
Sheet
16
of
42
5
4
3
2
1
17
U24G DP E/F POWER
U24A +1.8V_DPE_VDD18
DP A/B POWER +1.8V_DPA_VDD18
AG15 AG16
DPE_VDD18#1 DPE_VDD18#2
DPA_VDD18#1 DPA_VDD18#2
AE11 AF11
AG20 AG21
DPE_VDD10#1 DPE_VDD10#2
DPA_VDD10#1 DPA_VDD10#2
AF6 AF7
AG14 AH14 AM14 AM16 AM18
DPE_VSSR#1 DPE_VSSR#2 DPE_VSSR#3 DPE_VSSR#4 DPE_VSSR#5
DPA_VSSR#1 DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5
AE1 AE3 AG1 AG6 AH5
AF16 AG17
DPF_VDD18#1 DPF_VDD18#2
DPB_VDD18#1 DPB_VDD18#2
AE13 AF13
AF22 AG22
DPF_VDD10#1 DPF_VDD10#2
DPB_VDD10#1 DPB_VDD10#2
AF8 AF9
AF23 AG23 AM20 AM22 AM24
DPF_VSSR#1 DPF_VSSR#2 DPF_VSSR#3 DPF_VSSR#4 DPF_VSSR#5
DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5
AF10 AG9 AH8 AM6 AM8
AF17
DPEF_CALR
DPAB_CALR
AE10
DPA_PVDD DPA_PVSS
AG8 AG7
+1.8V_DPA_PVDD
DPB_PVDD DPB_PVSS
AG10 AG11
+1.8V_DPA_PVDD
2.5GT/s bit rate 9 9
PEG_TX0 PEG_TX#0
9 9
PEG_TX1 PEG_TX#1
9 9
PEG_TX#2 PEG_TX2
9 9
PEG_TX3 PEG_TX#3
9 9
PEG_TX4 PEG_TX#4
9 9
PEG_TX5 PEG_TX#5
9 9
PEG_TX6 PEG_TX#6
9 9
PEG_TX#7 PEG_TX7
9 9
PEG_TX8 PEG_TX#8
PEG_TX0 PEG_TX#0
AF30 AE31
PCIE_RX0P PCIE_RX0N
PCIE_TX0P PCIE_TX0N
AH30 AG31
C_PEG_RXN0 C_PEG_RXP0
C239 C233
0.1U/10V_4 0.1U/10V_4
PEG_TX1 PEG_TX#1
AE29 AD28
PCIE_RX1P PCIE_RX1N
PCIE_TX1P PCIE_TX1N
AG29 AF28
C_PEG_RXP1 C_PEG_RXN1
C240 C249
0.1U/10V_4 0.1U/10V_4
PEG_TX#2 PEG_TX2
AD30 AC31
PCIE_RX2P PCIE_RX2N
PCIE_TX2P PCIE_TX2N
AF27 AF26
C_PEG_RXP2 C_PEG_RXN2
C251 C263
0.1U/10V_4 0.1U/10V_4
PEG_TX3 PEG_TX#3
AC29 AB28
PCIE_RX3P PCIE_RX3N
PCIE_TX3P PCIE_TX3N
AD27 AD26
C_PEG_RXP3 C_PEG_RXN3
C231 C220
0.1U/10V_4 0.1U/10V_4
PEG_TX4 PEG_TX#4
AB30 AA31
PCIE_RX4P PCIE_RX4N
PCIE_TX4P PCIE_TX4N
AC25 AB25
C_PEG_RXP4 C_PEG_RXN4
C282 C289
0.1U/10V_4 0.1U/10V_4
PEG_TX5 PEG_TX#5
AA29 Y28
PCIE_RX5P PCIE_RX5N
PCIE_TX5P PCIE_TX5N
Y23 Y24
C_PEG_RXP5 C_PEG_RXN5
C267 C279
0.1U/10V_4 0.1U/10V_4
PEG_TX6 PEG_TX#6
Y30 W 31
PCIE_RX6P PCIE_RX6N
PCIE_TX6P PCIE_TX6N
AB27 AB26
C_PEG_RXP6 C_PEG_RXN6
C292 C303
0.1U/10V_4 0.1U/10V_4
PEG_TX#7 PEG_TX7
W 29 V28
PCIE_RX7P PCIE_RX7N
PCIE_TX7P PCIE_TX7N
Y27 Y26
C_PEG_RXP7 C_PEG_RXN7
C308 C317
0.1U/10V_4 0.1U/10V_4
PEG_TX8 PEG_TX#8
V30 U31
PCIE_RX8P PCIE_RX8N
PCIE_TX8P PCIE_TX8N
W 24 W 23
C_PEG_RXP8 C_PEG_RXN8
C328 C337
*0.1U/10V_4 *0.1U/10V_4
PEG_RX0 9 PEG_RX#0 9
+1.0V_DPE_VDD10
+1.0V_DPB_VDD10
D
D
PEG_RX1 9 PEG_RX#1 9 PEG_RX2 9 PEG_RX#2 9
+1.0V_VGA
9 9
PEG_TX#9 PEG_TX9
9 9
PEG_TX10 PEG_TX#10
9 9
PEG_TX#11 PEG_TX11
9 9
PEG_TX12 PEG_TX#12
9 9
PEG_TX13 PEG_TX#13
9 9
PEG_TX14 PEG_TX#14
9 9
B
PEG_TX#9 PEG_TX9
U29 T28
PCIE_RX9P PCIE_RX9N
PCIE_TX9P PCIE_TX9N
V27 U26
PEG_TX10 PEG_TX#10
T30 R31
PCIE_RX10P PCIE_RX10N
PCIE_TX10P PCIE_TX10N
U24 U23
PEG_TX#11 PEG_TX11
R29 P28
PCIE_RX11P PCIE_RX11N
PCIE_TX11P PCIE_TX11N
T26 T27
PEG_TX12 PEG_TX#12
P30 N31
PCIE_RX12P PCIE_RX12N
PCIE_TX12P PCIE_TX12N
T24 T23
PEG_TX13 PEG_TX#13
N29 M28
PCIE_RX13P PCIE_RX13N
PCIE_TX13P PCIE_TX13N
PEG_TX14 PEG_TX#14
M30 L31
PCIE_TX14P PCIE_TX14N
PEG_TX15 PEG_TX#15
PEG_TX15 PEG_TX#15
L29 K30
PCIE_RX14P PCIE_RX14N PCIE_RX15P PCIE_RX15N
PCIE_TX15P PCIE_TX15N
PCI EXPRESS INTERFACE
C
C_PEG_RXP9 C_PEG_RXN9
C324 C318
*0.1U/10V_4 *0.1U/10V_4
C_PEG_RXP10 C_PEG_RXN10
C338 C343
*0.1U/10V_4 *0.1U/10V_4
C_PEG_RXP11 C_PEG_RXN11
C345 C354
*0.1U/10V_4 *0.1U/10V_4
C_PEG_RXP12 C_PEG_RXN12
C358 C368
*0.1U/10V_4 *0.1U/10V_4
P27 P26
C_PEG_RXP13 C_PEG_RXN13
C380 C370
*0.1U/10V_4 *0.1U/10V_4
P24 P23
C_PEG_RXP14 C_PEG_RXN14
C385 C387
*0.1U/10V_4 *0.1U/10V_4
M27 N26
PEG_RX3 9 PEG_RX#3 9 PEG_RX4 9 PEG_RX#4 9
+1.8V_DPE_VDD18
+1.8V_DPA_VDD18
(Park-S3:
[email protected]) (M9X-S2/S3:
[email protected])
+1.0V_DPB_VDD10 +1.0V_DPE_VDD10
PEG_RX5 9 PEG_RX#5 9 PEG_RX6 9 PEG_RX#6 9 PEG_RX7 9 PEG_RX#7 9
R368
150/F_4
C653 0.1U/10V_4
R121
BLM18PG181SN1D(180,1.5A)_6 L59
C650 10U/6.3V_8
C654 1U/10V_4
150/F_4 C
PEG_RX8 9 PEG_RX#8 9 +1.8V_DPE_PVDD
+1.8V_DPE_PVDD AG18 AF19
+1.8V_DPF_PVDD
+1.8V_DPF_PVDD AG19 R510 0_4 AF20
DPE_PVDD DPE_PVSS
DP PLL POWER
+1.8V_DPA_PVDD
PEG_RX9 9 PEG_RX#9 9 PEG_RX10 9 PEG_RX#10 9
DPF_PVDD DPF_PVSS
+1.8V_DPA_PVDD
PV , reserve for M93
C_PEG_RXP15 C_PEG_RXN15
C383 C386
PARK-S3
PEG_RX11 9 PEG_RX#11 9
M93-S3--NC PARK-S3--install
PEG_RX12 9 PEG_RX#12 9 PEG_RX13 9 PEG_RX#13 9
M93-S3--NC PARK-S3--install
*0.1U/10V_4 *0.1U/10V_4
(Park-S3:
[email protected]) (M9X-S2/S3:
[email protected])
+1.0V_DPE_VDD10 +1.0V_DPE_VDD10
PEG_RX14 9 PEG_RX#14 9
C209 C173 0.1U/10V_4 1U/10V_4
PEG_RX15 9 PEG_RX#15 9
L21
+1.0V_VGA
BLM18PG181SN1D(180,1.5A)_6 C192 10U/6.3V_6
+1.8V_DPA_VDD18 +1.8V_DPA_VDD18 C190 0.1U/10V_4
L23
C260 1U/10V_4
1.8V(130mA) +1.8V_VGA
BLM18PG181SN1D(180,1.5A)_6 C183 10U/6.3V_8 B
+1.8V_DPA_PVDD CLOCK EXT_GFX_CLKP EXT_GFX_CLKN
12 EXT_GFX_CLKP 12 EXT_GFX_CLKN
AK30 AK32
M93-S3--NC PARK-S3--install 10K/F_4
12
R425
+1.8V_DPE_VDD18 C171
CALIBRATION
PCIE_CALRP N10 AL27
PCIE_RST#
PV,change to reserve for MUXLESS
PCIE_REFCLKP PCIE_REFCLKN
PW RGOOD
PCIE_CALRN
0.1U/10V_4
Y22
M72_PCIE_CALRP
R118
1.27K/F_4
AA22
M72_PCIE_CALRN
R386
2K/F_4
1.8V(130mA)
+1.8V_DPA_PVDD L18
C162 C266 1U/10V_4
10U/6.3V_8
+1.8V_VGA
C647 0.1U/10V_4
L58
C268 1U/10V_4
BLM18PG181SN1D(180,1.5A)_6
1.8V(20mA) +1.8V_VGA
BLM18PG181SN1D(180,1.5A)_6 C639 10U/6.3V_8
+1.0V_VGA +1.8V_DPF_PVDD
PERSTB
+1.8V_DPF_PVDD
+1.8V_DPE_PVDD L53
1.8V(20mA)
100MHz (+/-300ppm) input frequency, 0-0.7V single-ended swing
C611 C612 0.1U/10V_4 1U/10V_4
+1.8V_DPE_PVDD
+1.8V_VGA
PARK-S3
BLM18PG181SN1D(180,1.5A)_6 C608 10U/6.3V_8
C150 C145 0.1U/10V_4 1U/10V_4
L15
1.8V(20mA) +1.8V_VGA
BLM18PG181SN1D(180,1.5A)_6 C137 10U/6.3V_8
M93-S3--NC PARK-S3--install
A
A
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2
Document Number
5
4
3
2
http://laptop-schematic.com/
Rev 1A
PARK_PCIE_Interface
Date: Thursday, December 24, 2009 1
Sheet
17
of
42
5
D
0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
4
Vendor
Type
Samsung- E die Hynix - Orion
64*16-800MHZ 64*16-800MHZ
K4W1G1646E-HC12 H5TQ1G63BFR-12C Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
M93-S3/M92-S2
+VDDR4
0
0
R395 R393 R390 R123
0.9V
PBY160808T-121Y-N(120,2.5A) +1.8V_VGA
0
M
1
C673 10U/6.3V_8
0
1.06V
+1.8V_VGA
TBD
1
1
1.12V
M93-S3--NC PARK-S3--install
AB4 AB2 Y8 Y7
C661 10U/6.3V_8
C672 1U/10V_4
*10K/F_4
GPIO24_TRSTB
*10K/F_4
GPIO25_TDI
PV,change to reserv only for delete workaround
R543
TX2P_DPA0P TX2M_DPA0N TXCBP_DPB3P TXCBM_DPB3N
DVDATA_3 / DVPDATA_19 DVDATA_2 / DVPDATA_21 DVDATA_1 / DVPDATA_2 DVDATA_0 / DVPDATA_0
TX3P_DPB2P TX3M_DPB2N
DPB
TX4P_DPB1P TX4M_DPB1N
+1.8V_DPC_VDD18
AC6 AC5
C665 1U/10V_4
C664 0.1U/10V_4
AA5 AA6 +1.1V_DPC_VDD10
DPC_PVDD / DVPDATA_11 DPC_PVSS / GND
C272 1U/10V_4
DPC_VDD18#1/DVPDAT10 DPC_VDD18#2/DVPDAT23
DPC_VDD10#1/DVPDAT15 DPC_VDD10#2/DVPDAT17
DVPDATA_7 / TX0P_DPC2P DVPDATA_1 / TX0M_DPC2N DVPCNTL_MV1 / TX1P_DPC1P DVPDATA_9 / TX1M_DPC1N DVPDATA_13 / TX2P_DPC0P DVPCNTL_1 / TX2M_DPC0N
C273 0.1U/10V_4
U1 W1 U3 Y6 AA1
SI, R128 change to reserve only for MUXLESS
GPIO27_TMS
DPC_VSSR#1 / DVPCLK DPC_VSSR#2 / DVPDAT5 DPC_VSSR#3 / GND DPC_VSSR#4 / GND DPC_VSSR#5/ DVPCNTL_MV0
VDDR4 / DPCD_CALR
R410
*10K/F_4
GPIO28_TDO
R1 R3
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5
19 GPIO0 19 GPIO1 19 GPIO2 T47 T42 19 GPIO5
R407
*10K/F_4
GPIO26_TCK
R128
10,23 LVDS_BLON 19 GPIO8 19 GPIO9
SI , provide 14M CLK source to slove Park JTAG test block intermittently fails to initialize correctly issue
*0_4
EXT_LVDS_BLON GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 HDMI_HP2 GFX_CORE_CNTRL0 OSC_SPREAD VGA_ALERT HPD3 TEMP_FAIL GFX_CORE_CNTRL1 HPD3 GPIO22 GPIO_23_CLKREQb
T44 19 GPIO11 19 GPIO12 19 GPIO13 38 GFX_CORE_CNTRL0
T41 T50
SI , AMD Document Update change PU to PD T48 5 TEMP_FAIL 38 GFX_CORE_CNTRL1 T43 19 GPIO22
GPIO24_TRSTB GPIO25_TDI GPIO26_TCK GPIO27_TMS GPIO28_TDO TESTEN
T54 T52 T55 T57 T56
SI , reserve EEPROM to slove Park JTAG test block intermittently fails to initialize correctly issue B
19
PV,delete workaround EEPROM
150 OHM
*100K/F_4
U6 U10 T10 U8 U7 T9 T8 T7 P10 P4 P2 N6 N5 N3 Y9 N1 M4 R6 W10 M2 P8 P7 N8 N7
L6 L5 L3 L1 K4 AF24 AB13 W8 W9 W7 AD10
GENERICC
GENERICC
25 EXT_TMDS_HPD
AG3 AG5
3.3V(65mA)
L24
+1.8V_AVDD_Q
SCL SDA
C191 0.1U/10V_4
AK3 AK1 AK5 AM3
TXC_HDMI_L+ TXC_HDMI_L-
AK6 AM5
TX0_HDMI_L+ TX0_HDMI_L-
AJ7 AH6
TX1_HDMI_L+ TX1_HDMI_L-
AK8 AL7
TX2_HDMI_L+ TX2_HDMI_L-
C210 1U/10V_4
R363
249/F_4
C194 10U/6.3V_6
C164 0.1U/10V_4
BLM18PG181SN1D(180,1500MA)
1.8V(75mA DPLL_PVDD)
C641
AC14
GPIO_0 GPIO_1 GPIO_2 GPIO_3_SMBDATA GPIO_4_SMBCLK GPIO_5_AC_BATT GPIO_6 GPIO_7_BLON GPIO_8_ROMSO GPIO_9_ROMSI GPIO_10_ROMSCK GPIO_11 GPIO_12 GPIO_13 GPIO_14_HPD2 GPIO_15_PWRCNTL_0 GPIO_16_SSIN GPIO_17_THERMAL_INT GPIO_18_HPD3 GPIO_19_CTF GPIO_20_PWRCNTL_1 GPIO_21_BB_EN GPIO_22_ROMCSB GPIO_23_CLKREQB
JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO TESTEN
+1.8V_A2VDD_Q
1.8V(70mA)
TX1_HDMI_L+ 25 TX1_HDMI_L- 25
L20
+1.8V_A2VDD_Q
+1.8V_VGA
PBY160808T-121Y-N(120,2.5A)
TX2_HDMI_L+ 25 TX2_HDMI_L- 25
C206 0.1U/10V_4
C278 1U/10V_4
C187 10U/6.3V_8 M93-S3--NC PARK-S3--install
V4 U5 W3 V2
+VDDD1
1.8V(45mA VDD1DI) Y4 W5
L56
+VDDD1
+1.8V_VGA
PBY160808T-121Y-N(120,2.5A)
AA3 Y2 AA12 R120
For M93-S3: Use 150 Ohms Pull Down For M92-S2: Use 0R to VDDR4 For Park-S3: NC
*150/F_4
C627 0.1U/10V_4
C628 1U/10V_4
C633 10U/6.3V_6
DIS R RB G GB B BB
DAC1
HSYNC VSYNC RSET AVDD AVSSQ VDD1DI VSS1DI
AM26 AK26
L_CRT_R
AL25 AJ25
L_CRT_G
AH24 AG25
L_CRT_B
*150/F_4 *0_4
L_CRT_G
R373 R14
*150/F_4 *0_4
R374 R12
*150/F_4 *0_4
R46 R48
HSYNC_COM_R VSYNC_COM_R R365
499/F_4
+VDDD1
*0_4 *0_4
Pure DIS need install CRT_R
10,24
CRT_G
10,24
CRT_B
10,24
HSYNC_COM VSYNC_COM
+3V_DELAY C
HSYNC_COM_R
R360
*10K/F_4
VSYNC_COM_R
R359
*10K/F_4
10,24 10,24
SI , reserve R46,R48 for MUXLESS
+1.8V_AVDD_Q
AG24 AE22 AE23 AD23
R372 R18
L_CRT_B
AH26 AJ27 AD22
L_CRT_R
+1.8V_AVDD_Q
+VDDD1
M92-S2/M93-S3 R2 / NC R2B / NC G2 / NC G2B / NC B2 / NC B2B / NC
AM12 AK12
C644
22P/50V_4
AL11 AJ11
EVGA-XTALI
CL=20PF
AK10 AL9
Y5 27MHZ
R379 10M_6
C649
For Int Clk 27Mhz
EVGA-XTALO 22P/50V_4
DAC2
GENERICA GENERICB GENERICC GENERICD GENERICE_HPD4
C / NC Y / NC COMP / NC H2SYNC V2SYNC VDD2DI / NC VSS2DI / NC
HPD1
A2VDD / NC +0.6V_M92_VREFG AC16
A2VDDQ / NC VREFG
0.1U/10V_4
R2SET / NC
AH12 AM10 AJ9 AL13 AJ13
DAC2_VSY DAC2_HSY
AD19 AC19
R514 R523
0_4 0_4
AE20
R524
0_4
AE17
+1.8V_A2VDD_Q
DAC2_VSY DAC2_HSY +VDDD1
19 19
B
PV,reserve for M93
+VDDD1
Thermal Sensor
TESTEN
+1.0V_VGA
TESTEN 21
1U/10V_4
C629 0.1U/10V_4
PLL/CLOCK
L60
BLM18PG181SN1D(180,1500MA)
+1.0V_DPLL_VDDC C640 10U/6.3V_8
C643 1U/10V_4
C275 0.1U/10V_4
EVGA-XTALI EVGA-XTALO R195 R196
SI , add R103 , remove R165 from AMD update
AF14 AE14 AD14
AM28 AK28 *0_4/S AC22 *0_4/S AB22
DPLL_PVDD DPLL_PVSS
A
+3V_DELAY
R126
*10K/F_4
+3V_DELAY
R417
*10K/F_4 GPIO_23_CLKREQb
R236
10K/F_4
EXT_LVDS_BLON
+1.8V_VGA
1.8V(20mA TSVDD)
VGATHRM+ VGATHRM-
L57 C638
C646
10U/6.3V_8
1U/10V_4
T4 T2
DPLL_VDDC
DDC2CLK DDC2DATA
XTALIN XTALOUT NC#2/XO_IN NC#1/XO_IN2
DPLUS DMINUS
+1.8V_TSVDD
R5 AD17 AC17
THERMAL
AUX2P AUX2N DDCCLK_AUX5P DDCDATA_AUX5N DDC6CLK DDC6DATA NC/DDCCLK_AUX3P NC/DDCDATA_AUX3N
C261 0.1U/10V_4
DDC1CLK DDC1DATA AUX1P AUX1N
PV,change to short pad PBY160808T-121Y-N(120,2.5A)
PV,change to pull low for delete workaround
5,32 715/F_4
M93-S3--NC PARK-S3--install
MBDATA2 +3V_DELAY
R384 R385 R383
*0_4/S *0_4/S 10K/F_4
DDC/AUX
+1.8V_DPLL_PVDD
1.0V(125mA DPLL_VDDC) R165 10K/F_4
MBCLK2
AE19 R369
AE6 AE5
HDMI_SCL HDMI_SDA
R398
U23
+1.8V_A2VDD_Q 5,32
AG13
781-1_3V
+A2VDD MB_CLK2
8
MB_DATA2
7
VGA_ALERT
6 5
C634 C614 10U/6.3V_8
C149 10U/6.3V_8
D
TX0_HDMI_L+ 25 TX0_HDMI_L- 25
L52
R103 *10K/F_4
C160 1U/10V_4
SI , need pull high near chip side for MUXLESS change to reserve only
A2VSSQ
+1.8V_VGA
+3V_DELAY
BLM18PG181SN1D(180,1.5A)_6
TXC_HDMI_L+ 25 TXC_HDMI_L- 25
I2C
1.8V+R6043(249R)=1.8V/3=0.6V R371 499/F_4 R370
L17
+A2VDD
+1.8V_VGA
PBY160808T-121Y-N(120,2.5A)
AH3 AH1
+1.8V_VGA
+3V_DELAY
18
+A2VDD
1.8V(70mA)
DPC
GENERAL PURPOSE I/O
SI , add R409 , R543 from AMD update
+1.8V_AVDD_Q
SI,change to reserve only for MUXLESS
10,23 EDIDCLK 10,23 EDIDDATA
*10K/F_4
AF2 AF4
1
*10K/F_4
1
M92-S2/M93-S3 DVPDATA_3/TXCCP_DPC3P DVPCNTL_2/TXCCM_DPC3N
C
R409
2
M93-S3/M92-S2 W6 V6
L78
+3V_DELAY
R129
TX1P_DPA1P TX1M_DPA1N
TX5P_DPB0P TX5M_DPB0N
GPIO22
R127
TX0P_DPA2P TX0M_DPA2N
DPA
DVO
C671 0.1U/10V_4
1.1V(110mA DPC_VDD10)
C271 10U/6.3V_8
GPIO22(ROMCS#) PD without external VBIOS ROM
TXCAP_DPA3P TXCAM_DPA3N
DVCNTL_0/ DVPDATA_18 DVCNTL_1 / NC DVCNTL_2 / NC DVDATA_12 / DVPDATA_16 DVDATA_11 / DVPDATA_20 DVDATA_10 / DVPDATA_22 DVDATA_9 / DVPDATA_12 DVDATA_8 / DVPDATA_14 DVDATA_7 / DVPCNTL_0 DVDATA_6 / DVPDATA_8 DVDATA_5 / DVPDATA_6 DVDATA_4 DVPDATA_4
+1.8V_DPC_PVDD
1.8V(130mA DPC_VDD18)
PBY160808T-121Y-N(120,2.5A)
10K/F_4
MEM_ID3 MEM_ID2 MEM_ID1 MEM_ID0
L62
+1.1V
R152
*10K/F_4 *10K/F_4 *10K/F_4 *10K/F_4
1.8V(200mA DPC_PVDD)
PBY160808T-121Y-N(120,2.5A)
1
AE9 L9 N9 AE8 AD9 AC10 AD7 AC8 AC7 AB9 AB8 AB7
L63
0.96V
H
T23 T53 T51 T25 T27 T33 T28 T31 T32 T40 T35 T36
Memory ID
PWRCNTL1 PWRCNTL0 V-CORE L
3
U24B
Vendor P/N
2
MEM_ID[3:0]
SMCLK
VCC
SMDATA
DXP
-ALT
DXN
GND
-OVT
200/F_6
C683
+3V_DELAY
0.1U/10V_4
1 VGATHRM+
2
C684 2200P/50V_4
3
w/s 10 / 10
VGATHRM-
4
G781-1P8@EV
25 25
-VGATHRM R396
I2C ADDRESS: 9AH
+3V_DELAY
10K/F_4
AD2 AD4 AC11 AC13 AD13 AD11
SI , reserve R321 , R331 for MUXLESS AE16 AD16 AC1 AC3
DDCCLK_EXT DDCDATA_EXT
R321 R331
*0_4 *0_4
DDCCLK 10,24 DDCDATA 10,24
AD20 AC20
A
TS_FDO TSVDD TSVSS
LVDS_BLON
PROJECT : AX2/7 Quanta Computer Inc.
PARK-S3
PV,add it from AMD nda update If no contact this pin to LVDS need pull low Size Custom NB5/RD2
Document Number
4
3
2
http://laptop-schematic.com/
Rev 1A
PARK_Main
Date: Thursday, December 24, 2009 5
1
Sheet
18
of
42
5
4
3
U24F
R378
D
M6 N11 N12 N13 N16 N18 N21 P6 P9 R12 R15 R17 R20 T13 T16 T18 T21 T6 U15 U17 U20 U9 V13 V16 V18 Y10 Y15 Y17 Y20
C
PCIE_VSS#1 PCIE_VSS#2 PCIE_VSS#3 PCIE_VSS#4 PCIE_VSS#5 PCIE_VSS#6 PCIE_VSS#7 PCIE_VSS#8 PCIE_VSS#9 PCIE_VSS#10 PCIE_VSS#11 PCIE_VSS#12 PCIE_VSS#13 PCIE_VSS#14 PCIE_VSS#15 PCIE_VSS#16 PCIE_VSS#17 PCIE_VSS#18 PCIE_VSS#19 PCIE_VSS#20 PCIE_VSS#21 PCIE_VSS#22 PCIE_VSS#23 PCIE_VSS#24 PCIE_VSS#25 PCIE_VSS#26 PCIE_VSS#27 PCIE_VSS#28 PCIE_VSS#29 PCIE_VSS#30 PCIE_VSS#31
GND#56 GND#57 GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84
GND#1 GND#2 GND#3 / EVDDQ#2 GND#4 GND#5 GND#6 / EVDDQ#3 GND#7 GND#8 GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#85 GND#86
GND
VSS_MECH#1 VSS_MECH#2 VSS_MECH#3
A3 A30 AA13 AA16 AB10 AB15 AB6 AC9 AD6 AD8 AE7 AG12 AH10 AH28 B10 B12 B14 B16 B18 B20 B22 B24 B26 B6 B8 C1 C32 E28 F10 F12 F14 F16 F18 F2 F20 F22 F24 F26 F6 F8 G10 G27 G31 G8 H14 H17 H2 H20 H6 J27 J31 K11 K2 K22 K6 T11 R11
1
19
SI, R119,R381 change to reserve only for MUXLESS
U24E
AA27 AB24 AB32 AC24 AC26 AC27 AD25 AD32 AE27 AF32 AG27 AH32 K28 K32 L27 M32 N25 N27 P25 P32 R27 T25 T32 U25 U27 V32 W 25 W 26 W 27 Y25 Y32
2
LVDS CONTROL
VARY_BL DIGON
AB11 AB12
*0_4 *0_4
10K/F_4 R381 R119
DPST_PWM 10,23 DISP_ON 10,23
TXCLK_UP_DPF3P TXCLK_UN_DPF3N
AH20 AJ19
EXT_TXUCLKOUT+ 23 EXT_TXUCLKOUT- 23
TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N
AL21 AK20
EXT_TXUOUT0+ 23 EXT_TXUOUT0- 23
TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N
AH22 AJ21
EXT_TXUOUT1+ 23 EXT_TXUOUT1- 23
TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N
AL23 AK22
EXT_TXUOUT2+ 23 EXT_TXUOUT2- 23
TXOUT_U3P TXOUT_U3N
AK24 AJ23
TXCLK_LP_DPE3P TXCLK_LN_DPE3N
AL15 AK14
TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N
RECOMMENDED SETTINGS 0= DO NOT INSTALL RESISTOR 1 = INSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE
CONFIGURATION STRAPS
Close CONN
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET STRAPS
PIN
Transmitter Power Savings Enable
GPIO0
TX_PWRS_ENB
D
DESCRIPTION OF DEFAULT SETTINGS
1
0: 50% Tx output swing for mobile mode 1: full Tx output swing (Default setting for Desktop)
PCI Express Transmitter De-emphasis Enable TX_DEEMPH_EN
GPIO1
BIF_GEN2_EN_A
GPIO2
EXT_TXLCLKOUT+ 23 EXT_TXLCLKOUT- 23
RSVD BIF_VGA_DIS RSVD
GPIO8 GPIO9 GPIO21
AH16 AJ15
EXT_TXLOUT0+ 23 EXT_TXLOUT0- 23
BIOS_ROM_EN
TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N
AL17 AK16
EXT_TXLOUT1+ 23 EXT_TXLOUT1- 23
TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N
AH18 AJ17
EXT_TXLOUT2+ 23 EXT_TXLOUT2- 23
TXOUT_L3P TXOUT_L3N
AL19 AK18
0: Tx de-emphasis disabled for mobile mode 1: Tx de-emphasis enabled (Default setting for Desktop)
1
Enable CLKREQ# Power Management 0 - CLKREQ# power management capability is disabled 1 - CLKREQ# power management capability is enabled
0
LVTMDP
GPIO_22_ROMCSB
ROMIDCFG(2:0)
0 0 0
VGA ENABLED
VIP_DEVICE_STRAP_ENA
V2SYNC
RSVD AUD[1] AUD[0]
GENERICC HSYNC VSYNC
ENABLE EXTERNAL BIOS ROM
0
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
GPIO[13:11]
0 0 1
IGNORE VIP DEVICE STRAPS
0 0 0 11
AUD[1] AUD[0] 0 0 No audio function 0 1 Audio for DisplayPort and HDMI if dongle is detected 1 0 Audio for DisplayPort only 1 1 Audio for both DisplayPort and HDMI
C
PARK-S3
AMD RESERVED CONFIGURATION STRAPS
+3V_DELAY
18
GPIO9
18
GPIO13
18
GPIO12
18
GPIO11
GPIO9
R399
*10K/F_4
GPIO13
R400
*10K/F_4
GPIO12
R420
*10K/F_4
GPIO11
R421
10K/F_4
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET H2SYNC
GENERICC
PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
A32 AM1 AM32
GPIO21_BB_EN
B
B
PARK-S3
+3V_DELAY
Memory Aperture size
Power Up/Down Sequence GPIO9
GPIO13 GPIO12 GPIO11
BIOSROM
ROMIDCFG2
ROMIDCFG1 ROMIDCFG0
18
GPIO0
GPIO0
R397
*10K/F_4
18
GPIO1
GPIO1
R388
*10K/F_4
GPIO2
R389
*10K/F_4
GPIO8
R394
*10K/F_4
R122
*10K/F_4
R366
10K/F_4
R375
10K/F_4
GPIO22
R153
*10K/F_4
GPIO5
R415
10K/F_4
18
+VGA_CORE
VDDC
+VGA_CORE
VDDCI
+1.5V_VGA
0 0 0 0 0 0 0 0
VDDR1
A
+3.3V_Delay
VDDR3
+1.8V_VGA
VDDR4
+1.8V_VGA
VDD_CT
128M 256M 64M 32M 512M 1G 2G 4G
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
GPIO2
18
GPIO8
18 GENERICC 18
DAC2_VSY
18
DAC2_HSY
18
GPIO22
18
GPIO5
A
PROJECT : AX2/7 Quanta Computer Inc.
It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0. 20ms
Size Custom
20ms NB5/RD2
5
4
http://laptop-schematic.com/ 3
2
Document Number
Rev 1A
PARK_GND / LVDS/ Straps
Date: Thursday, December 24, 2009 1
Sheet
19
of
42
5
4
3
2
1
PCIE_VDDR--PCI-E I/O power. 1.8 V ± 5% U24D
PV , change to 0603 part
+1.8V_PCIE_VDDR
MEM I/O PCIE
1.5V ( DDR3, MVDDQ =
[email protected])
+1.5V_VGA
C436 2.2U/6.3V_4
C375 2.2U/6.3V_4
C362 2.2U/6.3V_4
C373 2.2U/6.3V_4
C366 2.2U/6.3V_4
H13 H16 H19 J10 J23 J24 J9 K10 K23 K24 K9 L11 L12 L13 L20 L21 L22
VDDR1#1 VDDR1#2 VDDR1#3 VDDR1#4 VDDR1#5 VDDR1#6 VDDR1#7 VDDR1#8 VDDR1#9 VDDR1#10 VDDR1#11 VDDR1#12 VDDR1#13 VDDR1#14 VDDR1#15 VDDR1#16 VDDR1#17
AA20 AA21 AB20 AB21
VDD_CT#1 VDD_CT#2 VDD_CT#3 VDD_CT#4
C376 2.2U/6.3V_4
D
C750 C736 C441 C445 C449 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S 10U/6.3V_6S
C384 0.1U/10V_4
L22
C381 0.1U/10V_4
C377 0.1U/10V_4
C433 0.1U/10V_4
+1.8V_VDD_CT
1.8V(110mA VDD_CT) PBY160808T-121Y-N(120,2.5A)
+1.8V_VDD_CT LEVEL TRANSLATION
Gated 3.3V 60mA by VDDC
R23
C193 10U/6.3V_6
0_4
C208 1U/10V_4
C294 1U/10V_4
C285 1U/10V_4
C307 0.1U/10V_4 +3V_DELAY
VDD_R3 --IO power for 3.3 V pins (e.g. GPIO’s). 3.3 V ± 5%
+3V_DELAY
3 Q4
R21 *100K/F_4
*AO3409
C281 1U/10V_4
C290 1U/10V_4
C
C295 1U/10V_4
M93-S3/M92-S2 AA17 AA18 AB17 AB18
C274 10U/6.3V_6
V12 Y12 U12
+VDDR4 +1.8V_VGA
+VDDR4
L26
C306
PBY160808T-121Y-N(120,2.5A)
1.8V(170mA VDDR4) *CH501H-40PT L-F 2
3
PV,change from main_on to VGACOREON D8 1
Q3 *2N7002E
AA11 Y11
C243 10U/6.3V_6
C253 1U/10V_4
M93 only
0.1U/10V_4
V11 U11
VDDR3#1 VDDR3#2 VDDR3#3 VDDR3#4
I/O
VDDR4#1 / VDDR5 VDDR4#2 VDDR4#3 / VDDR5 NC#1 / VDDR4 DVCLK / VDDR4 NC#3 / VDDR5 NC / VDDR5
PV , reserve for M93 MEM CLK
*MMZ1005D121C(120,0.35A) R15
32,37,38 VGACOREON
*68.1K_4
2
L48
+1.5V_VGA
C848 *1U/10V_4
L17
VDDRHA
L16
VSSRHA
1
1.8V(40mA PCIE_PVDD) +1.8V_VGA
C9
L61
PLL
PBY160808T-121Y-N(120,2.5A)
*0.1U/10V_4
C655 10U/6.3V_6
+3V_DELAY circuit
C659 1U/10V_4
+PCIE_PVDD C660 0.1U/10V_4
1.0V_VGA(100mA SPV10) +1.0V_VGA
L29
PBY160808T-121Y-N(120,2.5A)
1.8V(75mA MPV18)
B
+1.8V_VGA
L69
BLM18PG181SN1D(180,1500MA)
C350 10U/6.3V_6
MPV18
AM30 L8
MPV18
SPV18
H7
SPV18
H8
SPV10
J7
SPVSS
M11 M12
BBP#1 BBP#2
+1.0V_VGA_SPV10 C378 0.1U/10V_4
PCIE_PVDD
MPV18
C371 1U/10V_4
1.8V(500mA)
+1.8V_PCIE_VDDR
AB23 AC23 AD24 AE24 AE25 AE26 AF25 AG26
C293 0.1U/10V_4
C264 0.1U/10V_4
C217 1U/10V_4
C201 1U/10V_4
C200 1U/10V_4
C269 1U/10V_4
C202 1U/10V_4
+1.8V_VGA
C221 10U/6.3V_6 D
+1.0V_VGA
PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8 PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12 VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8 VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#20 VDDC#21 VDDC#22 VDDC#23 /BIF_VDDC VDDC#19/BIF_VDDC CORE
POWER
1
+3V_VGA
2
+1.8V_VGA
C369 0.1U/10V_4
PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8
20
PBY160808T-221Y-N(220,2A) L25
L23 L24 L25 L26 M22 N22 N23 N24 R22 T22 U22 V22
+1.0V_PCIE_VDDC
C346 1U/10V_4
C332 1U/10V_4
C598 1U/10V_4
C600 1U/10V_4
C596 1U/10V_4
C333 1U/10V_4
C599 1U/10V_4
C316 1U/10V_4
C327 1U/10V_4
C329 1U/10V_4
ISOLATED CORE I/O
VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8
C321 1U/10V_4
C339 1U/10V_4
C314 1U/10V_4
VDDC+VDDCI 0.85~1.1V(15A peak )( Ripple < 87.2mV)
AA15 N15 N17 R13 R16 R18 Y21 T12 T15 T17 T20 U13 U16 U18 V21 V15 V17 V20 Y13 Y16 Y18 R21 U21
C344 1U/10V_4
C101 10U/6.3V_6
M13 M15 M16 M17 M18 M20 M21 N20
C355 1U/10V_4
L14
C365 1U/10V_4
C305 1U/10V_4
C124 10U/6.3V_6
C331 1U/10V_4
+VGA_CORE
C342 1U/10V_4
C330 1U/10V_4
C110 1U/10V_4
C322 1U/10V_4
C348 1U/10V_4
C597 1U/10V_4
C312 1U/10V_4
C315 1U/10V_4
C116 1U/10V_4
C122 1U/10V_4
C89 10U/6.3V_6
C349 1U/10V_4
C605 10U/6.3V_6
+VDDCI C300 10U/6.3V_6
C595 10U/6.3V_6
C
C301 1U/10V_4
C79 10U/6.3V_6
0.95V~1.1V(2A VDDCI)
C361 1U/10V_4
PBY201209T-221Y-N(220,2A)
1.0V(2.0A)
+1.0V_PCIE_VDDC
C103 10U/6.3V_6
C102 10U/6.3V_6
PBY201209T-121Y-N(120,3A) L64 +VGA_CORE
C680 10U/6.3V_6
C313 10U/6.3V_6 B
BACK BIAS C715 1U/10V_4
C714 0.1U/10V_4
+VGA_CORE
L28 BLM18PG181SN1D(180,1.5A)_6
C351 C359 1U/10V_4
0.1U/10V_4 PARK-S3
1.8V(90mA SPV18) +1.8V_VGA
L27
PBY160808T-121Y-N(120,2.5A) C326 1U/10V_4
VDDCI--Isolated (clean) core power for the l/O logic. Voltage level should match that of VDDC. POWER Same as VDDC
SPV18
C325 0.1U/10V_4
VDDC--Dedicated core power, provides power to the internal logic. 0.9 V - 1.2 V (± 5%)
M93-S3--NC PARK-S3--install
PCIE_VDDC--PCI-E Digital Power Supply (Either 1.0 V or 1.1 V) 1.0 V -5% to 1.1 V +5%
VDDRH_1 & VDDRH_2 --Dedicated power pins for memory clock pads for each channel. Should have the same voltage level as VDDR1.
A
A
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2 5
4
3
http://laptop-schematic.com/ 2
Document Number
Rev 1A
PARK_Power_and_NC
Date: Thursday, December 24, 2009 1
Sheet
20
of
42
5
4
3
2
1
21
U24C VMA_ODT0 VMA_ODT1
22 22
VMA_RAS0# VMA_RAS1#
VMA_RAS0# VMA_RAS1#
22 22
VMA_CAS0# VMA_CAS1#
VMA_CAS0# VMA_CAS1#
22 22
VMA_WE0# VMA_WE1#
VMA_WE0# VMA_WE1#
22
VMA_CS0#
VMA_CS0#
22
VMA_CS1#
VMA_CS1#
22 22
VMA_CKE0 VMA_CKE1
VMA_CKE0 VMA_CKE1
22 22
VMA_CLK0 VMA_CLK0#
VMA_CLK0 VMA_CLK0#
22 22
VMA_CLK1 VMA_CLK1#
VMA_CLK1 VMA_CLK1# VMA_WDQS[7..0]
22 VMA_WDQS[7..0]
VMA_RDQS[7..0]
22 VMA_RDQS[7..0]
VMA_DM[7..0]
22 VMA_DM[7..0]
VMA_DQ[63..0]
22 VMA_DQ[63..0]
VMA_MA[13..0]
22 VMA_MA[13..0] 22 22 22
VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7 VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15 VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23 VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31 VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47 VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55 VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63
VMA_BA0 VMA_BA1 VMA_BA2
VMA_BA0 VMA_BA1 VMA_BA2
C
support 1Gbit VRAM ( 64M X 16 )
DIVIDER RESISTORS
M93
MVREF TO 1.8V (Rd)
PARK
100R
MVREF TO GND (Re)
40.2R
100R
100R
+1.5V_VGA
R209 40.2/F_4
Rd
PLACE MVREFD DIVIDERS AND CAPS CLOSE TO ASIC MVREFD +1.5V_VGA
B
C432 0.1U/10V_4
100/F_4
18
R430 R550
TESTEN
TESTEN
R226 40.2/F_4
DQA_0 DQA_1 DQA_2 DQA_3 DQA_4 DQA_5 DQA_6 DQA_7 DQA_8 DQA_9 DQA_10 DQA_11 DQA_12 DQA_13 DQA_14 DQA_15 DQA_16 DQA_17 DQA_18 DQA_19 DQA_20 DQA_21 DQA_22 DQA_23 DQA_24 DQA_25 DQA_26 DQA_27 DQA_28 DQA_29 DQA_30 DQA_31 DQA_32 DQA_33 DQA_34 DQA_35 DQA_36 DQA_37 DQA_38 DQA_39 DQA_40 DQA_41 DQA_42 DQA_43 DQA_44 DQA_45 DQA_46 DQA_47 DQA_48 DQA_49 DQA_50 DQA_51 DQA_52 DQA_53 DQA_54 DQA_55 DQA_56 DQA_57 DQA_58 DQA_59 DQA_60 DQA_61 DQA_62 DQA_63
K26 J26 J25
+1.5V_VGA
R201
Re
K27 J29 H30 H32 G29 F28 F32 F30 C30 F27 A28 C28 E27 G26 D26 F25 A25 C25 E25 D24 E23 F23 D22 F21 E21 D20 F19 A19 D18 F17 A17 C17 E17 D16 F15 A15 D14 F13 A13 C13 E11 A11 C11 F11 A9 C9 F9 D8 E7 A7 C7 F7 A5 E5 C3 E1 G7 G6 G1 G3 J6 J1 J3 J5
Rd
243/F_4 0_4 Note
3 K7
R132
150/F_4
R431
243/F_4 DRAM_RST L10
Note 2 J8 Note 1 K25
PV , reserve for M93 MVREFS
CLKTESTA CLKTESTB C442 0.1U/10V_4
K8 L7
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_BA2 VMA_BA0 VMA_BA1
MAA_0 MAA_1 MAA_2 MAA_3 MAA_4 MAA_5 MAA_6 MAA_7 MAA_8 MAA_9 MAA_10 MAA_11 MAA_12 MAA_13/BA2 MAA_14/BA0 MAA_15/BA1
K17 J20 H23 G23 G24 H24 J19 K19 J14 K14 J11 J13 H11 G11 J16 L15
DQMA_0 DQMA_1 DQMA_2 DQMA_3 DQMA_4 DQMA_5 DQMA_6 DQMA_7
E32 E30 A21 C21 E13 D12 E3 F4
VMA_DM0 VMA_DM1 VMA_DM2 VMA_DM3 VMA_DM4 VMA_DM5 VMA_DM6 VMA_DM7
RDQSA_0 RDQSA_1 RDQSA_2 RDQSA_3 RDQSA_4 RDQSA_5 RDQSA_6 RDQSA_7
H28 C27 A23 E19 E15 D10 D6 G5
VMA_RDQS0 VMA_RDQS1 VMA_RDQS2 VMA_RDQS3 VMA_RDQS4 VMA_RDQS5 VMA_RDQS6 VMA_RDQS7
W DQSA_0 W DQSA_1 W DQSA_2 W DQSA_3 W DQSA_4 W DQSA_5 W DQSA_6 W DQSA_7
H27 A27 C23 C19 C15 E9 C5 H4
VMA_WDQS0 VMA_WDQS1 VMA_WDQS2 VMA_WDQS3 VMA_WDQS4 VMA_WDQS5 VMA_WDQS6 VMA_WDQS7
ODTA0 ODTA1
L18 K16
VMA_ODT0 VMA_ODT1
CLKA0 CLKA0B
H26 H25
VMA_CLK0 VMA_CLK0#
CLKA1 CLKA1B
G9 H9
VMA_CLK1 VMA_CLK1#
RASA0B RASA1B
G22 G17
VMA_RAS0# VMA_RAS1#
CASA0B CASA1B
G19 G16
VMA_CAS0# VMA_CAS1#
CSA0B_0 CSA0B_1
H22 J22
VMA_CS0#
CSA1B_0 CSA1B_1
G13 K13
VMA_CS1#
MVREFDA MVREFSA
CKEA0 CKEA1
K20 J17
VMA_CKE0 VMA_CKE1
MEM_CALRN0 NC/TESTEN#2
W EA0B W EA1B
G25 H10
VMA_WE0# VMA_WE1#
PX_EN RSVD#2 RSVD#3
AB16 G14 G20
MEMORY INTERFACE
D
VMA_ODT0 VMA_ODT1
22 22
MEM_CALRP1/DPC_CALR MEM_CALRP0
D
Designator
M9X-S2 and M93-S3
Ra
DNI
R551
0_4 VMA_MA13
PV,reserve for M93
CLKTESTA CLKTESTB
0R/Short
51R
Rc
2.2K
DNI
Ca
2.2nF
68pF
C
+1.5V_VGA
R202
51/F_4
DRAM_RST
R221 *2.2K_4
Rc
DRAM_RST_M
DRAM_RST_M 22
Rb Ca
R194
68P/50V_4
Ra
10K/F_4
PV , update from AMD ref136-rev10
B
For PARK-S3 only For M9X-S2/S3 with DDR3: this pin is not in use.
R215 100/F_4
PARK-S3
Re C692 0.1U/10V_4
R547 *4.7K_4
R548 *4.7K_4
PV , reserve for M93 A
For M93-S3 only
R402 51.1/F_4
C689 0.1U/10V_4
R401 51.1/F_4
route 50ohms single-ended/100ohms diff and keep short For PARK-S3 only
A
Note 1 :Do not Install for M9X-S2/S3, Install 240 Ohms 0.5% Resistor for PARK-S3. Note 2 :For M9X-S2/S3,J8 Pin Connect to VSS through 240 Ohms(0.5%) resistor. For Park-S3,J8 Pin Connect to VSS through 150 Ohms(1%) resistor for DPC_CALR Note 3 :For M9X-92/93, K7 Pin (NC_MEM_CALRP1) is Not connected. For PARK-S3, K7 Pin (TESTEN#2) connect to TEST_EN Signal At AF24
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2
5
10K
Rb
C437
DRAM_RST
Park-S3
4
3
http://laptop-schematic.com/ 2
Document Number
Rev 1A
PARK/MEM_Interface
Date: Thursday, December 24, 2009 1
Sheet
21
of
42
5
4
VMA_MA[13..0]
21 VMA_MA[13..0] 21 VMA_DM[7..0]
3
U13
D
VREFC_VMA1 VREFD_VMA1
M9 H2
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13
N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3 BA0 BA1 BA2
21 21 21
VMA_BA0 VMA_BA1 VMA_BA2
M3 N9 M4
21 21 21
VMA_CLK0 VMA_CLK0# VMA_CKE0
J8 K8 K10
21 21 21 21 21
VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0#
K2 L3 J4 K4 L4 VMA_RDQS2 VMA_RDQS0
F4 C8
VMA_DM2 VMA_DM0
E8 D4
VMA_WDQS2 VMA_WDQS0
G4 B8
C
T3
21 DRAM_RST_M VMA_ZQ1
L9
Should be 240 Ohms +-1%
A1 T1 A11 T11
R223 243/F_4
J2 L2 J10 L10
U26
VREFCA VREFDQ
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E4 F8 F3 F9 H4 H9 G3 H8
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D8 C4 C9 C3 A8 A3 B9 A4
VMA_DQ20 VMA_DQ18 VMA_DQ22 VMA_DQ17 VMA_DQ23 VMA_DQ16 VMA_DQ21 VMA_DQ19
M9 H2
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13
N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3
VMA_BA0 VMA_BA1 VMA_BA2
M3 N9 M4
BA0 BA1 BA2
VMA_DQ0 VMA_DQ5 VMA_DQ1 VMA_DQ4 VMA_DQ2 VMA_DQ7 VMA_DQ3 VMA_DQ6 +1.5V_VGA
B3 D10 G8 K3 K9 N2 N10 R2 R10
ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10
A2 A9 C2 C10 D3 E10 F2 H3 H10
VMA_ODT0 VMA_CS0# VMA_RAS0# VMA_CAS0# VMA_WE0# VMA_RDQS3 VMA_RDQS1
F4 C8
A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10
VMA_DM3 VMA_DM1
E8 D4
VMA_WDQS3 VMA_WDQS1
G4 B8
CK CK CKE/CKE0
DML DMU
VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10
DQSL DQSU
RESET ZQ/ZQ0
NC/ODT1 NC/CS1 NC/CE1 NC/ZQ1
VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 VSSQ#E9 VSSQ#F10 VSSQ#G2 VSSQ#G10
VMA_CLK0 VMA_CLK0# VMA_CKE0
VREFCA VREFDQ
J8 K8 K10
+1.5V_VGA
K2 L3 J4 K4 L4
VMA_ZQ2
Should be 240 Ohms +-1% R435 243/F_4
100-BALL SDRAM DDR3 K4W1G1646E-HC12
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D8 C4 C9 C3 A8 A3 B9 A4
VMA_DQ15 VMA_DQ10 VMA_DQ13 VMA_DQ9 VMA_DQ12 VMA_DQ8 VMA_DQ14 VMA_DQ11
ZQ/ZQ0 NC NC NC NC NC/ODT1 NC/CS1 NC/CE1 NC/ZQ1
M9 H2
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13
N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3
VMA_BA0 VMA_BA1 VMA_BA2
M3 N9 M4
BA0 BA1 BA2
VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10 VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 VSSQ#E9 VSSQ#F10 VSSQ#G2 VSSQ#G10
+1.5V_VGA
21 21 21
VMA_CLK1 VMA_CLK1# VMA_CKE1
J8 K8 K10
21 21 21 21 21
VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1#
K2 L3 J4 K4 L4
A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10
VMA_RDQS4 VMA_RDQS5
F4 C8
VMA_DM4 VMA_DM5
E8 D4
VMA_WDQS4 VMA_WDQS5
G4 B8
+1.5V_VGA
+1.5V_VGA
VREFCA VREFDQ
VMA_ZQ3
Should be 240 Ohms +-1%
B2 B10 D2 D9 E3 E9 F10 G2 G10
R210 243/F_4
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D8 C4 C9 C3 A8 A3 B9 A4
VMA_DQ43 VMA_DQ44 VMA_DQ40 VMA_DQ47 VMA_DQ42 VMA_DQ45 VMA_DQ41 VMA_DQ46
ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10 VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10
RESET ZQ/ZQ0 NC NC NC NC
J2 L2 J10 L10
VMA_DQ38 VMA_DQ32 VMA_DQ36 VMA_DQ34 VMA_DQ39 VMA_DQ33 VMA_DQ37 VMA_DQ35
NC/ODT1 NC/CS1 NC/CE1 NC/ZQ1
VREFC_VMA4 VREFD_VMA4
M9 H2
VMA_MA0 VMA_MA1 VMA_MA2 VMA_MA3 VMA_MA4 VMA_MA5 VMA_MA6 VMA_MA7 VMA_MA8 VMA_MA9 VMA_MA10 VMA_MA11 VMA_MA12 VMA_MA13
N4 P8 P4 N3 P9 P3 R9 R3 T9 R4 L8 R8 N8 T4 T8 M8
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 A14 A15/BA3
VMA_BA0 VMA_BA1 VMA_BA2
M3 N9 M4
BA0 BA1 BA2
+1.5V_VGA
DQSL DQSU
A1 T1 A11 T11
E4 F8 F3 F9 H4 H9 G3 H8
B3 D10 G8 K3 K9 N2 N10 R2 R10
DML DMU
L9
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10
CK CK CKE/CKE0
DRAM_RST_M T3
100-BALL SDRAM DDR3 K4W1G1646E-HC12
+1.5V_VGA
22
U27
VREFC_VMA3 VREFD_VMA3
+1.5V_VGA
A2 A9 C2 C10 D3 E10 F2 H3 H10
RESET
J2 L2 J10 L10
VMA_DQ27 VMA_DQ31 VMA_DQ25 VMA_DQ29 VMA_DQ30 VMA_DQ28 VMA_DQ24 VMA_DQ26
ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10
DQSL DQSU
A1 T1 A11 T11
E4 F8 F3 F9 H4 H9 G3 H8
B3 D10 G8 K3 K9 N2 N10 R2 R10
DML DMU
L9
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10
CK CK CKE/CKE0
DRAM_RST_M T3
B2 B10 D2 D9 E3 E9 F10 G2 G10
1
U12
VREFC_VMA2 VREFD_VMA2
VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10
NC NC NC NC
2
512MB DDR3
21 VMA_DQ[63..0] 21 VMA_WDQS[7..0] 21 VMA_RDQS[7..0]
VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 VSSQ#E9 VSSQ#F10 VSSQ#G2 VSSQ#G10
VMA_CLK1 VMA_CLK1# VMA_CKE1
J8 K8 K10
A2 A9 C2 C10 D3 E10 F2 H3 H10
VMA_ODT1 VMA_CS1# VMA_RAS1# VMA_CAS1# VMA_WE1#
K2 L3 J4 K4 L4
VMA_RDQS6 VMA_RDQS7
F4 C8
A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10
VMA_DM6 VMA_DM7
E8 D4
VMA_WDQS6 VMA_WDQS7
G4 B8
+1.5V_VGA
DRAM_RST_M T3 VMA_ZQ4
Should be 240 Ohms +-1%
B2 B10 D2 D9 E3 E9 F10 G2 G10
R432 243/F_4
L9 A1 T1 A11 T11 J2 L2 J10 L10
100-BALL SDRAM DDR3 K4W1G1646E-HC12
+1.5V_VGA
VREFCA VREFDQ
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E4 F8 F3 F9 H4 H9 G3 H8
VMA_DQ48 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ49 VMA_DQ51 VMA_DQ50 VMA_DQ55
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D8 C4 C9 C3 A8 A3 B9 A4
VMA_DQ60 VMA_DQ58 VMA_DQ63 VMA_DQ56 VMA_DQ61 VMA_DQ57 VMA_DQ62 VMA_DQ59
D
+1.5V_VGA VDD#B3 VDD#D10 VDD#G8 VDD#K3 VDD#K9 VDD#N2 VDD#N10 VDD#R2 VDD#R10
B3 D10 G8 K3 K9 N2 N10 R2 R10
ODT/ODT0 VDDQ#A2 CS /CS0 VDDQ#A9 RAS VDDQ#C2 CAS VDDQ#C10 WE VDDQ#D3 VDDQ#E10 VDDQ#F2 DQSL VDDQ#H3 DQSU VDDQ#H10
A2 A9 C2 C10 D3 E10 F2 H3 H10
CK CK CKE/CKE0
DML DMU
RESET ZQ/ZQ0 NC NC NC NC NC/ODT1 NC/CS1 NC/CE1 NC/ZQ1
C
A10 B4 E2 G9 J3 J9 M2 M10 P2 P10 T2 T10
VSS#A10 VSS#B4 VSS#E2 VSS#G9 VSS#J3 VSS#J9 VSS#M2 VSS#M10 VSS#P2 VSS#P10 VSS#T2 VSS#T10
DQSL DQSU
+1.5V_VGA
B2 B10 D2 D9 E3 E9 F10 G2 G10
VSSQ#B2 VSSQ#B10 VSSQ#D2 VSSQ#D9 VSSQ#E3 VSSQ#E9 VSSQ#F10 VSSQ#G2 VSSQ#G10
100-BALL SDRAM DDR3 K4W1G1646E-HC12
+1.5V_VGA
+1.5V_VGA
+1.5V_VGA
+1.5V_VGA
B
B
R439 4.99K/F_4
R188 4.99K/F_4 VREFC_VMA1
R438 4.99K/F_4
C738 .1U/10V_4
R437 4.99K/F_4
R191 4.99K/F_4
VREFD_VMA1 R192 4.99K/F_4
C434 .1U/10V_4
R231 4.99K/F_4
VREFC_VMA2 R440 4.99K/F_4
C744 .1U/10V_4
VREFD_VMA2 R197 4.99K/F_4
R206 56.2/F_4 C440
C429 1U/6.3V_4
C430 1U/6.3V_4
R434 4.99K/F_4
VREFC_VMA3 R230 4.99K/F_4
C727 .1U/10V_4
+1.5V_VGA
VMA_CLK0
R216 4.99K/F_4
C447 .1U/10V_4
VREFD_VMA3 R227 4.99K/F_4
R429 4.99K/F_4 VREFC_VMA4
R436 4.99K/F_4
C443 .1U/10V_4
C734 .1U/10V_4
VREFD_VMA4 R433 4.99K/F_4
C726 .1U/10V_4
+1.5V_VGA
C456 1U/6.3V_4
C444 1U/6.3V_4
C438 1U/6.3V_4
C428 1U/6.3V_4
C425 1U/6.3V_4
C747 1U/6.3V_4
C721 1U/6.3V_4
C719 1U/6.3V_4
C745 1U/6.3V_4
C424 1U/6.3V_4
C748 1U/6.3V_4
C739 1U/6.3V_4
C718 1U/6.3V_4
C716 1U/6.3V_4
VMA_CLK0_COMM R213 56.2/F_4
.01U/16V_4
VMA_CLK0# VMA_CLK1
A
+1.5V_VGA
C751 1U/6.3V_4 R199 56.2/F_4
C749 1U/6.3V_4
C741 1U/6.3V_4
C448 1U/6.3V_4
C451 1U/6.3V_4
C454 1U/6.3V_4
C742 1U/6.3V_4
+1.5V_VGA
C431
QCI PN
+1.5V_VGA
C746 1U/6.3V_4
C724 1U/6.3V_4
C722 1U/6.3V_4
C720 1U/6.3V_4
C729 1U/6.3V_4
C730 1U/6.3V_4
C735 1U/6.3V_4
C446 1U/6.3V_4
C450 1U/6.3V_4
.01U/16V_4
C743 10U/6.3V_6S
C723 10U/6.3V_6S
C459 10U/6.3V_6S
C461 10U/6.3V_6S
C458 10U/6.3V_6S
C725 10U/6.3V_6S
C737 10U/6.3V_6S
C740 10U/6.3V_6S
C728 10U/6.3V_6S
C457 10U/6.3V_6S
C460 10U/6.3V_6S
Size Custom NB5/RD2 4
AKD5LZGTW00
A
PROJECT : AX2/7 Quanta Computer Inc.
C452 10U/6.3V_6S
VMA_CLK1# 5
AKD5LGGT502
+1.5V_VGA
VMA_CLK1_COMM R208 56.2/F_4
SAMSUNG HYNIX
http://laptop-schematic.com/ 3
2
Document Number
Rev 3A
PARK VRAM(DDR3 BGA96)
Date: Thursday, December 24, 2009 1
Sheet
22
of
42
2
3
4
5
6
7
1. If LCD connector near GPU, then place these series Resistors near GPU 2. If LCD connector near N/B, then place these series Resistors near N/B
0_4P2R_4 0_4P2R_4 0_4P2R_4
B
*0_4P2R_4 TXLCLKOUTTXLCLKOUT+ *0_4P2R_4 TXLOUT0TXLOUT0+ *0_4P2R_4 TXLOUT1TXLOUT1+ *0_4P2R_4 TXLOUT2+ TXLOUT2-
19 EXT_TXUCLKOUT19 EXT_TXUCLKOUT+ 19 EXT_TXUOUT0+ 19 EXT_TXUOUT019 EXT_TXUOUT119 EXT_TXUOUT1+ 19 EXT_TXUOUT219 EXT_TXUOUT2+
EXT_TXUCLKOUTEXT_TXUCLKOUT+ EXT_TXUOUT0+ EXT_TXUOUT0EXT_TXUOUT1EXT_TXUOUT1+ EXT_TXUOUT2EXT_TXUOUT2+
RP32 3 1 RP35 1 3 RP34 3 1 RP31 3 1
4 2 2 4 4 2 4 2
*0_4P2R_4 TXUCLKOUTTXUCLKOUT+ *0_4P2R_4 TXUOUT0+ TXUOUT0*0_4P2R_4 TXUOUT1TXUOUT1+ *0_4P2R_4 TXUOUT2TXUOUT2+
32
R38
EMU_LID
+3VLCD_CON
2
PBY201209T-4A_8 C22 1
2 10U/6.3V_8
C21 1
2 0.1U/10V_4
Q5 PDTC144EU
C15 1
2 0.01U/16V_4
10,19
A
22_8
Q7 2N7002E
LCDDISCHG
C27 0.1U/10V_4
2
DISP_ON
SI , add C21 from EMI suggest R25 2.2K_4
LCDON#
+3V
+3V_DELAY
R33
4.7K_4
EDIDCLK
R37
4.7K_4
EDIDDATA
R34
*4.7K_4
EDIDCLK
R35
*4.7K_4
EDIDDATA
SI, R34,R35 change to reserve only and add R33,R37 for MUXLESS
+3VLCD_CON +3V
C24 1000P/50V_4
TXLOUT0TXLOUT0+ TXLOUT1TXLOUT1+
C44
22P/50V_4
R39
100K/F_4
2 PN_BLON
LCD_BK
LID_EC#
TXLCLKOUTTXLCLKOUT+
31,32
0.047U/10V 10,19 DPST_PWM
1
HWPG
32,34,35,37,39 32
D11 BAT54A
2
U3 TXUOUT0TXUOUT0+
3
3 14
LCD_BK
LID_EC#
C14
5
1K/F_4
TXLOUT2TXLOUT2+
33K_6
PWM_VADJ
DPST_PWM 2
4
R29
1K_4
Q9
TXUOUT1TXUOUT1+ C20 TC7SH08FU
C19 22P/50V_4
TXUOUT2TXUOUT2+
1
*4.7U/6.3V_6 PDTC144EU
VADJ1
PWM_VADJ 1
3
LVDS_BLON R56
10,18 LVDS_BLON
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
EDIDCLK
10,18 EDIDCLK 10,18 EDIDDATA
CH501H-40PT BLONCON 1
R49
Q6 2N7002E
2
+3V +3VPCU
+3VLCD
R32
100K/F_4 L4
+3VLCD
N-MOS,5.8A Q8 AO3404
2
*0_4 D10 2
PN_BLON
AO3404 ID current 5.8A
330K_6
C72 0.1U/50V_6
1
4 2 4 2 4 2 2 4
C82 *10U/25V_12
R31
SI, new option for MUXLESS
RP27 3 1 RP28 3 1 RP29 3 1 RP33 1 3
C75 0.1U/50V_6
LCDONG
OPTION SIGNAL FROM PARK to LVDS for discrete EXT_TXLCLKOUTEXT_TXLCLKOUT+ EXT_TXLOUT0EXT_TXLOUT0+ EXT_TXLOUT1EXT_TXLOUT1+ EXT_TXLOUT2+ EXT_TXLOUT2-
C73 0.01U/50V_4
3
+5V C65 0.1U/50V_6
TXUCLKOUT+ TXUCLKOUTTXUOUT0+ TXUOUT0TXUOUT1+ TXUOUT1TXUOUT2TXUOUT2+
19 EXT_TXLCLKOUT19 EXT_TXLCLKOUT+ 19 EXT_TXLOUT019 EXT_TXLOUT0+ 19 EXT_TXLOUT119 EXT_TXLOUT1+ 19 EXT_TXLOUT2+ 19 EXT_TXLOUT2-
R36
TXUCLKOUTTXUCLKOUT+
Vari bright function R27
*0_4
Do not use it C
PV, add Q9 for BIOS check
+VIN_BLIGHT
VADJ1 BLONCON
CAMERA
G_0
RP4
0_4P2R_4
+VIN
UPB201209T-330Y-N(5A)
B
G_1
G_2
G_3
G_4 C
G_5
RP8
4 2 4 2 4 2 2 4
0_4P2R_4
L11
3
RP7
3 1 3 1 3 1 1 3
0_4P2R_4
23
+3V C28 0.1U/10V_4
1
RP6
0_4P2R_4
TXLCLKOUT+ TXLCLKOUTTXLOUT0+ TXLOUT0TXLOUT1+ TXLOUT1TXLOUT2+ TXLOUT2-
1
LB_CLK LB_CLK# LB_DATAP0 LB_DATAN0 LB_DATAP1 LB_DATAN1 LB_DATAN2 LB_DATAP2
RP5
0_4P2R_4
3
LB_CLK LB_CLK# LB_DATAP0 LB_DATAN0 LB_DATAP1 LB_DATAN1 LB_DATAN2 LB_DATAP2
RP3
4 2 4 2 4 2 4 2
1
10 10 10 10 10 10 10 10
RP2
3 1 3 1 3 1 3 1
3
LA_CLK LA_CLK# LA_DATAP0 LA_DATAN0 LA_DATAP1 LA_DATAN1 LA_DATAP2 LA_DATAN2
RP1
+VIN_BLIGHT
1
A
10 10 10 10 10 10 10 10
LA_CLK LA_CLK# LA_DATAP0 LA_DATAN0 LA_DATAP1 LA_DATAN1 LA_DATAP2 LA_DATAN2
8
+15VALW
OPTION SIGNAL FROM NB to LVDS for UMA
2
1
CN2 GS12401-1011-9F +3.9V-CAMARA
SI , update foortprint to 88266-05001-06-5P-L-SMT
+5V U4
3
VIN
VOUT
EDIDCLK
4 *DLW21HN900SQ2L(330mA) CN1
C16
1
C17
R1
SHDN
R30 *215K/F_4
1U/10V_4
2 D
GND
SET
4.7U/6.3V_6
13 USBP2+ 13 USBP2+3.9V-CAMARA
L5 4 1
USBP2+ USBP2-
3 2
5
1 2 3 4 5
C25 *10P/50V_4
Reserve for EMI
D
AT5231H-3.9KER
C23 .01U/16V_4 R28 *100K/F_4
R2
C18 *4.7U/6.3V_6
CAM
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2 1
2
3
4
http://laptop-schematic.com/ 5
6
Document Number
Date: Thursday, December 24, 2009 7
Rev 1A
LCD CONN Sheet
23 8
of
42
5
4
CRT PORT
3
PV , change footprint to F3_2X1_65-2_8
C6 0.1U/10V_4
+5VCRT F1
D
2
+5V
1
FUSE1A6V_POLY L3
BK1608LL680(0.2A,68)_6
CRT_R1
CRT_G
L2
BK1608LL680(0.2A,68)_6
CRT_G1
CRT_B
L1
BK1608LL680(0.2A,68)_6
CRT_B1
R16
R11
C13
C10
24
PV , change footprint to dsub-dsd-15aebb-15p-v-smt
40 MIL
+5VCRT
CRT_R
R20
1
16
R20 for UAM & MUXLESS use 140 ohm for DIS use 150 ohm (AMD)
40 mils
2
C7
C8
C11
6 1 7 2 8 3 9 4 10 5
C12
+3V
11
D9
12
2
15 D7
140/F_4
150/F_4 150/F_4
5.6P/50V_6
5.6P/50V_6
5.6P/50V_6
5.6P/50V_6
5.6P/50V_6
5.6P/50V_6
0.1U/10V_4
17
R1
*0_4/S
CRTDDCCLK2
PR_VSYNC
R5
33_4
CRTVSYNC
PR_HSYNC
R6
33_4
CRTHSYNC
R8
*0_4/S
CRTDDCDAT2
2
+5V
BAV99W
1
4
2 C1
AHCT1G125DCH
C2
C4
C5 D2
*470P/50V_4
1
5
C
U2
*47P/50V_4
*47P/50V_4
*47P/50V_4
BAV99W C
1 2
4 D4
R3
+3V
*4.7K_4
+3V
BAV99W
1
CRTHSYNC
3
4.7K_4
2
R4
CRTVSYNC
3
AHCT1G125DCH
2
+3V_DELAY
DDCCLK2
3
2
10,18 HSYNC_COM
CRT_B1
3
U1 10,18 VSYNC_COM
BAV99W
1
D1
1
5
C3
2 D5
+5V
CRT_G1
3 CRT CONN CN17
close conn within 600mils
CRT_R CRT_G CRT_B
CRT_R CRT_G CRT_B
BAV99W
1
EMI
10,18 10,18 10,18
CRT_R1
3
14
D
BAV99W
1
13
2 10,18
DDCCLK
DDCCLK
1
3 D6 Q1 2N7002E
+3V
10,18 DDCDATA
R10 R9
*4.7K_4 4.7K_4
DDCDATA
1
DDCDAT2
2
1
DDCDAT2
3
+3V
2
+3V_DELAY
BAV99W
DDCCLK2
PV,add for ESD
3 Q2 2N7002E R2
SI, R4,R10 change to reserve only and add R3,R9 for MUXLESS
6.81K_4
R7 6.81K_4
B
B
+5VCRT
+5VCRT
2
CH501H-40PT
1
+5V_CRT2
D3
A
A
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2
Document Number
Rev 1A
CRT
Date: Thursday, December 24, 2009
5
4
3
http://laptop-schematic.com/ 2
1
Sheet
24
of
42
4
3
2
9 C_PEG_TX14 9 C_PEG_TX#14 9 C_PEG_TX#13 9 C_PEG_TX13 9 C_PEG_TX#12 9 C_PEG_TX12
C_PEG_TX15 C410 C_PEG_TX#15 C406
0.1U/10V_4 TX2_HDMI-L 0.1U/10V_4 TX2_HDMI+L
C_PEG_TX14 C408 C_PEG_TX#14 C403
0.1U/10V_4 TX1_HDMI-L 0.1U/10V_4 TX1_HDMI+L
C_PEG_TX#13 C399 C_PEG_TX13 C398
0.1U/10V_4 TX0_HDMI-L 0.1U/10V_4 TX0_HDMI+L
RP12 TX2_HDMI-L 3 TX2_HDMI+L 1 RP11 TX1_HDMI-L 3 TX1_HDMI+L 1 RP10 TX0_HDMI-L 3 TX0_HDMI+L 1
C_PEG_TX#12 C394 C_PEG_TX12 C391
0.1U/10V_4 TXC_HDMI-L 0.1U/10V_4 TXC_HDMI+L
TXC_HDMI-L TXC_HDMI+L
SI, remove R72 and change R85 , Q12 to reserve for MUXLESS
4 0_4P2R_4 2
TX2_HDMITX2_HDMI+
4 0_4P2R_4 2
TX1_HDMITX1_HDMI+
4 0_4P2R_4 2
TX0_HDMITX0_HDMI+
+3V
18 TX1_HDMI_L18 TX1_HDMI_L+ 18 TX0_HDMI_L18 TX0_HDMI_L+ 18 TXC_HDMI_L18 TXC_HDMI_L+
TX2_HDMI_LTX2_HDMI_L+
C657 C652
*0.1U/10V_4 *0.1U/10V_4
TX2_HDMITX2_HDMI+
TX1_HDMI_LTX1_HDMI_L+
C648 C645
*0.1U/10V_4 *0.1U/10V_4
TX1_HDMITX1_HDMI+
TX0_HDMI_LTX0_HDMI_L+
C636 C637
*0.1U/10V_4 *0.1U/10V_4
TX0_HDMITX0_HDMI+
TXC_HDMI_LTXC_HDMI_L+
C617 C632
*0.1U/10V_4 *0.1U/10V_4
Q13 2N7002E 2 HDMI_DET_R
*0_4/S
R86 200K/F_4
3
for Layout concern ,placement close HDMI conn 3 2 WCM2012-90
200K/F_4
10K/F_4 R64
Q11 2N7002E 2
SI , change to reserve only for MUXLESS
4 1 L47
HDMI_DET
R59
PV, change to short pad 10 INT_TMDS_HPD
R87
Pure DIS : Add R85 , Q12 1
18 TX2_HDMI_L18 TX2_HDMI_L+
D
Q12 *2N7002E 2
PV,add for EMI
From PARK
UMA use +3V for the detect pin Dis use +3V_DELAY for the detect pin R77 10K/F_4
18 EXT_TMDS_HPD
TXC_HDMI3 TXC_HDMI+ 2 WCM2012-90
4 1 L46
+3V
R85 *10K/F_4
3
9 C_PEG_TX15 9 C_PEG_TX#15
for Layout concern ,placement close HDMI conn
3
D
+3V_DELAY
1
for Layout concern ,placement close north bridge
SI , all add for MUXLESS
25
HDMI HPD SENSE
UMA/DISCRETE select for HDMI From RS880M
1
1
5
UMA / MUXLESS : Add R64 , R59 , Q11
TXC_HDMITXC_HDMI+
SI , add R64,R59,Q11 for MUXLESS
PV,add for EMI
C
3
+5V Q10 2N7002E 2
715/F_4
TX2_HDMI+
R382
715/F_4
TX2_HDMI-
R376
715/F_4
TX1_HDMI+
R377
715/F_4
TX1_HDMI-
R367
715/F_4
TX0_HDMI+
R364
715/F_4
TX0_HDMI-
R362
715/F_4
TXC_HDMI+
R354
715/F_4
TXC_HDMI-
C
UMA AND DISCRETE HDMI I2C SELECT Close to HDMI Connector
UMA RS780M 上 715 ohm CS17152FB17
0_4P2R_4
100K/F_4
DIS M92-S 上 499 ohm CS14992FB24
RP30 3 1
10 HDMI_DDC_DATA 10 HDMI_DDC_CLK
Close to HDMI Connector
HDMI_SDATA HDMI_SCLK
SI , change power source to +5V_HDMVCC
UMA
UMA DDC4 is 5V tolerance , the MOSFET level shifter no need Discrete DDC is 3V tolerance,the MOSFET level shifter is need
SI,change to 715 ohm for MUXLESS
4 2
+3V_DELAY +5V_HDMVCC R94 *4.7K_4
2
1
R53
R380
18
3HDMI_SCLK
1
HDMI_SCL +3V_DELAY
Q14 *2N7002E
B
DIS
B
+5V_HDMVCC
2
R351 *4.7K_4
HDMI PORT +5V_HDMVCC
1
CH501H-40PT
D15 CH501H-40PT
1
D14
R92 2K_4
R102 2K_4
HDMI_SCLK
1
HDMI_SDA
CN22 TX2_HDMI+ TX2_HDMITX1_HDMI+ TX1_HDMITX0_HDMI+ TX0_HDMI-
2
2
+5V_HDMVCC
18
1 3 4 6 7 9
20 21
D2 Shield D1 Shield D0 Shield CK Shield GND
2 5 8 11 17
13 14
10 12
CK+ CK-
HDMI_SCLK HDMI_SDATA
15 16
DDC CLK CE Remote DDC DATA NC
A
+5V
SHELL1 SHELL2
TXC_HDMI+ TXC_HDMI-
HDMI_SDATA
PV , change footprint to F3_2X1_65-2_8
D2+ D2D1+ D1D0+ D0-
FUSE1A6V_POLY 2 1 F2 C602 *0.1U/10V_4
3
HDMI_SDATA
Q15 *2N7002E
SI, remove R93 , R350 . Add RP30 R94,R351,Q14,Q15 change to reserve only for MUXLESS
A
1A +5V_HDMVCC
18
HDMI_DET 19
+5V
PROJECT : AX2/7 Quanta Computer Inc.
HP DET HDMI CONN Size Custom NB5/RD2
5
4
3
http://laptop-schematic.com/ 2
Document Number
Rev 1A
HDMI
Date: Thursday, December 24, 2009 1
Sheet
25
of
42
8
7
R508
5
4
10K/F_4 CLK_48M_CR
12 CLK_48M_CR
SI , change CLK source from SB internal CLK GEN
0_4 CLK_48M_CR_R
R544
3
2
Xtal
13 14 15 16 17 18 19 20 21 22 23 24
Input to RTS5159 pin48
D
XD_CD# SP2 SD_CD# SP4 R526
6.19K/F_4
RREF
4 5
13 USBP1113 USBP11+
48 *12MHz
R530 *270K_4
40 39 38 37
SP16 SP15 SP14 SP13
SD_CMD SD_DAT5/XD_D0/MS_D6 SD_CLK/XD_D1/MS_CLK SD_DAT6/XD_D7/MS_D3 NC MS_INS# SD_DAT7/XD_D2/MS_D2 SD_DAT0/XD_D6/MS_D0 XD_D3/MS_D1 XD_D5/MS_BS
36 35 34 31 30 29 28 27 26 25
SD_CMD_R SP12 SP11 SP10
DM DP
AV_PLL_IN
12MHZ_XTLI VREG_OUT 5V_IN NC D3V3_ IN
Y8 1
XTLO
47
*22P/50V_4
12MHZ_XTLO
SP1 SP2 SP3 SP4 SP5 SP6 SP7 SP8 SP9 SP10 SP11 SP12 SP13 SP14 SP15 SP16 SP17 SP18 SP19
XD
AL005158B10 -->RTS5158E AL005159B00 -->RTS5159GR
MS_CD# SP8 SP7 SP6 SP5
XD_CD# SD_WP SD_CD# SD_DAT1 SD_DAT0 SD_DAT7 SD_DAT6 SD_CLK SD_DAT5 SD_DAT4
PV,change to short pad
XD_D4 XD_D5 XD_D3 XD_D6 XD_D2
MS_BS MS_D1 MS_D0 MS_D2 MS_INS# MS_D3 MS_SCLK
XD_D7 XD_D1 XD_D0 XD_WP# XD_R/B# XD_WE# XD_RE# XD_ALE XD_CE# XD_CLE
SD_DAT3 SD_DAT2
1 C837 0.1U/10V_4
10 8 3 33
C823
Vreg out 1.8V from Internal 3.3VLDO
R517 R515 R520 R535 R513 R539 R527
*0_4/S *0_4/S *0_4/S *0_4/S *0_4/S *0_4/S *0_4/S
MS-D0_SD-D0_XD-D6 MS-D1_XD-D3_SD_D1 MS-D2_XD-D2 XD-RE#_SD-D2 MS-BS_XD-D5 SD-D3_XD-WE SD_CLK_MS_CLK
SP2 SP13 SP19 SP4 SP10 SP14 SP12 SP17 SP18 SD_CMD_R
R504 R533 R541 R507 R521 R534 R528 R540 R536 R529
*0_4/S *0_4/S *0_4/S *0_4/S *0_4/S *0_4/S *0_4/S *0_4/S *0_4/S *0_4/S
SD_WP XD-WP# XD-CLE XD-D4 MS-D3_XD-D7 XD-RB# XD-D0 XD-ALE XD-CE# SD-CMD
R525 +3VSUS_RTS
*0_8/S
C832 0.1U/10V_4
+3V SP11
C831 4.7U/6.3V_6
Close to Chipset
C834
BG612000717 D3V3_IN MODE_SEL
SI , change to 22P then change to reserve only
45
MODE_SEL
C829
D28
1
1
PAD1 *GND PAD
1
PAD2 *GND PAD
1
1
1
1
1
PAD3 *GND PAD
1
1
1 1
1 1
PAD6 *GND PAD
VGA Hole
H5 *H-C217D181P2
PAD7 *GND PAD
H4
*h-c276d118p2
PAD8 *GND PAD
H18
H10 *H-C217D181P2
B
CPU Hole
SI , update foortprint to spad-ax2-1np PAD10 *GND PAD
PAD16 *GND PAD
PAD18 spad-mb-1np
1
1
PAD17 *GND PAD
1
PAD11 *GND PAD
1
PAD12 *GND PAD
1
PAD13 *GND PAD
1
PAD14 *GND PAD
1
PAD15 *GND PAD
1
XD_CD# SD_WP SD_CD#
1
37 38 39 40
SD_CLK_MS_CLK MS-D0_SD-D0_XD-D6 MS-D2_XD-D2 MS-D1_XD-D3_SD_D1 XD-D4 XD-D4 MS-BS_XD-D5 MS-D0_SD-D0_XD-D6 MS-D3_XD-D7
PAD5 *GND PAD
H3
*h-c276d118p2
SHIELD1-GND SHIELD2-GND BOS BOS
MS-D1_XD-D3_SD_D1 MS-BS_XD-D5
5159_RST_R# 13
H6 *H-C217D181P2
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
H1
*h-c354d118p2
C577 *270P/25V_4
MS-DATA1 MS-BS 4IN1-GND2 SD-VCC SD-CLK SD-DAT0 XD-D2 XD-D3 XD-D4 SD-DAT1 XD-D5 XD-D6 XD-D7 XD-VCC XD-CD-SW SD-WP-SW SD-CD-SW
H7 *H-C236D181P2
SD_CLK_MS_CLK MS-D3_XD-D7 MS_CD# MS-D2_XD-D2 MS-D0_SD-D0_XD-D6
XD-R/B XD-RE XD-CE XD-CLE XD-ALE XD-WE XD-WP XD-D0 XD-D1 SD-DAT2 SD-DAT3 SD-CMD 4IN1-GND1 MS-VCC MS-SCLK MS-DATA3 MS-INS MS-DATA2 MS-DATA0
H8
H11 *h-c307d181p2
H13
H12 *H-C236D181P2
*10K/F_4 B
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
5159_RST_R#
1
*h-c354d118p2
H14
*h-c354d118p2
H17
*h-c354d118p2
H9
*h-c354d354n
H19
*h-c354d118p2
H2
CN12 XD-RB# XD-RE#_SD-D2 XD-CE# XD-CLE XD-ALE SD-D3_XD-WE XD-WP# XD-D0 SP11 XD-RE#_SD-D2 SD-D3_XD-WE SD-CMD
R325
2
Add diode for 5158E cardreader driver lost issue
*h-c354d118p2
+3VCARD
PV , change footprint to 4in1-cm4s-125-36p-r-v-smt
0.1U/10V_4 *RB501V-40
*h-c236d118p2
PAD4 *GND PAD
0.1U/10V_4
*h-c236d118p2
PAD9 *GND PAD
+3VCARD
C827
0.1U/10V_4
5159_RST#
RTS5159 max output current for .. XD card 250mA SD/MMC 250mA MS/MSPRO 250mA
Realtek RTS5159
C828
1U/10V_4
1
1U/10V_4
C
PV, change to short pad
*0_4/S
C826
1
6 46 32 12
1
RST#
R538
+3VCARD
1
AG33 AG_PLL DGND2 DGND1
+3VCARD 9
1
5159_RST# 44 C838
100K/F_4
7
2
CARD_3V3_OUT
Internal have pull Hi 200K
+3VCARD
Can not more than 10p
C836 *5.6P/50V_4
SI, change power source from +3VSUS to +3V
C813 4.7U/6.3V_6
1
NC
*0_4
SI , Add R537 from vendor suggestion
+3V
+3V C818
R532
C
R537
11 0.1U/10V_4
D
1U/10V_4
VREG
0.1U/10V_4
SP7 SP6 SP8 SP16 SP5 SP15 SP11
1
C839
RREF
SD_DAT2/XD_RE# SD_DAT3/XD_WE# XD_RDY SD_DAT4/XD_WP#/MS_D7
CLK_48M_CR_R
*22P/50V_4
2
C840
2
XTAL_CTR GPIO0 EEDO EECS EESK EEDI XD_CD# SD_WP SD_CD# MS_D4 SD_DAT1/XD_D4 MS_D5
SP19 SP18 SP17
1
48M Hz
43 42 41
1
12M Hz
Pull high
XD_CLE XD_CE# XD_ALE
1
Floating
MS
U34
Remark
1
CLK source
26
Note: SD/MMC
PIN 13
1
1
+3V
6
CARD READER SOCKET
SI, add CPU & VGA hold pad from EMI request
5 IN1 CARD-READER (PUSH-PUSH)
SI , add for ESD testing
PV,add new pad for new outline
Support SD/SD PRO/MMC/MS/MS PRO/xD Cards A
A
+3VCARD +3VCARD C562 2.2U/6.3V_6
R314 150K/F_4 C560 0.1U/10V_4
C566 0.1U/10V_4
PROJECT : AX2/7 Quanta Computer Inc.
C569 0.1U/10V_4
CLOSE CONN
Size Custom NB5/RD2
8
7
6
5
http://laptop-schematic.com/ 4
3
Document Number
2
Rev 1A
RTS5159 & CR SOCKET &HOLE
Date: Thursday, December 24, 2009
Sheet
26 1
of
42
A
B
C
D
E
27
PV , change to short pad +3V
+3V_DVDD R519
+5VAVDD
+5V
PV, change to reserve only
*0_6/S C782
C830 1U/6.3V_4
C819 .1U/10V_4
C821 10U/6.3V_8
C816 C817 10U/6.3V_8 .1U/10V_4
C812 10U/6.3V_8
C810 .1U/10V_4
C822 10U/6.3V_8
C809 .1U/10V_4
C780 10U/6.3V_6 .1U/10V_4
C784 C786 10U/6.3V_8 .1U/10V_4 ACZ_SDIN0_R
Close to Pin9
Close to Pin1
Close to Pin46
AGND
Close to Pin39
+5VAVDD
PV,delete C824
AGND
AGND
1.3A
C772 C774 C775 C783
AGND
10U/6.3V_6 4.7U/6.3V_6 1U/6.3V_4 .1U/10V_4
FOR EMI
Close to Pin38
Close to Pin25
L74 *PBY201209T-221Y-N
+5V
C815 *27P/50V_4
AGND
PV , change from 220 to 47
SI , remove L79,L80,L83,L84
PV, change footprint and value
MIC1-VERFL
MIC1-VERFR +5VAVDD
MIC2-VERFO C778
10U/6.3V_6
C781 C779
*.1U/10V_4 .1U/10V_4
AGND
269CBN
25
EXT_MIC_R 28
1K/F_4
EXT_MIC_L 28
MONO-OUT
20 20K/F_4
SI , add C42,C45,C46,C47 from EMI suggestion
Place near CODEC
AGND
18
Sense-B
17
INT_MIC_R
C801
4.7U/6.3V_6
16
INT_MIC_L
C803
4.7U/6.3V_6
INT_MIC +5VAVDD
+INTMIC_BIAS
1
R485 R484
Place near CODEC
14 SENSEA
13
R502 R501
ALC270A-GR
SA_A# SA_B#
39.2K/F_4 20K/F_4
SA_A# SA_B#
28 28
*10K/F_4 U31 *TLV2461IDBVRG4
INT_MIC
1
SA_B# -->EXT MIC PCBEEP ACZ_RST#_AUDIO
T169 T170
+
3
-
4
C768
*1U/6.3V_4
C762
AGND *100P/50V_4
13
R302 3K_4 R481
INT_MIC_IN_C_R
PV, change to reserve only
R480
*10K/F_4
C763
*270P/25V_4
*.22U/25V_6 C761 *100P/50V_4
ACZ_SDIN0
C541 *1U/6.3V_4
13
R427
0_6
R300 *3K_4
SI,remove U35,C681 , add D40 for audio function not stable R516 *10K_4
R473 R313
Place Under CODEC
R482 R506
D40 EAPD# ACZ_RST#_AUDIO
C811 .1U/10V_4 R546 PCBBEP_R2
Add this circuit same as AX1/3
EAPD#_R
Q36 2N7002E
C820 .1U/10V_4
1 BAT54A
R549 C835 .1U/10V_4
PROJECT : AX2/7 Quanta Computer Inc.
AGND AGND
PD#
PCBEEP
R549 close to R546
*0_6/S short0603
2 3
PCBBEP_L
2
ACZ_SPKR
0_4 *0_4
47K_4
4.7K_4 13
R522 R518
32 VOLMUTE# 3
R261
R566 10K/F_4
PV , remove U33,C825,C811 C820,R523,R524 R510,R514
1
R315
TO Internal Mic
+3V_DVDD
C835 close to C820 and C820 close to chip 1 2 C825 *0.047U/10V
PV,add for test 0_6 RC0603 *0_6/S short0603 *0_6/S short0603 *0_6/S short0603 *0_6/S short0603 *0_6/S short0603
AGND AGND
+5VAVDD
PC-BEEP
R328
Size Custom
AGND NB5/RD2
Document Number
B
C
http://laptop-schematic.com/ D
Rev 1A
Azalia 92HD75B2X5
Date: Thursday, December 24, 2009
A
1 2 88266-020L
+5VAVDD
PV , add R427
SI , change to reserve only
AGND
BLM15AG601SS1D
R301 *3K_4
AGND C814 *27P/50V_4
L79
AGND
13 ACZ_SDOUT_AUDIO 33_4
INT_MIC_IN
PV,add for EMI
+3V_DVDD R512
CN10
C540 INT_MIC_IN_C
*10K/F_4
AGND
13
ACZ_SYNC_AUDIO
PD#
*10K/F_4 MIC2-VERFO
SA_A# -->EXT Ear Phone
ACZ_SDIN0_R
SI , update foortprint to 88266-020L-2P-R-SMT
Place near CODEC
15
PCBEEP 12
RESET# 11
SYNC 10
DVDD-IO
R498
SPKL+
C47
1K/F_4
EXT_MIC1-L_R R496
C46
EXT_MIC1-R_R R495
4.7U/6.3V_6
19
INT SPEAKER CONN
220P/50V_6
4.7U/6.3V_6
EXT_MIC1-L_C C795
+3V_DVDD
SI, remove R511
1 2 3 4
C42
EXT_MIC1-R_C C789
21
CN3
BLM15AG601SS1D BLM15AG601SS1D BLM15AG601SS1D BLM15AG601SS1D
C794 *180p/50V_4
22
Sense A
9
SDATA-IN 8
L9 L7 L6 L8
C796 *1U/16V_6
4.7K_4 4.7K_4
MIC1-L
LINE2-L
DVSS2
R497 R491
MIC1-R
LINE2-R
13 BIT_CLK_AUDIO
Place near SPEAKER CONN
C808 *180p/50V_4
23
LINE1-L
MIC2-L
7
10K/F_4
220P/50V_6
26
27
28
29
30
31
32
33
34
35
R571
AVDD1
AVSS1
VREF
LDO-CAP
MIC2-VREFO
MIC1-VREFO-R
MIC1-VREFO-L
HP-OUT-L
HP-OUT-R
CPVEE
CBN
0.047U/25V_4
3
G9191-475T1U
MIC1-VERFL MIC1-VERFR
24
MIC2-R EAPD SPDIFO PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND
1
1
PVDD2
EN
C806 *1U/16V_6
C798 *180p/50V_4
LINE1-R
Analog
SPEAKER
C847
SPKR+ SPKL-
JDREF
BIT-CLK
47 48 49 50 51 52 53 54 55 56 57 58
6
EAPD#
SDATA-OUT
46
+5V
SPK-R+
5
45
Ditigal
C802 *180p/50V_4
1
C165
SPK-R-
GND
Vin
*220P/50V_6
PVSS2
44
PD#
SPKR+
43
BYP
AGND
PVSS1
4
SPKR-
Vout
4 2
U32
SPK-L-
GPIO1
42
SPK-L+
3
41
CBP
36 40
SPKL-
GPIO0
SPKL+
PVDD1
DVDD1
39
+5V
AVSS2 AVDD2
5
+5VAVDD
2
37 38
AGND +5VAVDD
C842 1U/6.3V_4
AGND
269CBP 2.2U/6.3V_6
C776
U33
AGND
Close to Pin27
C45
AGND
R489 47/F_4 HP-R R488 47/F_4 2.2U/6.3V_6 CPVEE
C777
220P/50V_6
EARP_R
SPKR-
220P/50V_6
28
SI , change L6,L7,L8,L9 to CX5AG601001 from EMI suggest
Place near CODEC +5V
HP-L
5
EARP_L
2
28
PV , add LDO
E
Sheet
27
of
42
1
2
3
4
5
6
7
8
28
Line out CN29
A
27
EXT_MIC_L
27
EXT_MIC_R
EARP_L
L50
SBK160808T-301Y-N
EARP_L1
EARP_R
L44
SBK160808T-301Y-N
EARP_R1
EXT_MIC_L SA_A#
EARP_L
27
EARP_R
27
SA_A#
27
SA_B#
7 9 10 8
EXT_MIC_R
A
FOX_JA6033L-B3S0-7F R308
27
1 2 6 3 4 5
EARP_L
R293
*1K/F_4
C548
C532
Normal Open
*1K/F_4 100P/50V_4
100P/50V_4
EARP_R
AGND
SA_A# AGND SA_B#
PV,change to AGND from EMI suggest
PV,let pin 6 contact to AGND from EMI suggest
MIC
SA_A# -->EXT Ear Phone
C757
100P/50V_4
AGND
SA_B# -->EXT MIC
CN28
EXT_MIC_L
L72
SBK160808T-301Y-N
MIC_IN_L
EXT_MIC_R
L70
SBK160808T-301Y-N
MIC_IN_R
AGND
C756
1 2 6 3 4 5
7 9 10 8
100P/50V_4 FOX_JA6033L-B3S0-7F AGND
B
Normal Open
SA_B#
B
AGND
CPU FAN
+5V
G955 /FON signal have internal pull Hi to VIN , R420 maybe can remove
+3V
C68
R66
2 FAN_SMBALERT#
32
FANPWR = 1.6*VSET
VIN
VO GND /FON GND GND VSET GND
3 5 6 7 8
+5VFAN1
G991
CN21
20 mil
+5VFAN1
1 2 3
C
1 2 3
C134
5 4
5 4
8
FAN CONN 2.2U/6.3V_6
1 4
FAN1ON
FAN1SIG
C125
U9
10K/F_4
R98 4.7K_6
32
1U/10V_4
7
0.1U/10V_4 1
Modem CONN 1
C
G995 layout notice
2
3
4
h-c217d146p2
h-c217d146p2
MDC
5
H16
1
H15 +3V
6
Gnd shape
CN11 13 ACZ_SDOUT_AUDIO_MDC 13 ACZ_SYNC_AUDIO_MDC 13 ACZ_SDIN1
D
ACZ_SDOUT_AUDIO_MDC
R316 C565
ACZ_SYNC_AUDIO_MDC AC_SDIN1_MDC 33_4 *10P/50V_4
1 3 5 7 9 11
2 4 6 8 10 12
GND REV A_SDO REV GND VCC A_SYNC GND A_SDI GND A_RST# A_BCLK
C564 0.1U/10V_4
R317
C563 2.2U/6.3V_6
C561 1000P/50V_4
Nut PN:MBCA6002013
*0_4/S
BIT_CLK_AUDIO_MDC
D
13
MDC CONN
For EMI
13 ACZ_RST#_AUDIO_MDC
C567 *10P/50V_4
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2
1
2
3
4
http://laptop-schematic.com/ 5
6
Document Number
Date: Thursday, December 24, 2009 7
Rev 1A
AMP_TPA6017/MDC1.5/CPU FAN Sheet
28 8
of
42
4
+3VSUS
1
Q30 ME2303T1
2
BTCON_P1 BLUELED USBP15USBP15+
6 5 4 3 2 1
T126 BLUELED 32,33 USBP15- 13 USBP15+ 13
+5VPCU
32 USBPW_ON#
3
3
VIN1 VIN2 EN GND
OUT3 OUT2 OUT1 OC
C580 0.1U/10V_4
To TOUCH PAD SW board
13 13
C
USBP0+ USBP0-
CN8 SBK160808T-680Y-N(0.3A,68) SBK160808T-680Y-N(0.3A,68)
1 2 3 4 5 6
TPDATA-1 TPCLK-1
10P/50V_4
TP_R TP_L
TP_R
1 2 3 4
For layout routing
13 13
close conn R155 R168
USBP5+ USBP5-
*DLW21HN900SQ2L(330mA) USBP5+ 4 3 USBP51 2 L39
4.7K_4 4.7K_4
TPCLK TPDATA
CN27 USB0PWR USBP5USBP5+ C455 *47P/50V_4
1 2 3 4
C462 *47P/50V_4
1 2 3 4
8 7 6 5
GND GND GND GND
USB CONN
C453 *Clamp-Diode_6 B
C
88513-044N
TOUCH PAD CONN
+3VSUS
8 7 6 5
GND GND GND GND
C427 *Clamp-Diode_6
1
C409
C422 *Clamp-Diode_6
CN9 TP_L
2
L37 L36
L38
10P/50V_4
1 2 3 4
USB CONN
1
C417
*DLW21HN900SQ2L(330mA) USBP0+ 4 3 USBP01 2
1
0.1U/10V_4
2
C416
+3VSUS
1 2 3 4
C426 *47P/50V_4
1
SI , add C409,C417 from EMI suggest
D
CN26
C423 *47P/50V_4
25 mils
C731
USB0PWR USBP0USBP0+
2
TOUCH PAD CONN
TPDATA TPCLK
C732 0.1U/10V_4
AL000547000 IC(8P) G547 (MSOP-8) - 2A AL000545000 IC OTHER(8P) G545A2P8U(MSOP-8) - 2A
1
C579 10U/6.3V_8
TPDATA TPCLK
C733 *470P/50V_4
G547 (TPS2061D)
24mil
BTV
32 32
USB0PWR
8 7 6 5
100UF_6.3V
Q27 PDTC144EU
2
BT_OFF#
C754 1U/10V_4
C576 0.1U/10V_4
80 mils (Iout=2A)
U28
2 3 4 1
BTV
D
14
29
LEFT SIDE USBX2
CN16 BLUE TOOTH CONN 87213-0600-6P-L R329 4.7K_4
1
1
+3VPCU
2
2
BLUETOOTH
3
2
5
C463 *Clamp-Diode_6
SATA HDD CONNECTOR
B
SI , update P/N : DFHS13FS019 CN31
1
Main HDD
SI , delete CN30 change to ANT CONN
19 A
+3V_HDD1
+3V
SI , add +3V support R542 +5V_HDD1
+5V_HDD1
Right SIDE USBX1 SATA_TXP0 14 SATA_TXN0 14 SATA_RXN0 14 SATA_RXP0 14
+5VPCU C49
+3V_HDD1
.1U/10V_4 CN4
PV , change USBPW_ON# from PIN2 to PIN3 and let PIN2 pull high to +5VPCU +5V 32 USBPW_ON# 13 USBP613 USBP6+
1 2 3 4 5 6
4 USBP61 USBP6+ *DLW21HN900SQ2L(330mA)
3 2 L10
USB board
SI , add +3V support and new define
A
SATA HDD
*0_8
+5V: 2 A(4 Pin)
+5V C805 10U/6.3V_8
R503
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
C804 4.7U/6.3V_6
C807 0.1U/10V_4
C800 10U/6.3V_8
Gnd : (5 Pin)
*0_8/S
PROJECT : AX2/7 Quanta Computer Inc.
ANT CONN Size Custom NB5/RD2
5
4
3
http://laptop-schematic.com/ 2
Document Number
Rev 1A
BT/USBX3/TP/HDD
Date: Thursday, December 24, 2009 1
Sheet
29
of
42
5
4
3
2
1
30
+3V_LAN +DVDD12
+CTRL12DVDD
R40
*0_6/S
+EVDD12
Power trace Layout 寬 寬 > 30mil +3VLANVCC
Power trace Layout 寬 寬 > 30mil C54 .1U/10V_4
C52 .1U/10V_4
C107 .1U/10V_4
C53 C88 .1U/10V_4
C67 1U/10V_4
LANVCC 1.2W 364mA
SI , remove EEPROM U5,C48,R42,R50
C76 1U/10V_4
C109 .1U/10V_4
4.7U/6.3V_6
C56 .1U/10V_4
C55 .1U/10V_4
CLOSE to Pin 29,37
C604 .1U/10V_4
XTAL2
C97 C83
10U/6.3V_8 .1U/10V_4
XTAL1
1 C62
C69
33P/50V_4
U6
MDI1+ MDI1-
ISOLATEB
2 1 D13 *RB501V-40
48 47 46 45 44 43 42 41 40 39 38 37
R51 15K/F_4
0.1U/10V_4
LAN_DISABLE#
13,32
2
12 LAN_PLTRST#
if ISOLATEB pin pull-low,the LAN chip will not drive it's PCI-E outputs ( excluding PCIE_WAKE# pin )
4 TC7SH08FU
R60
*0_6/S
R57
*0_6/S
LAN_REST_R#
1
LAN-AGND
DB modified to short-pad
DVDD12B LED1/EESK LED2/EEDI LED3/EEDO EECS GND3 DVDD12A VDD33A ISOLATEB PERSTB LANW AKEB CLKREQB
DVDD12 GND2 HSIP HSIN REFCLK_P REFCLK_N EVDD12 HSOP HSON EGND NC/SMCLK NC/SMDATA
+DVDD12
AVDD33 MDIP0 MDIN0 NC/FB12 MDIP1 MDIN1 RTL8103EL GND1 NC/MDIP2 NC/MDIN2 DVDD12/AVDD12 NC/MDIP3 NC/MDIN3
CLOSE to Pin 1 C64
36 35 34 33 32 31 30 29 28 27 26 25
+DVDD12
EESK_LED100# EEDI_LED10# EECS
C
R333
3.6K_4
R350
1K/F_4
+3V_LAN
PV , add R333 pull high and R350 pull low to fix LAN LED behavior abnormal
+DVDD12 +3V_LAN
ISOLATEB LAN_REST_R# PCIE_WAKE# R569
R45
*0_4
LAN_REST# 32 PCIE_WAKE# 13,33 LAN_CLKREQ# 13
0_4
PV, add for debug
HP request reserve white LED driver circuit
LAN_WLED#
Q31 *DTC144EUA
SI , add from HP request
1
R404
3
*10K/F_4
+3VLANVCC
2
1 2 3 4 5 6 7 8 9 10 11 12
MDI0+ MDI0-
100/F_4
R55 *1K/F_4
+3V_LAN
VCTRL12A/SROUT12 GND4 RSET VCTR12DVDDSR NC/VDDSR NC/ENSWREG CKTAL2 CKTAL1 NC/AVDD33 NC/LV_PLL LED0 VDD33B
+3V_A_LAN
R44
LAN_WLED#
10U/6.3V_8 .1U/10V_4 U7
C
+3V_LAN
Delete R261 and add D38 as current loss issue
33P/50V_4
2
+CTRL12A C111 C108
C601 *.1U/10V_4
+3V
2 Y2 25MHZ
2.49K/F_4 LANRSET
R97
+3V_A_LAN
close to pin 19
5
+CTRL12DVDD
D
LAN-AGND
CLOSE to Pin 10, 13, 30, 36
3
D
SI , add for DSM
13 14 15 16 17 18 19 20 21 22 23 24
Q32 *DTC144EUA
+DVDD12
LAN CABLE DETECT
1
32
LAN_WLED#_Q
3
LAN-AGND 9 PCIE_TXP2_LAN 9 PCIE_TXN2_LAN
PCIE_RXN2_LAN_L PCIE_RXP2_LAN_L PCIE_LAN_CLKP PCIE_LAN_CLKN
12 PCIE_LAN_CLKP 12 PCIE_LAN_CLKN
B
C70 C78
.1U/10V_4 .1U/10V_4
PCIE_RXN2_LAN 9 PCIE_RXP2_LAN 9
LAN_WLED#
R413
*0_4/S
+EVDD12
SI , change to AL08103EB01 for support DSM chip
PV, change to short pad
B
EMI suggestion C663
.1U/10V_4
RJ45
SI , rotate 180 degree for EMI suggestion
CN25 +3V_LAN
R387
LAN_AMLED 12 LAN_AMLED# 11
330_4
LAN_Transformer
LAN_MX1-
Bios need change
LAN_MX1+ LAN_MX0LAN_MX0+
U20
75/F_4
R112
75/F_4
A
R111
LAN_MCT0_2 C161 0.01U/100V_0603
LAN_MCT0_1 C159 0.01U/100V_0603
LAN_MX1-
1
LAN_MX1+
3
RD+ RD-
RX+
16
MDI1-
CT
15
V_DAC_2
EEDI_LED10#
LAN_MCT1
2
CT
RX-
14
MDI1+
LAN_MX0-
6
TD+
TX-
9
MDI0+
CMT
10
V_DAC_1
TX+
11
MDI0-
LAN_MX0+
8
LAN_MCT0
7
TDCT
R392
*0_6 +3V_LAN
C117 .01U/16V_4
EESK_LED100#
R391
R403
330_4
LAN_WLED 10 LAN_WLED#_Q 9
*0_6/S LAN_AMLED#
LAN_WLED#
NS681684
LAN_WLED#
Link
C668
C699
14
GND
13
LED_W HITE_P LED_W HITE_N
Fixed RJ45 Pin define (0829)
*.01U/16V_4
*.01U/16V_4
EMI suggestion
PROJECT : AX2/7 Quanta Computer Inc.
C118 .01U/16V_4 Size Custom
4
GND1
RJ45_CONN
NB5/RD2 5
RX1RX1+ RX0TX1TX1+ RX0+ TX0TX0+
.1U/10V_4 C697
C610 1000P/3KV_1808
SI , change footprint to CC1808
8 7 6 5 4 3 2 1
LED_AMBER_P LED_AMBER_N
3
http://laptop-schematic.com/ 2
Document Number
Rev 1A
RTL8102EL/RJ45
Date: Thursday, December 24, 2009 1
Sheet
30
of
42
A
5
4
3
POWER BUTTON CONNECTOR
2
KEYBOARD CONN
1
31
PV,update footprint to bl135h-32rla-tand-32p-l-smt
CN7
NBSWON1#
1
+PWLEDVCC
C63
C58
C59
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
G1 *SHORT_ PAD1
+3VPCU C61
R62 +5VPCU
1 1
39_6 2
R58 +3VPCU 23,32 LID_EC# 32 NBSWON1# 32 PWR_LED#
0.1U/10V_4
*39_6 2
CN5 PWR BTN CONN
1. +3VPCU(LIDSWITCH PWR) 2. LEDVCC(+3VPCU)
1 2 3 4 5 6
+PWLEDVCC PWR_LED#
3. LIDSWITCH 4.POWERON# 5. PWRLED#
C60 1000P/50V_4
C
C232 C298 C309 C276
220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4
MY8 MY9 MY10 MY11
C283 C174 C347 C341
220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4
MY1 MY2 MY4 MY0
C237 C252 C265 C213
220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4
MX4 MX6 MX3 MX2
C184 C169 C224 C218
220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4
MX7 MX0 MX5 MX1
C163 C244 C195 C154
220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4
MY12 MY13 MY14 MY15 MY16 MY17
C319 C323 C335 C357 C367 C379
220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4 220P/50V_4
2
2
1
D
MY5 MY6 MY3 MY7
MX1 MX7 MX6 MY9 MX4 MX5 MY0 MX2 MX3 MY5 MY1 MX0 MY2 MY4 MY7 MY8 MY6 MY3 MY12 MY13 MY14 MY11 MY10 MY15 MY16 MY17 32 32
+3V CAPSLED# NUMLED#
R140 2 1 200/F_6 R142 2 1 200/F_6 WIRELESS_ON_R WIRELESS_OFF_R
+3V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
32
MY[0..17]
MY[0..17]
32
D
KEYBOARD PULL-UP RP37 +3VPCU
10 9 8 7 6
MY13 MY12 MY3 MY6
10P8R-8.2K
+3VPCU
RP36
10 9 8 7 6
MY1 MY5 MY0 MY9
10P8R-8.2K
+3VPCU
R406 R408
R145 2
SI , delete CN13 change to ANT CONN
R500 *1K/F_4
1 200/F_6
R150 2
1 200/F_6
SATA_TXP1 14 SATA_TXN1 14
2
32 WIRELESS_OFF
Q35 *PDTC144EU
1
Q34 *PDTC144EU
+5V
1
2
32 WIRELESS_ON
SI , update P/N : DFHS13FS019
3
WIRELESS_OFF_R
3
WIRELESS_ON_R
R322
SATA_RXN1 14 SATA_RXP1 14 R330 2
8.2K_4 MY16 8.2K_4 MY17
+5V
SI , reserve Q34,Q35,R499,R500 for dual_LED on keyboard
SATA CD-ROM
B
*10K/F_4
1 1K/F_4 +5V_ODD
32
R323
EJECT#
*0_4
ODD_EJECT#
ODD_EJECT#
SI , remove R328 +5V
+15VALW C572 R327
AO3404 ID current 5.8A
19
1
*330K_6
ANT CONN
Q29 *AO3404
+5V_ODD
2 1
High : ODD power down Low : ODD power on
3
SATA ODD
PV, change to reserve only
*.1U/10V_4
3
2
1 B
MY2 MY4 MY7 MY8
1 2 3 4 5
R499 *1K/F_4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
MY14 MY11 MY10 MY15
1 2 3 4 5
C
+5V
CN15
MX[0..7]
MX[0..7]
KB CONN
SI , update P/N
6. GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
1
R326
2
*22_8
C578 *.027U/25V_6
A
3
Q28 *2N7002E
A
1
2
2
ODD_PD
1
32
120 mils +5V_ODD
+5V_ODD C573 0.1U/10V_4
C574 0.1U/10V_4
C571 0.1U/10V_4
C570 0.1U/10V_4
R324
+5V
2
PROJECT : AX2/7 Quanta Computer Inc.
Q26 *2N7002E
0_8
1
C575 10U/6.3V_8
Size Custom NB5/RD2 5
4
3
http://laptop-schematic.com/ 2
Document Number
Rev 1A
KEYBOARD/SW_BOARD/ODD
Date: Thursday, December 24, 2009 1
Sheet
31
of
42
5
4
3
2
1
+3VPCU +3V U8
31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31 31
MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MY16 MY17
C
40 29 29
ACIN TPCLK TPDATA
KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37
MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MY16 MY17
39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82
KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49
SLPBTN# Vari_ON ACIN TPCLK TPDATA
83 84 85 86 87 88
PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D PSCLK3/GPIO4E PSDAT3/GPIO4F
BIOS_RD# BIOS_WR# BIOS_CS# R61 *0_4/S
SI , add for DSM 12
55 56 57 58 59 60 61 62
SERR#
VGA_ON_SB VGA_PWROK
12 VGA_ON_SB 12,37,38 VGA_PWROK T1 T2 33 RF_LINK#
RF_LINK# BLUELED
30 LAN CABLE DETECT T3 USBPW_ON# SUSON MAINON LAN_POWER S5_ON VR2.5_ON
29 USBPW_ON# 37,39 SUSON 34,37,39,40 MAINON 39 LAN_POWER 35,39 S5_ON 39 VR2.5_ON 13,30 LAN_DISABLE# 20,37,38 VGACOREON 40 MBATLED0# 40 AC_LED_ON# 31 WIRELESS_ON 31 WIRELESS_OFF
VGACOREON MBATLED0# AC_LED_ON#
119 120 128 89 76 109 110 112 114 115 116 117 118 97 98 99 100 101 102 103 104 105 106 107 108
124
B
C585 0.1U/10V_4
10K/F_4
R78 R74 R346 R345
10K/F_4 10K/F_4 4.7K_4 4.7K_4
HWPG
NBSWON1# SLPBTN# MBCLK MBDATA
R65 *10K/F_4 Vari_ON
AD0/GPI38 AD1/GPI39 AD2/GPI3A AD3/GPI3B
63 64 65 66
TEMP_MBAT AD_TYPE AD_AIR SYS_I
DA0/GPO3C DA1/GPO3D DA2/GPO3E DA3/GPO3F
68 70 71 72
CC-SET
PWM1/GPIOF PWM2/GPIO10
21 23
PWM_VADJ KEY_BEEP (1KHz)
FANPWM1/GPIO12 FANPWM2/GPIO13 FANFB1/GPIO14 FANFB2/GPIO15
26 27 28 29
EC_ACLIM FAN1SIG
77 78 79 80
MBCLK MBDATA MBCLK2 MBDATA2
SCL1/GPIO44 SDA1/GPIO45 SCL2/GPIO46 SDA2/GPIO47
R68 10K/F_4
TEMP_MBAT 40 AD_AIR SYS_I
RSMRST#
40 40
C588 +3VPCU
R336
*8.2K_4
SI , enable Vari-bright need pull low
PWM_VADJ 23 T91 CV-SET EC_ACLIM FAN1SIG ODD_PD
40 40 28 31
MBCLK MBDATA MBCLK2 MBDATA2
5,40 5,40 5,18 5,18
PV , change to test point +3VPCU
Battery charge/discharge Cap button C80 0.1U/10V_4
VGA thermal system thermal U17
GPIO4 GPIO7 GPIO8 GPIOA GPIOB GPIOC GPIOD GPIO11 GPIO16 GPIO17 GPIO18
RD WR SELMEM/SPICS SELIO/GPIO50 AD5/GPI43 D0/GPXD0 D1/GPXD1 D2/GPXD2 D3/GPXD3 D4/GPXD4 D5/GPXD5 D6/GPXD6 D7/GPXD7
GPIO19 GPIO1A
6
SUSB#
14 15
HWPG CPU_PROCHOT#
16 17 18 19 25 30 31 32
SUSC# M93_STRP
EMU_LID KBSMI#1
34 36
VRON NUMLED#
SUSB#
BIOS_CS# SPI_CLK BIOS_WR# BIOS_RD#
13
HWPG 23,34,35,37,39 CPU_PROCHOT# 3 SUSC#
R84
+3VPCU
M93_STRP
R89
1 6 5 2
33_4
10K/F_4 SPI_3P
XCLKO XCLKI GND1 GND2 GND3 GND4 GND5 AGND
V18R
C587 4.7U/6.3V_6
SCI#
HOLD#
WP#
VSS
C
SOCKET DG008000031 VRON 35,36,37,39 NUMLED# 31
73 74 75 90 91 92 93 95 121 126 127
EJECT# T9 T10
OP_FAN_SEL DNBSWON#1 CAPSLED# PWR_LED# ECPWROK RSMRST# VOLMUTE# SPI_CLK LID_EC#
123
CRY2
122
CRY1
CAPSLED# 31 PWR_LED# 31 ECPWROK 5,16 RSMRST# 13 VOLMUTE# 27 LID_EC#
C57
11 24 35 94 113 69
31
Project Model AX 14" AX 15.6" AX 17.3"
23,31
27P/50V_4
GPIO42 High Low Middle (1.5V)
OP_FAN_SEL
R90
*10K/F_4
R79
10K/F_4
+3VPCU
32.768KHZ Y1
GPIO42 control fan table B
C50
27P/50V_4
SI , change package 3920_RST# C144 +3VPCU
R105
BLUELED
3920_RST# 5
0.1U/10V_4
47K_4
R41
100K/F_4
DNBSWON# 13
KBSMI#1
D27 1
2RB500V-40
KBSMI#
Change D12, D16 to RB500 for current loss
+3VPCU_EC
+3VPCU
+3VPCU
1
2RB500V-40
13
D26 1SS355
2
L13 +5VPCU
*SBK160808T-680Y-N(0.3A,68)
AD_TYPE
U19 2200P/50V_4
4
13
D12 1
C464
10K/F_4 SPI_7P
7
MAX AKE38FP0Z00 2M byte WINBOND AKE38FP0N01 SPI BIOS EON AKE38ZA0Q00
R552 *1K/F_4
PV, change from 18p to 27p from vendor update
DNBSWON#1
MAINON
8
VDD
PV,reserve for identify M93-LP VGA chip GPIO40 GPIO41 AD4/GPI42 GPIO52 GPIO53 GPIO54 GPIO55 GPIO56 GPIO57 GPIO58 GPIO59
A0/GPXA0 A1/GPXA1 A2/GPXA2 A3/GPXA3 A4/GPXA4 A5/GPXA5 A6/GPXA6 A7/GPXA7 A8/GPXA8 A9/GPXA9 A10/GPXA10 A11/GPXA11
2 CH501H-40PT
R76
CE# SCK SI SO
MX25L1605DM2I-12G
29,33 BLUELED
1
3
13
T5 NBSWON1# 31 LAN_REST# 30 EC_DEBUG1 33 EMU_LID 23
NBSWON1#
KB3926
D25
D
RSMRST# 13 2.2U/6.3V_6
CC-SET 40 CELL_SLT 40 FAN1ON 28 D/C# 40
FAN1ON D/C#
For KB3926 C version
SCI1#
32
+3VPCU
+3VPCU_EC
SCI/GPIOE GA20/GPIO0 KBRST/GPIO1 ECRST
MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7
R71
+3VPCU
2
MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 4.7U/6.3V_6
1
31 31 31 31 31 31 31 31
20 1 2 37
C584 C143 C590 C592 C589 C586 C591 C131
9 22 33 96 111 125 67
2
GATEA20 RCIN#
VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 AVCC
3
13 13
SCI1# GATEA20 RCIN# 3920_RST#
SERIRQ LFRAME LAD0 LAD1 LAD2 LAD3 PCICLK PCIRST/GPIO5 CLKRUN
1
D
CLKRUN#
3 4 10 8 7 5 12 13 38
4
SERIRQ LFRAME# LAD0 LAD1 LAD2 LAD3 PCLK_LPC_KB3920
12 SERIRQ 12,33 LFRAME# 12,33 LAD0 12,33 LAD1 12,33 LAD2 12,33 LAD3 12 PCLK_LPC_KB3920 12 PCIRST# 12 CLKRUN#
PV,add for EMI
5
VOUT
VIN
C114
C147 C613
4.7U/6.3V_6
A
4 C130
R109
100/F_4
AD_ID
40
1
SHDN
3
NR/FB GND TPS73133
2
0.1U/10V_4
R108 24.3K/F_4 A
*1U/6.3V_4
*1U/6.3V_4
PROJECT : AX2/7 Quanta Computer Inc. Size Custom
Document Number
Date: Thursday, December 24, 2009
5
4
3
2
Rev 1A
KB3926/ROM/TP
http://laptop-schematic.com/ NB5/RD2
1
Sheet
32
of
42
A
B
C
D
E
33
Mini PCI-E Card 1 WLAN +3VSUS +1.5V R110
*10K/F_4
2
+3V
SI , udpate footprint to MIPCI-C-1759513-52P-LDV-SMT
C583 0.01U/16V_4
C139 0.1U/10V_4
C132 10U/6.3V_8
+1.5V
D
32
9 9
R43
*0_6
51 49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17
EC_DEBUG1
PCIE_TXP1 PCIE_TXN1
PCIE_TXP1 PCIE_TXN1
9 9
PCIE_RXP1 PCIE_RXN1
PCIE_RXP1 PCIE_RXN1
PCLK_LPC_DEBUG MINI_PLTRST#
12 PCLK_LPC_DEBUG
SI , add from HP request 15 13 11 9 7 5 3 1
PCIE_MINI1_CLKP PCIE_MINI1_CLKN
12 PCIE_MINI1_CLKP 12 PCIE_MINI1_CLKN
WLAN_CLKREQ#
13 WLAN_CLKREQ# 14 BT_COMBO_EN# T131
MINICAR_PME#
C
BT_DATA,BT_CHCLK,CLKREQ# internal pull-DOWN 100k ohm
3
13,30 PCIE_WAKE#
CN20 +5V
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved GND PETp0 PETn0 GND GND PERp0 PERn0 GND Reserved Reserved
+3.3V GND +1.5V LED_W PAN# LED_W LAN# LED_W W AN# GND USB_D+ USB_DGND SMB_DATA SMB_CLK +1.5V GND +3.3Vaux PERST# W _DISABLE# GND
52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18
Reserved Reserved Reserved Reserved Reserved +1.5V GND +3.3V
16 14 12 10 8 6 4 2
GND REFCLK+ REFCLKGND CLKREQ# BT_CHCLK BT_DATA W AKE#
MINI_BLED RF_LINK#
R47
*0_4
R54
10K/F_4
R63 R67
*0_4/S *0_4/S
D
MINICAR_PME#
+3V
BLUELED 29,32 RF_LINK# 32 +3V USBP10+ USBP10-
DAT_SMB CLK_SMB
1 Q16 *PDTC144EU
MINI_PLTRST#
13 13
C148 0.1U/10V_4
MINI_PLTRST# 12 RF_OFF# 14 LAD0 LAD1 LAD2 LAD3 LFRAME#
C170 10U/6.3V_8
PDAT_SMB 6,7,13 PCLK_SMB 6,7,13
LAD0 LAD1 LAD2 LAD3 LFRAME#
12,32 12,32 12,32 12,32 12,32
INTEL WLAN CARD PIN 20 W_DISABLE# have internal pull-up 110k ohm
+3V
C81 0.1U/10V_4
C582 1U/10V_4 C
MINI PCIE H=9.0 DFHD52MS154 MIPCI-C-1759513-52P-LDV-SMT
R106 *10K/F_4
PCLK_LPC_DEBUG
R82
*0_4
C106 *27PF/50V_4
for EMI request
朝朝 14
SATA_LED#
LED1 1
3P WHITE LED 2
+3V_SATA_LED
R531 1
390_6 2
+5V
B
B
SI , change footprint to ledl-s110kgct-3p-nb5
A
A
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2 A
B
C
http://laptop-schematic.com/ D
Document Number
Rev 1A
Mini CARD/LED
Date: Thursday, December 24, 2009 E
Sheet
33
of
42
5
4
3
2
1
34
DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW
+VIN
Place these CAPs close to FETs
D
Place these CAPs close to FETs
D
PD14
2
4 +5V_VCC1
0.1U/10V_4
+3VPCU PQ52 AO4496
Rds(on) 17m ohm
PR83
1
5V_DL
PR68
PC105 3 1 2
PD13 BAV99 2
3 2 1
PQ53 AO4712
PC215 2
PC216
220U/6.3V_7343ESR25
1
+
PC196
0.1U/10V_4
1
PR112 0_4
PC110
2
1
2
2 5 6 7 8
3V_DH 3V_LX
PR113 *0_4
Rds(on) 14m ohm
PGOOD2 2
B
PR200 *0_4/S PGOOD1
0.01U/25V_4
HWPG
23,32,35,37,39
1
+15VALW
2
2
PR192 *2.2_8
4
1
2 2 0.1U/25V_4
1 1
PGOOD2
PC97
PD6 1SS355
C
1
0.01U/25V_4
1
+5VALW
2
PC101 3 2 1
PD9 BAV99 2
PC100
1
1 3V_FB2
+3.3V_ALWP
+5VALW
1
+10VALW
PR104 3V_BST2 1 2_6 3V_DL
5V_BST1
2
2_6
B
3 2 1
38 35 34 33 17 18 19 20 21 22 23 24
0.1U/25V_4
PC88
PR114 249K/F_4
2
2 PQ49 AO4712
1
1 2 3
PR70 0_4
32 31 30 29 28 27 26 25
1
1 PC194 *1500P/50V_4
0.1U/10V_4
1
220U/6.3V_6X4.5ESR18
PR75 *0_4
2
PC212
1
PC211
4
PL10 2.2UH/8A
1U/6.3V_4
1
PR190 *2.2_8
+ 2
5V_DH 5V_LX
PU6 RT8206B
REFIN2 ILIM2 OUT2 SKIP PGOOD2 ON2 DH2 LX2
0.1U/25V_4
8 7 6 5
PGOOD1
BYP OUT1 FB1 ILIM1 PGOOD1 ON1 DH1 LX1 PAD PAD PAD PAD
42 41
5V_FB1
2
2
+5V_ALWP
9 10 11 12 13 14 15 16 37 36 39 40
PAD PAD PAD PAD BST1 DL1 VDD N.C AGND PGND DL2 BST2
PR73 249K/F_4 1 2
1 2 3
PL3 2.5uH/7.5A
PAD PAD
PQ57 AO4496
LDOREFIN LDO IN N.C ONLDO VCC TON REF
4
2
PV modify 12/17
PV modify 12/17
PC104
1
8 7 6 5
PC90 4.7U/6.3V_6
+3.3V +/- 5% Countinue current:5A Peak current:6A OCP minimum:7.5A
5 6 7 8
1
8 7 6 *0.1U/10V_4 5 2 4 3 2 1
PC96
C
PC51
PC99
+5VALW
+5VPCU
PC60
*1500P/50V_4
+5V +/- 5% Countinue current:5A Peak current:6A OCP minimum:7.5A
PC25
1U/6.3V_4
1
0.1U/25V_4
1
PC93
PC23
4.7U/25V_8
+5V_VCC1
4.7U/25V_8
2
150K/F_4
2200P/50V_4
2
UDZ5V6B-7-F
1
2 1
4.7U/25V_8
PC58 0.1U/25V_4
4.7U/25V_8
PC59
0.1U/25V_4
2
1K/F_4
PC55
2200P/50V_4
PC56
*4.7U/25V_8
PC57
PR99 8206ON_LDO
1
PR100
PC108 1U/25V_6 SYSON
2
2
1
100K/F_4
PC84 2.2U/6.3V_6
*0_4/S
REF
VIN
1
2
R217
SYS_SHDN#
OT
5 5
4
+5VPCU PU9
PR133 *576/F_4
PC136 *0.1U/10V_4 2
EN
6
1
GND
NTC need place under CPU Socket CPU Thermal protection at 90 +/-3 degrreC
NTC
2
*RT9726
PR135 *0_4
1
A
MAINON 32,37,39,40
PR134 *100K/F_4
PROJECT : AX2/7 Quanta Computer Inc.
1
PR132 *10K/F_NTC_0603
3
2
A
Size Custom
EC_SI NB5/RD2
Document Number
5
4
3
http://laptop-schematic.com/ 2
Rev 1A
+5V/+3V (RT8206B)
Date: Thursday, December 24, 2009 1
Sheet
34
of
42
3
2
+5VPCU
8208RTVDD1.1V
5
0.1U/25V_4
4.7U/25V_8
2
D0
2200P/50V_4 1
3 2 1 PR79
RDSon=14m ohm
4.7U/25V_8
PC242 10U/6.3V_8
GND1
9
R1
PC170
PC171 0.1U/10V_4
VDD
1
PGOOD
GND
8
GND1
9
PR137
1.2VADJ
R1
PC159
PC160
PR145 *51.1K/F_4
*0_4 PR141 *100K/F_4
R2
A
VO=(0.8(R1+R2)/R2) R2<120Kohm
PV modify 12/11
38.3K/F_4
PR162 100K/F_4
PROJECT : AX2/7 Quanta Computer Inc.
1
VO=(0.8(R1+R2)/R2) R2<120Kohm Size Custom NB5/RD2
5
PC158
*0.1U/10V_4
4
*10U/6.3V_8
1
EN
PC157 2
VOUT
6
Peak current:0.5A
1
PC173
5
*10U/6.3V_8
+5VPCU PC152
2
ADJ
PR140
NC
PR165
1.1VADJ
*0_4/S 1
R2 PV modify 12/17
8
7
1U/6.3V_4
2 HW PG
PR163 2
GND
B
+1.2V PU11 *RT9025
*10_4
HW PG
PGOOD
PC167
6
10U/6.3V_8
VDD
VOUT
10U/6.3V_8
EN
4 1
1
*0.33U/6.3V_4
2
ADJ
+5VPCU
A
5
+1.1VS5 PU13 RT9025
10K/F_4 PC166
NC
VRON
PC156
*0.33U/6.3V_4
0.1U/10V_4
PR164
PC169
VIN
2
S5_ON
PC168 10U/6.3V_8
3
1.1 Volt +/- 5% Countinue current:0.2A Peak current:0.5A
PC155
VIN
7
Vo=0.75(R1+R2)/R2
+3VPCU
+/- 5%
Countinue current:0.3A 3
RDSon=20m ohm *100P/50V_4
1.2 Volt
+1.5VSUS
2
EC_SI
PC240
*1U/6.3V_4
10K/F_4
PC172
PV modify 12/16
PC239
*0.1U/10V_4
2
1 PC238 1500P/50V_4
PQ64 AO4712
3 2 1
4.87K/F_4
0.1U/25V_4
2200P/50V_4
5 6 7 8 4
PR169
PV modify 12/14
+ PR226 2.2_8
B
PR168
600 mils
0.1U/10V_4
FB
3
PR173 232K/F_4
1
RTDL
+1.1V
+1.1V_S2 PL14 2.5uH/7.5A
2
RTTON
8
1
VOUT
16
DL
PQ65 AO4496 3 2 1
TON
PC179
5 6 7 8
RTLX
4
PC180
*10U/6.3V_8
1
1U/6.3V_4 13
11
PGND 7
GND
PAD
14
PR174 *1M/F_4
NC
17
PHASE RT8209A
EN/DEM
6
10_4
RTDH
RTFB
NC
15
12
BST
5 RTEN
PGOOD
RTBST PC177
DH
VDDP
CS
9
2
*0_4/S 15K/F_4 HW PG_S2A 4 1
VDD
PU14
PC182
RTBST_1 PR175 2_6
RTVDD
1U/6.3V_4
PC174
10
+1.1V Volt +/- 5% Countinue current:5A Peak current: 7A OCP minimum: 9A
PC178
10_6
RTILIM
C
+VIN
PQ8 DMN601K-7
PR171
390U/2.5V_6X5.8ESR10
1 2
+5VPCU
Reserve for AMD tunning
32,39
PC204
Vo=0.75(R1+R2)/R2 PC103 *2.2U/6.3V_6
C
PR176
PC218
PC197
10K/F_4
*100P/50V_4
2
PR177
+
EC_SI
2.67K/F_4
PC85
0_4
VRON
PR72
4
*1500P/50V_4
7
10K/F_4
600 mils
2
PR194 *2.2_8
PR80 8208RTD10.1V 13.3K/F_4 8208RTFB1.1V
PR88
+1.1V_DYN_S1 PL9 2.5uH/7.5A 1
PQ51 AON7702
6
G1
D
+1.1V_DYN
1
D1
PAD
14
PC195
2
DL
232K/F_4 8208RTDL1
PC192
3 2 1
PR64 8208TON1.1V
8
PC193
4 PQ50 AON7410
5
16
PR95
PR170 2
0.1U/25V_4
TON
17
10 DYN_PW R_EN
23,32,34,37,39 HW PG
BST
PHASE
EN/DEM
+3VPCU
PV modify 12/17
13
9 VDDP
PGOOD
RT8208A
1.1
8208RTLX2.1V
8208RTEN1.1V 15
3
0.95
8208RTDH1.1V
0.1U/25V_4
+1.1V_DYN
Low
12 11
*0.22U/10V_4
High
DH
8208RTPG1.1V 4
PC76
DYN_PWR_EN
2
CS
FB
10K/F_4
VDD
PR61
8208CS1.1V10
12.1K/F_4
3
32,36,37,39 VRON
2 PC78
1
23,32,34,37,39 HW PG
*0_4/S 1
PR65
1
2_6
PU3
PR71
PR74 2
8208BST1.1V_1
G0
PV modify 12/17
PC87 1U/6.3V_4
VOUT
D
10_6
5
1U/6.3V_4
PC83
35
+1.1V Volt +/- 5% Countinue current:5A Peak current: 7A OCP minimum: 9A
+VIN
PR66
1
0.1U/10V_4
4
390U/2.5V_6X5.8ESR10
5
4
http://laptop-schematic.com/ 3
2
Document Number
Rev 1A
VGA Core/+1.8VGFX/1.0VGFX
Date: Thursday, December 24, 2009 1
Sheet
35
of
42
A
B
C
D
E
F
G
H
+VIN
36
3 2 1
10U/6.3V_8
2
5
PR45 2
*0_4/S 1
6
1 PHASE_0
35 BOOT_0
1_6 33
0.22U/25V_6
PHASE_0
PQ47 RJK03D3DPA
PGND_0
ENABLE
LGATE_0 PVCC
OCSET
PGND_NB
VDIFF_0
PGND_1
FB_0
UGATE_1
COMP_0
PHASE_1
LGATE_0
30
2
LGATE_1
modify for SI 1102
28
D 26
UGATE_1
27
PHASE_1
G 4
S 1 2 3
PQ54 RJK03B9DPA
0.22U/25V_6
LGATE_1
2
2
D
PC33
PC32
+VCORE
1
2
3
4
PR189 2.2_8
+
4
EC_SI
S
PQ46 RJK03D3DPA
PC47 PR49 0_4
PC191 1500P/50V_4
PR59
3 CPU_VDD0_RUN_FB_L
PC73
3
Parallel
ISP_1
18.2K/F_4 PC49
*6.81K/F_4
PR52 0_4
10_4
+ PC68
PR56 3.92K/F_4
0.1U/25V_4
PR55
3 CPU_VDD0_RUN_FB_H
*1000P/50V_4
PR48 0_4
0.1U/25V_4
PR54 3.92K/F_4
1
1 PC34
G
PR57
ISN_0
PR102
PC31
PL7 0.36uH/25A_11
5
1_6
PC30
PC38
PR42
25 29
+1.1V Volt +/- 5% Countinue current:35A Peak current: 40A OCP minimum: 45A
4.7U/6.3V_6
40
18.2K/F_4
+VCORE 10_4
4.7U/25V_8
+VIN
1
1 2 3
ISP_0
4.7U/25V_8
+5VPCU
PC48
PR105
Close to CPU socket
4.7U/25V_8
ISN_0 31
23
ISP_1
ISN_1 24
22
VW_1
COMP_1 21
FB_1 20
VDIFF_1 19
RTN_0
VSEN_1 18
13
1000P/50V_4
16
ISP_0
PC39
3
BOOT_1 VSEN_0
VW_0 ISN_0
12
15
PR41 6.81K/F_4
14
1200P/50V_6
0.1U/25V_4
32
PC35 11
PC67
1
9
PC41
PC189 1500P/50V_4
PC27
RBIAS
2
+ PC74
2
SVC
Pin 49 is GND Pin
PR22 97.6K/F_4
10
180P/50V_4
+
S
1
ISL6265AHRTZ-T
180P/50V_4 7
PR37
4
2
BOOT_0
SVD
4
PR20
3
EC_SI 2
PWROK
PR187 2.2_8
D G
ISP_0
1K/F_4
54.9K/F_4
2200P/50V_4
5 1 2 3
42
41
43 VSEN_NB
OCSET_NB
RTN_NB
34 UGATE_0
+VCORE
2
330u_2V_7343
*0_4/S 1
1
0.1U/50V_6 38
39
37
36 BOOT_NB BOOT_NB
LGATE_NB
44
45 COMP_NB
FSET_NB
46
47 VCC
VIN
UGATE_0
4700P/25V_4
PR30
PL8 0.36uH/25A_11 1
2
CPU_SVC
PR15 2
4
8
255/F_4
PQ43 RJK03B9DPA
PC220
330u_2V_7343
*0_4/S 1
PC11
PR29
PGOOD
+ PC219
330u_2V_7343
PR13 2
PR21 19.6K/F_4
PC26
330u_2V_7343
3
CPU_SVD
PC19
PC36
4.7U/25V_8
10K/F_4
PC16
4.7U/25V_8
PR53
S
PC13
4.7U/25V_8
6265AGND
VRON
4 PU1
PC17
PV modify 12/17 32,35,37,39
G
PC10
0.1U/25V_4
3
48
49 GND 2
*0_4/S 1
3
D
2200P/50V_4
3 CPU_PWRGD_SVID_REG
OFS/VFIXEN
modify for SI 1102
1 2 3
PR1 2
1
*10K/F_4
PR9 0_4
5
*0_4/S 1
PR8 0_4
5
PR2 2
16 VRM_PWRGD
FB_NB
6265AGND
PV modify 12/17 2
PR11
PR12 16.9K/F_4
100U/25V L-F
PR5 *0_4
+VIN 3 +
6265AGND PR6 0_4
3
CPU_VDDNB_RUN_FB_L
PR19 1_6
+5VPCU
+3VPCU
CPU_VDDNB_RUN_FB_H
PHASE_NB
2 1
6265AGND
PV modify 12/11
100U/25V L-F
0.8
44.2K/F_6
1.0
1
PC7
0
1
PC3 0.01U/25V_4
33P/50V_4
1
PR186 *0_4/S
PR191
PC243
PC8
RTN_1
1.2
6265AGND
17
1
PR3 10_6
PR193 PHASE_NB
UGATE_NB
2
0
1
1.4
PC4 1U/10V_4
PR10
0
+VIN
PC6
0
Output
1200P/50V_6
SVD
PC190 1500P/50V_4
PQ44 AO4712
1000P/50V_4
PR7 22.1K/F_4
3 2 1
PR4 10_6
PC205 390U/2.5V_6X5.8ESR10
PC5
+5VPCU
1
+ PC199
4
EC_SI
VFIXEN VID Codes SVC
1
PR188 2.2_8 LGATE_NB
0.1U/10V_4
X
47/F_4
V
X
6265AGND
5V
3A +CPUVDDNB
PL1 2.5uH/7.5A
47/F_4
X
PC18 4.7U/25V_8
PQ45 AO4496
X
V
3.3V 1
VFIXEN
2200P/50V_4
OFS
1.2V
PC24
5 6 7 8
ISL6265 Pin1
4
0.1U/25V_4
5 6 7 8
PC28 UGATE_NB
ISN_1
PR50 +1.5VSUS 1K/F_4
PR46
10_4
PC62 PR51 *0_4
3 CPU_VDD1_RUN_FB_H 4
PR130 PR58 *255/F_4
+VCORE
PC53 *1K/F_4
*4700P/25V_4
PC52
3 CPU_VDD1_RUN_FB_L
PR60 *54.9K/F_4
*180P/50V_4
Reserve for uni-plane
*1200P/50V_6
PR131
Close to CPU socket
+VCORE 5 4
+CPUVDDNB5
10_4
PROJECT : AX2/7 Quanta Computer Inc. Size C
A
B
C
D
http://laptop-schematic.com/ E
F
G
NB5/RD2
Document Number
Rev 1A
CPU_CORE(ISL6265)
Date: Thursday, December 24, 2009
Sheet H
36
of
42
1
2
3
4
5
6
+VIN
+
PR197 2.2_8
5
PQ56 RJK03D3DPA
PC214
15
2
13
RT8207AGQW
+VIN
10_6
VDDIO_FB_L 3 B
+1.5VSUS
+10VALW
+1.5V_VGA
PR148 *22_8
PQ19 AON6426L
PR153 1M_4
G
3
2 1
1
PQ21 DMN601K-7
+1.0V +/- 5% Countinue current:2A Peak current:3A
+1.5V_VGA
2
+1.5VSUS
0.01U/25V_4
PQ20 DTC144EUA
1
PC241 0.47U/6.3V_4
(6A )
PC153 PR146 1M_4
2
33K_4
C
S 1 2 3
2
3 PR229 20,32,38 VGACOREON
4
1
1.5V_ONG
VGA_REQ
3
PQ22 *DMN601K-7
PC146 0.1U/10V_4
D
1.5V_OND
C
EC_SI
VDDIO_FB_H 3
PC46
23,32,34,35,39
PR147 1M_4
13
1
2 HW PG
0_4
2
PR26 *10K/F_4
PC145
+1.0V_VGA 3 PC150
PC149
EC_SI PR151
32,35,36,39 VRON
*10K/F_4
PC154
+5VPCU
PR150 0.47U/6.3V_4
20,32,38 VGACOREON 110K/F_4
1U/6.3V_4
D
12,32,38 VGA_PW ROK
PU12 RT9025 2
EN
4
VDD
1
PGOOD
PC148
EC_SI
EC_SI
VIN
NC
5
VOUT
6
GND
8
GND1
9
PV modify 12/17
2
PR152 *0_4/S
PC139
PR149 100K/F_4
D
VO=(0.8(R1+R2)/R2) R2<120Kohm
1
PV modify 12/17
PC144
PR144 1.2VADJ1.0V R1 25.5K/F_4
1
R2
PC147
0.1U/10V_4
PGOOD
PR23 1
PR24 10K/F_4
1
ADJ
NC
PR33 2
12
PC15
1U/6.3V_4
PR47
V5FILT
14
PR25 10K/F_4
*10K/F_4
7
V5FILT
PC50
2
S5
EC_SI
+5VPCU
7.5K/F_4
0.1U/10V_4
11
V5IN
1116CS
16
1
1 *0_4/S PR40 1116TONSET 619K/F_4
S3
PC210 1500P/50V_4
PR44
1
10
*0_4 PR35
CS
17
2
VDDQSET
S
PC63
1U/6.3V_4
2
B
4
10U/6.3V_8
9
PR32
EC_SI
+VIN
G
0.1U/10V_4
VDDQSNS CS_GND
0_4
SUSON
18
1 2 3
8 PR227
PV modify 12/17
PGND
1116VDDQSET
*0_4
32,39
NC
5
7
2
D
1
1116DRVL
2
19
10U/6.3V_8
2
PC12 0.033U/10V_4
1
DRVL
PL6 CV-10L0MZ01/DC-10F0M102
2
1116LL
*100P/50V_4
LL
20
PQ48 RJK03B9DPA
+1.5VSUS
1
1116DRVH
+1.5VSUS_1
2
COMP
21
A
S
0.1U/25V_4
1
VTTREF
6
DRVH
4
2
5
2_6
G 2
1
4,6,7 DDR_VTTREF
1
10U/6.3V_8
MODE
*0_4/S
D 22
1
1 4
VBST
2
PR16
GND
PC70
0.1U/10V_4
2
( 3mA )
32,34,39,40 MAINON
37
1
3
modify for SI 1102 PC37
PR31
1116VBST
PC71
2200P/50V_4
23
PC72
4.7U/25V_8
VLDOIN
PC69
4.7U/25V_8
VTTSNS
PD5 *RB501V-40
PC20 *10U/6.3V_8
0.1U/25V_4
24
5
VTT
1 2 3
2 *0_4 +1.5VSUS_1
2
VTTGND
PR17
1
PU2 1
GND
4 CPU_VTT_SENSE
PR18 0_4
25
1 2
PC14 10U/6.3V_8
2
PC9
A
V5FILT
8
+1.5V +/- 5% Countinue current:6A Peak current:12A OCP minimum 15A
+1.5VSUS
10U/6.3V_8
1
+5VPCU
PR28
7
( VTT/2A )
390U/2.5V_6X5.8ESR10
+0.75V_DDR_VTT
PROJECT : AX2/7 Quanta Computer Inc. SANTOS INTEL
Size
2
3
4
http://laptop-schematic.com/ 5
6
Rev 1A
DDR3 (RT8207)
NB5/RD2 1
Document Number
Date: Thursday, December 24, 2009 7
Sheet
37 8
of
42
1
2
3
4
5
6
7
8
38
VGA Core +5VPCU
PD10 RB501V-40 2 18208RTBST1
PR87
0.9V
M
0
1
0.96V
PR81
B
PR101
+3VPCU
1
0
1.06V
TBD
1
1
1.12V
4.7U/25V_8
4.7U/25V_8
2
PR78
12.4K/F_4
60.4K/F_4
*100P/50V_4
RDSon=14m ohm
PC125
PC117
PC121
PC226
PC122
B
3
10K/F_4
H
PC94
0.1U/25V_4
PC225
8208RTFB1
+3VPCU
2200P/50V_4
1
EC_SI
+ PC124
0.1U/10V_4
0
+
*1500P/50V_4
0
5
PR91 56.2K/F_4
PR96 8208RTD10 150K/F_4
L
4
3 2 1
BST
VDD 7
PWRCNTL1 PWRCNTL0 V-CORE
PR217 *2.2_8 PQ61 AON7702
*10U/6.3V_8
8208RTD11
G1
RT8208A
*10U/6.3V_8
5
14
600 mils
*10U/6.3V_8
D1
PAD
1
8
17
PR90
PL13 1UH/11A-PCMD063T-1R0MN
2
DL
232K/F_4 8208RTDL1
+VGA_CORE
PQ63 AON7410
*330u_2V_7343ESR9
8208TON1
A
+VGACORE +/- 5% Countinue current:8A Peak current:10.5A OCP minimum 12A
1
16
PC127
330u_2V_7343ESR6
TON
PC128
2
EN/DEM
PC130
3 2 1
8208RTLX2
PC129
4
5
13
9
11
VDDP
PHASE
D0
8208RTEN1 15
PC102 0.22U/10V_4
PGOOD
6
EC_SI
8208RTDH1
FB
*0_4/S 100K/F_4
12
3
PR92
20,32,37 VGACOREON
8208RTPG1 4
1
PC111
2
DH
CS
VOUT
2
10
14.7K/F_4
PR86 12,32,37 VGA_PWROK
8208CS1
2
PU7 PR111
PR106 0_6
G0
DEL PD7
8208BST1_1 1
1
PV modify 12/17 PR85 10K/F_4
PC109 1U/6.3V_4
0.1U/25V_4
1U/6.3V_4
PC92
+3VPCU
EC_SI
8208RTVDD1
A
+VIN
10_6
PV modify 12/24
10K/F_4 PR98
Vo=0.75(R1+R2)/R2 2
18 GFX_CORE_CNTRL0
3
1
PQ10 DMN601K-7 PQ11 DMN601K-7
2
18 GFX_CORE_CNTRL1
+3V_VGA PR232
PV modify 12/17
MAINON_G
0_4
1
39
3
3
PR14 *22_8 PQ24 *DMN601K-7
2
+1.8V +/- 5% Countinue current:1.2A Peak current:3A +3VPCU
2
1
C
+10VALW
1
C
PQ25 *DMN601K-7
+3VPCU
+VIN
+1.8V_VGA
1 2 5 6
PR154 1M_4
1.2VADJ1.8VPR139 R1 127K/F_4
PC137
VGACOREON
2
PC162
VO=(0.8(R1+R2)/R2) R2<120Kohm
D
2
4
D
PR142 100K/F_4
R2 1
VGA_PWROK
PR157 10K/F_4
+3V_VGA PC1 0.1U/10V_4
PC138
PR156 1M_4
0.01U/25V_4
PC140
0.19A
PC161 PQ26 DMN601K-7
1
GND1
9
7 2
1U/6.3V_4
2
PC141
8
PQ1 ME3424D
0.33U/6.3V_4
PGOOD
GND
0.1U/10V_4
VDD
10U/6.3V_8
1
1
PQ23 DMN601K-7
2
1
6
3
VOUT
3
1
PV modify 12/17
EN ADJ
4
+5VPCU
3VGFX_ONG
3
5
10U/6.3V_8
2
EC_SI PC151 1U/10V_4
PU10 RT9025
1
100K/F_4
PC143 0.1U/10V_4
PR143
PC142
NC
2
VGACOREON
2
10U/6.3V_8
PD18 1SS355
1
VIN
3VGFX_OND
0.1U/10V_4
PC2
3
PR155 1M_4
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2
Document Number
Date: Thursday, December 24, 2009
1
2
3
4
http://laptop-schematic.com/ 5
6
7
Rev 1A
+VGACORE (RT8208/1.8V) Sheet
38 8
of
42
3
4
5
6
7
+VIN +15VALW
1
2
2
+10VALW
AON6426L PQ7
S
EN
4
VDD
1
PGOOD
ADJ
1
6
GND
8
GND1
9
7
2
0.1U/10V_4 PC235
PC237
1.2VADJ1.8VPR221 PR218 2 1 *0_4/S
HWPG
R1
127K/F_4
VO=(0.8(R1+R2)/R2) R2<120Kohm
PR220 100K/F_4
R2
PV modify 12/17
2.35A +1.5V
+3VPCU
+0.9V +/- 5% Countinue current:1.5A Peak current:2A
1
PU4 RT9025
32,35,36,37 VRON 10K/F_4
1
+5VPCU
PV modify 12/17 23,32,34,35,37
1
2
EN
4
VDD
1
PGOOD
2
HWPG
VIN
2 PC230
GND
PC61
PC54
12.7K/F_4
VO=(0.8(R1+R2)/R2) R2<120Kohm
+ PR222 110K/F_4
PC231
RT9043GB
R2
PC75
1
PR230 68.1K_4
R1 FB
R1
PR77 100K/F_4
R2
5
41.2VSET
9
D
PC228 1U/6.3V_4
PR225 100K/F_4
PQ66 DMN601K-7
12,16 VDDR_1.05_EN
VDDR_1.05_EN
PR231
3
1
8
1
+2.5V
VOUT
1
+3VPCU
EN
2
*0.1U/10V_4
PC236
1U/6.3V_4
D
3
GND GND1
PV modify 12/17
PROJECT : AX2/7 Quanta Computer Inc.
2
33_4
Vout=1.2(1+R1/R2)
PV modify 12/16
VDDR_1.05_EN: 1 : VDDR =1.05V 0 : VDDR = 0.9V (Default)
PC244 220P/50V_4
1
VR2.5_ON
*100P/50V_4
PR223 10K/F_4 32
6
PR67 1.2VADJ1.05V PR84 *0_4/S
PU16
VOUT
7
PC77
2
+2.5 Volt +/- 5% Countinue current: 200mA Peak current: 600mA
1U/6.3V_4
0.1U/10V_4
PC89
5
0.1U/10V_4
0.1U/10V_4
PR76
NC
2
2
PC175
VIN
10U/6.3V_8
PC82
10U/6.3V_8
1
PC81
10U/6.3V_8
0.1U/10V_4
4
1
C
3
S5_ONG PQ31 DTC144EUA
+0.9V
+3VS5
0.1U/10V_4
S5_ON
1
1
3 32,35
PR166 1M_4
2
PQ32 ME3424D
+1.5VSUS
0.5A
PC181
2 2
2
PQ34 DMN601K-7 2200P/50V_4
C
3
3
S5_OND10V 3 PQ33 *DMN601K-7
PC176
2
PR172 *22_8
ADJ
1 2 5 6
PR167 1M_4
0.1U/10V_4
PC203 PR178 1M_4
Size Custom NB5/RD2
Document Number
DISCHARGE/3VS5/5VS5/LAN
Date: Thursday, December 24, 2009 1
2
B
PC229
1
D
2
PC234
PC64
G 4
VOUT
0.1U/10V_4
0.1U/10V_4
3 2 1
PC132
0.1U/10V_4
+3VS5
1
23,32,34,35,37
LAN_POWER_G
+VIN
PC227
+1.5VSUS
0.1U/10V_4
PR128 1M_4
+5VPCU
5
PV modify 12/17
2
2200P/50V_4
1
1
2
3 1
PQ17 DTC144EUA
PC187 0.1U/10V_4
+3VLANVCC
PC134
2
32 LAN_POWER
PR219
NC
VIN
PU15 RT9025
10K/F_4
0.67A
2
+3V
PQ38 AO4496
32,35,36,37 VRON
5
2
PC232
5.65A
1U/6.3V_4
PQ15 ME3424D
4
PQ16 DMN601K-7
2
PC131
3
1
PQ62 *DMN601K-7
3
3
LAN_ON
0.1U/10V_4
B
2
1 2 3
PR127 1M_4
1 2 5 6
PR125 *22_8
2200P/50V_4
PC183 PR129 1M_4
3 PC233 10U/6.3V_8
1
PQ35 DMN601K-7
0.1U/10V_4
3
+3VPCU
0.1U/10V_4
4
+10VALW
+3VLANVCC
+1.8V
PC184
MAIND10V +VIN
+3VPCU
5 6 7 8
PR179 1M_4
PC163 0.1U/10V_4
+1.8V +/- 5% Countinue current:0.7A Peak current:1A
+3VPCU
MAINON_G 38
PV modify 12/17
A
PQ28 ME3424D
SUSON_G
1
PQ42 DTC144EUA
SUSON
PQ30 DTC144EUA
+10VALW
MAINON_G
32,37
PR161 1M_4
PC186 0.1U/10V_4
1
1
1
1
1 PR181 1M_4
2
32,34,37,40 MAINON
PC165
2
+5V
+3VSUS
10U/6.3V_8
2
PQ29 DMN601K-7
2.2A
10U/6.3V_8
2
PQ39 AO4496
1
2
3
2
5A
2 PC188
3 2 1
PQ40 DMN601K-7
2
PQ14 *DMN601K-7
2200P/50V_4
PQ36 *DMN601K-7
3
PQ41 DMN601K-7
3
PQ37 DMN601K-7
3
3
3
A
PQ27 *DMN601K-7
PC164
3
4
4
3
MAIND
SUSD10V
3
PR97 *22_8
PR159 1M_4
1
PR180 *22_8
PR158 *22_8
PC185 0.1U/10V_4
PR185 22_8
5 6 7 8
PR183 1M_4 PR184 22_8
39
+3VPCU
1 2 5 6
PR160 1M_4
PR182 1M_4
+10VALW
+3VSUS
+5VPCU
1
+1.5V
2
+1.8V_VGA
+3V
8
2200P/50V_4
+5V
+VIN
3
2
1
1
3
4
5
6
For VDDR 1.05 control
http://laptop-schematic.com/
7
Sheet
39of 8
Rev ? 42
1
2
3
4
5
40
EC_SI
+PRWSRC
EC_SI
PC217 CN19
D
PQ9 DMN601K-7
0.01U/25V_4
1 2
UDZ5V6B-7-F
*100P/50V_4
5 1 1
CHLIM
PC106 *0.01U/25V_4
PR110 *11.8K/F_4
2
1 2
9
VRFE 8
ICM
2
3 2 1
PR122
CV-SET
PC200
PC202
PC207
PC209
20K/F_4 PC123 0.01U/25V_4
Place this cap close to EC
PR123 EC_ACLIM 32
10K/F_4 PR208
1
CC-SET
2
100K/F_4 PC221
32
C
PC126 0.1U/10V_4
32
V ACLIM = VREF * (Rl // 152K) / (Rhi // 152K + Rlow// 152K) Input curretn = 2.9A (71.5K , 10K) (0.05/Vref * Vaclim + 0.05 ) / Rsense
Charging Curret setting = I chg = 165mV / Rsense * (Vchlim / 3.3V)
PR207 100K/F_4
+VAD_1
PR82 22_6
ACOK_IN
+VH28
PU5
2 3
P2805MF A0
2
PC222 3300P/50V_4
3
GND
PG
CN
D_CAP
5
Input Current monitor V icm = 19.9 * (Vcsip - Vcsin)
2
PR103
1
0_4 PD12
PC91
6251ACIN
6
PQ13 DTC144EUA
2D/C#_S6A 1
2
D/C#
32
*1SS355 PC113 *10U/6.3V_8
PC86 0.1U/25V_4
8
1
100/F_4
32
Vout
2
PC116
SYS_I
VIN
1
1
1
PC114
1
PC79 1U/25V_6
1
ACOK# PC80 0.01U/25V_4
1U/25V_6 PD8
2
1
100K/F_4
PU8 ISL6251A
PR209
PC95
1 1
PR89
1SS355
2 2
VADJ
0.1U/50V_6
3
6251ACIN
PC201
CSOP
2
CELL_SLT = 1 -- 3 S (Cells = GND 3S) CELL_SLT = 0 -- 4 S (Cells = VDD 4S)
PR195 *0_2/S
PC66 1500P/50V_4
NC
PR107 15K/F_4
*100P/50V_4
1
ACIN
10
CP
PQ60 DMN601K-7
2
PC208
PR198 *0_2/S
4
CELL_SLT
26251VCOMP2
32
VCOMP
1
PR118 10K/F_4
1
PQ12 DDTA124EUA-7-F
2
EC_SI
PR93 470K/F_4
1
3
6800P/25V_4
2
2
6251CELLS_1
6251VREF
PR116 *21K/F_4
11
ACLIM
PC118
2 32
PC98 *0.01U/25V_4 2 1
12
Place this cap close to EC
+BATCHG
PR63 2.2_8
13
2
100P/50V_4
1+ISL6251_VDD
PR108 10K/F_4
PQ6 AON7702 4
6251VREF VREF = 2.39V
6251ICM
PR211 100K/F_4
3
ISL6251_LGATE
7
1 PR212 100K/F_4
Place this cap close to EC
ACOK
14
PR196 RL3720WT-R020
6251LR 1
2
+ISL6251_VDD PR126 12.4K/F_4
PC22
1
PC133 0.1U/10V_4
7
6251EN
PC21
PC135
CSON
ACLIM EN
6
3
VADJ
1
Setting the Vin PR214 min to 12V 12.4K/F_4 For ACSET 1.26V
PR215 10K/F_4 Setting the Vin min to 17V For EN = 1.06V
C
ISL6251_PHASE
ACSET
0.01U/25V_4
2
ICOMP
6251ACIN
2
100K/F_4
6251VCOMP1
1
PR213
4
PR124 75K/F_4 AD_AIR
GND
CELLS
1SS355
1U/25V_6
PC224
PR216 150K/F_4
32
DCIN
26251ICOMP 5
10_8
1 2
2
18
1
PD2 +VAD_1
24
TEMP_MBAT 32
1K/F_4 PC29
PL2 6.8uH
2
PGND DCIN
32,34,37,39 MAINON
1
17
0.1U/25V_4 ISL6251_UGATE
ACPRN
PR210 +VAD_1 PD1 1SS355
PR27
PD4
0.1U/25V_4
LGATE
8
B
PC112 6251B_1
2
23
7
4
PR109 6251B_2 16 2_6
6
4
5
ACOK#
+VA
PQ5 AON7410
PC43
CSON PHASE
8
4.7U/25V_8
UGATE
7
6
1
22
5
A
9
5
CSON1
4.7U/6.3V_6
3 2 1
PC119 0.047U/16V_4
CSON
1
2
3
PR121 20_6
PQ2 IMD2
2
2
15
1
CSOP
PC44
PD11 RB501V-40
BOOT +VAD
MBCLK
1
21
CSIN
CSOP_1
VDD
PR120 20_6 CSOP
PC42 PC107 1 2
ISL6251_VDDP
20
CSIP_1 MBATLED0# 32
CSIP
MBATLED0#
PQ4 DTC144EUA
1
*0.1U/25V_4
2
19
3 PC45
CSIN_1
+5VPCU 10K/F_6
B
5,32
1U/6.3V_4 PR94 4.7_6
2200P/50V_4
PR119 20_6 PC115 0.1U/25V_4
10
PR34
Place these CAPs close to FETs
4.7U/25V_8
PR117 2_6
PR36 AMBER_LED
MBDATA
PD3 PC120
1
PQ3 DTC144EUA
1
*0.1U/25V_4
To PWR LED
9
bat-bp02081-b82d5-7h-8p-l-v 5,32
0.01U/25V_4
+ISL6251_VDD
4
200045MR008G10JZR DFAD08MR010
4.7U/25V_8
CSIP
PR39 330_4
1
1
3 10
5
4.7U/25V_8
ACOK#
PQ59 DMN601K-7
32
PR38 330_4
2
3
2 AC_LED_ON#
4
10K/F_4
PR203 *0_2/S CSIN
SMC
2
B_TEMP_MBAT 6
PD17 PR202 *0_2/S
3
+3VPCU
*0.1U/25V_4
1
PR206 100/F_4
PC40
2
Place this ZVS close to Far-Far away +VIN
Place these short pad close to RSENSE
2
2
SMD
UDZ5V6B-7-F
+VH28
+VIN
4.7U/25V_8
PR205 RC2512-R020 1
BATT+
C581
2
100/F_4 PR204 150K/F_4
Place this ZVS close to Diode away +VIN
+5VPCU 10K/F_6
FDS6679AZ
1
PR43 WHITE_LED
PR201 ACOK_IN
CN18
PL5 5A/08
0.1U/25V_4
0.1U/25V_4
5A/08
8 7 6 5
1
PC65
BATDIS_G
VDDP
PL11
PD15
2
0.1U/25V_4
DC-IN CONN
PC198
1 2 3 4
2
PC223
4 10 5 9 6
PC213 1U/25V_6
BATDIS_G 1
5A/08
5A/08
PQ58
3
A
PC206
0.1U/25V_4
P4SMAJ20A
PD16 2 MEK100-05-DPS 3 1
PL12
1
8 7
PL4
PQ55 P0603BDG 4 3
+VA
0.1U/25V_4
+VA_AC
P4SMAJ20A
1 2
3
0.1U/25V_4
AD_ID
*100P/50V_4
DC_JACK 90W 32
FOR 16"
C26 0.1U/25V_4
4.7U/25V_8
+VAD
C51 1000P/50V_4
PR69 1M_4 D
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2
Document Number
1
2
3
4
http://laptop-schematic.com/
Rev 1A
CHARGER (ISL6251)
Date: Thursday, December 24, 2009 5
Sheet
40
of
42
5
4
3
CPU Power 1
2
1
CPU Power 2
EC Pin98 SUSON
HWPG
VRM_PWRGD +VCORE0
+1.8VSUS D
D
EC Pin99 EC Pin34
MAINON
+VCORE1
VDDA_EN +0.9VSMVTT
+CPUVDDNB
+2.5V +1.2V
EC Pin101 C
S5_ON
S5_OND
+1.1V
Delay
HWPG
HWPG
C
+3VS5 EC Pin101
VCORE_PG
S5_ON +1.2VS5
+VGACORE
+5VSUS
HWPG
EC Pin99 MAINON
EC Pin98
Option
SUSON
SUSD
Delay
+3VSUS
Delay
1.8V_OND
+1.8V
VCORE_PG
B
B
+5V +5V
+1.5V
EC Pin99 MAINON
A
MAIND
Delay
+3V
1
2
3
4
EC Pin76
S5_ON
SUSON
MAINON
HWPG
ECPWROK
SB_PWRGD_IN
NB_PWRGD_IN
SUSD
MAIND
VCORE_PG
Delay 600ms
3.3V
1.8V
S5_OND RSMRST#
A
VRM_PWRGD
PROJECT : AX2/7 Quanta Computer Inc. Size Custom NB5/RD2
5
4
http://laptop-schematic.com/ 3
2
Document Number
Rev 3A
Power control
Date: Thursday, December 24, 2009 1
Sheet
41
of
42
5
4
3
2
1
Power & Ground Label
D
ACTIVE
Description
SMBUS
Control Signal
+VIN
S0, S3, S4, S5
AC ADAPTER (19V)
+3VPCU
S0, S3, S4, S5
ALWAYS POWER (3V)
+3V
S0
MAINON
DDR3
+3VSUS
S0, S3
SUSON
CPU THERMAL SENSOR
+3VS5
S0, S3, S4, S5
S5_ON
CHARGER
+3VLANVCC
S0
+5VPCU
S0, S3, S4, S5
+5V
S0
DEVICE
ADDRESS
BUS
CLOCK GENERATOR D
LAN_POWER ALWAYS POWER (5V)
PCB STACK UP
MAINON
+5V_VCC1
LAYER LAYER LAYER LAYER LAYER LAYER
+5VALW +10VALW +15VALW C
+1.8V
S0
+1.8VSUS
S0, S3
+1.5V
S0
+1.5VSUS
S0, S3
DDR CORE POWER
SUSON
+1.5V_VGA
S0
VGA , VRAM POWER
+1.5_ON
+1.2V
S0
VRON
+1.2VSUS
S0, S3
SUSON
+1.1V
S0
VDDPCIE - PCIE-E MAIN POWER
VRON
+1.1VS5
S0, S3, S4, S5
STANDBY POWER
S5_ON
+1.1V_DYN
S0
NB VDDC - CORE LOGIC POWER
DYN_PWR_EN
+1.05V
S0
HT POWER (1.05V)
VRON
+1.0V_VGA
S0
PARK DPX_VDD10 POWER
VRON
+2.5V
S0
CPU VDDA POWER
VR2.5_ON
1 2 3 4 5 6
: TOP :GND : IN1 : IN2 : VCC : BOT
C
+1.5_ON
PCI DEVICES IRQ ROUTING
MAINON
DEVICE
IDSEL #
REQ/GNT #
PCI_INT
+1.5VSUS_1
B
A
B
+VCORE0
S0
CPU CORE POWER (?V)
VRON
+VCORE1
S0
CPU CORE POWER (?V)
VRON
+CPUVDDNB
S0
CPU VDDNB POWER
VRON
+0.75_DDR_VTT
S0
DDR_VTTREF
S0, S3
DDR REFERENCE POWER
SUSON
+VGA_CORE
S0
VGA CORE POWER
MAINON
+AVBAT
S0, S3, S4, S5
RTC & KBC POWER (3_3V)
DDR COMMAND & CONTROL PULL UP POWER
SUSON
A
PROJECT : AX2/7 Quanta Computer Inc. Size
Document Number
Rev 1A
Custom
NB5/RD2 Date: Wednesday, December 23, 2009 Sheet
5
4
3
http://laptop-schematic.com/ 2
1
42
of
42
