Full Adder Design Using LEDIT

SUBMITTED TO: Dr. SUDHANSHU CHAUDHARY Asst. Professor SUBMITTED BY: DHAN RAJ SHEHRAWAT R.N. – 313611

M.TECH. EMBEDDED SYSTEM SCHOOL OF VLSI DESIGN & EMBEDDED SYSTEM N.I.T. KURUKSHETRA 

ONE BIT !U"" ADDER

The purpose of this assignment is to introduce an essential component component to binary computation - a full adder. For simplification simplification the single bit full adder  will be considered (from which the device can be scaled to multiple bits). Input-to-Sum and Carry-in to Carry-out timing restrictions are also factored into this siing consideration. The (non-optimied) full adder!s functionality using "#$ is summaried in Figure below.

 TRUTH TAB"E

O! ONE BIT  ! U""  A DDER

The behavioral description focuses on bloc% behavior. Figure & shows how two instances of the same building bloc%' the half adder' can be used to implement a full adder using a structural approach.

*T I S * + ,-IT F #//  *001  * one-bit full adder is a device with three single bit binary inputs (*' ' Cin) and two single bit binary outputs (Sum' C-out). aving both carry in and carry out capabilities' the full adder is highly scalable and found in many cascaded circuit implementations. The basic logic functions of the full adder can be summaried in the truth table (right). From the truth table it can be seen that the full adder can be trivially constructed with two half adders. The full adder can also be decomposed into the following logical relationships2

3- IT  F #//  *001  /+4IC

F#,CTI+, 2

Using K-Map Technique: Sum = A XOR B XOR C = ABC + AB’C’ + A’BC’ + A’B’C Carry!u" = AB + AC + BC

 5

6ercise2 Show that the sum function can be written as shown at left

Sum = ABC + #A + B + C$ % Carry!u"

7

This alternate representation of the sum function allows the 3-bit full adder to be implemented in comple6 C"+S with 89 transistors' as shown at left below.  5

Carry:out; internal node is used as an input to the adder comple6 C"+S gate

 5

6ercise2 Show that the two <-trees in the comple6 C"+S gates of the carry:out and sum are optimiations of the proper dual derivations from the two ,-tree networ%s.

 5 

HOW  THE SUM’

SUM

SUM # ABC $ %A$B$C&.C ARRY ' OUT

=

&#A’B’C + AB’C’ + A’BC’ + ABC$'’

=

&AA’B’ + AA’C’ + AB’C’ + A’BB’ + A’BC’ + BB’C’ + A’B’C +ACC’ + BCC’ + ABC'’

=

&#A’B’ + A’C’ + B’B’C’ + B’C’C’$(#A+B+C$ + ABC'’

=

&#A’B’ + A’C’ + B’C’ + B’C’$(#A+B+C$ + ABC'’

=

&#A’B’ + A’C’ + B’C’$(#A+B+C$ + ABC'’

=

&#B’ + C’$(#A’ + B’C’$(#A+B+C$ + ABC'’

=

&#B’ + C’$(#A’ + #B+C$’$(#A+B+C$ + ABC'’

=

&)#BC$’*()A( #B+C$*’(#A+B+C$ + ABC'’

=

&#BC$’ + )A#B+C$* ’(#A+B+ C$ + ABC'’

=

&#AB+BC+AB$’(#A+B+C$ + ABC'’

=

#AB+BC+AB$’(#A+B+C$ + ABC

IS DERI(ED

Finally' Fig. above shows the circuit diagram of a C"+S one-bit full adder. The circuit has three inputs' and two outputs' sum and carry:out. *ll input and output signals have been arranged in vertical polysilicon columns. ,otice that both the sum-circuit and the carry-circuit have been realied using one uninterrupted active area each.

"AYOUT TECHNI)UE

USIN* E U"ER *RAPH METHOD

"AYOUT  TECHNI)UE

USIN*  S TIC+  D IA*RAM

"AYOUT TECHNI)UE

USIN* ",EDIT

FILE  EXTRACTED  FROM  LAYOUT * Circuit Extracted by Tanner Research's L-Edit Version 13.00 / Extract Version 13.00 ; * T! "i#e$ C$%Tanner Too#s &13.0%L-Edit and LV%Tech%(osis%")1bit.tdb * Ce##$ Ce##0 Version 1.0+ * Extract e,inition "i#e$ ain0.ext * Extract ate and Tie$ 0/1/+013 - +1$3 .inc#ude ain0.d  * arnin2$ *

Layers ith 4nassi2ned )RE) Ca5acitance.*

6:(8 Ca5acitor9 

67(8 Ca5acitor9 

*

6:C): Ca5acitor9 

*

6n e## ire9 

*

6subs9 

*

6a##subs9 

*

6(eta#19 

*

65o#y ire9 

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65ca5 ire9 

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6(eta#+9 

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6L:7: eitter9 

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6L:7: co##ector9 

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6:8LC):19 

* arnin2$

Layers ith 4nassi2ned "R<7=E Ca5acitance.

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6:ad Coent9 

*

67(8 Ca5acitor9 

*

6:(8 Ca5acitor9 

*

6:C): Ca5acitor9 

*

6ndi,,9 

*

6n e## ire9 

*

65di,,9 

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6subs9 

*

6a##subs9 

*

6(eta#19 

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65o#y ire9 

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65ca5 ire9 

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6(eta#+9 

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6L:7: eitter9 

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6L:7: co##ector9 

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6:8LC):19 

* 78E 7)(E )L<)E *

1 > 4( ?+@3 A -10.@B

*

11 > Cin ?-++.@ A -1.@B

*

1+ > Cout ?-++ A -10.@B

*

13 > )in ?-++.@ A 3B

*

1 > !in ?-++.@ A -3.@B

*

1D > V ?-1.@ A 3.@B

*

1 > =7 ?-+0 A -@3.@B

C5ar1 1 0 C>., C5ar+ D 0 C>1., C5ar3  0 C>.1D, C5ar  0 C>+.0, * arnin2$ 7ode 11 has ero noda# 5arasitic ca5acitance. C5ar@ 1+ 0 C>.,

* arnin2$ 7ode 13 has ero noda# 5arasitic ca5acitance. * arnin2$ 7ode 1 has ero noda# 5arasitic ca5acitance. C5arD 1@ 0 C>10.+, C5ar 1D 0 C>3.D, C5ar 1 0 C>1D.D, C5ar 1 0 C>+0.D0, * arnin2$ 7ode +0 has ero noda# 5arasitic ca5acitance. * arnin2$ 7ode +1 has ero noda# 5arasitic ca5acitance.

 (+ 1 D 1D +1 :(8 L>1u >u )>+05 :>1u )>+05 :>1u

F ?+3 D +0 1B

 (+ D 13 @ +1 :(8 L>1u >u )>+05 :>1u )>5 :>.@u

F ?+13 D +1@ 1B

 (+D  11 @ +1 :(8 L>1u >u )>5 :>.@u )>5 :>.@u

F ?+0 D +0D 1B

 (+@  1  +1 :(8 L>1u >u )>5 :>.@u )>+05 :>1u

F ?1@ D 1 1B

 (+ 1 D 1 +0 7(8 L>1u >+u )>15 :>1u )>15 :>1u

F ?+3 -3@ +0 -31B

 (+3 1 13 3 +0 7(8 L>1u >+u )>15 :>1u )>3.@5 :>@.@u

F ?+13 -3@ +1@ -31B

 (++ + 11 3 +0 7(8 L>1u >+u )>3.@5 :>@.@u )>3.@5 :>@.@u  (+1 + 1 D +0 7(8 L>1u >+u )>3.@5 :>@.@u )>15 :>1u  (+0 D 1@  +1 :(8 L>1u >u )>+05 :>1u )>+05 :>1u

F ?+0 -3@ +0D -31B F ?1@ -3@ 1 -31B

F ?11 D 11 1B

 (1  1 1D +1 :(8 L>1u >u )>+05 :>1u )>1+5 :>10u

F ?1+ D 1 1B

 (1 10 1 1@ +1 :(8 L>1u >u )>5 :>.@u )>1+5 :>10u

F ?3 D @ 1B

 (1  13 1D +1 :(8 L>1u >u )>1+5 :>10u )>1+5 :>10u

F ?1@D D 1@ 1B

 (1D 1D 11  +1 :(8 L>1u >u )>+05 :>1u )>1+5 :>10u

F ?10 D 1+ 1B

 (1@ 1 11 10 +1 :(8 L>1u >u )>+05 :>1u )>5 :>.@u  (1 D 1@  +0 7(8 L>1u >+u )>15 :>1u )>15 :>1u  (13  1 1 +0 7(8 L>1u >+u )>15 :>1u )>105 :>10u  (1+  1 1@ +0 7(8 L>1u >+u )>3.@5 :>@.@u )>105 :>10u

F ?+ D  1B F ?11 -3@ 11 -31B F ?1+ -3@ 1 -31B F ?3 -3@ @ -31B

 (11  13 1 +0 7(8 L>1u >+u )>105 :>10u )>105 :>10u

F ?1@D -3@ 1@ -31B

 (10 1 11  +0 7(8 L>1u >+u )>15 :>1u )>105 :>10u

F ?10 -3@ 1+ -31B

 ( 1 11  +0 7(8 L>1u >+u )>15 :>1u )>3.@5 :>@.@u

F ?+ -3@  -31B

 ( 1D 11 1 +1 :(8 L>1u >u )>1+5 :>10u )>+05 :>1u

F ?1 D 3 1B

 ( 1@ 13 1 +1 :(8 L>1u >u )>1+5 :>10u )>1+5 :>10u

F ?D D 1 1B

 (D 1 1 1D +1 :(8 L>1u >u )>1+5 :>10u )>1+5 :>10u

F ?@@ D @ 1B

 (@ 1D 1@ 1+ +1 :(8 L>1u >u )>+05 :>1u )>+05 :>1u

F ?1D D 1 1B

 ( 1 11 1 +0 7(8 L>1u >+u )>105 :>10u )>15 :>1u

F ?1 -3@ 3 -31B

 (3 1@ 13 1 +0 7(8 L>1u >+u )>105 :>10u )>105 :>10u

F ?D -3@ 1 -31B

 (+ 1 1 1 +0 7(8 L>1u >+u )>105 :>10u )>105 :>10u

F ?@@ -3@ @ -31B

 (1 1 1@ 1+ +0 7(8 L>1u >+u )>15 :>1u )>15 :>1u

F ?1D -3@ 1 -31B

* Tota# 7odes$ +1 * Tota# E#eents$ 3 * Tota# 7uber o, horted E#eents not ritten to the :
!I"E CREATED

!OR  T,SPICE

SIMU"ATION

* Circuit Extracted by Tanner Research's L-Edit Version 13.00 / Extract Version 13.00 ; * T! "i#e$ * Ce##$

C$%Tanner Too#s &13.0%L-Edit and LV%Tech%(osis%")1bit.tdb

Ce##0

Version 1.0+

* Extract e,inition "i#e$ * Extract ate and Tie$

ain0.ext

0/1/+013 - +1$3

.inc#ude GC$%Tanner E)%eo%T-5ice%ode#s%#+1+@.dG

* 2E )(E )L)E

*

1 > 4( ?+@3 A -10.@B

*

11 > Cin ?-++.@ A -1.@B

*

1+ > Cout ?-++ A -10.@B

*

13 > )in ?-++.@ A 3B

*

1 > !in ?-++.@ A -3.@B

*

1D > V ?-1.@ A 3.@B

*

1 > =7 ?-+0 A -@3.@B

 V 1D 0 @  V=7 1 0 0

 V)in 13 0 :4LE ?0 @ 0 1ns 1ns 30ns D0nsB  V!in 1 0 :4LE ?0 @ 0 1ns 1ns D0ns 1+0nsB  VCin 11 0 :4LE ?0 @ 0 1ns 1ns 1@ns 30nsB

.5rint tran &?1A0B &?1+A0B &?13A0B &?1A0B &?11A0B .tran +ns +00ns start>+ns

C5ar1 1 0 C>., C5ar+ D 0 C>1., C5ar3  0 C>.1D, C5ar  0 C>+.0, * 4arnin5$ ode 11 has 6ero noda# 7arasitic ca7acitance.

C5ar@ 1+ 0 C>., * 4arnin5$ ode 13 has 6ero noda# 7arasitic ca7acitance. * 4arnin5$ ode 18 has 6ero noda# 7arasitic ca7acitance.

C5arD 1@ 0 C>10.+, C5ar 1D 0 C>3.D, C5ar 1 0 C>1D.D, C5ar 1 0 C>+0.D0, * 4arnin5$ ode +0 has 6ero noda# 7arasitic ca7acitance. * 4arnin5$ ode +1 has 6ero noda# 7arasitic ca7acitance.

 (+ 1 D 1D +1 :(8 L>1u >u )>+05 :>1u )>+05 :>1u

F ?+3 D +0 1B

 (+ D 13 @ +1 :(8 L>1u >u )>+05 :>1u )>5 :>.@u

F ?+13 D +1@ 1B

 (+D  11 @ +1 :(8 L>1u >u )>5 :>.@u )>5 :>.@u

F ?+0 D +0D 1B

 (+@  1  +1 :(8 L>1u >u )>5 :>.@u )>+05 :>1u

F ?1@ D 1 1B

 (+ 1 D 1 +0 7(8 L>1u >+u )>15 :>1u )>15 :>1u

F ?+3 -3@ +0 -31B

 (+3 1 13 3 +0 7(8 L>1u >+u )>15 :>1u )>3.@5 :>@.@u

F ?+13 -3@ +1@ -31B

 (++ + 11 3 +0 7(8 L>1u >+u )>3.@5 :>@.@u )>3.@5 :>@.@u  (+1 + 1 D +0 7(8 L>1u >+u )>3.@5 :>@.@u )>15 :>1u  (+0 D 1@  +1 :(8 L>1u >u )>+05 :>1u )>+05 :>1u

F ?+0 -3@ +0D -31B F ?1@ -3@ 1 -31B

F ?11 D 11 1B

 (1  1 1D +1 :(8 L>1u >u )>+05 :>1u )>1+5 :>10u

F ?1+ D 1 1B

 (1 10 1 1@ +1 :(8 L>1u >u )>5 :>.@u )>1+5 :>10u

F ?3 D @ 1B

 (1  13 1D +1 :(8 L>1u >u )>1+5 :>10u )>1+5 :>10u

F ?1@D D 1@ 1B

 (1D 1D 11  +1 :(8 L>1u >u )>+05 :>1u )>1+5 :>10u

F ?10 D 1+ 1B

 (1@ 1 11 10 +1 :(8 L>1u >u )>+05 :>1u )>5 :>.@u

F ?+ D  1B

 (1 D 1@  +0 7(8 L>1u >+u )>15 :>1u )>15 :>1u  (13  1 1 +0 7(8 L>1u >+u )>15 :>1u )>105 :>10u  (1+  1 1@ +0 7(8 L>1u >+u )>3.@5 :>@.@u )>105 :>10u

F ?11 -3@ 11 -31B F ?1+ -3@ 1 -31B F ?3 -3@ @ -31B

 (11  13 1 +0 7(8 L>1u >+u )>105 :>10u )>105 :>10u

F ?1@D -3@ 1@ -31B

 (10 1 11  +0 7(8 L>1u >+u )>15 :>1u )>105 :>10u

F ?10 -3@ 1+ -31B

 ( 1 11  +0 7(8 L>1u >+u )>15 :>1u )>3.@5 :>@.@u

F ?+ -3@  -31B

 ( 1D 11 1 +1 :(8 L>1u >u )>1+5 :>10u )>+05 :>1u

F ?1 D 3 1B

 ( 1@ 13 1 +1 :(8 L>1u >u )>1+5 :>10u )>1+5 :>10u

F ?D D 1 1B

 (D 1 1 1D +1 :(8 L>1u >u )>1+5 :>10u )>1+5 :>10u

F ?@@ D @ 1B

 (@ 1D 1@ 1+ +1 :(8 L>1u >u )>+05 :>1u )>+05 :>1u

F ?1D D 1 1B

 ( 1 11 1 +0 7(8 L>1u >+u )>105 :>10u )>15 :>1u

F ?1 -3@ 3 -31B

 (3 1@ 13 1 +0 7(8 L>1u >+u )>105 :>10u )>105 :>10u

F ?D -3@ 1 -31B

 (+ 1 1 1 +0 7(8 L>1u >+u )>105 :>10u )>105 :>10u

F ?@@ -3@ @ -31B

 (1 1 1@ 1+ +0 7(8 L>1u >+u )>15 :>1u )>15 :>1u

F ?1D -3@ 1 -31B

* Tota# odes$ +1 * Tota# E#eents$ 3 * Tota# uber o, horted E#eents not 9ritten to the :CE ,i#e$ 0 * 2ut7ut eneration E#a7sed Tie$ 0.000 sec * Tota# Extract E#a7sed Tie$ +.31 sec

.E7

WA(E CREATED

BY W,EDIT  SIMU"ATION T OO"

OUTPUT *ENERATED

BY T,SPICE A!TER S IMU"ATION

* T-Spice 13.00 Simulati!

"e# Sep 1$ %1&'(&%) %013

C&U+e,+Da!RaSe,a/atictu,e+FA12it.+pc

* Cmma!# li!e& t+pice - C&U+e,+Da!RaSe,a/atictu,e+FA12it.ut C&U+e,+Da!RaSe,a/atictu,e+FA12it.+pc * T-Spice "i!3% 13.00.%00$03%1.01&01&33

*SEDIT& Alte, 2lc+ 4 0

* Accu,ac5 a!# C!6e,7e!ce pti!+& * !um!#+et8#cl# 4 100 * * Time+tep a!# I!te7,ati! pti!+& * ,el98,elc7tl 4 0.000: * * M#el E6aluati! pti!+& * *

#cap 4 % #e;!,+ 4 0 <+9=

#e;!,2 4 0 <+9= t!m 4 %: <#e7 C=

* * >e!e,al pti!+& *

temp 4 %: <#e7 C=

* * Output pti!+&

t,ea#+ 4 1

#e;!,# 4 0 <+9=

*

acut 4 1

i!7l# 4 0

* * De6ice a!# !#e cu!t+& *

MOSFET+ - %$

*

?@T+ - 0

*

MESFET+ - 0

*

Capacit,+ - )

*

I!#uct,+ - 0

* T,a!+mi++i! li!e+ - 0 *

lta7e +u,ce+ - :

MOSFET 7emet,ie+ - 3% @FET+ - 0 Di#e+ - 0 Re+i+t,+ - 0 Mutual i!#uct,+ - 0 Cuple# t,a!+mi++i! li!e+ - 0 Cu,,e!t +u,ce+ - 0

*

CS - 0

CCS - 0

*

CCS - 0

CCCS - 0

*

-c!t,l +/itc - 0

*

Mac, #e6ice+ - 0

*

DL #e6ice+ - 0

*

Su2ci,cuit+ - 0

*

I!#epe!#e!t !#e+ - 1

*

Ttal !#e+ - %%

I-c!t,l +/itc - 0 EBte,!al C m#el i!+ta!ce+ - 0

Su2ci,cuit i!+ta!ce+ - 0 ?u!#a,5 !#e+ - 

*SEDIT& Alte,40 *SEDIT& A!al5+i+ t5pe+ DCO 0 ACMODEL 0 AC 0 TRASIET 1 TRASFER 0 OISE 0

*"EDIT& .t,a!

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TRASIET AALYSIS Time+G

6H10JG 6H1%0JG 6H130JG 6H1'0JG 6H110JG

%.000000e-00) '.3%eK000 '.)):(eK000 :.0000eK000 :.0000eK000 :.0000eK000  ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------SO O * a,+i!7

0.0% +ec!#+

* Setup

0.0) +ec!#+

* DC pe,ati!7 pi!t

0.0 +ec!#+

* T,a!+ie!t A!al5+i+

0.() +ec!#+

* O6e,ea#

1.'( +ec!#+

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