Esquema DAJW8CMB8E1 REV. E.pdf

1

2

3

4

5

6

7

8

JW8B/C BLOCK DIAGRAM A

GPU

1333 /1600 MT/S

DDR3L SO-DIMM

Haswell ULT

PCIE X4

A

N14P-GV2 (25W) DDR3L (2G )

15W DC+GT2 / GT3 28W DC+GT3

USB2.0 / USB3.0

USB3.0 Port (Right)

USB2.0 / USB3.0

USB3.0 Port *2 (Left)

USB2.0

Fingerprint

DDI

Lynx Point LP MCP 1168pins

PS8401A

eDP(x2 lanes) B

HDMI CONN

LVDS Panel B

USB2.0

Camera

SATA

Digital Mic

DSP:eS305

eDP to LVDS PS8620/8623

USB2.0

Touch Panel

Redriver

HDD Conn

SATA I2S

Subwoofer Conn

mSATA Conn

HDA

Audio Codec

HP+MIC Combo Jack x1

ALC290Q

USB2.0 PCIE

AMP APA2010

PCIE

Touch PAD

PCIE PS/2

Card Reader RTS5227E

40 mm X 24 mm

I2C or SMBus

WiFi *Support AOAC

iPTT Speaker Conn C

Bluetooth

GIGA LAN RTL8111GUS

LPC

3in1 Conn

C

RJ45

*Support S5 wake Keyboard CONN

KBC ITE 8528

SPI HSPI

SPI ROM

24MHz

32.768KHz

64Mbit

PWM FAN D

SPI ROM 64Mbit

D

Quanta Computer Inc. PROJECT : JW8B

1

2

HSIO Port

SATA

5

6

7

8

USB2.0

USB3.0_1 CN6

2

USB3.0_2 CN4

3

USB3.0_3 CN5

PCIE1 X

CLK0 X

USB2.0_2 CN5

4

USB3.0_4 X

PCIE2 Card Reader

CLK1 Card Reader

USB2.0_3 Finger Print

PCIE3 GIGA LAN

CLK2 GIGA LAN

USB2.0_4 Camera

6

PCIE4 WIFI

CLK3 WIFI

USB2.0_5 eTP

7

PCIE5 GPU 4X

CLK4 GPU 4X

USB2.0_6 Blue Tooth

8

PCIE5 GPU 4X

CLK5 X

USB2.0_7 Touch Screen

9

PCIE5 GPU 4X

10

PCIE5 GPU 4X

11

PCIE6 X

SATA3 X

12

PCIE6 X

SATA2 mSATA

13

PCIE6 X

SATA1 HDD

14

PCIE6 X

SATA0 X

5

C

PCIE

4

1

A

B

USB3.0

3

USB2.0_0 CN4

PCIE CLK

USB2.0_1 CN6

A

B

C

D

D


1

2

HSIO Port

SATA

5

6

7

8

USB2.0

USB3.0_1 CN6

2

USB3.0_2 CN4

3

USB3.0_3 CN5

PCIE1 X

CLK0 X

USB2.0_2 CN5

4

USB3.0_4 X

PCIE2 Card Reader

CLK1 Card Reader

USB2.0_3 Finger Print

PCIE3 GIGA LAN

CLK2 GIGA LAN

USB2.0_4 Camera

6

PCIE4 WIFI

CLK3 WIFI

USB2.0_5 eTP

7

PCIE5 GPU 4X

CLK4 GPU 4X

USB2.0_6 Blue Tooth

8

PCIE5 GPU 4X

CLK5 X

USB2.0_7 Touch Screen

9

PCIE5 GPU 4X

10

PCIE5 GPU 4X

11

PCIE6 X

SATA3 X

12

PCIE6 X

SATA2 mSATA

13

PCIE6 X

SATA1 HDD

14

PCIE6 X

SATA0 X

5

C

PCIE

4

1

A

B

USB3.0

3

USB2.0_0 CN4

PCIE CLK

USB2.0_1 CN6

A

B

C

D

D


1

2

3

4

5

+3.3V_SUS

6

7

8

+3.3V_RUN

MB

Touchpad 2.2K

2.2K

2.2K

+3.3V_RUN

AP2 SMBCLK

2.2K

SMB_PCH_SCLK

DMN66D0LDW

AH1 SMBDATA

SMB_PCH_DAT

A

SODIMM

A

DMN66D0LDW +3.3V_SUS

Haswell ULT 2.2K

2.2K

AN1 SMB_CLK0 AK1 SMB_DAT0

+3.3V_SUS

2.2K

B

2.2K

B

AU3 SMB_CLK_ME1 AH3 SMB_DATA_ME1

Function

SMBUS

+3.3V_ALW

2.2K

MB

2.2K

115 SMBDAT1

S U S _ V 3 . 3 +

W D L 0 D 6 6 N M D

W D L 0 D 6 6 N M D

Thermal IC Thermal IC Charge IC Battery GPU

IC NCT7718 G781-1P8 OZ8618NL Battery N14P-GV2

Address 1001100xb (98h) 1001101xb (9Ah) 00010010 (0x12h) 00010110 (0X16h) 10011110 (0X9Eh)

116 SMBCLK1

+3.3V_ALW 330 C

SIO ITE8528E

4.7K

4.7K

5

330

6

0

110 SMBCLK0

10

0

111 SMBDAT0

C

Battery

11

Charger

V3.3_THERMAL2 +3.3V_RUN

MOS

8 7

MOS 2.2K 94 SMBCLK3

2.2K

THERMAL(G781-1P8) GPU

V3.3_THERMAL MOS

95 SMBDAT3

8 7

THERMAL(NCT7718)

MOS

D

N-MOS

D9 D8

D

GPU

N-MOS

20

eDP to LVDS

Quanta Computer Inc.

5

4

3

2

1

VER : 1A

Adapter 65W

Charger (BQ24715RGRR)

+PWR_SRC

D

D

SLP_S4#

Battery 3S1P +3.3V_EN2

ALW_ON

TI TPS51362RVER

DDR_PG_CTRL

SLP_S4#

TI TPS51206DSQR

SLP_S4#

TI TPS51362RVER

TI TLV62130RGTR

+1.05V_SUS

+1.8V_SUS

IMVP_VR_ON

ON NCP81101MNTWG

TI TPS51275RUKR +V_VDDQ_VR

+0.6V_DDR_VTT

+VCCIN

+10V_ALW

+3.3V_ALW

+5V_ALW RUN_ON

C

MODPHY_EN

RUN_ON

C

Load Switch TPS22965DSGR

Load Switch TPS22966DPUR RUN_ON

SUS_ON

RUN_ON

SUS_ON

Load Switch TPS22966DPUR

RUN_ON

Load Switch TPS22966DPUR

RichTek RT8068AZQW

+V1.05DX_MODPHY

+1.8V_RUN

+1.05V_RUN

+1.5V_RUN

B

B

+3.3V_SUS

+3.3V_RUN

+5V_SUS

+5V_RUN

A

A

Quanta Computer Inc. PROJECT : JW8B S ize

Document Number

Date:

Friday, May 10, 2013

Rev A

Power Block Diagram 5

4

3

2

S heet 1

4

of

57

5

4

Battery Mode

3

2 +VAD +VAD

2

3

+12V +12V_A _ALW LW

SUS MOS SW ( IC )

+5V_ALW

2

+3.3V_RTC_LDO

LATCH (POWER_SW_IN0#)

PWR BTN

9 +3.3V_SUS

3V/5V VR 2 N E

D

G

+1.05V_SUS

11

8

SUS_ON

6

1.05V_PWRGD

PG

9

+3.3V_SUS

EC

29

CHARGER

D

RSMRST#

13

AC_PRESENT

DPWROK

ACPRESENT

SIO_PWRBTN# SIO_SLP_S5# SIO_SLP_S4# SIO_SLP_S3#

20

+DDR_VTTREF

+DDR_VTT

21

N O _ N U R

# D G R W P _ T S C C V

K O R W P _ C E

# 3 S _ P L S _ O I S

# 4 S _ P L S _ O I S

# 5 S _ P L S _ O I S

3 S

30

EC_PWROK

30

VCCST_PWRGD#

37

PLTRST#

36 23 30 30 17 16 15

PWRBTN# SLP_S5#

16

SLP_S4#

17

SLP_S3# C

PCH_PWROK VCCST_PWRGD PLTRST#

SYS_PWROK

36

SYS_PWROK

EC_PWROK to SYS_PWROK delay 5-99mS

28

17

15

APWROK

22

DDR_PWRGD

PG

K O R W P _ S Y S

19

+V_VDDQ

DDR/VTT VR

Battery

1 N E

+PWR_SRC

4 S

7

ALW_ON

12

14

HWPG

C

5

+5V_ALW

+VCHGR

SYS_PWR_SW# (S5 start point. (Only available when S5 -> S0)

10

N E

+3.3V_ALW

+PWR_SRC

3.3V_ALW_ON

4

6

+PWR_SRC

1.05V VR

1

1

+PWR_SRC

Haswell ULT

1.5V_RUN_PWRGD

RC Delay SIO_SLP_S3#

SIO_SLP_S4#16 +VAD

+PWR_SRC +5V_RUN

B

+5V_ALW +3.3V_ALW +1.05V_SUS +V_VDDQ

RUN MOS SW ( IC )

24

+3.3V_RUN

+VCCIN

IMVP VR

25

+1.05V_RUN

26 27

RUN_ON

PG

SVID

35

G

IMVP_PWRGD

31 H_VR_ENABLE_MCP

+1.5V_RUN

N E

+3V_GFX

GFX PWR MOS

1.5V VR PG

31

H_VR_ENABLE_MCP

33

IMVP_PWRGD

G1

DGPU_PWR_EN

CPU

+3.3V_ALW

25

1.5V_RUN_PWRGD

RUN_ON

23

28

34

B

CPUPWRGOOD

MCP

33

23

+5V_ALW

A

35 SVID

N E

+1.35V_RUN

32

G2

+PWR_SRC

DGPU_PWR_EN

+V_VDDQ

+1.35V_GFX

+1.05V_RUN

+1.05V_GFX

+VGACORE

IMVP VR

G4

DGPU_VC_EN

DGPU

0 5 O I P G

All_DGPU_PWR

DGPU_PWROK

G2

G6 DGPU_HOLD_RST#

N E

G3

7 1 O I P G

GPIO54

G5

G1

G4

VR_EN VR_READY

PG

DGPU_VC_EN

DGPU_PWR_EN

G3 G1

Quanta Computer Inc. JW8B

PROJECT :

A

5

4

3

2

1

Haswell ULT (DISPLAY) +VCCIOA_OUT

HSW_ULT_DDR3L

U14A

EDP_COMP

D

C54 C55 B58 C58 B55 A55 A57 B57 [27] [27] [27] [27] [27] [27] [27] [27]

INT_HDMI_TXN2 INT_HDMI_TXP2 INT_HDMI_TXN1 INT_HDMI_TXP1 INT_HDMI_TXN0 INT_HDMI_TXP0 INT_HDMI_TXCN INT_HDMI_TXCP

INT_HDMI_TXN2 INT_HDMI_TXP2 INT_HDMI_TXN1 INT_HDMI_TXP1 INT_HDMI_TXN0 INT_HDMI_TXP0 INT_HDMI_TXCN INT_HDMI_TXCP

DDI1_TXN0 DDI1_TXP0 DDI1_TXN1 DDI1_TXP1 DDI1_TXN2 DDI1_TXP2 DDI1_TXN3 DDI1_TXP3

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1

DDI

EDP

C51 C50 DDI2_TXN0 C53 DDI2_TXP0 B54 DDI2_TXN1 C49 DDI2_TXP1 B50 DDI2_TXN2 A53 DDI2_TXP2 B53 DDI2_TXN3 DDI2_TXP3

EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3 EDP_AUXN EDP_AUXP EDP_RCOMP EDP_DISP_UTIL

C45 B46 A47 B47

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1

D20 A43

EDP_AUXN EDP_AUXP EDP_COMP DP_UTIL R 29 1

R 29 0

EDP_AUXN EDP_AUXP

24.9/F_4

[25] [25] [25] [25]

D

+3.3V_RUN

C47 C46 A49 B49 A45 B45

R22

[25] [25]

* 0_ 4_ NC LCD_PWM

HDMI_SCL HDMI_SDA

RP2 1 3

2.2KX2 2 4

PIRQ_GPIO77

R40

10K_4

PIRQ_GPIO80

R308

10K_4

DGPU_PWR_EN

R36

10K_4

* 0_ 4_ NC

1 OF 19

U14I

HSW_ULT_DDR3L

C

C

[25]

R293

LCD_PWM TP39 TP55

*0_4_SHORT_NC

PIRQ_GPIO77 [42]THERMAL_PWR_EN [42] FAN_PWR_EN TP48 [12,40]

SMB_INT#

*0_4_NC

PIRQ_GPIO80 PCI _PME_N R329 DGPU_PWR_EN

[54,55] DGPU_PWR_EN

B8 A9 C6

EDP_BKLCTL EDP_BKLEN EDP_VDDEN

U6 P4 PIRQA/GPIO77 N4 PIRQB/GPIO78 N2 PIRQC/GPIO79 AD4 PIRQD/GPIO80 PME U7 L1 L3 R5 L4

GPIO55 GPIO52 GPIO54 GPIO51 GPIO53

DDPB_CTRLCLK DDPB_CTRLDATA DDPC_CTRLCLK DDPC_CTRLDATA

eDP SIDEBAND

+3V +3V +3V +3V

+3V +3V +3V +3V +3V

PCIE

B9 C9 D9 HDMI_SCL D11 HDMI_SDA

HDMI_SCL HDMI_SDA

DISPLAY

DDPB_AUXN DDPC_AUXN DDPB_AUXP DDPC_AUXP

[27] [27]

DDPB_HPD DDPC_HPD EDP_HPD

C5 B6 B5 A6

C8 A8 D6

INT_HDMI_HP

EDP_HP_R R16

1 R17

[42]THERMAL_STP#_CTRL

100K_4 9 OF 19

need check have VGA function

1K_4

[27] EDP_HP

[25]

R287 1M_4

2

B

B

A

A


5

4

3

Haswell ULT

D

U14K

[20] [20]

GPU

C

GIGA LAN

[20] [20]

PEG_TXN0 PEG_TXP0

[20] [20]

PEG_RXN1 PEG_RXP1

[20] [20]

PEG_TXN1 PEG_TXP1

[20] [20]

PEG_RXN2 PEG_RXP2

[20] [20]

PEG_TXN2 PEG_TXP2

[20] [20]

PEG_RXN3 PEG_RXP3

[20] [20]

PEG_TXN3 PEG_TXP3

[32] [32]

PCIE_RXN3 PCIE_RXP3

[32] [32]

WIFI

USB3.0 Port (Left)

Cardreader

C23 C22 F8 E8 B23 A23

E6 F6 B22 A21 G11 F11 C29 B30

PCIE_TXN3 PCIE_TXP3

[37] [37]

PCIE_RXN4 PCIE_RXP4

[37] [37]

PCIE_TXN4 PCIE_TXP4

F13 G13 B29 A29

[34] [34]

USB3.0 Port (Right)

USBP2USBP2+

[35] [35]

USB3.0 Port (Left)

[28] [28]

Finger Print

AM15 USB2N4 DSW USB2P4 AL15

USBP4USBP4+

[28] [28]

Camara

USBP5USBP5+

[26] [26]

eTP Touch Panel

AR10 USB2N3 AT10

AM13 USB2N5 AN13

PETN5_L2 PETP5_L2

DSW USB2P5

PERN5_L3 PERP5_L3

DSW USB2P6

USBP6USBP6+

[37] [37]

Bluetooth

PETN5_L3 PETP5_L3

AR13 USB2N7 DSW USB2P7 AP13

USBP7USBP7+

[28] [28]

Touch Panel ( JW8 )

AP11 USB2N6 AN11

PERN3 PERP3 PETN3 PETP3

USB3RN1 USB3RP1 PCIE

USB

PERN4 PERP4

USB3TN2 USB3TP2

+V1.05S_AUSB3PLL

E15 E13 RSVD A27 RSVD B27 PCIE_RCOMP PCIE_IREF 11 OF 19

G20 H20 C33 B34

+3V_S5 +3V_S5 +3V_S5 +3V_S5

OC0/GPIO40 OC1/GPIO41 OC2/GPIO42 OC3/GPIO43

B33 A33

AL3 AT1 AH2 AV3

USB3.0_RX1- USB3.0_RX1+

[34] [34]

[34] [34]

USB3.0_RX2- USB3.0_RX2+

[34] [34]

[34] [34]

USB3.0_TX1USB3.0_TX1+

E18 F18

AJ10 USBRBIAS AJ11 USBRBIAS AN10 RSVD AM10 RSVD

PERN2/USB3RN4 PERP2/USB3RP4

B31 A31 PETN2/USB3TN4 PETP2/USB3TP4

USB3TN1 USB3TP1 USB3RN2 USB3RP2

PETN4 PETP4

PCIE_RXN2 PCIE_RXP2

PCIE_RCOMP PCIE_IREF

USB3.0 Port (Power Share)

USBP1USBP1+

USBP3USBP3+

[33] [33]

2 3K/F_4 2 *0_4_SHORT_NC

[34] [34]

DSW USB2P3

C30 C31 PETN1/USB3TN3 PETP1/USB3TP3

1 1

AR8 AP8

PETN5_L1 PETP5_L1


R20 R19

USB2N2

USBP0USBP0+

DSW USB2P2

USB3.0_RX3USB3.0_RX3+

B

USB2N1

AR7 AT7

PERN5_L1 PERP5_L1

[35] [35]

PCIE_TXN2 PCIE_TXP2

AN8 AM8

DSW USB2P1

[35] [35]

[33] [33]

USB2N0

DSW USB2P0

PETN5_L0 PETP5_L0

G17 F17 PERN1/USB3RN3 PERP1/USB3RP3

F15 G15

D

HSW_ULT_DDR3L

H10 G10 PERN5_L2 PERP5_L2 B21 C21

1

(PCIE,USB)

F10 E10 PERN5_L0 PERP5_L0

PEG_RXN0 PEG_RXP0

2


USB_BIAS

R10 5

22.6/F_ 4

USBPLLMON_N USBPLLMON_P

R10 8 R10 7

49.9/F_ 4 49.9/F_ 4

USB_OC0# USB_OC1# USB_OC2# USB_RIGHT_EN

U SB _O C0 # U SB _O C1 #

C

USB3.0 Port (Power Share)

USB3.0 Port ( Right)

[ 35 ] [ 34 ] B

USB_RIGHT_EN[34]

HARRIS_BEACH_CS REV 3.0 USB_OC0# USB_OC1# USB_OC2#

R88 R350 R332

1 1 1

2 10K_4 2 10K_4 2 10K_4

USB_RIGHT_EN

R388

1

2 *100K_4_NC

+3.3V_SUS

A

A


5

4

3

2

1

PCH Pull-high/low(CLG)

Haswell ULT (SYSTEM POWER MANAGEMENT)

+3.3V_SUS

ME_SUS_PWR_ACK_R R102

10K_4

D

D

+3.3V_SUS

U14H

PCIE_WAKE#_R

R131

AC_PRESENT

R78

10K_4 *10K_4_NC

PM_BATLOW#

R122

10K_4

SIO_PWRBTN#

R1 21

*10K _4_N C

HSW_ULT_DDR3L SYSTEM POWER MANAGEMENT

ME_SUS_PWR_ACK_RR109 SYS_RESET# R324 SYS_PWROK R391 EC_PWROK R62 APWROK

[38] [38,42] [38] [20,32,33,37]

PLTRST#

[38] RSMRST# [38]ME_SUS_PWR_ACK [38] SIO_PWRBTN# [38] AC_PRESENT [38] C

SLP_S0#

R103

1

1

2 *0_4_SHORT_NC

1 1 1

2 *0_4_SHORT_NCSYS_PWROK_R 2 *0_4_SHORT_NCEC_PWROK_R 2 *0_4_SHORT_NCAPWROK_R PLTRST#

SUSACK#_R

AK2 AC3 SUSACK AG2 SYS_RESET AY7 SYS_PWROK AB5 PCH_PWROK AG7 APWROK PLTRST

DSWVRMEN DPWROK DSW WAKE

AW6 RSMRST# DSW 2 *0_4_SHORT_NCME_SUS_PWR_ACK_R AV4 RSMRST AL7 SUSWARN/SUSPWRDNACK/GPIO30 SIO_PWRBTN# DSW AJ8 PWRBTN AC_PRESENT DSW ACPRESENT/GPIO31 AN4 PM_BATLOW# DSW AF3 BATLOW/GPIO72 AM5 SLP_S0 TP51 PCH_SLP_WLAN# DSW SLP_WLAN/GPIO29

+3V CLKRUN/GPIO32 +3V_S5SUS_STAT/GPIO61 +3V_S5 SUSCLK/GPIO62 DSW SLP_S5/GPIO63 +3V_S5

DSW SLP_S4 DSW SLP_S3 DSW SLP_A DSW SLP_SUS DSW SLP_LAN

AW7 AV5 AJ5

DSWVRMEN R403 1 DPWROK_R R390 1 PCIE_WAKE#_R R134 1

V5 AG4 AE6 AP5

CLKRUN# TPM_LPC_PD

AJ6 AT4 AL5 AP4 AJ7

2 2 2

CLKRUN# TP50

*0_4_NC *_0_4_SHORT_NCRSMRST# *_0_4_SHORT_NC

DPWROK [38] EC_WAKE# [38]

[38] +3.3V_RUN

SIO_SLP_S5#

[38]

SIO_SLP_S4# SIO_SLP_S3#

[19,38,49] [14,19,38,49]

TP53

CLKRUN# SYS_RESET#

R43 R331

8.2K/J_4 10K_4

RSMRST#

R404

10K_4

SYS_PWROK_R

R327 1

2 *47K_4_NC

DPWROK_R

R389 1

2 *100K_4_NC

APWROK_R

R60

C

8 OF 19

1

2 *47K_4_NC

+RTC_CELL

R406 330K_4 R135 1

2

*0_4_SHORT_NC DSWVRMEN

B

On Die DSW VR Enable

+3.3V_RUN

B

High = Enable (Default) Low = Disable C193 *0.1U/16V_4_NC U15

5 2

[38]

BUF_PLT_RST#

PLTRST#

4 1

2 R114 *TC7SH08FU_NC 3 100K_4

1

A

A


5

4

3

U14S

CFG0 CFG1 TP25

D

TP26 TP8 TP7

TP24 TP20 TP22 TP5 TP6 TP28 TP23 TP27 TP21 R325

CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 NOA_STBN_0 NOA_STBN_1 NOA_STBP_0 NOA_STBP_1 49.9/F_4

AC60 AC62 AC63 AA63 AA60 Y62 Y61 Y60 V62 V61 V60 U60 T63 T62 T61 T60

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

A5

TD_IREF

E1 D1 J20 H18 B12

AV63 MCP_RSVD_19 RSVD_TP AU63 MCP_RSVD_20 RSVD_TP RSVD_TP RSVD_TP RSVD RSVD_TP RSVD_TP RSVD_TP RESERVED

RSVD

RSVD RSVD VSS VSS

RSVD RSVD RSVD

TP35 TP29

C63 MCP_RSVD_21 C62 MCP_RSVD_22 B43

TP1 TP2

A51 MCP_RSVD_24 B51 MCP_RSVD_25

TP17 TP3

L60

TP4

MCP_RSVD_26

D

N60

W23 RSVD Y22 RSVD AY15 PROC_OPI_COMP PROC_OPI_RCOMP

CFG_RCOMP

RSVD RSVD RSVD RSVD TD_IREF

1

HSW_ULT_DDR3L

AA62 U63 CFG16 AA61 CFG18 U62 CFG17 CFG19

NOA_RCOMP V63

2

R402

49.9/F_4

AV62 D58 P22 N21 P20 R20

19 OF 19

R289 8.2K/F_4

C

C

Processor Strapping 1 CFG0 EAR-STALL/NOT STALL RESET SEQUENCE AFTER PCU PLL IS LOCKED CFG1 PCH/ PCH LESS MODE SELECTION

STALL

CFG0

R339

*1K_ 4_NC

( DE FA UL T) N OR MA L O PE RA TI ON

P CH -L ES S M OD E

CFG1

R334

*1K_ 4_NC

DISABLED NO PHYSICAL DISPLAY PORT ATTACHED TO EMBEDDED DISPLAY PORT

ENABLED AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED TO THE EMBEDDED DISPLAY PORT

CFG3

R330

*1K_ 4_NC

DISABLED NO PHYSICAL DISPLAY PORT ATTACHED TO EMBEDDED DISPLAY PORT

ENABLED AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED TO THE EMBEDDED DISPLAY PORT

CFG4

R61

1K_4

CFG 8 ALLOW THE USE OF NOA ON LOCKED UNITS

DISABLED(DEFAULT); IN THIS CASE, NOA WILL BE DISABLED IN LOCKED UNITS AND ENABLED IN UN-LOCKED UNITS

ENABLED; NOA WILL BE AVAILABLE REGARDLESS OF THE LOCKING OF THE UNIT

CFG9 NO SVID PROTOCOL CAPABLE VR CONNECTED

VRS SUPPORTING SVID PROTOCOL ARE PRESENT

NO VR SUPPORTING SVID IS PRESENT. THE CHIP WILL NOT GENERATE (OR RESPOND TO) SVID ACTIVITY

POWER FEATURES ACTIVATED DURING RESET

POWER FEATURES (ESPECIALLY CLOCK GATINE ARE NOT ACTIVATED

CFG3 PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)

B

0

(DEFAULT) NORMAL OPERATION; NO STALL

CFG4 DISPLAY PORT PRESENCE STRAP

CFG10 SAFE MODE BOOT

CFG8

CFG9

CFG10

R 326

*1K _4_ NC

R58

*1K_4_NC

R57

*1K_4_NC

B

A

A


5

4

3

2

1

D

D

U14B

[38]

TP38 TP44

PECI_EC_R +VCCIO_OUT

R317 2

R309 R311 2

D61 K61 PROC_DETECT N62 CATERR PECI

HSW_ULT_DDR3L

MISC

1 *62_4_NC

[38,47,52] IMVP7_PROCHOT# +V1.05S_VCCST

PROC_DETECT# CATERR#

56_4

H_PROCHOT#

K63

PROCHOT

JTAG THERMAL

1 62_4 R13

C

+V_VDDQ [14,19]

R112 R111 R110 R140 2

10K_4

200/F_4 120/F_4 100/F_4 1 470_4

LPT_DDR_PG_CTRL

H_CPUPWRGD

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 DDR3_DRAMRST# LPT_DDR_PG_CTRL

C61

PROCPWRGD

PRDY PREQ PROC_TCK PROC_TMS PROC_TRST PROC_TDI PROC_TDO

J62 K62 E60 E61 E59 F63 F62

TP60 TP61 XDP_TCK0 TP58 XDP_TRST_CPU_N TP59

X DP _T CK 0

[ 11 ]

XDP_TRST_CPU _N[11]

XDP_TDO_CPU +V1.05S_VCCST

PWR

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

AU60 DDR3L AV60 SM_RCOMP0 AU61 SM_RCOMP1 AV15 SM_RCOMP2 DSW SM_DRAMRST AV61 SM_PG_CNTL1

J60 H60 H61 H62 K59 H63 K60 J61

XDP_TDO_CPU

R33

51_4

XDP_TCK0

R10

51_4

XDP_TRST_CPU_N

R353

*51_4_NC

C

2 OF 19 [19] DDR3_DRAMRST#

DDR3_DRAMRST#

B

B

A

A


5

4

+3.3V_RUN R252 2

DP_VDDIO

+1.35V_RUN

1 *0_6_SHORT_NC

DP_VDD12

R212 2

1 C366 C367 1 0 U .1 / 6 2 U . 3 / 1 V 6 V _ 4 _ 4

D

3

1 *0_6_SHORT_NC

1

C310 0 .1 2 U / 1 6 V _ 4

[7]

EDP_AUXN

[7]

EDP_AUXP

1

DP_VDDRX

R213 2

1 *0_6_SHORT_NC

1 1 C267 C275 C286 1 0 * 0 U .1 . / 6 2 U 2 0 1 . 3 / U 1 V 6 / 1 V _ 6 4 _ V 4 _ 4 _ N C

C311 1 U / 6 . 3 V _ 4

Near IC pin 32

C

2

D

Near IC pin 5

C320 2

1 0.1U/16V_4

C309 2

1 0.1U/16V_4

TXO0N_LA TXO0P_LA

[26] [26]

TXO1N_LA TXO1P_LA

[26] [26]

TXO2N_LA TXO2P_LA

[26] [26]

TXOCN_LA TXOCP_LA

[26] [26]

EDP_AUXN_C LCD_PWM

C

[7]

8 7 6 5 4 3 2 1 0 9 8 7 U11 4 4 4 4 4 4 4 4 4 3 3 3 n C C n p n p n p n p I X N N 0 0 0 0 0 0 0 0 M A A B B C C K K U T T T T T T C C W A T T P D

EDP_AUXP_C [7] [7]

EDP_TXP0 EDP_TXN0

[7] [7]

EDP_TXP1 EDP_TXN1

C283 2 C282 2

1 0.1U/16V_4 1 0.1U/16V_4

EDP_TXP0_R EDP_TXN0_R DP_VDDRX 1 *0.1U/16V_4_NC EDP_TXP1_R 1 *0.1U/16V_4_NC EDP_TXN1_R DP_RST# DP _PD#

C281 2 C280 2

[7] [26]

EDP_HP

eDP_PWM_OUT

1 2 3 4 5 6 7 8 9 10 11 12 49 50 51 52

B

DP_VDDIO

R184

10K_4

C 27 1 2

R222 2

1*4.7K_4_NC

R237 2

14.7K_4

R271 2 R187

DAUXp GND DRX0p DRX0n VDDRX DRX1p DRX1n RST# PD# HPD GND PWMO Epad G G G

C288

PS8620/23

0 O I P E G D D / E P K G O M N F V R T 2 M L C E 1 T L A L T A _ _ _ D D D S V V S B D C X V N D E L L E N S S E L N G V T R R R E C C R R G 3 4 5 6 7 8 9 0 1 2 3 4 1 1 1 1 1 1 1 2 2 2 2 2 P M T A _ K G X L N F I E V 2 L C R R 1 _ _ _ _ D L L P P D V V 4 D 4 D V R R _ _ _ _ _ F / F / P P P K K D D D 9 9 1 1 9 . 9 . 4 4

12 .2 U/ 6. 3V /X 5R _6

1*4.7K_4_NC 10K_4

TA1n TA1p TB1n TB1p VDDIO TC1n TC1p TCK1n TCK1p ENPVCC/I2C_ADDR DDC_SDA DDC_SCL

DP_VDDIO

DP_ENVDD

TXO0N_LB TXO0P_LB TXO1N_LB TXO1P_LB

[26] [26] [26] [26]

TXO2N_LB TXO2P_LB TXOCN_LB TXOCP_LB DP_ENVDD

[26] [26] [26] [26] [26] EDID_SDA EDID_SCL

53 54 55 56

R470 1 R474 1

2 4.7K_4 2 4.7K_4

[26] [26]

+3.3V_RUN B

8 7 5 5

1U/6.3V_4 TP14

K G N F I D L C # _ _ D T L L V # S V V N D R R R E P _ _ _ _ _ P P P P P D D D D D A

G G G G GG

36 35 34 33 32 31 30 29 28 27 26 25

1

1 C313 C312 0 0 .1 . 0 2 U 2 1 U / 1 / 6 1 V 6 V _ 4 _ 4

1 5 5 2 6 2 2 2 R R

*4.7K_4_NC *4.7K_4_NC

2 2

1 R247 1 R242 SMBCLK3 SMBDAT3 eDP_BL_EN

+3.3V_RUN [23,31,38,42,43] [23,31,38,42,43] [38]

Link TO EC SMBus

A

DP_ENVDD: I2C Slave address selection, internal pull-down ~80K L: 0x10h~0x1Fh H: 0x90h~0x9Fh DP_RVL_LINK: LVDS single link or dual link selection, internal pull-down ~80K L: Single link LVDS H: Dual link LVDS

Quanta Computer Inc. PROJECT :JW8B Si

D

tN

b

R

5

CVS5402M1RA-NH

4

CN11

G_1

G_2

G_3

G_4

C

2

TXO0N_LA_R

0 _ G

D

3

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 5 40 _ G

DLP11SN900HL2L 4 1

EC25 *1.5P/50V_4_NC

+LCDVCC

EDID_SCL EDID_SDA

TXO0N_LA_R TXO0P_LA_R

[25] [25]

EL9 3 2

1

TXO0N_LB_R TXO0N_LA TXO0P_LA

[25] [25]

+3.3V_RUN

*DLP11SN900HL2L_NC 4 1

EL13 3 2


EL14 3 2


EL15 3 2


EL16 3 2

EC29 *1.5P/50V_4_NC

TXO0P_LA_R

TXO0N_LB TXO0P_LB

[25] [25]

TXO1N_LB TXO1P_LB

[25] [25]

TXO2N_LB TXO2P_LB

[25] [25]

TXOCN_LB TXOCP_LB

[25] [25]

TXO0P_LB_R TXO1N_LA_R

DLP11SN900HL2L 4 1

EC26 *1.5P/50V_4_NC

TXO1N_LA_R TXO1P_LA_R

EL10 3 2


[25] [25]

EC30 *1.5P/50V_4_NC

TXO1P_LA_R

D

TXO1P_LB_R TXO2N_LA_R TXO2P_LA_R

TXO2N_LA_R

DLP11SN900HL2L 4 1

TXOCN_LA_R TXOCP_LA_R

EC27 *1.5P/50V_4_NC

EL11 3 2


[25] [25]

EC31 *1.5P/50V_4_NC

TXO2P_LA_R TXO0N_LB_R TXO0P_LB_R

TXO2P_LB_R TXOCN_LA_R

DLP11SN900HL2L 4 1

TXO1N_LB_R TXO1P_LB_R

EC28 *1.5P/50V_4_NC

TXO2N_LB_R TXO2P_LB_R

EL12 3 2

TXOCN_LB_R TXOCN_LA TXOCP_LA

[25] [25]

EC32 *1.5P/50V_4_NC

TXOCP_LA_R TXOCP_LB_R

TXOCN_LB_R TXOCP_LB_R USBP5+_TOUCHWCM2012B900GBE 4 1 USBP5-_TOUCH LCD_DBC_R

R480 1

LCD_PWM_IN LCD_BAK

+3.3V_RUN

3 L32 2 2

*0_4_NC

USBP5+ USBP5TPSCR_EN LCD_TST LCD_DBC

[10] [10] [38] [38] [9]

��

C

+LED_BL

+LED_BL

7

1

+LCDVCC

C509

1

2 0.1U/25V/X7R_6

C496

2 0.1U/25V/X7R_6

1

C499

2 0.1U/16V_4

Brightness Control [25]

eDP_PWM_OUT

D17 1

3 B

[38]

LCD_PWM_EC

2

+VIN

LCD_PWM_IN

1

+3.3V_RUN BAT54C T/R

R256

10K_4

1

BAK_EN

C490

1

LCD_BAK

1

R464 10K_4

R234

2 10K_4

2

C495 2 0.1U/16V_4

1 R479

1

100K_4

1

DP_ENVDD

2

LCD_TST

40mil

40mil

1

D18

EN_LCDVCC

LCD_BAK

IN OUT IN GND EN

1

G5243A

2 0.1U/16V_4

B

*0_8_NC

+LCDVCC

U22

4 5 2 3

2

[38]

+LED_BL

LCD_VCC

R454

1

3 Q28 2 AO3409

C521

1

2 0.1U/25V/X7R_6

DP_ENVDD

C515

2 0.1U/25VX7R_6

2 [25]

3 2

BAT54C T/R

R239 +3.3V_RUN

R238 1

10K_4 2

100K_4

3 2

DP_ENVDD R 23 5

1

Q26 2N7002W

* 0_ 4_ NC

1

A

A


5

4

3

2

1

CAMERA / DMIC

D

C

8 1 / 2 1 e k u L . K O t n i r p t o o F , N / P n n o C

Fingerprint

CN1

21 22 1

23 24

20

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

FPC/FFC_6P_H=2

+3.3V_RUN

4 1

USBP7+_TSCR USBP7-_TSCR USBP4+_CN USBP4-_CN DIGITAL_CLK_R DIGITAL_D1_R

R 26 R 29

DIGITAL_CLK2_R L 6 DIGITAL_D2_R L7

3 2 WCM2012B900GBE L4 4 3 1 2 WCM2012B900GBE L5 * sh or t0 60 3_ NC DIGITAL_CLK2_R * sh or t0 60 3_ NC DIGITAL_D2_R

USBP7+ USBP7USBP4+ USBP4-

F CM 16 08 KF -3 01 T0 2 F CM 16 08 KF -3 01 T0 2

[10] [10]

DIGITAL_CLK DIGITAL_D1

+5V_RUN_F

HDMIF2

*0603L025YR_NC

+5V_RUN

+3.3V_RUN_F

HDMIF3

0603L025YR

+3.3V_RUN

��

[10] [10]

��

[30] [30]

��

[10] [10] C486 0.1U/16V_4

USBP3+ USBP3-

R475 1 R472 1

2 *0_4_SHORT_NC 2 *0_4_SHORT_NC

USBP3+_R_FT USBP3-_R_FT

1 2 3 4 5 7 6 8 CN8

D

R08 connect

TOUCH SCREEN

DIGITAL_D1 DIGITAL_CLK DIGITAL_D2_R DIGITAL_CLK2_R

+3.3V_RUN

C34 C31 C35 C32

*10P/50V_4_NC *10P/50V_4_NC 22P/50V_4 22P/50V_4

+5V_RUN

C

C90 *4.7U/6.3V_6_NC

C87 0.01U/16V_4

C45 0.01U/16V_4

B

B

A

A


5

4

3

2

1

D

D

C

C

B

Mini-PCIE H15 h-tc236bc130d130pt

B

CPU BKT H8 *INTEL-BKT-SHARK-ULT

H16 h-tc236bc130d130pt

H7 *H-TC394BC315D130P2

H10 *h-tc394bc315d138p2

1

H3 *h-tc236bc315d98p2

A

1

1

H4 *h-tc236bc315d98p2

1

H13 *h-tc394bc315d138p2

H14 *h-tc276bc315d118p2

3 1

1

H11 *h-tc394bc315d138p2

4

1

1

1

1

2

H6 *H-TSBC315D98P2

1

H12 *h-tc236bc315d98p2

1

H5 *h-tc315bc150d150pt

1

H9 *h-tc315i190bc150d150pt

1

H1 *h-c59d59n

1

H2 *h-c59d59n

A

1

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