Adder Kogge Stone 32bit With Test Bench

PART 1. Adder Kogge-Stone 32-bit with Full Combinational Logic.

Fig 1. Schematic blok diagram of Adder Kogge Stone 32-Bit.

Source code modul PdanG. module PdanG (A, B, Pik, Gik); input A; input B; output Pik; output Gik; assign Pik = A ^ B; assign Gik = A & B; endmodule;

Source code modul black_sel. module black_sel (Pkj, Gkj, Pik, Gik, G, P); input Pkj, Gkj, Pik, Gik; output G, P; assign G = (Gik | (Gkj & Pik)); assign P = Pik & Pkj; endmodule

Source code modul grey_sel. module grey_sel (Gkj, Pik, Gik, G); input Gkj, Pik, Gik;

1

output G; assign G = (Gik | (Gkj & Pik)); endmodule

Writer define 7 sub-modul under the modul Top Entity,i.e. modul KS_1, KS_2, KS_3, KS_4, KS_5, KS_6, and KS_7. Source code modul KS_1. module KS_1 (C0, A, B, Pik_1, Gik_1, C0_1); input C0; input [31:0]A; input [31:0]B; output [31:0]Pik_1; output [31:0]Gik_1; output C0_1; assign C0_1 = C0; PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG PdanG

PG_0(A[0], B[0], Pik_1[0], Gik_1[0]); PG_1(A[1], B[1], Pik_1[1], Gik_1[1]); PG_2(A[2], B[2], Pik_1[2], Gik_1[2]); PG_3(A[3], B[3], Pik_1[3], Gik_1[3]); PG_4(A[4], B[4], Pik_1[4], Gik_1[4]); PG_5(A[5], B[5], Pik_1[5], Gik_1[5]); PG_6(A[6], B[6], Pik_1[6], Gik_1[6]); PG_7(A[7], B[7], Pik_1[7], Gik_1[7]); PG_8(A[8], B[8], Pik_1[8], Gik_1[8]); PG_9(A[9], B[9], Pik_1[9], Gik_1[9]); PG_10(A[10], B[10], Pik_1[10], Gik_1[10]); PG_11(A[11], B[11], Pik_1[11], Gik_1[11]); PG_12(A[12], B[12], Pik_1[12], Gik_1[12]); PG_13(A[13], B[13], Pik_1[13], Gik_1[13]); PG_14(A[14], B[14], Pik_1[14], Gik_1[14]); PG_15(A[15], B[15], Pik_1[15], Gik_1[15]); PG_16(A[16], B[16], Pik_1[16], Gik_1[16]); PG_17(A[17], B[17], Pik_1[17], Gik_1[17]); PG_18(A[18], B[18], Pik_1[18], Gik_1[18]); PG_19(A[19], B[19], Pik_1[19], Gik_1[19]); PG_20(A[20], B[20], Pik_1[20], Gik_1[20]); PG_21(A[21], B[21], Pik_1[21], Gik_1[21]); PG_22(A[22], B[22], Pik_1[22], Gik_1[22]); PG_23(A[23], B[23], Pik_1[23], Gik_1[23]); PG_24(A[24], B[24], Pik_1[24], Gik_1[24]); PG_25(A[25], B[25], Pik_1[25], Gik_1[25]); PG_26(A[26], B[26], Pik_1[26], Gik_1[26]); PG_27(A[27], B[27], Pik_1[27], Gik_1[27]); PG_28(A[28], B[28], Pik_1[28], Gik_1[28]); PG_29(A[29], B[29], Pik_1[29], Gik_1[29]); PG_30(A[30], B[30], Pik_1[30], Gik_1[30]); PG_31(A[31], B[31], Pik_1[31], Gik_1[31]);

endmodule

Source code modul KS_2. module KS_2 (C0_1, Pik_1, Gik_1, C0_2, Pik_2, Gik_2, P_1_save); input C0_1; input [31:0]Pik_1; input [31:0]Gik_1;

2

output output output output

C0_2; [30:0]Pik_2; [31:0]Gik_2; [31:0]P_1_save;

wire [31:0]Gkj_1; wire [30:0]Pkj_1; assign assign assign assign assign

C0_2 = C0_1; P_1_save[31:0] = Pik_1[31:0]; Gkj_1[0] = C0_1; Gkj_1[31:1] = Gik_1[30:0]; Pkj_1[30:0] = Pik_1[30:0];

grey_sel gc_0(Gkj_1[0], Pik_1[0], Gik_1[0], Gik_2[0]); black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel

bc_0(Pkj_1[0], Gkj_1[1], Pik_1[1], Gik_1[1], Gik_2[1], Pik_2[0]); bc_1(Pkj_1[1], Gkj_1[2], Pik_1[2], Gik_1[2], Gik_2[2], Pik_2[1]); bc_2(Pkj_1[2], Gkj_1[3], Pik_1[3], Gik_1[3], Gik_2[3], Pik_2[2]); bc_3(Pkj_1[3], Gkj_1[4], Pik_1[4], Gik_1[4], Gik_2[4], Pik_2[3]); bc_4(Pkj_1[4], Gkj_1[5], Pik_1[5], Gik_1[5], Gik_2[5], Pik_2[4]); bc_5(Pkj_1[5], Gkj_1[6], Pik_1[6], Gik_1[6], Gik_2[6], Pik_2[5]); bc_6(Pkj_1[6], Gkj_1[7], Pik_1[7], Gik_1[7], Gik_2[7], Pik_2[6]); bc_7(Pkj_1[7], Gkj_1[8], Pik_1[8], Gik_1[8], Gik_2[8], Pik_2[7]); bc_8(Pkj_1[8], Gkj_1[9], Pik_1[9], Gik_1[9], Gik_2[9], Pik_2[8]); bc_9(Pkj_1[9], Gkj_1[10], Pik_1[10], Gik_1[10], Gik_2[10], Pik_2[9]); bc_10(Pkj_1[10], Gkj_1[11], Pik_1[11], Gik_1[11], Gik_2[11], Pik_2[10]); bc_11(Pkj_1[11], Gkj_1[12], Pik_1[12], Gik_1[12], Gik_2[12], Pik_2[11]); bc_12(Pkj_1[12], Gkj_1[13], Pik_1[13], Gik_1[13], Gik_2[13], Pik_2[12]); bc_13(Pkj_1[13], Gkj_1[14], Pik_1[14], Gik_1[14], Gik_2[14], Pik_2[13]); bc_14(Pkj_1[14], Gkj_1[15], Pik_1[15], Gik_1[15], Gik_2[15], Pik_2[14]); bc_15(Pkj_1[15], Gkj_1[16], Pik_1[16], Gik_1[16], Gik_2[16], Pik_2[15]); bc_16(Pkj_1[16], Gkj_1[17], Pik_1[17], Gik_1[17], Gik_2[17], Pik_2[16]); bc_17(Pkj_1[17], Gkj_1[18], Pik_1[18], Gik_1[18], Gik_2[18], Pik_2[17]); bc_18(Pkj_1[18], Gkj_1[19], Pik_1[19], Gik_1[19], Gik_2[19], Pik_2[18]); bc_19(Pkj_1[19], Gkj_1[20], Pik_1[20], Gik_1[20], Gik_2[20], Pik_2[19]); bc_20(Pkj_1[20], Gkj_1[21], Pik_1[21], Gik_1[21], Gik_2[21], Pik_2[20]); bc_21(Pkj_1[21], Gkj_1[22], Pik_1[22], Gik_1[22], Gik_2[22], Pik_2[21]); bc_22(Pkj_1[22], Gkj_1[23], Pik_1[23], Gik_1[23], Gik_2[23], Pik_2[22]); bc_23(Pkj_1[23], Gkj_1[24], Pik_1[24], Gik_1[24], Gik_2[24], Pik_2[23]); bc_24(Pkj_1[24], Gkj_1[25], Pik_1[25], Gik_1[25], Gik_2[25], Pik_2[24]); bc_25(Pkj_1[25], Gkj_1[26], Pik_1[26], Gik_1[26], Gik_2[26], Pik_2[25]); bc_26(Pkj_1[26], Gkj_1[27], Pik_1[27], Gik_1[27], Gik_2[27], Pik_2[26]); bc_27(Pkj_1[27], Gkj_1[28], Pik_1[28], Gik_1[28], Gik_2[28], Pik_2[27]); bc_28(Pkj_1[28], Gkj_1[29], Pik_1[29], Gik_1[29], Gik_2[29], Pik_2[28]); bc_29(Pkj_1[29], Gkj_1[30], Pik_1[30], Gik_1[30], Gik_2[30], Pik_2[29]); bc_30(Pkj_1[30], Gkj_1[31], Pik_1[31], Gik_1[31], Gik_2[31], Pik_2[30]);

endmodule

Source code modul KS_3. module KS_3 (C0_2, Pik_2, Gik_2, P_1_save, C0_3, Pik_3, Gik_3, P_2_save); input input input input output output output output

C0_2; [30:0]Pik_2; [31:0]Gik_2; [31:0]P_1_save; C0_3; [28:0]Pik_3; [31:0]Gik_3; [31:0]P_2_save;

wire [30:0]Gkj_2;

3

wire [28:0]Pkj_2; assign assign assign assign assign assign

C0_3 = C0_2; P_2_save[31:0] = P_1_save[31:0]; Gkj_2[0] = C0_2; Gkj_2[30:1] = Gik_2[29:0]; Pkj_2[28:0] = Pik_2[28:0]; Gik_3[0] = Gik_2[0];

grey_sel gc_0(Gkj_2[0], Pik_2[0], Gik_2[1], Gik_3[1]); grey_sel gc_1(Gkj_2[1], Pik_2[1], Gik_2[2], Gik_3[2]); black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel

bc_0(Pkj_2[0], Gkj_2[2], Pik_2[2], Gik_2[3], Gik_3[3], Pik_3[0]); bc_1(Pkj_2[1], Gkj_2[3], Pik_2[3], Gik_2[4], Gik_3[4], Pik_3[1]); bc_2(Pkj_2[2], Gkj_2[4], Pik_2[4], Gik_2[5], Gik_3[5], Pik_3[2]); bc_3(Pkj_2[3], Gkj_2[5], Pik_2[5], Gik_2[6], Gik_3[6], Pik_3[3]); bc_4(Pkj_2[4], Gkj_2[6], Pik_2[6], Gik_2[7], Gik_3[7], Pik_3[4]); bc_5(Pkj_2[5], Gkj_2[7], Pik_2[7], Gik_2[8], Gik_3[8], Pik_3[5]); bc_6(Pkj_2[6], Gkj_2[8], Pik_2[8], Gik_2[9], Gik_3[9], Pik_3[6]); bc_7(Pkj_2[7], Gkj_2[9], Pik_2[9], Gik_2[10], Gik_3[10], Pik_3[7]); bc_8(Pkj_2[8], Gkj_2[10], Pik_2[10], Gik_2[11], Gik_3[11], Pik_3[8]); bc_9(Pkj_2[9], Gkj_2[11], Pik_2[11], Gik_2[12], Gik_3[12], Pik_3[9]); bc_10(Pkj_2[10], Gkj_2[12], Pik_2[12], Gik_2[13], Gik_3[13], Pik_3[10]); bc_11(Pkj_2[11], Gkj_2[13], Pik_2[13], Gik_2[14], Gik_3[14], Pik_3[11]); bc_12(Pkj_2[12], Gkj_2[14], Pik_2[14], Gik_2[15], Gik_3[15], Pik_3[12]); bc_13(Pkj_2[13], Gkj_2[15], Pik_2[15], Gik_2[16], Gik_3[16], Pik_3[13]); bc_14(Pkj_2[14], Gkj_2[16], Pik_2[16], Gik_2[17], Gik_3[17], Pik_3[14]); bc_15(Pkj_2[15], Gkj_2[17], Pik_2[17], Gik_2[18], Gik_3[18], Pik_3[15]); bc_16(Pkj_2[16], Gkj_2[18], Pik_2[18], Gik_2[19], Gik_3[19], Pik_3[16]); bc_17(Pkj_2[17], Gkj_2[19], Pik_2[19], Gik_2[20], Gik_3[20], Pik_3[17]); bc_18(Pkj_2[18], Gkj_2[20], Pik_2[20], Gik_2[21], Gik_3[21], Pik_3[18]); bc_19(Pkj_2[19], Gkj_2[21], Pik_2[21], Gik_2[22], Gik_3[22], Pik_3[19]); bc_20(Pkj_2[20], Gkj_2[22], Pik_2[22], Gik_2[23], Gik_3[23], Pik_3[20]); bc_21(Pkj_2[21], Gkj_2[23], Pik_2[23], Gik_2[24], Gik_3[24], Pik_3[21]); bc_22(Pkj_2[22], Gkj_2[24], Pik_2[24], Gik_2[25], Gik_3[25], Pik_3[22]); bc_23(Pkj_2[23], Gkj_2[25], Pik_2[25], Gik_2[26], Gik_3[26], Pik_3[23]); bc_24(Pkj_2[24], Gkj_2[26], Pik_2[26], Gik_2[27], Gik_3[27], Pik_3[24]); bc_25(Pkj_2[25], Gkj_2[27], Pik_2[27], Gik_2[28], Gik_3[28], Pik_3[25]); bc_26(Pkj_2[26], Gkj_2[28], Pik_2[28], Gik_2[29], Gik_3[29], Pik_3[26]); bc_27(Pkj_2[27], Gkj_2[29], Pik_2[29], Gik_2[30], Gik_3[30], Pik_3[27]); bc_28(Pkj_2[28], Gkj_2[30], Pik_2[30], Gik_2[31], Gik_3[31], Pik_3[28]);

endmodule

Source code modul KS_4. module KS_4 (C0_3, Pik_3, Gik_3, P_2_save, C0_4, Pik_4, Gik_4, P_3_save); input input input input output output output output

C0_3; [28:0]Pik_3; [31:0]Gik_3; [31:0]P_2_save; C0_4; [24:0]Pik_4; [31:0]Gik_4; [31:0]P_3_save;

wire [28:0]Gkj_3; wire [24:0]Pkj_3; assign assign assign assign assign

4

C0_4 = C0_3; P_3_save[31:0] = P_2_save[31:0]; Gkj_3[0] = C0_3; Gkj_3[28:1] = Gik_3[27:0]; Pkj_3[24:0] = Pik_3[24:0];

assign Gik_4[2:0] = Gik_3[2:0]; grey_sel grey_sel grey_sel grey_sel

gc_0(Gkj_3[0], gc_1(Gkj_3[1], gc_2(Gkj_3[2], gc_3(Gkj_3[3],

black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel

Pik_3[0], Pik_3[1], Pik_3[2], Pik_3[3],

Gik_3[3], Gik_3[4], Gik_3[5], Gik_3[6],

Gik_4[3]); Gik_4[4]); Gik_4[5]); Gik_4[6]);

bc_0(Pkj_3[0], Gkj_3[4], Pik_3[4], Gik_3[7], Gik_4[7], Pik_4[0]); bc_1(Pkj_3[1], Gkj_3[5], Pik_3[5], Gik_3[8], Gik_4[8], Pik_4[1]); bc_2(Pkj_3[2], Gkj_3[6], Pik_3[6], Gik_3[9], Gik_4[9], Pik_4[2]); bc_3(Pkj_3[3], Gkj_3[7], Pik_3[7], Gik_3[10], Gik_4[10], Pik_4[3]); bc_4(Pkj_3[4], Gkj_3[8], Pik_3[8], Gik_3[11], Gik_4[11], Pik_4[4]); bc_5(Pkj_3[5], Gkj_3[9], Pik_3[9], Gik_3[12], Gik_4[12], Pik_4[5]); bc_6(Pkj_3[6], Gkj_3[10], Pik_3[10], Gik_3[13], Gik_4[13], Pik_4[6]); bc_7(Pkj_3[7], Gkj_3[11], Pik_3[11], Gik_3[14], Gik_4[14], Pik_4[7]); bc_8(Pkj_3[8], Gkj_3[12], Pik_3[12], Gik_3[15], Gik_4[15], Pik_4[8]); bc_9(Pkj_3[9], Gkj_3[13], Pik_3[13], Gik_3[16], Gik_4[16], Pik_4[9]); bc_10(Pkj_3[10], Gkj_3[14], Pik_3[14], Gik_3[17], Gik_4[17], Pik_4[10]); bc_11(Pkj_3[11], Gkj_3[15], Pik_3[15], Gik_3[18], Gik_4[18], Pik_4[11]); bc_12(Pkj_3[12], Gkj_3[16], Pik_3[16], Gik_3[19], Gik_4[19], Pik_4[12]); bc_13(Pkj_3[13], Gkj_3[17], Pik_3[17], Gik_3[20], Gik_4[20], Pik_4[13]); bc_14(Pkj_3[14], Gkj_3[18], Pik_3[18], Gik_3[21], Gik_4[21], Pik_4[14]); bc_15(Pkj_3[15], Gkj_3[19], Pik_3[19], Gik_3[22], Gik_4[22], Pik_4[15]); bc_16(Pkj_3[16], Gkj_3[20], Pik_3[20], Gik_3[23], Gik_4[23], Pik_4[16]); bc_17(Pkj_3[17], Gkj_3[21], Pik_3[21], Gik_3[24], Gik_4[24], Pik_4[17]); bc_18(Pkj_3[18], Gkj_3[22], Pik_3[22], Gik_3[25], Gik_4[25], Pik_4[18]); bc_19(Pkj_3[19], Gkj_3[23], Pik_3[23], Gik_3[26], Gik_4[26], Pik_4[19]); bc_20(Pkj_3[20], Gkj_3[24], Pik_3[24], Gik_3[27], Gik_4[27], Pik_4[20]); bc_21(Pkj_3[21], Gkj_3[25], Pik_3[25], Gik_3[28], Gik_4[28], Pik_4[21]); bc_22(Pkj_3[22], Gkj_3[26], Pik_3[26], Gik_3[29], Gik_4[29], Pik_4[22]); bc_23(Pkj_3[23], Gkj_3[27], Pik_3[27], Gik_3[30], Gik_4[30], Pik_4[23]); bc_24(Pkj_3[24], Gkj_3[28], Pik_3[28], Gik_3[31], Gik_4[31], Pik_4[24]);

endmodule

Source code modul KS_5. module KS_5 (C0_4, Pik_4, Gik_4, P_3_save, C0_5, Pik_5, Gik_5, P_4_save); input input input input output output output output

C0_4; [24:0]Pik_4; [31:0]Gik_4; [31:0]P_3_save; C0_5; [16:0]Pik_5; [31:0]Gik_5; [31:0]P_4_save;

wire [24:0]Gkj_4; wire [16:0]Pkj_4; assign assign assign assign assign assign

C0_5 = C0_4; P_4_save[31:0] = P_3_save[31:0]; Gkj_4[0] = C0_4; Gkj_4[24:1] = Gik_4[23:0]; Pkj_4[16:0] = Pik_4[16:0]; Gik_5[6:0] = Gik_4[6:0];

grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel

5

gc_0(Gkj_4[0], gc_1(Gkj_4[1], gc_2(Gkj_4[2], gc_3(Gkj_4[3], gc_4(Gkj_4[4], gc_5(Gkj_4[5], gc_6(Gkj_4[6],

Pik_4[0], Pik_4[1], Pik_4[2], Pik_4[3], Pik_4[4], Pik_4[5], Pik_4[6],

Gik_4[7], Gik_5[7]); Gik_4[8], Gik_5[8]); Gik_4[9], Gik_5[9]); Gik_4[10], Gik_5[10]); Gik_4[11], Gik_5[11]); Gik_4[12], Gik_5[12]); Gik_4[13], Gik_5[13]);

grey_sel gc_7(Gkj_4[7], Pik_4[7], Gik_4[14], Gik_5[14]); black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel black_sel

bc_0(Pkj_4[0], Gkj_4[8], Pik_4[8], Gik_4[15], Gik_5[15], Pik_5[0]); bc_1(Pkj_4[1], Gkj_4[9], Pik_4[9], Gik_4[16], Gik_5[16], Pik_5[1]); bc_2(Pkj_4[2], Gkj_4[10], Pik_4[10], Gik_4[17], Gik_5[17], Pik_5[2]); bc_3(Pkj_4[3], Gkj_4[11], Pik_4[11], Gik_4[18], Gik_5[18], Pik_5[3]); bc_4(Pkj_4[4], Gkj_4[12], Pik_4[12], Gik_4[19], Gik_5[19], Pik_5[4]); bc_5(Pkj_4[5], Gkj_4[13], Pik_4[13], Gik_4[20], Gik_5[20], Pik_5[5]); bc_6(Pkj_4[6], Gkj_4[14], Pik_4[14], Gik_4[21], Gik_5[21], Pik_5[6]); bc_7(Pkj_4[7], Gkj_4[15], Pik_4[15], Gik_4[22], Gik_5[22], Pik_5[7]); bc_8(Pkj_4[8], Gkj_4[16], Pik_4[16], Gik_4[23], Gik_5[23], Pik_5[8]); bc_9(Pkj_4[9], Gkj_4[17], Pik_4[17], Gik_4[24], Gik_5[24], Pik_5[9]); bc_10(Pkj_4[10], Gkj_4[18], Pik_4[18], Gik_4[25], Gik_5[25], Pik_5[10]); bc_11(Pkj_4[11], Gkj_4[19], Pik_4[19], Gik_4[26], Gik_5[26], Pik_5[11]); bc_12(Pkj_4[12], Gkj_4[20], Pik_4[20], Gik_4[27], Gik_5[27], Pik_5[12]); bc_13(Pkj_4[13], Gkj_4[21], Pik_4[21], Gik_4[28], Gik_5[28], Pik_5[13]); bc_14(Pkj_4[14], Gkj_4[22], Pik_4[22], Gik_4[29], Gik_5[29], Pik_5[14]); bc_15(Pkj_4[15], Gkj_4[23], Pik_4[23], Gik_4[30], Gik_5[30], Pik_5[15]); bc_16(Pkj_4[16], Gkj_4[24], Pik_4[24], Gik_4[31], Gik_5[31], Pik_5[16]);

endmodule

Source code modul KS_6. module KS_6 (C0_5, Pik_5, Gik_5, P_4_save, C0_6, Pik_6, Gik_6); input input input input

C0_5; [16:0]Pik_5; [31:0]Gik_5; [31:0]P_4_save;

output C0_6; output [31:0]Pik_6; output [31:0]Gik_6; wire [16:0]Gkj_5; assign assign assign assign assign

C0_6 = C0_5; Pik_6[31:0] = P_4_save[31:0]; Gkj_5[0] = C0_5; Gkj_5[16:1] = Gik_5[15:0]; Gik_6[15:0] = Gik_5[15:0];

grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel grey_sel endmodule

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gc_0(Gkj_5[0], Pik_5[0], Gik_5[15], Gik_6[15]); gc_1(Gkj_5[1], Pik_5[1], Gik_5[16], Gik_6[16]); gc_2(Gkj_5[2], Pik_5[2], Gik_5[17], Gik_6[17]); gc_3(Gkj_5[3], Pik_5[3], Gik_5[18], Gik_6[18]); gc_4(Gkj_5[4], Pik_5[4], Gik_5[19], Gik_6[19]); gc_5(Gkj_5[5], Pik_5[5], Gik_5[20], Gik_6[20]); gc_6(Gkj_5[6], Pik_5[6], Gik_5[21], Gik_6[21]); gc_7(Gkj_5[7], Pik_5[7], Gik_5[22], Gik_6[22]); gc_8(Gkj_5[8], Pik_5[8], Gik_5[23], Gik_6[23]); gc_9(Gkj_5[9], Pik_5[9], Gik_5[24], Gik_6[24]); gc_10(Gkj_5[10], Pik_5[10], Gik_5[25], Gik_6[25]); gc_11(Gkj_5[11], Pik_5[11], Gik_5[26], Gik_6[26]); gc_12(Gkj_5[12], Pik_5[12], Gik_5[27], Gik_6[27]); gc_13(Gkj_5[13], Pik_5[13], Gik_5[28], Gik_6[28]); gc_14(Gkj_5[14], Pik_5[14], Gik_5[29], Gik_6[29]); gc_15(Gkj_5[15], Pik_5[15], Gik_5[30], Gik_6[30]); gc_16(Gkj_5[16], Pik_5[16], Gik_5[31], Gik_6[31]);

Source code modul KS_7. module KS_7 (C0_6, Pik_6, Gik_6, S, Cout); input C0_6; input [31:0]Pik_6; input [31:0]Gik_6; output [31:0]S; output Cout; assign Cout = Gik_6[31]; assign S[0] = C0_6 ^ Pik_6[0]; assign S[31:1] = Gik_6[30:0] ^ Pik_6[31:1]; endmodule

Source code modul KS_top (Top Entitiy). module KS_top (C0, A, B, S, Cout); input C0; input [31:0]A; input [31:0]B; output [31:0]S; output Cout; wire [31:0]P1; wire [31:0]G1; wire C1; wire wire wire wire

[30:0]P2; [31:0]G2; C2; [31:0]PS1;

wire wire wire wire

[28:0]P3; [31:0]G3; C3; [31:0]PS2;

wire wire wire wire

[24:0]P4; [31:0]G4; C4; [31:0]PS3;

wire wire wire wire

[16:0]P5; [31:0]G5; C5; [31:0]PS4;

wire [31:0]P6; wire [31:0]G6; wire C6; KS_1 s1(C0, A, B, P1, G1, C1); KS_2 s2(C1, P1, G1, C2, P2, G2, PS1); KS_3 s3(C2, P2, G2, PS1, C3, P3, G3, PS2); KS_4 s4(C3, P3, G3, PS2, C4, P4, G4, PS3); KS_5 s5(C4, P4, G4, PS3, C5, P5, G5, PS4); KS_6 s6(C5, P5, G5, PS4, C6, P6, G6);

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KS_7 s7(C6, P6, G6, S, Cout); endmodule

Adder Kogge-Stone 32-bit is tested by the modul test-bench. Source code modul tes_bench32. module tes_bench32;

// testbench for the 32-bit unsigned Kogge-Stone adder // exhaustive checking of partial 1024*1024*2 possible cases

reg [31:0] a, b; // reg c0; // wire [31:0] s; // wire c32; // reg [32:0] check; // integer i, j, k; // integer num_correct;// integer num_wrong; //

32-bit operands carry input 32-bit sum output carry output 33-bit value used to check correctess loop variables counter to keep track of the number correct counter to keep track of the number wrong

// instantiate the 32-bit Kogge-Stone adder KS_top ks32(c0, a, b, s, c32); // exhaustive checking initial begin // initialize the counter variables num_correct = 0; num_wrong = 0; // loop through all possible cases and record the results for (i = 0; i < 1024; i = i + 1) begin a = i; for (j = 0; j < 1024; j = j + 1) begin b = j; for (k = 0; k < 2; k = k + 1) begin c0 = k; check = a + b + c0; // compute and check the product #2 if ({c32, s} == check) num_correct = num_correct + 1; else num_wrong = num_wrong + 1; // following line is for debugging // $display($time, " %d + %d + %d = %d (%d)", a, b, c0, {c32, s}, check); end end end // print the final counter values $display("num_correct = %d, num_wrong = %d", num_correct, num_wrong); end endmodule

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Result of Adder Kogge-Stone 32-bit tested by the modul test bench.

Fig 2. Result of Adder Kogge-Stone 32 bit tested on ModelSim.

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