A Non-Inverting Buck-Boost DC-DC Switching

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. publication. IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. X, NO. X, JANUARY 2010

1

A Non-Inverting Buck-Boost DC-DC Switching Converter with High Efficiency and Wide Bandwidth ∗

Carlos Restrepo , Student Member, IEEE, Javier Calvente, Member, IEEE, Angel Cid-Pastor Cid-Pastor,, Member, IEEE, Abdelali El Aroudi, Member, IEEE, and Roberto Giral, Senior Member, IEEE

novel DC-DC switching switching convert converter er consisting consisting of Abstract —A novel a boost boost stage stage cascad cascaded ed with with a buck buck conve converte rterr with with their their coils coils magnetical magnetically ly coupled coupled is presented presented.. The disclosed disclosed converter converter has the same same step-u step-up p or step step down down voltag voltagee conver conversio sion n prope properti rties es than the single inductor non-inverting buck-boost converter but exhibits non-pulsating input and output currents. The converter control-to control-to-outp -output ut transfer transfer function function is continuous continuous between between operoperation modes if a particular particular magnetic magnetic coupling is selected selected.. The additi addition on of a dampin damping g networ network k impro improves ves the dynami dynamics cs and results results in a control-tocontrol-to-outpu outputt transfer transfer function that has, even in boost mode, mode, two dominant dominant complex complex poles without right half plane zeroes. An example shows that an output voltage controller can be designed designed with the same well-know well-known n technique techniquess usually usually applied to the second-order buck regulator. Details of a prototype and experime experimental ntal results results includin including g efficienc efficiency, y, frequenc frequency y and time domain domain response responsess are presented presented.. The experimen experimental tal results results validate validate the theoretic theoretical al expected expected advantages advantages of the convert converter er,, namely, good efficiency, wide bandwidth and simplicity of control design. —Non-invert verting ing buck-boos buck-boostt convert converter er,, coupled coupled Index Index Terms—Non-in inductors, inductors, right-hal right-half-plan f-planee (RHP) (RHP) zero, zero, high efficiency efficiency,, widebandwidth, high-side driver.

I. I NTRODUCTION

I

N many converter applications such as battery charging and discharging, power factor correction, fuel cell regulation, maximum maximum power point tracking of solar solar panels, panels, a DC-DC conver converter ter is used used to obtain obtain a regul regulate ated d volta voltage ge from from an unregulated source. When the regulated voltage is within the voltage range of the unregulated unregulated voltage source, a step-up/stepdown DC-DC converter is required [1]–[13]. Step-up/step-down DC-DC converters with a single active ´ switch, such as buck-boost, flyback, SEPIC and Cuk topologies, have high component stresses and low efficiencies in the same operating point than the boost or the buck converter if the output voltage is greater or smaller than the input voltage respectively respectively [14]. It is possible to combine a buck with a boost to obtain a two independently controllable switch buck-boost converter with This work was supported by the Spanish Ministerio de Ciencia e Inovación on under the proj projects ects ESP20 ESP2006-1 06-12855 2855-C03 -C03-02, -02, CSD2 CSD2009009-0004 00046, 6, TEC2 TEC200900913172, DPI2010-16481 and the FPU scholarship AP2008-03305. C. Restrepo, J. Calvente, A. Cid-Pastor, A. El Aroudi and R. Giral are with the Departament d’Enginyeria Electr onica, o` nica, El` Electrica e` ctrica i Autom` Automatica, a` tica, Escola Tecnica e` cnica Superior d’Enginyeri d’Enginyeria, a, Univer Universitat sitat Rovira i Virgili, 43007 Tarragona, Spain. Corresponding Correspondi ng author author.. Email: [email protected]. [email protected]. Postal Address: Avda. Pa¨ısos ısos Catalans 26, 2 6, Campus Sesc elades, 43007, 4300 7, Tarragona, Spain. Fax: (+34)977559605. (+34)97755 9605. Teleph Telephone one number: (+34)9772 (+34)977297052. 97052. ∗

size and performance comparable to those of the simple buck or boost stages [15]. For example, combining a buck in cascade with a boost results in a single inductor non-inverting buckboost converter converter that exhibits high performance and it is widely used in low voltage applications [4]–[8]. These converters do not operate in buck-boost mode because it is more efficient to operate them either in buck mode if the output voltage is lower than the input one or in boost mode in the opposite case [2]. There are also high efficiency non-inverting buckboost converters at higher operational voltages [12], [13] with the drawback of a complex control. In [12], the authors state that the detailed modelling modelling of the plant and the controller controller is an ongoin ongoing g work. work. In [13], [13], two two differ different ent output output volta voltage ge regulators regulators are required depending on either boost or buck mode of operation. The single inductor non-inverting buck-boost converter is used in applications where it is important to have low size and cost of the magnetic elements. However, when the voltages are high, the size of the capacitors of this converter is also important. In that case, it can be interesting to use the cascade buck-boost power converter that has two inductors, one at the input and another at the output [1], [3]. With these inductors, the input and output currents are non-pulsating, the noise level is lower and the control and the limiting of the currents can be easier than in the pulsating case. Most of the converters mentioned above, when operating in continuous conduction boost mode, have a right-half-plane (RHP) zero that makes the controller design a difficult task, limit limitss the bandwi bandwidth dth of the loop and penali penalizes zes the size size of the output capacitor [6]. One possible solution to these problems is a topology named KY buck-boost converter [16]. This converter has a very fast transient response, which is achieved achieved by using switched capacitors for energy transfer, transfer, and is advisable for low power applications. The tri-state boost converter reported in [17] eliminates the RHP zero but exhibits a poor efficiency, this technique having never been applied to the buckbuck-boo boost st topolo topology gy.. In [11] [11] a two induct inductor or boost boost superimposed with a buck converter solves satisfactorily the RHP zero problem but both active switches of the structure are floating, what requires complex drivers. Another solution to the problem of the RHP zeros adopted in the work here reported is using magnetic coupling between inductors [18] combined with damping networks [19], [20]. This solution has allowed the design of high-power boost converters with high efficiency and wide bandwidth [21]–[23].

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. X, NO. X, JANUARY 2010

1:

ig vg

+

−

Lm

iLm Q1

Ds1 C

2

n

+

1:

Q2

vC Ds2

L iL C o

−

ig

+

vo Ro

vg

Lm

+

iLm

Ds1

Q1

−

n

vC

C

−

II. A NALYSIS OF THE B UC K -B OOST C ONVERTER WITH MAGNETIC COUPLING BETWEEN INDUCTORS

Lets us consider the unidirectional buck-boost converter with magnetic coupling between the input and output inductors shown in Fig. 1. The current and voltage typical waveforms of this converter in steady state are depicted in Fig. 3. In boost mode, the currents are shown in Fig. 3 (a) and the corresponding voltages in Fig. 3 (b). Fig. 3 (c) and (d) represent current and voltage waveforms in buck mode. The bottom traces of each plot correspond to u1 and u2 , which are respectively the logic activation signals of switches Q1 and Q2 . In boost mode u2 = 1 while u1 is switching whereas in buck mode u1 = 0 while u2 switches. The duty cycles of u1 and u2 have been adjusted to obtain a mean output voltage of 48 V. In a typical design, the ripple in the intermediate capacitor voltage vC is bigger than that of the output voltage, which permits to use a small intermediate capacitor. As it can

C o

−

+

vo Ro −

(a)

Fig. 1. Schematic circuit diagram of the buck-boost converter with magnetic coupling between inductors.

The purpose of this paper is to analyze the cascaded connection of a boost and buck converter, with magnetic coupling between inductors, shown in Fig. 1. This converter can operate in boost mode, as in Fig. 2(a), and buck mode, as in Fig. 2(b). Both topologies have non-minimum phase transfer functions under certain parametric conditions and have been previously proposed for battery charge/discharge regulators for satellites [24]. As it will be seen, the proposed converter exhibits high efficiency in the desired range of operation in spite of using diodes instead of synchronous rectification. It also presents a wide bandwidth and low current ripples that reduce the size of the input capacitor and especially that of the output one. Finally, the converter control is simple in comparison with the state-of-the-art, what could reduce design costs. The remainder part of this paper is organized as follows: Section II presents the key waveforms of the converter and discusses the small-signal converter model. In the same section, the turns ratio n of the transformer that avoids the need of using two transfer functions, namely, one for the buck mode and another one for the boost mode, is also determined. This allows to use the same transfer function to describe the converter in both modes and simplifies the controller design. A damping network is added in Section III where analytical expressions are obtained to design a minimum phase transfer function. Section IV focuses on a complete circuit design for the buck-boost converter and its control. Finally, the last two sections present respectively simulated and experimental results, and the conclusions of this work.

L iL

+

1:

ig vg

Lm

iLm

n

+

+

C

−

L iL

Q2

vC Ds2

C o

−

+

vo Ro −

(b) Fig. 2. Operating modes of the buck-boost converter: (a) boost mode; (b) buck mode.

be observed from Fig. 3, a common characteristic of the two operation modes is that currents ig and iL are non-pulsating with triangular-shaped ripple. Assuming a continuous conduction mode (CCM) of operation, no parasitic effects and a switching frequency much higher than the converter natural frequencies, the use of the state space averaging (SSA) method [25] to model the converter leads to the following set of differential equations

diLm (t) dt diL (t) dt

dv C (t) dt dvo (t) dt

= =

= =

vg (t)

−v

C (t)(1

− d1(t))

Lm vC (t)d2 (t) + n(vg (t) vC (t)(1 d1 (t))) L v o (t) L iL (t)d2 (t) + (iLm (t) + niL (t))(1 d1 (t)) C iL (t) vo (t) (1) C o Ro C o

−

− −

−

−

−

where d1 and d2 are the duty cycles of the switches Q1 and Q2 respectively and the overline stands for averaging during one switching period. A circuital procedure to obtain equations (1) is by means of the replacement of the switches in the converter by their time averaged models [26], which leads to the large signal averaged circuit of Fig. 4(a). Assuming that the converter is in steady-state with constant duty cycles, d1 (t) = D1 and d2 (t) = D2 , and input voltage vg (t) = V g , and using the principles of inductor volt-second and capacitor charge balance [14], the steady-state expressions of the inductor currents and capacitor voltages are



10.3

]

A

3

50

]

V

[

[

1

1

Q

2.1 0

i

6.3

]

A

Q

v

0 10

]

V

[

[

0

2

2

Q

i

3.7 6.3

]

Q

v

−10 48.2

]

V

A

[

48

[

o

L

i

3.7 10.3

]

v

47.8

]

49.4

V

A

[

[

g

C

i

2.1

2

2

u , 1 u

1

u , 1 u

0

0

T

2T

44.9

v

3T

1 0

0

T

2T

(a)

3T

(b) 1

]

56.2

]

A

0

[

1

Q

i

−1 5.9 4.1

]

A

[

2

V

[

1

Q

v

54.4 56.2 54.4

]

V

[

2

Q

i

0 5.9

]

A

Q

v

0 48.2

]

V

[

48

[

L

i

4.1

5.5

]

A

o

v

47.8 55.6

]

V

[

[

g

i

2

u , 1 u

v

1

u , 1 u

0

0

T

2T

C

3.6

3T

53.8

2

1 0

0

T

2T

3T

(c) (d) Fig. 3. Typical waveforms of the Fig 1 converter for V o = 48 V: (a), (b) currents and voltages in boost mode with V g = 39 V; (c), (d) currents and voltages in buck mode with V g = 55 V. Logic signals u1 (in black) and u2 (in white) indicate switch Q1 and Q2 states respectively.

Our goal is that the converter could operate in both boost

I Lm

=

I L

=

V C = V o

=

(0 < D 1 < 1 and D2 = 1) or buck (0 < D 2 < 1 and D1 = 0)

− −

V g D2 (D2 n + nD1 ) Ro (1 D1 )2 V g D2 Ro (1 D1 ) V g 1 D1 V g D2 1 D1

modes, and that it could switch from one mode to another in a smooth form. Let us define a single control variable u that can take the values between 0 and 2 (0 < u < 2). The duty cycles D1 and D2 are related to the new variable u as

−

− −

(2)

These equations could be also derived from (1) by noting that, in steady-state, the derivatives are zero or, equivalently, from the DC circuit of Fig 4(b). It is worth noting that the DC values of the state variables v o , v C and iL do not depend on the transformer turns ratio n. From the output capacitor voltage V o in (2) the voltage conversion ratio M (D1 , D2 ) is given by

M (D1 , D2 )

≡ V V

o

g

=

D2 1 D1

−

(3)

−

D1 = max(0, u 1) D2 = min(1, u)

(4)

The new voltage conversion ratio can be expressed as follows

M (u) =

1

−

min(1, u) max(0, u 1)

−

(5)

With this control input, the DC voltage conversion ratio M (u) is continuous between the boost and buck modes of operation, as depicted in Fig. 5(a). In the border between the two modes of operation u = 1, so that D1 = 0 and D2 = 1. Fig. 5(b) shows how to generate the switch activation signals u1 (t) and



1: n ig vg

Lm

−

iLm

+

vC d1

+

+

−

vC

C

(iLm + niL)d1

L iL

i L d2 +

−

v C d2

C o

−



+

v o Ro

vg (t) =

V g

−

d1 (t) =

D1 + d1 (t)

d2 (t) =

D2 + d2 (t)

1: n −

V g

I Lm

+

V C D1

+

−

+

V C

(I Lm + nI L)D1

I L

I L D2 +

−

+

−

iLm (t) iL (t) vC (t) vo (t)

−

Fig. 4. Schematic circuit diagrams of the buck-boost converter with magnetic coupling between inductors: (a) large-signal averaged model and (b) DC model.

u2 (t) from the control signal u, and a symmetric triangular wave of amplitude V ramp = 1 V. 3

(6)

After these inputs are considered, the averaged inductor currents and capacitor voltages can also be expressed in terms of their corresponding steady-state values plus some superimposed small AC variations.

(b)

   

= = = =

I Lm + iLm (t) I L + iL (t) V C + vC (t) V o + vo (t)

(7)

With the assumption that the AC variations are much smaller than the steady-state values, it is possible to linearize the set of differential equations (1). The small signal state-space vector x is defined as



       x=

iLm

iL

vC vo

T

(8)

Linearizing (1) around the equilibrium point (2) and separating the dynamic AC small-signal terms from the DC steadystate component, the following dynamic model is obtained

2.5

dx = Ax + B1 d1 + B2 d2 (9) dt where A is the state matrix and B1 and B2 are respectively the input vectors corresponding to d1 and d2 .

   

2

) u ( 1.5 M 1

0.5

A=

   −

0 0

0 0

1−D1

n(1−D1 )−D2 C

C

0 0



V o Ro

V C D2



plus some superimposed small AC variations d1 (t) and d2 (t) respectively.

(a)

I g

4

0.2

0.4

0.6

0.8

1

1.2

1.4

u

(a)

B1 =

C o

V g Lm (D1 −1)

B2 =



−

0

−

0

−1 0 − 1

L

0 0

1

0

1.6

D1 −1 Lm D2 +n(−1+D1 ) L

nV g L(D1 −1)

V g L(D1 −1)

−

Ro C o

V g D2 2 CR o (D1 −1)2

V g D2 CR o (D1 −1)

0



T

    T

0

Hence, in the boundary between the two modes of operation, the small-signal control-to-output transfer function with respect to the duty cycle d1 is



 ≡   

Gvod (s) 1

u=1

(b) Fig. 5. (a) DC conversion ratio M (u) of the buck-boost converter.; (b) activation signal generation: comparison of control signals with a triangular signal to obtain the MOSFETs binary activation signals u1 (t) and u2 (t).

To obtain a small-signal model around a steady-state operating point, we assume that the input voltage is constant and the duty cycles d1 (t) and d2 (t) are equal to D1 and D2

where

N 1(s) D(s)

vo (s)

d1 (s)

N 1(s) D(s)

=

u=1

(10)

= V g (Ro nCL m s2 + (Lm n Lm )s + Ro ) = Lm CLR o C o s4 + Lm CLs 3 + (LmRo C o 2Lm nRo C o + LmCR o + LRo C o + Lm n2 Ro C o )s2 + (Lm 2Lm n + Lm n2 + L)s + Ro

−

−

−



In the same way, the small-signal control-to-output transfer function with respect to the duty cycle d2 is

 ≡    vo (s)

Gvod (s) 2

d2 (s)

u=1

where



N 2(s) = V (R CL g

o

ms

2

N 2(s) D(s)

= u=1

+ (Lmn

−L

m )s

(11)

+ Ro ) 1

2

Gvod (s) 1



= Gvod (s) 2

u=1;

n=1

=

u=1;

n=1

V g Ro LRo C o s2 + Ls + Ro

(12)

A similar procedure can be used to determine the small-signal control-to-output transfer functions GiL d (s) and GiL d (s). These transfer functions are also identical between the two modes of operation if n = 1 . 1

GiL d (s) 1



2

n=1

=

Gvo d (s) 1

where

D3(s)

u=1;



=

N 3(s) D3(s)

V g ((Lm CR o LmCR o D1 )s2 +(Ro + RoD1 2 2Ro D1 ))

−

n=1

V g (Ro C o s + 1) LRo C o s2 + Ls + Ro

D2 =1;n=1

=

2

= GiL d (s)

u=1;

N 3(s)



−

(13)

In this section, the buck-boost converter with the damping network included, which is depicted in Fig. 6, will be analyzed. The damping network consists of a series connection of a resistor Rd and a capacitor C d connected in parallel with the converter intermediate capacitor C . With this damping network included, the SSA model in CCM is

diLm (t) dt diL (t) dt dvC (t) dt

vg (t)

=

−v

=

−v

−

=

− d1(t)) − v (t) (t))(1 − d1 (t))

C (t)(1

o

−

− −

= =

(17)

1: 1

ig

− LmD1s

− d1(t))

L iL (t)d2 (t) + (iLm (t) + iL C vC (t) vC d (t) CR d iL (t) vo (t) C o CR o vC (t) vC d (t) C d Rd

− dvC o (t) dt dv C d (t) dt

C (t)(1

Lm vC (t)d2 (t) + vg (t)

(14)

vg

+

−

Lm

iLm

Ds1

Q1

C

+

vC

Rd

L i L

Q2

C o

Ds2

+

vo Ro

+

(15)

−

C d

vCd

−

−

= (D1 1)2 (LmCLRo C o s4 + LmCLs3 +(Lm D1 2 Ro C o + LmCR o + LRo C o 2D1 LRo C o + D1 2 LRo C o )s2 ) + (Lm D1 2 + L 2 2D1 L + D1 2 L)s + (Ro 2Ro D1 + Ro D1(16) ))

−

− −

intermediate capacitor. This damping network can be seen as a low frequency snubber. The modified procedure to calculate the parameter values of the passive damping network will be given in the next section. III. A NALYSIS OF THE COUPLED INDUCTORS B UCK -B OOST C ONVERTER WITH DAMPING NETWORK

If the turns ratio n is equal to 1, the transfer functions Gvod (s) and Gvod (s) are coincident, and



5

−

According to (15), Gvo d has two RHP zeroes. The presence of these RHP zeroes tends to destabilize feedback loops with wide bandwidth making the converter prone to oscillation [15]. The dynamics of the zeroes is the inner behavior of the system when the control is regulating the output without error, e.g., in a high gain closed-loop linear system, the poles are attracted by the zeroes. In a converter with an ideal regulation of the output voltage, the inner dynamics is usually associated to the input filter. Thanks to the magnetic coupling, the dynamics of the zeroes of our converter in boost mode is of second order, associated to the variables iLm and vc . Note that the zeroes in (15) depend on the parameters Lm and C . Therefore, damping the dynamics of iLm and/or vc by adding a passive network could transfer the RHP zeroes to the left half-plane (LHP). Following a similar procedure to the one reported in [18]- [19], a passive network has been connected to the

Fig. 6. Coupled inductor buck-boost converter with RC type damping network and turns ratio 1:1 (n = 1 ).

As it can be expected from (2), with n = 1 and the steady-state behavior of V Cd , the converter operating point for constant duty cycles d1 (t) = D1 , d2 (t) = D2 , and input voltage vg (t) = V g is

1

I Lm

=

I L

=

V C = V Cd

=

V o

=

−

V g D2 (D2 + D1 1) Ro (1 D1 )2 V g D2 Ro (1 D1 ) V g 1 D1 V g 1 D1 V g D2 1 D1

−

−

− − −

(18)

Linearizing the set of equations (17) around the operating point (18), we obtain the small-signal SSA model (19)

dx = Ax + B1 d1 + B2 d2 dt

   

(19)



6

where the small signal state vector x, the state matrix A and the input vectors B1 and B2 of the system are now given by

         x=

A=

   −

iLm

iL

0 0

0 0

1−D1

1−D2 −D1

C

B1 =

vC vC d

D1 −1 Lm D2 +D1 −1 L

−

C

0 0

0



0

−

L

1

1

V g L(D1 −1)

V g L(D1 −1)

−1

Rd C

−

0

−

0

1

Rd C d

1

B2 =

0 0

Rd C

C o

V g Lm (D1 −1)

vo

−

C d = 8C,

T

0 0

1

Rd C d

0

V g D2 2 CRo (D1 −1)2

V g D2 CR o (D1 −1)

0 0

−

1 Ro C o

   

T

0 0



T

The transfer functions Gvod (s) and Gvod (s) have now a third order numerator and a fifth order denominator with two dominant complex poles. In the border between buck and boost operation modes, where u = 1, there is a triple zeropole cancellation and the two transfer function correspond to expression (12). Since this control-to-output transfer function is identical to that of a second order buck converter, it is possible to design its control loop compensator in the same well-known way if the internal dynamics corresponding to the cancelled poles is sufficiently damped. The poles of the internal dynamics are the roots of the cancelled polynomials in 1

Gvod (s) 1



= Gvod (s) 2

u=1

where



=

u=1

2

p(s)(vg Ro ) p(s)(LRo C o s2 + Ls + Ro ) (20)

Rd

≈ 0.65



Lm C

(25)

In the previous section it was concluded that the small-signal control-to-output transfer functions Gvod (s) and Gvod (s) have the same expression at u = 1 . Moreover, this expression corresponds to the small-signal control-to-output transfer function of a buck converter. To test the validity range of the smallsignal model, a PSIM frequency response simulation has been carried out using the switched model schematic circuit diagram shown in Fig. 7 and compared with the MATLAB calculated frequency response corresponding to the SSA model (12). In both cases, the parameters, whose selection will be explained in the next section, are: Lm = 14 µH, C = 2.6 µF, Rd = 1.5 Ω, C d = 22 µF, L = 30 µH, C o = 110 µF, Ro = 9.6 Ω. Three different input voltages V g = 39 V (step-up, u > 1), V g = 48 V (border, u = 1), and V g = 55 V (step-down, u < 1) have been considered. The duty cycles have been chosen to have a steady state output voltage V o = 48 V. The waveforms depicted in Fig. 3 were obtained for the previous list of component values. 1

2

The Bode plots of both frequency responses obtained from PSIM (switched) and MATLAB (small-signal) are superimposed for the three different values of the input voltage and are depicted in Fig. 8. In this figure, the maximum frequency plotted corresponds to 50 kHz, which is half of the switching frequency. The frequency responses are very similar in shape to a second order system with two complex poles and no zeroes. We conclude that our buck-boost converter can be modelled and controlled as a buck converter for the input voltage range considered in the example.

p(s) = Lm Rd CC d s3 + (Lm C d + Lm C )s2 + Rd C d s + 1 (21) Equating the coefficients of (21) to a third degree polynomial in the following factorized form

p(s) = (ατ s + 1)(τ 2 s2 + 2ζτ s + 1)

(22)

yields the expression of the damping network capacitor (see Appendix)

C d

=

2ζC (1 + 2αζ + α2 ) α

(23)

Since it is desired to minimize the size of the capacitor C d , a value of α = 1 is selected. With this choice, the expression of the damping resistance Rd is given by

√



(1 + 2ζ ) 1 + 2ζ Rd = 4ζ (ζ + 1)

Lm C

(24)

Finally, ζ = 1 is selected as a trade-off between the size of the capacitor and a sufficient and robust damping of the internal dynamics. The resulting expressions of the damping network parameters are

Fig. 7. Circuit diagram corresponding to the PSIM simulation used to calculate the frequency response of the control-to-output transfer function.



80

7

where f c is the crossover frequency of the voltage loop.

v =39 V g

v =48 V

TABLE I

g

60

v =55 V

P EAK

g

] B 40 d [ e d u 20 t i n g a 0 M

g

AN D

vC

IN

v =48 V g

Ripple

v =55 V g

i i v

Lpp gpp

Cpp

4

5

10

10

Frequency [Hz] 0 vg=39 V v =48 V g

−50

v =55 V g

vg=39 V

] g e−100 d [

v =48 V g

v =55 V g

e s a h−150 P

Buck mode (V g − V o )V o T

V g L V o )V o T

(V g

−

(V g

−

Boost mode V g (V o − V g )T

V g (V o

V g L V o )V o2 T

4

5

10

Frequency [Hz] Fig. 8. Frequency response of the small-signal control-to-output transfer function. The black lines correspond to the simulation of the switched model using PSIM (Fig. 7) while the white lines correspond to MATLAB simulation of the linear small signal model (12).

IV. C IRCUIT DESIGN A. Buck-boost converter power stage

V o L V g )T (L + Lm )

V o LLm

(V o − V g )T

V g2 Ro C

Ro C

TABLE II C OMPONENTS OF BUCK - BOOST

10

−

After performing a worst case analysis in both buck and boost modes to get the specifications at the nominal power, the finally selected components of the buck-boost converter power stage are the ones listed in Table II. To achieve a good efficiency, N-channel MOSFETs with low on-resistance and fast Schottky diodes have been selected. Kool M µ core inductors have been chosen by their low-cost and availability. Capacitors that must absorb high pulsed current are ceramic. The ESR (Equivalent Series Resistance) of C d is much smaller than Rd . All components are rated up to 100 V.

−200

−250 3 10

iL , ig

CCM

v =39 V

−20

−40 3 10

TO PEAK RIPPLE OF THE CONVERTER VARIABLES

Component Q1 , Q2 Ds1 , Ds2

Lm

Description Power MOSFET Schottky Rectifier Coupled inductors

C

Ceramic Capacitor

C o

MKT Capacitor

L

Inductor

Rd

Damping Resistor

CONVERTER

Type IRFB4110PbF 40CPQ080GPbF Core: 77083A7 Magnetics Wire size: 15 AWGb Number of turns: 13:13 a 3 × 2.2 µF X7R dielectric 5 × 22 µF Core: 77083A7 Magnetics Wire size: 15 AWGb Number of turns: 20 1.5 Ω, 4 W 22 µF

C d MKT Capacitor The buck-boost converter is designed as a battery discharge a The capacitance depends on the operating voltage. For regulator (BDR) of 13 in-series Lithium-ion battery cells, so V c = 48 V the equivalent capacitance is 2.6 µF. that an input voltage V g range of 39 V to 55 V is considered. b Multifilar equivalent. The output voltage V o regulates a DC bus of 48 V. The maximum power output is 480 W corresponding to a load resistance Ro = 9.6 Ω and the switching frequency is B. Buck-boost control circuit 100 kHz. The parameter values of the buck-boost converter of Once the model (12) has been verified in the previous Fig. 6 have been selected according to specifications of input section, the next step is to design the control loop compensator. and output peak to peak current ripples of igpp = 12 A A compensation network for the buck converter-like transfer iLpp = 4 A; maximum output impedance of function plotted in Fig. 8 has been designed following classical and Z omax = 150 mΩ; maximum power dissipation in the rules [27]. The third order compensator transfer function is damping resistor P Rd = 4 W, and also expression (25). The u (τ 3 s + 1)(τ 4 s + 1) expressions used to calculate the ripples of iL , ig and vc are (28) Gc = = K listed in Table I. If a triangular shaped vc ripple is assumed, vo s(τ 1 s + 1)(τ 2 s + 1) the power loss in Rd is where the compensator parameters has been selected as follow: τ 1 = 1 µs, τ 2 = 2 µs, τ 3 = τ 4 = 1/(2π) ms, and vCpp P Rd = (26) K = 210 s/V. 12Rd The circuit diagram of the compensator and the PWM The maximum output impedance in closed loop can be calcuimplemented in PSIM is presented in Fig. 9(a), where an lated approximately as estimation of the switching delays has been included. The existence of delays impedes having extreme duty cycles and 1 (27) Z omax = causes a nonlinearity in the transitions between boost and 2πf c C o







 



buck modes [28]. To mitigate these problems, a third mode of operation is permitted in an adjustable small vicinity zone between buck and boost modes [7], [28]. The new operation mode is called buck-boost mode because the previous two modes overlap in interleaving-like manner, i.e., both MOSFETs can switch in the same period but their switching instants are almost π rad out of phase. The overlapping adjustment is achieved by reducing the displacement between the signals that generate u1 and u2 when compared with the triangular signals. The circuit schematic diagram of the buck-boost control experimental stage is shown in Fig. 9(b). The main component of the control system is the dual PWM controller integrated circuit TL1451A that generates the switch activation signals u1 (t) and u2 (t). This single monolithic chip has two error amplifiers, an adjustable oscillator, a reference voltage of 2.5 V, and dual common-emitter output transistor circuits. The triangular signal oscillator has been adjusted to have a frequency of 100 kHz, an amplitude of 0.7 V and a DC offset of 1.4 V. One of the error amplifiers is used to implement the compensator (28) to obtain the signal u, and the other one is used to get the signal (u 0.7 + overlapping adjustment) in the manner presented in Fig. 9(c). This figure shows an example of the driving signals u1 and u2 generation.

−

(a)

8

C. Buck-boost driver with modified bootstrap

An IR2110 integrated driver has to switch the low side NChannel MOSFET in the boost stage Q1 , and the high side N-Channel MOSFET of the buck stage Q2 . A bootstrap circuit is needed to supply the floating voltage to drive Q2 . In buck operation, Q1 should be always OFF while Q2 switches. In buck-boost mode both Q1 and Q2 are switched in the same period. In these two previous modes a classical bootstrap circuit would operate correctly. The most critical operation of the driver occurs in pure boost mode because the bootstrap capacitor C B must be sufficiently charged to keep Q2 ON for as long as needed. In these circumstances, the capacitor of conventional bootstrap circuits could be insufficiently charged. To avoid the malfunction of the converter in boost mode, it is then necessary to refresh the capacitor charge. A solution of this problem is presented in [29], where a charge pump topology with an external clock signal is used. A similar charge pump driver that refreshes the bootstrap capacitor with the use of the boost control pulses is shown in Fig. 10. Since the source of Q2 is always at a level higher than 15 V, the usual bootstrap path through diode DA will be cut OFF, and an additional bootstrap circuit made of C Baux , DB , DC , T C , T D , and a couple of resistors, has been added to recharge C B . The boost pulses turn on the auxiliary Darlington transistor T D , permitting that C Baux charges to 15 V through DA , DC and T D . The direct polarization of DC keeps T C OFF. When T D turns OFF, T C starts conducting providing through DB a current path to recharge C B from C Baux . Fig. 9(b) shows a variable resistor that permits the empirical overlapping adjustment that guarantees a proper charging of the bootstrap capacitor by switching the high side MOSFET when the boost driving pulses are narrower than 2%. A couple of cascaded linear regulators provide the supply voltages ( 15 V and 5 V) of the driver and control circuit from the input voltage.

(b)

Fig. 10. Scheme of the buck-boost driver with a modified bootstrap circuit and auxiliary supplies.

V. E XPERIMENTAL RESULTS (c) Fig. 9. Schematic of: (a) the compensator Gc and the dual PWM simulated in PSIM, (b) buck-boost control circuit diagram, (c) an example of driving signals generation.

Fig. 11 shows pictures of the power stage and the control circuit of the buck-boost regulator prototype. The experimental response of the buck-boost regulator to a low-frequency triangular input voltage going from 36.8 V to 55.8 V is depicted in Fig.12 where the waveform of the output voltage could be compared with its corresponding simulation. In addition to the



9

97.5 97 v = 39 V g

96.5

v = 43 V g

] % 96 [

v = 47 V g

v = 48 V

η

g

v = 51 V g

95.5

v = 55 V g

95 94.5 2

(a)

4

i

(b)

6 R

8

[A]

10

o

Fig. 11. Regulator prototype (a) buck-boost power stage, (b) dual PWM control stage.

(a) 97.5 97

i =2A R

input and output voltages, the simulated logic signals u1 and u2 , ranging from 0 V to 1 V, are also depicted on the left. The oscillogram on the right shows the equivalent signals that correspond to the outputs of the dual PWM controller that are in the 0 V to 5 V range. The input voltage range ensures that in both simulation and experimental measurements the converter works in its three operation modes. The output voltage is well regulated and exhibits a smooth behavior in all the transitions between modes. These good results are due to the use of the same controller in all the operation modes. The sampling capabilities of the digital oscilloscope have permitted to capture the switching noise in the output voltage waveform. There is less switching noise in boost mode because it is attenuated at the output by a third order filter while the buck stage has only a second order filter between its switches and the output.

o

i =4A

96.5

R

o

] % [ 96

i =5A R

o

i =6A

η

R

o

i =8A

95.5

R

o

i = 10 A R

o

95 94.5

40

45

v [V]

50

55

g

(b) Fig. 14. Energy conversion efficiency for V o = 48 V as: (a) a function of the output current iRo for different input voltage vg levels, (b) a function of the input voltage vg for different output current iRo levels.

efficiencies as a function of the output current iRo for different input voltage vg levels are shown in Fig. 14(a), whereas in Fig. 14(b), the horizontal axis is the input voltage and the output current is the parameter of the set of curves. Since some switching losses penalty is paid in buck-boost mode, for a given current the maximum efficiencies are attained in boost and buck modes when the input voltage is close to the desired output level. The maximum efficiency obtained of about 97% would be improved if the diodes could be substituted by synchronous rectifier MOSFETs [12], [13]. Other techniques like multiphase and ZVS [12] or dynamic adjustment of the switching frequency [13] are also possible. TABLE III C ROSSOVER

FREQUENCY

(CF)

AND PHASE MARGIN

(PM)

FOR DIFFERENT

INPUT VOLTAGES

Simulated Fig. 13. Experimental configuration of the measurement of efficiency: (a) buck-boost converter, (b) buck-boost control, (c) DC power supply, (d) Power analyzer, (e) oscilloscope, (f) DC electronic load.

Figure 13 shows the experimental setup for measuring the efficiency of the hard-switching buck-boost converter. The efficiency measurements take into account the consumption of the drivers and control stages. A Voltech PM6000 Power Analyzer with calibrated precision shunt resistors is used to measure the input and output currents. The energy conversion

Experimental

Vg

CF

PM

CF

PM

[V]

[kHz]

[deg]

[kHz]

[deg]

39

13

54

11

51

48

18

62

18

61

55

17

65

16

65

PSIM-simulated and experimental Bode plots of the regulator loop gain are illustrated in Fig. 15. In the simulations, an estimation of delays and loses have been taken into account. The frequency measurements have been obtained using



] 60 V [ 40 g V 20

100

150

200

250

300

250

300

250

300

250

300

10

Time [ms]

] 48.5 V [ 48 o

V 47.5

100

150

] V [

1.5 1 0.5 2 0 u −0.5

100

150

200

Time [ms]

] V [

1.5 1 0.5 1 0 u −0.5

200

Time [ms]

100

150

200

Time [ms] (a) (b) Fig. 12. Waveforms of input voltage V g , output voltage V o , boost pulses u1 and buck pulses u2 for changes in the input voltage. (a) PSIM simulation (b) Waveforms measured. CH1: V g (10 V/div), CH2: V o (1 V/div, AC coupling), CH3: u1 (5 V/div), CH4: u2 (5 V/div), timebase: 20 ms/div.

a frequency response analyzer (FRA) Venable 3120. This frequency response has the three above mentioned different modes of operation that are achieved by varying the value of the input voltage vg . Some of the differences that can be observed between simulated and experimental results for vg = 48 V are attributed to the nonlinearities in the transitions between modes mentioned previously. Other differences are mainly due to nonlinearities in some passive components of the experimental prototype. For instance, the capacitance of the intermediate capacitor exhibits a strong dependency on the applied voltage as has already been noted in Table II. Also, the parameters of the magnetic components vary with the mean average current flowing through them. The crossover frequency (CF) and phase margin (PM) are calculated and listed in Table III for each input voltage value. In spite of the differences observed between the simulated and the experimental frequency responses, the table shows remarkably similar results in all cases. Like in a buck regulator, a wide bandwidth is achieved since the crossover frequency is between one tenth and one fifth of the switching frequency. Furthermore, the phase margins indicate that the feedback system is stable for the desired input voltage range. Figs. 16, 17, and 18 show simulated and experimental transient responses to load changes for different constant input voltages corresponding to boost, near buck-boost and buck modes respectively. For each input voltage, the load current has been changed from 10 A to 5 A in the top subplots (a) and (b) and back form 5 A to 10 A in the bottom subplots (c) and (d). In all cases, the output voltage is well regulated and the transient deviations are within the desired boundaries. In addition to output voltage and current, the input current and the intermediate capacitor voltage are also depicted. The transient dynamics of these variables is damped as expected, with a reasonable agreement between simulated and measured variables. The main discrepancy appears near the buck-boost mode as it is illustrated in Figs. 17(a) and 17(b). Extreme duty cycles, close to zero or to one, are required to obtain a smooth transition between operation modes, but they are

not possible to achieve in practice due to the unavoidable switching delays. For this reason, when the input and output voltages are close, switching pulses can be skipped and the resulting ripple contains components at frequencies below of the converter switching frequency [28].The skipped pulses also appear in transients like the one depicted in Fig. 18(d) where a couple of buck pulses are missed and an intermediate unexpected boost pulse appears. In our prototype, this noise is attenuated by the output LC filter or rejected by the control loop and has little effect on the output voltage. VI. C ONCLUSION A new non-inverting buck-boost DC-DC switching converter has been obtained by magnetically coupling the input and output inductors of a cascade connection of a boost and a buck stages. The combination of a coupling and a damping network at the intermediate capacitor provides a minimum-phase control-to-output transfer function with two dominant complex poles. Simulation and experimental results of a prototype verify the predicted wide control bandwidth due to the absence of RHP zeroes. A high efficiency is obtained by operating the converter switches in three regions depending on the input-output voltage ratio: boost, buck and buck-boost. In the buck-boost region both MOSFET are allowed to switch in the same period but this overlapping is permitted only for a narrow range of nearly equal input and output voltages to improve the efficiency. The converter operates usually in the other more efficient modes in which there is only one periodically switching MOSFET. In buck mode, the MOSFET of the boost stage is always OFF, whereas in boost mode, the buck stage MOSFET is continuously ON, which has required a specially built bootstrap driver for the buck stage high-side N channel MOSFET. For a given specification of output impedance and voltage ripple, we believe that the proposed converter could offer a solution with larger magnetic components but smaller capacitors than other state-of-the-art topologies. Since both input and output currents are of non pulsating nature there



20

11

20 v =39 V

v =39 V

g

15

v =48 V g

v =55 V g

10

] B d [ 5 e d u 0 t i n g −5 a M

g

15

g

v =55 V g

10

] B d [ 5 e d u 0 t i n g −5 a M

−10

−10

−15

−15

−20

v =48 V

−20

4

4

10

10

Frequency [Hz]

Frequency [Hz]

(a)

(b)

−100

−100

−110

−110

−120

−120

] g−130 e d [ e−140 s a h−150 P

] g−130 e d [ e−140 s a h−150 P

−160

−160

v =39 V g

−170

v =39 V g

v =48 V

−170

g

v =55 V

v =48 V g

v =55 V

g

g

−180 10

−180

4

10

Frequency [Hz]

4

Frequency [Hz]

(c)

(d)

Fig. 15. Loop gain Bode plots of the buck-boost converter: boost mode for vg = 39 V, buck-boost mode for vg = 48 V and buck mode for vg = 55 V. a) Simulated magnitude, b) Experimental magnitude, c) Simulated phase, d) Experimental phase.

are two or more possible current control strategies. For that reason, controlling the converter in current mode is a work in progress. The capability of cycle-by-cycle limiting the input and/or output converter currents offers interesting possibilities to many applications like battery, supercapacitor, PV panel or fuel cell energy management. Future works contemplate also a bidirectional implementation of the switches that could provide even higher conversion efficiencies. Another open problem is the converter operation at light loads where several discontinuous conduction modes can appear.

DAMPING NETWORK PARAMETER CALCUL ATION Equating (21) and (22) gives the following set of equations

ατ 3 = Rd C d Lm C

(A.1)

τ 2 (2αζ + 1) = Lm (C d + C )

(A.2)

Dividing (A.1) by (A.3) and isolating τ 2 yields

Lm C (α + 2ζ ) α

(A.3)

(A.4)

Substituting (A.4) in (A.2) and isolating C d gives (23). From (A.3) and (A.4), it is straightforward that

Rd =

τ (α + 2ζ ) C d

(A.5)

Since the derivative of (23) with respect to α is

dC d 2ζC (α2 = dα α2

A PPENDIX

τ (α + 2ζ ) = Rd C d

τ 2 =

− 1)

(A.6)

C d has a minimum for α = 1 . Expression (A.5), particularized for α = 1 , yields (24). ACKNOWLEDGMENT The authors would like to thank Jos e´ Maria Bosque for his aid in the construction of the prototype, and Luis Mart ´ınezSalamero and the anonymous reviewers for their valuable comments.



12

20 ] 15 A [ t n e 10 r r u C

5 0 3.98

] V [

c

v

4

4.02

4.04

4.06 4.08 4.1 Time [ms]

4.12

4.14

4.16

60

48.5

50

48

40

4

4.05

4.1 Time [ms]

4.15

4.2

] V [

o

v

47.5

(a)

(b)

25 20

] A [ t 15 n e r r 10 u C

5 0 7.95

] V [

c

v

8

8.05

8.1 8.15 Time [ms]

8.2

8.25

8.3

60

48.5

50

48

40 7.95

8

8.05

8.1 8.15 Time [ms]

8.2

8.25

] V [

o

v

47.5 8.3

(c) (d) Fig. 16. PSIM simulations (a), (c) and experimental measurements (b), (d) of the converter main variables when the load current changes from 10 A to 5 A and back to 10 A while the input voltage is V g = 39 V. Black traces shows the simulated output current iRo and output voltage vo while the input current ig and the intermediate capacitor voltage vc are in white. CH1: vc (5 V/div), CH2: vo (500 mV/div, AC coupling), CH3: ig (5 A/div) and CH4: iRo (5 A/div).

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13

12 10

] A [ t n e r r u C

8 6 4 2 3.98

] V [

4

4.02

4.04

4.06 4.08 4.1 Time [ms]

4.12

4.14

4.16

55

48.5

50

48

45

47.5

c

v

] V [

o

40

4

4.05

4.1 Time [ms]

4.15

4.2

v

47

(a)

(b)

20 ] 15 A [ t n 10 e r r u C

5

0 7.95

] V [

c

v

[19]

[20]

[21]

[22]

[23]

[24]

[25]

[26]

8.05

8.1 8.15 Time [ms]

8.2

8.25

8.3

60

48.5

50

48

40 7.95

Fig. 17.

8

8

8.05

8.1 8.15 Time [ms]

8.2

8.25

] V [

o

v

47.5 8.3

(c) (d) Simulated (a), (c) and measured (b), (d) converter main variables for the same load changes of Fig. 16 and V g = 4 6 V.

converters,” IEEE Power Electron Lett. , vol. 2, no. 2, pp. 58–62, Jun. 2004. J. Calvente, L. Martinez-Salamero, P. Garces, and A. Romero, “Zero dynamics-based design of damping networks for switching converters,” IEEE Trans. Aerosp. Electron. Syst. , vol. 39, no. 4, pp. 1292–1303, Oct. 2003. R. Erickson, “Optimal single resistors damping of input filters,” in Proc. 14th IEEE Appl. Power Electron. Conf. Expo., APEC , vol. 2, Mar. 1999, pp. 1073–1079. E. Sanchis-Kilders, A. Ferreres, E. Maset, J. Ejea, V. Esteve, J. Jordan, A. Garrigos, and J. Calvente, “Soft switching bidirectional converter for battery discharging-charging,” in Proc. 21st IEEE Appl. Power Electron. Conf. Expo., APEC , Mar. 2006, pp. 603–609. E. Sanchis-Kilders, A. Ferreres, E. Maset, J. Ejea, V. Esteve, J. Jordan, J. Calvente, and A. Garrigos, “Bidirectional high-power high-efficiency non-isolated step-up dc-dc converter,” in Proc. 37th IEEE Annu. Power Electron. Specialists Conf., PESC , Jun. 2006, pp. 1–7. E. Sanchis, E. Maset, A. Ferreres, J. B. Ejea, J. Calvente, A. Garrigos, V. Esteve, J. Jordan, and B. J. M., “Bidirectional high-efficiency nonisolated step-up battery regulator,” IEEE Trans. Aerosp. Electron. Syst. , To be published. J. Calvente, L. Martinez-Salamero, P. Garces, R. Leyva, and A. Capel, “Dynamic optimization of bidirectional topologies for battery charge/discharge in satellites,” in Proc. 32nd IEEE Annu. Power Electron. Specialists Conf., PESC , vol. 4, 2001, pp. 1994–1999. ´ R. Middlebrook and S. Cuk, “A general unified approach to modeling switching-converter power stages,” in Rec. IEEE Power Electron. Specialists Conf. , Jun. 1976, pp. 18–34. E. Van Dijk, J. Spruijt, D. O’Sullivan, and J. Klaassens, “Pwm-switch modeling of dc-dc converters,” IEEE Trans. Power Electron., vol. 10, no. 6, pp. 659 – 665, Nov. 1995.

[27] T. Instruments, “Designing with the TL5001 PWM controller,” Texas Instruments, Aplication Report SLVA034A, 1995. [28] R. Paul and D. Maksimovic, “Analysis of PWM nonlinearity in noninverting buck-boost power converters,” in Proc. 39th IEEE Annu. Power Electron. Specialists Conf., PESC , Jun. 2008, pp. 3741–3747. [29] S. Park and T. Jahns, “A self-boost charge pump topology for a gate drive high-side power supply,” in Proc. 19th IEEE Appl. Power Electron. Conf. Expo., APEC , vol. 1, Feb. 2003, pp. 126–131.

Carlos Restrepo (S’10) graduated, with honors, as Ingeniero Electricista and Master en Ingenier´ıa Eléctrica in 2006 and in 2007, respectively, from the Universidad Tecnológica de Pereira, Colombia. He obtained the Master en Ingenier´ıa Electrónica from the Universitat Rovira i Virgili de Tarragona, Tarragona, Spain, in 2008. He is currently working toward the Ph.D. degree in the Departamento d’Enginyeria Electrònica, Elèctrica i Automàtica, Escola Tècnica Superior d’Enginyeria, Universitat Rovira i Virgili de Tarragona. His main research interests includes fuel cell modelling and power converters design.



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10 ] A [ t n e r r u C

8 6 4 2 3.98

] V [

c

v

4

4.02

4.04

4.06 4.08 4.1 Time [ms]

4.12

4.14

4.16

60

48.5

55

48

50

4

4.05

4.1 Time [ms]

4.15

4.2

] V [

o

v

47.5

(a)

(b)

10 ] A [ t n e r r u C

8 6 4 2 7.95

] V [

c

v

8.05

8.1 8.15 Time [ms]

8.2

8.25

8.3

60

48.5

55

48

50 7.95

Fig. 18.

8

8

8.05

8.1 8.15 Time [ms]

8.2

8.25

] V [

o

v

47.5 8.3

(c) (d) Simulated (a), (c) and measured (b), (d) converter main variables for the same load changes of Fig. 16 and V g = 5 5 V.

Javier Calvente (S’94-M’03) received the Ingeniero de Telecomunicación degree and the Ph.D. degree from the Universitat Politècnica de Catalunya (UPC), Barcelona, Spain, in 1994 and 2001, respectively. He was a visiting scholar with Alcatel Space Industries, Toulouse, France, in 1998. He is currently an Associate Professor with the Departamento dEnginyeria Electro` nica, Elèctrica i Automàtica, Universitat Rovira i Virgili (URV), Tarragona, Spain, where he is working in the fields of power electronics and control systems.

Angel Cid-Pastor (S’99-M’07) He graduated as Ingeniero en Electrónica Industrial in 1999 and as Ingeniero en Automá tica y Electr´ onica Industrial in 2002 at Universitat Rovira i Virgili, Tarragona, Spain. He received the M.S. degree in design of microelectronics and microsystems circuits in 2003 from Institut National des Sciences Appliquèes, Toulouse, France. He received the Ph.D. degree from Universitat Polit e` cnica de Catalunya, Barcelona, Spain, and from Institut National des Sciences Appliquèes, LAAS-CNRS Toulouse, France in 2005 and 2006, respectively. He is currently an associated professor at the Departament dEnginyeria Electro` nica, Elèctrica i Automàtica, Escola Tècnica Superior dEnginyeria, Universitat Rovira i Virgili, Tarragona, Spain. His research interests are in the field of power electronics and renewable energy systems.

Abdelali El Aroudi (M’00) was born in Tangier (Morocco), in 1973. He obtained the graduate degree in physical science from Facult des sciences, Université Abdelmalek Essadi, Tetouan, Morocco, in 1995, and the Ph.D degree (with honors) from Universitat Politècnica de Catalunya, Barcelona, Spain in 2000. During the period 1999-2001 he was a visiting Professor at the Department of Electronics, Electrical Engineering and Automatic Control, Technical School of Universitat Rovira i Virgili (URV), Tarragona, Spain, where he became an associate professor in 2001 and a full-time tenure Associate Professor in 2005. During the period September 07-January 08 he was holding a visiting scholarship at the Department of Mathematics and Statistics, Universidad Nacional de Colombia, Manizales, conducting research on modeling of power Electronics circuits for energy management. From February 2008 to July 2008, he was a visiting scholar at the Centre de Recherche en Sciences et Technologies de Communications et de l’Informations (CReSTIC), Reims, France. He has participated in different Spanish domestic and cooperative international research projects. His research interests are in the field of structure and control of power conditioning systems for autonomous systems, power factor correction, stability problems, nonlinear phenomena, chaotic dynamics, bifurcations and control. He is a reviewer for IEEE Transaction on Circuits and Systems part. I- Regular papers and II Express Briefs, IEEE Transactions on Power Electronics, IEEE Transactions on Industrial Electronics, International Journal of Control, International Journal of Power Electronics, IET Electric Power Applications, International Journal of Systems Science, Circuits, Systems and Signal Processing , International Journal of Sound and Vibration and Nonlinear Dynamics . He has published more than 150 papers in scientific journals and conference proceedings. He is a member of the GAEI research group (Universitat Rovira i Virgili) on Industrial Electronics



15

and Automatic Control whose main research fields are power conditioning for vehicles, satellites and renewable energy. He has given invited talks in several universities in Europe, South America and Africa.

Roberto Giral (S’94-M’02-SM’10) received the B.S. degree in ingeniera técnica de telecomunicación, the M.S. degree in ingeniera de telecomunicaci´ on, and the Ph.D. (with honors) degree from the Universitat Politècnica de Catalunya, Barcelona, Spain, in 1991, 1994, and 1999, respectively. He is currently an Associate Professor with the Departament dEnginyeria Electro` nica, Elèctrica i Automàtica, Escola Tècnica Superior dEnginyeria, Universitat Rovira i Virgili, Tarragona, Spain, where he is working in the field of power electronics.


A Non-Inverting Buck-Boost DC-DC Switching

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