ZTE - ZXG10 IBSC Base Station Controller Hardware Manual

ZXG10 iBSC Base Sta tati tion on Contro Cont rolllle er

Hardware Manual

Version 6.20

ZTE CORPORATION ZTE Plaza, Keji Road South, Hi-Tech Industrial Park, Nanshan District, Shenzhen, P. R. China 518057 Tel: (86) 755 26771900 800-9830-9830 Fax: (86) 755 26772236 URL: http://support.zte.com.cn E-mail: [email protected]

LEGAL INFORMATION Copyright © 2006 ZTE CORPORATION. The contents of this document are protected by copyright laws and international treaties. Any reproduction or distribution of this document or any portion of this document, in any form by any means, without the prior written consent of ZTE CORPORATION is prohibited. Additionally, the contents of this document are protected by contractual confidentiality obligations. All company, brand and product names are trade or service marks, or registered trade or service marks, of ZTE CORPORATION or of their respective owners. This document is provided “as is”, and all express, implied, or statutory warranties, representations or conditions are disclaimed, including without limitation any implied warranty of merchantability, fitness for a particular purpose, title or non-infringement. ZTE CORPORATION and its licensors shall not be liable for damages resulting from the use of or reliance on the information contained herein. ZTE CORPORATION or its licensors may have current or pending intellectual property rights or applications covering the subject matter of this document. Except as expressly provided in any written license between ZTE CORPORATION and its licensee, the user of this document shall not acquire any license to the subject matter herein. ZTE CORPORATION reserves the right to upgrade or make technical change to this product without further notice. Users may visit ZTE technical support website http://ensupport.zte.com.cn to inquire related information. The ultimate right to interpret this product resides in ZTE CORPORATION.

Revision History Date

Revision No.

Serial No.

Reason for Issue

Aug. 30, 2008

R1.0

sjzl20083205

First edition

ZTE CORPORATION Values Your Comments & Suggestions! Your opinion is of great value and will help us improve the quality of our product documentation and offer better services to our customers. Please fax to: (86) 755-26772236; or mail to Technical Delivery Department, ZTE University, Dameisha, Yantian District, Shenzhen, Guangdong, P.R. China 518083. Thank you for your cooperation! Document Name

ZXG10 iBSC (V6.20) Base Station Controller Hardware Manual

Product Version

V6.20

Document Revision Number

Serial No.

sjzl20083205

Equipment Installation Date

R1.0

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Contents About this Manual ............................... ............................................................. .............................. i Purpose................................................................................ Purpose ................................................................................ i Intended Audience ................................................................. i Prerequisite Skill and Knowledge........ Knowledge.............................................. ...................................... i What is in This Manual............................................................i Related Documentation.......................................................... ii Conventions........................................................................ iii How to Get in Touch............................................................. iv

Declaration of RoHS Compliance ................................. ..................................... .... v Chapter 1....................................................... 1.......................................................................... ................... 1 Cabinet ............................ ......................................................... ................................................. .................... 1 Cabinet Structure.................................................................. 1 Cabinet Composition ........................................................... 10 External Connection ............................................................ 11 Cabinet Cabling .................................................................. 14

Chapter 2....................................................... 2........................................................................ ................. 17 Plug-in Boxes ............................ ........................................................... ..................................... ...... 17 Power Distribution Plug-in Box .............................................. 17 Fan Plug-in box .................................................................. 20 Dust-Proof Plug-in Box (Air Filter) ......................................... 22

Chapter 3....................................................... 3........................................................................ ................. 23 Shelves .............................. ............................................................ ............................................. ............... 23 Overview ...................... .............................................. ............................................... .......................23 23 Shelf Functions................................................................... 23 Shelf Positions.................................................................... 24 Backplane.......................................................................... 25

Shelf Configurations (Using BUSN) ...................... .................................. ............ 26 Control Shelf (BCTC) ........................................................... 26

Packet Switching Shelf (BPSN) ..............................................31 Resource Shelf (BUSN).........................................................34

Shelf Configurations (Using BGSN) .................................. 38 Control Shelf (BCTC)............................................................38 Packet Switching Shelf (BPSN) ..............................................44 Gigabit Resource Shelf (BGSN)..............................................48

Inter-Shelf Connections ................................................. 52 Internal Connections (Using BUSN)........................................ 53 Internal Connections (Using BGSN)........................................59

Chapter 4........................................................................ 67 Boards ............................................................................67 Overview ........................................................................... 67 Control Plane HUB (CHUB)....................................................68 BSC IP Interface Board (BIPI) ...............................................73 GSM Universal Processing Board (GUP)................................... 78 GSM Universal Processing Board (GUP2).................................82 Clock Generator Board CLKG (CLKG)......................................87 Clock Generator Board CLKG (ICM)........................................95 Integrated Clock Module (ICM) ............................................ 100 Control Main Processing Board (CMP) ................................... 109 Digital Trunk Board (DTB) .................................................. 113 Gigabit Line Interface Board (GLI) ....................................... 120 E1 IP Interface Board (EIPI) ............................................... 124 GE IP Interface Board (GIPI)............................................... 127 Gigabit Universal Interface Module (GUIM)............................ 131 Operation and Maintenance Processing Board (OMP) .............. 137 Packet Switching Network (PSN) Board................................. 141 Power Distribution Board (PWRD) ........................................ 143 Server Board (SBCX) ......................................................... 146 SONET Digital Trunk Board (SDTB) ...................................... 151 SONET Digital Trunk Board (SDTB2) .................................... 155 Signaling Processing Board (SPB) ........................................ 159 Signaling Processing Board (SPB2)....................................... 165 Universal Interface Module for Control Plane (UIMC)............... 169 Universal Interface Module for User Plane (UIMU) .................. 174 User Plane Processing Board (UPPB)..................................... 180

Chapter 5......................................................................185

Other Hardware Equipments.......................................185 Alarm Box........................................................................ 185

GPS-Related Equipments.............................................. 192 GPS Active Antenna and Lightning Protector/Frequency Divider 192 GPS L1 Signal Transponder and GPS Antenna Feeder Lightning Protector ......................................................................... 195

Chapter 6...................................................................... 199 System Configuration Specifications...........................199 Configurations when BUSN Is Used................................ 199 Abis Interface and A-Interface Adopting E1........................... 199 Abis Interface Adopting IP+E1 and A-Interface Adopting E1 .... 200 Abis Interface Adopting IP+E1 and A-Interface Adopting STM-1201 Abis Interface Adopting IPoE and A-Interface Adopting E1 ...... 202 Abis Interface Adopting E1 and A-Interface Adopting STM-1.... 203 Abis Interface Adopting E1 and Ater Interface Adopting E1 (TC Is External) ......................................................................... 204 Abis Interface Adopting E1 and Ater Interface Adopting STM-1 (TC Is External)...................................................................... 205 Abis Interface Adopting E1 and Ater Interface Adopting IP (TC Is External) ......................................................................... 206

Configurations when BGSN Is Used................................ 207 Abis Interface and A-Interface Adopting E1(T1)..................... 207 Abis Interface Adopting E1 and A-Interface Adopting STM-1.... 208 Abis Interface Adopting E1 and A-Interface Adopting IP.......... 209 Abis Interface and A-Interface Adopting IP ........................... 210 Abis Interface Adopting IP and A-Interface Adopting E1(T1) .... 211 Abis Interface Adopting IP and A-Interface Adopting STM-1 .... 212 Abis Interface Adopting IPoE and A-Interface Adopting E1(T1). 213 Abis Interface Adopting IPoE and A-Interface Adopting STM-1 . 214 Abis Interface Adopting IPoE and A-Interface Adopting IP ....... 215 Abis Interface and Ater Interface Adopting E1(T1) ................. 216 Abis Interface Adopting IP and Ater Interface Adopting E1(T1) 217

Appendix A ................................................................... 219 Device Specifications ...................................................219 Appendix B ................................................................... 221 Abbreviations ............................................................... 221

Appendix C ...................................................................227 Figures..........................................................................227 Tables ...........................................................................233 Index ............................................................................237

About this Manual Purpose This manual describes the hardware structure and functions of cabinet, plug-in box, shelves and boards of ZXG10 iBSC (V6.20) base station controller.

Intended Audience This document is intended for engineers and technicians who perform operation activities on the ZXG10 iBSC (V6.20) base station controller.

Prerequisite Skill and Knowledge To use this document effectively, users should have a general understanding of wireless telecommunications technology. Familiarity with the following is helpful: 

ZXG10 BSS system and its various components



Local operating procedures

What is in This Manual This manual contains the following sections: T A B L E 1 – M A N U A L S U M M A R Y

Section

Summary

Chapter 1, Cabinet

Introduces the structure and composition of ZXG10 iBSC (V6.20) cabinet.

Chapter 2, Plug-in Boxes

Explains the structure, function and panel descriptions of the plug-in boxes used in ZXG10 iBSC (V6.20).

Chapter 3, Shelves

Explains the configuration and backplane descriptions of shelves used in ZXG10

Confidential and Proprietary Information of ZTE CORPORATION

i

ZXG10 iBSC (V6.20) Base Station Controller Hardware Manua l

Section

Summary iBSC (V6.20).

Chapter 4, Boards

Provides the functions and descriptions of boards used in ZXG10 iBSC (V6.20).

Chapter 5, Other Hardware Equipments

Describes the alarm box and GPS-related equipments.

Chapter 6, System Configuration Specifications

Introduces hardware configurations of ZXG10 iBSC (V6.20) in the following two cases respectively: when the resource shelf (BUSN) is used; when the gigabit resource shelf (BGSN) is used.

Appendix A, Device Specifications

Illustrates devices appeared in ZXG10 iBSC (V6.20) board descriptions.

Appendix B, Abbreviations

List of abbreviations used in this manual.

Appendix C, Figures and Tables

List of figures and tables included in this manual.

Index

Index of important terms and definition in this manual.

Related Documentation The following documents are related to this manual: 



















ii

ZXG10 iBSC (V6.20) Base Station Controller Documentation Guide ZXG10 iBSC (V6.20) Base Station Controller Technical Manual ZXG10 iBSC (V6.20) Base Station Controller Installation Manual ZXG10 iBSC (V6.20) Base Station Controller Performance Counters Manual – Volume I ZXG10 iBSC (V6.20) Base Station Controller Performance Counters Manual – Volume II ZXG10 iBSC (V6.20) Base Station Controller Performance Counters Manual – Volume III ZXG10 iBSC (V6.20) Base Station Controller KPI Reference Manual ZXG10 iBSC (V6.20) Base Station Controller Maintenance Manual (Routine Maintenance) ZXG10 iBSC (V6.20) Base Station Controller Maintenance Manual (Troubleshooting) ZXG10 iBSC (V6.20) Base Station Controller Maintenance Manual (Emergency Maintenance)


About this Manual

ZXG10 BSS (V6.20) Base Station Subsystem Alarm Handling Manual



ZXG10 BSS (V6.20) Base Station Subsystem Notification Handling Manual



ZXG10 BSS (V6.20) Base Station Subsystem OMM Software Installation Manual



ZXG10 BSS (V6.20) Base Station Subsystem Configuration Manual (Initial Configuration Guide)



ZXG10 BSS (V6.20) Base Station Subsystem Configuration Manual ( Feature Configuration Guide)



ZXG10 BSS (V6.20) Base Station Subsystem MML Command Manual



ZXG10 BSS (V6.20) Parameters Manual



Base

Station

Subsystem

Radio

ZXG10 BSS (V6.20) Base Station Subsystem Operation Manual (Diagnosis and Test)



ZXG10 BSS (V6.20) Base Station Subsystem Operation Manual (Signaling Tracing)



Conventions Typographical Conventions

ZTE documents employ the following typographical conventions. T A B L E 2 - T Y P O G R A P H I C A L C O N V E N T I O N S

Typeface

Meaning

Italics

References to other Manuals and documents.

“Quotes”

Links on screens.

Bold

Menus, menu options, function names, input fields, radio button names, check boxes, dropdown lists, dialog box names, window names.

CAPS

Keys on the keyboard and buttons on screens and company name.

Const ant

wi dt h

Text that you type, program code, files and directory names, and function names.

[]

Optional parameters.

{}

Mandatory parameters.

|

Select one of the parameters that are delimited by it. Note: Provides additional information about a certain topic. Checkpoint: Indicates that a particular step needs to be checked before proceeding further.


iii


Typeface

Meaning Tip: Indicates a suggestion or hint to make things easier or more productive for the reader.

Mouse Operation Conventions

T A B L E 3 - M O U S E O P E R A T I O N C O N V E N T I O N S

Typeface

Meaning

Click

Refers to clicking the primary mouse button (usually the left mouse button) once.

Double-click

Refers to quickly clicking the primary mouse button (usually the left mouse button) twice.

Right-click

Refers to clicking the secondary mouse button (usually the right mouse button) once.

Drag

Refers to pressing and holding a mouse button and moving the mouse.

How to Get in Touch The following sections provide information on how to obtain support for the documentation and the software. Customer Support

Documentation Support

iv

If you have problems, questions, comments, or suggestions regarding your product, contact us by e-mail at [email protected]. You can also call our customer support center at (86) 755 26771900 and (86) 800-9830-9830. ZTE welcomes your comments and suggestions on the quality and usefulness of this document. For further questions, comments, or suggestions on the documentation, you can contact us by e-mail at [email protected]; or you can fax your comments and suggestions to (86) 755 26772236. You can also browse our website at http://support.zte.com.cn, which contains various interesting subjects like documentation, knowledge base, forum and service request.


Declaration of RoHS Compliance To minimize the environmental impact and take more responsibility to the earth we live, this document shall serve as formal declaration that the ZXG10 iBSC (V6.20) Base Station Controller manufactured by ZTE CORPORATION is in compliance with the Directive 2002/95/EC of the European Parliament RoHS (Restriction of Hazardous Substances) with respect to the following substances: 

Lead (Pb)



Mercury (Hg)



Cadmium (Cd)



Hexavalent Chromium (Cr(VI))



PolyBrominated Biphenyls (PBB’s)



PolyBrominated Diphenyl Ethers (PBDE’s)

The usage of the above substances in ZXG10 iBSC (V6.20) is explained in Table 4. T A B L E 4 – U S A G E E X P L A N A T I O N O F T H E H A Z A R D O U S S U B S T A N C E S I N Z X G 1 0 IB SC (V6.20)

Hazardous substances Names of Parts Pb

Hg

Cd

Cr(VI)

PBB’s

PBDE’s

System

×

0

0

0

0

0

Cables and Assembly

0

0

0

0

0

0

Auxiliary Equipment

×

×

×

×

×

×

Table Explanation: 0: The usage of the substance in all of the components is less than the allowed values given by 2002/95/EC standard. ×: The usage of the substance in at least one of the components is beyond the allowed values given by 2002/95/EC standard.


v


The ZXG10 iBSC (V6.20) Base Station Controller manufactured by ZTE CORPORATION meet the requirements of EU 2002/95/EC; however, some assemblies are customized to client specifications. Addition of specialized, customer-specified materials or processes which do not meet the requirements of EU 2002/95/EC may negate RoHS compliance of the assembly. To guarantee compliance of the assembly, the need for compliant product must be communicated to ZTE CORPORATION in written form. This declaration is issued based on our current level of knowledge. Since conditions of use are outside our control, ZTE CORPORATION makes no warranties, express or implied, and assumes no liability in connection with the use of this information.

vi


Chapter

1

Cabinet This chapter describes the structure and composition of ZXG10 iBSC cabinet.

Cabinet Structure ZXG10 iBSC (V6.20) has a standard 19-inch cabinet, with maximum internal capacity of 42U. The front door of the cabinet has tiny holes and is black in color. The main b ody of the cabinet is dark blue in color. Dimensions

Excluding left side door and right side door: H mm × 600 mm × 800 mm

×

W

× D

= 2000

Including left side door and right side door: H mm × 650 mm × 800 mm

×

W

× D

= 2000

Note: Outline dimension for whole cabinet: 2000 mm × 600 mm × 800 mm (H × W × D), width for single side door is 25 mm.

Weight

Power Supply Requirement

Operation Environment

Maximum weight of a single cabinet:

≤ 350

kg.

Rated input voltage: -48 V DC Voltage fluctuation range: -57 V DC ~ -40 V DC

Ambient temperature range (long-term working condition / short-term working condition): 0 ºC ~ +40 ºC / -5 ºC ~ +45 ºC Relative humidity range (long-term relative working humidity / short-term relative working humidity): 20% ~ 90%/5% ~ 95% Figure 1 shows the standard 19-inch cabinet.


1


F I G U R E 1 - S T A N D A R D 1 9 - I N C H C A B I N E T

Figure 2 shows the cabinet structure. Shelves and boards are discussed in detail in the following chapters.

2


Chapter 1 - Cabinet

F I G U R E 2 – C A B I N E T S T R U C T U R E

1

2 3 4

5

6

8 7

9

1. Back Door

6. Service Plug-in Box

2. Busbar

7. Front Door

3. Cover Plate

8. Rack

4. Filter

9. Installation Base

5. Fiber Wrap Tray

Cabinet Top

Figure 3 shows the top view of cabinet. F I G U R E 3 – C A B I N E T T O P V I E W


3


The cabinet top consists of top frame component, power input port, cable outlet module, top fan, top filter and fiber wrap tray. Figure 4 shows the cabinet top structure. F I G U R E 4 – C A B I N E T T O P S T R U C T U R E

1

4

2

5 6 7

3

1．Fiber Wrap Tray

5．Cable Outlet Module

2．Top Fan Cover Board

6．Top Filter

3．Top Fan

7．Top Frame Component

4．Filter Cover Board

Top Frame Component

Top frame component is the installation base for each functional unit on the cabinet top. The grounding screw with a grounding sign beside it is used for equipment grounding. Figure 5 shows the top frame component structure.

4


Chapter 1 - Cabinet

F I G U R E 5 – T O P F R A M E C O M P O N E N T S T R U C T U R E 1

2

3

4

5

1．Cable Outlet Module Installation Board

4．Grounding Screw

2．Top Filter Installation Board

5．Top Fan Installation Board

3．Grounding Sign

Cable Outlet Module

Cable outlet module serves as the path for the cables that enter or leave the cabinet. It consists of cable outlet frame and cable outlet bar. Figure 6 shows the structure of cable outlet module. F I G U R E 6 – C A B L E O U T L E T M O D U L E S T R U C T U R E 1

1．Cable Outlet Frame

2

2．Cable Outlet Bar


5


Top Fan

Top fan provides ventilation and heat dissipation. It consists of installation bottom plate, six fans and monitor circuit b oard. Figure 7 shows the structure of top fan. F I G U R E 7 – T O P F A N S T R U C T U R E 1

2

3

1．Monitor Circuit Board

3．Installation Bottom Plate

2．Fan

Top Filter

Top filter is the cabinet power input interface. -48 V power cable from equipment room is connected to the input end of top filter. The power is transferred to the power distribution plug-in box inside the cabinet after being filtered. Figure 8 shows the structure of top filter. F I G U R E 8 – T O P F I L T E R S T R U C T U R E

1

1．Power Input End

Fiber Wrap Tray

2

2．Power Output End

Fiber wrap tray is used to wrap the excess optical fiber cables. It consists of bottom plate, fiber wrap pole, and cover plate. Figure 9 shows the structure of fiber wrap tray.

6


Chapter 1 - Cabinet

F I G U R E 9 – F I B E R W R A P T R A Y S T R U C T U R E

1

2

3

1．Cover Plate

3．Bottom Plate

2．Fiber Wrap Pole

Front/Back Door

The structure of front and back door are similar to each other. Tiny ventilation holes on the doors helps to cool the cabinet. Office information label and serial No. label are affixed on the top right corner of front door. Figure 10 shows the label position (if there is only one label, it should be affixed 120 mm away from the edge). F I G U R E 1 0 – F R O N T D O O R L A B E L S

120

1

2 6 5

ZXG10 iBSC

1．Office Information Label



2．Serial No. Label

Office information label Office information label contains the cabinet consignment information for unpacking check, such as product name, consignment number and recipients address.



Serial No. label


7


Serial No. label contains the cabinet serial number . Rack

Rack consists of top frame, bottom frame, column, adjustment rail, and side door. Figure 11 shows the rack structure. F I G U R E 1 1 - R A C K S T R U C T U R E

1

2

3

4

5

1．Top Frame

4．Side Door

2．Column

5．Bottom Frame

3．Adjustment Rail

Bus Bar

Bus bar is used for providing power supply and grounding of ZXG10 iBSC system. Figure 12 shows the schematic diagram of bus bar.

8


Chapter 1 - Cabinet

F I G U R E 1 2 – B U S B A R

-48V -48V GND PE PE

-48V -48V GND -48V -48V GND PE PE

-48V -48V GND PE

-48V -48V GND -48V -48V GND

PE

PE PE

-48V -48V GND -48V -48V GND

-48V -48V GND -48V -48V GND PE

PE

PE

PE

-48V -48V GND -48V -48V GND PE PE

-48V -48V GND PE PE

Bus bars are located on the right of cabinet back. There are six sets of terminals. Sets 1 and 6 have four connection terminals: 

–48 V



–48 V GND



PE



PE

Set 1 connects the power distribution plug-in box and provides power supply input for bus bars. Set 6 provides power supply for the third fan plug-in box. Sets 2 ~ 5 provide six connection terminals. They are as follows (from top to bottom): 

–48 V



–48 V GND



–48 V



–48 V GND



PE



PE


9


Cabinet Composition ZXG10 iBSC is composed of power distribution plug-in box, fan plug-in box, cabling plug-in box, air filter, switching shelf, control shelf, and resource shelf. Figure 13 shows the structural layout of ZXG10 iBSC cabinet. F I G U R E 1 3 - S T R U C T U R A L L A Y O U T O F C A B I N E T

1 2 3

4

5

10


Chapter 1 - Cabinet

1. Power Distribution Plug-in Box

4. Shelf

2. Fan Plug-in Box

5. Dust-proof Plug-in Box

3. Blank Panel (1 U)

External Connection External equipments connected with iBSC MSC/MGW, SGSN, NetNumen M31, and iTC.

include

BTS,

External connections differ in the following two cases: 

When the gigabit resource shelf (BGSN) is used



When the resource shelf (BUSN) is used

External Connections when Gigabit Resource Shelf (BGSN) Is Used In this case, the external connections of iBSC are shown in Figure 14. F I G U R E 1 4 – I B S C E X T E R N A L C O N N E C T I O N S ( U S I N G G I G A B I T R E S O U R C E SHELF)

MSC/MGW AInterface

SGSN

MR

OMCB

Gb Interface

DTB/SPB2/SDTB2/GIPI iBSC DTB/SPB2/SDTB2/GI PI Abis Interface

GIPI/SPB 2

DTB/SPB2/SDTB2

GIPI OMP/SBC X

Ater Interface

BTS

iTC

NetNumen M31

Note: In Figure 14, the blue line represents the E1 connection, the red line represents the fiber connection, and the azury broken line represents the Ethernet connection.

A-Interface

A-interface is the interface between iBSC and MSC/MGW. The boards and connecting cables used in A-interface are as follows:


11








Gb Interface

The SDTB2 board supports STM-1 cables with the optical interface. The rear board (RDTB) of DTB supports E1 cables with its E1 interface, the rear board (RSPB) of SPB2 supports E1 cables with its E1 interface. The GIPI board supports Ethernet cables with its GE optical interface, the rear board RGER supports the Ethernet cables with its GE electrical interface.

Gb interface is the interface between iBSC and SGSN. The boards and connecting cables used in Gb interface are as follows: 



Abis Interface

The rear board (RSPB) of SPB2 supports E1 cables with its E1 interface. The GIPI board supports Ethernet cables with its GE optical interface, the rear board RGER supports the Ethernet cables with its GE electrical interface.

Abis interface is the interface between iBSC and BTS. The boards and connecting cables used in Abis interface are as follows: 





Ater Interface

The SDTB2 board supports STM-1 cables with the optical interface. The rear board (RDTB) of DTB supports E1 cables with its E1 interface, the rear board (RSPB) of SPB2 supports E1 cables with its E1 interface. The GIPI board supports Ethernet cables with its GE optical interface, the rear board RGER supports Ethernet cables with its GE electrical interface.

Ater interface is the interface between iBSC and iTC. The boards and connecting cables used in Ater interface are as follows: 



OMM

12

The SDTB2 board supports STM-1 cables with the optical interface. The rear board (RSPB) of SPB2 and the rear board (RDTB) of DTB support E1 cables with their E1 interfaces.

It is realized by the FE interface on the rear board (RMPB) of OMP and the FE interface on the rear board (RSVB) of SBCX. The OMM (O&M module) performs data interaction with NetNumen M31.


Chapter 1 - Cabinet

OMCB

The OMCB (i.e. OMC of SDR) connection is realized by the FE interface on the rear boar RMNIC of GIPI.

MR

The Measurement Report (MR) server connection is realized by the FE interface on the rear board RMNIC of GIPI.

External Connections when Resource Shelf (BUSN) Is Used In this case, the external connections of iBSC are shown in Figure 15. F I G U R E 1 5 – I B S C E X T E R N A L C O N N E C T I O N S ( U S I N G R E S O U R C E S H E L F )

Note: In Figure 15, the blue line represents the E1 connection, the red line represents the fiber connection, and the azury broken line represents the FE connection.

A-Interface

A-interface is the interface between iBSC and MSC/MGW. The boards and connecting cables used in A-interface are as follows: 



Gb Interface

SDTB supports STM-1 cables. It is realized by the optical interface on SDTB front panel. The rear board (RDTB) of DTB supports E1 cables with its E1 interface.

Gb interface is the interface between iBSC and SGSN.


13


The boards and connecting cables used in Gb interface are as follows: 



Abis Interface

The rear board (RSPB) of SPB supports E1 cables with its E1 interface. The rear board (RMNIC) of BIPI supports FE cables with its FE interface.

Abis interface is the interface between iBSC and BTS. The boards and connecting cables used in Abis interface are as follows: 



Ater Interface

The rear board (RDTB) of DTB supports E1 cables with its E1 interface. The rear board (RMNIC) of BIPI supports FE cables with its FE interface.

Ater interface is the interface between iBSC and iTC. The boards and connecting cables used in Ater interface are as follows: 



SDTB supports STM-1 cables. It is realized by the optical interface on SDTB front panel. The rear board (RSPB) of SPB and the rear board (RDTB) of DTB support E1 cables with their E1 interfaces.

OMM

It is realized by the FE interface on the rear board (RMPB) of OMP and the FE interface on the rear board (RSVB) of SBCX. The OMM (O&M module) performs data interaction with NetNumen M31.

OMCB

The OMCB (i.e. OMC of SDR) connection is realized by the FE interface on the rear boar RMNIC of BIPI.

MR

The Measurement Report (MR) server connection is realized by the FE interface on the rear board RMNIC of BIPI.

Cabinet Cabling Figure 16 shows the diagram of cabinet cabling.

14


Chapter 1 - Cabinet

F I G U R E 1 6 – C A B I N E T C A B L I N G ( L E F T V I E W )

1

2

5

3 4

1. Leading out cables from cabinet 2. Leading out cables from rear board 3. Rear transverse cable rack 4. Vertical cable trough

5. Leading out optical fibers from front

In ZXG10 iBSC cabinet, the optical fiber is led out from the front board panel, while other cables are led out from the rear board panel.


15

ZXG10 iBSC (V6.20) Base Station Controller Hardware Manu al


16


Chapter

2

Plug-in Boxes This chapter describes the structure, functions, and panel descriptions of ZXG10 iBSC plug-in boxes.

Power Distribution Plug-in Box Power distribution plug-in box is located in the upper part of the cabinet. It provides power to all components of the cabinet. Functions

Functions of power distribution plug-in box are as follows: 





Structure

Provides power to all shelves within a cabinet Implements power backup by automatically switching over two external power supplies Implements power indication, environment monitoring, and internal fan plug-in box monitoring through PWRD and PWRDB

Figure 17 shows the structure of power distribution plug-in box. F I G U R E 1 7 – P O W E R D I S T R I B U T I O N P L U G - I N B O X S T R U C T U R E

1

2

3

4

5

6

7 8

1．Line Connection Terminal

5．Heat sink for the isolating diode

2．Lightning Arrester

6．Isolating diode

3．PWRDB

7．PWRD

4．External Frame

8．Switch


17


The line connection terminal of power distribution plug-in box is installed on the back plane. The front panel of the plug-in box is fixed with PWRD (Power Distribution Board). The front panel can be turned 90º outward, which facilitates maintenance. When the equipment is running, the front panel can be fixed in the plug-in box using captive fastener. Panel

Front Panel Figure 18 shows the front panel of power distribution plug-in box. F I G U R E 1 8 – F R O N T P A N E L O F P O W E R D I S T R I B U T I O N P L U G - I N B O X POWER JUNCT ION BOX

ON OFF

RUN -48V(I) -48V(II) FAN

HOT SMOKE DOOR ARRESTER

-48V(I) -48V(II)

Rear Panel Figure 19 shows the rear panel of power distribution plug-in box. F I G U R E 1 9 – R E A R P A N E L O F P O W E R D I S T R I B U T I O N P L U G - I N B O X

RS485

FAN BOX1

FAN BOX3

FAN BOX2

FAN BOX4

DOOR RS485

SENSORS

ARRESTER INPUT(I) INPUT(II) OUTPUT -48V -48VGND -48V-48VGND-48V -48VGND

Indicator Specifications There are eight indicators on the front panel of the power distribution plug-in box. Table 5 explains the panel indicators. T A B L E 5 – P A N E L I N D I C A T O R S O F P O W E R D I S T R I B U T I O N P L U G - I N B O X

Indicator Name

Color

Meaning

State

RUN

Green

Running indication

1 Hz flash：Running normal

-48 V(I)

18

Red

First -48 V power alarm


OFF：Running abnormal ON： Under-voltage or overvoltage in the first external 48 V input. OFF：Voltage in the first external -48 V input is normal

Chapter 2 - Plug-in Boxes

Indicator Name

-48 V(II)

Color

Red

Meaning

Second -48 V power alarm

FAN

Red

Fan alarm

HOT

Red

Temperature alarm

SMOKE

Red

State ON：Under-voltage or overvoltage in the second external -48 V input OFF：Voltage in the second external -48 V input is normal ON： Fan running abnormal OFF：Fan running normal ON：Temperature abnormal OFF：Temperature normal

Smoke alarm

ON：Smoke parameter exceeds the rated value, and an alarm exists OFF：Smoke parameter is normal

DOOR

ARRESTER

Red

Entrance control Alarm

Red

Lightning arrester alarm

ON：A door under supervision is open OFF：All the doors under supervision are close ON：Lightning arrester running abnormal OFF：Lightning arrester running normal

Switch Specifications There are two switches on the panel. They are: 

-48 V（I）power input switch



-48 V（II）power input switch

Table 6 explains the panel switches. T A B L E 6 – P A N E L S W I T C H E S P O W E R D I S T R I B U T I O N P L U G - I N B O X

Switch Name

Switch Position

-48 V(I) power input

Down：Disconnect the -48 V input Up：Connect to the -48 V input

-48 V(II) power input

Down：Disconnect the -48 V input Up：Connect to the -48 V input

Interface specifications Input/Output cables of power distribution and monitoring are connected to the power distribution plug-in box through the interfaces. Table 7 explains the interfaces of the power distribution plug-in box.


19


T A B L E 7 - P O W E R D I S T R I B U T I O N P L U G - I N B O X I N T E R F A C E S

Interface Name

Description

RS485(Down)

Connected to the RS485 (up) interface of the adjacent rack

RS485(Up)

Connected to PD485 interface of the OMP rear board

SENSORS

Connected by sensor cable

DOOR

Connected by door access cable

FANBOX1

Connected to the top fan group

FANBOX2

Connected to the first layer fan plug-in box

FANBOX3

Connected to the second layer fan plug-in box

FANBOX4

Connected to the third layer fan plug-in box

ARRESTER

Connected to the lightning arrester

INPUT(I)

Power input

INPUT(II)

Power input

OUTPUT

Power output

Fan Plug-in box Fan plug-in box is a common plug-in box, performing monitoring and automatic speed regulation functions. Structure

Figure 20 shows the structure of fan plug-in box. F I G U R E 2 0 – F A N P L U G - I N B O X S T R U C T U R E

Each fan plug-in box consists of three units. Each unit contains two fans. This structure facilitates the operations such as onsite maintenance and hot swapping. Panel

Front Panel Figure 21 shows the front panel of fan plug-in box.

20


Chapter 2 - Plug-in Boxes

F I G U R E 2 1 - F R O N T P A N E L O F F A N P L U G - I N B O X

Rear Panel Figure 22 shows the rear panel of fan plug-in box. F I G U R E 2 2 – R E A R P A N E L O F F A N P L U G - I N B O X 1

2

Monitor

POWER

1. Monitor socket

2.Power socket

Indicator Specifications A fan plug-in box consists of three fan units. Each fan unit has two indicators. Totally, there are six indicators on the front panel of fan plug-in box. Table 8 explains the panel indicators. T A B L E 8 – P A N E L I N D I C A T O R S O F F A N P L U G - I N B O X

Indicator Name

Color

Meaning

State

RUN

Green

Running indicator

ON：Fan running normal

ALM

Red

Alarm indicator

ON：Alarm in fan unit

OFF：Fan running abnormal

OFF：No alarm in fan unit

Button Specifications Each of the three fan units in the fan plug-in box has one button on the front panel. Press the button to pull out the fan unit. Interface specifications Table 9 explains the interfaces of the fan plug-in box. T A B L E 9 – F A N P L U G - I N B O X I N T E R F A C E S

Interface Name

Description

Monitor

Connected to FANBOX2~FANBOX4 in power distribution plug-in box

POWR

Power socket


21


Dust-Proof Plug-in Box (Air Filter) The dust-proof plug-in box is fixed on the bottom of the cabinet. Each dust-proof plug-in box deploys the dust-proof meshwork inside, which can be easily disassembled for cleaning and maintenance.

22


Chapter

3

Shelves This chapter describes the configuration descriptions of ZXG10 iBSC shelves.

and

backplane

Overview The shelf combines various boards through the backplane to form an independent unit, and provides good running environment for the boards. ZXG10 iBSC system has four types of shelves: 

Control shelf (BCTC)



Resource shelf (BUSN)



Packet switching shelf (BPSN)



Gigabit resource shelf (BGSN)

Shelf Functions Table 10 explains the types and functions of these shelves: T A B L E 1 0 – T Y P E S A N D F U N C T I O N S O F S H E L V E S

Shelf type

Shelf Function

Control shelf (BCTC)

Implements global operation and maintenance functions, global clock function, control plane processing, and control plane switching and Ethernet

Resource shelf (BUSN)

Implements system access, and forms all general service subsystems (in this shelf, the user plane data uses megabit switching)

Packet switching shelf (BPSN)

Provides an IP switch platform of large capacity with no congestion


23


Shelf type

Shelf Function

Gigabit resource shelf (BGSN)

Implements system access, and forms all general service subsystems (in this shelf, the user plane data uses gigabit switching)

Shelf Positions Figure 23 shows positions of different shelves in ZXG10 iBSC when the gigabit resource shelf (BGSN) is used. F I G U R E 2 3 – S H E L F P O S I T I O N S ( W H E N B G S N I S U S E D )

Figure 24 shows positions of different shelves in ZXG10 iBSC when the resource shelf (BUSN) is used. F I G U R E 2 4 – S H E L F P O S I T I O N S ( W H E N B U S N I S U S E D )

24


Chapter 3 - Shelves

When performing capacity expansion for ZXG10 iBSC that uses BUSN, BGSN can only be added as an entire one. It should be noticed that BUSN’s boards and BGSN’s boards can not be inserted in one shelf. The shelf configuration, principle, and backplane of ZXG10 iBSC differ in the case of using BUSN and the case of using BGSN. This chapter explains these shelves respectively according to the above two cases.

Backplane Backplane is an important part of a shelf. Circuit boards in a shelf connect through printed lines on the backplane. It reduces the cable routing on the back of backplane and improves reliability of the whole system. Figure 25 shows the backplane structure. F I G U R E 2 5 – B A C K P L A N E S T R U C T U R E 1

2

3

4

1．Backplane fastening bolt

3．Board locating hole

2．Backplane connector

4．Backplane connector

ZXG10 iBSC (V6.20) shelf comprises of different backplanes. Table 11 explains the relationship between a shelf and a backplane.


25


T A B L E 1 1 - R E L A T I O N S H I P B E T W E E N A S H E L F A N D A B A C K P L A N E

Shelf

Backplane

Packet switching shelf

Backplane of packet switching network (BPSN)

Control shelf

Backplane of control center (BCTC)

Resource shelf

Backplane of universal service network (BUSN)

Gigabit resource shelf

Backplane of gigabit universal service network (BGSN)

Shelf Configurations (Using BUSN) This section explains the shelf configurations when the resource shelf (BUSN) is used.

Control Shelf (BCTC) Control shelf is the control core of ZXG10 iBSC system, which manages and controls the whole system, processes control plane signaling, performs operation and maintenance, and provides a global clock and external synchronization function. It is used to form the system’s distributed processing pr ocessing platform. Each iBSC must be configured with one control shelf, and the control shelf must be configured in the second layer of cabinet 1. Configuration

Table 12 explains the boards that can be configured in control shelf. T A B L E 1 2 – B O A R D S I N C O N T R O L S H E L F

Board

Rear Board

OMP

MPB rear board (RMPB)

CMP

-

UIMC

UIM rear board 2 (RUIM2)

Backplane

UIM rear board 3 (RUIM3) CHUB

CHUB rear board 1 (RCHB1) CHUB rear board 2 (RCHB2)

CLKG

CLKG rear board 1 (RCKG1) CLKG rear board 2 (RCKG2)

SBCX

26

SBCX rear board (RSVB)


BCTC

Chapter 3 - Shelves

Figure 26 shows the full configuration of control shelf. F I G U R E 2 6 – F U L L C O N F I G U R A T I O N O F C O N T R O L S H E L F

ControlShelf 1

2

3

4

5

6

7

8

R S V B

9

10 11 1 1 12 1 2 13 1 3 14 1 4 15 1 5 16 1 6 17 17

R U I M 2

R U I M 3

R M P B

R M P B

R C K G 1

R C K G 2

R C H B 1

R C H B 2

BCTC 1

2

SBCX



3

4

5

6

7

8

9

10 11 1 1 12 1 2 13 1 3 14 1 4 15 1 5 16 1 6 17 17

C M P

C M P

U I M C

U O I M M C P

O M P

C L K G

C L K G

C H U B

C H U B

Configuration of boards in the control shelf is as follows: 



OMP boards (2, active and standby) are inserted in slots 11 and 12, which are mandatory. CMP boards (2 ~ 6) can be inserted in slots 3 ~ 8. The number of CMP boards to be configured depends on the configuration capacity. Note:

If capacity expansion is required for the processing performance, per formance, the CMP board can also be inserted in other shelves. It is recommended to insert the CMP board in BPSN shelf.



CLKG boards (2, active and standby) are inserted in slots 13 and 14, which are mandatory. Note:

In Figure 26, CLKG can be either CLKG (CLKG) or CLKG (ICM). Boards of the same type are used in pairs, and boards of different types can not be inserted in the same shelf.





CHUB boards (2, active and standby) are inserted in slots 15 and 16, which are mandatory. UIMC boards (2, active and standby) are inserted in slots 9 and 10, which are mandatory.


27




Principle

It is necessary to configure one SBCX board. The SBCX board is fixedly inserted in slot 1, and the rear board RSVB is inserted in slot 1.

Figure 27 shows 27 shows the principle of the control shelf. FIGURE 27 - PRINCIPLE OF CONTROL SHELF



Inter-shelf communication function 







OMP and SBCX are connected through HUB. SBCX is connected with the external public network through the network interface on its rear board, isolating the internal and external network segment. OMM is installed on the SBCX board. CHUB is the center where the control flows of the switching shelf, the resource shelf, and the control shelf gather.

Intra-shelf communication function 

28

iBSC supports to configure a pair of CLKG boards. Usually, CLKG is configured on the control shelf. The system clock is distributed to switching shelves and resource shelves via the cable.

BCTC backplane bears signaling processing board and MS modules. It gathers and processes the control plane data


Chapter 3 - Shelves

forming a distributed processing platform in the multishelf system. UIMC is the signaling switching center of the control shelf, implementing the information switching between modules.



OMP board is responsible for the global processing and controls O&M of the whole system (including O&M agent).



OMP board is the core of ZXG10 iBSC OMC. It directly or indirectly monitors and manages the boards. OMP board uses Ethernet and RS485 to configure and manage the boards. SBCX not only functions as OMM server but also saves some files needed by OMP, and it organizes these files according to the form required by OMM.



CMP board is connected with the switching unit of control plane, implementing all the protocol processing on control plane.



Backplane

The backplane of control shelf is BCTC. Figure 28 shows the rear view of BCTC backplane. F I G U R E 2 8 – R E A R V I E W O F B C T C B A C K P L A N E

X1 ON OFF

S1

X2

S2

S3

ON

0

OFF

1

Interfaces Table 13 explains the power interface of control shelf.


29


T A B L E 1 3 – P O W E R I N T E R F A C E O F C O N T R O L S H E L F

Interface ID

X1, X2

Usage

Connection

Power socket

Through the filter of plug-in box power, X1 and X2 connect –48 V, –48 V GND, and PE connector posts of rack busbars in parallel.

DIP Switches Table 14 describes DIP switches on the backplane of control shelf. T A B L E 1 4 – D I P S W I T C H E S O N B A C K P L A N E O F C O N T R O L S H E L F

DIP Switch

Function

Example

Configures office information for the shelf

Four-digit switch

S1

S2

Configures rack information for the shelf

S3 only uses the left two digits

S1 only uses the left three digits S2 uses all four digits If all digits of S1 are ‘ON’ : the binary output is ‘000’; If all digits of S2 are ‘ON’: the binary output is ‘0000’;

Configures shelf information for the shelf

S3

If the left two digits of S3 are ‘OFF’ and the rest are ‘ON’: the binary output is ‘11’. Therefore, S1 output is 0, S2 output is 0, and S3 output is 3. The actual rack number and shelf number are 1 plus the output. Thus the above configuration indicates that the BCTC shelf is in: Shelf 4, Rack 1, Office 0.

Note: Backplanes BPSN, BCTC and BUSN all have DIP switches. The ON/OFF setting method is similar in all the backplanes. OFF: Indicates ‘1’ if DIP switch is down ON: Indicates ‘0’ if DIP switch is up The shelf information can also be configured through jumpers. One jumper represents a digit. There are three four-way jumper block, corresponding to information of the office, rack, and shelf, refer to Table 14 for detailed description. OFF: Indicates ‘1’ if the short-circuit block is pulled out ON: Indicates ‘0’ if the short-circuit is plugged in

30


Chapter 3 - Shelves

Note: If the rear board RBID is used, then all DIP switches are arranged on the RBID board.

Packet Switching Shelf (BPSN) Packet switching shelf provides the IP switching function for user plane data of all functional entities inside the ZXG10 iBSC system. It also provides corresponding QoS functions for different users.

Configuration

Table 15 explains the boards that can be configured in packet switching shelf. T A B L E 1 5 – B O A R D S I N P A C K E T S W I T C H I N G S H E L F

Board

Rear board

PSN

-

GLI

-

Backplane

BPSN


UIMC


Figure 29 shows the full configuration of packet switching shelf. F I G U R E 2 9 – F U L L C O N F I G U R A T I O N O F P A C K E T S W I T C H I N G S H E L F

PacketSwitchingShelf 1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

R U I M 2

R U I M 3

15

16

U I M C

U I M C

17

BPSN



1

2

3

4

G L I

G L I

G L I

G L I

5

6

7

8

P S N

P S N

9

10

11

12

13

14

17

Packet switching shelf provides Level-1 IP switching platform for the ZXG iBSC system. It can either expand the user plane


31


for multiple resource shelves or provide external high-speed interfaces directly. 

Configuration of boards in the packet switching shelf is as follows: 









Principle

UIMC boards (2) implement Level-1 switching. They are inserted in slots 15 and 16, which are mandatory. PSN boards (2) implement data switching between line cards. They are inserted in slots 7 and 8, which are mandatory. GLI boards (2 ~ 4) implement GE line interface function. They can be inserted in slots 1 ~ 4. The number of GLI boards to be configured depends on the configuration capacity. GLI boards must be configured in pairs, and are added from the left to the right. RUIM2 board (1) is inserted in slot 15, which are mandatory. RUIM3 board (1) is inserted in slot 16, which are mandatory.

Figure 30 shows principle of the packet switching shelf. F I G U R E 3 0 - P R I N C I P L E O F P A C K E T S W I T C H I N G S H E L F PacketSwithcing

分组交换框 Shelf

ControlShelf 控制框

FE

PSN

UIMC

CHUB

LVDS GLI

...

....

GLI

CLKG

Optical

光纤 Fiber UIMU ResourceShelf 资源框







ResourceShelf 资源框

All resource shelves connect with GLI on the switching shelf via the optical interface on the front panel of UIMU. The control shelf connects with UIMC on the switching shelf via RCHB1 and RCHB2 (rear board of CHUB). Clock signals connect with UIMC on the switching shelf via RCKG1 and RCKG2 (rear board of CLKG).

Intra-shelf communication functions i.

32

UIMU

Inter-shelf communication functions 



User plane data


Chapter 3 - Shelves





The packet switching shelf accesses the user plane data through GLI and performs relevant processing. The data is sent to PSN through the high-speed signal cable of the backplane for switching.



GLI receives the switched data from PSN for processing.



At last, the data is sent to the destination interface.

ii. Control plane data UIMC switching uses the Ethernet bus as the internal control bus of the subsystem, connecting all modules in the subsystem, distributing and collecting route information, maintaining and managing system configurations, and realizing high-layer protocol and signaling data transmission.

Backplane

The backplane of packet switching shelf is BPSN. Figure 31 shows the rear view of BPSN. F I G U R E 3 1 – R E A R V I E W O F B P S N B A C K P L A N E

X1

X2

X3

ON OFF

S1

S2

S3

ON

0

OFF

1

Interfaces Table 16 explains the power interfaces of packet switching shelf. T A B L E 1 6 – P O W E R I N T E R F A C E O F S W I T C H I N G S H E L F

Interface ID

Usage

Connection

X1, X2, X3

Power socket

Through the secondary filter of plug-in box power X1, X2, and


33


Interface ID

Usage

Connection X3, connect –48 V, –48 V GND, and PE of rack busbars in parallel.

DIP Switches DIP switches (S1, S2, and S3) on the BPSN backplane are used to configure information about the office, rack, and shelf. Configuration method is the same as that of DIP switches on the BCTC backplane. For more information, refer to Table 14.

Note: If the rear board RBID is used, then all DIP switches are arranged on the RBID board.

Resource Shelf (BUSN) Resource shelf holds different types of service processing boards and forms various general service processing subsystems. It can be configured with Abis interface unit, A-interface unit, PCU, TC unit, and Ater interface unit. The resource shelf is usually configured in the first layer and the third layer of cabinet 1, and any layer of cabinet 2.

Configuration

Table 17 explains the boards that can be configured in resource shelf. T A B L E 1 7 – B O A R D S I N R E S O U R C E S H E L F

34

Board

Rear Board

DTB

RDTB

SDTB

RGIM1

UIMU

RUIM1

GUP

-

BIPI

RMNIC

SPB

RSPB

UPPB

-

OMP

RMPB

CMP

-

EIPI

-


Backplane

BUSN

Chapter 3 - Shelves

Resource shelf can be configured in many ways. The following is an example of resource shelf configuration, in which Abis interface adopts FE+E1, A-interface adopts E1, and Ater interface adopts E1, as shown in Figure 32. F I G U R E 3 2 – A N E X A M P L E O F R E S O U R C E S H E L F C O N F I G U R A T I O N

Configuration of boards in the resource shelf is described as follows: 











UIMU boards (2) are inserted in slots 9 and 10, which are mandatory. DTB boards can be configured in any slot except the slots 9, 10, 15 and 16. SDTB boards can be configured in any slot except the slots 9 and 10. For non-active-standby configuration, it is better to configure SDTB board in slot 17, if SDTB board is configured in other slot, the adjacent active and standby slots must not be configured with boards that use HW cables, such as DTB and GUP. GUP, when used as BIPB/TIPB, can be configured in slots 5 ~ 8 or 11 ~ 14. If GUP is configured in slots 1 ~ 4, 15 ~ 16, the adjacent slots of active and standby GUP boards can be configured with boards not using user plane network ports, such as DTB and SDTB. When GUP is used as DRTB, it can be configured in any slot except the slots 9 and 10. SPB can be configured in any slot except slots 9 and 10. Slot 15 and slot 16 can not be configured with SPB at the same time. It is recommended to configure UPPB in slots 5 ~ 8 and 11 ~ 14. If UPPB is configured in slots 1 ~ 4, 15 ~ 16, the adjacent slots of active and standby UPPB boards can be configured with boards not using user plane network ports, such as DTB and SDTB.


35








Principle

BIPI board can be configured in slots 5 ~ 8 or 11 ~ 14. It is better to configure EIPI in slot 5 ~ 8 and 11 ~ 14. If EIPI is configured in active and standby slots, the adjacent slots can not be configured with boards using HW cables, such as DTB, SPB, and SDTB. If EIPI is configured in slots 1 ~ 4 and 15 ~ 16, the adjacent slots can not be configured with boards. When realizing all iBSC functions only through the resource shelf, OMP board must be configured and can be inserted in slots 11 and 12. In this case, CMP board is configured based on actual requirements and can be inserted in slots 13 and 14.

Figure 33 shows the principle of the resource shelf. FIGURE 33 - PRINCIPLE OF RESOURCE SHELF

分组交换框

控制框

GLI

资源框

UPPB

SDTB

STM-1



DTB

E1

CHUB

CLKG

GUP

UIMU

SPB

BIPI

E1

FE


UIMU provides the control Ethernet channel to connect external resource shelves. UIMU connects with CHUB (the gathering center of the control flows from the control shelves). UIMU interconnects with GLI of the packet switching shelf, implementing Level-1 switching between different resource boards.



DTB and SPB provide the interface for E1 line.



SDTB provides STM-1 access.



BIPI provides FE access.



36

The resource shelf gets system clock from CLKG of the control shelf through cables.


Chapter 3 - Shelves

Intra-shelf communication function











Backplane

BUSN is the backplane of the resource shelf. Multiple service processing modules can be inserted, forming the common service processing subsystem. UIMU is the gathering and switching center of various data of resource shelf, implementing the information exchange between modules. UPPB implements the processing of radio protocol related to user plane. GUP implements code transformation, rate adaptation and the conversion from TDM to IP packets.

The backplane of resource shelf is BUSN. Figure 34 shows the rear view of BUSN backplane. F I G U R E 3 4 - R E A R V I E W O F B U S N B A C K P L A N E

X1

X2

ON OFF

S1

S2

S3

ON

0

OFF

1

Interfaces Table 18 explains the power interface of resource shelf. T A B L E 1 8 - P O W E R I N T E R F A C E O F R E S O U R C E S H E L F

Interface ID X1, X2

Usage

Connection

Power socket

Through the filter of plug-in box power, X1 and X2 connect –48 V, – 48 V GND, and PE of rack busbars


37


Interface ID

Usage

Connection in parallel.

DIP Switches DIP switches (S1, S2, and S3) on the BUSN backplane are used to configure information about the office, rack, and shelf. Configuration method is the same as that of DIP switches on the BCTC backplane. For more information, refer to Table 14.

Shelf Configurations (Using BGSN) This section explains the shelf configurations when the gigabit resource shelf (BGSN) is used.

Control Shelf (BCTC) Configuration

Table 19 explains the boards that can be configured in control shelf when BGSN is used. T A B L E 1 9 – B O A R D S I N C O N T R O L S H E L F ( W H E N B G S N I S U S E D )

Board

Rear Board

OMP

MPB rear board (RMPB)

CMP

-

UIMC


Backplane

UIM rear board 3 (RUIM3) CHUB

CHUB rear board 1 (RCHB1) CHUB rear board 2 (RCHB2)

CLKG

BCTC

CLKG rear board 1 (RCKG1) CLKG rear board 2 (RCKG2)

ICM

CLKG rear board 1 (RCKG1) CLKG rear board 2 (RCKG2

SBCX

SBCX rear board (RSVB)

Figure 35 shows the full configuration of control shelf.

38


Chapter 3 - Shelves

F I G U R E 3 5 – F U L L C O N F I G U R A T I O N O F C O N T R O L S H E L F ( W H E N B G S N I S U SE D)

ControlShelf 1

2

3

4

5

6

R S V B

7

8

R S V B

9

10

R R U U IM IM 2 3

11

12

13

14

15

16

R M P B

R M P B

R C K G 1

R C K G 2

R C H B 1

R C H B 2

11

12

13

14

15

16

O M P

O M P

17

BCTC



1

2

3

4

C M P

C M P

C M P

C M P

5

6 S B C X

7

8 S B C X

9

10

U U IM IM C C

C/ L I KC GM

C/ C L I H KC U GM B

17

C H U B

Configuration of boards in the control shelf is as follows: 



OMP boards (2, active and standby) are inserted in slots 11 and 12, which are mandatory. CMP boards (2 ~ 4, active and standby) can be inserted in slots 1 ~ 4. The number of CMP boards to be configured depends on the configuration capacity. Note:

If capacity expansion is required for the processing performance, the CMP board can also be inserted in other shelves. It is recommended to insert the CMP board in BPSN shelf.





SBCX boards (2, active and standby) are inserted in slots 5 and 7. CLKG/ICM boards (2, active and standby) are inserted in slots 13 and 14, which are mandatory. Note:

Either CLKG (ICM) or ICM must be used. Boards of the same type are used in pairs, and boards of different types can not be inserted in the same shelf.







CHUB boards (2, active and standby) are inserted in slots 15 and 16, which are mandatory. UIMC boards (2, active and standby) are inserted in slots 9 and 10, which are mandatory. RUIM2 board (1) is inserted in slot 9 fixedly, which is mandatory.


39






Principle

RUIM3 board (1) is inserted in slot 10 fixedly, which is mandatory. RMPB boards (2) are inserted in slots 11 and 12 fixedly, which are mandatory.



RCKG1 board (1) is inserted in slot 13 fixedly.



RCKG2 board (1) is inserted in slot 14 fixedly.



RCHB1 board (1) is inserted in slot 15 fixedly.



RCHB2 board (1) is inserted in slot 16 fixedly.



RSVB boards (2) are inserted in slots 5 and 7 fixedly.



RBID board (1) is configured in BCTC shelf.

Figure 36 shows the principle of the control shelf when BGSN is used. FIGURE 3 6 - PRINCIPLE OF C ONTROL SH EL F (WHEN B G S N IS U SED) ga tresource shelf

Packet switchingshelf

GUIM

UIMC

8K/16M/PP2S CHUB

UIMC

DTB/SDTB /SDTB2 8Kreference

CLKG/ICM

Ethernetbus

CMP

OMP

SBCX Controlshelf

HUB Externalpublic network






40

iBSC supports to configure a pair of CLKG/ICM boards. Usually, CLKG/ICM is configured on the control shelf. The system clock is distributed to switching shelves and gigabit resource shelves via the cable. OMP and SBCX are connected through HUB. SBCX is connected with the external public network through the network interface on its rear board, isolating the internal


Chapter 3 - Shelves

and external network segment. OMM is installed on the SBCX board. 



CHUB is the center where the control flows of the switching shelf, the gigabit resource shelf, and the control shelf gather.






BCTC backplane bears signaling processing board and MS modules. It gathers and processes the control plane data forming a distributed processing platform in the multishelf system. UIMC is the signaling switching center of the control shelf, implementing the information switching between modules. OMP board is responsible for the global processing and controls O&M of the whole system (including O&M agent). OMP board is the core of ZXG10 iBSC OMC. It directly or indirectly monitors and manages the boards. OMP board uses Ethernet and RS485 to configure and manage the boards.





Backplane

SBCX not only functions as OMM server but also saves some files needed by OMP, and it organizes these files according to the form required by OMM. CMP board is connected with the switching unit of control plane, implementing all the protocol processing on control plane.

The backplane of control shelf is BCTC. Figure 37 shows the rear view of BCTC backplane.


41


F I G U R E 3 7 – R E A R V I E W O F B C T C B A C K P L A N E ( W H E N B G S N I S U S E D )

RBID X1

X2

ON

0

OFF

1

Interfaces Table 20 explains the power interface of control shelf. T A B L E 2 0 – P O W E R I N T E R F A C E O F C O N T R O L S H E L F ( W H E N B G S N I S U S E D )

Interface ID

X1, X2

Usage

Connection

Power socket

Through the filter of plug-in box power, X1 and X2 connect –48 V, –48 V GND, and PE connector posts of rack busbars in parallel.

DIP Switches DIP switches are arranged on the RBID board, as shown in Figure 38.

42


Chapter 3 - Shelves

F I G U R E 3 8 – D I P S W I T C H E S O N R B I D B O A R D

X2 X3

X4

Table 21 describes DIP switches on the backplane of control shelf. T A B L E 2 1 – D I P S W I T C H E S O N B A C K P L A N E ( W H E N B G S N I S U S E D )

DIP Switch

Function

Example

Configures office information for the shelf

Four-digit switch

S1

S2

Configures rack information for the shelf

S3 only uses the left two digits

S1 only uses the left three digits S2 uses all four digits If all digits of S1 are ‘ON’ : the binary output is ‘000’; If all digits of S2 are ‘ON’: the binary output is ‘0000’;

S3

Configures shelf information for the shelf

If the left two digits of S3 are ‘OFF’ and the rest are ‘ON’: the binary output is ‘11’. Therefore, S1 output is 0, S2 output is 0, and S3 output is 3. The actual rack number and shelf number are 1 plus the output. Thus the above configuration indicates that the BCTC shelf is in: Shelf 4, Rack 1, Office 0.


43


Note: Backplanes BPSN, BCTC and BGSN all have DIP switches. The ON/OFF setting method is similar in all the backplanes. OFF: Indicates ‘1’ if DIP switch is down ON: Indicates ‘0’ if DIP switch is up The shelf information can also be configured through jumpers. One jumper represents a digit. There are three four-way jumper block, corresponding to information of the office, rack, and shelf, refer to Table 21 for detailed description. OFF: Indicates ‘1’ if the short-circuit block is pulled out ON: Indicates ‘0’ if the short-circuit is plugged in

Packet Switching Shelf (BPSN) Configuration

Table 22 explains the boards that can be configured in packet switching shelf when BGSN is used. T A B L E 2 2 – B O A R D S I N P A C K E T S W I T C H I N G S H E L F ( W H E N B G S N I S U S E D )

Board

Rear board

PSN

-

GLI

-

CMP

-

UIMC

Backplane

BPSN

UIM rear board 2 (RUIM2) UIM rear board 3 (RUIM3)

Figure 39 shows the full configuration of packet switching shelf.

44


Chapter 3 - Shelves

F I G U R E 3 9 – F U L L C O N F I G U R A T I O N O F P A C K E T S W I T C H I N G S H E L F ( W H E N BGSN IS USED)

PacketSwitching Shelf 1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

R U I M 2

R U I M 3

15

16

U I M C

U I M C

17

BPSN





1

2

3

4

5

6

7

8

G L I

G L I

G L I

G L I

G L I

G L I

P S N

P S N

9

10

11

12

13

C M P

C M P

C M P

14 C M P

17

Packet switching shelf provides Level-1 IP switching platform for the ZXG iBSC system. It can either expand the user plane for multiple resource shelves or provide external high-speed interfaces directly. Each pair of GLIs provides eight pairs of active/standby optical interfaces. Thus three pairs of GLIs provide 24 pairs of optical interfaces to interconnect with the 24 pairs of active/standby optical interfaces of GUIMs of the six gigabit resource shelves. Each GUIM board fixedly uses two pairs of optical interfaces. Configuration of boards in the packet switching shelf is as follows: 











UIMC (2, active and standby) boards implement Level-1 switching. They are inserted in slots 15 and 16, which are mandatory. PSN boards (2, load sharing) implement data switching between line cards. They are inserted in slots 7 and 8, which are mandatory. GLI boards (2 ~ 6, load sharing) implement GE line interface function. They can be inserted in slots 1 ~ 6. The number of GLI boards to be configured depends on the configuration capacity. GLI boards must be configured in pairs, and are added from the left to the right. CMP board (0 ~ 2, active and standby) can be inserted in slots 11 ~ 14. One pair of CMP boards is configured for every 1024 carriers. RUIM2 board (1) is inserted in slot 15, which are mandatory. RUIM3 board (1) is inserted in slot 16, which are mandatory.


45




Principle

RBID board (1) is configured in BPSN shelf.

Figure 40 shows principle of the packet switching shelf when BGSN is used. F I G U R E 4 0 - P R I N C I P L E O F P A C K E T S W I T C H I N G S H E L F ( W H E N B G S N I S U S E D )



Inter-shelf communication functions 







All resource shelves connect with GLI on the switching shelf via the optical interface on the front panel of GUIM. The control shelf connects with UIMC on the switching shelf via RCHB1 and RCHB2 (rear board of CHUB). Clock signals connect with UIMC on the switching shelf via RCKG1 and RCKG2 (rear board of CLKG/ICM).

Intra-shelf communication functions i. 



User plane data The packet switching shelf accesses the user plane data through GLI and performs relevant processing. The data is sent to PSN through the high-speed signal cable of the backplane for switching.



GLI receives the switched data from PSN for processing.



At last, the data is sent to the destination interface.

ii. Control plane data UIMC switching uses the Ethernet bus as the internal control bus of the subsystem, connecting all modules in the subsystem, distributing and collecting route information, maintaining and managing system configurations, and realizing upper-level protocol and signaling data transmission.

46


Chapter 3 - Shelves

Backplane

The backplane of packet switching shelf is BPSN. Figure 41 shows the rear view of BPSN. F I G U R E 4 1 – R E A R V I E W O F B P S N B A C K P L A N E

X1

X2

X3

RBID

ON

0

OFF

1

Interfaces Table 23 explains the power interfaces of packet switching shelf. T A B L E 2 3 – P O W E R I N T E R F A C E O F S W I T C H I N G S H E L F

Interface ID

X1, X2, X3

Usage

Connection

Power socket

Through the secondary filter of plug-in box power X1, X2, and X3, connect –48 V, –48 V GND, and PE of rack busbars in parallel.

DIP Switches DIP switches on the BPSN backplane are arranged on RBID board (X2, X3, and X4). They are used to configure information about the office, rack, and shelf. Configuration method is the same as that of DIP switches on the BCTC backplane. For more information, refer to Table 21.


47


Gigabit Resource Shelf (BGSN) Gigabit resource shelf holds different types of service processing boards and forms various general service processing subsystems. It can be configured with Abis interface unit, A-interface unit, PCU (i.e. GIU), TC unit, and Ater interface unit. There is no specific requirement for the gigabit resource shelf position. It is usually configured in the first layer and the third layer of cabinet 1, and any layer of cabinet 2.

Configuration

Table 24 explains the boards that can be configured in gigabit resource shelf. T A B L E 2 4 – B O A R D S I N G I G A B I T R E S O U R C E S H E L F

Board

Rear Board

DTB

RDTB

SDTB2

RGIM1

GUIM

Backplane

GUIM rear board 1 (RGUM1) GUIM rear board 2 (RGUM2)

GUP2

-

GIPI

RGER

SPB2

RSPB

EIPI

-

OMP

RMPB

CMP

-

BGSN

Gigabit resource shelf can be configured in many ways. The following is an example of gigabit resource shelf configuration, in which Abis interface adopts E1 or IPOE, A-interface adopts E1, and Gb interface adopts E1, as shown in Figure 42.

48


Chapter 3 - Shelves

F I G U R E 4 2 – A N E X A M P L E O F G I G A B I T R E S O U R C E S H E L F C O N F I G U R A T I O N

GigabitResourceShelf 1

2

3

4

R G IM 1

5

6

7

R S P B

R D T B

R S P B

8

9

10

11

12 13

R G U M 1

R G U M 2

R M P B

R M P B

R D T B

14

15

16

17 R S P B

BGSN 1

2

3

4

5

6

7

8

9

10

11

12

13

14

S D T B 2

G U P 2

S P B 2

D T B

S P B 2

G U P 2

G U I M

G U I M

O M P

O M P

D T B

E I P I

15

16

17

G U P 2

S P B 2

Configuration of boards in the gigabit resource shelf is described as follows: 











GUIM boards (2, active and standby) are inserted in slots 9 and 10, which are mandatory. They lead out multi-mode fiber connecting level-1 switching. DTB boards can be configured in any slot except the slots 9, 10, 15 and 16. DTB boards can not be configured in more than 3 consecutive slots. It is advised not to configure DTB in slots 1 and 17. It is recommended to configure six DTBs in each shelf, and the maximum number of DTBs configured in each shelf is not more than eight. SDTB2 boards (active-standby configuration) can be configured in any slot except slots 9, 10, and 17. The SDTB2 panel leads out two pairs of single-mode fiber. If the SDTB2 board is of non-active-standby configuration, when SDTB2 board is configured in active or standby slot, the adjacent active and standby slots must not be configured with boards that use HW cables, such as DTB, GUP2, SPB2, and EIPI. GUP2 can be configured in any slot except slots 9, 10, 1, and 17. SPB2 can be configured in any slot except slots 9 and 10. Slot 15 and slot 16 can not be configured with SPB2 at the same time. GIPI can be configured in any slot except slots 9 and 10. Slot 15 and slot 16 can not be configured with GIPI at the same time. The panel has a gigabit optical interface; when configured with RGER, the panel has a gigabit electrical interface; when configured with RMNIC, the panel has four megabit electrical interfaces (active-standby configuration).


49


GIPI board is used to provide OMCB channel. It can be configured in slots 5 ~ 8, 13, and 14 when being used to connect MR server (GIPI is of active-standby configuration). In such cases, the GIPI board provides four FEs both internally and externally, the corresponding rear board is RMNIC. 













Principle

EIPI board can be configured in any slot except slots 9 and 10. Slot 15 and slot 16 can not be configured with EIPI at the same time. When realizing all iBSC functions through one gigabit resource shelf or through two gigabit resource shelves, OMP board must be configured and can be inserted in slots 11 and 12. In this case, CMP board is configured based on actual requirements and can be inserted in slots 11 ~ 14. For SDTB2, SPB2, GIPI, EIPI, and GUP2 board, if the board is configured in slot 15 or 16, the TDM board can not extract the line 8 K clock reference, and the serial port of slot 16 can not be used. RGUM1 board (1) and RGUM2 board (1) are inserted in slots 9 and 10, which are mandatory. RDTB, RSPB, and RGER/RMNIC corresponding to each front board.

board

configured

The SDTB2 rear board (RGIM1) is used to extract STM-1 line 8 K clock. Thus when it is not required to extract the line clock, SDTB2 is not configured. Usually, when the number of configured SDTB2 is more than one, two RGIM1s should be configured, and two clock extracting cables are also required. RBID board (1) is configured in BGSN shelf.

Figure 43 shows the principle of the gigabit resource shelf. FIGURE 43 - PRINCIPLE OF GIGABIT RESOURCE SHELF

50

are


Chapter 3 - Shelves




GUIM provides the control Ethernet channel to connect external gigabit resource shelves. GUIM connects with CHUB (the gathering center of the control flows from the control shelves). GUIM interconnects with GLI of the packet switching shelf, implementing Level-1 switching between different resource boards.



DTB and SPB2 provide the interface for E1 line.



SDTB2 provides STM-1 access.



GIPI provides GE access.







The gigabit resource shelf gets system clock from CLKG/ICM of the control shelf through cables.








Backplane

EIPI provides E1/T1-based IP access, and works with DTB or SDTB2.

BGSN is the backplane of the gigabit resource shelf. Multiple service processing modules can be inserted, forming the common service processing subsystem. GUIM is the gathering and switching center of various data of gigabit resource shelf, implementing the information exchange between modules. GUP2 implements user-plane-related radio protocol processing, TC code transformation, rate adaptation and conversion from TDM to IP packet. GIPI provides one gigabit electrical interface or four megabit interfaces through the backplane for the internal user plane.

The backplane of gigabit resource shelf is BGSN. Figure 44 shows the rear view of BGSN backplane.


51


F I G U R E 4 4 - R E A R V I E W O F B G S N B A C K P L A N E

X1

X2

X3

RBID

ON

0

OFF

1

Interfaces Table 25 explains the power interface of gigabit resource shelf. T A B L E 2 5 - P O W E R I N T E R F A C E O F G I G A B I T R E S O U R C E S H E L F

Interface ID

X1, X2, X3

Usage

Connection

Power socket

Through the filter of plug-in box power, X1, X2, and X3 connect –48 V, –48 V GND, and PE of rack busbars in parallel.

DIP Switches DIP switches (X2, X3, and X4) on the BGSN backplane are arranged on RBID board. They are used to configure information about the office, rack, and shelf. Configuration method is the same as that of DIP switches on the BCTC backplane. For more information, refer to Table 21.

Inter-Shelf Connections Internal connections of ZXG10 iBSC system are used for signal interconnection between boards.

52


Chapter 3 - Shelves

The internal connections of ZXG10 iBSC differ in the case of using BUSN and the case of using BGSN. This section explains these respectively according to the above two cases.

Internal Connections (Using BUSN) In ZXG10 iBSC, when the resource shelf (BUSN) is used, internal connections involve the following types of cables:

Clock Extracting and Distribution



Clock distribution cable and line clock e xtracting cable



Control plane Ethernet cable



User plane fiber



Monitoring cable

Figure 45 shows the clock extracting and distribution inside a single cabinet. F I G U R E 4 5 – S I N G L E C A B I N E T C L O C K E X T R A C T I N G A N D D I S T R I B U T I O N (USING BUSN)

Note: In Figure 45, CLKG can be either CLKG (CLKG) or CLKG (ICM), both providing clock for the system. DTB, SDTB, and SPB can extract clock signal for CLKG, and DTB is taken for example in Figure 45.


53


Figure 46 shows the clock extracting and distribution inside dual cabinets. F I G U R E 4 6 – D U A L - C A B I N E T C L O C K E X T R A C T I N G A N D D I S T R I B U T I O N ( U S I N G BUSN)



Clock reference The line clock from CN is extracted from the interface board and sent to CLKG board. The CLKG board can also get the BITS clock reference.



Clock distribution The rear boards (RCKG1, RCKG2) of CLKG board are connected with UIMU/UIMC board of each shelf through the clock cable, and UIMU/UIMC distributes the clock signals to slots of each shelf.

Control Plane Ethernet Connections

54

Figure 47 shows the control plane connections inside a single cabinet.


Chapter 3 - Shelves

F I G U R E 4 7 – S I N G L E C A B I N E T C O N T R O L P L A N E E T H E R N E T C O N N E C T I O N S (USING BUSN)

In Figure 47, the real line represents the cable connection while the broken line represents the backplane printed cable connection. The iBSC system control plane Ethernet interconnection is realized through CHUB board. 



UIMU in the resource shelf or UIMC in the packet switching shelf is connected with CHUB board through Ethernet cable. UIMC in the control shelf is connected CHUB board through the backplane printed cable.

Figure 48 shows the control plane connections inside dual cabinets.


55


F I G U R E 4 8 – D U A L - C A B I N E T C O N T R O L P L A N E E T H E R N E T C O N N E C T I O N S (USING BUSN)

In Figure 48, the real line represents the cable connection while the broken line represents the backplane printed cable connection. The iBSC dual-cabinet control plane Ethernet interconnection is realized as follows: 



User Plane Connections

56

Connect UIMC/UIMU boards in all shelves except the control shelf in cabinet 1 with CHUB boards through the cables. Connect UIMC board in the control shelf in cabinet 1 with CHUB board through the backplane printed cable.

Figure 49 shows the user plane connections inside a single cabinet.


Chapter 3 - Shelves

F I G U R E 4 9 – S I N G L E C A B I N E T U S E R P L A N E C O N N E C T I O N S ( U S I N G B U S N )

Fiber optic cables are used for the connections between GLI and UIMU. Figure 50 shows the user plane connections inside dual cabinets. F I G U R E 5 0 – D U A L - C A B I N E T U S E R P L A N E C O N N E C T I O N S ( U S I N G B U S N )

Monitoring Circuit Connections

Figure 51 shows the monitoring cable connections inside a single cabinet.


57


F I G U R E 5 1 – S I N G L E C A B I N E T M O N I T O R I N G C A B L E C O N N E C T I O N S ( U S I N G BUSN)

The fan plug-in box is connected with the power distribution plug-in box through cables, realizing the monitoring of fan plugin box. The OMP board is connected with the PWRD board in power plug-in box, realizing the monitoring of PWRD board. Sensors are connected with the power distribution plug-in box, realizing the monitoring of the external environment.

Figure 52 shows the monitoring cable connections inside dual cabinets.

58


Chapter 3 - Shelves

F I G U R E 5 2 – D U A L - C A B I N E T M O N I T O R I N G C A B L E C O N N E C T I O N S ( U S I N G BUSN) Sensor Cabinet1

Cabinet2

Cabinet-topfan

Cabinet-topfan

Powerdistributionplug-in box


Fanplug-inbox U I M U

Resource shelf

U I M C

Controlshelf

Fanplug-inbox D T B

O M P

C L K G

C H U B

Resourceshelf

U I M U

D T B

Resourceshelf

U I M U

D T B

Fanplug-inbox U I M U

Resource shelf

Fanplug-inbox

D T B

Packetswitchingshelf

G L I

U I M C

Fanplug-inbox

Resourceshelf

U I M U

D T B

Resourceshelf

U I M U

D T B

Fanplug-inbox

The fan plug-in box is connected with the power distribution plug-in box in the same cabinet through cables, realizing the monitoring of fan plug-in box. The OMP board in cabinet 1 is connected with the PWRD board in the same cabinet while the PWRD board in cabinet 2 is connected with the PWRD board in cabinet 1, realizing the monitoring of PWRD boards in cabinet 1 and 2. Sensors are connected with the power distribution plug-in box in cabinet 1, realizing the monitoring of the external environment.

Internal Connections (Using BGSN) In ZXG10 iBSC, when the gigabit resource shelf (BGSN) is used, internal connections involve the following types of cables:

Clock Extracting and Distribution



Clock distribution cable and line clock e xtracting cable



Control plane Ethernet cable



User plane fiber



Monitoring cable

Figure 53 shows the clock extracting and distribution inside a single cabinet.


59


F I G U R E 5 3 – S I N G L E C A B I N E T C L O C K E X T R A C T I N G A N D D I S T R I B U T I O N (USING BGSN)

Note: In Figure 53, CLKG can be either CLKG (ICM) or ICM, both providing clock for the system. DTB, SDTB2, and SPB2 can extract clock signal for CLKG (ICM)/ICM, and DTB is taken for example in Figure 53.

Figure 54 shows the clock extracting and distribution inside dual cabinets. F I G U R E 5 4 – D U A L - C A B I N E T C L O C K E X T R A C T I N G A N D D I S T R I B U T I O N ( U S I N G BGSN)


Powerdistributionplug-in box Fan plug-in box Gigabit resourceshelf

G U I M

Control shelf

U I M C

Gigabit resourceshelf

G U I M

Packetswitching shelf

60

Fan plug-in box D T B

O M P

C L K G

C H U B

Gigabit resourceshelf Gigabit resourceshelf

D T B U I M C


G U I M G U I M


G U I M


G U I M

Chapter 3 - Shelves



Clock reference The line clock from CN is extracted from the interface board and sent to CLKG (ICM)/ICM board. The CLKG (ICM)/ICM board can also get the BITS clock reference or obtain the clock reference from GPS module.



Clock distribution The rear boards (RCKG1, RCKG2) of CLKG (ICM)/ICM board are connected with GUIM/UIMC board of each shelf through the clock cable, and GUIM/UIMC distributes the clock signals to slots of each shelf.

Control Plane Ethernet Connections

Figure 55 shows the control plane connections inside a single cabinet. F I G U R E 5 5 – S I N G L E C A B I N E T C O N T R O L P L A N E E T H E R N E T C O N N E C T I O N S (USING BGSN)

In Figure 55, the real line represents the cable connection while the broken line represents the backplane printed cable connection. The iBSC system control plane Ethernet interconnection is realized through CHUB board. 



GUIM in the gigabit resource shelf or UIMC in the packet switching shelf is connected with CHUB board through Ethernet cable. UIMC in the control shelf is connected CHUB board through the backplane printed cable.


61


Figure 56 shows the control plane connections inside dual cabinets. F I G U R E 5 6 – D U A L - C A B I N E T C O N T R O L P L A N E E T H E R N E T C O N N E C T I O N S (USING BGSN)


Powerdistributionplug-in box Fanplug-inbox

Fanplug-inbox Gigabit resourceshelf

G U I M

Controlshelf

U I M C


G U I M

Packetswitching shelf

D T B O M P

C L K G

C H U B

D T B U I M C


G U I M


G U I M


G U I M


G U I M

In Figure 56, the real line represents the cable connection while the broken line represents the backplane printed cable connection. The iBSC dual-cabinet control plane Ethernet interconnection is realized as follows: 



User Plane Connections

62

Connect UIMC/GUIM boards in all shelves except the control shelf in cabinet 1 with CHUB boards through the cables. Connect UIMC board in the control shelf in cabinet 1 with CHUB board through the backplane printed cable.

Figure 57 shows the user plane connections inside a single cabinet.


Chapter 3 - Shelves

F I G U R E 5 7 – S I N G L E C A B I N E T U S E R P L A N E C O N N E C T I O N S ( U S I N G B G S N )

Fiber optic cables are used for the connections between GLI and GUIMs in the gigabit resource shelf. Figure 58 shows the user plane connections inside dual cabinets. F I G U R E 5 8 – D U A L - C A B I N E T U S E R P L A N E C O N N E C T I O N S ( U S I N G B G S N )



Fan plug-in box Gigabit resourceshelf

G U I M

Controlshelf

U I M C


G U I M

Packet switching shelf

Monitoring Circuit Connections

G L I

Fan plug-in box D T B

O M P

C L K G

C H U B

D T B U I M C

G U I M

D T B


G U I M

D T B


G U I M

D T B


G U I M

D T B


Figure 59 shows the monitoring cable connections inside a single cabinet.


63


F I G U R E 5 9 – S I N G L E C A B I N E T M O N I T O R I N G C A B L E C O N N E C T I O N S ( U S I N G BGSN)

The fan plug-in box is connected with the power distribution plug-in box through cables, realizing the monitoring of fan plugin box. The OMP board is connected with the PWRD board in power plug-in box, realizing the monitoring of PWRD board. Sensors are connected with the power distribution plug-in box, realizing the monitoring of the external environment.

Figure 60 shows the monitoring cable connections inside dual cabinets.

64


Chapter 3 - Shelves

F I G U R E 6 0 – D U A L - C A B I N E T M O N I T O R I N G C A B L E C O N N E C T I O N S ( U S I N G BGSN)

The fan plug-in box is connected with the power distribution plug-in box in the same cabinet through cables, realizing the monitoring of fan plug-in box. The OMP board in cabinet 1 is connected with the PWRD board in the same cabinet while the PWRD board in cabinet 2 is connected with the PWRD board in cabinet 1, realizing the monitoring of PWRD boards in cabinet 1 and 2. Sensors are connected with the power distribution plug-in box in cabinet 1, realizing the monitoring of the external environment.


65



66


Chapter

4

Boards This chapter describes the functions and descriptions of ZXG10 iBSC boards.

Overview According to the hardware assembly relation, boards can be classified as front board and rear board. 



Front board has a front panel. Indicators on the front panel indicate the board status. Front board can be inserted in the slots. Rear board consists of the external interfaces and debugging interfaces. These interfaces are used to interconnect shelves of same cabinet or different cabinets. The rear board and the front board work together. For some active/standby front board, it is necessary to configure two kinds of rear boards. Front board and rear board are installed in the slots on the backplane. Front board and rear board form a complete metal shield inside the shelf, reducing the external electromagnetic radiation of the system and enhancing the anti-interference capability.

Figure 61 shows the board assembly relation.


67


F I G U R E 6 1 – B O A R D A S S E M B L Y R E L A T I O N

1

2

3

4

5

6

1. Front board panel

4. Slot

2. Front board

5. Rear board

3. Backplane

6. Rear board Panel

Control Plane HUB (CHUB) Function

CHUB along with UIMC/UIMU/GUIM is used to extend the data flow of system control plane in the ZXG10 iBSC system.

Principle

Figure 62 shows the working principles of CHUB. FIGURE 62 - WORKING PRINCIPLE OF CHUB

RS485 Logic unit

CPU unit

RS232

PCI Bus

s w i t c h i n

g u n i t

E t h e r n e t

Ethernet switching

Ethernet switching

GE FE



CHUB consists of the following three units. 

68

CPU unit


Chapter 4 - Boards

It connects the logic unit and Ethernet switching unit via the control bus, to configure the switching chipset. It provides external RS323 and RS485 serial ports for debugging. 

Logic unit It implements all logic processing functions of the boards.



Ethernet switching unit It performs Ethernet switching, gathering on the control plane.



the

Board data flow direction 



Board Description

implementing

The data of the control plane from all shelves is sent to Ethernet switching unit on CHUB. The data is sent to UIMC on the control shelf via Interface GE, and then is distributed to RCB for processing and vice versa.

Panel Figure 63 shows the panel diagrams of CHUB board and its rear board (RCHB1 and RCHB2).


69


F I G U R E 6 3 – C H U B , R C H B 1 , R C H B 2 P A N E L S

CHUB ENUM RUN ACT ALM EXCH RST

L1

L2

L3

L4

L5

L6

L7

L8

L9

L10

RCHB1

RCHB2

RCHB1

E F d d O

2 3 5 2

8 1 E F

L15 L16

6 1 2 E F n e v

5 1 1

L11 L12 L13 L14

RCHB2

E F

E

L17 L18 L19 L20 L21 L22 L23 L24

L25 L26 L27 L28

6 1 9 E F

0 4 3 3 E F

4 2 7 1

6 4 1 4

2 3 2 / E F G U B E D

2 3 2 / E F G U B E D

2 3 8 1

1 3 7 1 E F d d O

E F n e v E

L29 L30 L31 L32 L33 L34 L35 L36

L 39 L 40

E F

L41 L42

6 4 4 3 E F n e v

5 4 3 3

L37 L38

E F d d O

E F

E

L43 L44 L 45 L 46

1

2

3

2 3 2 / E F G U B E D

4

2 3 2 / E F G U B E D

5

1. CHUB Panel

4. RCHB1 Panel (version 040502)




Indicators There are 50 indicators on CHUB board panel. Table 26 explains the CHUB board panel indicators. T A B L E 2 6 – C H U B B O A R D P A N E L I N D I C A T O R S

Indicators

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30

Green

Active/Stan dby indicator

ACT

70


ON: indicates the board is active OFF: indicates the board is standby

Chapter 4 - Boards

Indicators

Color

Meaning

Description

ALM

Red

Alarm indicator

Refer to Table 30 Always ON: indicates that tack switch has been opened; the board has not been inserted properly; the version has not been downloaded

ENUM

Yellow

Board extraction indicator

Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened while the board is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

L1-L46

Green

Status indicator for 46channel control plane cascade network interface

ON: Related control plane cascade 100 Mbps interface is connected OFF: Related control plane cascade 100 Mbps interface is not connected

Buttons Table 27 explains the CHUB board panel buttons. T A B L E 2 7 – C H U B P A N E L B U T T O N S

Button

Description

RST

Reset switch

EXCH

Active/Standby switchover switch

External Interfaces CHUB provides 46 external 100 Mbps Ethernet interfaces and one Gigabit interface. Table 28 explains the CHUB external interfaces.


71


T A B L E 2 8 – C H U B E X T E R N A L I N T E R F A C E S

Location

RCHB1 panel (version 040501)




Interface Name

Direction

FE1-8

Bidirectional

FE9-16

Bidirectional

FE17-24

Bidirectional

DEBUGFE/232

Bidirectional

FE25-32

Bidirectional

FE33-40

Bidirectional

FE41-46

Bidirectional

DEBUGFE/232

Bidirectional

Odd FE1-15

Bidirectional

Odd FE17-31

Bidirectional

Odd FE33-45

Bidirectional

DEBUGFE/232

Bidirectional

Even FE2-16

Bidirectional

Even FE18-32

Bidirectional

Even FE34-46

Bidirectional

DEBUGFE/232

Bidirectional

Description

Connecting the control plane port of UIM

CPU system debugging interface/serial port







Note: The rear board RCHB1 (version 040501) works with the rear board RCHB2 (version 040501), while the rear board RCHB1 (version 040502) works with the rear board RCHB2 (version 040502).

72


Chapter 4 - Boards

BSC IP Interface Board (BIPI) BIPI is the IP interface board of BSC. Each BIPI board provides four external interfaces. Functions

BIPI board provides IP interface between ZXG10 iBSC and BTS, SGSN, and MSC/MGW. According to functions, the BIPI board is divided into the following three types of functional boards:

Principle



Abis Interface IP Interface Board (IPBB)



A-Interface IP Interface Board (IPAB)



Gb Interface IP Interface Board (IPGB)

Panel Figure 64 shows the working principles of BIPI. FIGURE 64 - WORKING PRINCIPLE OF BIPI

FE1 FE2 FE3 FE4 前面板

线总 I

)

DEBUGRS232 接口单元

背板

Control 控制面 FE Plane User 用户面FE Plane

C P

Logic 逻辑单元 Unit

线总部内

ServiceProcessing 业务处理单元 Unit



BIPI board consists of three units: 

Service Processing Unit It processes related protocol and implements the isolation of user plane and control plane.



Logic Unit


73


It implements all logical processing function of the board. 

Interface Unit It provides four FE interfaces and RS232 serial interface for debugging. The relevant interfaces on BIPI board are as shown in Table 32.



Data flow direction Data access the interface unit, are sent to service processing unit and separated to be user plane data and control plane data. The user plane data are sent to GUP or UPPB for processing via user plane switching network and the control plane data are sent to CMP for processing via control plane network switching network.

Board Description

74

Panel RMNIC is the rear board of BIPI. Figure 65 shows the panel diagram of BIPI and RMNIC.


Chapter 4 - Boards

F I G U R E 6 5 – B I P I A N D R M N I C P A N E L S

BIPI ENUM RUN ACT

ALM EXCH RST

LINK1LINK2 LINK3LINK4

RMNIC 1 E F

2 E F

3 E F

4 E F

E F G U B E D 2 3 2 C M P r P 2 3 2 M R A / T U O K 8

1

2

1. BIPI Panel

2. RMNIC Panel

Indicators Table 29 explains the BIPI panel indicators. T A B L E 2 9 – B I P I P A N E L I N D I C A T O R S

Indicator

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30

ALM

Red

Alarm indicator

Refer to Table 30

ENUM

Yellow

Board

Always ON: indicates that tack


75


Indicator

Color

Meaning

Description

extraction indicator

switch has been opened; the board has not been inserted properly; the version has not been downloaded Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened while the board is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

ACT

Link 1 ~ 4

Green

Active/ Standby indicator

Green

FE1 ~ FE4 status indicator

ON: Indicates the board is active OFF: Indicates the board is standby ON: FE1 ~ FE4 interface ports are connected OFF: FE1 ~ FE4 interface ports are not connected

Combination of indicators RUN and ALM indicate the board status. For more information refer to Table 30. T A B L E 3 0 – R U N / A L M C O M B I N A T I O N D E S C R I P T I O N

76

Status

RUN Status

ALM Status

Meaning

Normal running

Flashing at 1 Hz periodically

Always OFF

Normal running

Version download


Always OFF

Version download



Version download fails because the board is inconsistent with configuration


Chapter 4 - Boards

Status

RUN Status

Meaning DEBUG version indicates that VxWorks download has succeeded, waiting for the version download

Always ON

Always OFF

Always OFF


Board self-test failure

Always OFF


Startup failure of operation support system



Failed to addresses



Basic process power-on failure or timeout



Core data area initiation


Flashing at 0.5 Hz periodically

Alarm due to the mismatch of version and hardware or configuration



Media panel communication is broken



Broken HW



OMP Link is broken



Active/standby switchover is being implemented


Always ON

Hardware clock is lost

Self-test failure

Running failure alarm

ALM Status

RELEASE version indicates that version download has succeeded, starting the version

get

logical

Buttons Table 31 explains the BIPI panel buttons.


77


T A B L E 3 1 – B I P I P A N E L B U T T O N S

Indicator

Description

RST

Board reset

EXCH

Active/Standby switchover

External Interfaces RMNIC provides four external 100 Mbps Ethernet interfaces. Table 32 explains the interfaces on RMNIC panel. T A B L E 3 2 – R M N I C P A N E L I N T E R F A C E S

Location

Interface

Direction

FE1

Bidirectional

FE2

Bidirectional

FE3

Bidirectional

FE4

Bidirectional

Description

Connected to BTS, SGSN, MSC/MGW

DEBUG-FE

Bidirectional

Ethernet network interface for debugging; connected to the debug machine (unused).

PrPMC232

Bidirectional

3 × 232 serial port, connected with the external PC (unused).

8KOUT/ARM23 2

Output/Bidirectional

Connected with CLKG and provides the debugging serial port of 8 kHz clock reference

RMNIC

GSM Universal Processing Board (GUP) Functions

According to functions, the GUP board is divided into the following three types of functional boards: 

Ater Interface Processing Board (TIPB) The TIPB board realizes TDM/IP conversion at Ater interface. In other words, finding out 20 ms TRAU frames according to channel and making them into IP packet.



78

Abis Interface Processing Board (BIPB)


Chapter 4 - Boards

The CS service and PS service from BTS are switched to the BIPB board through the circuit switching network of the UIM board. The 20 ms TRU frames (or PCU frames) are found out according to channel on BIPB, then the TRU frames (or PCU frames) are made into IP packet and sent to TCU (or UPU) for processing. 

Dual Rate Transcoder Board (DRTB) The DRTB board realizes TRAU frame transcoding and rate adaptation, and provides FR/EFR/HR/AMR/TFO functions.

Principle

Figure 66 shows the working principle of GUP. F I G U R E 6 6 – W O R K I N G P R I N C I P L E O F G U P

HW Circuitswitching unit

DSPunit Host interface

DSP P Ethernet switching unit

CPU unit

Controlbus

User plane

FE

DSP P

Clockunit

Logicunit

Controlplane FE



GUP board consists of six units: 

CPU Implements the management functions of board, processes the Abis interface signaling and provide external control plane FE interface.



Logic Unit Implements all the logic processing functions of the board.



DSP Unit


79


Include multiple DSP chips, implementing code transformation, rate adaptation, and data package conversion. 

Ethernet Switching Unit Implements the Ethernet connection of multiple DSPs, and provides external user plane FE interface.



Clock Unit Provides necessary clock signal for each external unit on the board.



Circuit Switching Unit Connects the serial interface of the DSP with circuit switching unit.



Flow direction of board data The uplink data flow direction is the opposite of the downlink data flow direction. The following takes the uplink data flow for example. 





Board Description

80

When it is used as BIPB, the TDM data accesses Abis interface, then it is distributed to DSP unit for processing via circuit switching unit, converted to IP data packet and sent to the other board via Ethernet switching unit. When it is used as DRTB, the voice data IP package from user plane Ethernet received by interface unit is distributed to DSP for code transformation and rate adaptation, converted to PCM code flow and switched to trunk board by UIMU. When it is used as TIPB, the user plane data from UIM board is distributed to DSP through the Ethernet switching unit, converted to TDM data, and then sent to other board through the circuit switching unit for processing.

Panel GUP board does not have corresponding rear board. Figure 67 shows the panel diagram of GUP.


Chapter 4 - Boards

F I G U R E 6 7 – G U P P A N E L

GUP ENUMRUN ACT ALM

RST

Indicators There are four indicators on GUP panel. Table 33 explains the GUP panel indicators. T A B L E 3 3 – G U P P A N E L I N D I C A T O R S

Indicator

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30

ALM

Red

Alarm indicator

Refer to Table 30

ENUM

Yellow


Always ON: indicates that tack switch has been opened; the


81


Indicator

Color

Meaning

Description board has not been inserted properly; the version has not been downloaded Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened while the board is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

ACT

Green

Active/Standby indicator

ON: Indicates the board is active OFF: Indicates the board is standby

Buttons Table 34 explains the GUP panel buttons. T A B L E 3 4 – G U P P A N E L B U T T O N S

Button

Description

RST

Board reset

GSM Universal Processing Board (GUP2) Functions

According to functions, the GUP2 board is divided into the following five types of functional boards: 

Ater Interface Processing Board (TIPB) The TIPB board realizes TDM/IP conversion at Ater interface. In other words, finding out 20 ms TRAU frames according to channel and making them into IP packet.



82

Abis Interface Processing Board (BIPB)


Chapter 4 - Boards

At STM-1 interface or E1 Abis interface, the CS service and PS service from BTS are switched to the BIPB board through the circuit switching network of the UIM board or through the circuit switching network of the GUIM board. The 20 ms TRU frames (or PCU frames) are found out according to channel on BIPB, then the TRU frames (or PCU frames) are made into IP packet and sent to TCU (or UPU) for processing. At IP Abis interface, in addition to the above functions, the BIPB board is also used for RTP protocol processing. 

A-Interface Processing Board (AIPB) The AIPB board is used for RTP protocol processing at Ainterface and making data into IP packet.



User Plane Processing Board (UPPB2) The UPPB2 board is used for user plane protocol processing under A/Gb mode, including BSSGP, PDCP, and GTP_U protocol.



Dual Rate Transcoder Board (DRTB) The DRTB board realizes TRAU frame transcoding and rate adaptation, and provides pr ovides FR/EFR/HR/AMR/TFO functions.

Principle

Figure 68 shows the working principle of GUP2. F I G U R E 6 8 – W O R K I N G P R I N C I P L E O F G U P 2

HW Circuitswitching unit

DSPunit DSPunit Host interface

DSP P

CPU unit

Ethernet switching unit Controlbus

User plane

GE

DSP P

Clockunit

Logicunit

Controlplane FE


83




GUP2 board consists of six units: 

CPU Implements the management functions of board, processes the Abis interface signaling and provide external control plane FE interface.



Logic Unit Implements all the logic processing functions of the board.



DSP Unit Include multiple DSP chips, implementing code transformation, rate adaptation, and data package conversion.



Ethernet Switching Unit Implements the Ethernet connection of multiple DSPs, and provides external user plane GE interface.



Clock Unit Provides necessary clock signal for each external unit on the board.



Circuit Switching Unit Connects the serial interface of the DSP with circuit switching unit.



Flow direction of board data The uplink data flow direction is the opposite of the downlink data flow direction. The following takes the uplink data flow for example. 







84

When it is used as BIPB, the TDM data accesses Abis interface, then it is distributed to DSP for processing through circuit switching unit, converted to IP data packet and sent to other board through Ethernet switching unit for processing. When it is used as DRTB, the voice data IP package from user plane Ethernet received by the interface unit is distributed to DSP for code transformation and rate adaptation, converted to PCM code flow and switched to trunk board by GUIM. When it is used as TIPB, the user plane data from UIM board is distributed to DSP through the Ethernet switching unit, converted to TDM data, and then sent to other board through the circuit switching unit for processing. When it is used as AIPB, the user plane data from GUIM board is distributed to DSP through the Ethernet switching unit for RTP protocol processing, , and then sent to other board through the Ethernet switching unit for processing.


Chapter 4 - Boards

When it is used as UPPB2, the user plane data from GUIM board accesses the user plane FE/GE interface, then it is distributed to DSP through the Ethernet switching unit. DSP performs relevant user plane protocol processing, and then switches the data to SPB2 board through the user plane GE interface.



Board Description

Panel GUP2 board does not have corresponding rear board. Figure 69 shows the panel diagram of GUP2. F I G U R E 6 9 – G U P 2 P A N E L

GUP2 ENUM RUN ACT ALM

RST


85


Indicators There are four indicators on GUP2 panel. Table 35 explains the GUP2 panel indicators. T A B L E 3 5 – G U P 2 P A N E L I N D I C A T O R S

Indicator

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30

ALM

Red

Alarm indicator


ENUM

Yellow



ACT

Green


Buttons Table 36 explains the GUP panel buttons. T A B L E 3 6 – G U P 2 P A N E L B U T T O N S

86

Button

Description

RST

Board reset



Chapter 4 - Boards

Clock Generator Board CLKG (CLKG) ZXG10 iBSC has three types of clock generator boards:

Functions



CLKG (CLKG)



CLKG (ICM)



ICM

Functions of CLKG (CLKG) board are as follows: 











Principle

Provides system clock and external synchronization. It extracts clock reference through A-interface and gives multiple timing reference signals to the interface units. Supports background or manual selection of reference sources, including BITS, network (8 kHz), GPS, and local (level 2 or level 3). Manual switchover can be screened by software. Adopts loose-coupling phase-locked system, working in four modes: CATCH, TRACE, HOLD, and FREE. Outputs level-3 clock. Performs clock loss alarming and deterioration judgment for inputted reference. Supports active/standby switchover.

Figure 70 shows the working principle of CLKG (CLKG). FIGURE 70 - WORKING PRINCIPLE OF C L K G (CLKG)

GPS,DT8K 2MHz,MBits 16CHIP,PP2S

Reference selectionunit Phasedetection andphaselock unit

8K,16M,32M,64 M Clockoutput

Maincontrolunit

RS485 communication interface

Voltage controlled oscillatorunit

Changeover command



Active/Standby changeoverunit

Active/Standby controlsignal

CLKG (CLKG) consists of the following five units:


87




Main control unit It manages the board, communicates with the system control unit, implements the core clock control algorithm, outputs the clock signals, and selects the reference according to the data that the phase detection and phase locking unit provide.



Reference selection unit It selects the suitable reference clock from several input clock under the control of the main processing unit. The clock reference can be from 8 KHz frame synchronization signal of DTB or SDTB clock reference, 2 MHz/2 Mbits of Building Integrated Timing System (BITS).



Voltage controlled oscillator unit The constant temperature crystal oscillator that meets level-3 clock standard provides the clock source with high precision.



Phase detection and phase lock unit It compares the adjustment clock signal and input reference phase and provides the quantized data for the main processing unit, to control the voltage controlled oscillator unit. The phase lock system adopts the loose coupler phase lock principle.



Active/Standby changeover unit It implements the active/standby changeover (the compact of the switching on the clock should be within the allowed range). The active/standby CLKG (CLKG) is locked in the same reference, for the smooth switchover.






Board Description

88

Select one channel of input reference clock to lock the phase and output 16 M and frame header signals that meets the requirements of scheduling. After being balanced-driven, the data is distributed to UIMU. Perform the pulse expansion on the re ceived PP2S and 16 CHIP signal, and then distribute the new PP2S to shelves.

Panel The rear board of CLKG (CLKG) is RCKG1 and RCKG2. Figure 71 shows the diagrams of CLKG (CLKG) panel, CLKG (CLKG) board layout, RCKG1 panel, and RCKG2 panel.


Chapter 4 - Boards

F I G U R E 7 1 – C L K G ( C L K G ) , R C K G 1 , R C K G 2 P A N E L S

X60

CLKG

X50

RCKG1

RCKG2

RCKG1

X48

X46

X43 X42

1

X44 X54 X45

T U O K L C

T U O K L C

T U O K L C

T U O K L C

1 N I K

2 N I K

2 3 2 S R

2 3 2 S R

F E R S T I B

F E R S T I B

8

X47 X40 X41

RCKG2

X53

X56

8

X55

2

3

4

5

1. CLKG (CLKG) panel

4. RCKG2 panel (version 04502)

2. CLKG (CLKG) board layout




6

Indicators There are 18 indicators on CLKG (CLKG) board panel. Table 37 explains the CLKG (CLKG) board panel indicators. T A B L E 3 7 – C L K G ( C L K G ) B O A R D P A N E L I N D I C A T O R S

Indicator Name

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30

ALM

Red

Alarm indicator


ENUM

Yellow

Board extraction Indicator

Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened while the board


89


Indicator Name

Color

Meaning

Description is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

ACT


Green

Catch indicator

ON: Indicates that the board is currently in catch status, that is, a reference has been found but has not been locked onto

Green

Trace indicator

ON: Indicates that the board is currently in trace status, that is, a reference has been found and locked onto

KEEP

Green

Hold indicator

ON: Indicates that the reference has been lost after being locked onto

FREE

Green

Free indicator

ON: Indicates that the board has no reference, and is in free running status

Reference indicator

ON: Indicates that the first clock is a 2 Mbps clock reference provided by BITS equipment transferred in HDB3 coding format

Reference indicator

ON: Indicates that the second clock is a 2 Mbps clock reference provided by BITS equipment, transferred in HDB3 coding format

Reference indicator

ON: Indicates that the first clock is a 2 MHz clock reference provided by BITS equipment, transferred in TTL differential form

Reference indicator

ON: Indicates that second clock is a 2 MHz clock reference provided by BITS equipment, transferred in TTL differential form

CATCH

TRACE

2Mbps1

2Mbps2

2MHz1

2MHz2

90

Green

Active/ standby indicator

Green

Green

Green

Green

8K1

Green

Reference indicator

ON: Indicates that the reference is a network 8 kHz reference provided by boards such as DTB and APBESPB

8K2

Green

Reference indicator

ON: Indicates that the reference is a 8 kHz clock


Chapter 4 - Boards

Indicator Name

Color

Meaning

Description reference provided by GPS

8K3

NULL

QUTD

MANI

Green

Reference indicator

ON: Indicates that the reference is a 8 kHz clock reference sent by UIMU or UIMC

Green

Reference indicator

ON: Indicates that no external reference is available and system is in free oscillating status

Red

Reference deterioration indicator

ON: Indicates the selected reference has deteriorated

Green

Manual selection indicator

ON: Indicates that the reference can be selected manually OFF: Indicates that the reference cannot be selected manually

Buttons Table 38 explains the CLKG (CLKG) board panel buttons. T A B L E 3 8 – C L K G ( C L K G ) B O A R D P A N E L B U T T O N S

Name

Description

RST

Reset switch

EXCH

Active/Standby changeover switch

MANEN

After MANEN is pressed, the manual clock reference selection is enabled, the MANI indicator is ON.

MANSL

Before selecting the clock reference, press MANEN. After MANI is ON, press this button to select the clock reference (corresponding indicators such as 8K1, 8K2, 8K3, or NULL will be ON).

Interfaces Table 39 explains the interfaces on CLKG (CLKG) board. T A B L E 3 9 – C L K G ( C L K G ) B O A R D I N T E R F A C E S

Location

RCKG1 panel (version 040503)

Interface

CLKOUT

Direction

Description

Output

6 × clock output; connected with resource shelves/gigabit resource shelves and control shelves. One CLKOUT outputs 1-to-6 cable. One shelf has two UIM/GUIM boards, and uses


91


Location

Interface

CLKOUT

Direction

Description

Output

a group of active/standby clocks (a group of active/standby clocks include two 16 M, two 8 K, and two PP2S signals). Therefore, one CLKOUT can connect 3 shelves, i.e. 3 groups of clock outputs. RCKG1 has 2 CLKOUTs and provides 6 clock outputs, i.e. connecting 6 shelves. 2 × 8 K reference input. If SDTB/SDTB2 provides the clock reference, this port is connected with 8KOUT/DEBUG-232 on RGIM1.

8 KIN1

Input

If DTB provides the clock reference, this port is connected with 8KOUT/DEBUG-232 on RDTB. If SPB/SPB2 provides the clock reference, this port is connected with 8KOUT/CPU1-RS232 on RSPB. 2 × 8 K reference input, connecting GPS clock reference source.


8 KIN2

Input

2 Mbps/2 MHz

Input

1 × 2 Mbps and 2 MHz input; connected with external BITS clock reference source.

CLKOUT

Output

9 × clock output interface; connected with resource shelves/gigabit resource shelves and control shelves.

CLKOUT

Output

CLKOUT

Output

RCKG1 and RCKG2 working together can connect 15 shelves.

Input

1 × GPS reference input, connecting the external GPS clock reference source.

PP2S/16CH IP

92


To guarantee the reference redundancy, 8KIN2 can input link 8 K clock reference as the standby clock.

RCKG2 has 3 CLKOUTs, providing 9 groups of clock outputs, i.e. connecting with 9 shelves.

Chapter 4 - Boards

Location

Interface

CLKOUT

CLKOUT

Direction

Output

Output

Description 6 × clock output; connected with resource shelves/gigabit resource shelves and control shelves. One CLKOUT outputs 1-to-6 cable. One shelf has two UIM/GUIM boards, and uses 2 clock sockets. Therefore, one CLKOUT can connect 3 shelves, i.e. 3 clock outputs. RCKG1 has 2 CLKOUTs and provides 6 clock outputs, i.e. connecting 6 shelves. 8 K reference input. If SDTB/SDTB2 provides the clock reference, this port is connected with 8KOUT/DEBUG-232 on RGIM1.

RCKG1 panel (version 071200) 8 KIN1

Input

If DTB provides the clock reference, this port is connected with 8KOUT/DEBUG-232 on RDTB. If SPB/SPB2 provides the clock reference, this port is connected with 8KOUT/CPU1-RS232 on RSPB.

RS232

BITS REF


CLKOUT

Bidirectional

The system debugging serial port, connecting the debugger.

Input

1 × 2 Mbps and 2 MHz reference clock input; connected with external BITS clock reference source.

Output

CLKOUT

Output

8 KIN2

Input

6 × clock output; connected with resource shelves/gigabit resource shelves and control shelves. One CLKOUT outputs 1-to-6 cable. One shelf has two UIM/GUIM boards, and uses 2 clock sockets. Therefore, one CLKOUT can connect 3 shelves, i.e. 3 clock outputs. RCKG1 has 2 CLKOUTs and provides 6 clock outputs, i.e. connecting 6 shelves.

8 K reference input. If SDTB/SDTB2 provides the clock reference, this port is connected with


93


Location

Interface

Direction

Description 8KOUT/DEBUG-232 on RGIM1. If DTB provides the clock reference, this port is connected with 8KOUT/DEBUG-232 on RDTB. If SPB/SPB2 provides the clock reference, this port is connected with 8KOUT/CPU1-RS232 on RSPB.

RS232

BITS REF

Bidirectional


Input


Note: The rear board RCKG1 (version 040503) works with the rear board RCKG2 (version 040502), and the two 8 K reference are introduced from RCKG1. The rear board RCKG1 (version 071200) works with the rear board RCKG2 (version 071200), and each board has a line 8 K clock reference and a BITS clock reference.

DIP Switches and Jumpers

CLKG (CLKG) board has the following jumpers: X40-41, X44-45: selection of first 2 Mbps and 2 MHz matching impedance of BITS: It indicates that matching impedance is 75 and 2 are connected.

Ω,

when pins 1

It indicates that matching impedance is 125 and 3 are connected.

Ω,

when pins 2

X42-43, X46-47: selection of second 2 Mbps and 2 MHz matching impedance of BITS: It indicates that matching impedance is 75 and 2 are connected.

Ω,

when pins 1

It indicates that matching impedance is 125 and 3 are connected.

Ω,

when pins 2

X53-X56: grounding protection jumper of coaxial cable sleeve for inputting two 2 Mbps and 2 MHz clocks: Coaxial cable jacket is connected to protection ground, when pins 1 and 2 are connected.

94


Chapter 4 - Boards

X48, X50: used in debug mode; disconnected in normal operation mode. X60: jumper of RS485 connection relation Pins 3 and 5 must be connected and pins 4 and 6 must also be connected during debugging, when data is downloaded through serial port of a computer. Pins 1 and 3 and pins 2 and 4 must be connected respectively during normal communication with the background through an RS485 bus.

Clock Generator Board CLKG (ICM) ZXG10 iBSC has three types of clock generator boards: 

CLKG (CLKG)



CLKG (ICM)



ICM

Functions

Functions of CLKG (ICM) board are the same as CLKG (CLKG) board. For details, refer to Clock Generator Board CLKG (CLKG).

Principle

The working principle of CLKG (ICM) is similar to that of CLKG (CLKG). The difference between them is that the main control unit of CLKG (ICM) uses FE interface, not RS485 communication interface, as shown in Figure 72. FIGURE 72 - WORKING PRINCIPLE OF C L K G (ICM)

GPS,DT8K 2MHz,MBits 16CHIP,PP2S

Reference selectionunit Phasedetection andphaselock unit

8K ,16M,32M,64M

Main controlunit

FEinterface

Clockoutput


Changeover command



Active/ Standby Active/standbycontrolsignal changeover

CLKG (ICM) consists of the following five units: 

Main control unit It manages the board, communicates with the system control unit, implements the core clock control algorithm, outputs the clock signals, and selects the reference


95


according to the data that the phase detection and phase locking unit provide. 

Reference selection unit It selects the suitable reference clock from several input clock under the control of the main processing unit. The clock reference can be from 8 KHz frame synchronization signal of DTB or SDTB/SDTB2 clock reference, 2 MHz/2 Mbits of Building Integrated Timing System (BITS).









Active/Standby changeover unit It implements the active/standby changeover (the compact of the switching on the clock should be within the allowed range). The active/standby CLKG (ICM) is locked in the same reference, for the smooth switchover.






Board Description

96

Select one channel of input reference clock to lock the phase and output 16 M and frame header signals that meets the requirements of scheduling. After being balanced-driven, the data is distributed to UIMU/GUIM. Perform the pulse expansion on the re ceived PP2S and 16 CHIP signal, and then distribute the new PP2S to shelves.

The rear board of CLKG (ICM) is RCKG1 and RCKG2. Figure 73 shows the diagrams of CLKG (ICM) panel, CLKG (ICM) board layout, RCKG1 panel, and RCKG2 panel.


Chapter 4 - Boards

F I G U R E 7 3 – C L K G ( I C M ) , R C K G 1 , R C K G 2 P A N E L S

CLKG ENUM RUN ACT ALM EXCH

RST BITS Bps1 Bps2 Hz1 Hz2 8K1 8K2

RCKG1

8K38K4

RCKG2

RCKG1

RCKG2

NULL QUTD CATCH KEEP TRACE FREE MANI

T U O K L C

T U O K L C

T U O K L C

T U O K L C

T U O K L

T U O K L C

T U O K L C

T U O K L C

1 N I K 8

2 N I K 8

2 3 2 S R

2 3 2 S R

MANSL

MANEN

C

1 N I K 8 2 N I K 8

S1

T U O K L C

ON z H M 2 / s p b

F E R S T I B

P I H C 6 1 / S 2 P P

M 2

ON

F E R S T I B

S5

1

2

3

4

5

1. CLKG (ICM) panel


2. CLKG (ICM) board layout




6

Indicators There are 19 indicators on CLKG (ICM) board panel. Table 40 explains the CLKG (ICM) board panel indicators. T A B L E 4 0 – C L K G ( I C M ) B O A R D P A N E L I N D I C A T O R S

Indicator Name

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30

ALM

Red

Alarm indicator


ENUM

Yellow


Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has


97


Indicator Name

Color

Meaning

Description been opened while the board is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

ACT

Green


ON: Indicates the board is active OFF: Indicates the board is standby Indicates the clock reference CLKG (ICM) board selects

Bps1

Green

Reference indicator

ON: Indicates CLKG (ICM) selects the first 2 Mbps clock reference provided by BITS equipment, which is transmitted in HDB3 coding form Indicates the clock reference CLKG (ICM) board selects

Bps2

Green

Reference indicator

ON: Indicates CLKG (ICM) selects the second 2 Mbps clock reference provided by BITS equipment, which is transmitted in HDB3 coding form Indicates the clock reference CLKG (ICM) board selects

Hz1

Green

Reference indicator

ON: Indicates CLKG (ICM) selects the first 2 MHz clock reference provided by BITS equipment, which is transmitted in TTL differential form Indicates the clock reference CLKG (ICM) board selects

98

ON: Indicates CLKG (ICM) selects the second 2 MHz clock reference provided by BITS equipment, which is transmitted in TTL differential form

Hz2

Green

Reference indicator

8K1

Green

Reference indicator

ON: Indicates that the clock reference is a 8 kHz clock reference extracted from line

8K2

Green

Reference indicator

ON: Indicates that the clock reference is a 8 kHz clock reference provided by external GPS

8K3

Green

Reference indicator

ON: Indicates that the clock reference is a 8 kHz clock


Chapter 4 - Boards

Indicator Name

Color

Meaning

Description reference sent by UIMU/GUIM or UIMC

Green

Reference indicator

ON: Indicates that the clock reference is a 8 kHz clock reference provided by the board’s GPS

NULL

Green

Reference indicator


QUTD

Red



Green

Catch indicator


TRACE

Green

Trace indicator


KEEP

Green

Hold indicator


Green

Free indicator


8K4

CATCH

FREE

MANI

Green


ON: Indicates that the reference can be selected manually OFF: Indicates that the reference can not be selected manually

Buttons The CLKG (ICM) board panel buttons are the same as that of CLKG (CLKG) board. For details, refer to Table 38.

Interfaces The CLKG (ICM) board panel interfaces are the same as that of CLKG (CLKG) board. For details, refer to Table 39.


CLKG (ICM) board has the following jumpers: The DIP switch S1 and S5 of CLKG (ICM) board are combined for selecting the impedance matching resistance of the input BITS clock line. The default resistance value is 75 Ω.


99


Table 41 describes DIP switch settings of CLKG (ICM). T A B L E 4 1 – C L K G ( I C M ) J U M P E R S

Mode

75

Ω

100

120

Ω

Ω

DIP Switching Settings

Default

Name

1

2

3

4

S1

ON

ON

ON

ON

S5

ON

ON

ON

ON

S1

ON

ON

ON

ON

S5

OFF

OFF

OFF

OFF

S1

OFF

OFF

OFF

OFF

S5

OFF

OFF

OFF

OFF

Mode

75

Ω

Integrated Clock Module (ICM) ZXG10 iBSC has three types of clock generator boards:

Functions



CLKG (CLKG)



CLKG (ICM)



ICM

Functions of ICM are as follows: 















100

Provides system clock and external synchronization. It extracts clock reference through A-interface and gives multiple timing reference signals to the interface units. Receives GPS satellite system signals, extracts and generates 1PPS signal and corresponding navigation message (TOD message), and generates PP2S, 19.6608MHz, and system 8 K clock reference required by the system. Supports BITS, one line (8 K), and two GPS8K (from the local board and external GPS) as the reference for local clock. Supports background or manual selection of reference sources, including BITS, network (8 kHz), GPS, and local (level 2 or level 3). Manual switchover can be screened by software. Adopts loose-coupling phase-locked system, working in four modes: CATCH, TRACE, HOLD, and FREE. Outputs level-3 clock. Performs clock loss alarming and deterioration judgment for inputted reference. Supports active/standby switchover.


Chapter 4 - Boards

Principle

Figure 74 shows 74 shows the working principle of ICM. FIGURE 74 - WORKING PRINCIPLE OF ICM

GPS,DT8K 2MHz,MBits 16CHIP,PP2 S

Reference selectionunit


GPSunit

Phasedetection andphaselock unit

Main controlunit Changeover command



8K ,16 16M, M,32M 32M ,64 ,64M Clock output

FEinterface

Active/Standby Active/standbycontrolsignal changeoverunit

ICM consists of the following five units: 

Main control unit It manages the board, communicates with the system control unit, implements the core clock control algorithm, outputs the clock signals, and selects the reference according to the data that the phase detection and phase locking unit provide.



Reference selection unit It selects the suitable reference clock from several input clock under the control of the main processing unit. The clock reference can be from 8 KHz frame synchronization signal of DTB or SDTB2 clock reference, 2 MHz/2 Mbits of Building Integrated Timing System (BITS), and GPS signal.









Active/Standby changeover unit It implements the active/standby changeover (the compact of the switching on the clock should be within the allowed range). The active/standby ICM is locked in the same reference, for the smooth switchover.



Board data flow direction


101








Board Description

Select one channel of input reference clock to lock the phase and output 16 M and frame header signals that meets the requirements of scheduling. After being balanced-driven, the data is distributed to GUIM. Perform the pulse expansion on the re ceived PP2S and 16 CHIP signal, and then distribute the new PP2S to shelves. Extract and generate 1PPS signal for the received GPS signal, take the generate PP2S, 19.6608MHz, and system 8 K clock reference required by the system, and distribute them to shelves.

Panel The rear board of ICM is RCKG1 and RCKG2. Figure 75 shows the diagrams of ICM panel, ICM board layout, RCKG1 panel, and RCKG2 panel. F I G U R E 7 5 – I C M , R C K G 1 , R C K G 2 P A N E L S

ICM ENUMRUN ACT ALM EXCH

RST BITS Bps1 Bps2 Hz1 Hz2 8K1 8K2

RCKG1

8K38K4

RCKG2

RCKG1

RCKG2

NULL QUTD CATCH KEEP TRACE FREE MANI

T U O K L C

T U O K L C

T U O K L C

T U O K L C

T U O K L C

T U O K L C

T U O K L C

T U O K L C

MANSL

MANEN

SCS CCS ANT TYP

GPS

PP2S

1

10M

1

N I K 8 2 N I K 8

S1

T U O K L C

2

N I K 8

N I K 8

2 3 2 S R

2 3 2 S R

ON z H M 2 / s p b

MON

F E R S T I B

P I H C 6 1 / S 2 P P

M 2

ON

F E R S T I B

S5

1

2

3

5

6

1. ICM panel


2. ICM board layout




Indicators There are 23 indicators on ICM board panel. Table 42 explains the ICM board panel indicators.

102

4


Chapter 4 - Boards

T A B L E 4 2 – I C M B O A R D P A N E L I N D I C A T O R S

Indicator Name

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30

ALM

Red

Alarm indicator

Refer to Table 30 Always ON: indicates that tack switch has has been opened; the the board has not been inserted properly; the version has not been downloaded

ENUM

Yellow



ACT

Green


ON: Indicates the board is active OFF: Indicates the board is standby Indicates the clock reference ICM board selects

Bps1

Green

Reference indicator

ON: Indicates ICM selects the first 2 Mbps clock reference provided by BITS equipment, which is transmitted in HDB3 coding form Indicates the clock reference ICM board selects

Bps2

Green

Reference indicator

ON: Indicates ICM selects the second 2 Mbps clock reference provided by BITS equipment, which is transmitted in HDB3 coding form Indicates the clock reference ICM board selects

Hz1

Green

Reference indicator

ON: Indicates ICM selects the first 2 MHz clock reference provided by BITS equipment, which is transmitted in TTL differential form

Hz2

Green

Reference

Indicates the clock reference


103


Indicator Name

Color

Meaning

Description

indicator

ICM board selects ON: Indicates ICM selects the second 2 MHz clock reference provided by BITS equipment, which is transmitted in TTL differential form

Reference indicator

ON: Indicates that the clock reference is a 8 kHz clock reference extracted from line

Reference indicator

ON: Indicates that the clock reference is a 8 kHz clock reference provided by external GPS

Green

Reference indicator

ON: Indicates that the clock reference is a 8 kHz clock reference sent by GUIM or UIMC

Green

Reference indicator

ON: indicates that the clock reference is a 8 kHz clock reference provided by the board’s GPS

NULL

Green

Reference indicator


QUTD

Red



Green

Catch indicator


TRACE

Green

Trace indicator


KEEP

Green

Hold indicator


FREE

Green

Free indicator


8K1

8K2

8K3

8K4

CATCH

104

Green

Green

MANI

Green


SCS

Green

System clock reference


ON: Indicates that the reference can be selected manually OFF: Indicates that the reference can not be selected manually Always ON: Indicates that the

Chapter 4 - Boards

Indicator Name

Color

Meaning

Description

indicator

system clock is normal Always OFF: Indicates that the 16CHIP Phase Locked Loop (PLL) loses lock Flashing very quickly: Indicates that the output 16CHIP signal is abnormal Flashing very slowly: Indicates that the output PP2S signal is abnormal

CCS

Green

Circuit clock reference indicator

Always ON: Indicates that the circuit clock 12.8 M PLL is locked normally Always OFF: Indicates that the circuit clock 12.8 M PLL loses lock Always ON: Indicates that antenna feeder is normal Always OFF: Indicates that antenna feeder and satellite are normal and being initialized

ANT

Green

Antenna status indicator

Flashing at 1 Hz (slow): Indicates that antenna feeder is broken Flashing at 2 Hz (fast): Indicates that antenna feeder is normal but can not receive satellite signal Flashing at 0.5 Hz (very slow): Indicates that antenna is shortcircuited Flashing at 5 Hz (very fast): Indicates that no message is received during initialization Always OFF (black): GPS single-mode receiver

TYP

Green/ Yellow

Mode indicator

Always ON (green): GPS/GONOLASS dual-mode receiver Always ON (yellow): GPS/GONOLASS/Triones timed three-mode receiver

Buttons Table 43 explains the ICM board panel buttons.


105


T A B L E 4 3 – I C M B O A R D P A N E L B U T T O N S

Name

Description

RST

Reset switch

EXCH

Active/Standby changeover switch

MANEN

After MANEN is pressed, the manual clock reference selection is enabled, the MANI indicator is ON.

MANSL

Before selecting the clock reference, press MANEN. After MANI is ON, press this button to select the clock reference (corresponding indicators such as 8K1, 8K2, 8K3, or NULL will be ON).

Interfaces Table 44 explains the interfaces on ICM board. T A B L E 4 4 – I C M B O A R D I N T E R F A C E S

Location

ICM panel


Interface

Direction

Description

GPS

Input

Cable is connected to GPS antenna, receiving GPS satellite signal

PP2S

Output

From GPS module to the front panel PP2S

10M

Output

From GPS module to the front panel 10M

MON

Bidirectional

From GPS module to the front panel debugging serial port

CLKOUT

Output

CLKOUT

Output

8 KIN1

Input

6 × clock output; connected with resource shelves/gigabit resource shelves and control shelves. One CLKOUT outputs 1-to-6 cable. One shelf has two UIM/GUIM boards, and uses a group of active/standby clocks (a group of active/standby clocks include two 16 M, two 8 K, and two PP2S signals). Therefore, one CLKOUT can connect 3 shelves, i.e. 3 groups of clock outputs. RCKG1 has 2 CLKOUTs and provides 6 clock outputs, i.e. connecting 6 shelves.

2 × 8 K reference input. If SDTB/SDTB2 provides the clock reference, this port is connected with

106


Chapter 4 - Boards

Location

Interface

Direction

Description 8KOUT/DEBUG-232 on RGIM1. If DTB provides the clock reference, this port is connected with 8KOUT/DEBUG-232 on RDTB. If SPB/SPB2 provides the clock reference, this port is connected with 8KOUT/CPU1-RS232 on RSPB. 2 × 8 K reference input, connecting GPS clock reference source.

8 KIN2


To guarantee the reference redundancy, 8KIN2 can input link 8 K clock reference as the standby clock. 1 × 2 Mbps and 2 MHz input; connected with external BITS clock reference source.

2 Mbps/2 MHz

Input

CLKOUT

Output

CLKOUT

Output

CLKOUT

Output

RCKG1 and RCKG2 working together can connect 15 shelves.

Input

1 × GPS reference input, connecting the external GPS clock reference source.

PP2S/16CH IP


Input

CLKOUT

Output

CLKOUT

Output

8 KIN1

Input

9 × clock output interface; connected with resource shelves/gigabit resource shelves and control shelves. RCKG2 has 3 CLKOUTs, providing 9 groups of clock outputs, i.e. connecting with 9 shelves.

6 × clock output; connected with resource shelves/gigabit resource shelves and control shelves. One CLKOUT outputs 1-to-6 cable. One shelf has two UIM/GUIM boards, and uses 2 clock sockets. Therefore, one CLKOUT can connect 3 shelves, i.e. 3 clock outputs. RCKG1 has 2 CLKOUTs and provides 6 clock outputs, i.e. connecting 6 shelves.

8 K reference input. If SDTB/SDTB2 provides the clock reference, this port is connected with


107


Location

Interface

Direction

Description 8KOUT/DEBUG-232 on RGIM1. If DTB provides the clock reference, this port is connected with 8KOUT/DEBUG-232 on RDTB. If SPB/SPB2 provides the clock reference, this port is connected with 8KOUT/CPU1-RS232 on RSPB.

RS232

BITS REF

CLKOUT

CLKOUT

Bidirectional


Input


Output

Output

6 × clock output; connected with resource shelves/gigabit resource shelves and control shelves. One CLKOUT outputs 1-to-6 cable. One shelf has two UIM/GUIM boards, and uses 2 clock sockets. Therefore, one CLKOUT can connect 3 shelves, i.e. 3 clock outputs. RCKG1 has 2 CLKOUTs and provides 6 clock outputs, i.e. connecting 6 shelves. 8 K reference input. If SDTB/SDTB2 provides the clock reference, this port is connected with 8KOUT/DEBUG-232 on RGIM1.

RCKG2 panel (version 071200) 8 KIN2

Input

If DTB provides the clock reference, this port is connected with 8KOUT/DEBUG-232 on RDTB. If SPB/SPB2 provides the clock reference, this port is connected with 8KOUT/CPU1-RS232 on RSPB.

108

RS232

Bidirectional


BITS REF

Input

1 × 2 Mbps and 2 MHz reference clock input;


Chapter 4 - Boards

Location

Interface

Direction

Description connected with external BITS clock reference source.

Note: The rear board RCKG1 (version 040503) works with the rear board RCKG2 (version 040502), and the two 8 K reference are introduced from RCKG1. The rear board RCKG1 (version 071200) works with the rear board RCKG2 (version 071200), and each board has a line 8 K clock reference and a BITS clock reference.


ICM board has the following jumpers: The DIP switch S1 and S5 of ICM board are combined for selecting the impedance matching resistance of the input BITS clock line. The default resistance value is 7 5 Ω. Table 45 describes DIP switch settings of ICM. T A B L E 4 5 – I C M J U M P E R S

Mode

75

Ω

100

Ω

120

Ω

DIP Switching Settings

Default

Name

1

2

3

4

S1

ON

ON

ON

ON

S5

ON

ON

ON

ON

S1

ON

ON

ON

ON

S5

OFF

OFF

OFF

OFF

S1

OFF

OFF

OFF

OFF

S5

OFF

OFF

OFF

OFF

Mode

75

Ω

Control Main Processing Board (CMP) Functions

Principle

Functions of CMP board are as follows: 

Implements PS/CS domain service control management



Implements resource management of BSSAP and BSSGP

Figure 76 shows the principle of CMP.


109


F I G U R E 7 6 – W O R K I N G P R I N C I P L E O F C M P

CPU 单元B OMC2

以太网接口

CPU小系统

232/485

串口

逻辑单元

控制面/FE 主备FE

232/ 485串口 DEBUG2-2 32

电源管理单元 GPS485 PD485

CPU小系统

232/485

1×485

串口

RS232 DEBUG1-2 32 OMC1

以太网接口

控制面/FE 主备FE

CPU单元A



CMP board consists of three units: 

CPU There are two independent CPUs on the board, CPU_A and CPU_B. Each CPU provides control plane FE interface, the FE interface for communication of active/standby board, and RS232 and RS485 interfaces for communication with other units. CPU A is on the lower part of the board, which implements the main control function of the board.



Logic Unit Implements all the logical processing functions of the board.



Power Management Unit Implements the power management distribution of the board.

Board Description

110

Panel CMP board does not require rear board, and a dummy panel is inserted in the corresponding position. The two CPUs of CMP do not have a hard disk.


Chapter 4 - Boards

Figure 77 shows the diagram of CMP board panel and CMP board layout. F I G U R E 7 7 – C M P P A N E L

1. CMP Panel

2. CMP Board Layout

Indicators Table 46 explains the CMP board panel indicators. T A B L E 4 6 – C M P B O A R D P A N E L I N D I C A T O R S

Indicator

Color

Full Name

Description

ALM1

Red

CPU_A alarm indicator

Refer to Table 30

Green

CPU_A running indicator

Refer to Table 30

ACT1

Green

CPU_A active/ Standby indicator

ON: Indicates the board is active

ENUM1

Yellow

CPU_A board extraction

Always ON: indicates that tack switch has been opened; the board has not been inserted

RUN1

OFF: Indicates the board is standby


111


Indicator

Color

Full Name

Description

indicator

properly; the version has not been downloaded Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened while the board is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

ALM2

RUN2

ACT2

Red

CPU_B alarm indicator

Refer to Table 30

Green

CPU_B running indicator

Refer to Table 30

CPU_B active/

ON: Indicates the board is active

Standby indicator

OFF: Indicates the board is standby

Green

Always ON: indicates that tack switch has been opened; the board has not been inserted properly; the version has not been downloaded

ENUM2

Yellow

CPU_B board extraction indicator


Buttons Table 47 explains the CMP board panel buttons.

112


Chapter 4 - Boards

T A B L E 4 7 – C M P B O A R D P A N E L B U T T O N S

Name

Description

RST

Board reset

EXCH1

Active/Standby switchover for CPU_B

EXCH2

Active/Standby switchover for CPU_A

Interfaces There are two external interfaces on the CMP board: 

USB1: CPU_B USB interface, not used, bi-directional



USB2: CPU_A USB interface, not used, bi-directional

Digital Trunk Board (DTB) Functions

Functions of DTB are as follows: 





Principle

Provides 32 E1/T1 physical interfaces. Supports 120 Ω /75 Ω resistance selection, and supports coaxial cable and twisted pair. Extracts 8 kHz synchronization clock from a line and transfer it through a cable to CLKG as a reference clock.

Figure 78 shows the working principle of DTB. FIGURE 78 - WORKING PRINCIPLE OF DTB



DTB consists of the following five units.


113




Main control unit It manages connection.



the

boards

and

controls

the

internal

Interface unit It connects with the circuit switching unit, providing Interface E1/T1 and HW.



Circuit switching unit It switches over the circuit HW of the interface unit.



Logic processing unit It implements the logic switchover inside the board and the adaptation function.



Clock processing unit It receives the clock sent from backplane and provides it to the board after frequency division and time scheduling.



Board data flow direction E1/T1 data from the line side passes the interface unit processing link layer and is sent to the circuit switching unit for the switching. And then, via the interface unit, the data is sent to UIMU/GUIM board, vice versa.

Board Description

Panel RDTB is the rear board of DTB. Figure 79 shows the diagrams of DTB panel, board layout and RDTB panel.

114


Chapter 4 - Boards

F I G U R E 7 9 – D T B ( V E R S I O N 0 4 0 5 0 1 ) A N D R D T B P A N E L

DTB

S1

ENUM RUN ACT

ON

ALM

S2

RST

ON

E1

L1

L2

L3

L4

L5

L6

L7

L8

L9

L10

62 69520 02 700

S3

RDTB

ON S4

L11 L12

ON

L13 L14 L15 L16

S5 ON E1

L17 L18 L19 L20 L21 L22 L23 L24 L25 L26

S7

ON

S8

ON

S10

ON

S11

ON

L27 L28 L29 L30 L31 L32

T1/E1 1-16

S6 ON S9 ON S12 T1/E1 17-32

ON

2 3 2 G U B E D / T U O K 8

X23

1

2

1. DTB Panel

3

3. RDTB Panel

2. DTB Board Layout (version 040501)

The DTB board has two versions: version 040501 and version 060201. The difference between them is that the DTB board (version 060201) does not has DIP switches, Figure 80 shows the jumper layout on DTB board (version 060201).


115


F I G U R E 8 0 – D T B ( V E R S I O N 0 6 0 2 0 1 ) P A N E L

X18 X19

Indicators There are 36 indicators on DTB panel. Table 48 explains the DTB panel indicators. T A B L E 4 8 – D T B P A N E L I N D I C A T O R S

Indicator

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30

ALM

Red

Alarm indicator


ENUM

Yellow


Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened while the board is

116


Chapter 4 - Boards

Indicator

Color

Meaning

Description running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

ACT

Green


ON: Indicates the board is active OFF: Indicates the board is standby OFF: indicates that this E1 is not configured in the database

L1 ~ L32

Green

E1 indicator

Always ON: indicates that this E1 is configured in the database, but this E1 can not be connected Indicator 1 Hz flashing (slowly): indicates that this E1 is configured in the database, and this E1 can be connected

Buttons Table 49 explains the DTB panel buttons. T A B L E 4 9 – D T B P A N E L B U T T O N S

Button

Description

RST

Reset switch

Interfaces Table 50 explains the DTB panel interfaces. T A B L E 5 0 – D T B P A N E L I N T E R F A C E S

Location

RDTB panel

Jumpers and DIP Switches

Interface

Direction

Description

T1/E1 1 ~ 16 T1/E1 17 ~ 32

Bidirectional

32 × E1 Interface to connect the external system

8KOUT/DEGUG232

Bidirectional

Leads out 8 K reference clock signal and RS232 serial port debugging signal

Jumpers on DTB DTB board (version 040501) has a jumper (X23) for board debugging, and its position is shown in Figure 79. X23 must be disconnected when the board is working normally.


117


DTB board (version 060201) has two jumpers (X18 and X19) for board debugging, and their positions are shown in Figure 80. The board enters debugging mode if any one of X18 and X19 is short circuited. X18 and X19 must be disconnected when the board is working normally. Jumpers on RDTB Figure 81 shows the jumpers on RDTB panel. F I G U R E 8 1 – J U M P E R S O N R D T B P A N E L

1 3 5

X9

2 4 6

7

8

9

10

1 1 1 2 1 3 1 4 1 5 1 6

1

2

1 3 5

X10

2 4 6

7

8

9

10

1 1 1 2 1 3 1 4

3

4

1 5 1 6

1 3 5

5

6

X11

13

14

15

16

3

X12

6

12

5

8

4

8 10

1

7

2

7 9 11

2 4 6

7

8

9

10

1 1 1 2 1 3 1 4 1 5 1 6

1

9

11

10

3 5

X13

12

4 6 8

9

10 12

13

14

15

16

1 3 5

X14

2

7

11

2 4 6

7

8

9

10

1 1 1 2 1 3 1 4

13

14

1 5 1 6

1 3 5

15

16

X15

4 6 8

9

10 12

13

14

15

16

1 3 5

X16

2

7

11

2 4 6

7

8

9

10

1 1 1 2 1 3 1 4 1 5 1 6

E1 line on RDTB adopts the 75 Ω unbalanced coaxial transmission mode by default. The originating end connects the protection ground through jumpers and receiving end connects to a capacitor and then protection ground through jumpers. Specific implementation is selected through jumpers of X9 to X16 on RDTB. Table 51 explains the selection of X9 to X16. T A B L E 5 1 – C O N N E C T I O N M O D E S O F X 9 T O X 1 6

118

Connection Mode

Description

1-2

Connecting E1_TX (N) –R to protection ground (Nth line)

3-4

Connecting E1_RX (N) –R to protection ground (Nth line)

5-6

Connecting E1_TX (N+1) –R to protection ground (Nth+1 line)

7-8

Connecting E1_RX (N+1) –R to protection ground (Nth+1 line)


Chapter 4 - Boards

Connection Mode

Description

9-10


11-12


13-14


15-16


Note: Connecting blocks of jumpers X9 to X16 on RDTB must be removed if E1 adopts 120 Ω PCM balanced transmission mode.

DIP Switches There are 12 4-digit DIP switches on DTB. Eight 4-digit DIP switches (S1-S6, S9 and S12) are to select impedance matching resistance for each E1: 75 W or 120 W. Line impedance is 75

Ω if

Line impedance is 120

DIP switch is set to ON.

Ω if

DIP switch is set to OFF.

Two 4-digit DIP switches (S7 and S8) are to indicate receiving matching impedance of each E1 chip for CPU. Matching impedance of corresponding E1 is 75 switch is set to ON.

Ω

if DIP

Matching impedance of corresponding E1 is 120 switch is set to OFF.

Ω

if DIP

Each DIP switch corresponds to one E1 chip: S7 corresponds to E1 chips 1 to 4 (E1 channels 1 to 16) S8 corresponds to E1 chips 5 to 8 (E1 channels 17 to 32) CPU reads this status during power-on and initiates each E1 chip according to this status. Two 4-digit DIP switches (S10 and S11) are to indicate long/short line status of each E1 chip for CPU. Corresponding E1 chip (four E1 channels in total) is in SHORT HAUL mode if DIP switch is set to ON. Corresponding E1 chip is in LONG HAUL mode if DIP switch is set to OFF. Each DIP switch corresponds to one E1 chip: S10 corresponds to E1 chips 1 to 4 (E1 channels 1 to 16) S11 corresponds to E1 chips 5 to 8 (E1 channels 17 to 32)


119


CPU reads this status during power-on and initiates each E1 chip according to this status.

Gigabit Line Interface Board (GLI) GLI is a GE interface board, providing internal interfaces to switching shelves, resource shelves/gigabit resource shelves, and external interfaces.

Functions

Functions of GLI board are as follows: 



Principle

Implements functions such as physical layer adaptation, IP packet check, fragmentation, transfer management, and traffic management. GLI has processing capability orientation such as 2.5 Gbps line-speed processing and transfer, and 1 kbps stream traffic management.

Figure 82 shows the working principle of GLI. FIGURE 82 - WORKING PRINCIPLE OF GLI

GE

光口光接口单元

以太网接口单元

业务处理单元

对列管理单元

高速串行链路

逻辑单元



GLI consists of the following five units. 

Optical interface unit It provides GE optical interface and supports physical backup.



Logic unit It implements all logic processing functions of the boards.



Ethernet interface unit It implements GE PHY and MAC functions.



Service processing unit Implement the query, fragmentation, forwarding, and traffic management of bi-directional IP packet.



Queue management unit It manages the queue bi-directionally.



120



Chapter 4 - Boards





GLI receives the media plane data from the resource shelf/gigabit resource shelf via the optical interface. The data in the direction from GE optical port to the board is sent to the switching interface after being processed by service processing unit, and then sent to the PSN switching network board via high speed link. In the direction from PSN board to GLI, the data is transmitted by corresponding optical port after being processed and framed by the service processing unit.

Board Description

Panel Figure 83 shows the GLI board panel diagram.


121


F I G U R E 8 3 – G L I P A N E L

GLI

Indicators There are 20 indicators on GLI board panel. Table 52 explains the GLI board panel indicators.

122


Chapter 4 - Boards

T A B L E 5 2 – G L I B O A R D P A N E L I N D I C A T O R S

Indicator Name

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30

ALM

Red

Alarm indicator


ENUM

Yellow

Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running


Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened while the board is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

ACT

ACT1-8

SD1-8

ON: indicates the board is active

Green


Green

Optical interface activation indicator

ON: indicates that the logic is still abnormal

Green

Optical signal indicator

OFF: indicates the board is standby

Flashing: sending or receiving data ON: indicates optical interface has received optical signals OFF: indicates optical interface has not received optical signals

Buttons Table 53 explains the GLI board panel buttons. T A B L E 5 3 – G L I B O A R D P A N E L B U T T O N S

Indicator

Description

RST

Reset switch

EXCH



123


Interfaces Table 54 explains the GLI board interfaces. T A B L E 5 4 – G L I B O A R D I N T E R F A C E S

Location

GLI panel

Interface

8 pairs TX-RX

of

Direction

Description

Bidirectional

8 × STM-1 optical interface; connected with UIMU on each resource shelf or GUIM on each gigabit resource shelf

E1 IP Interface Board (EIPI) Functions

Principle

EIPI board provides E1/T1-based IP access, which is realized by EIPI working together with DTB. The EIPI board does not have external interface and rear board. One EIPI combines with two DTBs to provide at most 64 E1/T1 interfaces.

Figure 84 shows the working principle of EIPI. F I G U R E 8 4 – W O R K I N G P R I N C I P L E O F E I P I

HPS subcard

HW

DEBUGRS232 Controlplane FE UserplaneFE UserplaneGE

Logicunit Service processing unit



EIPI consists of three units: 

124

Service processing unit


Chapter 4 - Boards

It processes related protocol and implements the isolation of user plane and control plane. 

Logic unit It implements all logical processing function of the board.



Interface unit EIPI does not provide external interface.



Data flow direction The interface unit accesses HW data, and sends the data to HPS subcard. After being processed by HDLC protocol, the data is sent to the service processing unit and separated to be user plane data and control plane data. The user plane data is sent to GUP2 for processing via user plane switching network and the control plane data is sent to CMP for processing via control plane switching network.

Board Description

Panel EIPI board does not have corresponding rear board. Figure 85 shows the panel diagram of EIPI.


125


F I G U R E 8 5 – E I P I P A N E L

EIPI ENUM RUN ACT ALM EXCH RST

Indicators There are 4 indicators on the EIPI panel. Table 55 explains the EIPI board panel indicators. T A B L E 5 5 – E I P I P A N E L I N D I C A T O R S

Indicator

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30

ALM

Red

Alarm indicator

Refer to Table 30

Yellow


Always ON: indicates that tack switch has been opened; the board has not been inserted properly; the version has not

ENUM

126


Chapter 4 - Boards

Indicator

Color

Meaning

Description been downloaded Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened while the board is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

ACT

Green



Buttons Table 56 explains the EIPI panel buttons. T A B L E 5 6 – E I P I P A N E L B U T T O N S

Indicator

Description

RST

Board reset

EXCH


Interfaces The EIPI board does not provide external interface.

GE IP Interface Board (GIPI) Functions

GIPI board provides IP interface between ZXG10 iBSC and BTS, SGSN, and MSC/MGW. Each GIPI board provides one external GE interface. According to functions, the GIPI board is divided into the following three types of functional boards:

Principle



Abis Interface Gigabit IP Interface Board (IPBB)



A-Interface Gigabit IP Interface Board (IPAB)



Gb Interface Gigabit IP Interface Board (IPGB)

Figure 86 shows the working principles of GIPI.


127


F I G U R E 8 6 – W O R K I N G P R I N C I P L E O F G I P I



GIPI consists of three units: 

Service processing unit It processes related protocol and implements the isolation of user plane and control plane.



Logic unit It implements all logical processing function of the board.



Interface unit GIPI provides one external GE interface.



Data flow direction The interface unit accesses data. The data is sent to the service processing unit and separated to be user plane data and control plane data. The user plane data is sent to GUP2 for processing via user plane switching network and the control plane data is sent to CMP for processing via control plane switching network.

Board Description

Panel The rear board of GIPI is RGER and RMNIC. Usually, GIPI uses RGER as the rear board; when iBSC needs to connect with OMCB or MR, GIPI uses RMNIC as the rear board. Figure 87 shows the panel diagram of GIPI.

128


Chapter 4 - Boards

F I G U R E 8 7 – G I P I , R G E R , R M N I C P A N E L S

GIPI ENUM RUN ACT ALM EXCH RST

RGER

RMNIC 1 E F

TX ACT RX SD

2 E F

3 E F

4 E F

1 E G

2 E G

E F G U B E D 2 3 2 1 G U B E D

CLASS 1

2 3 2 2 G U B E D

1. GIPI Panel

2 3 2 C M P r P 2 3 2

M R A / T U O K 8

2. RGER Panel

3. RMNIC Panel

Indicators There are 6 indicators on the GIPI panel. Table 57 explains the SDTB panel indicators. T A B L E 5 7 – G I P I P A N E L I N D I C A T O R S

Indicator

Color

Indication

Description

RUN

Green

Running Indicator

Refer to Table 30

ALM

Red

Alarm indicator

Refer to Table 30

Board Extraction Indicator

Always ON: indicates that tack switch has been opened; the board has not been inserted properly; the version has not been downloaded

ENUM

Yellow


129


Indicator

Color

Indication

Description Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened while the board is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

ACT

SD

ACT

Green


Green


Green

Optical interface activation indicator

ON: board is active OFF: board is standby ON: indicates that the optical interface has received optical signals. OFF: indicates that the optical interface has not received optical signals. ON: indicates that the logic is still abnormal Flashing: sending or receiving data

Buttons Table 58 explains the GIPI panel buttons. T A B L E 5 8 – G I P I P A N E L B U T T O N S

Indicator

Description

RST

Board reset

EXCH


Interfaces The rear board RGER provides one gigabit Ethernet interface for the external network. Table 59 explains the GIPI board interfaces. T A B L E 5 9 – G I P I B O A R D I N T E R F A C E S

130

Location

Interface

Direction

Description

GIPI panel

TX-RX

Bidirectional

Gigabit Ethernet optical interface, connected with BTS, SGSN, MSC/MGW.


Chapter 4 - Boards

Location

Interface

Direction

Description TX-RX and GE1 can not be enabled at the same time.

GE1

Bidirectional

Gigabit Ethernet electrical interface, connected with BTS, SGSN, MSC/MGW. GE1 and TX-RX can not be enabled at the same time.

RGER panel

GE2

Bidirectional

Gigabit Ethernet interface, not used.

DEBUG1232

Bidirectional

Debugging Ethernet interface, connected with the debugging computer, not used.

DEBUG2232

Bidirectional

Debugging Ethernet interface, connected with the debugging computer, not used.

Gigabit Universal Interface Module (GUIM) Functions







Principle

Implements control-plane/user-plane Ethernet level-2 switching in the gigabit resource shelf, circuit-domain timeslot multiplexing switching, and gigabit resource shelf management, and provides external interface for the gigabit resource shelf. Provides the clock-driven function inside the gigabit resource shelf. The input PP2S, 8 kHz and 16 MHz signals are distributed to various slots after phase lock and drive, to provide 16 MHz, 8 kHz and PP2S clocks to boards in the gigabit resource shelf. Provides RS-485 management interface to reset boards of the gigabit resource shelf.

Figure 88 shows the working principles for GUIM.


131


F I G U R E 8 8 – W O R K I N G P R I N C I P L E O F G U I M

Timeslot switching unit Internal bus HW RS232 RS485

Logicunit

CPU

Debugging Ethernet Active/standby Ethernet

PCIbus

Control plane Ethernet

Userplane Ethernet

User planeFE



User plane GE

Control plane FE

GUIM consists of the following four units: 

CPU It connects with TS switching unit, logic unit, and Ethernet switching unit via the control bus. It configures the switching unit and manages the gigabit resource shelf. It provides debugging and active/standby external Ethernet interface, RS232 and RS485 serial port.



Logic unit It implements all logic processing of the board.



Timeslot (TS) switching unit It implements 16 K circuit switching and provides an internal circuit switching net for the gigabit resource shelf.



Ethernet switching unit It implements the user-plane/control-plane Ethernet switching function on the gigabit resource shelf.



Board data flow direction The external data is from boards on the shelf where UIMU locates. It enters Ethernet switching unit or TS switching unit for switching, and then is sent to the target board or level-1 switching interface board.

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Chapter 4 - Boards

Board Description

Panel The rear board of GUIM is RGUM1 and RGUM2. Figure 89 shows the panel diagrams of GUIM, RGUM1, and RGUM2. F I G U R E 8 9 – G U I M , R G U M 1 , R G U M 2 P A N E L S

GUIM ENUM

RUN

A C T

A LM EXCH RST

AC T- P

TX 1 RX 1

RGUM1

RGUM2

TX 2 RX 2

TX 3 R X3 1 E F

TX 4

2 E F

R X4 3 E F

AC T- T

5 E F

N I K L C

L1

L2

L3

L4

L5

L6

2 3 2 G U B E D

1. GUIM panel

4 E F

6 E F

N I K L C

2 3 2 G U B E D

2. RGUM1 panel

3. RGUM2 panel

Indicators Table 60 explains the GUIM panel indicators.


133


T A B L E 6 0 – G U I M P A N E L I N D I C A T O R S

Indicator

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30

ACT

Green


ALM

Red

Alarm indicator

ON: Indicates the board is active OFF: Indicates the board is standby Refer to Table 30 Always ON: indicates that tack switch has been opened; the board has not been inserted properly; the version has not been downloaded

ENUM

Yellow



ACT-P

ACT

SD

ACT

134

Green

Packet domain indicator

Green

GE interface 1 status indicator

Green

GE interface 1 optical signal indicator

Green



ON: indicates that GUIM packet domain is active OFF: indicates that GUIM packet domain is standby ON: indicates that the current optical interface is activated OFF: indicates that the current optical interface is not activated ON: indicates that the optical module has received the optical signal OFF: indicates that the optical module has not received the optical signal ON: indicates that the current optical interface is activated OFF: indicates that the current optical interface is not activated

Chapter 4 - Boards

Indicator

SD

ACT

SD

ACT

SD

ACT-T

L1 ~ L6

Color

Meaning

Green


Green


Green


Green


Green


Green

Circuit domain indicator

Green

Status indicator of control plane cascade interface 1 ~6

Description ON: indicates that the optical module has received the optical signal OFF: indicates that the optical module has not received the optical signal ON: indicates that the current optical interface is activated OFF: indicates that the current optical interface is not activated ON: indicates that the optical module has received the optical signal OFF: indicates that the optical module has not received the optical signal ON: indicates that the current optical interface is activated OFF: indicates that the current optical interface is not activated ON: indicates that the optical module has received the optical signal OFF: indicates that the optical module has not received the optical signal ON: indicates that the GUIM circuit domain is active OFF: indicates that the GUIM circuit domain is standby ON: Control plane cascade 100 Mbps interface 1 ~ 6 is connected OFF: Control plane cascade 100 Mbps interface 1 ~ 6 is not connected

Buttons Table 61 explains the GUIM panel buttons. T A B L E 6 1 – G U I M P A N E L B U T T O N S

Button

Description

RST

Board reset

EXCH



135


Interfaces Table 62 explains the GUIM board interfaces.

T A B L E 6 2 – G U I M B O A R D I N T E R F A C E S

Location GUIM panel

Interface

Direction

Description

Bidirectional

Optical fiber connection between the front board and GLI of the switching unit, the user plane used 4×1 Gbps optical interface.

Bidirectional

Provides one cascading network port (through the two rear boards in active and standby slots), connected to CHUB on the control shelf or UIMC.

Bidirectional

Provides external network ports (the two rear boards in active and standby slots each provides one), and can be used as DEBUG network port.

Bidirectional

Provides external network ports (the two rear boards in active and standby slots each provides one).

CLKIN

Input

Connected with the clock board and transmits 8 Kbps/16 Mbps/PP2S clock signals.

DEBUG232

Bidirectional

Debugging serial port for CPU system; connected to the debug machine.

FE2

Bidirectional

Provides one cascading network port (through the two rear boards in active and standby slots), connected to CHUB on the control shelf or UIMC, and can be used as DEBUG network port.

FE4

Bidirectional


FE6

Bi-

Provides external network

4 pairs of RX-TX

FE1

FE3 RGUM1 panel FE5

RGUM2 panel

136


Chapter 4 - Boards

Location

Interface

Direction

Description

directional

ports (the two rear boards in active and standby slots each provides one).

CLKIN

Input


DEBUG232

Bidirectional


Operation and Maintenance Processing Board (OMP) Functions





Principle

Board Description

Implements all the operation and maintenance processes and related controls, and connects with OMM through 100 Mbps Ethernet. Monitors and manages the boards, and manages board configuration through Ethernet and RS485 links.

Refer to the principle of Control Main Processing Board (CMP), the difference is that CPU_A provides hard disk.

Panel In OMP board, CPU_A provides hard disk, while CPU_B does not. RMPB is the rear board of OMP. Figure 90 shows the diagram of OMP board panel, board layout, and RMPB panel.


137


F I G U R E 9 0 – O M P A N D R M P B P A N E L S

1. OMP panel

2. OMP board layout

3. RMPB panel

Indicators Table 63 explains the OMP board panel indicators. T A B L E 6 3 – O M P B O A R D P A N E L I N D I C A T O R S

Indicator

Color

Full Name

Description

ALM1

Red

CPU_A alarm indicator

Refer to Table 30

Green

CPU_A running indicator

Refer to Table 30

Green

CPU_A active/stand by indicator

RUN1

ACT1

ENUM1

138

Yellow

CPU_A board extraction indicator


ON: Indicates the board is active OFF: Indicates the board is standby Always ON: indicates that tack switch has been opened; the board has not been inserted properly; the version has not been downloaded Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has

Chapter 4 - Boards

Indicator

Color

Full Name

Description been opened while the board is running Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened while the board is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

HD1

Red

Hard disk indicator 1

Flashing at 5 Hz (fast): indicates CPU_B is working

ALM2

Red

CPU_B alarm indicator

Refer to Table 30

RUN2

Green

CPU_B running indicator

Refer to Table 30

Green

CPU_B active/stand by indicator

ACT2

ON: Indicates the board is active OFF: Indicates the board is standby Always ON: indicates that tack switch has been opened; the board has not been inserted properly; the version has not been downloaded

ENUM2

Yellow

CPU_B board extraction indicator


HD2

OMC1

OMC2

Red

Hard disk indicator 2

Flashing at 5 Hz (fast): indicates CPU_A is working

Green

OMC network port indicator 1

ON: indicates that OMC network port 1 has been connected

Green

OMC network port indicator 2

ON: indicates that OMC network port 2 has been connected


139


Buttons Table 64 explains the OMP board panel buttons. T A B L E 6 4 – O M P P A N E L B U T T O N S

Name

Description

RST

Board reset

EXCH1

Active/Standby switchover for CPU_B

EXCH2

Active/Standby switchover for CPU_A

Interfaces Table 65 explains the OMP and RMPB panel interfaces. T A B L E 6 5 – O M P B O A R D I N T E R F A C E S

Location

OMP Panel

RMPB panel

140

Interface

Direction

Description

USB1

Bidirectional

-

USB2

Bidirectional

-

OMC1

Bidirectional

External Ethernet network interface for CPU_A, not used.

OMC2

Bidirectional

1 × 100 Mbps Ethernet interface, connected to OMM.

GPS485

Bidirectional

Connected to GPS function module (unavailable at the moment).

PD485

Bidirectional

Connected to RS485 interface on PDM (Up).

RS232

Bidirectional

Out-of-band management serial port.

DEBUG1232

Bidirectional

Debugging serial port for CPU_A, connected to the debug machine.

DEBUG2232

Bidirectional

Debugging serial port for CPU_B, connected to the debug machine.


Chapter 4 - Boards

Packet Switching Network (PSN) Board Functions





Principle

Supports bi-directional user data switching at the rate of 40 Gbps in each direction. Implements 1+1 load sharing.

Figure 91 shows the working principle of PSN. FIGURE 91 - WORKING PRINCIPLE OF PSN



PSN consists of the following three units: 

CPU It connects with UIMC via one FE for operation and maintenance and with the matrix switching unit via the control bus for basic configuration and management.



Logic unit It implements the required logical functions inside the boards.



Matrix switching unit It provides external high-speed serial link, connecting with GLI and realizing the data switching path.





141


The data from GLI is sent to the matrix switching unit via the high-speed serial link on the backplane. After the switching, the data is sent to the target GLI.

Board Description

Panel Figure 92 shows the diagram of PSN board panel. F I G U R E 9 2 – P S N B O A R D P A N E L

PSN

Indicators There are four indicators on the PSN board panel. Table 66 explains the PSN board panel indicators. T A B L E 6 6 – P S N B O A R D P A N E L I N D I C A T O R S

Indicator Name

142

Color

Meaning

Description


Chapter 4 - Boards

Indicator Name

Color

Meaning

Description

RUN

Green

Running indicator

Refer to Table 30

ALM

Red

Alarm indicator


ENUM

Yellow



ACT

Green

Active/sta ndby indicator

ON: indicates the board is active OFF: indicates the board is standby

Buttons Table 67 explains the buttons on the PSN board panel. T A B L E 6 7 – P S N B O A R D P A N E L B U T T O N S

Indicator

Description

RST

Board reset

EXCH


Power Distribution Board (PWRD) Functions









Provides -48 V power to shelves and fans inside the cabinet. Detects rack power and the environment, and generates alarms accordingly. Detects and control the fans. PWRD is monitored and managed by OMP through RS485 interface. It reports the detected information to OMP and


143


indicates through indicators on the power distribution plug-in box panel.

Principle

Figure 93 shows the working principle of PWRD. F I G U R E 9 3 – W O R K I N G P R I N C I P L E O F P W R D

By structure, PWRD falls into the following parts: one PDM, one PWRD, one PWRDB and four fan group control modules. 



PDM implements filter, lightning protection and isolation on 2-channel -48 V, sends it to the busbar to supply shelves, samples and sends the samples to PWRD for over-/undervoltage monitoring before the 2-channel power supply convergence. PWRD detects the 2-channel -48 V over-/under-voltage, speed of 24 fans, ambient temperature, ambient humidity, smoke alarm, infrared alarm, cabinet, and equipment room door control. PDM and PWRD form a power distribution plug-in box.



2 × 3 fan group and the fan group control module form a fan plug-in box. Fan plug-in box takes -48 V from the busbar and sends fan monitoring signals to PWRD.



Board Description

144

PWRDB provides external monitoring signal interface for PWRD, accessing the system monitoring signals.

Panel Figure 94 shows the diagram of PWRD board panel.


Chapter 4 - Boards

F I G U R E 9 4 – P W R D B O A R D P A N E L

Reset switch

S2 BOOT

C51

FLASH

S3

DIP Switches and Jumpers PWRD has two DIP switches: 

S2



S3

S2 configuration switch is used to set working mode (normal or debugging), with ON being 0 and OFF being 1. ON is labeled on the switch. The default value of the configuration switch is 0100. Users need not set this DIP switch. S3 switch is used to set the communication address for 485 and OMP, with ON being 0 and OFF being 1. The default value of the switch is 0000. The 4-digit switch is used to set the 16 addresses (0-15), corresponding to the rack number where the board is.

There is a 2 × 5 feet pin on PWRD, serving as a connection jumper X8 for 485 signals. When ZXG10 iBSC system uses multiple cabinets, it is necessary to set the working mode for 485 bus of PWRD according to rack positions. Resistance terminals are necessary if PWRD is at the end of the 485 bus. 485 signals need to be transmitted to output if PWRD is at the middle of the bus. Figure 95 shows the default jumper settings.


145


F I G U R E 9 5 – J U M P E R S E T T I N G S

Specific jumper connections are as follows: For 485 bus end node: connect pins 1 to 2 and 9 to 10. For 485 bus middle node, 485 single transmission: connect pins 3 to 4 and 7 to 8.

Note: After changing the DIP switch setting and the jumper setting, press the reset switch to reset the board.

Server Board (SBCX) Functions









Principle

146

Provides interfaces for keyboard, mouse, and VGA. CPU is Sossaman dual-channel dual-core processor, with a main frequency of 2 GHz. Supports multiple operating systems, including Windows XP/2000/2003/Linux and Soloris operating system. Provides 3 FE interfaces, 2 GE interfaces, and 1 RS232 serial port.



Provides 4 universal USB interfaces.



Supports booting from hard disk and USB.

Figure 96 shows the working principle of SBCX.


Chapter 4 - Boards

F I G U R E 9 6 – W O R K I N G P R I N C I P L E O F S B C X B O A R D

CPUdualcore system

Peripheral device interface unit

keyboardPS/2 mous PS/2 e USB VGA FE1-3

External interface unit

SAS controller



GE1-2 RS232

SAShard disk1 SAShard disk2

SBCX consists of the following five units. 

CPU dual-core system It is the core processing module of the board, including CPU, memory controller, and main storage.



Peripheral device interface unit It provides various external interfaces, including PS/2 interface, USB interface, and VGA interface.



External interface unit It provides 3 FE interfaces, 2 GE interfaces, and 1 RS232 serial port.



SAS controller It provides SAS hard disk interface, realizes the SAS hard disk RAID 0/1.



SAS hard disk It saves service data.

Board Description

Panel RSVB is the rear board of SBCX. Figure 97 shows the SBCX and RSVB panels.


147


F I G U R E 9 7 – S B C X A N D R S V B P A N E L S

SBCX E NU M R UN ACT

ALM EXCH

RST

HD PWR PWB

RSVB SAS1 ALM1

1 C M O

ENUM1

2 C M O

RX1 ACT

1 P M O

TX1 SD

RX2

1 T R A E H

ACT

TX2 SD

2 T R A E H 2 3 2 S R

KB

MS

SAS2 ALM2

USB1 USB2

ENUM2

VGA

CLASS1

USB1 USB2

1

2

1. SBCX panel

2. RSVB panel

Indicators Table 68explains the SVR panel indicators. T A B L E 6 8 – S B C X P A N E L I N D I C A T O R S

148

Indicator Name

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30, not used

ALM

Red

Alarm indicator

Refer to Table 30, not used


Chapter 4 - Boards

Indicator Name

Color

Meaning

Description Always ON: indicates that tack switch has been opened; the board has not been inserted properly; the version has not been downloaded

ENUM

Yellow



ACT

Green


ON: indicates the board is active OFF: indicates the board is standby Not used

HD

PWR

SAS1

ALM1

SAS2

Green

IDE hard disk indicator

Green

Board power indicator

Green

SAS hard disk 1 read/write indicator

Yellow

SAS hard disk 1 fault indicator

Green

SAS hard disk 2 read/write indicator

ON: IDE hard disk is being accessed OFF: IDE hard disk is idle It is prohibited to unplug the board when HD is ON. ON: board is power-on OFF: board is power-off ON: SAS hard disk 1 is being accessed OFF: SAS hard disk 1 is idle ON: SAS hard disk1 is not in position or is faulty OFF: SAS hard disk 1 is normal ON: SAS hard disk 2 is being accessed OFF: SAS hard disk 2 is idle


149


Indicator Name

Color

Meaning

Description ON: SAS hard disk2 is not in position or is faulty

ALM2

Yellow

SAS hard disk 2 fault indicator

ACT

Green

FC interface 1 running indicator

Not used

SD

Yellow

FC interface 1 rate indicator

Not used

ACT

Green

FC interface 2 running indicator

Not used

SD

Yellow

FC interface 2 rate indicator

Not used

OFF: SAS hard disk 2 is normal

Buttons Table 69 explains the SBCX panel buttons. T A B L E 6 9 – S B C X P A N E L B U T T O N S

Name

Instruction

RST

Reset switch

EXCH

Active/standby changeover switch

PWB

Board power Switch

ENUM1

Board-unplugging switch of SAS hard disk 1

ENUM2

Board-unplugging switch of SAS hard disk 2

Interfaces Table 70 explains the SBCX board interfaces. T A B L E 7 0 – S B C X I N T E R F A C E S

Position

SBCX panel

RSVB

150

Interface Name

Direction

Instructions

USB1

Bidirectional

USB Interface

USB2

bidirectional

USB Interface

KB

Input

PS/2 Keyboard Interface

MS

Input

PS/2 Mouse Interface

VGA

Output

Analog Monitor Interface

Two pairs of TX-RX

-

Not used

OMC1

Bidirectional

External Network Port1


Chapter 4 - Boards

Position

Interface Name

Direction

Instructions

panel

OMC2

Bidirectional


OMP1

Bidirectional


HEART1

Bidirectional


HEART2

Bidirectional


RS232

Bidirectional

RS232 serial port

USB1

Bidirectional

USB interface

USB2

Bidirectional

USB interface

SONET Digital Trunk Board (SDTB) Functions







Principle

Provides one 155 Mbps STM-1 interface. Processes Channel Associated Signal (CAS) and Common Channel Signaling (CCS). Provides two channels of differential 8 kHz synchronization clock signal as the reference clock of the clock board.

Figure 98 shows the working principle of SDTB. F I G U R E 9 8 – W O R K I N G P R I N C I P L E O F S D T B

控制面 FE，RS232，RS485 主控单元

时钟

时钟处理单元

逻辑处理单元

背板 STM-1

电路交换单元

接口单元



SDTB consists of the following five units. 

Main control unit It manages connections.

the

board

and

controls

the

internal


151




Interface unit It is connected with circuit switching unit, and provides STM-1 interface.



Circuit switching unit The circuit switching unit realizes switching function.



Logic processing unit It implements the logical conversion and adaptation inside the board.



Clock processing unit It receives the clock from system clock board, and provides the reference clock signal extracted from STM-1.



Board data flow direction From the receiving direction, the STM-1 optical data from the line side is processed by the interface unit, sent to the circuit switching unit for switching, and then sent to the UIMU/GUIM board, vice versa.

Board Description

Panel The rear board of SDTB is RGIM1. Figure 99 shows the SDTB and RGIM1 panels.

152


Chapter 4 - Boards

F I G U R E 9 9 – S D T B A N D R G I M 1 P A N E L S

SDTB ENUM RUN ACT ALM EXCH RST

RGIM1

TX ACT

RX SD

2 3 2 G U B E D / T U O K 8

CLASS1

1

2

1. SDTB panel

2. RGIM1 panel

Note: If it does not require to extract the 8 K clock reference from SDTB, then RGIM1 is not be used. If it requires to extract the 8 K clock reference from SDTB, then RGIM1 is used.

Indicators There are 6 indicators on the SDTB panel. Table 71 explains the SDTB panel indicators. T A B L E 7 1 – S D T B P A N E L I N D I C A T O R S

Indicator

Color

Indication

Description

RUN

Green

Running

Refer to Table 30


153


Indicator

Color

Indication

Description

Indicator ALM

Red

Alarm indicator


ENUM

Yellow

Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running


Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened while the board is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

ACT

ACT

SD

Green

Board Active/Standby indicator

Green

Optical module Active/Standby indicator

Green


On: board is active Off: board is standby On: optical interface is active Off: optical interface is standby ON: indicates optical board has received optical signals OFF: indicates optical board has not received optical signals

Buttons Table 72 shows the SDTB panel buttons. T A B L E 7 2 – S D T B P A N E L B U T T O N S

Button Name

Description

EXCH


RST

Board reset

Interfaces Table 73 explains the SDTB interfaces.

154


Chapter 4 - Boards

T A B L E 7 3 – S D T B I N T E R F A C E S

Position

Interface Name

Direction

Instruction

SDTB panel

TR-TX

Bidirectional

155 Mbps STM-1 standard interface

RGIM1 panel

8KOUT/DEBUG232

Bidirectional

Leads out the 8 K reference clock signal and RS232 serial port debugging signal

SONET Digital Trunk Board (SDTB2) Functions







Principle

Provides two 155 Mbps STM-1 interface. Processes Channel Associated Signal (CAS) and Common Channel Signaling (CCS), provides an access processing capability of 126 E1s or 168 T1s. Provides two channels of differential 8 kHz synchronization clock signal as the reference clock of the clock board.

Figure 100 shows the working principle of SDTB2. F I G U R E 1 0 0 – W O R K I N G P R I N C I P L E O F S D T B 2

ControlplaneFE,RS232, RS485

Main controlunit

Cloc k

Clock processing unit

Logic processingunit

HW HW STM-1 STM-1



Circuit switching unit

Interfaceunit

HW

SDTB2 consists of the following five units. 

Main control unit It manages connections.



the

board

and

controls

the

internal

Interface unit


155


It is connected with circuit switching unit, and provides STM-1 interface. 

Circuit switching unit The circuit switching unit realizes switching function.



Logic processing unit It implements the logical conversion and adaptation inside the board.



Clock processing unit It receives the clock from system clock board, and provides the reference clock signal extracted from STM-1.



Board data flow direction From the receiving direction, the STM-1 optical data from the line side is processed by the interface unit, sent to the circuit switching unit for switching, and then sent to the GUIM board, vice versa.

Board Description

Panel The rear board of SDTB2 is RGIM1. Figure 101 shows the SDTB2 and RGIM1 panels.

156


Chapter 4 - Boards

F I G U R E 1 0 1 – S D T B 2 A N D R G I M 1 P A N E L

SDTB2 ENUM RUN ACT ALM EXCH RST

RGIM1

TX1 ACT

RX1 SD

TX2 ACT

RX2 SD

2 3 2 G U B E D / T U O K 8

CLASS 1

1

2

1. SDTB2 panel

2. RGIM1 panel

Note: If it does not require to extract the 8 K clock reference from SDTB2, then RGIM1 is not be used. If it requires to extract the 8 K clock reference from SDTB2, then RGIM1 is used.


157


Indicators There are 8 indicators on the SDTB2 panel. Table 74 explains the SDTB panel indicators. T A B L E 7 4 – S D T B 2 P A N E L I N D I C A T O R S

Indicator

Color

Indication

Description

RUN

Green

Running Indicator

Refer to Table 30

ALM

Red

Alarm indicator


ENUM

Yellow



ACT

ACT

SD

ACT

SD

158

Green

Board Active/Standby indicator

On: board is active

Green

Optical module 1 Active/Standby indicator

On: optical interface is active

Green

Optical signal 1 indicator

Green

Optical module 2 Active/Standby indicator

Green

Optical signal 2 indicator


Off: board is standby

Off: optical interface is standby ON: indicates optical board has received optical signals OFF: indicates optical board has not received optical signals On: optical interface is active Off: optical interface is standby ON: indicates optical board has received optical signals OFF: indicates optical board has not received

Chapter 4 - Boards

Indicator

Color

Indication

Description optical signals

Buttons Table 72 shows the SDTB2 panel buttons. T A B L E 7 5 – S D T B 2 P A N E L B U T T O N S

Button Name

Description

EXCH


RST

Board reset

Interfaces Table 73 explains the SDTB2 interfaces. T A B L E 7 6 – S D T B 2 I N T E R F A C E S

Position SDTB2 panel

RGIM1 panel

Interface Name

Direction

Instruction

TR1-TX1

Bidirectional

TR2-TX2

Bidirectional

155 Mbps STM-1 standard interface

8KOUT/DEBUG232

Bidirectional

Leads out the 8 K clock reference signal and RS232 serial port debugging signal

Signaling Processing Board (SPB) Functions

According to functions realized, SPB can be used as LAPD processing board (LAPD), signaling processing board (SPB), and Gb interface processing board (GIPB). 





When SPB is used as LAPD processing board, the LAPD signaling from BTS is accessed by DTB/SPB board, and switched to LAPD board through the circuit switching network on UIMU/UIMC board in the resource shelf. The LAPD board implements the LAPD processing. When SPB is used as signaling processing board, it processes MTP2 and X.25 protocol, and extracts 8 kHz synchronization clock from the line and transmits it through cables to CLKG as clock reference. When SPB is used as Gb interface processing board, it performs Gb interface function and implements GPRS FR and NS processing and part of BSSGP processing.


159


Principle

Figure 102 shows the working principle of SPB. FIGURE 102 - WORKING PRINCIPLE OF SPB

HW E1 interfac Interfac e

eunit




CPU

Controlplane switching unit Userplane switching unit

FE

FE

SPB consists of the following five units: 

Interface Unit It is connected with circuit switching unit, and provides E1 interface.



Circuit switching unit The circuit of the interface unit and backplane realize the switching function.



CPU It implements the function of signaling, management and internal connection control.



board

Control plane switching unit It implements the control plane data switching and provides the control plane FE interface.



User plane switching unit It performs the user plane data switching and provides the user plane FE interface.



Board Data Flow Direction The data from E1 interface or backplane is sent to the circuit switching unit for switching after being processed by the interface unit, then sent to CPU, and at last sent to other board by switching unit for processing.

Board Description

Panel The rear board of SPB is RSPB. Figure 103 shows the diagrams of SPB panel, board layout and RSPB panel.

160


Chapter 4 - Boards

F I G U R E 1 0 3 – S P B P A N E L S

SPB ENUMRUN ACT ALM

RST

E1

L1

L2

L3

L4

L5

L6

L7

L8

L9

L10

S 3 O N

S 4 O N

L11L12 L13L14 L15L16

RSPB

T1/E1 1-16

S 5 O N

S1

S 6 O N

S2 ON

2 3 2 S R 4 U P C

2 3 2 S R 3 U P C

2 3 2 S R 2 U P C

ON

2 3 2 S R 1 U P C / T U O K 8

1

2

1. SPB Panel

2. SPB Board Layout

3 3. RSPB Panel

Indicators There are 20 indicators on the SPB panel. Table 77 explains the SPB panel indicators. T A B L E 7 7 – S P B P A N E L I N D I C A T O R S

Indicator

Color

Indication

Description

RUN

Green

Running Indicator

Refer to Table 30

ALM

Red

Alarm indicator


ENUM

Yellow


Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened


161


Indicator

Color

Indication

Description while the board is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

ACT

Green


ON: board is active OFF: board is standby OFF: indicates that this E1/T1 is not configured in the database

L1 ~ L16

Green

Always ON: indicates that this E1/T1 is configured in the database, but this E1/T1 can not be connected

E1 indicator

Indicator 1 Hz flashing (slow): indicates that this E1/T1 is configured in the database, and this E1/T1 can be connected Indicator 5 Hz flashing (fast): indicates that this E1/T1 is used as link

Buttons Table 78 explains the SPB panel buttons. T A B L E 7 8 – S P B P A N E L B U T T O N S

Button Name

Description

RST

Board reset

Interfaces Table 79 explains the SPB panel interfaces. T A B L E 7 9 - S P B P A N E L I N T E R F A C E S

Location RSPB panel

162

Interface

Direction

Description

T1/E1 1 ~ 16

Bidirectional


8KOUT/CPU1RS232

Bidirectional

Lead out 8K reference clock signal and RS232 serial port debugging signal.

CPU2-RS232

Bidirectional

Lead out RS232 serial port debugging signal.


Chapter 4 - Boards

Location


Interface

Direction

Description

CPU3-RS232

Bidirectional


CPU4-RS232

Bidirectional


DIP Switches There are six 4-digit DIP switches on the SPB board. 







Four digits of S3 respectively represent E1s 1–4 on the SPB board. Four digits of S4 respectively represent E1s 5–8 on the SPB board. Four digits of S5 respectively represent E1s 9–12 on the SPB board. Four digits of S6 respectively represent E1s 13–16 on the SPB board.

S1 and S2 indicate the receiving matching impedance and long/short haul state of each E1 chip respectively. The CPU retrieves the state and initializes the E1 chip according to the state. If S1 is OFF (1 is retrieved), it indicates long haul. If S1 is ON (0 is retrieved), it indicates short haul. If S2 is OFF (1 is retrieved), it indicates that the matching impedance is 120 Ω. If S2 is ON (0 is retrieved), it indicates that the matching impedance is 75 Ω. Channels 1–4 of S1/S2 respectively represent the E1 Chips 1–4 (namely, E1 channels 1–4, 5–8, 9–12, and 13–16).

Jumpers on RSPB SPB supports two types of external trunk cables: 75 Ω co-axial cables and 120 Ω balanced symmetric cables. There are four jumpers on the RSPB panel, as shown in Figure 104.


163


F I G U R E 1 0 4 – J U M P E R S O N R S P B P A N E L

1

3

5

2

4

6

7

8

9

10

11

12

13

14

15

16

1

3

5

2

4

6

7

8

9

10

11

12

13

14

15

16

1

3

5

4

6

8

9

10

11

12

13

14

15

16

1

2

5

7

X12

2

7

3

X11

X13

4

6

8

9

10

11

12

13

14

15

16

X14

If co-axial cables are used, short-circuit blocks should be added to the 32 jumpers of X11, X12, X13 and X14. In other words, the negative end of E1 transmitting differential cable is grounded directly, and the negative end of E1 receiving differential cable is grounded through the capacitor. On RSPB, the E1 line is configured as 75 mode by default.

Ω co-axial

transmission

Table 80 explains the settings of X11 ~ X14. T A B L E 8 0 – R S P B J U M P E R S E T T I N G S

164

Connections for X11 ~ X14

Definitions

1－2

Connecting E1_TX (N) –R to protection ground (Nth line)

3－4

Connecting E1_RX (N) –R to protection ground (Nth line)

5－6


7－8


9－10


11－12

Connecting E1_RX (N+2) –R to protection


Chapter 4 - Boards

Connections for X11 ~ X14

Definitions ground (Nth+2 line)

13－14


15－16


Note: Short-circuit blocks of jumpers X11 ~ X14 on RSPB must be removed if E1 adopts 120 Ω balanced symmetric cables.

Signaling Processing Board (SPB2) Functions

According to functions realized, SPB2 can be used as LAPD processing board (LAPD), signaling processing board (SPB2), and Gb interface processing board (GIPB). 





Principle

When SPB2 is used as LAPD processing board, the LAPD signaling from BTS is accessed by DTB/SPB board, and switched to LAPD board through the circuit switching network on UIMU/UIMC board in the resource shelf or the GUIM board in the gigabit resource shelf. The LAPD board implements the LAPD processing. When SPB2 is used as signaling processing board, it processes MTP2 and X.25 protocol, and extracts 8 kHz synchronization clock from the line and transmits it through cables to CLKG as clock reference. When SPB is used as Gb interface processing board, it performs Gb interface function and implements GPRS FR and NS processing and part of BSSGP processing.

Figure 105 shows the working principle of SPB2. FIGURE 105 - WORKING PRINCIPLE OF SPB2

HW E1 interfac Interfac e

eunit




CPU

Controlplane switching unit Userplane switching unit

FE FE GE

SPB2 consists of the following five units: 

Interface Unit


165


It is connected with circuit switching unit, and provides E1 interface. 

Circuit switching unit The circuit of the interface unit and backplane realize the switching function.



CPU It implements the function of signaling, management and internal connection control.



board

Control plane switching unit It implements the control plane data switching and provides the control plane FE interface.



User plane switching unit It performs the user plane data switching and provides the user plane FE interface and GE interface.



Board Data Flow Direction The data from E1 interface or backplane is sent to the circuit switching unit for switching after being processed by the interface unit, then sent to CPU, and at last sent to other board by switching unit for processing.

Board Description

Panel The rear board of SPB2 is RSPB. Figure 106 shows the diagrams of SPB2 panel, board layout and RSPB panel.

166


Chapter 4 - Boards

F I G U R E 1 0 6 – S P B 2 P A N E L S

SPB ENUM RUN ACT ALM

RST

E1

L1

L2

L3

L4

L5

L6

L7

L8

L9

L10

RSPB

L11 L12 L13 L14 L15 L16

T1/E1 1-16

2 3 2 S R 4 U P C

2 3 2 S R 3 U P C

2 3 2 S R 2 U P C 2 3 2 S R 1 U P C / T U O K 8

1

2

1. SPB2 Panel

2. RSPB Panel

Indicators There are 20 indicators on the SPB2 panel. Table 81 explains the SPB2 panel indicators.


167


T A B L E 8 1 – S P B 2 P A N E L I N D I C A T O R S

Indicator

Color

Indication

Description

RUN

Green

Running Indicator

Refer to Table 30

ALM

Red

Alarm indicator


ENUM

Yellow



ACT

Green


ON: board is active OFF: board is standby OFF: indicates that this E1/T1 is not configured in the database

L1 ~ L16

Green

E1 indicator

Always ON: indicates that this E1/T1 is configured in the database, but this E1/T1 can not be connected Indicator 1 Hz flashing (slowly): indicates that this E1/T1 is configured in the database, and this E1/T1 can be connected Indicator 5 Hz flashing (fast): indicates that this E1/T1 is used as link

Buttons Table 82 explains the SPB2 panel buttons.

168


Chapter 4 - Boards

T A B L E 8 2 – S P B 2 P A N E L B U T T O N S

Button Name

Description

RST

Board reset

Interfaces Table 83 explains the SPB2 panel interfaces. T A B L E 8 3 – S P B 2 P A N E L I N T E R F A C E S

Location

Interface

Direction

Description

T1/E1 1 ~ 16

Bidirectional


8KOUT/CPU1RS232

Bidirectional

Lead out 8K reference clock signal and RS232 serial port debugging signal.

CPU2-RS232

Bidirectional


CPU3-RS232

Bidirectional


CPU4-RS232

Bidirectional


RSPB panel

Universal Interface Module for Control Plane (UIMC) Functions







Principles

Implements Ethernet level-2 switching in control shelf, and manages the control shelf. Provides an internal user plane GE interface to cascade UIMC with CHUB in the control shelf. Provides the clock-driven function inside the control shelf. Input PP2S, 8 kHz and 16 MHz signals are distributed to various slots after phase lock and drive, to provide 16 MHz, 8 kHz and PP2S clocks to the boards.

Figure 107 shows the working principle for UIMC.


169


FIGURE 107 - WORKING PRINCIPLE OF UIMC InternalBus 内部总线

RS232

LogicUnit 逻辑单元

CPU 单元 CPU

RS485 Debugging 调试以太网 Ethernet Active/StandbyEthernet 主备以太网

PCIBus 总线 PCI

以太网交换单元



Userplane 用户面 Ethernet 以太网

Mediaplane 媒体面 ControlPlane 控制面 interconnecti 互连 on GCSSubGCS card子卡

Controlplane 控制面 Ethernet 以太网

Userplane

用户面 FEFE

Controlplane 控制面 FE FE

UIMC consists of the following three units. 

CPU It connects with TS switching unit, logic unit and Ethernet switching unit via the control bus. It configures the switching chipset, configures and manages FPGA, and manages the resource shelf/gigabit resource shelf. It provides external Ethernet interface, RS232 and RS 485 serial port for debugging and active/standby.






Ethernet switching unit It implements the control plane Ethernet switching function on the control shelf or switching shelf.



Board data flow direction The external data is from boards on the shelf where UIMC locates. It enters UIMC Ethernet switching unit for the switching, and then is sent to the target board.

Board Description

Panel The rear boards of UIMC are RUIM2 and RUIM3. Figure 108 shows the panel diagrams of UIMC, RUIM2 and RUIM3.

170


Chapter 4 - Boards

F I G U R E 1 0 8 – U I M C , R U I M 2 , R U I M 3 P A N E L S

UIMC E NU M

R UN

A C T

A L M E X C H R S T

L IN K 1

L IN K 2

L IN K 3

L IN K 4

R U IM 2

LINK5

LINK6

L IN K 7

L IN K 8

L IN K 9

L IN K 1 0

1

2

1. UIMC Panel

R U IM 3 9 E F

0 1 E F

7 E F

8 E F

5 E F

6 E F

3 E F

4 E F

1 E F

2 E F

N I K L C

N I K L C

E F G U B E D

E F G

2 3 2 G U B E D

2 3 2 G U B E D

U B E D

3 2. RUIM2 Panel

3. RUIM3 Panel

Indicators Table 84 explains the UIMC panel indicators. T A B L E 8 4 – U I M C B O A R D I N D I C A T O R S

Indicator

Color

Meaning

Description

RUN

Green

Running indicator

Refer to Table 30

ACT

Green


ALM

Red

Alarm indicator

ON: Indicates the board is active OFF: Indicates the board is standby Refer to Table 30


171


Indicator

Color

Meaning

Description Always ON: indicates that tack switch has been opened; the board has not been inserted properly; the version has not been downloaded

ENUM

Yellow



LINK1

LINK2

LINK3

LINK4

LINK5

172

ON: Control plane cascade 100 Mbps interface 1 is connected

Green

Status indicator of control plane cascade interface 1


Green



Green



Green



Green



OFF: Control plane cascade 100 Mbps interface 1 is not connected





Chapter 4 - Boards

Indicator

LINK6

LINK7

LINK8

LINK9

LINK10

Color

Meaning

Description ON: Control plane cascade 100 Mbps interface 6 is connected

Green



Green



Green



Green



Green







Buttons Table 85 explains the UIMC panel buttons. T A B L E 8 5 – U I M C P A N E L B U T T O N S

Button

Description

RST

Board reset

EXCH


Interfaces Table 86 explains the UIMC board interfaces. T A B L E 8 6 – U I M C B O A R D I N T E R F A C E S

Location

Interface

Direction

Description

RUIM2 panel

FE1

Bidirectional

Provides 10 cascading network ports through the


173


Location

RUIM3 panel

Interface

Direction

Description

FE3

Bidirectional

two rear boards in the active and standby slots.

FE5

Bidirectional

FE7

Bidirectional

FE9

Bidirectional

CLKIN

Input

Connected with the clock board, and transmits 8 Kbps/16 Mbps/PP2S clock signals.

DEBUGFE

Bidirectional

Debugging network port for CPU; connected to the debug machine.

DEBUG232

Bidirectional

Debugging serial port for CPU; connected to the debug machine.

FE2

Bidirectional

FE4

Bidirectional

FE6

Bidirectional

FE8

Bidirectional

FE10

Bidirectional

Provides 10 cascading network ports through the two rear boards in the active and standby slots.

CLKIN

Input

Connected with the clock board, and transmits 8 Kbps/16 Mbps/PP2S clock signals.

DEBUGFE

Bidirectional

Ethernet debugging interface of CPU; connected to the debug machine.

DEBUG232

Bidirectional

Serial port debugging interface of CPU; connected to the debug machine.

Universal Interface Module for User Plane (UIMU) Functions





174

Implements 16 Kbps Circuit Switching (CS) in resource shelf. Provides one external user plane GE optical interface to interconnect resource shelf and core switching unit.


Chapter 4 - Boards





Principle

Provides the clock-driven function inside the resource shelf. Input PP2S, 8 kHz and 16 MHz signals are distributed to various slots after phase lock and drive, to provide 16 MHz, 8 kHz and PP2S clocks to the boards. Provides RS485 management interface to reset the boards of resource shelf.

Figure 109 show the working principles for UIMU. FIGURE 109 - WORKING PRINCIPLE FOR UIMU

Timeslot 时隙交换 switchingunit 单元

InternalBusbar 内部总线

Logic Unit 逻辑单元

CPU CPU 单元

RS232 RS485 Debugging 调试以太网 Ethernet

Active/standby 主备以太网 Ethernet

PCIBusbar PCI 总线

以太网交换单元



GXS/2 GXS/2 Sub子卡 card

Userplane 用户面 Ethernet 以太网

Userplane FE 用户面

Controlplane 控制面 Ethernet 以太网

GE

FE

Control 控制面FE planeFE

UIMU consists of the following four units: 

CPU It connects with TS switching unit, logic unit, and Ethernet switching unit via the control bus. It configures the switching chipset, configures and manages FPGA, and manages the resource shelf. It provides external Ethernet interface, RS232 and RS485 serial port for debugging and active/standby.






Timeslot (TS) switching unit


175


It implements 16 K circuit switching and provides an internal circuit switching net for the resource shelf. 

Ethernet switching unit It implements the user plane and control plane Ethernet switching function on the resource shelf.



Board data flow direction The external data is from boards on the shelf where UIMU locates. It enters Ethernet switching unit or TS switching unit for switching, and then is sent to the target board.

Board Description

Panel The rear board of UIMU is RUIM1. Figure 110 shows the panel diagrams of UIMU and RUIM1.

176


Chapter 4 - Boards

F I G U R E 1 1 0 – U I M U A N D R U I M 1 P A N E L S

UIMU ENUM RUN ACT ALM EXCH RST

ACT-P ACT-T LINK1 LINK2 LINK3 LINK4

RUIM1

ACT1 ACT2

RX 1 TX RX 2 TX

U E

SD1

F

SD2 4 / 3 C E F 2 / 1 C E F

N I K L C

E F G U B E D 2 3 2 G U B E D

1

2

1. UIMU panel

2. RUIM1 panel

Indicators Table 87 explains the UIMU panel indicators. T A B L E 8 7 – U I M U P A N E L I N D I C A T O R S

Indicator

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30


177


Indicator

Color

Meaning

ACT

Green


ALM

Red

Alarm indicator

Description ON: Indicates the board is active OFF: Indicates the board is standby Refer to Table 30 Always ON: indicates that tack switch has been opened; the board has not been inserted properly; the version has not been downloaded

ENUM

Yellow



ACT-P

ACT-T

LINK1

LINK2

LINK3

178

Green

Packet switching domain indicator

ON: UIMU packet switching domain is active

ON: UIMU CS domain is active

Green

Circuit switching domain indicator


Green



Green



Green



OFF: UIMU packet switching domain is standby

OFF: UIMU CS domain is standby




Chapter 4 - Boards

Indicator

LINK4

ACT1

ACT2

SD1

SD2

Color

Meaning

Description

Green


ON: The control plane cascade 100 Mbps interface 4 is connected

Green

Status indicator of GE interface 1

ON: Current optical interface is activated

Green

Status indicator of GE interface 2

ON: Current optical interface is activated

Green

Optical signal indicator of GE interface 1

ON: Optical module has received optical signals

Green

Optical signal indicator of GE interface 2

ON: Optical module has received optical signals

OFF: The control plane cascade 100 Mbps interface 4 is not connected

OFF: Current optical interface is not activated

OFF: Current optical interface is not activated

OFF: Optical module has not received optical signals

OFF: Optical module has not received optical signals

Buttons Table 88 explains the UIMU panel buttons. T A B L E 8 8 – U I M U P A N E L B U T T O N S

Button

Description

RST

Board reset

EXCH


Interfaces Table 89 explains the UIMU board interfaces. T A B L E 8 9 – U I M U B O A R D I N T E R F A C E S

Location UIMU panel

RUIM1 panel

Interface

Direction

Description

2 pairs of RX-TX

Bidirectional

Optical fiber connection between the front board and GLI of the switching unit, the user plane used 2×1 Gbps optical interface.

FE C1/2

Bidirectional

Provides four cascading network ports (through the


179


Location

Interface

Direction

Description

FE C3/4

Bidirectional

two rear boards in active and standby slots), connected to CHUB on the control shelf or UIMC.

FE-U

Bidirectional


CLKIN

Input


DEBUG-FE

Bidirectional

Debugging network port for CPU system; connected to the debug machine.

DEBUG232

Bidirectional


User Plane Processing Board (UPPB) Function

UPPB implements PS service processing in A/Gb mode and user plane service processing in Iu mode.

Principle

Figure 111 shows the working principles of UPPB. FIGURE 111 - WORKING PRINCIPLE OF UPPB

Contorl 控制总线 Bus

DSP单元 DSPUnit

User 用户面FE Ethernet planeFE 以太网交 switching 换单元 Unit

DSP P

Host Interface 主机接口 CPU 单元 CPU

…

DSP P

Logic Unit

逻辑单元

时钟单元 ClockUnit

ControlplaneFE 控制面FE



180

UPPB consists of five units:


Chapter 4 - Boards



CPU It manages the board, and process the Gb interface signaling. It also provides the external control plane FE interface.



Logic Unit It realizes all the logic processing function of the board.



DSP unit It includes multiple DSP chips, and implements the processing of user plane core protocols.



Ethernet Switching Unit It implements the Ethernet connection of multiple DSP, and provides external user plane FE interface.



Clock Unit It provides the necessary clock signal for each unit inside the board.






Board Description

The user plane data from UIMU board enters the board via user plane FE interface, pass the Ethernet switching unit, and is distributed to the DSP unit. After the DSP unit processes relative user plane protocols, the data is switched to SPB via user plane FE interface.

Panel The UPPB board has no corresponding rear board. Figure 112 shows the panel diagram of UPPB.


181


F I G U R E 1 1 2 – U P P B P A N E L

RUB

Indicators There are four indicators on UPPB panel. Table 90 explains the UPPB panel indicators. T A B L E 9 0 – U P P B P A N E L I N D I C A T O R S

182

Indicator

Color

Meaning

Description

RUN

Green

Run indicator

Refer to Table 30

ALM

Red

Alarm indicator

Refer to Table 30

ENUM

Yellow


Always ON: indicates that tack switch has been opened; the


Chapter 4 - Boards

Indicator

Color

Meaning

Description board has not been inserted properly; the version has not been downloaded Flashing at 5 Hz (fast): indicates that there is an alarm for tack switch; tack switch has been opened while the board is running Flashing at 1 Hz (slow): indicates that the board can be pulled out; tack switch has been opened while the board is running; the board can be pulled out when in standby status Always OFF: indicates that tack switch is normal

ACT

Green



Buttons Table 91 explains the UPPB panel buttons. T A B L E 9 1 – U P P B P A N E L B U T T O N S

Button

Description

RST

Board reset


183



184


Chapter

5

Other Hardware Equipments This chapter equipments.

describes

the

alarm

box

and

GPS-related

Alarm Box Functions Functions of Alarm Box (ALB) are as follows: 



Receives alarm messages from NetNumen M31 server and transmits the messages to BTS through modem ALB panel indicators display the alarm messages sent by the background server



Transmits the data by dialing



Supports voice alarm



Supports GPRS message forwarding

Principles Figure 113 shows the principle of ALB.


185


F I G U R E 1 1 3 - W O R K I N G P R I N C I P L E O F A L B

Ethernet 以太网收发器 Transceiver

Driver 驱动

Level 电平转换 Convertor

Ethernet

RS232SerialPort RS232串口

RS485bus

RS485总线

RS232/RS485

主控单元

Wireless

Wireless 无线 MODEM MODEM

无线传输 Transmission Wired

Busbar 总线 BOOT （512KB）

FLASH （16MB ）

Built-in 有线传输内置MODEM Transmission MODEM

SDRAM （16MB）

LED 液晶显示 Keyboard 键盘

GPS Alarmindicator 告警指示灯（红蓝黄绿） (red/blue/yellow/green

-48VDC

Coding 编解码 /decoding

PowerUnit 电源单元

+5VDC +3.3VDC

Alarm box hardware includes five units. 

Main Control Unit It is the core of alarm box, which is used to save OS, startup code and voice data. The work library space is 8 MB, and data saving space is 16 MB.



Interface Unit The external interface of alarm box is as follows:





Ethernet interface



RS232 serial interface



RS485 interface



Wireless Modem interface



Wired Modem interface



GPS interface

Man-machine Unit It provides hearable and visible alarm information and also provides the operation and maintenance interface. 

Alarm Indicator There are four alarm indicators. Colored red, blue, yellow and green in order of severity. When alarm occurs, the corresponding indicator will flash or be ON for a long time. There is no individual alarm indicator for environment alarm, but it is handled as a certain level alarm.



186

Voice Announcement


Chapter 5 - Other Hardware Other Hardware Equipments

The main control unit works in transparent HDLC mode, it sends the PCM voice saved in FLASH to the PCM coder/decoder chip (CODEC) for coding, and the data is converted to linear signal. Then the power amplifier drives the speaker, and the hearable alarm is realized. The voice management at background realizes the voice recording, edit and pre-play, and downloads the voice file into the FLASH of the alarm box. 

LCD LCM is employed to display the alarm. LCD is hung on the parallel bus of the main control unit. LCM size is proper and it is all-dots graphic display. Characters font size is controlled by software to display different type of information. LED has back facet power, which is generally OFF resulting in increased life of the LED. When pressing the function button or displaying information, the back facet power turns ON to display. There are some function buttons on the alarm box, which realize the operation and maintenance functions together with LCM.



Logic Unit Employ EPLD to sequential logic.



realize

required

combinational

and

Power Unit The input voltage of the alarm box is -48 V DC from the equipment room, and is converted to +5 V, +3.3 V and other voltages for each unit by DC-DC power converter.

When the alarm box is in the duty room outside the equipment room, there may not be -48 V DC power, in this case, a external AC/DC power adapter is required to convert 110/220 V AC to 48 V DC, providing -48 V DC power to the alarm box. AC/DC power adaptor is an optional accessory of the alarm box.

Connection Mode ALB includes the following connection modes:

Basic Connection Mode



Basic connection mode



Expansion connection mode

Figure 114 shows the basic connection mode of ALB.


187


F I G U R E 1 1 4 – B A S I C C O N N E C T I O N M O D E O F A L B

ZTE

iBSC

NetNumen M31

ALB

HUB

Expansion Connection Mode

If the server’s IP address and ALB’s IP address are in the same network segment, the server is called near-end server. If the server’s IP address and ALB’s IP address are in different network segments, the server is called remote server. ALB can be connected with the near-end server as well as the remote server. When ALB is connected with the remote server, relevant route must be added in ALB, and on-site alarms are received through the data network. This connection mode is called expansion connection mode. Figure 115 shows the expansion connection mode of ALB when NetNumen M31 server is located at iBSC. F I G U R E 1 1 5 – E X P A N S I O N C O N N E C T I O N M O D E O F A L B

iBSC

ALB

ALB

DDN

HUB Router

NetNumenM31 Server

188


HUB Router

Chapter 5 - Other Hardware Equipments

ALB expansion function enables ALB to be installed in remote areas and connected to the remote server, and receives on-site alarms through the data network. One ALB can simultaneously connect five background servers at most.

Board Description Appearance

Figure 116 shows the appearance of ALB. F I G U R E 1 1 6 – A P P E A R A N C E O F A L B

Panel

Figure 117 shows the ALB panel diagram. F I G U R E 1 1 7 – A L B P A N E L

EMERGENCY

IMPORTANT

RST

RUN LINK MUTE

Figure 118 shows the interfaces of ALB.


189


F I G U R E 1 1 8 – I N T E R F A C E S O F A L B 1

2

3

4

5

6

7

O FF

ON

MODEM 10T

1. Cable MODEM interface

5. MS antenna location (connected with the built-in wireless MODEM)

2. Ethernet interface

6. Power supply interface

3. RS485 interface

7. Power supply switch

4. RS232 serial port

ALB includes cover components, body components, PCB board, apparatus, and assembly fasteners. 











Indicators

Cover components include LCD, button, indicator and panel. Body components are used to install the main board and the trumpet. PCB board consists of the main board, panel board, keyboard, and modem. Apparatus include LCD, indicator, button, switch, RJ11, RJ45, DB9, earphone jack, cell antenna, GPS interface, 48 V socket, switch and trumpet. ALB lock ALB dimensions are 58 mm × 310 mm × 220 mm (L × W × H).

Table 92 explains the ALB panel indicators. T A B L E 9 2 – A L B P A N E L I N D I C A T O R S

190

Indicator

Color

Meaning

Description

EMERGENCY

Red

Level-1 alarm indicator

ON: indicates that the level-1 alarm exists.

IMPORTANT

Blue



COMMON

Yellow



NOTIFICATION

Green



MUTE

Green

Trumpet switch indicator

ON: indicates that the trumpet is turned off.

LINK

Green

Network connection

ON: indicates that the network is connected.



Indicator

RUN

Buttons

Color

Green

Meaning

Description

indicator

Flashing: indicates that the Ethernet link is normal.

Program running indicator

Flashing at 1 s: indicates that the ALB is running normally.

Table 93 explains the ALB panel buttons. T A B L E 9 3 – A L B P A N E L B U T T O N S

Interfaces

Button

Description

M

To select the menu

→

To move the cursor left when inputting the number.

←

To move the cursor right when inputting the number.

↑

To select the menu, to page up

↓

To select the menu, to page down

C

To return to the menu or to clear the input

OK

To confirm the operation

RST

To reset the ALB system

MUTE

To mute/de-mute ALB

Table 94 explains the ALB panel interfaces. T A B L E 9 4 – A L B P A N E L I N T E R F A C E S

Location

Interface

Description

ALB

Ethernet interface

This interface connects the main processing unit with the background.

RS232 serial port

External standard Interface EIA/TIA232-C, used for the communication between foreground and background.

RS485 Interface

External RS485 bus, used for the communication between foreground and background. It is also used to realize alarm box cascading. (It is not used by iBSC for the time being.)

Radio modem interface

This interface is used for the communication between main control unit and radio modem module, realizing radio transmission of alarm information. (It is not used by iBSC for the time being.)

Cable modem

The parallel bus of the main control unit attaches cable MODEM chip, to provide the


191


Location

Interface

Description

interface

external cable modem interface and to implement the cable transmission of alarm information. (It is not used by iBSC for the time being.)

GPS interface (RS232 serial port)

This interface is used for the communication of main control unit with GPS receiver module through RS232 serial port. (It is not used by iBSC for the time being.)

GPS-Related Equipments Global Position System (GPS) provides the clock and frequency reference for ZXG10 iBSC system. It also provides GPS satellite signal for the system to realize the Assisted Global Position System (AGPS). The GPS antenna feeder system can be realized by the following two solutions: 

Feeder cable direct-connection solution



Indoor forwarding solution

GPS Active Antenna and Lightning Protector/Frequency Divider In feeder cable direct-connection solution and indoor forwarding solution, both the GPS active antenna and the lightning protector/frequency divider are used. In feeder cable direct-connection solution, the GPS active antenna is used as outdoor receiving antenna; while in indoor forwarding solution, the GPS active antenna is used as indoor receiving antenna.

Functions The GPS antenna receives GPS satellite navigation and positioning signals, and demodulates the frequency, clock signal, and AGPS information through GPS signal receiver. The clock signal is sent to relevant units in ZXG10 iBSC system while the AGPS information to the processing unit. The GPS antenna lightning protector/frequency divider uses dual-frequency-dividing coaxial cable protector, which is

192



installed at the connector between communication equipment and coaxial cable, or at lightning protection devices between two communication equipments. It effectively prevents damages due to temporary over-voltage cause by lightning induction. The GPS antenna lightning protector/frequency divider adopts the high-frequency filter principle and performs three-level protection for the DC feed channel. The RF insertion loss is small, the discharge current is large, and the measured limiting voltage is low. It is an ideal protection device for various public antenna communication equipments.

Equipment Specifications The GPS active antenna is shown in Figure 119. F I G U R E 1 1 9 – G P S A C T I V E A N T E N N A

1

5 2

6

3

4 7

1. GPS antenna

2. Installation fixing board

3. Installation tube

4. Feeder cable

5. Pole

7. Binding tape

6. Fixing component

The GPS antenna lightning protector/frequency divider is shown in Figure 120.


193


F I G U R E 1 2 0 – G P S A N T E N N A L I G H T N I N G P R O T E C T O R / F R E Q U E N C Y D I V I D E R

Connections Figure 121 shows connections between ICM, GPS active antenna, and GPS antenna lightning protector/frequency divider (fixed on the cabinet top). F I G U R E 1 2 1 – C O N N E C T I O N S B E T W E E N I C M , G P S A N T E N N A L I G H T N I NG P R O T E C T O R / F R E Q U E N C Y D I V I D E R , A N D G P S A C T I V E A N T E N N A

1. GPS antenna

2. GPS antenna lightning protector/frequency divider

Technical Indices Table 95 describes technical indices of the GPS active antenna. T A B L E 9 5 – G P S A C T I V E A N T E N N A T E C H N I C A L I N D I C E S

194

Technical Index

Value

Frequency range

1575 ± 5 MHz

Gain

38 ± 2 dBi

DC power voltage

4.5 V ~ 6 V

DC power current

< 35 mA



Technical Index

Value

Antenna interface

N (F) type

Table 96 describes technical indices of the GPS antenna lightning protector/frequency divider. T A B L E 9 6 – T E C H N I C A L I N D I C E S O F G P S A N T E N N A L I G H T N I N G P ROTECTOR/FREQUENCY DIVIDER

Technical Index

Value

Frequency range

1500 MHz ~ 1600 MHz

Characteristic impedance

50

Insertion loss

≤ 4

VSWR

≤ 1.2

Rated discharge current

10 KA (8/20 μs)

Water-proof level

IP65

Interface

The input is N-F while the two outputs are SMA-F

Installation mode

Installing through the hole

Grounding cable specification

The cross-sectional area of the grounding cable must be larger than 6 mm2

Ω

dB

GPS L1 Signal Transponder and GPS Antenna Feeder Lightning Protector In indoor forwarding solution, the GPS L1 signal transponder and the GPS antenna feeder lightning protector are used.

GPS L1 Signal Transponder The GPS L1 signal transponder consists of three parts: 

GPS L1 outdoor receiving antenna



GPS L1 indoor transmitting antenna



GPS L1 signal controller

Table 97 describes technical indices of the GPS L1 outdoor receiving antenna.


195


T A B L E 9 7 – T E C H N I C A L I N D I C E S O F G P S L 1 O U T D O O R R E C E I V I N G A N T E N N A

Technical Index

Value

Frequency range

1575.42 MHz ± 10 MHz


50

VSWR

≤ 1.5

Gain

45 dB ± 2 dB

Polarization mode

Clockwise circular polarization

Working temperature

-45 °C ~ +65 °C

Storage temperature

-55 °C ~ + 85 °C

Connector

TNC

Cable length

100 m ± 0.2 m

Ω

Table 98 describes technical indices of the GPS L1 indoor transmitting antenna. T A B L E 9 8 – T E C H N I C A L I N D I C E S O F G P S L 1 I N D O O R T R A N S M I T T I N G A N T E N N A

Technical Index

Value

Frequency range

1575 MHz ± 10 MHz


50

VSWR

≤ 1.5

Gain

26 dB ± 2 dB

Working temperature

-45 °C ~ +65 °C

Storage temperature

-55 °C ~ + 85 °C

Connector

TNC

Cable length

10 m

Signal coverage range

≥ 200

Ω

m2

Table 99 describes technical indices of the GPS L1 signal controller. T A B L E 9 9 – T E C H N I C A L I N D I C E S O F G P S L 1 S I G N A L C O N T R O L L E R

Technical Index

Value

Frequency range

1575 MHz ± 10 MHz


50

VSWR

≤ 1.5

Noise coefficient

≤ 1.5

Gain

196


Ω

dB

2 dB ± 2 dB, 16 dB ± 2 dB, 26 dB ± 2 dB


Technical Index

Value

Voltage

220 VAC

Current

≤ 80

Working temperature

-45 °C ~ +65 °C

Storage temperature

-55 °C ~ +85 °C

Connector

TNC

mA

GPS Antenna Feeder Lightning Protector Table 100 describes technical indices of the GPS antenna feeder lightning protector. T A B L E 1 0 0 – T E C H N I C A L I N D I C E S O F G P S A N T E N N A F E E D E R L I G H T N I N G PROTECTOR

Technical Index

Value

Frequency range

1500 MHz ~ 1600 MHz


50

Insertion loss

≤ 0.2

VSWR

≤ 1.2

Maximum transmission power

≤ 50

DC feed power

≤ 5.5

Rated discharge current

10 KA (8/20 μs)

Discharge voltage

≤ 20

Water-proof level

IP65

Interface

The input is N-F

Installation mode

Installing through the wall; installing by the copper lug

Grounding cable specification

The cross-sectional area of the grounding cable must be larger than 6 mm2

Ω

dB

W V

V


197



198


Chapter

6

System Configuration Specifications The ZXG10 iBSC system has various interfaces, each having several connection modes. Users can select appropriate interface connection modes according to actual requirements. This chapter introduces hardware configurations of ZXG10 iBSC (V6.20) in the following two cases respectively: 

When the resource shelf (BUSN) is used



When the gigabit resource shelf (BGSN) is used

Configurations when BUSN Is Used This section introduces hardware configurations of ZXG10 iBSC (V6.20) when the resource shelf (BUSN) is used.

Abis Interface and A-Interface Adopting E1 Figure 122 shows the configuration when both Abis interface and A-interface adopt E1 connection mode.


199


F I G U R E 1 2 2 – C O N F I G U R A T I O N W H E N B U S N I S U S E D ( A B I S I N T E R F A C E : E 1 , A - I N T E R F A C E : E 1 ) BIU

AIU

PCU

TCU

PWRD 1

2

3

4

5

6

7

8

9

PWRD

10 11 12 13 14 15 16 17

1

2

3

4

5

6

7

8

FAN G

D

D

S G

D

T B

T B

P U B P

D T B

D

U P

T B

T B

C

C

C

C

M M P P

M P

M P

S B C X

C

C

M M P P

U I M U

U I M U

U I M C

U I M C

D T B

U SB D G P PI T U P BP B P I B /

O

O

M P

M P

C L K G

C L K G

C H U B

S P B

G U P

R D T B

R D T B

R S P B

R D T B

R D T B

D

D

G

U P

T B

T B

U P

G L I

G L

G L

G L

I

I

I

G U P

G U P

D

D

T B

T B

P S N

P S

R U I M 2

R S V B

C H U B

U I M U

U I M U

D T B

G U P

G

S

S

G

G

U P

P B

P B

U P

U P

U I M C

N

R D T B

R D T B

R D T B

3

4

5

6

7

8

9

D

U P

T B

D T B

G

D

U P

T B

S G P U B P

D

D

T B

T B

D T B

D

G G

G

D

D

T B

U P

U P

T B

T B

U P

D

D

S

D

G

G

G

T B

T B

T B

P B

T B

U P

U P

U P

G

D

D

G G

D

D

U P

T B

T B

U U P P

G U P

T B

T B

R C K G 1

R S P B

R R C C K H G B 2 1

R C H B 2

R S P B

R S P B R R U U I I M M 2 3

FAN

PWRD

10 11 12 13 14 15 16 17

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17

FAN

U I M U

U I M U

D T B

U I M U

U I M U

D T B

U SB D G P PI T U P BP B P I B / G

G

U P

U P

D T B

S P B

G U P

R D T B

R D T B

G U P

G U P

R D T B

R D T B

R S P B

R D T B

R D T B

R D T B

R D T B

R D T B

R U I M 1 R U I M 1

R U R D I T M B 1 R U I M 1

RR SM PN BI /C

R D T B

R S P B

R D T B

R D T B

FAN

FAN D

R M P B

R D T B

U I M C

FAN G

R M P B

R R R U U D I I T M M B 1 1

R D T B

PWRD 2

R U I M 3

RR SM PN BI /C

FAN

FAN

1

10 11 12 13 14 15 16 17

R R U U R D I I T M M B 1 1

R D T B

FAN G

9 FAN

U I M U

U D I M T U B

U SB D G P PI T U P BP B P B /I

U I M U

U D I M T U B

G U P

G U P

D T B

S P B

D T B

G U P

G U P

R D T B

FAN

R D T B

R D T B

R D T B

R D T B

R S P B


R D T B R D T B

R D T B


RR SM PN BI /C

R D T B

R S P B

R D T B

R D T B

FAN

Abis Interface Adopting IP+E1 and A-Interface Adopting E1 Figure 123 shows the configuration when Abis interface adopts IP+E1 connection mode and A-interface adopt E1 connection mode.

200


Chapter 6 - System Configuration Specifications

F I G U R E 1 2 3 – C O N F I G U R A T I O N W H E N B U S N I S U S E D ( A B I S I N T E R F A C E : I P + E 1 , A - I N T E R F A C E : E 1 )

Abis Interface Adopting IP+E1 and A-Interface Adopting STM-1 Figure 124 shows the configuration when Abis interface adopts IP+E1 connection mode and A-interface adopts STM-1 (active/standby) connection mode.


201


F I G U R E 1 2 4 – C O N F I G U R A T I O N W H E N B U S N I S U S E D ( A B I S I N T E R F A C E : I P + E 1 , A - I N T E R F A C E : S T M - 1 ) BIU

AIU

PCU

TCU

PWRD 1

2

3

4

5

6

7

8

9

PWRD

10 11 12 13 14 15 16 17

1

2

3

4

5

6

7

8

9

FAN G

D

U P

T B

S B C X

D T B

G U P

B I P I

B I P I

U U G I I M M U U U P

C C M M P P

C M P

C M P

U I M C

D G T U B P

C C M M P P

U O I M M C P

G U P

O C L M K P G

SB PI BP I /

U P P B

S P B

C L K G

C H U B

C H U B

R S V B

S D T B

R G I M 1

R D T B

R D T B

R R M M N N I I C C

R D T B

S D T B

S P B

S P B

G L I

G G L L I I

G L

G U P

G G U U P P

G U P

P S N

P S

I

U U I I M M U U

G G U U P P

S S D D T T B B

G U P

R G I M 1

3

4

5

6

7

D T B

9

PWRD

10 11 12 13 14 15 16 17

1

2

3

4

5

6

7

8

S D T B

S D T B

U I M U

U I M U

G G U U P P

G U P

U I M U

U G I M U U P

U P

G G U U P P

G U P

B I P I

B I P I

U I M U

U SB G G I PI M U U BP U P P / I

S D T B

S D T B

G G U U P P

G U P

U I M U

U G I U M U P

T B

S D T B

S D T B

G U P

D T B

D U SB D P PI T T P BP B B B / I G U P U P P B

S P B

S P B

G U P

S D T B

S D T B

R D T B

R D T B

R S P B

R R D D T T B B

G U P

FAN G

S D T B

S D T B

G U P

9

10 11 12 13 14 15 16 17

FAN

G U P

S G P U B P

R C H B 2

FAN

D T B

D

R R C C K H G B 2 1

R R U U I I M M 2 3

FAN G U P

R R M C P K G B 1

U U I I M M C C

N

8

R M P B

R S P B

R R U U I I M M 1 1

PWRD 2

RR SM PN BI /C

FAN S D T B

FAN

1

R R U U I I M M 1 1 R R U U I I M M 2 3

FAN S D T B

10 11 12 13 14 15 16 17

FAN

G S U P P B

U P P B

U P P B

G U P

S D T B

S D T B

R M N I C G U P

FAN

R M N I C

R U I M 1 R U I M 1

R U I M 1 R U I M 1

FAN R U I M 1 R U I M 1

R U I M 1 R U I M 1

R D T B

RR SM PN BI /C

R D T B

R S P B

R S P B

RR SM PN BI /C R S P B

FAN

Abis Interface Adopting IPoE and AInterface Adopting E1 Figure 125 shows the configuration when Abis interface adopts IPoE connection mode and A-interface adopts E1 connection mode.

202



F I G U R E 1 2 5 – C O N F I G U R A T I O N W H E N B U S N I S U S E D ( A B I S I N T E R F A C E : I P O E , A - I N T E R F A C E : E 1 )

Abis Interface Adopting E1 and AInterface Adopting STM-1 Figure 126 shows the configuration when Abis interface adopts E1 connection mode and A-interface adopt STM-1 (active/standby) connection mode.


203


F I G U R E 1 2 6 – C O N F I G U R A T I O N W H E N B U S N I S U S E D ( A B I S I N T E R F A C E : E 1 , A - I N T E R F A C E : S T M - 1 )

Abis Interface Adopting E1 and Ater Interface Adopting E1 (TC Is External) Figure 127 shows the configuration when Abis interface adopts E1 connection mode and Ater interface adopts E1 (TC is external) connection mode.

204



F I G U R E 1 2 7 – C O N F I G U R A T I O N W H E N B U S N I S U S E D ( A B I S I N T E R F A C E : E 1 , A T E R I N T E R F A C E : E 1 ( T C I S E X T E R N A L ) )

Abis Interface Adopting E1 and Ater Interface Adopting STM-1 (TC Is External) Figure 128 shows the configuration when Abis interface adopts E1 connection mode and Ater interface adopts STM-1 (TC is External) connection mode.


205


F I G U R E 1 2 8 – C O N F I G U R A T I O N W H E N B U S N I S U S E D ( A B I S I N T E R F A C E : E 1 , A T E R I N T E R F A C E : S T M - 1 ( T C I S E X T E R N A L ) )

Abis Interface Adopting E1 and Ater Interface Adopting IP (TC Is External) Figure 129 shows the configuration when Abis interface adopts E1 connection mode and Ater interface adopts IP (TC is external) connection mode.

206



F I G U R E 1 2 9 – C O N F I G U R A T I O N W H E N B U S N I S U S E D ( A B I S I N T E R F A C E : E 1 , A T E R I N T E R F A C E : I P ( T C I S E X T E R N A L ) )

Configurations when BGSN Is Used This section introduces hardware configurations of ZXG10 iBSC (V6.20) when the gigabit resource shelf (BGSN) is used.

Abis Interface and A-Interface Adopting E1(T1) Figure 130 shows the configuration when both Abis interface and A-interface adopt E1(T1) connection mode.


207


F I G U R E 1 3 0 – C O N F I G U R A T I O N W H E N B G S N I S U S E D ( A B I S I N T E R F A C E : E 1 ( T 1 ) , A - I N T E R F A C E : E 1 ( T 1 ) )

Abis Interface Adopting E1 and AInterface Adopting STM-1 Figure 131 shows the configuration when Abis interface adopts E1 connection mode and A-interface adopts STM-1 connection mode.

208



F I G U R E 1 3 1 – C O N F I G U R A T I O N W H E N B G S N I S U S E D ( A B I S I N T E R F A C E : E 1 , A - I N T E R F A C E : S T M - 1 )

Abis Interface Adopting E1 and AInterface Adopting IP Figure 132 shows the configuration when Abis interface adopts E1 connection mode and A-interface adopts IP connection mode.


209


F I G U R E 1 3 2 – C O N F I G U R A T I O N W H E N B G S N I S U S E D ( A B I S I N T E R F A C E : E 1 , A - I N T E R F A C E : I P )

Abis Interface and A-Interface Adopting IP Figure 133 shows the configuration when both Abis interface and A-interface adopt IP connection mode.

210



F I G U R E 1 3 3 – C O N F I G U R A T I O N W H E N B G S N I S U S E D ( A B I S I N T E R F A C E : I P , A - I N T E R F A C E : I P )

Abis Interface Adopting IP and AInterface Adopting E1(T1) Figure 134 shows the configuration when Abis interface adopts IP connection mode and A-interface adopts E1(T1) connection mode.


211


F I G U R E 1 3 4 – C O N F I G U R A T I O N W H E N B G S N I S U S E D ( A B I S I N T E R F A C E : I P , A - I N T E R F A C E : E 1 ( T 1 ) )

Abis Interface Adopting IP and AInterface Adopting STM-1 Figure 135 shows the configuration when Abis interface adopts IP connection mode and A-interface adopts STM-1 connection mode.

212



F I G U R E 1 3 5 – C O N F I G U R A T I O N W H E N B G S N I S U S E D ( A B I S I N T E R F A C E : I P , A - I N T E R F A C E : S T M - 1 )

Abis Interface Adopting IPoE and AInterface Adopting E1(T1) Figure 136 shows the configuration when Abis interface adopts IPoE connection mode and A-interface adopts E1(T1) connection mode.


213


F I G U R E 1 3 6 – C O N F I G U R A T I O N W H E N B G S N I S U S E D ( A B I S I N T E R F A C E : I P O E , A - I N T E R F A C E : E 1 ( T 1 ) )

Abis Interface Adopting IPoE and AInterface Adopting STM-1 Figure 137 shows the configuration when Abis interface adopts IPoE connection mode and A-interface adopts STM-1 connection mode.

214



F I G U R E 1 3 7 – C O N F I G U R A T I O N W H E N B G S N I S U S E D ( A B I S I N T E R F A C E : I P O E , A - I N T E R F A C E : S T M - 1 )

Abis Interface Adopting IPoE and AInterface Adopting IP Figure 138 shows the configuration when Abis interface adopts IPoE connection mode and A-interface adopts IP connection mode.


215


F I G U R E 1 3 8 – C O N F I G U R A T I O N W H E N B G S N I S U S E D ( A B I S I N T E R F A C E : I P O E , A - I N T E R F A C E : I P )

Abis Interface and Ater Interface Adopting E1(T1) Figure 139 shows the configuration when both Abis interface and Ater interface adopt E1(T1) connection mode.

216



F I G U R E 1 3 9 – C O N F I G U R A T I O N W H E N B G S N I S U S E D ( A B I S I N T E R F A C E : E 1 ( T 1 ) , A T E R I N T E R F A C E : E 1 ( T 1 ) )

Abis Interface Adopting IP and Ater Interface Adopting E1(T1) Figure 140 shows the configuration when Abis interface adopts IP connection mode and Ater interface adopts E1(T1) connection mode.


217


F I G U R E 1 4 0 – C O N F I G U R A T I O N W H E N B G S N I S U S E D ( A B I S I N T E R F A C E : I P , A T E R I N T E R F A C E : E 1 ( T 1 ) )

218


A p p e n d i x

A

Device Specifications Table 101 illustrates devices appeared in board descriptions. T A B L E 1 0 1

Device

Legend

Description

RJ45

From the front view of the board panel

DB9


DB44


Fiber outlet


USB interface



219


Device

Legend OFF

DIP switch

Description ON

OFF

ON

Jumper

220


The black block represents the position set for the DIP switch. If it is at OFF side, the default DIP switch setting is OFF; if it is at ON side, the default DIP switch setting is ON. The left figure indicates that the default setting is short circuit, while the right figure indicates that the default setting is broken circuit.

A p p e n d i x

B

Abbreviations Abbreviation

Full Name

A AAL2

ATM Adaptation Layer 2

AAL5

ATM Adaptation Layer type 5

APBE

ATM Processing Board Enhanced version

AIU

A Interface Unit

ALB

Alarm Box

AMR

Adaptive Multi Rate

ATM

Asynchronous Transfer Mode

B BCSN

Backplane of Circuit Switch Network

BCTC

Backplane of Control Center

BGSN

Backplane of Giga Universal Service Network

BIPB

Abis Interface Processing board

BIPI

BSC IP Interface Board

BIU

aBis Interface Unit

BPSN

Backplane of Packet Switching Network

BSC

Base Station Controller

BSSAP

Base Station System Application Part

BSSGP

Base Station System EDGE/GPRS Protocol

BTS

Base Transceiver Station

BUSN

Backplane of Universal Service Network

C CAS

Channel Associated Signaling


221


Abbreviation

Full Name

CC

Calling Control

CCS

Common Channel Signaling

CCS7

Common Channel Signaling System NO.7

CHUB

Control Plane HUB

CLKG

Clock Generator

CLKU

Clock Unit

CM

Communication Management

CMP

Control Main Processor

CN

Core Network

CS

Circuit Switch

D DBS

Data Base Subsystem

DC

Direct Current

DCE

Data Circuit terminating Equipment

DDN

Digital Data Network

DRTB

Dual Rate Transcoder Board

DSP

Digital Signal Processor

DTB

Digital Trunk Board

DTE

Data Terminal Equipment

DTU

Digital Trunk Unit

E EIPI

E1 IP Interface

EIR

Equipment Identification Register

EMC

ElectroMagnetic Compatibility

EMI

Electro Magnetic Interference

ETSI

European Telecommunications Standards Institute

ETSN

Enhanced TDM Switch Network Board

F FE

Fast Ethernet

FR

Frame Relay

FPGA

Field Programmable Gate Array

FR

Frame Relay

FRS

Full Rate Service

FSMU

Far Sub Multiplexing Unit

G

222


Appendix B - Abbreviations

Abbreviation

Full Name

GE

Gigabit Ethernet

GERAN

GSM/EDGE Radio Access Network

GIPB

Gb Interface Processing board

GIPI

GE IP Interface

GIU

Gb Interface Unit

GLI

GE Line Interface

GPS

Global Positioning System

GPRS

General Packet Radio Service

GSM

Global System for Mobile communications

GUIM

Gigabit Universal Interface Module

GUP

GSM Universal Processing Board

GUP2

GSM Universal Processing board

H HDLC

High-Level Data Link Control

HPI

Host Port Interface

HSCSD

High Speed Circuit Switched Data

HW

High Way line

I ICIU

Iu-cs Interface Unit

ICM

Integrated Clock Module

IMA

Inverse Multiplexing for ATM

IMAB

IMA/ATM Board

IMSI

International Mobile Subscriber Identity

IP

Internet Protocol

IPIU

Iu-ps Interface Unit

IRIU

Iur-g Interface Unit

L LAPD

Link Access Protocol - Channel D

LCM

LCD Module

LLC

Logical Link Control

LMT

Local Management Terminal

LVDS

Low Voltage Differential Signal

M MAC

Media Access Control

MNIC

Multi-service Network Interface Card


223


Abbreviation

Full Name

MTP

Message Transfer Part

N NEF

Network Element Function

NS

Network Service

NSE

Network Service Entity

NSMU

Near Sub Multiplexing Unit

O OAM

Operation and Maintenance

OMP

Operating & Maintenance Processing Board

OMS

Operating Maintenance Subsystem

OSI

Open System Interconnection

OSS

Operating & Support Subsystem

P PACCH

Packet Associated Control Channel

PAGCH

Packet Access granted Channel

PBCCH

Packet Broadcast Control Channel

PCH

Paging Channel

PCM

Pulse Code Modulation

PCU

Packet Control Unit

PDP

Packet Date Protocol

PDTCH

Packet Data Traffic Channel

PE

Protective Earthing

PLMN

Public Land Mobile Network

PPCH

Packet Paging Channel

PS

Packet Switch

PSN

Packet Switch Network

PSPDN

Packet Switched Public Data Network

PSTN

Public Switching Telephone Network

PTP

Point To Point

PWRD

Power Distributor

PWRDB

Power Distributor Backplane

Q QoS

Quality of Service

R

224

RACH

Random Access Channel

RBID

Rearboard of ID Interface


Appendix B - Abbreviations

Abbreviation

Full Name

RCBU

Resources Board Configuration Basal Unit

RCHB1

Rear board 1 of CHUB

RCHB2

Rear board 2 of CHUB

RCKG1

Rear Board 1 of CLKG

RCKG2

Rear Board 2 of CLKG

RDTB

Rear Board of DTB

RGIM1

General Rear Board 1

RGUM1

Rear board 1 of GUIM

RGUM2

Rear board 2 of GUIM

RLC

Radio Link Control

RMNIC

Rear Board of MNIC

RMPB

Rear Board of OMP

RSPB

Rear Board of SPB

RSVB

Rear Board of Server

RUIM

Rear Board of UIM

RUIM1

Rear board 1 of UIM

RUIM2

Rear board 2 of UIM

RUIM3

Rear board 3 of UIM

S SACCH

Slow Associated Control Channel

SAPI

Service Access Point Indicator

SAR

Segment And Reassemble

SBCX

Single Board Computer of X86

SCCP

Signaling Connection Control Part

SDTB

SONET Digital Trunk Board

SDTB2

SONET Digital Trunk Board

SM

SubMultiplexing

SMC

Short Message Center

SMLC

Serving Mobile Location Centre

SMS

Short Message Service

SMTB

Sub Multiplexing Transform Board

SMU

Subchannel Multiplexing Unit

SONET

Synchronous Optical Network

SPB

Signaling Processing Board

SPB2

Signaling Processing Board

STM-1

Synchronous Transfer Mode 1


225


Abbreviation

Full Name

SSM

Subjoin Service Management

SVR

Server Board

T TBF

Temporary Block Flow

TC

TransCoder

TCH

Traffic Channel

TCP

Transmission Control Protocol

TCU

TransCoder Unit

TDM

Time Division Multiplex

TEI

Terminal Equipment Identification

TFI

TDM Fiber Interface board

TFO

Tandem Free operation

TRX

Transmitter & Receiver

TS

Time Slot

TSNB

TDM Switch Network Board

TTL

Transistor-Transistor Logic

U UDP

User Datagram Protocol

UIM

Universal Interface Module

UIMC

Universal Interface Module for Control Plane (BCTC or BPSN)

UIMU

Universal Interface Module of BUSN

Um

Um Interface

UPPB

User Plane Processing Board

UPU

User Plane Process Unit

UTRAN

Universal Terrestrial Radio Access Network

V VLR

226

Visitor Location Register


A p p e n d i x

C

Figures Figure 1 - Standard 19-Inch Cabinet .....................................2 Figure 2 – Cabinet Structure ................................................3 Figure 3 – Cabinet top view .................................................3 Figure 4 – Cabinet Top Structure ..........................................4 Figure 5 – Top Frame Component Structure ...........................5 Figure 6 – Cable Outlet Module Structure ...............................5 Figure 7 – Top Fan Structure................................................6 Figure 8 – Top Filter Structure..............................................6 Figure 9 – Fiber Wrap Tray Structure.....................................7 Figure 10 – Front Door Labels ..............................................7 Figure 11 - Rack Structure...................................................8 Figure 12 – Bus Bar ............................................................9 Figure 13 - Structural Layout of Cabinet .............................. 10 Figure 14 – iBSC External Connections (Using Gigabit Resource Shelf) ............................................................................. 11 Figure 15 – iBSC External Connections (Using Resource Shelf) 13 Figure 16 – Cabinet Cabling (Left View) ............................... 15 Figure 17 – Power Distribution Plug-in box Structure ............. 17 Figure 18 – Front Panel of Power Distribution Plug-in box ....... 18 Figure 19 – Rear Panel of Power Distribution Plug-in box........ 18 Figure 20 – Fan Plug-in box Structure ................................. 20 Figure 21 - Front Panel of Fan Plug-in box............................ 21 Figure 22 – Rear Panel of Fan plug-in box ............................ 21 Figure 23 – Shelf Positions (when BGSN Is Used).................. 24 Figure 24 – Shelf Positions (when BUSN Is Used) ..................24 Figure 25 – Backplane Structure.........................................25


227


Figure 26 – Full Configuration of Control Shelf ...................... 27 Figure 27 - Principle of Control Shelf ................................... 28 Figure 28 – Rear View of BCTC Backplane ............................ 29 Figure 29 – Full Configuration of Packet Switching Shelf......... 31 Figure 30 - Principle of Packet Switching Shelf ...................... 32 Figure 31 – Rear view of BPSN Backplane ............................ 33 Figure 32 – An Example of Resource Shelf Configuration ........ 35 Figure 33 - Principle of Resource Shelf................................. 36 Figure 34 - Rear view of BUSN Backplane ............................ 37 Figure 35 – Full Configuration of Control Shelf (when BGSN Is Used) ............................................................................. 39 Figure 36 - Principle of Control Shelf (when BGSN Is Used) .... 40 Figure 37 – Rear View of BCTC Backplane (when BGSN Is Used) ..................................................................................... 42 Figure 38 – DIP Switches on RBID Board ............................. 43 Figure 39 – Full Configuration of Packet Switching Shelf (when BGSN Is Used) ................................................................. 45 Figure 40 - Principle of Packet Switching Shelf (when BGSN Is Used) ............................................................................. 46 Figure 41 – Rear view of BPSN Backplane ............................ 47 Figure 42 – An Example of Gigabit Resource Shelf Configuration ..................................................................................... 49 Figure 43 - Principle of Gigabit Resource Shelf ...................... 50 Figure 44 - Rear view of BGSN Backplane ............................ 52 Figure 45 – Single Cabinet Clock Extracting and Distribution (Using BUSN) .................................................................. 53 Figure 46 – Dual-Cabinet Clock Extracting and Distribution (Using BUSN) .................................................................. 54 Figure 47 – Single Cabinet Control Plane Ethernet Connections (Using BUSN) .................................................................. 55 Figure 48 – Dual-Cabinet Control Plane Ethernet Connections (Using BUSN) .................................................................. 56 Figure 49 – Single Cabinet User Plane Connections (Using BUSN) ..................................................................................... 57 Figure 50 – Dual-Cabinet User Plane Connections (Using BUSN) ..................................................................................... 57 Figure 51 – Single Cabinet Monitoring Cable Connections (Using BUSN) ............................................................................ 58 Figure 52 – Dual-Cabinet Monitoring Cable Connections (Using BUSN) ............................................................................ 59

228


Appendix C - Figures

Figure 53 – Single Cabinet Clock Extracting and Distribution (Using BGSN) .................................................................. 60 Figure 54 – Dual-Cabinet Clock Extracting and Distribution (Using BGSN) .................................................................. 60 Figure 55 – Single Cabinet Control Plane Ethernet Connections (Using BGSN) .................................................................. 61 Figure 56 – Dual-Cabinet Control Plane Ethernet Connections (Using BGSN) .................................................................. 62 Figure 57 – Single Cabinet User Plane Connections (Using BGSN) ..................................................................................... 63 Figure 58 – Dual-Cabinet User Plane Connections (Using BGSN) ..................................................................................... 63 Figure 59 – Single Cabinet Monitoring Cable Connections (Using BGSN) ............................................................................ 64 Figure 60 – Dual-Cabinet Monitoring Cable Connections (Using BGSN) ............................................................................ 65 Figure 61 – Board Assembly Relation................................... 68 Figure 62 - Working Principle of CHUB ................................. 68 Figure 63 – CHUB, RCHB1, RCHB2 Panels ............................ 70 Figure 64 - Working Principle of BIPI ................................... 73 Figure 65 – BIPI and RMNIC Panels..................................... 75 Figure 66 – Working Principle of GUP...................................79 Figure 67 – GUP Panel.......................................................81 Figure 68 – Working Principle of GUP2................................. 83 Figure 69 – GUP2 Panel ..................................................... 85 Figure 70 - Working Principle of CLKG (CLKG) ...................... 87 Figure 71 – CLKG (CLKG), RCKG1, RCKG2 Panels..................89 Figure 72 - Working Principle of CLKG (ICM)......................... 95 Figure 73 – CLKG (ICM), RCKG1, RCKG2 Panels.................... 97 Figure 74 - Working Principle of ICM ................................. 101 Figure 75 – ICM, RCKG1, RCKG2 Panels............................. 102 Figure 76 – Working Principle of CMP ................................ 110 Figure 77 – CMP Panel .................................................... 111 Figure 78 - Working Principle of DTB ................................. 113 Figure 79 – DTB (Version 040501) and RDTB Panel ............. 115 Figure 80 – DTB (Version 060201) Panel............................ 116 Figure 81 – Jumpers on RDTB Panel .................................. 118 Figure 82 - Working Principle of GLI .................................. 120 Figure 83 – GLI Panel...................................................... 122


229


Figure 84 – Working Principle of EIPI................................. 124 Figure 85 – EIPI Panel..................................................... 126 Figure 86 – Working Principle of GIPI ................................ 128 Figure 87 – GIPI, RGER, RMNIC Panels.............................. 129 Figure 88 – Working Principle of GUIM............................... 132 Figure 89 – GUIM, RGUM1, RGUM2 Panels ......................... 133 Figure 90 – OMP and RMPB Panels .................................... 138 Figure 91 - Working Principle of PSN ................................. 141 Figure 92 – PSN Board Panel............................................ 142 Figure 93 – Working Principle of PWRD .............................. 144 Figure 94 – PWRD Board Panel......................................... 145 Figure 95 – Jumper settings............................................. 146 Figure 96 – Working Principle of SBCX Board...................... 147 Figure 97 – SBCX and RSVB Panels ................................... 148 Figure 98 – Working Principle of SDTB............................... 151 Figure 99 – SDTB and RGIM1 Panels ................................. 153 Figure 100 – Working Principle of SDTB2 ........................... 155 Figure 101 – SDTB2 and RGIM1 Panel ............................... 157 Figure 102 - Working Principle of SPB................................ 160 Figure 103 – SPB Panels.................................................. 161 Figure 104 – Jumpers on RSPB Panel ................................ 164 Figure 105 - Working Principle of SPB2 .............................. 165 Figure 106 – SPB2 Panels ................................................ 167 Figure 107 - Working Principle of UIMC.............................. 170 Figure 108 – UIMC, RUIM2, RUIM3 Panels.......................... 171 Figure 109 - Working Principle for UIMU ............................ 175 Figure 110 – UIMU and RUIM1 Panels................................ 177 Figure 111 - Working Principle of UPPB .............................. 180 Figure 112 – UPPB Panel ................................................. 182 Figure 113 - Working Principle of ALB................................ 186 Figure 114 – Basic Connection Mode of ALB ....................... 188 Figure 115 – Expansion Connection Mode of ALB................. 188 Figure 116 – Appearance of ALB ....................................... 189 Figure 117 – ALB Panel ................................................... 189 Figure 118 – Interfaces of ALB ......................................... 190 Figure 119 – GPS Active Antenna...................................... 193

230


Appendix C - Figures

Figure 120 – GPS Antenna Lightning Protector/Frequency Divider ................................................................................... 194 Figure 121 – Connections between ICM, GPS antenna lightning protector/frequency divider, and GPS active antenna ........... 194 Figure 122 – Configuration when BUSN Is Used (Abis Interface: E1, A-Interface: E1)........................................................ 200 Figure 123 – Configuration when BUSN Is Used (Abis Interface: IP+E1, A-Interface: E1) .................................................. 201 Figure 124 – Configuration when BUSN Is Used (Abis Interface: IP+E1, A-Interface: STM-1) ............................................. 202 Figure 125 – Configuration when BUSN Is Used (Abis Interface: IPoE, A-Interface: E1)..................................................... 203 Figure 126 – Configuration when BUSN Is Used (Abis Interface: E1, A-Interface: STM-1) .................................................. 204 Figure 127 – Configuration when BUSN Is Used (Abis Interface: E1, Ater Interface: E1 (TC Is External)) ............................. 205 Figure 128 – Configuration when BUSN Is Used (Abis Interface: E1, Ater Interface: STM-1 (TC Is External))........................ 206 Figure 129 – Configuration when BUSN Is Used (Abis Interface: E1, Ater Interface: IP (TC Is External)).............................. 207 Figure 130 – Configuration when BGSN Is Used (Abis Interface: E1(T1), A-Interface: E1(T1))............................................ 208 Figure 131 – Configuration when BGSN Is Used (Abis Interface: E1, A-Interface: STM-1) .................................................. 209 Figure 132 – Configuration when BGSN Is Used (Abis Interface: E1, A-Interface: IP) ........................................................ 210 Figure 133 – Configuration when BGSN Is Used (Abis Interface: IP, A-Interface: IP) ......................................................... 211 Figure 134 – Configuration when BGSN Is Used (Abis Interface: IP, A-Interface: E1(T1)) .................................................. 212 Figure 135 – Configuration when BGSN Is Used (Abis Interface: IP, A-Interface: STM-1)................................................... 213 Figure 136 – Configuration when BGSN Is Used (Abis Interface: IPoE, A-Interface: E1(T1)) ............................................... 214 Figure 137 – Configuration when BGSN Is Used (Abis Interface: IPoE, A-Interface: STM-1) ............................................... 215 Figure 138 – Configuration when BGSN Is Used (Abis Interface: IPoE, A-Interface: IP) ..................................................... 216 Figure 139 – Configuration when BGSN Is Used (Abis Interface: E1(T1), Ater Interface: E1(T1)) ........................................ 217 Figure 140 – Configuration when BGSN Is Used (Abis Interface: IP, Ater Interface: E1(T1))............................................... 218


231



232


Tables Table 1 – Manual Summary ..................................................i Table 2 - Typographical Conventions .................................... iii Table 3 - Mouse Operation Conventions ................................ iv Table 4 – Usage Explanation of the Hazardous Substances in ZXG10 iBSC (V6.20) ...........................................................v Table 5 – Panel Indicators of Power Distribution Plug-in box ... 18 Table 6 – Panel Switches Power Distribution Plug-in box ........ 19 Table 7 - Power Distribution Plug-in box Interfaces................ 20 Table 8 – Panel Indicators of Fan plug-in box........................ 21 Table 9 – Fan Plug-in box Interfaces ................................... 21 Table 10 – Types and Functions of Shelves........................... 23 Table 11 - Relationship between a Shelf and a Backplane....... 26 Table 12 – Boards in Control Shelf ...................................... 26 Table 13 – Power Interface of Control Shelf.......................... 30 Table 14 – DIP Switches on Backplane of Control Shelf .......... 30 Table 15 – Boards in Packet Switching Shelf ......................... 31 Table 16 – Power Interface of Switching Shelf ...................... 33 Table 17 – Boards in Resource Shelf.................................... 34 Table 18 - Power Interface of Resource Shelf........................ 37 Table 19 – Boards in Control Shelf (when BGSN Is Used) ....... 38 Table 20 – Power Interface of Control Shelf (when BGSN Is Used) ..................................................................................... 42 Table 21 – DIP Switches on Backplane (when BGSN Is Used).. 43 Table 22 – Boards in Packet Switching Shelf (when BGSN Is Used) ............................................................................. 44 Table 23 – Power Interface of Switching Shelf ...................... 47 Table 24 – Boards in Gigabit Resource Shelf ......................... 48 Table 25 - Power Interface of Gigabit Resource Shelf ............. 52 Table 26 – CHUB Board Panel Indicators .............................. 70 Table 27 – CHUB Panel Buttons ..........................................71 Table 28 – CHUB External Interfaces ................................... 72


233


Table 29 – BIPI Panel Indicators ......................................... 75 Table 30 – RUN/ALM Combination Description ...................... 76 Table 31 – BIPI Panel Buttons ............................................ 78 Table 32 – RMNIC Panel Interfaces ..................................... 78 Table 33 – GUP Panel Indicators ......................................... 81 Table 34 – GUP Panel Buttons ............................................ 82 Table 35 – GUP2 Panel Indicators ....................................... 86 Table 36 – GUP2 Panel Buttons .......................................... 86 Table 37 – CLKG (CLKG) Board Panel Indicators ................... 89 Table 38 – CLKG (CLKG) Board Panel Buttons....................... 91 Table 39 – CLKG (CLKG) Board Interfaces............................ 91 Table 40 – CLKG (ICM) Board Panel Indicators ..................... 97 Table 41 – CLKG (ICM) Jumpers ....................................... 100 Table 42 – ICM Board Panel Indicators .............................. 103 Table 43 – ICM Board Panel Buttons.................................. 106 Table 44 – ICM Board Interfaces....................................... 106 Table 45 – ICM Jumpers .................................................. 109 Table 46 – CMP Board Panel Indicators .............................. 111 Table 47 – CMP Board Panel Buttons ................................. 113 Table 48 – DTB Panel Indicators ....................................... 116 Table 49 – DTB Panel Buttons .......................................... 117 Table 50 – DTB Panel Interfaces ....................................... 117 Table 51 – Connection Modes of X9 to X16......................... 118 Table 52 – GLI Board Panel Indicators ............................... 123 Table 53 – GLI Board Panel Buttons .................................. 123 Table 54 – GLI Board Interfaces ....................................... 124 Table 55 – EIPI Panel Indicators ....................................... 126 Table 56 – EIPI Panel Buttons .......................................... 127 Table 57 – GIPI Panel Indicators....................................... 129 Table 58 – GIPI Panel Buttons.......................................... 130 Table 59 – GIPI Board Interfaces...................................... 130 Table 60 – GUIM Panel Indicators ..................................... 134 Table 61 – GUIM Panel Buttons ........................................ 135 Table 62 – GUIM Board Interfaces .................................... 136 Table 63 – OMP Board Panel Indicators.............................. 138 Table 64 – OMP Panel Buttons.......................................... 140

234


Appendix C - Tables

Table 65 – OMP Board Interfaces ...................................... 140 Table 66 – PSN Board Panel Indicators .............................. 142 Table 67 – PSN Board Panel Buttons ................................. 143 Table 68 – SBCX Panel Indicators ..................................... 148 Table 69 – SBCX Panel Buttons ........................................ 150 Table 70 – SBCX Interfaces.............................................. 150 Table 71 – SDTB Panel Indicators ..................................... 153 Table 72 – SDTB Panel Buttons ........................................ 154 Table 73 – SDTB Interfaces.............................................. 155 Table 74 – SDTB2 Panel Indicators.................................... 158 Table 75 – SDTB2 Panel Buttons....................................... 159 Table 76 – SDTB2 Interfaces............................................ 159 Table 77 – SPB Panel Indicators ....................................... 161 Table 78 – SPB Panel Buttons........................................... 162 Table 79 - SPB Panel Interfaces ........................................ 162 Table 80 – RSPB Jumper Settings ..................................... 164 Table 81 – SPB2 Panel Indicators...................................... 168 Table 82 – SPB2 Panel Buttons......................................... 169 Table 83 – SPB2 Panel Interfaces...................................... 169 Table 84 – UIMC Board Indicators..................................... 171 Table 85 – UIMC Panel Buttons......................................... 173 Table 86 – UIMC Board Interfaces..................................... 173 Table 87 – UIMU Panel Indicators ..................................... 177 Table 88 – UIMU Panel Buttons ........................................ 179 Table 89 – UIMU Board Interfaces..................................... 179 Table 90 – UPPB Panel Indicators...................................... 182 Table 91 – UPPB Panel Buttons ......................................... 183 Table 92 – ALB Panel Indicators........................................ 190 Table 93 – ALB Panel Buttons........................................... 191 Table 94 – ALB Panel Interfaces ....................................... 191 Table 95 – GPS Active Antenna Technical Indices ................ 194 Table 96 – Technical Indices of GPS Antenna Lightning Protector/Frequency Divider............................................. 195 Table 97 – Technical Indices of GPS L1 Outdoor Receiving Antenna ........................................................................ 196 Table 98 – Technical Indices of GPS L1 Indoor Transmitting Antenna ........................................................................ 196


235


Table 99 – Technical Indices of GPS L1 Signal Controller ...... 196 Table 100 – Technical Indices of GPS Antenna Feeder Lightning Protector ....................................................................... 197 Table 101...................................................................... 219

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ZTE - ZXG10 IBSC Base Station Controller Hardware Manual

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