Descripción: Todos los pasos y tecnicas para realizar una practica con VHDL de decodificador/codificador, mostrando los numeros de 0 al 9 en un display de 7 segmentos, ademas de resultados. Se muestra el codig...
Descripción completa
Descripción: vlsi design processor
Descripción: contains VHDL code, with testbench and waveforms for some experiments.
practica realizada sobre decodificadoresDescripción completa
investigacion de decodificador de señal digital y analogicaDescripción completa
Descripción completa
VHDLDescripción completa
Descripción completa
Descrição: Revista do IL Ufrgs
manual
Contador ascendente 0-99 VHDLDescripción completa
Descripción: como diseñar un temporizador en vhdl
CHRISTIAN GILBERTO MUÑOZ PINEDA 1800591
1
DIAGRAMA DE BLOQUE a b c d e ) g
E ( ENTIDAD D Dec"d!#cad"$ de ( %e&$a' C ( B ( A ( DISTRIBUCIÓN DEL DISPLAY DE 7 SEGMENTOS a )
g
e d
b c
TABLA T ABLA DE LA VERDAD LET RA Q3
Q2
Q1
Q0
0
0
0
0
a
F6
F5
F4
F3
F2
F1
F0
a
b
c
d
e
f
g
ON
ON
ON
ON
ON
OF
ON
F
0 0 0
0 0 0
0 1 1
1 0 1
b c d
ON
ON
ON
ON
ON
OF
OF
ON
ON
OF
ON
F
F
F
OF
ON
ON
OF
OF
F
F
OF
F
ON
ON
F
0
1
0
0
e
ON ON
OF
ON
F
ON
OF
ON
ON
ON
ON
ON
ON
ON
OF
ON
ON
ON
ON
ON
OF
OF
OF
OF
F
F
F
F
F
0 0
1 1
0 1
1 0
F g
ON ON
OF
OF
OF
F
F
F
ON
ON
ON
F
0 1 1
1 0
1 0
1 0
!
OF
OF
F
F
OF
OF
F
F
ON
OF F
ON
CHRISTIAN GILBERTO MUÑOZ PINEDA 1800591
CHRISTIAN GILBERTO MUÑOZ PINEDA 1800591
2
1
0
0
1
*
OF
ON
ON
ON
ON
F
1 1 1 1 1 1
0 0 1 1 1 1
1 1 0 0 1 1
0 1 0 1 0 1
L + " , $ .
OF
OF
OF
F
F
F
OF
OF
ON
F
F
OF
OF
F
F
ON
ON
ON
ON
ON
OF
F
F
ON
OF F
OF
ON
F
ON
OF
ON
OF
ON
F
ON
OF
ON
F
ON
ON
ON
ON
OF
OF
ON
ON
F
F
ON
OF
ON
OF
OF
F
F
ON
OF
OF
OF
OF
F
F
F
F
OF
OF
OF
OF
OF
OF
F
F
F
F
F
F
F
ON
PROGRAMA EN VHDL
1. 2. *. (. 5. '. 3.
library ieee; use ieee.s!"#$%i&"11'(.)##; entity !e&$!i+i&)!$,"!e"#e,)s is port / in s!"#$%i&"e&$, -* downto 0; / out s!"#$%i&"e&$, -' downto 0; end !e&$!i+i&)!$,"!e"#e,)s; architecture )si"+4&i$) of !e&$!i+i&)!$,"!e"#e,)s is 8. begin
9. 67Ii&i) !es&,i&i ),:4ie&4,); 10. with select 11. < =1111101> when =0000>? 12. =0011111> when =0001>? 1*. =0001101> when ‘0010>, 1(. =0111101> when =0011>? 15. =1101111> when =0100>? 1'. =1000111> when =0101>? 13. =1111011> when =0110>? 18. =0010111> when =0111>? 19. =0010000> when =1000>? 20. =0111100> when =1001>? 21. =0001110> when =1010>? 22. =0010101> when =1011>? 2*. =0011101> when =1100>? 2(. =1100111> when =1101>? 25. =1110011> when =1110>? 2'. =0000101> when =1111>? 23. =0000001> when others? 28. end )si"+4&i$); 29. 67i)#i@)&i !e# &!i%$ e #e%4)e HDL;
