CHAPTER.4: Transistor at low frequencies • • • • •
Introduction Ampl Amplif ific icat atio ion n in in the the AC doma domain in BJT BJT tr transi ansist stor or model odeliing The The re re Tra Trans nsis isto torr Mod Model el The The Hyb Hybri rid d equ equiv ival alen entt Mod Model el
Introduction
• • • •
There There are are three three model modelss common commonly ly used used in the the small small – sign signal al ac anal analysi ysiss of transistor networks: The re model The hybrid π model The The hyb hybri rid d equ equiv ival alen entt mod model el
Amplification in the AC domain
The transistor can be employed as an amplifying device, that is, the output ac power is greater than the input ac power. The factor that permits an ac power output greater than the input ac power p ower is the applied DC power. The amplifier is initially biased for the required DC voltages and currents. Then the ac to be amplified is given as input to the amplifier. If the applied ac exceeds the limit set by dc level, clipping of the peak region will result in the output. Thus, proper (faithful) amplification design requires that the dc and ac components be sensitive to each other’s requirements and limitations. The superposition theorem is applicable for the analysis and design o f the dc and ac components compon ents of a BJT network, permitting the separation of the analysis of the dc and ac responses of the system. BJT Transistor modeling
•
• •
The key key to transistor transistor small-sign small-signal al analysi analysiss is the use use of the equival equivalent ent circuit circuitss (models). A MODEL IS A COMBINATION OF CIRCUIT ELEMENTS LIKE VOLTAGE OR CURRENT SOURCES, RESISTORS, CAPACITORS etc, that best approximates the behavior of a device under specific operating conditions. Once the model (ac equivalent equ ivalent circuit) is determined, the schematic symbol for the device can be replaced by the equivalent circuit and the basic methods of circuit analysis applied to determine the desired qu antities of the network. Hybrid Hybrid equivalent equivalent network network – employ employed ed initiall initially. y. Drawback Drawback – It is defined defined for a set of operating conditions that might not match the actual operating conditions. re mode model: l: desi desirab rable, le, but but does does not includ includee feedbac feedback k term term
1
•
Hybrid π model: model of choice.
AC equivalent of a network
• • • • •
AC equ equiv ival alent ent of a netwo network rk is is obta obtain ined ed by: by: Setting Setting all dc sources sources to zero zero and replacing replacing them them by a short short – circuit circuit equival equivalent ent Replac Replacing ing all all capac capacit itors ors by short short – circu circuit it equi equival valent ent Removi Removing ng all elem element entss bypasse bypassed d by the the short short – circui circuitt equival equivalent entss Redraw Redrawing ing the networ network k in a more more conveni convenient ent and and logi logical cal form form..
re model
•
•
In re model, the transistor action has been replaced by a single diode between emitter and base terminals and a controlled current source between base and collector terminals. This This is rather rather a simpl simplee equiva equivalen lentt circu circuit it for for a device device
2
•
Hybrid π model: model of choice.
AC equivalent of a network
• • • • •
AC equ equiv ival alent ent of a netwo network rk is is obta obtain ined ed by: by: Setting Setting all dc sources sources to zero zero and replacing replacing them them by a short short – circuit circuit equival equivalent ent Replac Replacing ing all all capac capacit itors ors by short short – circu circuit it equi equival valent ent Removi Removing ng all elem element entss bypasse bypassed d by the the short short – circui circuitt equival equivalent entss Redraw Redrawing ing the networ network k in a more more conveni convenient ent and and logi logical cal form form..
re model
•
•
In re model, the transistor action has been replaced by a single diode between emitter and base terminals and a controlled current source between base and collector terminals. This This is rather rather a simpl simplee equiva equivalen lentt circu circuit it for for a device device
2
The Hybrid equivalent model
For the hybrid equivalent model, the parameters are defined at an operating point. The quantities hie, hre,hfe, and hoe are called hybrid parameters and are the components of a small – signal equivalent circuit. • The descr descript iption ion of the the hybrid hybrid equiv equivale alent nt model model will will begin begin with with the the general general two port system.
• • • •
• • • • •
The set set of equatio equations ns in which which the the four four variab variables les can can be rela related ted are: are: Vi = h11Ii + h12Vo Io = h21Ii + h22Vo The fo four variables h11, h12, h21 and h22 are called hybrid parameters ( the mixture of variables in each equation results in a “ hybrid” set of units of measurement for the h – parameters. Set Vo = 0, solving for h11, h11 = Vi / Ii Ohms This is is the ratio ratio of input input voltage voltage to to the input current current with with the output output terminals terminals shorted. It is called Short circuit input impedance parameter. If Ii is set equal to zero by opening the input leads, we get g et expression for h12: h12 = Vi / Vo , This is called open circuit reverse voltage ratio. Again by setting Vo to zero by shorting the output ou tput terminals, we get h21 = Io / Ii known as short circuit forward transfer current ratio. Again by by se setting I1 = 0 by opening the input leads, h22 = Io / Vo . This is known as open – circuit output admittance. This is represented as resistor ( 1/h22) • h11 = hi = input resistance • h12 = hr = reverse transfer voltage ratio • h21 = hf = forward transfer current ratio • h22 = ho = Output conductance
3
Hybrid Input equivalent circuit
•
Hybrid output equivalent circuit
Complete hybrid equivalent circuit
4
Common Emitter Configuration - hybrid equivalent circuit
• • • •
Essentially, the transistor model is a three terminal two – port system. The h – parameters, however, will change with each configuration. To distinguish which parameter has been used or which is available, a second subscript has been added to the h – parameter notation. For the common – base configuration, the lowercase letter b is added, and for common emitter and common collector configurations, the letters e and c are used respectively.
Common Base configuration - hybrid equivalent circuit
Configuration
Ii
Io
Vi
Vo
Common emitter
Ib
Ic
Vbe
Vce
Common base
Ie
Ic
Veb
Vcb
Common Collector
Ib
Ie
Vbe
Vec
5
• •
Normally hr is a relatively small quantity, its removal is approximated by hr ≅ 0 and hr Vo = 0, resulting in a short – circuit equivalent. The resistance determined by 1/ho is often large enough to be ignored in comparison to a parallel load, permitting its replacement by an open – circuit equivalent.
h-Parameter Model v/s. r e Model
hie = βr e 6
hfe = βac Common Base: re v/s. h-Parameter Model
Common-Base configurations - h-Parameters
hib= r e hfb= - α = -1 Problem
•
Given IE = 3.2mA, hfe = 150, hoe = 25µS and hob = 0.5 µS . Determine – The common – emitter hybrid equivalent – The common – base r e model
Solution:
• • •
We know that, hie = βre and r e = 26mV/IE = 26mV/3.2mA = 8.125Ω βre = (150)(8.125) = 1218.75k Ω r o = 1 /hoe = 1/25µS = 40k Ω
7
• • •
r e = 8.125Ω r o = 1/ hob = 1/0.5µS = 2M Ω α≅1
•
Small signal ac analysis includes determining the expressions for the following parameters in terms of Zi, Zo and AV in terms of – β – r e – r o and – R B, R C • Also, finding the phase relation between input and output • The values of β, r o are found in datasheet • The value of re must be determined in dc condition as r e = 26mV / IE Common Emitter - Fixed bias configuration
•
Removing DC effects of V CC and Capacitors
8
re model
Small signal analysis – fixed bias
•
From the above re model, Zi = [R B ÷÷βr e] ohms
If R B > 10 βr e, then, [R B ÷÷βr e] ≅ βr e Then, Zi ≅ βr e Zo is the output impedance when Vi =0. When Vi =0, i b =0, resulting in open circuit equivalence for the current source.
•
Zo = [R C÷÷r o ] ohms
9
•
AV –
Vo = - βI b( R C || r o)
• •
From the re model, I b = Vi / β r e thus, – Vo = - β (Vi / β r e) ( R C || r o) – AV = Vo / Vi = - ( R C || r o) / r e
•
If ro >10R C, – AV = - ( R C / r e)
•
The negative sign in the gain expression indicates that there exists 180o phase shift between the input and output.
Common Emitter - Voltage-Divider Configuration
• •
The re model is very similar to the fixed bias circuit except for R B is R 1÷÷R 2 in the case of voltage divider bias. Expression for AV remains the same.
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• •
Zi = R 1 ÷÷R 2 ÷÷β r e Zo = R C From the re model, I b = Vi / β r e thus, Vo = - β (Vi / β r e) ( R C || r o) AV = Vo / Vi = - ( R C || r o) / r e
• o
If r o >10R C, AV = - ( R C / r e)
Common Emitter - Unbypassed Emitter-Bias Configuration
•
•
Applying KVL to the input side: Vi = I b βr e + IeR E
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Vi = I b βr e +(β +1) I bR E Input impedance looking into the network to the right of RB is Z b = Vi / I b = βr e+ (β +1)R E Since β>>1,
(β +1) = β
Thus, Z b = Vi / I b = β (r e+R E) •
Since RE is often much greater than r e, Z b = βR E,
• Zi = R B||Z b •
Zo is determined by setting Vi to zero, I b = 0 and β I b can be replaced by open circuit equivalent. The result is, • Zo = R C
•
AV : We know that, Vo = - IoR C = - βI bR C = - β(Vi/Z b)R C AV = Vo / Vi = - β(R C/Z b)
Substituting,
Z b = β(r e + R E) AV = Vo / Vi = - β[R C /(r e + R E)]
R E >>r e, AV = Vo / Vi = - β[R C /R E] • Phase relation: The negative sign in the gain equation reveals a 180o phase shift between input and output.
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Emitter – follower
re model
•
Zi = R B || Z b
•
Z b = βr e+ (β +1)R E
•
Z b = β(r e+ R E)
•
Since RE is often much greater than r e,
•
To find Zo, it is required to find output equivalent circuit of the emitter follower at its input terminal. This can be done by writing the equation for the current Ib. I b = Vi / Z b
•
Z b = βR E
Ie = (β +1)I b = (β +1) (Vi / Z b)
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•
We know that, Z b = βr e+ (β +1)R E substituting this in the equation for Ie we get, Ie = (β +1) (Vi / Z b) = (β +1) (Vi / βr e+ (β +1)R E ) Ie = Vi / [βr e/ (β +1)] + R E
•
Since (β +1) = β, Ie = Vi / [r e+ R E]
•
Using the equation Ie = Vi / [r e+ R E] , we can write the output equivalent circuit as,
•
•
As per the equivalent circuit, Zo = R E||r e
•
Since RE is typically much greater than r e, Zo ≅ r e
•
AV – Voltage gain:
•
Using voltage divider rule for the equivalent circuit, Vo = Vi R E / (R E+ r e) AV = Vo / Vi = [R E / (R E+ r e)]
•
Since (RE + r e) ≅ R E, AV ≅ [R E / (R E] ≅ 1
• •
Phase relationship
As seen in the gain equation, output and input are in phase.
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Common base configuration
re model
Small signal analysis
•
Input Impedance:
Zi = R E||r e
•
Output Impedance:
Zo = R C
•
To find, Output voltage, Vo = - IoR C Vo = - (-IC)R C = αIeR C
o
Ie = Vi / r e, substituting this in the above equation, Vo = α (Vi / r e) R C Vo = α (Vi / r e) R C
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Voltage Gain: AV:
AV = Vo / Vi = α (R C/ r e)
α ≅ 1;
AV = (R C/ r e)
Current gain
Ai = Io / Ii Io = - α Ie = - α Ii Io / Ii = - α ≅ -1 Phase relation: Output and input are in phase.
h-Parameter Model vs. re Model
CB re vs. h-Parameter Model
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Common-Base h-Parameters h ib
= r e
h fb
= −α ≅ −1
•
Small signal ac analysis includes determining the expressions for the following parameters in terms of Zi, Zo and AV in terms of – β – r e – r o and – R B, R C • Also, finding the phase relation between input and output • The values of β, r o are found in datasheet • The value of re must be determined in dc condition as r e = 26mV / IE Common Emitter Fixed bias configuration
•
Removing DC effects of V CC and Capacitors
17
re model
Small signal analysis – fixed bias Input impedance Z i:
From the above r e model, is, Zi = [R B ÷÷βr e] ohms If R B > 10 βr e, then, [RB ÷÷βr e] ≅ βr e Then,
Zi
re
Ouput impedance Z oi:
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Zo is the output impedance when Vi = 0. When Vi = 0, i b = 0, resulting in open circuit equivalence for the current source.
Zo = [R C
ro ] ohms
Voltage Gain A v:
Vo = - βI b( R C || r o) From the re model,
I b = Vi / β r e
thus,
Vo = - β (Vi / β r e) ( R C || r o) AV = Vo / Vi = - ( R C || r o) / r e
If r o >10R C,
AV = - ( R C / re)
Phase Shift:
The negative sign in the gain expression indicates that there exists 180o phase shift between the input and output.
Problem:
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Common Emitter - Voltage-Divider Configuration
Equivalent Circuit:
The re model is very similar to the fixed bias circuit except for R B is R 1÷÷R 2 in the case of voltage divider bias. Expression for AV remains the same. Zi = R 1 ÷÷R 2 ÷÷β r e Zo = R C :
Voltage Gain, A V:
From the r e model, I b = Vi / β r e Vo = - Io ( R C || r o), Io = β I b thus,
Vo = - β (Vi / β r e) ( R C || r o) 20
AV = Vo / Vi = - ( R C || r o) / r e If r o >10R C,
AV = - ( R C / r e)
Problem :
Given: β = 210, r o = 50k Ω. Determine: r e, Zi, Zo, AV. For the network given:
To perform DC analysis, we need to find out whether to choose exact analysis or approximate analysis. This is done by checking whether βR E > 10R 2, if so, approximate analysis can be chosen. Here, βR E = (210)(0.68k) = 142.8k Ω. 10R2 = (10)(10k) = 100k. Thus,
βRE > 10R2.
Therefore using approximate analysis,
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VB = VccR 2 / (R 1+R 2) = (16)(10k) / (90k+10k) = 1.6V VE = VB – 0.7 = 1.6 – 0.7 = 0.9V IE = VE / R E = 1.324mA r e = 26mV / 1.324mA = 19.64Ω Effect of r o can be neglected if r o ≥ 10( R C). In the given circuit, 10R C is 22k, r o is 50K. Thus effect of r o can be neglected. Zi = ( R 1||R 2||βR E) = [90k||10k||(210)(0.68k)] = 8.47k Ω Zo = R C = 2.2 k Ω
AV = - R C / R E = - 3.24 If the same circuit is with emitter resistor bypassed, Then value of re remains same. Zi = ( R 1||R 2||βr e) = 2.83 k Ω Zo = R C = 2.2 k Ω AV = - R C / r e = - 112.02
Common Emitter Un bypassed Emitter - Fixed Bias Configuration
Equivalent Circuit:
22
Applying KVL to the input side: Vi = I bβr e + IeR E Vi = I bβr e +(β +1) I bR E Input impedance looking into the network to the right of R B is Z b = Vi / I b = βr e+ (β +1)R E Since β>>1,
(β +1) = β
Thus,
Z b = Vi / I b = β (r e+R E)
Since R E is often much greater than r e, Z b = βR E, Zi = R B||Z b Zo is determined by setting Vi to zero, I b = 0 and βI b can be replaced by open circuit equivalent. The result is,
Zo = R C
We know that,
Vo = - IoR C = - βI bR C = - β(Vi/Z b)R C AV = Vo / Vi = - β(R C/Z b)
Substituting
Z b = β(r e + R E) AV = Vo / Vi = - β[R C /(r e + R E)]
R E >>r e,
AV = Vo / Vi = - β[R C /R E]
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Phase relation: The negative sign in the gain equation reveals a 180o phase shift between input and output.
Problem:
Given: β = 120, r o = 40k Ω. Determine: r e, Zi, Zo, AV. To find r e, it is required to perform DC analysis and find IE as r e = 26mV / IE To find IE, it is required to find I B. We know that, IB = (VCC – VBE) / [R B + (β+1)R E] IB = (20 – 0.7) / [470k + (120+1)0.56k] = 35.89µA IE = (β+1)IB = 4.34mA r e = 26mV / IE = 5.99Ω
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Effect of r o can be neglected, if r o ≥ 10( R C + R E) 10( R C + R E) = 10( 2.2 k Ω + 0.56k) = 27.6 k Ω and given that r o is 40 k Ω, thus effect of r o can be ignored. Z i = R B|| [β ( r e + R E)] = 470k || [120 ( 5.99 + 560 )] = 59.34Ω Zo = R C = 2.2 k Ω AV = - βR C / [β ( r e + R E)] = - 3.89 Analyzing the above circuit with Emitter resistor bypassed i.e., Common Emitter IB = (VCC – VBE) / [R B + (β+1)R E] IB = (20 – 0.7) / [470k + (120+1)0.56k] = 35.89µA IE = (β+1)IB = 4.34mA r e = 26mV / IE = 5.99Ω Zi = R B|| [βr e] = 717.70Ω Zo = R C = 2.2 k Ω AV = - R C / r e = - 367.28 ( a significant increase)
Emitter – follower
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re model
Zi = R B || Z b Z b = βr e+ (β +1)R E Z b = β(r e+ R E) Since R E is often much greater than r e,
Z b = βR E
To find Zo, it is required to find output equivalent circuit of the emitter follower at its input terminal. This can be done by writing the equation for the current I b. I b = Vi / Z b Ie = (β +1)I b = (β +1) (Vi / Z b) We know that, Z b = βr e+ (β +1)R E substituting this in the equation for Ie we get, Ie = (β +1) (Vi / Z b) = (β +1) (Vi / βr e+ (β +1)R E ) dividing by (β +1), we get, Ie = Vi / [βr e/ (β +1)] + R E Since (β +1) = β, Ie = Vi / [r e+ R E]
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Using the equation Ie = Vi / [r e+ R E], we can write the output equivalent circuit as,
As per the equivalent circuit, Zo = R E||r e Since R E is typically much greater than r e, Zo ≅ re
AV – Voltage gain:
Using voltage divider rule for the equivalent circuit, Vo = Vi R E / (R E+ r e) AV = Vo / Vi = [R E / (R E+ r e)] Since (R E+ r e) ≅ R E, AV ≅ [R E / (R E] ≅ 1 Phase relationship As seen in the gain equation, output and input are in phase.
27
V o
Common base configuration
re model
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Small signal analysis
Zi = R E||r e Zo = R C To find Vo = - IoR C Vo = - (-IC)R C = αIeR C Substituting this in the above equation, Ie = Vi / r e, Vo = α (Vi / r e) R C Vo = α (Vi / r e) R C AV = Vo / Vi = α (R C/ r e)
α ≅ 1;
AV = (R C/ r e)
Current gain Ai : Ai = Io / Ii Io = - α Ie = - α Ii Io / Ii = - α ≅ -1 Phase relation: Output and input are in phase.
Common Emitter - Collector Feedback Configuration
29
re Model
Input Impedance: Zi Zi = Vi / Ii, Ii = I b – I′, thus it is required to find expression for I ′ in terms of known resistors. I′ = (Vo – Vi)/ R F
(1)
Vo = - IoR C Io = βI b + I′ Normally,
I′ << βI b
thus,
Io = βI b , Vo = - IoR C Vo = - βI b R C,
Replacing
I b by Vi / βr e 30
Thus, Vo = - β (Vi R C) / βr e = - (Vi R C) / r e
(2)
Substituting (2) in (1): I′ = (Vo – Vi)/ R F = (Vo / R F) - (Vi/ R F) = - [(Vi R C) / R F r e] - (V i/ R F) I′ = - Vi/R F[ (R C / r e )+1] We know that,
Vi = I bβr e, I b = Ii + I′
and,
I′ = - Vi/R F[ (R C / r e ) +1]
Thus,
Vi = ( Ii + I′ ) βr e = Ii βr e + I′ βr e = Ii βr e - (Vi βr e)( 1/R F)[ (R C / r e )+1]
Taking Vi terms on left side: Vi + (Vi βr e)( 1/R F)[ (R C / r e )+1] = Ii βr e Vi[1 + (βr e)( 1/R F)[ (R C / r e ) +1] = Ii βr e Vi / Ii = βr e / [1 + (βr e)( 1/R F)[ (R C / r e ) +1] But, [ (R C / r e )+1] ≅ R C / r e (because R C >> r e) Thus,
Zi = Vi / Ii = βr e / [1 + (βr e)( 1/R F)[ (R C / r e )] = βr e / [1 + (β)(R C/R F)]
Thus,
Zi = re / [(1/ ) + (R C/R F)]
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To find Output Impedance Zo:
Zo = R C || R F
( Note that i b = 0, thus no effect of βr e on Zo)
Voltage Gain A V:
Vo = - IoR C = - βI bR C ( neglecting the value of I′ ) = - β(Vi/ βr e)R C AV = Vo / Vi = - (R C/r e) Phase relation : - sign in A V indicates phase shift of 180° between input and output.
Collector DC feedback configuration
32
re model
Zi = R F1 ||βr e Zo = R C||R F2||r o, for r o≥10R C,
Zo = R C||R F2
To find Voltage Gain AV : Vo = - βI b(R F2||R C||r o), I b = Vi / βr e Vo = - β (Vi / βr e)(R F2||R C||r o) Vo / Vi = - (R F2||R C||r o) / r e, for r o≥10R C, AV = Vo / Vi = - (R F2||R C) / r e
Determining the current gain For each transistor configuration, the current gain can be determined directly from the voltage gain, the defined load, and the input impedance. We know that, current gain (Ai) = Io / Ii Io = (Vo / R L) and Ii = Vi / Zi Thus,
Ai = - (Vo /R L) / (Vi / Zi) = - (Vo Zi / Vi R L) Ai = - AV Zi / R L
Example :
For a voltage divider network, we have found that, Zi = βr e AV = - R C / r e and R L = R C Thus,
Ai = - AV Zi / R L = - (- R C / r e )(βr e) / R C
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Ai = For a Common Base amplifier, Zi = r e, AV = R C / r e, R L = R C Ai = - AV Zi / R L = - (R C / r e )(r e) / R C =-1 Effect of R L and R S:
Voltage gain of an amplifier without considering load resistance (R L) and source resistance (R S) is AVNL. Voltage gain considering load resistance ( R L) is AV < AVNL Voltage gain considering R L and R S is AVS, where AVS
AV = - (R C||R L) / r e Z i = R B|| βr e Zo = R C||r o To find the gain AVS, ( Zi and R S are in series and applying voltage divider rule) Vi = VSZi / ( Zi+R S) Vi / VS = Zi / ( Zi+R S) AVS = Vo / VS = (Vo/Vi) (Vi/VS) AVS = AV [Zi / ( Zi+R S)]
34
Voltage divider with R S and R L
Voltage gain:
AV = - [R C||R L] / r e
Input Impedance:
Zi = R 1||R 2||β r e
Output Impedance:
Zo = R C||R L||r o
Emitter follower with R S and R L
re model:
35
Voltage Gain:
AV = (R E||R L) / [R E||R L+r e]
Input Impedance:
Zi = R B || Z b
Input Impedance seen at Base:
Z b = β(R E||R L)
Output Impedance
Zo = r e
Two – port systems approach
This is an alternative approach to the analysis of an amplifier. This is important where the designer works with packaged with packaged products rather than individual elements. An amplifier may be housed in a package along with the values of gain, input and output impedances. But those values are no load values and by using these values, it is required to find out the gain and various impedances under loaded conditions. This analysis assumes the output port of the amplifier to be seen as a voltage source. The value of this output voltage is obtained by Thevinising the output port of the amplifier. Eth = AVNLVi Model of two port system
Applying the load to the two port system
36
Applying voltage divider in the above system: Vo = AVNLViR L / [ R L+R o]
Including the effects of source resistance R S
Applying voltage divider at the input side, we get: Vi = VSR i /[R S+R i] Vo = AVNLVi Vi = VSR i /[R S+R i] Vo = AVNL VSR i /[R S+R i] Vo/ VS = AVS = AVNLR i /[R S+R i]
Two port system with R S and R L
We know that, at the input side
37
Vi = VSR i /[R S+R i] Vi / VS = R i /[R S+R i] At the output side, Vo = AVNLViR L / [ R L+R o] Vo / Vi = AVNLR L / [ R L+R o] Thus, considering both R S and R L: AV = Vo / Vs = [Vo / Vi] [Vi / Vs] AV = (AVNLR L / [ R L+R o]) (R i / [R S+R i])
Example:
Given an amplifier with the following details: R S = 0.2 k Ω, AVNL = - 480, Zi = 4 k Ω, Zo = 2 k Ω Determine: AV with R L =1.2k Ω AV and Ai with R L= 5.6 k Ω, AVS with R L = 1.2 Solution :
AV = AVNLR L / (R L + R o) = (- 480)1.2k / (1.2k+2k) = - 180 With R L = 5.6k, AV = - 353.76 This shows that, larger the value of load resistor, the better is the gain. AVS = [R i /(R i+R S)] [ R L / (R L+R o)] AVNL = - 171.36 Ai = - AVZi/R L, here AV is the voltage gain when R L = 5.6k. Ai = - AVZi/R L = - (-353.76)(4k/5.6k) = 252.6 Hybrid
model
38
This is more accurate model for high frequency effects. The capacitors that appear a re stray parasitic capacitors between the various junctions of the d evice. These capacitances come into picture only at high frequencies. •
C bc or Cu is usually few pico farads to few tens of pico farads.
•
r bb includes the base contact, base bulk and base spreading resistances.
•
r be ( r π), r bc, r ce are the resistances between the indicated terminals.
•
r be ( r π) is simply βr e introduced for the CE r e model.
•
r bc is a large resistance that provides feedback between the output and the input.
•
r π = βr e
•
gm = 1/r e
•
r o = 1/hoe
•
hre = r π / (r π + r bc)
39
