Transistor 'h' and 'y' Parameters

Transistor “h” and “y” Parameters Basic Circuits There are three basic transistor circuits. They are called according to that electrode (emitter, base, col-lector) which is common to both input and output circuit.

If expressed in matrix form we obtain:

( ( ( ( v1 i2

i1 = (h) v 2

(h) =

( ( h ih r

h fh o

Explanation of h-Parameters Input impedance (shorted output, v 2 = 0) Common Emitter

hi =

v1 i1

Reverse voltage transfer ratio (open input, i 1 = 0) hr =

v1 i1

Small signal current gain (shorted output, v 2 = 0)

Common Base

hf =

i2 i1

Output admittance (open input, i 1 = 0) i2 ho = v 2

Common Collector

Properties of the three basic circuits: Common Emitter

Common Base

Common Collector

Input impedance

medium

small

high

Output impedance

medium

high

small

Current gain

high

less than 1

high

Upper frequency limit

l ow

hi g h

l ow

Four-Pole Four-Pole Symbols of h-Matrix A transistor can be considered considered as an active active four-pole network. When driven with small low-frequency signals its properties can be described by the four characteristic values of the h-matrix (hybrid), which are assumed to be real. v1 = hi · i1 + hr · v2 Transistor four pole

v1 = hi · i1 + hr · v2

A frequentl frequently y used used abbre abbreviati viation on is is the the determinant: ∆h = h i · h o - hr · h f

For all three basic circuit configurations the circuit illustrated below represents the equivalent four-pole circuit using h-parameters.

In the transistor data sheets the h-parameters are usually quoted for the common emitter configuration and for a given operating point (bias). The latter is determined by the collector voltage, the emitter or collector current and by the ambient temperature. For different operating points, correction factors are needed which can be gathered from the relevant curves. For common base or common collector transistor stage calculations, the appropriate h-parameters are ascertained from those of the common emitter configuration by using the following conversion formulas.

Common Emitter

Common Base

Common Collector

Input impedance

h ie

hie hib = 1 + h fe

hic = hie

Reverse voltage transfer ratio

h re

hie · hoe hrb = 1 + h - hre fe

hrc = 1 - h re

Small Signal current gain

h fe

hfe hfb = - 1 + h

-hfc = 1 + hfe

Output admittance

h oe

hoe hob = 1 + h fe

Calculation of a Tranistor Stage

Transistor four pole

Whereas the network behaviour of lowfrequency transistors could be described by using the h-matrix (hybrid), the y-matrix (admittance) is usually employed for high frequency transistors.

Transistor four pole

v1 hi + R L · ∆h = i1 1 + h o · RL

i1 = yi · v1 + yr · v2 i2 = yf · i1 + yo · v2

Output impedance Z2 =

hoc = hoe

Four-Pole Symbols of y-Matrix

Input impedance Z1 =

fe

v2 hi + R G = i2 ∆h + h o · RG

In matrix form we obtain:

( ( ( ( ( ( i1

Current gain

i2

i2 hf GC = = i1 1 + h o · RL

= (y)

V1

V2

(y) =

yi yr

yf yo

The y-parameters are complex values which can be expressed as

Voltage gain

yik = gik + jbik with bik = ωCik or with bωikL= -

v2 -hf · RL Gv = = v1 h i + R L · ∆h

1

ik

Often, the following notation is expedient:

Power gain

yik = 1 y ik 1 exp jϕik 2

Gp =

v 2 · i2 hf · RL = v1 · i1 (1 + ho · RL) (h i + R L · ∆h)

Maximum available power gain, input and output matched with R G opt resp. RL opt Gp max =

(

2 hf ∆h + hi · ho

(

By adding the suffix e, b, or c it is possible to indicate to which of the three basic circuit configurations the parameters are valid. Explanation of y-Parameters Input admittance (shorted output, v 2 = 0) yi =

i1 v1

RG opt =

hi · ∆h ho

Reverse Transconductance (shorted input, v 2 = 0)

RL opt =

hi ho · ∆h

yr =

i1 v2

Forward Transconductance (shorted output, v 2 = 0) yf =

Maximum available power gain, input and output matched with R G opt resp. RL opt

i2 v1

Gp max =

Output Admittance Admittance (shorted input, v 1 = 0) i2 v2

yo =

The determinant reads ∆y = y i · yo - y r · yf Conversion from y-Parameters to h-Parameters 1 hi = yi hf =

yr hr = yi

yf yi

ho = yi

yo ∆h = yi

∆y

Calculation of a Transistor Stage

Transistor four pole

Input impedance Z1 =

v1 1 + y o · RL = i1 yi + ∆y · RL

Output impedance Z2 =

v2 1 + y i · RG = i2 yo + ∆y · RG

Current gain GC =

i2 yf = i1 yi + ∆y · RL

Voltage gain Gv =

v2 -yf · RL = v1 1 + y o · RL

Power gain Gp =

v 2 · i2 |yf|2 · RL = v1 · i1 (1 + y o · RL) (y i + ∆y · RL)

Available power gain, input matched with RG opt Gp av =

4 · yf2 · RG · RL [(yi + ∆y · RL) · RG + 1 + yo · RL]2

(

2 yf ∆y + yi · yo

(

Maximum available power gain will be attained if input and output are matched, where: RL opt =

yo 1 yi · ∆y

RG opt =

yi 1 yo · ∆y

and: ∆y = y i · yo - yr · yf