key to cancel the active command and enter this mode.
Place Part
Selects parts from a library.
Wire tool
Draws a wire.
Net Alias tool
Places a net alias.(Somtimes refered to as the “net name” command.)
Bus tool
Draws a bus.
Junction tool
Places a junction.
Bus Entry tool
Places a bus entry.
Power tool
Places a power symbol.
Ground tool
Places a ground symbol.
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ELECTRICAL DESIGN OBJECTS Icon
Name
Function
Hierarchical Block tool
Places a hierarchical block.
Hierarchical Port tool
Places a hierarchical port.
Hierarchical Pin tool
Places a hierarchical pin.
Off-page Connector tool
Places an off-page connector.
No Connection tool
Places a no-connect symbol on a pin. This pin is ignored by DRC.
NON-ELECTRICAL DESIGN OBJECTS Icon
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Name
Function
Place Line
Draws a line.
Place Polyline
Draws a line with multiple segments.
Place Rectangle
Draws a rectangle.
Place Ellipse
Draws an ellipse.
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NON-ELECTRICAL DESIGN OBJECTS Icon
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Name
Function
Place Arc
Draws an arc.
Place Text
Places comment text.
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Lab 1-1:
Lesson 1
Opening an Existing Project
Lab Objectives After you complete this lab you will be able to: • • • •
Start OrCAD Capture Open a project Zoom and pan Close a project
Starting OrCAD Capture 1. Select Start - All Programs - OrCAD 15.7 - OrCAD Capture. 2. If a Studio Suite Selection window appears, select OrCAD Capture CIS and click OK. The OrCAD Capture session window appears.
Note The start up path and directory name may vary with different versions of the application installation CD.
Opening a Project 1. Select File - Open - Project. The Open Project window appears. 2. Navigate to the D:>Capture>Sample directory. The OrCAD Capture directory is your lab database. All your lab files are stored under this folder. 3. Select sample.opj and click Open. The Project Manager window opens. Observe that the name of the project file is displayed at the top of the Project Manager window.
Opening a Schematic If the schematic is not already open: 1. In the Project Manager window, double click .\sample.dsn. 2. Double click Schematic. 3. Double click PAGE1.
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Page one of the SAMPLE design opens. 4. Enlarge the schematic window and click the Zoom to all icon. The page size changes to fit the schematic window.
Zooming 1. In the main toolbar, click the Zoom In icon. The image has been magnified by a factor of 2 to 1. 2. In the main toolbar, click the Zoom Out icon. The image has been reduced by a factor of 2 to 1. The zoom scale factor is a user preference. We will show you how to set user preferences at the end of this lesson. 3. Press the key to zoom in and the key to zoom out. 4. Press the key to zoom in and the key to zoom out. When zooming in or out, observe that the cursor remains at the center of the view. These commands are cursor location dependent. 5. Place your cursor in a different areas and press the and keys again. 6. With your view zoomed in, place your cursor to the right or left side of your view. Press the key to center the view. 7. Hold the key down (do not touch the mouse buttons) and move the mouse. Notice the “auto scroll” feature. 8. In the main toolbar, click the Zoom to Region icon. Observe that the cursor shape turns into a magnifying glass. a. Click (or drag) to define the area into which you want to zoom. b. right-click and select End Mode from the pop-up menu. You can also use the key to exit a command.
Note Zoom commands are also available in the View pull-down menu.
Panning 1. Click the Zoom To All icon, followed by the Zoom In icon. 2. Place your cursor on a part (do not click the mouse). 3. Press the key on your keyboard. The location of your cursor becomes the new center-point of the view. Try this on another part.
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4. To pan, press and hold the key, and move the mouse back and forth (do not click the mouse).
Note All keyboard shortcuts and function key settings are documented in the Appendix section of this workbook. You cannot create your own custom settings.
Closing the Project 1. To close the schematic page, select File - Close. 2. To close the project, select File - Close Project. The Project Manager window closes, but the main session window remains open. STOP
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Lesson 1
Lab 1-2:
Getting Started with OrCAD Capture
Using the Help System (Optional Information, only)
Lab Objectives After you complete this lab you will be able to access and use: • • •
Online Help Online tutorials Online manuals and product notes
Online Help 1. In the OrCAD Capture session window, select Help - OrCAD Capture CIS Help - OrCAD Capture Help. The OrCAD Capture Knowledge System window appears. The Contents tab should already be selected. 2. Double click on The OrCAD Capture environment. If necessary, use the scroll bar to locate this help topic in the Contents list. 3. Double click on Command descriptions. 4. Double click on Command shortcuts. The Help page for keyboard shortcuts appears. 5. When ready, please close the OrCAD Capture Knowledge System window.
Online Tutorial 1. In the OrCAD Capture session window, select Help - Learning OrCAD Capture CIS. The tutorial window appears. 2. Click on Lesson Menu. The About OrCAD Capture lesson (green) is the start point for the tutorial. 3. Click on About OrCAD Capture to start the lesson. 4. When you reach the end of this tutorial lesson, you are prompted about doing some exercises. Click No.
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The lesson menu page reappears. Observe the check mark indicating you have completed the lecture portion of the About OrCAD Capture lesson. 5. Click Quit and Yes to confirm. 6. Click No to discard your progress indicators.
Online Manuals and Product Notes 1. Select Help - Documentation. The CDSDoc Library window appears. This is an HTML-based help system that encompasses all of the Cadence tools. At this time it should reference OrCAD Capture. Observe that an OrCAD Capture Quick Reference and an OrCAD Capture User’s Guide are available. 2. Click the exit symbol on the top, right to close. 3. Select Help - What’s New - OrCAD Capture. This is a PDF document describing the enhancements and changes in the latest release. 4. When you are ready, select File - Exit in the Acrobat Reader window. STOP
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File Structure Project Manager The Project Manager structures design resources into a ‘virtual’ hierarchy of folders and files. However, this hierarchy exists only within the Project Manager window (not on disk). The graphic that follows illustrates the directory structure of folders and files in the Project Manager.
The Referenced Projects folder is typically used to reference timing and functionality data from an FPGA project. The Simulation Resources folder is present when the project type is Analog or Mixed A/D, and you plan to use the PSpice simulator.
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System Files Some of the structures shown in the Project Manager window map to OrCAD Capture system files. Although many project files map to system files, many do not. All files related to a project should be contained in a top-level project folder.
System Files Saved on Your Hard Drive
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The Project Manager Window
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File Extensions The table that follows lists OrCAD Capture files and extensions. File Type
Extension
OrCAD Capture project file *
.OPJ
OrCAD Capture design file *
.DSN
OrCAD Capture part library
.OLB
Property update file
.UPD
Design rule check file
.DRC
Bill of Materials file
.BOM
Export properties file
.EXP
OrCAD Layout netlist file
.MNL
OrCAD Layout & OrCAD PCB Editor back annotation file
.SWP
OrCAD PCB Editor or Cadence Allegro PCB Editor
.DAT (3 files)
VHDL source file
.VHD or .VHO
EDIF netlist or back annotation file
.EDF or EDN
Cross-reference report
.XRF
Other netlist files
.NET or .ASC
In the above table, files with an asterisk are necessary when handing the design off to another personor for archiving your design. Each time you save an OrCAD Capture design, a .dbk backup file is created.
Note Automatic backup was a new feature of OrCAD Capture 10.0. This features enables you to specify the backup frequency of the DSN file. This new feature also lets you specify the number of backup versions kept. You can save between one and ten backup versions.
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Selecting and Deselecting Objects The selection and deselection of OrCAD Capture objects controls your ability to edit, move, copy, delete, or edit properties. The graphic that follows shows a selected part, wire, pin and text.
part selected pin selected
wire selected property or text selected
The following tables show how to select and deselect OrCAD Capture objects.
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To select …
Do this…
A single object
Left click on the object (the selected object will highlight). Tip: While selecting, press and hold the key to toggle between overlapping objects.
Multiple objects
Press and hold the key while selecting individual objects.
All objects in an area
Click and drag to draw a selection rectangle around an area.
All objects on a schematic page
Select Edit -Select All from the pull-down menu.
All objects of a specified type
Choose Edit - Find, and specify search criteria for the type(s) of objects you want to select.
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To deselect …
Do this…
All selected object(s)
Click anywhere else other than on the selected object(s).
One of a group of selected objects
Hold the key and click over the desired object. Continue this procedure to deselect other objects individually.
When selecting parts, be sure you see the rectangular selection box around the entire symbol, not just one of its elements, such as a pin or text.
Selection Filter Controlling the selection of objects on a schematic page during a block selection is done by using the Selection Filter dialog box. It provides check box options to select or exclude Parts, Nets, Power/Gnd, Title Blocks, etc. so that only specific objects are selected when you perform the window or block-select operation.
Editing Objects Frequently used editing commands are accessible from the right mouse pop-up menu. Although editing options may vary with the selection of different object types, the graphic that follows shows one example of options available through the pop-up menu.
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*
CK I CL
*
R
The following table list additional editing commands.
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To …
Select the object and do this…
Move an object
Press and hold the left mouse button, and drag the object to a new location. Tip: Hold the key to split an object away (for example, to disconnect a part from existing wires).
Delete an object
Press or or choose Edit - Delete.
Copy an object
Press and hold the key and drag a copy of the selected part to a new location. or press or choose Edit - Copy.
Cut an object
Press or choose Edit - Cut.
Paste an object
Press or choose Edit - Paste.
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To …
Select the object and do this…
Undo the last action
Press the
button
or press or Choose Edit - Undo Reverse an Undo
Press the
button
or Press or Choose Edit -Redo. Repeat the last command
Press or choose Edit - Repeat.
Rotate an object(s) 90 degrees counterclockwise
Press or choose Edit - Rotate.
Mirror an object vertically and/or horizontally
Choose Edit - Mirror.
Resize an object
Drag a resize handle on the highlighted object.
Group selected objects so you can manipulate them as a set
Choose Edit - Group.
Observe that the main toolbar also contains Copy, Cut, and Paste icons.
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Getting Started with OrCAD Capture
Lab 1-3:
Lesson 1
Selecting Objects
Lab Objectives After completing this lab you will be able to: • • • •
Start OrCAD Capture and open a project Open a schematic Select an object Select multiple objects
Starting OrCAD Capture 1. Select Start - All Programs - OrCAD 15.7 - OrCAD Capture or OrCAD Capture CIS. The OrCAD Capture session window appears.
Opening the Project 1. Select File - Open - Project. The Open Project window appears. 2. Navigate to the D:\Capture\intro directory. 3. Select intro.opj and click Open.
Opening the Schematic 1. In the Project Manager, double click on .\intro.dsn. 2. Double click on Schematic. 3. Double click on PAGE1. 4. Enlarge the schematic window and click the Zoom to All icon.
Selecting Objects 1. Select a part by clicking on it with the left mouse button. Observe the dashed boundary around the part. 2. Click to select a wire. Observe that the wire segment highlights and selection boxes appear at its endpoints.
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3. Zoom in and select a text string (for example, a net name or reference designator). Observe that the text string highlights, and selection boxes appear around it.
Selecting Multiple Objects 1. Click on capacitor C1. Hold the key down and click on capacitor C2. Both caps are now selected. 2. Hold the key down and click on capacitor C2 again. Capacitor C2 is now unselected. 3. Click left anywhere in the page (away from parts or wires). This unselects all objects in the page. 4. Press and hold the left mouse button, and drag a rectangle around capacitors C1 and C2. (Be sure to include the power/gnd symbols and wires.) All parts, wires, and text within the rectangle are now selected. 5. Press the key to unselect all objects.
Filter Selection 1. There are three ways to get to the Selection Filter command.
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a. From the View pull-down menu, select Selection Filter.
b. Place your cursor in the schematic page window. From the right mouse button select Selection Filter.
c. The third method id to simply use the hot-keys: 2. When the Selection Filter dialog box appears, select Clear All.
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3. Now place a check mark in only the Nets box as shown below and click on OK.
4. Draw a box around everything on the current page. Notice that only the wires or Nets are selected. 5. Click once in an open area to deselect the items. 6. Return to the Selection Filter dialog box and reset to Select All. 7. Select OK to close and apply the selection. STOP
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Getting Started with OrCAD Capture
Lab 1-4:
Lesson 1
Editing Objects
Lab Objectives After completing this lab you will be able to: • • • • • • • • • • • •
Move individual parts and wires Move groups of parts and wires Delete and undo Copy parts Set user preferences Set color assignments Set the grid display Pan and zoom Select an area Set selection preferences Set miscellaneous preferences Use the text editor and board simulation tabs
Moving Individual Parts and Wires 1. Place your cursor on a part, press and hold the left mouse button, and drag the part to a new location. Observe that the attached wires stretch with the part. 2. Place your cursor on a wire, press and hold the left mouse button, and drag the wire segment to a new location. Observe that the wire segment remains connected. 3. Use the Undo/Redo toolbar icon to return the parts to their original locations. 4. Hold the key and drag C2 to the right. The part is disconnected from the wires. You can now move the parts without attached wires.
Moving Groups of Parts and Wires 1. Press and hold the left mouse button, and drag a rectangle around capacitors C1 and C2. (Be sure to include the power/gnd symbols and wires.)
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2. Place your cursor on a part or wire, and notice that the cursor changes to a crosshair. 3. When the cursor appears as a crosshair shape, press and hold the left mouse button, and drag the selected group to a new location. 4. Press .
Delete and Undo 1. Click to select a part. a. Right-click and select Delete from the pop-up menu. b. Press to undo the deletion. 2. Click to reselect the part, press the or key. a. Click the Undo icon in the main toolbar. 3. Click on capacitor C1. Hold the key down and click on capacitor C2. (This is referred to as the “control, select” or method.) Both caps are now selected. a. Press the key to delete both capacitors at once. b. Click the Undo icon on the main toolbar. 4. Press and hold the left mouse button, and drag a rectangle around both capacitors (include the power/gnd symbols and wires). a. Delete the selected parts and wires, then undo the deletion. 5. Select and delete C1, then select and delete C2. 6. Try to undo both deletions. You can undo the deletion of both C1 and C2 because of the “Multiple Un-do’s” in OrCAD Capture.
Copying Parts 1. Place your cursor on a part, press and hold the key and left mouse button, and drag a copy of the part to a new location. 2. Press to undo the copy. 3. Click on the part again. a. Press to copy. b. Press to paste.
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Lesson 1
c. Click to place a copy of the part. d. Press to undo the copy.
Note You will also find Copy, Paste on your pop-up menus as well as the 3 icons on the tool bar for Cut, Copy, Paste. 4. Press and hold the left mouse button, and drag a rectangle around a capacitor (include the power/gnd symbols and wires). 5. Press and hold the key and left mouse button, and drag a copy of the circuit to a new location. 6. Click left in a blank area to unselect all objects. 7. Select File - Close and No to discard all changes. STOP
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Lesson 1
Getting Started with OrCAD Capture
Setting User Preferences OrCAD Capture, Version 15.7, has the following user preferences: • • • • • •
Color assignment Grid display Pan and zoom Area selection Line and fill style Autobackup
User preferences are workstation-specific. For example, if you copy a design from another person and open it on your machine, your user preferences (color assignments, grid display) are used. User preferences are stored in the Capture.ini file (not in the design database). Changes to user preferences take effect immediately.
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Lesson 1
Color Assignments Use the Colors/Print tab to assign colors to design objects and to control visibility of design objects on hardcopy prints.
Variant Settings
The Default for Variant color setting is only used by OrCAD Capture CIS to display on the schematic page any part(s) that are marked in the Variant BOM section (green) and which parts are marked with a “Do not stuff” property (gray).
Grid Display Use the Grid Display tab to turn the grid on or off, or to specify grid style. OrCAD Capture uses a 100-mil grid. The Pointer Snap To Grid option forces all parts, wires and text to snap to this grid. A Snap to Grid icon is also available on the main toolbar.
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When you are adding parts and wires, the Pointer snap to grid option should be on (the default). You should turn this option off when adjusting the location of text or properties only. The View - Grid command can also be used to toggle the grid on or off. You can set preferences to display either a dot or line grid system. You can also specify whether you want placed objects to automatically snap to the grid.
Pan and Zoom When you use the Zoom In or Zoom Out icons in the main toolbar, OrCAD Capture refers to this setup menu to determine how far to zoom in or out. Similarly, the amount of zoom performed by the View - Zoom menu options or the (Zoom In) and (Zoom Out) keyboard shortcuts is also defined here. The Auto Scroll Percent option controls how fast the schematic page scrolls when you drag an object into the border area of the schematic window. It is an old feature has been replaced by the action of selecting the key, holding it down, and moving the mouse. The zoom factor must be an integer between 2 and 10 (no fractions or decimals).
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Note The new function of the key replaces the use of the Scroll settings.
Area Selection To select multiple objects, you can use your left mouse button to drag or draw a rectangle around the objects you want to select. All objects intersected by the rectangle are selected by default. However, if you prefer you can alter the settings in the Options - Preferences - Select window to select only objects fully enclosed. The graphic that follows shows a selection rectangle and objects selected when the Intersection object is activated as a preference as well as objects selected when the Fully-enclosed option is activated.
Selection Rectangle
Fully-enclosed option on
Intersecting option on
Selected objects
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Selection Preferences When you drag a rectangle to select multiple objects, all objects intersected by the rectangle are selected by default. As introduced in the previous subtopic, you can modify preference settings so that only objects fully enclosed within the rectangle are selected. Use the Select tab to set your area selection preference. After selecting multiple objects within an area, you may plan to move them. Use the options on this tab to specify the maximum number of objects that are visible at high resolution while moving the selected group. When you drag a number of objects greater than this value, a simple box replaces the symbol graphic for each part.
Note The “Maximum Number of Objects to display.” message is an older setting that, with the advent of the high resolution graphics cards, is no longer a setting worth using. Simply leave it set as is.
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Lesson 1
Miscellaneous Preferences
Use the Miscellaneous tab to define the characteristics of non-electrical graphics such as polygons and lines. You can also choose to render text as small line strokes rather than text fonts. The UNDO option in OrCAD Capture 10.0 allows you undo or redo an unlimited number of actions. If you activate the preference, Clear UNDO/ REDO Data on Save, your system clears and resets memory each time you save your design. The Auto Recovery option protects you from loss of work due to system crash or power failure. OrCAD Capture automatically saves design changes at the end of each Auto Recovery interval (in minutes). These backup files are saved to the “current working directory”, and are automatically deleted when you exit normally. If no changes have occurred since the last save, no auto recovery (backup) is performed.
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Preserve Reference on Copy Enable part references to be preserved while pasting a part to a schematic page. When you copy a part and paste it on a schematic page, the part will retain the same reference designator as that of the copied part. But, if you place a new part on a schematic page, OrCAD Capture will assign the reference designator found in the library. For example: U?A or J?P. The Intertool Communication option lets OrCAD Capture interact with the OrCAD Layout and Cadence Allegro PCB Editor tools. For example, you can cross-probe parts and nets in the schematic and correspond them to parts and nets in the PCB design. The Auto Reference option will automatically give you the next reference designator in a sequence. If you wish to use the Annotate command, do not use this function. The Wire Drag option (ON) allows you to drag and place the selected part or wire on the schematic, even if it results in connectivity changes. Also, OrCAD Capture flags a warning with a changed cursor and will show the temporary markers. (OFF) then the selected part or wire attaches to the cursor and does not get placed on the schematic, if it results in connectivity changes. Also, OrCAD Capture flags only a warning with a changed cursor and does not show the temporary markers.
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Lesson 1
Text Editor and Board Simulation Tabs
The Text Editor tab is used to set up color, font, and highlighting for Verilog or VHDL keywords, comments, and quoted strings. These settings are applied to a text editor window that is used to create behavioral models. The Board Simulation tab is used to specify which hardware description language will be used for simulation. The Tab Setting option in the Text Editor tab can also be used to align the columns or data in the Bill or Materials report.
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Lab 1-5:
Getting Started with OrCAD Capture
Assigning Colors
Lab Objectives After completing this lab you will be able to: • •
Open a schematic and assign color to OrCAD Capture objects Use default colors
Opening the Schematic 1. In the Project Manager window of the intro.dsn, double click PAGE1. 2. Enlarge the schematic window and zoom in to capacitors C1 and C2. Observe the current color settings. Symbol graphics are blue, wires are purple, reference designators are dark blue, and text is black.
Assigning Colors 1. Select Options - Preferences. The Colors/Print tab should already be selected. 2. Click the color box next to Part Body, click a different color from the color palette, then click OK. 3. Next change the color assignments for Part Reference, Part Value, and Wire also. 4. Change the Grid color to black so you can see it easily on the screen. 5. Click OK. The color assignments take effect immediately. These preferences are machine specific (any design opened on your system will use these color settings).
Note If your grid is not visible, use the View - Grid command to turn it on.
Using Default Colors 1. Select Options - Preferences. 2. Click the Use Defaults button in the lower right corner of the Colors/ Print tab, and click OK. The schematic displays the original color assignments.
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Lesson 1
3. Try several more color assignments (for example, Alias, Background, Junction, No Connect, Pin, Power, Power Text, and Title Block). Assigning colors to some of these objects helps you prepare for the design entry tasks covered in the next lesson. STOP
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Lesson 1
Lab 1-6:
Getting Started with OrCAD Capture
Setting Other User Preferences
Lab Objectives After completing this lab you will be able to: • • •
Use the Select tab Use the Miscellaneous tab Close the project
Select Tab 1. Select Options - Preferences again. 2. Click the Select tab. 3. Change the Area Select setting for the Schematic Page Editor to Fully Enclosed and click OK. 4. Zoom in to U2A (74LS00). 5. Drag a selection rectangle across (but do not fully enclose) U2A. Observe that the part is not selected. 6. Drag a larger selection rectangle and fully enclose U2A (including pin stubs). Observe that the part is now selected. 7. Click left in a blank area to deselect all objects. 8. Select Options - Preferences and click the Select tab. 9. Change the Area Select setting back to Intersecting and click OK. 10. Drag a rectangle across a portion of U2A to select it.
Miscellaneous Tab 1. Select Options - Preferences. 2. Click the Miscellaneous tab. 3. In the Auto Reference section, be sure the Automatically reference placed parts option is off or unchecked. 4. Observe the “Clear UNDO/REDO Data on Save” option. 5. Click OK.
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Lesson 1
Note The UNDO/REDO features enables you to undo or redo an unlimited number of actions. When this option is checked, your system memory is cleared and reset each time you save your .DSN file.
Set AutoBackup Preferences 1. Select Options - Autobackup. 2. Enter D:\Capture\backup into the Directory for backup field. 3. Enter the time interval you wish backup to occur and the number of backups you wish to save.
4. Click OK.
Closing the Project 1. Select File - Close. The schematic window closes. 2. Select File - Close Project. The Project Manager window closes. The main session window is still running. STOP
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Lesson 1
Getting Started with OrCAD Capture
The Design Template
The design template is a collection of settings that are used whenever you create a new design. These settings are design specific and are retained even when the design is transferred to another workstation. When you define settings of your design template, you define the: • • • •
Font type and size Title block Page size Grid settings
Design template settings are stored in the Capture.ini file. When you create a new design, the current settings are copied into the design file. When you change the design template, existing designs are not affected.
Note You can override text font settings at the design level using the Options - Design Properties menu item, or override page size and border settings using the Options - Schematic Page Properties command.
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Getting Started with OrCAD Capture
Lesson 1
Fonts Tab
You can use the Fonts tab to control the appearance of various kinds of schematic text (for example, net names, reference designators, properties, and so on).
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Title Block Tab
You can use the Title Block tab to specify which title block symbol you want automatically added to each new schematic page. You can also fill in your company name and address. If you also supply design name and revision information, remember to change these settings before starting a new design.
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Lesson 1
Page Size Tab
You can use the Page Size tab to set the default page size for new schematic pages. Also use this menu to specify the units of measure and the page dimensions. OrCAD Capture always maintains one grid space between pins. The default grid spacing is 100 mils. The Pin-to-Pin Spacing field changes the distance between grid points (which changes the distance between pins). Do not change the Pin-to-Pin Spacing field (always use a 100-mil spacing or “tenth of an inch”). For example, a Pin-to-Pin Spacing of 200 mils causes the size of parts to increase by a factor of 2 to 1, because the distance between adjacent pins is 200 mils. Thus, the Pin-to-Pin Spacing field scales the schematic.
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Getting Started with OrCAD Capture
Grid Reference Tab
You can use the Grid Reference tab to define the grid zones across the top and left edges of schematic pages. Also use this menu to control visibility of the title block.
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Lab 1-7:
Lesson 1
Setting Up a Title Block
Lab Objectives After completing this lab you will be able to: • • •
Add a title into the title block Add a name and address to the title Add a document number and revision number to the title block
Adding a Title Line to the Title Block 1. Select Options - Design Template. 2. Click on the Title Block tab. 3. In the Title field, enter:
Lesson2 Adding a Name and Address 1. In the Organization Name field, enter your company name. 2. In the Organization Address1 field, enter your street address. 3. In the Organization Address2 field, enter city, state, and zip code.
Adding a Document Number/Revision Number 1. In the Document Number field, enter:
EMA-12345678 2. In the Revision field, enter:
A 3. Click the browser button to the right of the Library Name field, and navigate to your installation directory. 4. Click on capsym.olb and click Open. The above path may vary, depending upon your training site and where the Cadence software has been installed. 5. In the Title Block Name field, enter:
TitleBlock0 6. Compare your settings to the following example, and click OK.
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This design template will take effect when you create a new schematic in Lesson 2. The default settings for page size, grid reference, and fonts will also be applied. STOP
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2 Lesson 2: Creating a Simple Schematic Lesson Objectives As you create a single-page schematic in this lesson, you will: •
Create a new project
•
Place parts
•
Add and name wires
Creating a New Project In OrCAD Capture, you can create four different types of projects using a Project Wizard. When you open the Project Wizard from the File - New Project menu, the first dialog box that displays presents the different options you can choose.
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If you plan to use PSpice to simulate the schematic, you must select Analog or Mixed A/D as the project tool to create your project. If the schematic is for a PCB design only (no PSpice), select PC Board Wizard. If the schematic is for an FPGA or other digital IC, select Programmable Logic Wizard. If you plan to create a schematic only, without using the design data in some downstream application, select Schematic.
Note Once the project type has been set, it cannot be changed. You have to re-create it. The project name you specify is used to name both the project and design files. For example, if you name the project mydesign, the project filename will be mydesign.opj and the design filename will be mydesign.dsn. It is important to create a design directory for each new project. This structure keeps all the files for each design together in one place. Name the design directory after the project name. If you need to change the project type, and do not want to start over, you can delete the project (.opj) file. Then recreate the project using the same project location and name. The new project wizard will include the existing design file (.dsn) in the new project.
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Creating a Simple Schematic
Adding Libraries During Project Setup
Libraries added during initial project setup are added to the Libraries folder of the Project Manager. These libraries are automatically accessible when adding parts during design entry. Because the part library appears in the Libraries folder as part of the design resources, you can easily view these library parts in a Part Editor window. If several libraries are configured during initial project creation, they can slow down the process of opening the project later. (Although initial startup is affected, once the design and libraries have been loaded, there is no further slowdown in performance.) Libraries configured during project creation also facilitate access of part models for PSpice simulation. If the PSpice product is installed, the New Project Wizard also prompts you about simulation resources (not shown). The OrCAD Capture part libraries are located in the directory: \tools>capture>library, where is the location of the OrCAD software. If you plan to simulate your design using PSpice, you must use parts from the PSpice libraries. These parts contain the additional modeling information required by PSpice. The PSpice libraries are located in a PSpice folder directly below the standard OrCAD Capture libraries.
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Lesson 2
The New Project
Once project setup is complete, OrCAD Capture opens the new project and displays the design resources in a Project Manager window. A default schematic folder named SCHEMATIC1 is added to the design file. OrCAD Capture also adds a default schematic page named PAGE1 and opens it for edit.
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Placing Parts
Before you can add a part to your design, you need access to the library where it resides. If this library was not configured during initial project setup, then you need to press the Add Library button to add it to the Place Part window before you can select it for use in the design. Once the library has been added, you can select it in the Libraries list. The parts in the selected library are listed in the Part List. When you select a part in the Part List, you can view a graphic of the selected part. Rather than scroll through the Part List, you can type the name of the part you want to use into the Part Name field. As you enter each character, the data is matched against the parts in the selected library, and the Part List automatically scrolls to show the current matches.
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More Information Once a library has been added to the Place Part window, this setup is stored in the Capture.ini file located in the \tools\Capture directory. It will autoload into the Place Parts window during subsequent OrCAD Capture sessions. Press the Remove Library button to delete the library name from the Place Part window and the Capture.ini file. Cadence supplies many libraries for use with OrCAD Capture. These libraries are located at \tools\capture\library, where is the location of the OrCAD software. If you are planning to perform a PSpice simulation, you must place parts from special PSpice libraries. The PSpice libraries are located at \tools\capture\library\pspice. You can automatically assign a part reference designator to each part you add. If there is more than one part in the package (see the Parts per Pkg field in the previous graphic), this option should be turned off. Select the Options - Preferences - Miscellaneous command to set this user preference.
Note When more than one library is selected in the Libraries list, the Part List displays both the part and library name for each part in the selected libraries (for example, COUNTER/74F162).
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Searching OrCAD Capture Libraries .
If you want to add a part but don’t know which library it is in, you can locate the part by searching all OrCAD Capture libraries. The Part Search window lets you use wildcard characters (*, ?). Once a part has been located, its associated library is automatically added to the Place Part window, and you are ready to select the part for use in the design. Use the Library Path field in the Part Search window to specify the path to a directory containing the OrCAD Capture library files.
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Adding and Naming Wires
Use wires and net names (known as aliases) to define connectivity in the design. When you place a wire, it is assigned a system-generated net name (for example, N12345). You can replace the default net name with a net alias. Two wires with the same alias on the same page are connected by name, even though the two wires may not be physically connected to each other.
More Information If the last character of a net alias is a number (for example, DATA7), after the net alias has been placed on the schematic, OrCAD Capture automatically increments the last character of the net alias (for example, to DATA8) so you can easily place successive aliases in sequence. If the last character is not a number, then the same net name is assigned with each mouse click.
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Net aliases can contain any alphanumeric character, including dashes and underscores. The use of periods, slashes, and spaces in net names is not recommended. The percent sign (%) is a reserved PSpice character. The asterisk (*) is considered a wildcard character by some downstream tools (for example, try not to use asterisks when sending a netlist to Allegro PCB Editor). It is possible to add two or more unlike aliases to the same wire, or to connect two wires with unlike aliases together. Such errors can be found later during a design rules check, but will not be flagged by OrCAD Capture when they occur (more on design rules checking later in the course). Here are some things to remember when adding wires.
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Leave Grid Snap enabled (located on the main toolbar above the work area).
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When you are drawing a wire, OrCAD Capture alerts you with a red warning dot whenever the wire endpoint comes into contact with another wire or pin (indicating that if you click, you will create a connection). If the proposed wire path will create a problem (for example, short two pins together), OrCAD Capture adds a triangular warning symbol .
•
Wire junctions are marked with junction dot symbols . The absence of the junction dot means the wires are not connected. To remove a junction dot, use the Junction icon in the schematic toolbar to place another junction dot on top of it.
•
When you connect a wire to a pin, the connection square on the end of the unconnected pin disappears. If not, the pin is not connected.
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Lesson 2
Design Cache
When you add a part to a design, OrCAD Capture automatically stores a copy of the part in the Design Cache folder. This makes the OrCAD Capture design completely self-contained (not dependent on any supporting libraries), because copies of all the parts are included in the design file. This provides an easy way to place additional instances of parts you have already used elsewhere in the design. To do this, select the Most Recently Used (MRU) drop-down list box in the main toolbar. This field contains a list of the last 25 parts and symbols.
More Information Once a part has been copied into the Design Cache folder, it is used as a comparison tool. For example, you place a part in a design, and later that part is modified in the library. If you return to the library and try to place another instance of the same part, OrCAD Capture will compare that part to the original copy stored in Design Cache, and issue a warning saying the part you are adding is different from the one currently in your design. You can use the Design - Update Cache menu item to update the part in the Design Cache to match the edited version in the library, or you can decide against this, and instead place a copy of the part from the Design Cache (using the MRU list box).
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When you delete a part from the design, a copy of that part remains in the Design Cache. Use the Design - Cleanup Cache menu item to remove parts from the Design Cache folder that no longer exist in the design. You can also use the Design - Replace Cache menu item to replace a part in the cache with a completely different part (such as a global part replacement).
Saving and Closing the Schematic Use the File pull-down menu to save the design and close the schematic window.
You may also close and save a schematic page by selecting the X in the upper right corner of the schematic page or selecting the Save icon on the tool bar.
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Closing the Project and Exiting OrCAD Capture
Use the File pull-down menu to close the project. (The Project Manager window must be active to access this command.) If you click in the Project Manager window while a schematic window is open and close the project, the Project Manager records the window arrangement. The next time you open the project, the schematic window is restored to its previous size and location.
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Lesson 2
Lab 2-1:
Creating a Simple Schematic
Creating a New Project
Lab Objectives After completing this lab you will be able to: •
Name a project
•
Identify a project type
•
Identify a project location
•
Use the PCB Project Wizard
•
View the title block
Project Name 1. In the OrCAD Capture session window, select File - New - Project. The New Project window appears. 2. In the Name field, enter: Lesson2
Project Type 1. The PC Board Wizard should be selected by default (if not, select it).
Project Location 1. To specify a location for the new project, click the Browse button (to the right of the Location field). 2. In the Select Directory window, navigate to the D:\Capture directory. 3. Click the Create Dir button. 4. In the Create Directory window, enter Lesson2 and click OK.
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Lesson 2
.
5. In the Select Directory window, double click on the Lesson2 directory you just created, and click OK. .
6. Compare your new project settings to the following example.
Important Make sure the Location field is correct.
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Lesson 2
Creating a Simple Schematic
A new PCB project called Lesson2 is created at the specified location. 7. In the New Project window, click OK. The PCB Project Wizard appears.
Using the PCB Project Wizard 1. If prompted, leave the Enable Project Simulation box unchecked and click Next. Otherwise, skip this step. 2. When prompted about part symbol libraries, click Finish, without adding any libraries to your project setup. The PCB Project Wizard completes the new project setup. The design resources for the new Lesson2 project are displayed in the Project Manager window, along with a blank schematic page. 3. Notice the project name shown at the top of the Project Manager window.
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Lesson 2
Viewing the Title Block 1. Click in the schematic page to make it active. Observe the schematic toolbar along the right edge of the OrCAD Capture session window. Also observe the main toolbar and pull-down menus across the top of the OrCAD Capture session window. 2. Click in the Project Manager window to make it active. Observe that the schematic toolbar disappears, and the main toolbar and pull-down menus change. 3. Click in the schematic window to make it active again. Resize this window (make it larger) if necessary. 4. Click the Zoom to all icon. This fits the contents of the schematic in the window. All you currently have in this design is a title block. Observe that the data in the title block reflects the information you entered into the design template (see Lesson 1 if you need to review these steps). 5. Click the Zoom out icon. You are ready to begin your first design. STOP
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Lesson 2
Lab 2-2:
Creating a Simple Schematic
Placing Parts
Lab Objectives After completing this lab you will be able to: •
View the reference schematic
•
Add a part from a library
Viewing the Reference Schematic 1. Take a moment to examine the following schematic. Please use this example as a guide. .
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Lesson 2
Adding a 74F162 1. Make sure the schematic window is active. 2. Select Place - Part. The Place Part window appears. 3. Click the Add Library button. The Browse File window appears. 4. Set the Look in field to D:\\tools\capture\library. This is where all the OrCAD Capture libraries are stored. The above path may vary, based upon your training site and where the Cadence software is installed on your system. 5. Select the Counter.olb library file and click Open. The COUNTER library is added to the Libraries list in the Place Part window, and all the parts in this library are listed in the Part List above. 6. In the Part field, enter: 74F162 Observe how each character you enter is used to search the Part List for all matching entries. A picture of the 74F162 part is shown in the lower right corner of the Place Part window. 7. Click OK. The part silhouette attaches to the cursor. 8. Click left to place the part on the page. The part silhouette remains attached to the cursor, ready to place more instances of it. 9. Right-click and select End Mode from the pop-up menu. 10. Left-click anywhere in the page to deselect the newly added part. 11. Select File - Save.
Note The 74F162 part was in the COUNTER library. This library was added to the Libraries list. This library list is stored in the Capture.ini file.
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Creating a Simple Schematic
Adding a 74LS00 1. Make sure the schematic window is active, and click the Place part icon in the schematic toolbar (or press the key on the keyboard). The Place Part window appears. 2. Click Part Search. 3. In the Part Name field, enter: 74LS00 4. The Library Path field (at bottom) should already be set to D:\\tools\capture\library If necessary, use the Browse button to set it. Depending on your software installation, the above path to the library may differ.
Note If the filter is set, enter the * symbol into the Place Part box and then press the key. This resets the setting. 5. Click Begin Search. The search results are shown in the Libraries list (for example, 74LS00/ Gate.olb). This means that the 74LS00 part was found in the GATE library. 6. Click on the 74LS00/Gate.olb entry in the Libraries list, and click OK. The GATE library is added to the Libraries list in the Place Part window, and the 74LS00 part is automatically selected. 7. Click OK and add this part to the schematic. 8. To exit from Place Part mode, press . 9. Click left anywhere in the page to deselect the newly added part. 10. Select File - Save.
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Note The 74LS00 part was in the Gate library. Since you did not know which library this part was in, you searched all OrCAD Capture libraries before adding the part. Once the 74LS00 was found, the Gate library was added to the Libraries list. STOP
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Lesson 2
Lab 2-3:
Creating a Simple Schematic
Adding and Naming Wires
Lab Objectives After completing this lab you will be able to: •
Add wires
•
Name wires
•
Complete the schematic
Adding Wires 1. Make sure that the schematic window is active, and select Place - Wire. You can also use the Place - Wire icon in the schematic toolbar (or press the key on the keyboard). 2. Click pin 14 of part 74F162. Move the cursor to the right a short distance, then double click to end the wire. 3. Press the key three times. The wire segment is repeated each time, one grid down from the original. 4. Press the key twice.
Naming Wires 1. Select Place - Net Alias. You can also click the Place - net alias icon keyboard.
, or type on your
2. In the Place Net Alias window, enter Q0 and click OK. A netname box is attached to the cursor. 3. Click the wire attached to pin 14 of the 74F162 part. Netname Q0 is assigned to the selected wire. You are still in Place Net Alias mode. 4. Successively click on the wires attached to pins 13, 12, and 11. OrCAD Capture automatically increments the net names to Q1, Q2 and Q3, respectively. 5. Press the key twice.
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Lesson 2
Note Pressing to repeat the prior action does not work in Place Net Alias mode. Also, if the net alias ends in a non-numeric character, the name remains the same when you place successive aliases.
Completing the Schematic 1. Use the Place - Wire and Place - Net Alias icons to complete the schematic. (Please refer to the example shown at the beginning of this lab.) 2. Use the Place - No Connect icon to add No Connect symbols to all unconnected pins of the 74F162 part (except pin 15).
Note To remove a No Connect symbol, click the Place - No Connect icon, and click on any existing No Connect symbol in the schematic. 3. Save the design. STOP
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3 Lesson 3: Processing a Design Lesson Objectives After you complete this lab you will be able to: •
Assign reference designators
•
Check the design for errors
•
Create a netlist for PCB
Assigning Part References Each part in your design must have a unique reference designator. In OrCAD Capture you can assign a reference designator manually or automatically. Each part requires a unique part reference. Part references must be assigned before you can check the design for errors or create a netlist for PCB design. The graphic below shows reference designators on 74F162 and 74LS00.
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Manual Assignment During Placement
You can specify a part reference while adding a part to the design. After you select the part from the library, right-click and select Edit - Properties before you place it. This opens the Edit Part Properties window as shown above. Use the Part Reference field to assign a reference designator manually. Use the Part Value field to assign a value to the Part. Use the PCB Footprint field to assign a Footprint pattern to the Part. Select User Properties to assign any other Property you wish to the Part.
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Processing a Design
Manual Assignment After Placement
If the part has already been added, and it currently has no assigned part reference, click on its temporary part reference and edit its value (as shown in the accompanying illustration). You can also use this technique to change an existing part reference. Here are some things to remember about manual part reference assignments:
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All parts come into a design with pinouts assigned.
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All parts come into a design with a temporary part reference (for example, U? is single-section, or U?A is multi-section). You can override this temporary part reference before or after placing the part (as previously described).
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Single-Section versus Multi-Section Parts
A single-section part is a part that represents the entire physical package. A multi-section part is a part that represents only a portion of the physical package. The Packaging section of the Place Part form reflects the number of sections (or slots) in the physical package. For a multi-section (gate-level) part:
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•
If the Packaging section of the Place Part form was not used, the temporary part reference and pinouts will default to section A (repetitively).
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If the Packaging section of the Place Part form was used, then the temporary part reference and pinouts will coincide with the selected section. Pinouts always match the section.
•
If the part is homogeneous, you can manually change the section once the part is placed (for example, from U?A to U?B). This causes the pinouts to change automatically. You cannot manually assign a section that does not exist.
•
If the part is heterogeneous, all you can do is change the question mark (?) to show grouping into a specific package. The pinout is locked at placement based on the section you selected in the Place Part form.
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Processing a Design
•
When you manually edit a multi-section part reference, OrCAD Capture does not let you remove the section indicator.
•
When you use the Packaging section of the Place Part form to select a specific section, the Annotate program does not maintain the selected section (even in Incremental mode) unless you also supply a part reference.
Automatic Assignment During Placement
You can set your user Preferences to automatically assign a part reference as each part is placed in the design. This is set in the Auto Reference option.
This works well for single-section parts (for example, capacitors, discrete resistors, and most digital logic devices), as well as for multi-section parts. See the example above. For multi-section parts, OrCAD Capture does not assign part references in a way that optimizes physical package counts in the design, only the next number available in the sequence. For this example, U2A, U2B, U2C, U2D represent parts or gates of the same physical package. These less-thanoptimal part reference assignments could be manually edited, or automatically overwritten (see the next section, Automatic Assignment After Placement).
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Automatic Assignment After Placement
Annotate
To automatically assign part references after placing parts, use the Annotate icon in the main toolbar, or the Tools - Annotate command. (The Project Manager window must be active and the .dsn file highlighted to access these commands.) In Incremental mode, the Annotate program will not change a manually or auto assigned part reference, even if duplicate part references exist. Incremental mode only processes parts that have no assigned part references. Incremental mode starts with the next highest part reference. (For example, if the design already has a U100, then the next part reference will be U101.)
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In Unconditional mode, the Annotate program overwrites all existing part references, regardless of how they were assigned. Unconditional mode optimizes all multi-section parts into a minimum number of physical packages. Unconditional mode starts with U1, R1, C1, and so forth, and works its way through the sequence, processing parts in the order they appear in the schematic page (left to right, top to bottom). This mode eliminates all duplicate part references in the design. To automatically annotate heterogeneous parts, these parts must have an attached user property to show package grouping (for example, PARTGROUP). This property must be entered in the Combined Property String box at the bottom of the Annotate window.
Allegro PCB Editor Reuse The options in this tab are related to the OrCAD Capture/Allegro PCB Editor design flow. You can create and reuse modules in both the OrCAD Capture and Allegro PCB Editor environments. This means you can store physical placement and signal routing data created in Allegro PCB Editor together with the OrCAD Capture schematic information and reuse it in another design. This can be very helpful when different designs share functional logic blocks or when a design contains redundant circuitry.
OrCAD Layout Reuse The design reuse functionality for OrCAD Layout allows you to create reuse modules for circuit replication. Reuse circuits along with the corresponding schematic data may be saved to a directory that acts as a library of reuse elements. The reuse data can then be imported into a design saving valuable time versus placing and routing circuits from scratch. This feature is covered in detail in the OrCAD Advanced Layout class.
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Lesson 3
Design Rules Check (DRC)
To check the design for errors, use the DRC icon in the main toolbar, or the Tools - Design Rules Check command. (The Project Manager window must be active to access these commands.) OrCAD Capture does not prevent you from assigning more than one signal name to the same wire, or physically shorting two different nets together. You must use the DRC program to flag the connectivity errors in your design. The DRC program flags nets with no driving source, and nets with fewer than two connections. When two nets have been shorted together, OrCAD Capture simply uses the net that has the lowest alphanumeric value. No error or warning message is generated by the DRC program. However, to find shorted nets, look at the list of net names created by the Report All Net Names option. When a net in this list will contain a message about a possible “short”.
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Processing a Design
OrCAD Capture does not prevent you from manually assigning duplicate or invalid part references. The Annotate program ignores these errors in Incremental mode (or resolve them in Unconditional mode). You must use the DRC program to flag manual annotation errors. For example, the DRC program flags invalid packaging (such as unlike device types assigned to the same physical package), as well as duplicate part references. The design needs to be annotated before you can run Design Rules Check.
Electrical Rules Check (ERC)
The Electrical Rules Check flags invalid pin-to-pin connections found in the design. The ERC Matrix tab shows a matrix of all possible pin-to-pin combinations. Each pin-to-pin combination can be defined as valid (no error or warning), or invalid (error or warning flag generated). In addition, the matrix includes a row used to define the error condition for various types of unconnected pins.
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The matrix buttons have three toggle positions as identified in the following table. Icon
Meaning The pin combination represented by this matrix position will not be flagged (the pin-to-pin connection is logically acceptable). The pin combination represented by this matrix position will be flagged as a warning. Turn on the Create DRC Markers for Warnings option in the DRC window to see these flags in the schematic. The pin combination represented by this matrix position will be flagged as an error.
The severity of the ERC Matrix settings has no effect on your ability to create a netlist. The ERC Matrix settings are stored in the Capture.ini file. Use the Restore Defaults button to reset the matrix.
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Processing a Design
DRC Report
The Design Rules Check generates a report listing all the objects checked, and any violations encountered. This report is listed in the Outputs folder of the Project Manager window. (Double click on the file name to view the report.) The results of a DRC check are also displayed in the OrCAD Capture Session Log.
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Lesson 3
Error Markers
The Design Rules Check marks schematic pages with warning and error markers. You can double click on a DRC error marker to see a description of the problem. If you save the design, the DRC markers are also saved. Each time you start the DRC program, it automatically clears existing error markers and creates new flags. (The design must be saved to retain the new markers.) You can delete the DRC markers interactively, or delete them automatically by using the Delete Existing DRC Markers option in the DRC setup window.
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Lesson 3
Processing a Design
Netlist for PCB Design
To create a netlist for PCB design, use the Netlist icon in the main toolbar, or the Tools - Create Netlist command. (The Project Manager window must be active to access these commands.) OrCAD Capture creates netlists for Allegro, OrCAD Layout, and many other PCB design tools. Industry standard formats such as VHDL, SPICE, EDIF, and PCB386 are also supported. A netlist contains all part and connectivity information. The ability to include part definitions (library data) and part or net properties varies from one netlist interface to another. With version 15.7 of OrCAD Capture the user may now configure the netlist formatter to contain properties to be transferred to “Other” netlist file formats. (Contact your Technical Support for more information on this process if necessary.) The only error condition that prevents the creation of a netlist is a duplicate part reference in the design. (Even an invalid packaging error will not abort the process.) Just because you can produce a netlist does not mean that it is correct.
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Lab 3-1:
Lesson 3
Assigning Reference Designators
Lab Objectives After completing this lab you will be able to: •
Manually assign a reference designator
•
Automatically assign a reference designator
Manual Assignment 1. Click the temporary reference designator U? for the 74F162 part. 2. Right-click and select Edit Properties from the pop-up menu. 3. In the Display Properties window, enter U1 into the Value field and click OK. 4. Click anywhere in the schematic page to deselect the highlighted reference designator text. Observe it now reads U1. 5. Save the design.
Automatic Assignment 1. In the Project Manager window, click .\lesson2.dsn. 2. Select Tools - Annotate (or click the
icon in the main toolbar).
3. In the Annotate window, click OK. When prompted, click OK again to continue. Your design is annotated and saved. 4. View the auto-assigned reference designator (U2A). Observe that the manually assigned reference designator was not changed. This is because you ran the annotation program in Incremental mode.
Note The Options - Preferences - Miscellaneous tab contains an Auto Reference checkbox. If checked, this option auto-assigns reference designators as you place parts. STOP
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Lab 3-2:
Processing a Design
Design Rules Check
Lab Objectives After completing this lab you will be able to: •
Verify design compliance to design rules
•
Correct warning on unconnected pins
Running the Design Rules Check 1. In the Project Manager window, click .\lesson2.dsn. 2. Select Tools - Design Rules Check (or click the toolbar).
icon in the main
The Design Rules Check window appears. 3. In the Report section, make sure the following check boxes are checked: • • • • • • • •
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Create DRC markers for warnings Report identical part references Report invalid packaging Report visible unconnected power pins Check unconnected nets Report off-grid objects Report all net names View Output
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4. Click the ERC Matrix tab at the top of the window. 5. Set the matrix buttons along the bottom row to W, as shown below.
This causes all unconnected pins to be flagged as warnings.
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6. Click OK to check the schematic. The DRC report appears. The report contains warnings for an unconnected pin, nets with no driving source, and nets with fewer than two pins (one-pin signals). 7. Close the DRC report window. These errors are also flagged with DRC markers on the schematic page. 8. To get information about an error, double click on the DRC marker.
Alternate Method to Located DRC Markers 1. Select the Project Manager window ahd highlight the design name. 2. From the Edit pull-down menu, select Browse - DRC Markers. A “Browse” window will open with a list of all the DRC makrers, their locations, and the error. 3. Double click on the error message in the left hand column for “Unconnected Pin”. The page with the error marker will open and the error marker will be highlighted for you.
Fixing the Unconnected Pin Warning 1. Click the Place no connect icon, and add a “no connect” symbol on pin 15 of the 74F162. 2. Save the design. 3. Check the design again (the design file must be selected in the Project Manager window). 4. Review the new DRC report and observe that the unconnected pin warning is gone. Use the No Connect symbol to notify the error checker when pins are intentionally left unconnected. 5. Close the report. 6. In the schematic, observe that the error marker on pin 15 of U1 has been cleared. Please do not fix the remaining errors. These problems are addressed in the next lesson. STOP
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Lab 3-3:
Lesson 3
Netlist for PCB Design
Lab Objectives After completing this lab you will be able to: •
Create a netlist
•
View the netlist
•
Close the schematic and project
•
View the system files
Creating a Netlist 1. With the design file highlighted in the Project Manager window, select Tools - Create Netlist (or click the
icon in the main toolbar).
The Create Netlist window appears. 2. Click the Other tab.
3. Scroll to the bottom of the Formatters list, click wirelist.dll or one of the other PCB netlists from the listing and click OK. 4. Click OK when prompted about the design being saved prior to netlisting. OrCAD Capture creates a netlist named lesson2.net. 3-18
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Viewing the Netlist 1. In the Project Manager window, double click .\lesson2.net (under the Outputs folder). 2. Compare the netlist to the schematic. 3. When you are finished, close the netlist window.
Closing the Schematic 1. Click in the schematic window to make it active, and select File Close.
Closing the Project 1. Select File - Close Project. The main session window is still running.
Viewing the System Files 1. Use Windows Explorer to navigate to the D:\Capture\Lesson2 directory. 2. Notice the files stored in your project folder, and their various extensions. STOP
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4 Lesson 4: Building a Multi-Sheet Schematic Lesson Objectives After you complete this lesson you will be able to: •
Create a new project
•
Build a multi-sheet design
•
Assign reference designators
•
Check the design for errors
•
Add inter-sheet signal references
•
Create a cross reference report
•
Create a netlist for PCB design
•
Generate a Bill of Materials
Multi-Sheet Connectivity Two wires with the same net alias are automatically connected by name when they appear on the same page. But when two such wires appear on different pages, you must add off-page connectors to each page to establish connectivity between the two wires. Off-Page Connectors do connect nets from one hierarchical folder to the next. You must used a Hierarchical Port for this.
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page 1 page 2 page 3
Off Page Connectors Each off-page connector you add must be named. This name identifies the net that needs to be connected to another page in the design. (“Any wire attached to a symbol, assumes the name of the symbol...”) The name of the off-page connector overrides the net alias of the wire to which it is attached. When an off-page connector is tied to an unlabeled wire, that wire inherits the off-page connector name.
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Off-Page Connectors
You must use the Place off-page connector icon in the schematic toolbar to add off-page connectors to the design. There are two off-page connector symbols located in the CAPSYM.OLB library. When placing an off-page connector, you need to consider two things: •
The direction in which you want the off-page connector to point
•
The location of the pin (connection point) on the off-page connector
The name of the off-page connector symbol embodies both direction and pin location information. For example, the OFFPAGELEFT_R symbol in the CAPSYM.olb library is an off-page connector that points to the left, with a pin on the right. The other off-page connector in the CAPSYM library is called OFFPAGELEFT-L (it points to the left, and its pin is also on the left).
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By default, both of the off-page connector symbols point to the left. If you draw a schematic with input signals on the left side of the page and output signals on the right side, you will probably rotate both these off-page connector symbols before placing them in the design (as demonstrated in the previous illustration). From a logic standpoint, off-page connectors do not define any directional information about the nets to which they are attached; they just specify the net name only.
Power/Ground Symbols
You can use the Place power and Place ground icons in the schematic toolbar to add power and ground symbols to the design. These symbols are contained in the CAPSYM.OLB library. All symbols in the CAPSYM.OLB library can be added using the schematic toolbar icons.
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When you click on the Place power and Place ground icons, a dialog appears in which to enter parameters. Use the Name field in the dialog to specify the voltage name. All power and ground symbol connections represent global nets. This means that any wires tied to voltage symbols having the same name will be connected together, regardless of which schematic page they are on, or in which schematic folder they appear in the hierarchy. (Hierarchical designs are further discussed later in this course.) Another source of global net connections is the hidden voltage pins defined for a part in the library. When you connect two voltage symbols together, the voltage symbol with the alphanumerically lowest net name takes precedence. For example, if you connect an AGND symbol to a GND symbol, all GND connections will appear in the netlist as AGND. Use the PSpice library, Source.olb, to properly designate a high or low signal during simulation. Alternately, set the net name on the CAPSYM library symbol to 0 (zero).
Buses and Bus Entries
Use special Bus Entry symbols to connect a single bit wire to a bus wire.
Use special syntax to name bus wires.
Q[0-3] Q0 Q1 Q2 Q3
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Use special Bus Wire command to draw bus wires.
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A bus entry is a short diagonal symbol used to connect wires to buses. Use the Place Bus Entry icon in the schematic toolbar to add bus entries. (You may need to rotate the bus entry symbol to the proper position before placing it.) A bus wire is a vectored (multiple bit) wire used to bundle a group of scalar (single bit) wires together. A bus wire is graphically thicker than a regular wire. Use the Place Bus icon in the schematic toolbar to add bus wire connections. A bus wire must be labeled to reflect the scalar nets contained within it (otherwise, it will be assigned a default system-generated net name like any other unlabeled wire in the design). If a bus wire is mislabeled, the DRC program will flag any connectivity errors that may result. (For example, Q[0-3] has no driving source, or has fewer than two connections, and so on.) Use the Place Net Alias icon in the schematic toolbar to assign a net alias. Use the following special syntax when labeling bus wires. BASENAME[n-m]i.e. BA[0-7] or BASENAME[n..m]i.e. BA[0..7] or BASENAME[n:m]i.e. BA[0:7]
The variable [n-m] represents the range of signals carried by the bus (n can be greater or less than m). The brackets must be square brackets; otherwise, OrCAD Capture does not let you attach the alias to the bus wire. Whichever convention you choose, use it consistently. You can use a bus entry symbol to merge or split like-named buses. When a bus entry is used in this way, it appears thicker than a normal (single bit) bus entry.
Bus Entry
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Lab 4-1:
Building a Multi-Sheet Schematic
Creating a New Project
Lab Objectives After completing this lab you will be able to: •
Edit a design template
•
Assign a name to a project
•
Assign a project “type” to a project
•
View the title block
•
View the system files and design resources
Editing the Design Template 1. Select Options - Design Template. 2. Click the Title Block tab, and in the Title field enter: Lesson4 3. Click OK.
Project Name 1. In the OrCAD Capture session window, select File - New - Project. The New Project window appears. 2. In the Name field, enter: Lesson4
Project Type 1. The PC Board Wizard should already be selected by default (if necessary, select it for this exercise).
Project Location 1. To specify a location for the new project, click the Browse button (located at the right of the Location field). 2. In the Select Directory window, double click to navigate to the directory: D:\Capture 3. Click the Create Dir button. 4. In the Create Directory window, enter Lesson4 and click OK.
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Lesson 4
5. In the Select Directory window, double click on the Lesson4 directory you just created, and click OK. 6. Compare your new project settings to the following example. Make sure the Location field is correct.
A new PCB project called Lesson4 is created at the specified location. 7. In the New Project window, click OK.
Using the PCB Project Wizard 1. If prompted, leave the Enable Project Simulation box unchecked and click Next. Otherwise, skip this step. 2. When prompted about part symbol libraries, click Finish, without adding any libraries to your project setup. The PCB Project Wizard completes the new project setup. The design resources for the new Lesson4 project are displayed in the Project Manager window, along with a blank schematic page.
Viewing the Title Block 1. Click in the schematic window to make it active. Resize this window (make it larger) if necessary.
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2. Click the Zoom to All icon. Observe that the data in the title block reflects the change you made to the design template. 3. Click the Zoom Out icon.
Viewing the System Files 1. Using Windows Explorer, navigate to the directory: D:\Capture\Lesson4 2. Observe the following files in the project directory: • •
Lesson4.dsn - binary design file. Lesson4.opj - ASCII project file.
3. Close the Windows Explorer.
Viewing the Design Resources 1. Click in the Project Manager window to make it active. 2. Click on the plus sign (+) to the left of .\lesson4.dsn. The display expands to show the contents of the design file.
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3. Click on the plus sign to the left of SCHEMATIC1. The display expands to show PAGE1 of the schematic. 4. Click on the plus sign to the left of Design Cache. The display expands to show the parts that have been added to the design. The only symbol currently in the design is TitleBlock3.
Files within the Design Cache folder are binary files, which can only be viewed from the Project Manager window.
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Lab 4-2:
Building a Multi-Sheet Schematic
Creating a Schematic Page
Lab Objectives After completing this lab you will be able to: •
View a reference schematic
•
Add a header connector
•
Mirror the connector
•
Add and copy decoupling capacitors
•
Add wires
•
Add net aliases
•
Add no connect and power/ground symbols
•
Add bus entries and wires
•
Add off page connectors
•
View the design cache
Viewing the Reference Schematic 1. Take a moment to examine the following schematic. Please use this example as a guide as you complete the steps in this lab.
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Lesson 4
Adding a 12-Pin Header Connector 1. Make sure the schematic window is active, and click the Place Part icon in the schematic toolbar (or press the key on the keyboard). 2. In the Place Part window, click Part Search. 3. The Library Path field (located at the bottom of the dialog box) should already show the installation path and library directory: D:\\tools\capture\library. If not, use the Browse button to set this path. 4. In the Part Name field, enter: header* OrCAD Capture searches all libraries for any parts that begin with the word “header”. 5. Click Begin Search. OrCAD Capture locates many different headers in a CONNECTOR library. 6. Scroll down and click on the HEADER 12/Connector.olb entry in the Libraries list, then click OK. The CONNECTOR library is added to the Libraries list in the Place Part window, and the HEADER 12 part is automatically selected. 7. Click OK. Do not add the part to your schematic yet.
Mirroring the Connector 1. With the connector still attached to your cursor, right-click, and select Mirror Horizontally from the pop-up menu. The connector pins should now be facing to the left. 2. Right-click again, and select Edit Properties from the pop-up menu. 3. In the Edit Part Properties window, enter J1 into the Part Reference field and click OK. 4. Click to place the connector in the design. 5. Press to exit Place Part mode. 6. Press again to deselect the connector. 7. Select File - Save.
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You mirrored the connector horizontally, and assigned a reference designator to it before placing it in the design. You could also have done this after the part was placed.
Adding Decoupling Capacitors 1. Click the Place Part
icon.
2. Click on the Add Library button. The Browse File window appears. 3. In the Look In field, navigate to the library directory: D:\\tools\capture\library This path varies with different directory locations of the Cadence software. 4. Select the DISCRETE.olb library file and click Open. The DISCRETE.OLB library is added to the Libraries list in the Place Part window, and all the parts in this library are listed in the Part List. 5. In the Part field, enter: cap Observe that each character you enter is used to search the Part List for all matching entries. 6. Click OK. Do not place it yet. 7. Right-click and select Edit Properties from the pop-up menu. 8. In the Part Value field, enter 0.1UF and click OK. 9. Click to place the capacitor in the design. 10. Press to end the command, and again to deselect all parts. 11. Select File - Save. You assigned a capacitance before placing the bypass cap in the design. You could also have done this after the part was placed.
Copying the Capacitor 1. Place the cursor on the capacitor, click to select, and press and hold , and drag a copy of the capacitor to a new location. (LMB stands for Left Mouse Button.) 2. Press .
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Adding Wires 1. Click the Place Wire icon, or type on your keyboard, and add wires as shown in the example at the beginning of this lab. 2. Save the design.
Adding Net Aliases 1. Click the Place Net Alias icon, or type on your keyboard, and add net aliases as shown in the example.
Note After you add a net alias, an easy way to specify the next net alias you want to assign is to right-click and select Edit Properties from the pop-up menu. Then enter the new net name in the Edit Properties window. 2. Save the design.
Adding No Connect Symbols 1. Use the Place No Connect icon to place No Connect symbols on all unconnected pins of the HEADER 12 part. 2. Press to exit the command. 3. Save the design.
Adding Power/Ground Symbols 1. Click the Place Power
icon.
The Place Power window appears. 2. In the Libraries field, click CAPSYM. 3. Scroll down, select the VCC symbol, and click OK. 4. Add the VCC symbol to the schematic. You may place as many VCC symbols as required (or you can copy them later). 5. Click the Place Ground
icon.
6. Select the GND symbol, click OK, and place as required. 7. Press to exit the command, and again to deselect all parts.
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8. To move a power or ground symbol, press and hold the left mouse button and drag the symbol to a new location. 9. Add or adjust wiring to connect the power and ground symbols. 10. Save the design.
Adding Bus Entries 1. Click the Place Bus Entry
icon.
A bus entry symbol attaches to your cursor. 2. Click to add bus entries to the ends of the Q0 through Q3 signals on the HEADER 12 connector (as shown below).
Use the key to repeatedly place the bus entry wire.
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Adding Bus Wires 1. Click the Place Bus
icon.
2. Hold the key, and click to add a bus wire to the ends of the bus entries (as shown below).
3. Save the design.
Note Hold the key while drawing any wire to add diagonal segments. Otherwise, all wire segments are added orthogonally.
Adding Off-Page Connectors 1. Click the Place Off-page Connector
icon.
The Place Off-Page Connector window appears. 2. In the Libraries list, click on CAPSYM.OLB, then select OFFPAGELEFT - L from the list above. 3. In the Name field (at the bottom), enter: Q[0-3] 4. Click OK. The off-page connector attaches to your cursor. 5. Press the key to rotate the symbol. Do this twice to spin it 180 degrees. 6. Click to attach the off-page connector to the end of the bus wire (as shown in the next graphic).
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7. Press to exit the command, and again to deselect the off-page connector. 8. Click the Place Off-page Connector icon, and repeat this process to add off-page connectors to the LOAD, CLEAR, and CLOCK nets also.
Note An easy way to change the name of the next off-page connector you want to add is to right-click and select Edit Properties from the pop-up menu.
Save and Close the Design 1. Click the Zoom to All icon. 2. Select File - Save. 3. Select File - Close, and No to close the window.
Viewing Design Cache 1. In the Project Manager window, look at the list of parts under the Design Cache folder. This list represents all the parts that were added to page one of this design.
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2. Click the minus sign (-) to the left of the Design Cache folder to collapse the display. STOP
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Copying Between Projects (Part II) source project
Schematic
destination project Page 1 Schematic
Page 1
Copy Page
Page 2
Use the Project Manager window to copy an existing schematic page (or folder) from another project. For example, you can copy PAGE1 from the Lesson2 project window into the Lesson4 project window. However, if there is already a schematic page in the destination project named PAGE1, it will be overwritten (OrCAD Capture will prompt you first). Therefore, the page or folder you copy must be uniquely named (or renamed) before it is copied. Below is an example of the error message that would appear.
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Lab 4-3:
Lesson 4
Adding Another Schematic Page
Lab Objectives After completing this lab you will be able to: •
View the reference schematic
•
Open a project and rename a page
•
Copy a page from one schematic to another
•
Complete the schematic and save the design
•
View the design cache
Viewing the Reference Schematic
Take a moment to examine the following schematic. Does it look familiar? As you complete the steps in this lab, use this example as a guide.
Opening the Lesson2 Project 1. Select File - Open - Project. 2. In the Open Project window, navigate to the directory: D:\Capture\Lesson2 3. Click on Lesson2.opj and click Open.
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The Lesson2 project opens in another Project Manager window. 4. Separate the two Project Manager windows so that both projects are side by side. 5. Click the plus signs (+) to expand the contents of the .\lesson2.dsn file until you see the PAGE1 entry.
Renaming a Page 1. Click in the Lesson4.opj Project Manager window to activate it. 2. Click on the PAGE1 entry in the SCHEMATIC1 folder, right-click, and select Rename from the pop-up menu. 3. In the Rename Page window, change the name to PAGE2. 4. Click OK. The lesson4.opj project window now lists PAGE2 as the page name.
Copying Between Projects 1. Click in the Lesson2.opj project window to activate it. 2. Click on the PAGE1 entry in the SCHEMATIC1 folder. 3. Select Edit - Copy (you can also use the key). 4. Click in the Lesson4.opj project window to activate it, and click on the SCHEMATIC1 folder. 5. Select Edit - Paste (you can also use the key).
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PAGE1 of the Lesson2 project now appears in the SCHEMATIC1 folder of the Lesson4 project.
Closing the Lesson2 Project 1. Click in the Lesson2.opj project window and select File Close Project and if prompted, No to discard all changes.
Saving the Lesson4 Project 1. In the Project Manager window, click on .\lesson4.dsn and select File - Save.
Note Before copying, you first renamed PAGE1 of the Lesson4 schematic to PAGE2. (If you had not done this, OrCAD Capture would have tried to overwrite it with PAGE1 of the Lesson2 project.) You can also open two schematic pages from different projects, and copy selected portions between windows.
Completing the Schematic Complete the schematic page to resemble the following picture.
1. Double click on PAGE1 of the Lesson4 design. This is the page you just copied from the Lesson2 project.
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2. Add bus entries to the Q0 through Q3 nets. Press the key to rotate the bus entry symbols into the correct position. 3. Add a bus wire to bundle the Q0 through Q3 bus entries together. Remember to hold the key to draw a diagonal bus wire. 4. Add an off-page connector to the end of the bus wire. Use the OFFPAGELEFT-R symbol from the CAPSYM library and rotate it into the correct position. Be sure to name the off-page connector using the correct syntax. 5. Add off-page connectors to the CLOCK, CLEAR, and LOAD nets also. You will need to use both types of off-page symbols, and each one will need to be named and rotated. The LOAD net will have two off-page connectors (please see example at the beginning of this lab).
Note Notice that the CLOCK, CLEAR, and LOAD wires contain both net aliases and off-page connector names. Deletion of the wire aliases is recommended because the off-page connector names take precedence. 6. Zoom in to the title block and double click on the Lesson2 title. 7. In the Display Properties dialog, change the Value field to Lesson4 and click OK.
Saving the Design 1. Click the Zoom to all icon. 2. Select File - Save. 3. Select File - Close to close the window.
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Viewing Design Cache 1. Click the plus sign (+) next to the Design Cache folder, and examine the list of parts. Observe that this list now includes the parts contained in the copied page.
STOP
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Annotate the Design (Part III)
If you have copied a schematic page from another design, and that page had part references assigned, there could be duplicate part references when you merge the two schematics together. Such a problem will be ignored if you run the Annotate program in Incremental mode, as this mode only processes parts that have no part references assigned. The Unconditional Reference Update option assigns new part references to all parts in the design (like starting over from the beginning). This mode resolves all invalid packaging or duplicate reference designator problems. The Reset Part References To “?” option is useful when merging pages of other designs into your current design. If the copied pages already have part references, you can select just those pages in the Project Manager window, and run the Annotate program to remove the previously assigned reference designators. You can then run the Annotate program in Incremental mode to assign part references to the parts in the copied pages (without affecting existing assignments elsewhere in the design). Controlled annotation allows you to annotate the design based on the range you set for each page. When the “Refdes Control Required” box is selected, the Scope section will display the “Schematic Pages” and “Hierarchical Blocks”. You can the range for each page in a flat design and the range for each block in an hierarchical design. If this box is not checked, the Annotate command functions as usual in OrCAD Capture.
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Automatic Page Numbering
When you add a new schematic page to a design, both the page number and page count properties in the title block default to 1 (for example, Sheet 1 of 1). When the Annotate program runs it not only assigns part references but also sets the page number and page count properties in the title block.
More Information In the Project Manager window all pages within a schematic folder are sorted alphanumerically. The Annotate program sets the page number in the title block based on the order in which the pages appear in the Project Manager window. Adding, deleting, or renaming pages changes their order in the Project Manager window. By default, the Annotate program resets the page number properties in the title block to reflect the new sequence. Use the Do Not Change the Page Number option to prevent page numbers from being changed when the Annotate program is run.
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Checking Off-Page Connectors
Use the Check Off-Page Connector Connections option to make sure each off-page connector has at least one match on another page. Use the Report Hierarchical Ports and Off-Page Connectors option to create a list of all the off-page connector names in the design. This list may help you locate the source of an off-page connector error (such as a misspelled name). When a mismatch exists between a wire alias and an off-page connector name, DRC will not flag an error. (The off-page connector name overrides the wire alias.) Use the Report All Net Names option to list all net names in the design. Check this list to make sure all alternate net names are logically correct.
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Lesson 4
Inter-Sheet References
Use inter-sheet references to display the destinations of off-page connectors. The page numbers used in the inter-sheet cross reference data are extracted from the page number properties in the title block. Select Tools > Annotate to add intersheet references to your design. If two wires with the same alias are to be connected, an off-page connector with the same name is required on each page. Such multi-sheet nets are the only nets that need to be inter-sheet referenced. (If a net has no off-page connector, then it won’t be connected to any other page, and will not need to be inter-sheet referenced.) You turn the Place On Off Page Connectors option off to delete all intersheet references on all of the off-page connectors in the design. When pages are added, deleted, or renamed, the Annotate program by default changes the numbers in the title block, which will make the intersheet reference data on the off-page connectors obsolete. In this case, you can also use the Delete Inter-sheet References option to delete the intersheet references from all off-page connectors.
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Building a Multi-Sheet Schematic
Cross Referencing Parts
The OrCAD Capture tool lets you generate a cross reference report that lists every part in a design, indexed by schematic page. Select Tools > Cross Reference to create a part cross reference report. For each part, the cross reference report specifies the following information: •
Part name
•
Library from which the part was chosen
•
Reference designator
You can also generate a list of spare gates for each device.
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Netlist for PCB Design The OrCAD Capture tool produces many different kinds of ASCII netlists. A well formatted ASCII file can be a helpful design review tool, even if you are not going to interface to that particular system. You may also configure the Netlists for these “Other” board layout tools using a user defines .cfg (configuration files). This will allow you to specify the properties to be transfered by the Netlist Formatter.
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Building a Multi-Sheet Schematic
Bill of Materials A Bill of Materials (BOM) is a list of all the items you need to manufacture your design.
Select Tools - Bill of Materials to create a BOM report. The company name and address data at the top of the BOM report originates from the data defined in the title block. A standard BOM contains item, quantity, part reference, and part value columns. Use the Header and Combined Property String text boxes to customize the BOM. The Header field defines the titles above each of the columns of properties in the BOM report. The Combined Property String field defines which design properties load into which columns of the report. The property names must be enclosed in curly braces {}, and must precisely match the property names as specified on the parts, including spaces and case. Use the Include File options to attach part information in a text file that is not in the schematic. You can create non-electrical parts, such as screws, washers, or sockets, that appear in a Bill of Materials report but not in a netlist. Any part without pins is considered non-electrical.
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An empty field in the BOM report indicates one of the following: •
The property was not attached to that part.
•
The property was attached to the part, but its value was null for that part.
•
The property name you specified in the Combined Property String field does not match the property name attached to the part in the design.
•
In an include file, you specified a property for a part that is not in the design.
The Bill of Materials report is a delimited ASCII text file. Instead of “View Output” you may now have your Bill-of-Materials output open directly in Microsoft Excel for a “row and column” style format.
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Lab 4-4:
Building a Multi-Sheet Schematic
Processing the Design
Lab Objectives After completing this lab you will be able to: •
Open a schematic and annotate part references
•
View a results list of annotated part references
•
Run a Design Rules Check
•
Annotate inter-sheet references
•
Cross reference parts
•
Create a netlist
•
Create a Bill of Materials
Opening the Schematic 1. Double click each schematic page to open both pages of the Lesson4 design. 2. Resize the schematic windows, and use the Zoom icons to fit the contents to the work area. 3. Use the Window pull-down menu to toggle between PAGE1 and PAGE2. 4. Notice that the copied page already has reference designators assigned. Also observe that both pages have title blocks that read “Sheet 1 of 1”.
Annotate Part References 1. Click in the Project Manager window and highlight the design name. 2. Select Tools - Annotate. 3. In the Action section of the Annotate window, click either Incremental reference update or Unconditional reference update. 4. Click OK to start, and OK to continue.
Alternate Annotation (Optional) 1. Select Tools - Annotate. This time, instead using the default Annotate function, we will set a range for each of the pages. 2. When the Annotate window appears, select the Refdes Control required at the left, top of the window.
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Lesson 4
To the right of the window a section refered to as the Schematic Page scope will appear. The two pages of our design will be listed here. 3. For this example, set the “Start Value” for Page1 to be 100 and the “End Value” to be 199. For Page2 set the “Start Value” to be 200 and the “End Value” to be 299.
4. Using the rest of the diplayed options shown above, select OK to Annotate the design with the selected options.
Viewing Results 1. Use the Window pull-down menu to toggle between PAGE1 and PAGE2. Observe that all parts have reference designators assigned. Also observe that the title blocks now read “Sheet 1 of 2” and “Sheet 2 of 2”. When you use the Unconditional Reference Update option, all parts are processed (even ones with existing reference designators). This automatically resolves any duplicate reference designator problems that may occur when pages are copied from other designs.
Design Rules Check 1. Click in the Project Manager window and highlight the design name. 2. Select Tools - Design Rules Check.
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Building a Multi-Sheet Schematic
3. In the Report section, set the options as shown below.
4. Click OK. 5. Review the DRC report. Observe the list of off-page connections. 6. Close the DRC report window.
Annotate Inter-Sheet References 1. Click in the Project Manager window and highlight the design name. 2. Select Tools - Annotate. 3. In the Action section of the Annotate window, click on Add Intersheet References. 4. Click OK. The Inter-sheet References window appears. 5. Click OK again. Observe the numbers (1 or 2) to the left and right of your off-page connectors. These numbers are your inter-sheet references. 6. Click in the Project Manager window, and select Tools - Annotate again. 7. Click OK to display the Inter-sheet References window. 8. Set the following options as shown below.
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9. Click OK. Observe that the inter-sheet references have moved closer to the offpage connectors, and they now include the specified prefix and suffix.
Cross Reference 1. In the Project Manager window, click .\lesson4.dsn. 2. Select Tools - Cross Reference. The Cross Reference Parts window appears. 3. In the Report section, set the options as shown below.
4. Click OK. The cross reference report is displayed. This report shows where each part is located in the design (Sheet number). Observe the list of spare gates at the bottom of the report.
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Building a Multi-Sheet Schematic
5. Close the report window. Observe that the cross reference report (.xrf) has been added to the Outputs folder in the Project Manager window.
Create Netlist 1. In the Project Manager window, click on .\lesson4.dsn, and select Tools - Create Netlist. 2. Click the Other tab. 3. In the Formatters list, click on pads2k.dll, and click OK. 4. Click OK when prompted about the design being saved prior to netlisting. OrCAD Capture creates a netlist named lesson4.asc. 5. In the Project Manager window, double click .\lesson4.asc (under the Outputs folder). 6. Compare the netlist against the schematic. 7. When you are finished viewing the netlist, close the window.
Saving the Design 1. In the Project Manager window, click on .\lesson4.dsn. 2. Select File - Save. This saves both pages of the design. 3. Close both schematic page windows.
Bill of Materials 1. Highlight the design name in the Project Manager window. 2. Select Tools - Bill of Materials. The Bill of Materials window appears. 3. Click Place each part entry on a separate line (checkbox ON). 4. Click View Output (checkbox ON). 5. Click OK. The Bill of Materials report is displayed. Observe that the report contains four columns of data (Item, Quantity, Reference, Part). 6. Close the report.
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Closing the Lesson4 Project 1. Select File - Close Project. STOP
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5 Lesson 5: Editing Properties Lesson Objectives After completing this lesson, you will be able to: •
Property Filters in the Property Editor
•
Add part and net properties using the Property Editor
•
Using other Property Editor Techniques
•
Use the “Edit Find” and “Browse” Commands
•
Use text files to add or modify design properties
•
Create a Custom Bill-of-Materials
Part Properties
Part number
PCB footprint
Simulation model
Vendor
? Inductance
Cost
Power rating
Frequency Tolerance
Wattage
Each part in the design has special characteristics that need to be defined as properties. For example, every part needs a PCB footprint and a company part number. Depending upon the type of device (discrete, analog, digital IC), some parts may require more properties than others.
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Editing Properties
Lesson 5
The Property Editor
The Property Editor window lets you add, delete, or modify the properties of parts, wires, and text. To access the Property Editor, click on an object (part, wire, or text), click the right mouse button, and select the Edit Properties command from the pop-up menu. You can also double click on the part, wire, or text.
Pivoting the Spreadsheet The Property Editor displays a spreadsheet with selected object(s) along the left side, and a list of properties across the top. You can pivot the spreadsheet to display the property list along the left, and a list of selected objects across the top (as shown in the accompanying illustration). When the spreadsheet is pivoted with property names on the left, the New Column button becomes the New Row button (see illustration).
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Editing Properties
Filtering the Spreadsheet The Property Editor lets you filter the contents of the spreadsheet. Use the tabs along the bottom of the window to filter the contents by object type. For example, when you select a part, the Parts tab is selected by default, and the part properties appear in the property table. Click the Pins tab, and the spreadsheet displays the pin properties for all the pins on the part. Use the Filter by field at the top of the Property Editor window to filter the spreadsheet using a property list. (Think of Property Filters as a list of specific properties that you wish to see at a given time.) Each property list is given a name, and is known as a filter. All filter names are displayed in the Filter By field. Select a filter name to switch from one property list to another. The properties in the Cadence-supplied filters target specific design tools. For example, there is a property list for OrCAD Layout and Cadence Allegro. The filter lists all properties currently assigned to the selected object(s). You can create your own filters. For example, you can create a filter that just contains manufacturing-related part properties. When you select a part (or all parts), you can load, view, and edit these parts using a special property filter. Or you can create a list of high-speed routing properties to use when you’re working with special nets. The filter names and property lists are stored in the \tools\capture\prefprops.txt file.
Caution Please do not text edit the prefprops.txt file. Also, copy it to another directory before you begin editing in the Property Editor. The only way to restore the original is to re-load OrCAD Capture.
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Editing Properties
Lab 5-1:
Lesson 5
Property Filters in the Property Editor
Lab Objectives After completing this lab you will be able to: •
Open an existing project
•
Filtering by object type
•
View and select available property filters
•
Pivot the editor spreadsheet
•
Assign a PCB footprint
•
Add a new property
•
View and edit net properties
Opening an Existing Project 1. Select File - Open - Project. 2. Navigate to the D:\Capture\Lesson4 directory. 3. Select the Lesson4.opj file, and click Open. 4. In the Project Manager window, click the plus signs (+) to display the contents of the design file, and double click on PAGE1. Page one of the schematic is opened. 5. Resize the schematic window, and zoom to fit.
Filtering By Object Type Another way to control the contents of the Property Editor window is by object type. 1. Observe the tabs along the bottom edge of the Property Editor window. 2. Click the Pins tab. All the pin properties for the 74F162 part are displayed. 3. Close the Property Editor window. 4. Press to deselect the 74F162 part.
Note You can also create your own property filters. See Appendix B for more details.
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Editing Properties
Viewing Available Property Filters 1. Double click the 74F162 part, again, to select it. 2. At the top of the Edit Properties window, click in the Filter by field. 3. Scroll through the list of filter names, and select OrCAD-Layout. The Property Editor now displays only those properties that are relevant for the OrCAD Layout tool. See the Appendices at the end of this workbook for an explanation of some of these PCB design properties. 4. Now set the Filter by field to Cadence-Allegro. The Property Editor now displays a list of Allegro-related properties. 5. Set the Filter by field to . All properties currently assigned to the part are displayed (regardless of which tool the property is targeting). 6. Set the Filter by field back to OrCAD-Capture.
Selecting a Property Filter 1. Click the 74F162 part to select it, right-click, and select Edit Properties from the pop-up menu. The Edit Properties menu appears. 2. At the top of the Edit Properties window, click in the Filter by field. 3. Scroll through the list of filter names, and select the OrCAD-Capture entry.
Pivoting the Editor Spreadsheet 1. Right click in the empty cell in the top left position of the spreadsheet, and select Pivot from the pop-up menu (or simply double click).
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Editing Properties
Lesson 5
Observe that the spreadsheet now lists property names at the left (as shown below) instead of across the top. If you double click again in the top left cell, the property names will pivot back across the top of the spreadsheet (the default format).
Add Part and Net Properties using the Property Editor Assigning a PCB Footprint 1. With the property list pivoted along the left (as shown above), click in the PCB Footprint field and enter: DIP16
2. Click Apply and close the Property Editor window. 3. Press to deselect the 74F162 part.
Controlling Property Visibility (Optional) 1. Double click on the 74F162 part. The Property Editor window is displayed. Observe that the PCB Footprint property value is set to DIP16. 2. Click on the DIP16 property value, and click the Display button at the top of the spreadsheet. The Display Properties window appears. 3. In the Display Format section of the window, click the Value Only option, and click OK.
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Editing Properties
.
4. Close the Property Editor window. The PCB Footprint property value DIP16 is now visible in the schematic. 5. Press to deselect the 74F162 part. 6. Select File - Save.
Adding a New Property 1. Double click on the 74F162 part. 2. In the Property Editor, click New Row. The Add New Row window appears. 3. In the Name field, enter: Part Number
4. In the Value field, enter: 20-67890
5. Click OK. Notice the property name and value in the Property Editor window. 6. Close the Property Editor window. 7. Press to deselect the 74F162 part. 8. Save the design.
Viewing and adding Net Properties 1. Double click on a wire with the name of LOAD to select it. Observe the net name in the Property Editor window. Also observe that the Schematic Nets tab is automatically selected based on the type of object you picked. 2. Toggle the Filter by field to OrCAD-Layout and Cadence-Allegro.
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Editing Properties
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These filters list the net properties you can use for each of these PCB tools. 3. Using either of the above mentioned Filters, set the future trace width to 20. a. In the Cadence-Allegro filter, look for Min_Line_Width. b. In the OrCAD Layout filter, look for Width. 4. Reset the Filter by field to OrCAD-Capture, and close the Property Editor window. 5. Press to deselect the wire.
Note You cannot change a net name by editing the properties of a wire. You must double click on the net alias text, and use the Edit Net Alias window. STOP
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Lesson 5
Lab 5-2:
Editing Properties
Using Other Property Editor Techniques
Lab Objectives After completing this lab you will be able to: •
Edit multiple objects
•
Add new properties
•
Search a current page
•
Browse a design
Multiple Object Editing 1. Press to select both the 74F162 and 74LS00 parts.
Note Through out this manual “LMB” refers to your “Left-MouseButton”. 2. Right-click and select Edit Properties from the pop-up menu. Observe that the properties for both parts are displayed in the Property Editor window. 3. Click in the PCB Footprint field for the 74LS00 part and enter: DIP14 a. Click Apply to set the value. b. Click the Display button. c. Set the Display Format to Value Only and click OK. This makes the value of the PCB Footprint property visible in the schematic. 4. Click in the Part Number field for the 74LS00 part and enter: 20-12345 Click Apply to set the value. 5. Click in the PCB Footprint field for the 74F162 part and enter: SO16 Click Apply to set the value. 6. Close the Property Editor window. 7. Press to deselect both parts.
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Multiple Object Property Display 1. Reselect both the 74F162 and 74LS00 parts. 2. Press to display the Property Editor. 3. Click on the PCB Footprint property name box on the left (as shown in the following graphic).
All PCB Footprint property values are highlighted. 4. Click Display. a. In the Display Properties window, click Do Not Display. b. Click OK. 5. Close the Property Editor window and press to deselect all parts. Observe that all PCB Footprint properties are now invisible.
Adding New Properties 1. Reselect both the 74F162 and 74LS00 parts. 2. Right-click and select Edit Properties (or press ). 3. At the top of the Property Editor window, click New Row. The Add New Row window appears. 4. In the Name field, enter: VENDOR 5. Click OK. 5-10
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Editing Properties
The VENDOR property is added to the Property Editor window. 6. Click on the VENDOR property name box (on the left). 7. Right-click and select Edit from the pop-up menu. The Edit Property Values window displays. a. Click in the VENDOR field and enter: Parts R Us b. Click OK. The VENDOR name is applied to both parts. 8. Close the Property Editor window and press to deselect all parts.
Note You can also use the and keys to copy and paste property values between cells in the Property Editor window.
Searching the Current Page 1. With the schematic page active, select Edit - Find. 2. In the “Find What” box, make sure there is a * . This means “all”. 3. Set the Scope to Nets and click OK.
All nets in the current page are selected. This provides a convenient way to select all objects of a desired type, without selecting everything else on the page. 4. Right-click and select Edit Properties. 5. Double click in the top left cell to pivot the property and net names as shown in the following graphic.
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Lesson 5
.
6. Click the New Column button. a. In the Name field, enter: WIDTH b. Click OK. The WIDTH property column is added to the Property Editor window. 7. Click at the top of the WIDTH column, right-click, and select Edit from the pop-up menu. .
a. In the Edit Property Values window, enter: 10 b. Click OK.
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Editing Properties
.
The WIDTH value is applied to all selected nets in the page. 8. Close the Property Editor window and press to deselect all nets.
Saving the Page 1. Select File - Save and OK to save all pages of the design. 2. Close the schematic page. STOP
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End of Lab
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Editing Properties
Lesson 5
Using the Edit Find and Browse Commands The Schematic “Edit Find” Command
When a schematic window is selected, the Edit pull-down menu contains the same editing commands as those available in the right mouse pop-up menu (for example, Cut, Copy, Paste, Delete, Mirror, and Rotate). However, the Edit pull-down menu contains commands such as the Find and Global Replace commands that are not available elsewhere. The Edit - Find command can be used to select parts, nets, text, and other types of objects in the current page. When using this command, you can use wildcards to search for an object, or use the Find What field to select objects with specific properties. Once these objects are selected, you can open the Property Editor to edit them. Use the Edit - Global Replace command to change the name of a net in the design. This command will not process off-page connectors. You cannot use this command to replace a part with another part. Wildcards are not supported in this menu.
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Editing Properties
The Project Manager “Edit Browse” Command
When the Project Manager window is active, the Edit pull-down menu contains some commands not available elsewhere. For example, the Edit Browse command lets you search by object type (for example, parts, nets, and so on). You can select specific schematic pages in the Project Manager to limit the search. The results are displayed in a browser window. Use the browser window to select and locate any part or net in the list. (The Project Manager will automatically open the applicable page for you.) If you make multiple selections in the browser window, you can edit them at once in a Browse Spreadsheet window. With the Project Manager window active, you can also use the Edit pulldown menu to rename or delete a user-defined property in the design.
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Lab 5-3:
Lesson 5
Using the “Edit Find” and “Browse” Commands 1. In the Project Manager window, click on .\lesson4.dsn. 2. Select Edit - Browse -Parts and OK to list all parts in the design. 3. Double click part J1.
Page two of the schematic is automatically opened, and the HEADER12 connector selected. 4. Place your cursor in the schematic window, right-click, and select Edit Properties. 5. In the Property Editor window, pivot the property names so that they appear in a list on the left. 6. Assign a Part Number and PCB Footprint, as shown in the following graphic. .
7. Close the Property Editor window and press to deselect all parts.
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Lesson 5
Editing Properties
Note OrCAD Capture combines various property editing techniques into a single unified Property Editor. The Property Editor allows you to edit properties at all levels of the design. An alternative way to open the Property Editor, is to select the .DSN name or a schematic folder in the Project Manager window and the choose Object Properties from the Edit menu. All object properties in the .DSN file or schematic folder display within the Property Editor.
Saving the Design 1. Select File - Save. 2. Select File - Close to close the Browse Parts window. 3. Select File - Save to save the design STOP
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End of Lab
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Editing Properties
Lesson 5
Use Text Files to Add or Modify Design Properties Update Properties
Use the Tools - Update Properties command to load a text file containing property assignments into a design. You can preselect specific pages in the Project Manager window to control which portion of the design will be affected.
Understanding the Update File
The Header The first line in the update file is the header line. The first field in the header line is called the combined property string. This is the key property that is used to select the object you want to update. 5-18
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Lesson 5
Editing Properties
To the right of the combined property string is a list of update properties (each property name is quoted). These are the properties you want to attach or update. You can update any part or net property except for part value, part reference, and net name. Each of the lines following the header contain values for the combined property string, as well as values for the update properties.
Combined Property String The first field in the header line is called the combined property string. This is the key property that is used to select the object you want to update. For example, to update a net, the combined property string field should be . To select parts by reference (such as U1, R2), use . To select parts by type (such as 74F162, HEADER 12, or 0.1UF), set the combined property string to . The OrCAD Capture tool tries to match the combined property string values in the update file to property values in the design. This comparison is case sensitive. If the net name in the design is “LOAD” (all uppercase), but the net name in the combined property string field of the update file is “load” (all lowercase), OrCAD Capture assumes they are different nets. A message is sent to the session log for each line in the update file that fails to find a match in the design. Turn on the Use Case Insensitive Compares option to ignore case differences between the combined property string values in the update file, and the corresponding property values in the design.
The Update Properties The OrCAD Capture tool compares the property names in the header line of the update file to the property names in the design. This comparison ignores all case differences. If the property is found in the design, and it already has an assigned value, no changes are made. (By default, an existing value in the design overrides the update file.) A warning message is sent to the session log. Use the Unconditionally Update the Property option to override the existing property value in the design with a value in an update file. OrCAD Capture updates property values exactly as they are entered in the update file. Use the Convert the Update Property to Uppercase option to force all update property values to uppercase. This option has no effect on the property names. When a property is in the update file, but not in the design, the property is always added to the design. The property name is always added exactly as it appears in the header line of the update file. Once a property has been added, you cannot change its case.
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Lesson 5
Things to Remember
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•
The update property file must be created manually using a text editor.
•
The update property file is a tab delimited ascii file. Non-visible characters separate the columns, allowing OrCAD Capture to determine which category a piece of information belongs to. Do not insert additional tabs or spaces in this file.
•
Each line in the file must have an entry for each of the update properties in the header. Use double quotes (as a placeholder) to indicate a null value for that property, or to remove the current value and set to null.
Cadence OrCAD Capture Version 15.7
September, 2006
Lesson 5
Lab 5-4:
Editing Properties
Using an Update Properties File
Lab Objectives After completing this lab you will be able to: •
View the update file for parts
•
Clear the session log
•
Update part properties
•
View the update file for nets
•
Update net properties
Viewing the Update File for Parts 1. Using a text editor such as Notepad, view the contents of the Parts.upd file located in your D:\Capture directory.
Note Although the Parts.upd file does not present file content in table format, the following table aligns data into columns to more clearly present the content of the Parts.upd file. Notice how each part has five property values. ""
"PART NUMBER"
"COST"
"VENDOR"
"COMPSIDE"
"PCB Footprint"
"74LS00"
"20-12345"
"$1.20"
"ABC CO."
""
"DIP14"
"7400"
"20-12345"
"$1.20"
"ABC CO."
""
"DIP14"
"74F162"
"20-67890"
"$.90"
"ABC CO."
""
"SO16"
".1UF"
"30-10293"
"$.25"
"XYZ INC."
"BOTTOM"
"1206S"
"0.1UF"
"30-10293"
"$.25"
"XYZ INC."
"BOTTOM"
"1206S"
"HEADER 12"
"40-98743"
"$3.56"
"ACME, INC."
""
"HEADER12"
“12HEADER”
"40-98743"
"$3.56"
"ACME, INC."
""
"HEADER12"
Note Opening the file in NotePad will not show the information in columns as the list above displays. In NotePad, the file is a tab delimited ascii file. 2. Close the update file.
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Editing Properties
Lesson 5
Clearing the Session Log
Note If you had Exited your design, the Session Log would already be cleared. 1. Double click on the Session Log icon to open the window. 2. Select Edit - Clear Session Log. This clears the window of previous process results so that the only data present is the result of the part update process.
Updating Part Properties 1. In the Project Manager window, click on the design file. 2. Choose Tools - Update Properties. The Update Properties window appears. 3. In the Action section, make sure the Update parts option is selected. 4. Select the Use case insensitive compares option. 5. To specify the Property Update File, click the Browse button and navigate to the D: - Capture directory. 6. Click on the Parts.upd file and click Open. 7. In the Update Properties window, click OK. The OrCAD Capture tool loads the part properties into the design.
Saving the Design 1. Select File - Save.
Viewing the Results 1. View the contents of the Session Log window. Observe that the update file is trying to add the same five properties to each of the parts in the design (PART NUMBER, COST, VENDOR, COMPSIDE, and PCB Footprint). Also observe that when a part already has one of these properties assigned to it (from a previous lab), the part is not updated. 2. Close the Session Log window. 3. Open PAGE2 of the design and double click on one of the capacitors.
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Lesson 5
Editing Properties
4. In the Property Editor window, set the Filter by field to . Locate the PART NUMBER, COST, VENDOR, COMPSIDE, and PCB Footprint properties. Compare the values in the spreadsheet to the picture of the part property file shown at the beginning of this lab. 5. Close the Property Editor window. 6. Close PAGE2 of the schematic.
Viewing the Update File for Nets 1. Using a text editor such as Notepad, view the contents of the Nets.upd file located in your D:\\Capture directory.
Note Although the Nets.upd file does not present file content in table format, the following table aligns data into columns to more clearly present content. Observe that four properties are assigned to each net in the file. ""
"WIDTH"
"SPACINGBYLAYER"
"ROUTELAYERS"
"PLANELAYERS"
"VCC"
"40"
"TOP=15,BOT=15"
""
"PWR"
"+5V"
"40"
"TOP=15,BOT=15"
""
""
"GND"
"40"
"TOP=15,BOT=15"
""
"GND"
"AGND"
"40"
"TOP=15,BOT=15"
""
""
"CLOCK"
"10"
"TOP=12,BOT=12"
"TOP"
""
"CLEAR"
"10"
"TOP=12,BOT=12"
"TOP"
""
"LOAD"
"10"
"TOP=12,BOT=12"
"TOP"
""
2. Close the update file.
Updating Net Properties 1. In the Project Manager window, click on the design file. 2. Select Tools - Update Properties. The Update Properties window appears. 3. In the Action section, click on the Update nets option. 4. Click the Browse button, navigate to the Nets.upd file in the D:\Capture directory, and click Open.
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5. Click OK to load the net properties into the design. 6. Select the VCC or GND wire to view the properties you just assigned to the net.
Saving the Design 1. Select File - Save.
Viewing the Results 1. Open a schematic page. 2. Double click the wire for net CLOCK. 3. In the Property Editor window, select the Filter by option, Current Properties. 4. Locate the ROUTELAYERS and SPACINGBYLAYER properties. These properties were added by the Nets.upd file. 5. Close the Property Editor window. 6. Close the schematic page. STOP
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Lesson 5
Lab 5-5:
Editing Properties
Customizing the Bill of Materials
Lab Objectives After completing this lab you will be able to: •
Open the Bill-of-Materials
•
Change line item definitions within the Bill-of-Materials
•
Create a Custom Bill-of-Materials
Open the Bill of Materials 1. Click in the Project Manager window, click on the design file and select Tools - Bill of Materials. 2. Click Place each part entry on a separate line (turn checkbox on). 3. Click View Output (turn checkbox on).
Note If you prefer, there is also an option to open the Bill-of-Materials output straight into Excel for a row & column format. Select the Open in Excel instead of the View Output.
Changing Line Item Definition 1. In the Header field, specify a line of titles for the columns of data that will be included in the BOM. The full list should read as follows: Item\tQuantity\tReference\tPart\tPCB Footprint\tPart Number\tSupplier\tCost
Note The “\t” inserts a tab-space between fields of data in the BOM report. 2. In the Combined property string field, specify the properties whose values you want included in the BOM (under the titles you just listed in the previous step). The full list should read as follows: {Item}\t{Quantity}\t{Reference}\t{Value}\t{PCB Footprint}\t{PART NUMBER}\t{VENDOR}\t{COST}
Property names must be enclosed in curly braces. The sequence of names correspond to the sequence of column titles in the Header list.
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Create a Custom Bill-of-Materials 1. Click OK to display the The Bill of Materials report as either a text file or in Excel. Notice the inclusion of the PCB Footprint, Supplier, and Cost data. If desired, you can load this tab-delimited text file into Excel. 2. Close the report. 3. Select File - Close Project.
Note With the default Bill-of-Materials extractor the Header and Property Sting lines cannot be saved if you wish to switch from one format to another. However, it is recommended that you create a simple text file and simply copy and paste the 2 lines from the text file to the rextractor. STOP
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Lesson 5
Editing Properties
Export/Import Properties (Optional)
Use the Tools - Export Properties and Tools - Import Properties commands to: •
Export all design properties to a text file
•
Use a spreadsheet editor to add or modify properties
•
Reload the modified file into the design
Note The exported file format is set up as a table with rows corresponding to parts or nets, and columns corresponding to properties. Property values are delimited by tabs.
Things To Remember Here are some additional things to remember when editing the export file:
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•
The first two rows of the file identify the document as either a design or a library, and, if a design, identify the schematic page that is the source of this information. Do not change or delete these two rows.
•
In each of the subsequent rows, the first two fields contain a keyword and an identifier. Do not change or delete the information in these two fields.
•
When adding new information, do not skip columns. Enter “” as a placeholder.
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Lab 5-6:
Lesson 5
Using an Export/Import Properties File (Optional Lab)
Lab Objectives Most of the global editing functions used in this method can now be accomplished using the Property Editor at the Project Manager level. After completing this lab you will be able to: •
Export part properties
•
View the export file within Excel
•
Edit the export file
•
Import the file
Exporting Part Properties 1. In the Project Manager window, click on the design file. 2. Select Tools - Export Properties. The Export Properties window appears. 3. In the Contents section, observe that Part Properties is the default option. This means that all existing part properties will be exported to a text file called lesson4.exp. 4. Click OK. Notice that the lesson4.exp file has been added to the Outputs folder. 5. In the Project Manager window, double click on the .\lesson4.exp file. The exported file is opened in a text editor window. This file contains all the part properties currently in the design. 6. View the file and close the window. (Do not edit here.)
Viewing the Export File with Excel 1. Start Microsoft Excel. 2. In Excel, select File - Open. 3. In the Look in field, navigate to the directory: D:\Capture\Lesson4
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4. Set your Files of type field to All Files (*.*), as shown in the following graphic.
5. Select the lesson4.exp file and click Open. a. In the Text Import Wizard - Step 1 of 3 window, click Next. This tells Excel that the export file is a tab-delimited file. b. In the Text Import Wizard - Step 2 of 3 window, click Finish. The export file is loaded into the spreadsheet window. 6. Drag the left mouse button to increase column widths as needed (so you can see the column headers).
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Editing the Export File 1. Right click at the top of the PART NUMBER column, and select Insert from the pop-up menu. .
A new column is added before the PART NUMBER column. 2. Click in the HEADER row at the top of the new column and enter: DESCRIPTION
3. Assign part descriptions as shown in the graphic that follows.
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Editing Properties
.
4. Add any other property that you want to bring into the design, or change the values of some existing properties. 5. In Excel, select File - Close. (not the File > Save command.) 6. Click Yes to indicate you want to save the Lesson4.exp. 7. Click Yes to indicate you want to retain the .exp file format. 8. Select File - Exit, and No to exit Excel.
Importing the File 1. In the Project Manager window, click on the design file and select Tools - Import Properties. 2. In the Import Properties window, navigate to the directory: D:\Capture\lesson4 3. Select the lesson4.exp file and click Open. The modified properties file is loaded into the design.
Saving the Design 1. Select File - Save.
Viewing Results 1. Open a schematic page and use the Property Editor to verify that DESCRIPTION properties have been loaded. If you added or edited other part properties, check them as well. 2. When you’re done, close the schematic page.
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Note The Export/Import Properties technique can also be used to update net properties. STOP
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6 Lesson 6: Creating Parts and Symbols Lesson Objectives After you complete this lesson you will be able to: •
Create a new part library
•
Create a Homogeneous part
•
Create parts from a Spreadsheet
•
Copy and rename parts and symbols
•
Customize a title block
•
Validate Library (Optional)
Creating a New Part Library
You can use the File - New - Library command to create a new Part Library. Once the library is created, use the Save As command to rename the default library name.
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Lesson 6
Location of Library Files When you create a new library, its location defaults to a directory within the Cadence software hierarchy. If you use the File - New - Library command while a project is open, the new library location defaults to the current project directory. This ‘project’ library will appear in the Library folder in the Project Manager window, and will be automatically accessible whenever you open the project. The OrCAD Capture libraries supplied by Cadence are organized by part function (such as OPAmp, Discrete, Gate, and so forth). It is strongly recommended that you organize your new libraries in a similar fashion.
Renaming a Library You can modify the name and/or location of a library by clicking on the library with the right mouse button and then selecting the Save As option from the pull-down menu. This will open a new form that will allow you to modify the name and/or location of the library.
Homogeneous Parts A homogeneous part is a part that has only one part graphic. If you define the part as having two or more parts per package, this means the package holds two or more identical logic parts, each with its own unique physical pin numbers. 47
36
When you create a homogeneous part, you create one part graphic only. If the part graphic represents the entire package (called single-section), then Parts per Pkg is set to 1. If the part graphic represents just a portion of the entire package (called multi-section), then Parts per Pkg is set to 2 or more.
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What is a Package? VCC INB INA OUT INB INA OUT
14 8
1 13 3
12
11
10
9
8
U6
Pin number assignments
PCB Footprint
Reference designator
1
2
3
4
5
6
7
INA INB OUT INA INB OUT GND
A package is a grouping of one or more circuit elements. If a symbol represents the entire package, the part is said to be singlesection. If the symbol represents only a portion of the physical package, the part is called multi-section (other terms are multi-gate or multi-slot). A part has both logical and packaging related characteristics. For example, the symbol defines the part graphics and pin names. But packaging information is required to define the number of times the symbol fits into a package, and the logical-to-physical pin mapping required to annotate and netlist a schematic design. A package contains power, ground, and noconnect pins that also need to be considered during part building.
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Creating a New Part
The Design - New Part command opens the New Part Properties dialog box. You can use the New Part Property dialog box to create a new part in a current or active library. The table that follows lists and describes each option and field within the New Part Properties dialog box.
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Dialog Box Option
Use Description
Name
Specifies the part’s name. This is used as the default part value when the part is placed on a schematic page. Part names can be up to 31 characters long (for example, R1206, RN55).
Part Reference Prefix
Specifies the first letter of the reference designator (“C” for capacitor or “R” for resistor).
PCB Footprint
Specifies the name of the footprint pattern used during the PCB layout process (for example, SM_1206).
Create Convert View
Controls the creation of an alternate version. You might use the convert option to define a DeMorgan equivalent. A part with this option specified will have two views (a normal and a convert) that you can switch between once the part has been placed in the schematic.
Parts per Pkg
Specifies whether or not there are multiple parts in the package (for example, gates).
Package Type
If the part is a multi-gate package, specifies whether all the parts in the package are symmetrical (homogeneous) or asymmetrical (heterogeneous). This setting cannot be changed once the part has been created.
Part Numbering
If the part is a multiple-part package, specifies whether parts in the package are identified by letter or number. For example: U?A (alphabetic) or U?-1 (numeric).
Part Aliases
Lets you add technology-specific aliases for the current part (such as 5400, 7400, 74LS00 and so on).
Attach Implementation
Specifies a behavioral model for simulation, or an underlying schematic view for a hierarchical block.
Note Once the Package Type has been set (Homogeneous or Heterogeneous), it cannot be changed.
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Part Aliases (Optional)
(DO NOT use this method to create your parts library.) Once the part has been created, you can define a list of aliases. These alternate part names typically indicate a different technology. To access the Part Aliases button, highlight the trng.olb and select Options - Package Properties. Examples of different technologies are 75F00, 74LS00, 74ACT00, and 74HCT00. Some aliases indicate the use of a military style package versus one for commercial applications such as 5400. These are parts that can use the same symbol graphics, logical pin names, physical pin mapping, and PCB footprint. Part aliases appear in the Project Manager window with a dashed line in the center of the symbol icon. When a part is copied from one library to another, its aliases are copied also. The Parts in the OrCAD Capture Libraries were created using Part Aliases. If you require individual information in each part, i.e. Part Number, do not use Part Aliases if you have specific data, i.e. Part Numbers, to add to each part. DO NOT use Part Aliases if you are using OrCAD Capture CIS.
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The Part Editor Tool Palette Electrical Tools
Graphic Tools
When you OK the New Part Properties dialog box, the OrCAD Capture tool opens the Part Editor. The Part Editor tool palette is located on the right side of the OrCAD Capture window. It contains tools used to create and edit part bodies. The following table describes each Part Editor tool palette button.
Toolbar Icon
Comments Selects objects. Default mode.
Adds an IEEE symbol.
Place Pin - Adds a single oin to the part.
Place Pin Array - Adds a pin array to the part with a defined range. Place Line - Draws a line.
Place Polyline - Draws a multiple segment line.
Place Rectangle - Draws a rectangle. Hold key to create a square. Place Ellipse - Draws an ellipse. Hold key to create a circle.
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Toolbar Icon
Comments
Place Arc - Draws a 3-point arc (centerpoint, begin, and endpoint).
Place Text - Adds comment text.
These commands are also located in the Place pull-down menu.
Adding Graphics
Initially, the Part Editor contains a dotted-line part boundary box and placeholder properties for the reference designator and part value.
Editing Part Graphics All graphics that make up the part must fit within the dotted-line boundary box (with the exception of pins and pin graphics). The boundary box also defines the selection area for the part when used in the schematic.
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The dotted boundary box automatically enlarges to surround the part graphics you create. If the part graphics are smaller than the boundary box, the box size must be reduced manually. All part graphics snap to a 100-mil grid in the Part Editor window. However, if you do not want to use the snap feature, click the Snap to grid icon in the main toolbar to create off-grid graphics. This is also helpful when adding or relocating text and properties.
Adding Pins
To access the Place Pin dialog box, click the Place pin icon in the Part Editor tool palette. Pins must be placed on the boundary box edges only, and must be placed on a 100-mil grid. The table that follows lists and describes each option and field within the Place Pin dialog box.
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Dialog Box Option
Use Description
Name
Specifies the pin name. If the name ends with a digit (0 - 9), each pin is incremented by one every time you place a pin. You can create a pin name with an overbar by adding a back-slash (\) after every letter in the pin name. You will get errors if you create duplicate pin names on the same symbol. The only duplicate pin names on a symbol should be power pins (see Adding Power Pins later in this lesson). By default, all pin names (except power) are visible. Pin name text cannot be moved.
Number
Specifies the pin number. The pin number can be alphanumeric. If it ends in a number, it is incremented by one after each pin is placed. If the Pin Number field is left blank, no error occurs. During annotation, no pin number data is added to the schematic. During OrCAD Layout netlisting, the pin name is added to the netlist (for example, pin A or C for a diode). A pin number is required by the Allegro PCB Editor netlister. OrCAD Capture will flag duplicate pin number assignments on the same section only. For example, in a multi-section part, you can map a shared enable pin to the same pin number as long as it is in a different section. By default, all pin numbers (except power) are visible. Pin number text cannot be moved.
Width
Specifies whether the pin connects to a bus or a wire. If bus is specified, the pin must connect to a bus; otherwise, it must connect to a wire. Bus pins cannot be used directly as netlisting pins. Their main purpose is to make it possible to use nonprimitive parts more easily by connecting large numbers of signals to a child schematic folder.
Shape
Select the pin shape from the list of six pin shapes.
Type
Select the pin type from the list of eight pin types: 3 State, Bidirectional, Input, Open Collector, Open Emitter, Output, Passive, and Power. Be careful to enter the correct pin type, as this will affect design rule checking and simulation. If a part has no voltage pins, then its pins should be defined as Passive.
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Creating Parts and Symbols
Dialog Box Option
Use Description
Pin Visible
Specifies the pin visibility on the schematic page. All pins (except power pins) are visible (the Pin Visible toggle is greyed out). Power pins are invisible by default, but can be visible if you choose. (The Pin Visible toggle is accessible for power pins only.)
User Properties
Displays the User Properties dialog box so you can add and edit the pin’s properties.
Note Pins cannot be added to the corner of the part boundary box. If you need to place a pin on a corner, enlarge the boundary box before adding the pin, then shrink the box so the pin is on the corner.
Editing a Single Pin
There are two ways you can edit properties such as the pin name, pin number, shape, or pin type of a single pin. You can select the pin and then choose the Edit Properties item from the right pop up menu. You can also double click the pin to automatically display the Edit Properties dialog box.
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Lesson 6
Editing Multiple Pins
When multiple pins are selected, you can access a spreadsheet that lets you change pin name, number, type, or specify pin graphics (for example, clock wedge, or inversion dot).
Adding Power Pins
To add a power pin, set the Type field to Power. The name of the power pin is used as the name of the power net.
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When you set the pin type to Power, the Pin Visible field is activated (normally greyed out for all other pin types). Although you now have the option available, by default the option is unchecked, which means power pins are invisible in the schematic. When a power pin is invisible in the schematic, it is automatically added to the netlist. If you want to override this default signal defined for a power pin, edit the part properties in the design and make its power pin visible. Then connect it to an appropriate voltage symbol in the schematic. If you check the Pin Visible option when building the part, then the power pin is always visible in the schematic, and will always need to be explicitly tied to a voltage symbol or wire in order to appear in the netlist. It is not a good idea to use overbars above power pin names. If you do, any netlists that you create will have invalid power pin names. It is common to add power pins using the Zero Length pin shape. Multiple power pins tied to the same voltage should be added with duplicate pin names (for example, pin name +5V) because the pin name is used as the net name. As long as the Pin Type is Power, no duplicate pin errors will occur when you save the part.
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Lesson 6
Editing Pins at Package Level
Use the Package Properties spreadsheet to edit pin properties at the package level. For a multi-section part, this lets you access all sections of the package at once. Use the View - Package command to display all sections in the package. Once you are in Package mode, select Edit - Properties to display a spreadsheet of all the pins in the package. Notice that you cannot change pin shape, or specify dots or clock wedges, in this spreadsheet. To address graphics-related pin properties, use the View - Part command to exit package mode and return to logical part mode. The Ignore field causes a pin to be ignored during design rules check.
Pin Swapping Use the PinGroup column to define pin swapping. This field must contain an integer. For example, INA and INB are equivalent inputs. Assigning the same pin group value to each of these pins lets them pin swap during PCB layout.
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Lesson 6
Creating Parts and Symbols
Adding User Properties
Use the Options - Part Properties command to access the User Properties dialog box (you must be in View - Part mode to access this command). The User Properties dialog box lets you add company part numbers, vendor or manufacturer names, PCB footprint names, or any data needed to support in-house processes (for example, a Bill of Materials report). When building a discrete part, you will automatically have a VALUE property for resistance or capacitance, but you will need additional properties for wattage, or power, and tolerance. These placeholder properties control positioning and visibility of part data in the schematic. The User Properties dialog box contains some default part properties. For example, various implementation properties let you define relationships between the symbol and a behavioral simulation model or lower level schematic in a hierarchical design. There are also pin properties to control visibility and rotation of pin names and numbers. Use the New button to add a property name and value. Use the Display button to control visibility of property names and values as described in the Help system. The table that follows identifies and describes each option and field within the User Properties dialog box.
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Default Part Property
Use Description
Pin Names Rotate
When True, pin names will be horizontal on left and right edges, and vertical on top and bottom edges.
Pin Names Visible
Some parts do not need logical pin names visible (for example, simple gates or discretes).
Pin Numbers Visible
Some parts do not need pin numbers visible (for example, discrete resistors and bypass capacitors).
Note For parts with Passive pin types, you can select the part in the schematic, edit its properties, and control visibility for pin names and numbers. For all other pin types, visibility of names and numbers must be set at the library level.
Adding Properties for OrCAD PCB Designer (or Allegro PCB Editor) When applicable, “no connect” pins may be added as a user property for either OrCAD PCB Designer or Allegro PCB Editor.
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No connect pins are not added to the symbol, but are defined with the NC user property. The value of the NC property is a comma-separated list of physical pin numbers. When transferring the design to OrCAD PCB Designer or Allegro PCB Editor, the NC property is required to account for all package pins not present on the schematic symbol. However, this property is not required when transferring the design to OrCAD Layout. All parts, for either OrCAD PCB Designer or Allegro PCB Editor MUST have a property assigned to them, called CLASS. The value for this Property is one of three: IC, IO, of Discrete. This is a required property for the netlister for these tools.
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Lesson 6
Lab 6-1:
Creating Parts and Symbols
Creating a New Library
Lab Objectives After you complete this lab you will be able to: •
Create a library
•
Rename the library
Starting OrCAD Capture 1. Select Start - All Programs - OrCAD 15.7 - OrCAD Capture CIS.
Creating a Library 1. In the main session window, select File - New -Library. The Project Manager window appears. A new library file is listed under the Design Resources folder.
Renaming the Library 1. In the Project Manager window, click on the library file libraryn.olb. (The letter n will be the number 1 or greater.) 2. Select File - Save As. 3. To set the Save in field, navigate to the D:\Capture directory. 4. In the File name field, enter: TRNG.OLB 5. Click Save. This creates the new library, TRNG.OLB, in the specified directory. STOP
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Lab 6-2:
Lesson 6
Creating a Homogeneous Part
Lab Objectives After you complete this lab you will be able to: •
Open the New Part Properties window
•
Create part graphics
•
Add pins and power pins
•
Modify pin properties
•
Assign pin numbers to all gates in a package
•
Set up pin swapping for Allegro PCB Editor and OrCAD Layout
•
Add user properties
•
Control property display
•
Add part aliases
Open the New Part Properties Window 1. In the Project Manager, click on TRNG.OLB and select Design New Part. The New Part Properties dialog box appears.
Note You can also add a new part using the New Part command in the right mouse button pop-up menu. 2. Complete the form as shown in the graphic that follows.
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3. Click OK. When finished, the TRNG library window looks like the example below.
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Creating the Part Graphics The Part Editor automatically displays a part boundary box five grid spaces square. All part graphics must fit within the dotted boundary. 1. Maximize the Part Editor window, then select View - Zoom - All (or click the Zoom to all icon in the toolbar). 2. Click the Place arc icon in the toolbar. To create an arc, you must enter three mouse clicks, as shown in the following graphic.
Click 3 (end point)
Click 1 (centerpoint)
Click 2 (starting point)
3. The first click should be two grids to the right and two grids up of the lower-left corner of the part boundary box (this will be the center point of the arc). 4. Move the cursor and notice that a circle expands from the centerpoint. 5. Click two grid points below the centerpoint to establish the starting point for the arc. 6. Move the cursor counterclockwise around the center point until the arc has the shape you want. Click to end the arc. 7. Press to exit drawing mode. and again to deselect the arc. 8. Select Place - Polyline (or click the Place polyline icon) and add lines to complete the polygon, as shown below.
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Click 1 Click 2
Click 3 Click 4
9. Right-click and select End Mode from the pop-up menu. 10. Now press the key to exit polyline mode, and again to deselect the polyline. 11. At this point, your graphic should resemble the following picture.
The bounding box is too large. It must touch the edges of the part graphics. This ensures that when you attach pins to the part bounding box, they contact the polygon. 12. Select the bounding box and drag the handles (the small boxes in each corner of the bounding box) to adjust its size, as shown in the following picture.
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13. Press to deselect the bounding box. 14. Select File - Save.
Adding Pins 1. Click the Place pin icon. 2. Enter the information shown in the following picture.
3. Click OK. The pin image attaches to the boundary box. As you move your cursor, the pin snaps to 100 mil grid points along the boundary edges. 4. Position it as shown in the following picture, and click to place it. Do not double click when adding a pin, as this places two pins at the same location.
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5. Move the cursor and notice that a second pin is now attached and ready for placement. 6. Click to add a second pin two grids below the first pin. Notice that the pin number automatically increments. You will change the pin name later. 7. Place a third pin on the right side, as shown in the graphic that follows.
8. Press the key twice.
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Lesson 6
Modifying Pin Properties 1. Use to select both pins 2 and 3. 2. Right-click and select Edit Properties from the pop-up menu.
The Browse spreadsheet is displayed, listing the properties of the two selected pins. 3. Click in the Name field for pin 2, and change the pin name to INB. 4. Change the Name for pin 3 to OUT, set the Type to OUTPUT, and check the Dot checkbox, as shown in the following picture.
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Lesson 6
Creating Parts and Symbols
5. Click OK. 6. Press to deselect all pins. Your part should now resemble the following picture:
Note More than one pin must be selected to edit pin properties using the Browse Spreadsheet. To change a pin shape after placement, double click on the pin to display the Pin Properties dialog box.
Adding Power Pins You will now add power pins, as shown in the following example.
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1. Click on the Place pin icon, and enter the values shown in the following picture.
2. Make sure the Pin Visible setting is off (unchecked). Generally, you do not want the power pins visible when the part is placed in the design. 3. Click OK. 4. Place the GND pin on the bottom of the graphic. 5. Remain in pin placement mode, and place another power pin at the top of the graphic. Then press twice. 6. If necessary, select and drag the Part Reference U?A, and so they do not overlap the power pins. 7. Double click the power pin you placed at the top of the graphic and change the Name to VCC. Note that the pin number was automatically incremented to 8. 8. Change the Number to 14. 9. Click OK. 10. Press . 11. Select File - Save.
Assigning Pin Numbers to All Package Gates As this is a homogeneous part with four parts per package, the part graphic represents one of four identical sections. 1. Select View - Package from the pull-down menu.
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All four sections of the package are displayed. Notice that you still need to assign unique pin numbers for the other three gates.
2. Select Edit > Properties from the pull-down menu (alternatively, you can use the shortcut). The Package Properties spreadsheet opens. Notice the pin numbers that you assigned for section A. 3. Assign pin numbers to sections B, C, and D as shown in the next picture. The GND and VCC pins map to pins 7 and 14 respectively, for all sections in the package.
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4. Click OK.
Setting Up Pin Swapping for Allegro PCB Editor and OrCAD Layout In order to perform pin swapping in the Allegro PCB Editor or OrCAD Layout tools, you must set pin swap properties in the OrCAD Capture library. 1. Select Edit - Properties from the pull-down menu to reopen the Package Properties spreadsheet. 2. Locate the PinGroup column. 3. For the input pins (INA and INB), assign the number 1. 4. For the output pins (OUT) assign the number 0. (zero) Leave the PinGroup field empty for pins GND, and VCC, as shown in the graphic that follows.
Note A quick way to set up all the pins in each gate to be the same setting is to set the pins in gate A and then use the “Update” selection at the bottom of the Package Properties window.
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Creating Parts and Symbols
5. Click OK to apply the settings. 6. Select File - Save to save the part.
Adding User Properties 1. Select View - Part, and click the Zoom to all icon in the main toolbar. 2. Use to toggle through the four sections in the package. Notice that each section displays the pin numbers you just assigned. 3. Select Options - Part Properties. The User Properties dialog box appears. 4. Click the New button. The New Property dialog box appears. 5. Enter the new property name and value as shown in the following example, and click OK.
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Note If you are defining properties for any of the Cadence Allegro technologies, DO NOT use any spaces in any of the property names. A ( - ) dash or an ( _ ) underscore is acceptable.
Controlling Property Display 1. Make sure the PART NUMBER property is highlighted, then click the Display button to the right of the dialog box.
The Display Properties dialog box appears. 2. In the Display Format section, select the Value Only option.
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This option means “Show me the property value, but not the property name.” Note the other display options. 3. Click OK. 4. Click OK in the User Properties dialog box. The property value is now visible on the part. When this part is used in a schematic, the PART NUMBER property value will be visible. 5. Select Options - Part Properties. The User Properties dialog box reappears. 6. Select the Pin Names Visible option, then toggle the value to False, as shown in the following graphic.
Note A required property for Allegro PCB Editor for all parts is a property called CLASS. Each part must then have a CLASS property value of either: n n n
IO (for Connectors) IC (for standard parts like memory, etc.) DISCRETE (for all discrete parts such as resisters, capacitors, etc.)
7. Click OK. Notice that the logical pin names INA, INB, and OUT are no longer visible on the part. 8. Select File - Save.
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Note Observe that the visibility of pin names and numbers is controlled with a True or False property value, rather than with the Display button in the User Properties form.
Adding Part Aliases (Optional only)
Important This method should NOT be used if each part is unique! An example of this is different Part Numbers for each part. 1. Select Options - Package Properties. 2. Click Part Aliases. 3. In the Part Aliases dialog box, click New. 4. In the New Alias dialog box, enter the name 74LS00 and click OK. 5. In the Part Aliases dialog box, select New again and enter 7400. 6. Repeat this step one more time, adding 5400 to the list. The list of aliases should resemble the following picture.
7. Click OK. 8. Click OK in the Edit Part Properties dialog box. 9. Select File - Save. 10. Select File - Close, and No to exit the Part Editor.
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When you’re finished, your TRNG library window would look similar to this.
STOP
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Creating a Part From a Spreadsheet OrCAD Capture can simplify the creation of very large parts in an active library. You can use the New Part from Spreadsheet to create new parts. The New Part from Spreadsheet has a spreadsheet-like interface that allows you to enter the data from a part data sheet to the spreadsheet.
Split Part Symbol Generation The Split Part command found on the pop-up menu on the active library will allow you to create a multiple part package out of an existing part. You can specify the number of sections (multiple parts) to split the part into, and choose the numbering format for the sections. Using a drop-down list, you can associate specific pins to a section.
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Lab 6-3:
Creating Parts and Symbols
Creating Parts from a Spreadsheet
Lab Objectives After you complete this lab you will be able to: •
Create large parts using a spreadsheet interface.
•
Understand how to create and slit large parts in multiple parts packages.
Opening the Part Spreadsheet 1. With the TRNG.OLB library still available in the OrCAD Capture session window, hightlight the library name. 2. From the right mouse button, pop-up menu, select New Part from Spreadsheet.
The New Part Creation Spreadsheet opens. It will like the following figure:
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3. Enter PCA9548 for the Part Name and leave all other settings at their default, for now. 4. Using the following data, enter the values in the appropriate cells of the spreadsheet. Pin Number
Pin Name
Pin Type
Pin Shape
Position
1
A0
Input
Short
Left
2
A1
Input
Short
Left
3
RESET
Input
Short
Left
4
SD0
Output
Short
Right
5
SC0
Output
Clock
Right
6
SD1
Output
Short
Right
7
SC1
Output
Clock
Right
8
SD2
Output
Short
Right
9
SC2
Output
Clock
Right
10
SD3
Output
Short
Right
11
SC3
Output
Clock
Right
12
GND
Power
Short
Left
13
SD4
Output
Short
Right
14
SC4
Output
Clock
Right
15
SD5
Output
Short
Right
16
SC5
Output
Clock
Right
17
SD6
Output
Short
Right
18
SC6
Output
Clock
Right
19
SD7
Output
Short
Right
20
SC7
Output
Clock
Right
21
A2
Input
Short
Left
22
SCL
Input
Clock
Left
23
SDA
Bidirectional
Short
Left
24
VDD
Power
Short
Left
5. Select Save to apply the data and create a new part.
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6. If you receive the following warning:
Select View Warnings to display the potential errors for the part. 7. After viewing, select Hide Warnings to close the Warning list. 8. As we are not going to create a part with “gates” at this time so just select Save then Continue to apply all the input and create a part. 9. The new part will appear in the Library window. Open the Part PCA9548 by double clicking on it. 10. It should resemble the following graphic:
11. You could move the pins to the desired locations if you wish. User Properties could also be added at this time. 12. Close and Save the new part. STOP
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Lesson 6
Copying and Renaming Parts and Symbols
It is common to copy parts from a Cadence-supplied library and modify them for use in your own library. You should never modify the default libraries supplied with the OrCAD Capture software. Instead, use them as source libraries. To copy and paste a part from one library to another, both libraries must be open. Once you have selected the part or parts you want to copy in the source library, be sure to click on the name of the target library before using the Edit - Paste command.
Note You can also open a part in one library, and use the File - Save As command to save the part into another library. To copy and rename a part in the same library, first select the part and use the Edit - Copy command. Then use the Design - Rename command to change the name of the original part. Next, paste the copied part back into the library. Last, open the renamed part and modify it.
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Lab 6-4:
Creating Parts and Symbols
Copying and Renaming Parts and Symbols
Lab Objectives After you complete this lab you will be able to: •
Open a OrCAD Capture supplied library
•
Copy parts from one library and add them to another
Opening an OrCAD Supplied Library 1. Select File - Open - Library. 2. Navigate to the D:\\tools\capture\library directory, as shown below. The above path may vary with different installation locations of the OrCAD software.
3. Click on capsym.olb and click Open. The library window opens. You will copy parts from this source library into your TRNG library. 4. Align the two Project Manager windows side by side.
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5. In the CAPSYM library window, use to select both the GND_POWER and TITLEBLOCK0 symbols. 6. Select Edit - Copy (or CTRL+C). 7. In the other library window, click on TRNG.OLB and select Edit Paste (or CTRL+V). The two selected symbols now appear in the TRNG library. 8. Close the CAPSYM library window. 9. In the TRNG library, select the GND_POWER symbol and then select Design - Rename or select Rename from the pop-up menu in the Library window. The Rename Power Symbol window appears.
10. Change the symbol name to GND and click OK to close the form. Notice that the name has changed in the TRNG library. STOP
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Heterogeneous Parts A heterogeneous part is a part that has two or more unique part graphics. It could also have a different number of pins in each “gate” or part. Any part with a pin common to all the other gates must also be defined as a ‘Heterogeneous” part. The following part displays each gate with a different graphic display.
1
L?A
2
relay
3
L?B 4
Coil
Open Switch
relay
5
L?C 6 relay
Closed Switch
A heterogeneous part must be defined as multi-section (Parts per Pkg is set to two or more). Each part graphic represents a different portion of the entire package. For example, a relay contains three different logical parts—a coil, an open switch, and a closed switch. You define this heterogeneous part as having three parts per package. In the Part Editor, use the View - Next Part command to create three unique part graphics, as shown in the accompanying graphic.
Note More information on Heterogeneous Parts can be found in Appendix C of this manual.
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Lesson 6
Annotating Heterogeneous Parts Packages
Schematic
L1 L?A 1
1
PARTGROUP =
L?C
1
5 6
5 6
PARTGROUP = 3
2
2
1
L?B
L2 4
PARTGROUP =
3
2
5
4
L?C 6
PARTGROUP =
5
2
6
When a heterogeneous part is used in a design, OrCAD Capture needs a property to indicate which part graphics go together in a package. This is required for Heterogeneous parts only when you use the Annotate command.
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Creating Library Symbols OrCAD Capture lets you create custom symbols for special applications. For example, you can create your own power symbols, or customize a title block symbol.
These special symbols carry information in the design, but do not represent physical parts on the PCB. You can create these symbols from scratch, or modify existing symbols and add them to new or existing libraries. There are only four types of symbols in OrCAD Capture: Power - includes all power and ground symbols Off-Page Connectors - to link the nets from Page-to-page only Hierarchical Ports - connects the net through the levels of a hierarchical design Title Blocks - contains information about the design on each page including page numbering, title, revision, page size, etc.
More Information Use the Design - New Symbol command to access the New Symbol Properties menu. Some of the part editor functionality is removed when building these special symbol types. For example, you cannot add pins in this mode. When you set the Symbol Type to Power, Off-Page Connector, or Hierarchical Port, the part editor automatically gives you a single pin as a connection point. A title block symbol contains no pins at all.
Note See Appendix C for more information on symbols.
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Custom Title Blocks OrCAD Capture includes a title block template that enables you to customize the following items: •
Company name and address ,
•
Company logo(Place Picture)
•
Design title <br />
<br />
•<br />
<br />
Number of pages or sheets <Page Number>, <Page Count><br />
<br />
•<br />
<br />
Revision number <Rev><br />
<br />
•<br />
<br />
Date created<br />
<br />
•<br />
<br />
Date modified<Page Modify Date><br />
<br />
<Page Create Date><br />
<br />
The graphic below shows a title block and company logo before name and address property values are customized.<br />
<br />
OrCAD Capture libraries provide a number of title block symbols that you can use in schematics. However, if none of them meets your needs, you can create your own title block symbol.<br />
<br />
More Information The information in a title block is defined using properties. Some of these properties define your company name and address, while other properties store design related information. It is common to copy a title block symbol from a OrCAD Capture-supplied library, modify it, and save it to your company library. The OrCAD Capture-supplied title blocks are stored in the CAPSYM.OLB library. This library is located in your software installation hierarchy (for example, <install_dir> \tools\capture\library).<br />
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Reserved Title Block Properties The OrCAD Capture tool supports a set of reserved title block properties. When added to a title block symbol, these properties can reference information maintained in the OrCAD Capture design or data specified in the Title Block tab of the Design Template. Those that are required to match the Design Template have an ( * ) beside them. Only add to the Title Block those properties YOU need to match the YOUR Design Template requirements. The following table describes each of the reserved title block properties.<br />
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<br />
Property Name<br />
<br />
Description<br />
<br />
Cage Code *<br />
<br />
Government contract ID<br />
<br />
Design Create Date and Time<br />
<br />
Self explanatory.<br />
<br />
Design File name<br />
<br />
Path and file name of the design file.<br />
<br />
Design Modify Date and Time<br />
<br />
Self explanatory.<br />
<br />
Design Name<br />
<br />
Self explanatory.<br />
<br />
Doc *<br />
<br />
Document number.<br />
<br />
Name<br />
<br />
Name of the title block symbol.<br />
<br />
OrgAddr1 * OrgAddr2 * OrgAddr3 * OrgAddr4 *<br />
<br />
Represent the first line of your company address, through the fourth line of your address (if applicable).<br />
<br />
OrgName *<br />
<br />
Company name.<br />
<br />
Page Count<br />
<br />
Number of pages in the design.<br />
<br />
Page Create Date and Time<br />
<br />
Self explanatory.<br />
<br />
Page Modify Date and Time<br />
<br />
Self explanatory.<br />
<br />
Page Number<br />
<br />
Number of the schematic page. Determines the order in which it will be printed.<br />
<br />
Page Size<br />
<br />
Size of the schematic page.<br />
<br />
Path Name<br />
<br />
Path from the root design, through any hierarchical blocks, down to a specific part on a schematic page.<br />
<br />
RevCode *<br />
<br />
The revision.<br />
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Property Name<br />
<br />
Description<br />
<br />
Schematic Create Date and Time<br />
<br />
Self explanatory. A design may contain more than one schematic.<br />
<br />
Schematic Modify Date and Time<br />
<br />
Self explanatory.<br />
<br />
Schematic Page Count<br />
<br />
Number of pages in a given schematic.<br />
<br />
Schematic Page Number<br />
<br />
Order of the page within the schematic.<br />
<br />
Schematic Path<br />
<br />
Path from the root design, through any hierarchical blocks, down to a specific schematic page.<br />
<br />
Source Library<br />
<br />
Path and name of the library from which the title block was chosen.<br />
<br />
Symbol Library<br />
<br />
Name of the title block symbol in the Source library.<br />
<br />
Title *<br />
<br />
Title for the design.<br />
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Template Title Block Data to Design Title Block<br />
<br />
In OrCAD Capture, data values can automatically populate fields of the Title Block. However, to reference information in this way the property values in the title block symbol located in the design schematic must be left null.<br />
<br />
Title Block Placement Techniques There are two ways data content is entered into the title block. As illustrated in the following graphic, data is either automatically entered from the design template or manually entered into the title block symbol. Company logos are always manually entered into the title block symbol as a “bit-map” or .BMP file using the Place - Picture command.<br />
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Two Methods of Customizing Title Block Data<br />
<br />
Design Template<br />
<br />
Schematic<br />
<br />
Title Address<br />
<br />
Title Block Symbol<br />
<br />
Doc Number Library Pathname<br />
<br />
Title Address Doc Number<br />
<br />
Title Block Name<br />
<br />
Automatic customizing of specified title block data occurs when data is seeded from the design template.<br />
<br />
Design Template<br />
<br />
Schematic Title Block Symbol Title Address Doc Number<br />
<br />
Title Address Doc Number<br />
<br />
Manual customizing of the title block data occurs when data is entered into the title block symbol.<br />
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Lab 6-5:<br />
<br />
Creating Parts and Symbols<br />
<br />
Creating a Custom Title Block<br />
<br />
Lab Objectives After you complete this lab you will be able to: •<br />
<br />
Add reserved title block properties<br />
<br />
•<br />
<br />
Add a company logo to a title block<br />
<br />
•<br />
<br />
Specify default title block properties<br />
<br />
Adding Reserved Title Block Properties 1. From the Project Manager, Library folder, double click the item named TitleBlock0 in TRNG.OLB. The title block symbol appears. Notice that the symbol already contains properties for title, revision, document number, modify date, page number and page count.<br />
<br />
2. Select Options - Part Properties. 3. In the User Properties menu, click New. The New Property dialog box appears. 4. Add the reserved property OrgName, as shown below.<br />
<br />
You must enter this case sensitive property name exactly as shown in the training manual.<br />
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In order for this property to reference data in the design template, you must leave the Value field blank. 5. Click OK. 6. With the OrgName property highlighted, click the Display button in the User Properties dialog box. 7. Set the display for the OrgName property to Value Only, as shown in the example below.<br />
<br />
8. Click OK. 9. In the User Properties window, click New again. 10. Add the OrgAddr1 through OrgAddr4 properties or as many as will match your Design Template. Do not add properties you will not need.<br />
<br />
Note Normally, you would only add as many OrgAddr properties as you need for your company address. Be sure to leave the Value field blank. 11. Set the Display for all OrgAddr properties to Value Only. 12. When you are finished, click OK in the User Properties window. The newly added properties appear at the lower right of the title block symbol, similar to the example shown in the following graphic.<br />
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13. Enlarge the upper rectangle of the title block to accommodate these properties. Select and drag the properties into their proper locations within the title block, as shown in the example below.<br />
<br />
14. Select File - Save.<br />
<br />
Note For hierarchical designs, we recommend adding the Schematic Path property to title block symbols. This ensures that every page in the design displays a path showing its relative position in the hierarchy.<br />
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Adding a Company Logo The logo must be a graphics file saved as a bitmap (.BMP extension). 1. Select Place - Picture. 2. In the Place Picture window, navigate to the D:\Capture directory, select the EMA-DA logo.bmp file, and click Open. The logo attaches to the cursor. 3. Click to place the logo below the title block image. 4. Click on the logo image, and use the corner selection boxes to resize the logo and place within the title block image as shown below.<br />
<br />
5. File - Save and File - Close the title block symbol. 6. In the Project Manager window, click TRNG.OLB and select File Save. 7. Close the library.<br />
<br />
Specifying Default Title Block Content 1. In the main session window, select Options - Design Template. 2. In the Design Template window, click the Title Block tab. 3. Add the title block data as shown in the following example or add your own company name and address.<br />
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4. Click the browser button to the right of the Library Name field, and navigate to the D:\Capture directory. 5. Select the TRNG.OLB library file and click Open. 6. In the Title Block Name field, enter: TitleBlock0 7. Click OK.<br />
<br />
Testing the Title Block To test your title block symbol and the Design Template information you just specified, you must create a new design. 1. Select File - New - Design. 2. If prompted to select a directory location, navigate to the D:\Capture directory and click OK. 3. When the new schematic page opens, click the Zoom to all icon to see if your title block appears on the new page. It should resemble the following example.<br />
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4. Close the schematic window. 5. Select File - Close Project. If the Title Block did not appear on the open page, check the title block settings in the Design Template and make sure that the Library Name and path, and Title Block Name are correct. Make the necessary changes, and create another new design.<br />
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Library Correction Utility (Optional) The Library Correction Utility automatically verifies whether parts in a library have missing pin numbers or duplicate pin names, and corrects the missing pin numbers and duplicate pin names. This utility also converts components with lowercase pin names to uppercase and makes the Power pins visible for all the components in the library To run the Library Correction Utility, from the Accessories menu in OrCAD Capture, choose LibCorrectionUtil, then Library Verification/ Correction.<br />
<br />
Verification Vs. Correction If you select Verify, the utility verifies the parts in the library for missing pin numbers and/or duplicate pin names depending on your selection, and generates a log file. If you select Correct, the utility will correct the parts in the library that have missing pin numbers and/or duplicate pin names depending on your selection, and generates a log file.<br />
<br />
Missing Pin numbers check box When a user selects this check box, this Library Correction Utility will<br />
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scan through all the parts in the library and find out the components that have missing pin numbers. All the missing pin numbers get updated by their corresponding pin names. At the end of updating process this utility will pop up message: "Corrected <number of parts corrected> of Parts in <lib_path> <lib_name>.olb for missing pin numbers" or "No Part in this library has missing pin numbers". The log file is generated at the location where the selected library is residing. The naming convention used for log files is <Library_name>Miss.log. The log file lists all the parts and also the pin numbers for each of the corrected part in the library. If user chooses the Verify option, only the log file is generated but the library is not updated.<br />
<br />
“Duplicate Pin names” check box When a user selects this check box, the utility will scan through all the parts in the library and find out the components that have duplicate logical pin names. If a component has duplicate power pin names, those pins are not considered as duplicate pin names. To remove duplicate pin names, the library correction utility changes the duplicate pin names by appending "#" followed by the pin number to the duplicate pin names. The combination of the pin name and the pin number makes the pin name unique. Note that the first pin that this utility encounters does not get appended with # followed by its pin number. At the end of updating process this utility will pop up message: "Corrected <number of parts corrected> of Parts in <lib_path>/<lib_name>.olb for duplicate pin names" or "No Part in this library has duplicate pin names".<br />
<br />
“Change the Pin name and number to uppercase” check box When you check this option, the utility will scan through all the parts in the library and convert all the components that have pin names appearing in lowercase to uppercase. At the end of updating process this utility will pop up message: "Changed all the Pin name to upper case. Please close the library and reopen to see the change."<br />
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<br />
Creating Parts and Symbols<br />
<br />
“Make All Power Pins Visible” check When you check this option, the utility will scan through all the parts in the library and change the Power pins settings for all the non-zero length pins in the library to Visible. Additionally, you can also make all zero length Power pins in the library visible. To do this, check the Change Zero Length Pins to check box and choose an appropriate pin shape option (Line/Short) from the list box.<br />
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Creating Parts and Symbols<br />
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Lab 6-6:<br />
<br />
Lesson 6<br />
<br />
Validate Your Library (Optional Lab) After you complete this lab you will be able to: •<br />
<br />
Verify and correct missing pin numbers and duplicate pin names<br />
<br />
•<br />
<br />
Change all lower case pin names and numbers to upper case<br />
<br />
•<br />
<br />
Make all Power Pins visible<br />
<br />
Verify and Correct Missing Pin Numbers and Duplicate Pin Names 1. From OrCAD Capture File - Open - Library find and select the TRAINING-LIB.OLB in the D:\Capture directory. 2. Select Accessories - LibCorrectionUtil - Library Verification/ Correction as shown in the following graphics.<br />
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Lesson 6<br />
<br />
Creating Parts and Symbols<br />
<br />
3. The CON64 part has a problem with 3 of its pins. When the Library Correction Utility window opens use the following settings: a. Browse for the name of the library you wish to check. Here it will be the D:\Capture\TRAINING\LIB.OLB.<br />
<br />
•<br />
<br />
b. Select and check for: Missing Pin Numbers<br />
<br />
•<br />
<br />
Duplicate Pin Names<br />
<br />
•<br />
<br />
Change Pin Name and Numbers to Upper Case<br />
<br />
•<br />
<br />
Make All Power Pins Visible<br />
<br />
•<br />
<br />
Change Zero Length Pins to: Short<br />
<br />
4. Select OK to run the utility. 5. Several Messages will appear depending on the options you asked the utility to check for. The following are samples of the messages:<br />
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6. Select OK to continue.<br />
<br />
7. Select OK to continue.<br />
<br />
8. Select OK to continue.<br />
<br />
9. Select OK to continue. 10. The “log file” mentioned above can be found in the same directory as the library. Two of the files are: •<br />
<br />
<library name>MISS.log for the Parts with missing pins<br />
<br />
•<br />
<br />
<library name>DUP.log for the Parts with duplicate pins.<br />
<br />
11. You can view these files if you wish. For now, File - Close the library but do not save the changes. STOP<br />
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7 Lesson 7: Building and Processing a Hierarchical Design Lesson Objectives After you complete this lesson you will be able to: •<br />
<br />
Discuss the structure of a hierarchical design<br />
<br />
•<br />
<br />
Use special port symbols to connect a schematic and hierarchical block<br />
<br />
•<br />
<br />
Create a hierarchical block<br />
<br />
•<br />
<br />
Annotate a hierarchical design<br />
<br />
•<br />
<br />
Perform a Design Rule Check on a hierarchical design<br />
<br />
Hierarchical Design Top of Hierarchy Schematic A Root<br />
<br />
Schematic C<br />
<br />
Schematic B<br />
<br />
Schematic D<br />
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Block Symbol<br />
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Schematic E<br />
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Lesson 7<br />
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When you embed a schematic folder inside another schematic folder, you have created a hierarchical design. The process requires a block symbol, which represents a schematic or functional model. When the block symbol is used once in a schematic, the result is called a simple hierarchy (shown in the accompanying diagram). When the block symbol is used two or more times, the design is called a complex hierarchy.<br />
<br />
More Information The root schematic represents the top of the hierarchy, and is displayed in the Project Manager window with a slash on the folder icon. A hierarchical design has several advantages. Its block diagram structure clearly shows how the functional units interact, and each block can be reused in the same or future designs. When you edit a block, all instances of the replicated block are changed throughout the hierarchical design.<br />
<br />
Complex Hierarchical Designs<br />
<br />
Schematic A FUNC_B<br />
<br />
Schematic A<br />
<br />
FUNC_C (2)<br />
<br />
FUNC_B<br />
<br />
FUNC_C (1)<br />
<br />
FUNC_B Schematic<br />
<br />
FUNC_C (1)<br />
<br />
FUNC_C (2)<br />
<br />
FUNC_C Schematic<br />
<br />
FUNC_B Schematic<br />
<br />
FUNC_C (2) Schematic FUNC_C (1) Schematic<br />
<br />
In a complex hierarchical design, Capture automatically maintains multiple copies of the schematic in its database, one for each time it is referenced.<br />
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Building and Processing a Hierarchical Design<br />
<br />
Connectivity in Hierarchical Designs Root Schematic Hierarchical pin<br />
<br />
Func_X Block Func_Y Block A P<br />
<br />
P Z<br />
<br />
B Q<br />
<br />
Matching pin names establish connectivity<br />
<br />
Q<br />
<br />
C<br />
<br />
FUNC_X Schematic FUNC_Y Schematic<br />
<br />
A P<br />
<br />
P<br />
<br />
B<br />
<br />
Hierarchical port<br />
<br />
C<br />
<br />
Z Q<br />
<br />
Q<br />
<br />
In flat designs, all the schematic pages are at the same level. You establish inter-page connectivity by terminating nets with off-page connectors. By contrast, hierarchical designs have what might be called nested functionality embedded in schematic pages. Hierarchical block symbols on one schematic page reference more detailed design descriptions (other schematics or VHDL models).<br />
<br />
More Information The hierarchical pins on the block symbol, and the hierarchical ports in the schematic (or VHDL file) are used to establish connectivity between the schematic folders in a hierarchical design.<br />
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Hierarchical Pins and Port Types 5<br />
<br />
1 D0(Bidirectional) Q2(OpenCollector)<br />
<br />
JP2 2<br />
<br />
4 3 2 1<br />
<br />
JP1 6<br />
<br />
1 2 3 4<br />
<br />
Q3(OpenEmitter)<br />
<br />
A1(Input) 3<br />
<br />
7 15VP(Power)<br />
<br />
Q4(Output)<br />
<br />
Ref (Passive)<br />
<br />
DA7(3State)<br />
<br />
4<br />
<br />
8<br />
<br />
Q2 (OpenCollector)<br />
<br />
5<br />
<br />
Q3 (OpenEmitter)<br />
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6<br />
<br />
Q4 (Output)<br />
<br />
7<br />
<br />
DA7 (3State)<br />
<br />
8<br />
<br />
Q2(OpenCollector) 2<br />
<br />
3 Q1 2N22 22A 1<br />
<br />
R1 1K U1A<br />
<br />
1<br />
<br />
1<br />
<br />
D0(Bidirectiona l) D0 (Bidirectional)<br />
<br />
3 2 2<br />
<br />
3<br />
<br />
A1 (Input)<br />
<br />
3 Q2 2N2222A 1<br />
<br />
A1(Input)<br />
<br />
Q3(OpenEmitter) 1<br />
<br />
2<br />
<br />
74HCT00<br />
<br />
2<br />
<br />
74HCT125 U2A 3<br />
<br />
6<br />
<br />
5<br />
<br />
15VP (Power)<br />
<br />
15VP(Power)<br />
<br />
R2 10K<br />
<br />
DA7(3State)<br />
<br />
74HCT125 U2B<br />
<br />
Ref1(Passive) Ref (Passive)<br />
<br />
4<br />
<br />
4<br />
<br />
Q4(Output)<br />
<br />
R3 10K<br />
<br />
1<br />
<br />
There are eight types of hierarchical ports, each with its own corresponding hierarchical pin type (as shown in the accompanying illustration). To establish connectivity, a hierarchical pin must have a matching hierarchical port with the same Name and Type.<br />
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Building and Processing a Hierarchical Design<br />
<br />
Adding a Port Symbol<br />
<br />
In OrCAD Capture, there are eight port symbols to choose from. The symbol names relay information to the user about the direction in which the port is pointing (graphically), and the location of the pin (connection point). For example, PORTLEFT-R is a port symbol that points to the left, with a pin on the right. You may need to rotate port symbols before you place them.<br />
<br />
More Information You need to name the port to establish connectivity between the wire on the port, and the hierarchical pin on the block symbol. You can enter the name while placing the port, or change the name after you have placed it. When adding a port, you must specify the port type. The port type provides a logical description of the net it represents (for example, input, output, or bidirectional). Each of the eight symbols has a default type setting. You can select the port type while placing it, or change it after it has been added.<br />
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September, 2006<br />
<br />
Port symbols<br />
<br />
Default type<br />
<br />
PORTBOTH-L PORTBOTH-R<br />
<br />
Bidirectional<br />
<br />
PORTLEFT-L PORTLEFT-R<br />
<br />
Output<br />
<br />
PORTNO-L PORTNO-R<br />
<br />
Passive<br />
<br />
PORTRIGHT-L PORTRIGHT-R<br />
<br />
Input<br />
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Lesson 7<br />
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Hierarchical Design Methods Top - Down<br />
<br />
Bottom - Up IN_0 IN_1<br />
<br />
IN_0 IN_1<br />
<br />
OUT<br />
<br />
OUT<br />
<br />
1<br />
<br />
2<br />
<br />
Hierarchical ports automatically added to underlying schematic.<br />
<br />
Hierarchical pins automatically added to block symbol.<br />
<br />
1<br />
<br />
2 IN_0<br />
<br />
IN_0<br />
<br />
OUT<br />
<br />
OUT IN_1<br />
<br />
IN_1<br />
<br />
Some degree of automated design supports either a bottom-up or top-down design flow. If you create additional hierarchical ports in the schematic, or additional pins in a hierarchical block symbol, use the Synchronize Up or Synchronize Down command to re-link the data.<br />
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7-6<br />
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September, 2006<br />
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Lesson 7<br />
<br />
Lab 7-1:<br />
<br />
Building and Processing a Hierarchical Design<br />
<br />
Explore the Training Project (Part I)<br />
<br />
Lab Objectives After completing this lab you will be able to view schematics within the Training design and begin to understand how hierarchical designs flow. (Due to the length of this lesson on Hierarchical design, it will be broken down into 3 sections or parts.)<br />
<br />
Opening the Training Project 1. Select File - Open - Project. 2. Navigate to the D:\Capture\training directory and open the training.opj file. 3. In the Project Manager window, double click on .\training.dsn to expand the contents of the design file. Observe that the design contains three schematic folders (Training Root Schematic, Data Schematic, and HSRAM). 4. Observe the forward slash on the folder icon for the Training Root Schematic. The forward slash indicates the schematic is the ‘root’ or top level of the hierarchy. 5. Click the plus (+) signs next to each of the schematic folders to display their contents. Each of these folders contains a single schematic page, except the Training Root Schematic, which has two.<br />
<br />
Viewing the Training Root Schematic 1. In the Training Root Schematic folder, double click on Page2. 2. Enlarge the schematic window, and zoom to all. 3. In the schematic window, locate the hierarchical blocks named High Speed Memory and Data Schematic. You will now push through these block symbols to display their lower level schematics.<br />
<br />
Viewing the High-Speed Memory Schematic 1. In the schematic window, click on the High Speed Memory block symbol.<br />
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Lesson 7<br />
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2. Right-click and select Descend Hierarchy from the pop-up menu. A second schematic window opens to display the HSRAM schematic. This is the circuitry that the hierarchical block represents. 3. Close the High Speed Memory schematic window. The Training Root Schematic window should still be open.<br />
<br />
Viewing the Data Schematic 1. In the schematic window, click on the Data Schematic block symbol. 2. Right-click and select Descend Hierarchy. A second schematic window opens to display the Data Schematic. 3. Close the Data Schematic window. 4. Close the Training Root Schematic window also.<br />
<br />
Note In this lesson, you will work with the Training Root Schematic and Data Schematic only. STOP<br />
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7-8<br />
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End of Lab<br />
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Lesson 7<br />
<br />
Lab 7-2:<br />
<br />
Building and Processing a Hierarchical Design<br />
<br />
Editing the Training Root Schematic (This will be Part 1 of the Hierarchical Design Process)<br />
<br />
Lab Objectives After completing this lab you will be able to: •<br />
<br />
Add a ground pin to a connector<br />
<br />
•<br />
<br />
Add a bus and wiring<br />
<br />
•<br />
<br />
Place a hierarchical port symbol<br />
<br />
•<br />
<br />
Add an off-page connector<br />
<br />
•<br />
<br />
Place a capacitor<br />
<br />
Opening the Training Root Schematic 1. In the Training Root Schematic folder, double click on PAGE1. 2. Enlarge the schematic window, and zoom to fit.<br />
<br />
Adding GND to Connector J1 1. Locate the 64-pin connector (J1) along the left side of the page. Observe that pins 1, 2, 3, and 33 are not connected. 2. There are several GND symbols already on this page. Copy one of them, and place it slightly to the right, center of the J1 connector, as shown in the following graphic. .<br />
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3. Click the Place wire<br />
<br />
Lesson 7<br />
<br />
icon.<br />
<br />
4. Connect pins 1 and 33 to the GND symbol you placed in step 2. If necessary, use the <I>, <O>, and <C> keys to zoom and pan while adding the wire.<br />
<br />
5. Notice that when you connect a pin, the unconnected box at the end of the pin disappears. 6. Draw wires from pins 2 and 3 as shown in the graphic below. .<br />
<br />
When a connection between two wires is made, a junction dot appears at the intersection. 7. Press <Esc> twice. 8. Save the design.<br />
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7-10<br />
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September, 2006<br />
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Lesson 7<br />
<br />
Building and Processing a Hierarchical Design<br />
<br />
Adding the BA[0-7] Wires The Training Root Schematic, PAGE1 contains six FCT16245 parts as shown in the graphic below. Three of these parts are missing connections. In this lab you will be adding a BA[0-7] bus to the three parts identified by black arrows.<br />
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Building and Processing a Hierarchical Design<br />
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Lesson 7<br />
<br />
The graphic that follows shows the BA[0-7] bus you will be adding as you complete this lab. Your schematic should match this schematic after you complete this section of this lab.<br />
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Lesson 7<br />
<br />
Building and Processing a Hierarchical Design<br />
<br />
1. Starting with one of the FCT16245 parts, add a wire segment to pin 12. Then press <F4> to replicate the segment, as shown in the following graphic.<br />
<br />
2. Assign the net alias, BA0, to the bottom wire connected to pin 2. 3. Move the cursor up to the other wires and click each wire. The alias automatically increments from the starting number, BA0, to BA7, as shown in the next graphic. .<br />
<br />
4. Press <Esc> twice.<br />
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Lesson 7<br />
<br />
5. Place a bus entry on the BA7 wire. If necessary, use the <R> key to rotate it before placing (as shown in the next graphic).<br />
<br />
6. Press the <Esc> key once, then press the <F4> key seven times to replicate the bus entry on wires BA6 through BA0. 7. Press <Esc> to exit the command.<br />
<br />
8. Drag a rectangle around the new connections, right-click, and select Copy from the pop-up menu (or CTRL +C).<br />
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9. Press <Esc> to deselect, then right-click and select Paste (or CTRL +V). 10. Place copies of these connections on the other two FCT16245 parts.<br />
<br />
Caution If you have Options - Preferences - Select - Intersecting enabled, be sure the rectangle does not touch any pins on the part, or they will be selected also. (The Fully Enclosed selection option maybe useful in these kinds of situations.) 11. Save the design.<br />
<br />
Adding the BA[0-7] Bus 1. Click the Place bus icon<br />
<br />
.<br />
<br />
2. Press and hold the <Shift> key and draw the bus wire, as shown in the example at the beginning of this lab. Holding the <Shift> key lets you draw diagonal segments. 3. Add the net alias BA[0-7] to the bus wire.<br />
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Lesson 7<br />
<br />
Placing a Hierarchical Port Symbol 1. Click the Place port icon<br />
<br />
.<br />
<br />
The Place Hierarchical Port window appears. 2. In the Libraries list, click on CAPSYM. 3. From the Symbol list, select PORTRIGHT-L. 4. In the Name field, enter BA[0-7] and click OK. DO NOT place it yet. .<br />
<br />
5. Right-click and select Edit Properties from the pop-up menu. The Edit Hierarchical Port window appears. .<br />
<br />
6. Set the Type field to Output and click OK. 7. Attach the port symbol to the end of the bus wire. 8. Press <Esc> to exit the command, and <Esc> again to deselect the port. 9. Save the design. 7-16<br />
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Building and Processing a Hierarchical Design<br />
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Note You can also place the generic port symbol and edit the name and port type at a later time. Both ways are correct.<br />
<br />
Adding Off-Page Connectors 1. Locate the 20L10 part in the upper right corner of the page. 2. Use this example and the following steps to add the Off-page Connectors shown below.<br />
<br />
3. Choose the Place off-page connector icon<br />
<br />
.<br />
<br />
4. In the Place Off-Page Connector window, select OFFPAGELEFT-R from the CAPSYM library. 5. In the Name field, enter: HS/<br />
<br />
6. Click OK. The connector is pointing left. 7. Press <R> twice to rotate it to point right.<br />
<br />
Note Do Not use the “ / “ in net names if you are using Allegro PCB Editor for board design.<br />
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Lesson 7<br />
<br />
.<br />
<br />
8. Place the symbol near the pin 19 of the 20L10 part. Remember to leave at least one grid space to add a wire to the symbol.<br />
<br />
Note If you place the symbol directly on the pin, a connection is automatically created between the pin and the off-page connector. However, if you intend to place properties on the net you must have a wire segment. Properties are placed on Parts and Wires. If you move the off-page connector, a wire will appear connecting it to the pin. 9. Repeat this operation to place five more Off-page Connectors. After placing each connector, press <Ctrl+E> and use the Edit OffPage Connector window to specify the name of the next connector to be placed. Use the names listed within the graphic of step 2. 10. Where necessary, place a wire segment between the Off-page Connectors and the pins of the part. 11. Save the design.<br />
<br />
Placing Capacitors 1. Zoom into the area shown below. .<br />
<br />
2. Click the Place part icon<br />
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Building and Processing a Hierarchical Design<br />
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3. In the Libraries list, click on DISCRETE, select CAP NP from the Part List, and click OK. DO NOT place the part yet. 4. Right-click and select Edit Properties. a. In the Value field, enter: 0.1UF<br />
<br />
b. In the PCB Footprint field, enter: SM_1206<br />
<br />
5. Click OK. 6. Place four capacitors, as shown in the following graphic.<br />
<br />
7. Press <Esc> twice. 8. Add wires, as shown in the example above. 9. Copy existing VCC and GND symbols and complete the circuit. 10. Save the design. STOP<br />
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September, 2006<br />
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End of Lab<br />
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Lesson 7<br />
<br />
Making Power Pins Visible Reasons for Over-riding Pin Connections When a part is built in the library, its power pins can be defined to be invisible (default) or visible when used in a design. A power pin that is visible in the design must be explicitly wired to the appropriate voltage net. However, an invisible power pin is connected implicitly to a power net having the same name as the pin. (No explicit wire connection is needed in the design.) In some designs, it is necessary to override the implicit voltages defined within the invisible power pins on a device. For example, you may want the power pin to connect to “+5v” or “-12v”. To override the voltage of an implicit (invisible) power pin, you can make the pin visible. Reasons for overriding implicit power pin connections with explicit connections in the design include:<br />
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7-20<br />
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•<br />
<br />
The design might not have a default power bus, so you must connect the pins to explicit power nets.<br />
<br />
•<br />
<br />
You might want to connect power pins to a power bus or net other than the default power bus for such purposes as noise isolation, power distribution, and so on.<br />
<br />
•<br />
<br />
The default pin name may differ from the system’s power and ground net names.<br />
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Lab 7-3:<br />
<br />
Building and Processing a Hierarchical Design<br />
<br />
Making Power Pins Visible<br />
<br />
Lab Objectives After completing this lab you will be able to edit the visibility attribute of power pins. 1. In the upper right corner of the page, double click on the 20L10 part. The Property Editor appears. 2. Locate the Power Pins Visible property. 3. Click the Power Pins Visible checkbox, as shown in the graphic that follows.<br />
<br />
4. Close the Property Editor window. 5. Press <Esc>, and zoom in to view the part. The power pins on the 20L10 part are now visible (top and bottom). 6. Copy a VCC symbol and connect it to pin 24 (at the top of the 20L10 part). 7. Copy a GND symbol and connect it to pin 12.<br />
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Lesson 7<br />
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Important The Secondary or “yellow” column shown in the Property Editor at this time will be explained later in the lesson. (For your reference you could view page 7-32).<br />
<br />
Saving the Design 1. Select File - Save to save the schematic page. 2. Select File - Close to close the schematic window. STOP<br />
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Building and Processing a Hierarchical Design<br />
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Copying Schematics Between Projects (PartII)<br />
<br />
You can copy and paste between Project Manager windows. This lets you view two schematics from different projects, and copy portions of a schematic page, whole pages, or entire schematic folders between projects.<br />
<br />
Note Once a hierarchical block has been created, it can be reused in other projects. (“Design Reuse” was introduced in version 10 of OrCAD Capture for both OrCAD Layout, OrCAD PCB Designer and Cadence Allegro PCB Editor.)<br />
<br />
More Information You can use the Place Hierarchical Block command to specify what type of data the block symbol represents (for example, schematic view, VHDL, or PSpice model). This is done using the Implementation Type field. The Implementation name field contains the name of the schematic folder the block symbol represents.<br />
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Instead of copying a schematic folder into the current project, you can use the Path and filename field to link the block symbol to the design file that contains the schematic folder it represents. If the schematic folder is part of the current project, this field is left blank.<br />
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<br />
Lab 7-4:<br />
<br />
Building and Processing a Hierarchical Design<br />
<br />
Adding the DAAMP Circuit Schematic (This will be Part 2 of the Hierarchical Process)<br />
<br />
Lab Objectives After completing this lab you will be able to incorporate part of another design or other schematic pages into your current project.<br />
<br />
Copying Between Projects 1. Select File - Open - Project. 2. Navigate to the D:\Capture\Release directory, and open the Release.opj file. The Release.opj project window opens. 3. Arrange the two Project Manager windows next to each other. 4. Double click on the .\release.dsn file to expand its contents. Observe that the list of schematic folders in this design includes a schematic folder labled “DAAMP Circuit”. 5. Click on the DAAMP Circuit folder to highlight it. a. Select Edit - Copy. b. Click on the .\training.dsn file in the other Project Manager window. c. Select Edit - Paste. d. Save the Training design. 6. Close the Release.opj Project Manager window. (Do not save it.)<br />
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Viewing the Copied Schematic 1. Double click on DAAMP Circuit folder. 2. Double click PAGE1. 3. Resize the schematic window and zoom to all. Observe that this schematic contains hierarchical port symbols. These ported signals will tie to the pins of a hierarchical block in another schematic. 4. Close the schematic window.<br />
<br />
Placing a Hierarchical Block 1. Double click on Data Schematic to expand the folder contents. 2. Double click PAGE1. 3. Resize the schematic window and zoom to all. 4. Click the Place hierarchical block icon<br />
<br />
.<br />
<br />
The Place Hierarchical Block window opens. Use this window to define the schematic that the hierarchical block represents. 5. In the Reference field, enter: DAAMP1<br />
<br />
6. Toggle the Implementation Type field to Schematic View. 7. In the Implementation name field, enter: DAAMP Circuit<br />
<br />
Note Since the DAAMP Circuit was copied into the Training project, you can leave the Path and filename field blank. This is refered to as an internal reference. If the DAAMP Circuit was not copied into the Training project, you would use the Path and filename field to specify the location of the release.dsn file. This is refered to as an external reference.<br />
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8. Click OK. You are now ready to draw the rectangle for a hierarchical block. 9. To the right of one of the 74ACT574 parts, press and hold the left mouse button, and drag a rectangle for the hierarchical block. The block automatically contains a hierarchical pin for each of the ported signals in the DAAMP Circuit schematic. 10. Press <Esc> to deselect the hierarchical block.<br />
<br />
Note This method is called “bottom-up”. Refer to Appendix E for an alternate method of creating a hierarchical block using a “topdown” method.<br />
<br />
Editing the Hierarchical Block 1. Zoom in to see the block symbol. 2. To change the size of the rectangle, click on the DAAMP1 symbol and drag one of the corners to a new location. 3. Press <Esc> to deselect.<br />
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4. To move a pin, place your cursor on the pin, press and hold the left mouse button, and drag it to a new location along the edge of the rectangle. 5. Arrange the pins, as shown in the following graphic.<br />
<br />
Copying the DAAMP Block 1. Click on the DAAMP1 symbol, right-click and select Copy. 2. Press <Esc> to deselect, then right-click and select Paste. A copy of the block symbol attaches to your cursor. 3. Click to place the copy to the right of the other 74ACT574 part, as shown in the following graphic.<br />
<br />
4. Press <Esc> to deselect.<br />
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Lesson 7<br />
<br />
Building and Processing a Hierarchical Design<br />
<br />
Observe how the pins on the 74ACT574 line up with the pins on the hierarchical block.<br />
<br />
Note To avoid two occurrences of the DAAMP1 hierarchical blocks, OrCAD Capture automatically names the second hierarchical block DAAMP2 when the Automatically reference placed parts option is checked in the Options - Preferences - Miscellaneous window. Make sure this is NOT selected for this exercise.<br />
<br />
Connecting the DAAMP Blocks<br />
<br />
Synchronize the DAMMP schematic<br />
<br />
1. From the Project Manager window, open PAGE2 of the Training Root Schematic. 2. Select the DATA block symbol located in the bottom center portion of the page. 3. As the DATA block symbol is highlighted, select Synchronize Down from the right mouse popup menu. The lower level schematic opens. The new ports OUTA and OUTB are located on the right hand side of the page. 4. Move the ports near the DAAMP1 and DAAMP2 block symbols as shown in the following graphic.<br />
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5. Add connections from the DAAMP1 and DAAMP2 blocks to each of the 74ACT574 parts.<br />
<br />
Note A quick way to do this is to move a block symbol so that its pins touch the pins of a 74ACT574. (This creates a connection between the overlapping pins.) Then move the block symbol back and observe that wires are automatically added between the two parts.<br />
<br />
Finish the DAAMP Schematic A portion of Data Schematic PAGE1 is shown below. Use this example as a guide to help you follow lab instructions and complete the schematic.<br />
<br />
1. Add wires to hierarchical ports OUTA and OUTB of both blocks. 2. Add wires from the GAIN input port to the GAIN pin of DAAMP1 and DAAMP2 as shown in the graphic at the beginning of this lab section.<br />
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3. Connect one VCLK pin on DAAMP1to the VCLKA and one VCLK pin from DAAMP2 to VCLKC hierarchical port. 4. Place a RESISTOR from the DISCRETE library near the lower right corner of DAAMP2. a. Set its Value to 10K and its PCB Footprint to SM_1206. b. If you remember how to use the property filters in the Property Editor, change to the OrCAD-Layout filter. Find the Property COMPSIDE and enter a value of BOTTOM. c. Connect one end of the resistor to the VREF pins on both blocks. 5. Copy a GND symbol and connect it to the other end of the resistor. 6. Save the design and close the design file. STOP<br />
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End of Lab<br />
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Lesson 7<br />
<br />
Instances versus Occurrences (Part III)<br />
<br />
Training Project Data Schematic DAAMP1 Block<br />
<br />
DAAMP2 Block<br />
<br />
DAAMP Schematic<br />
<br />
An instance is a part that appears once in a design. An instance of a part is found in a flat or simple hierarchical design. An occurrence applies to complex hierarchical designs only. When a block symbol occurs more than once in a hierarchical design, the schematic it represents also occurs multiple times. (Each instance in the schematic occurs multiple times, one “occurrence” in each block.)<br />
<br />
More Information In the accompanying illustration, the DAAMP Circuit occurs twice, referenced by two hierarchical blocks in the Data Schematic. When you edit a part in the DAAMP Circuit, the Property Editor shows the instance properties in white, and the properties on each occurrence in yellow. When processing a hierarchical design, each occurrence of a part must be processed. For example, the Annotate program must assign a part reference to each occurrence in a duplicated block. Occurrence mode is required to properly annotate your design, run Design Rules Check, cross reference your parts, and create a Bill of Materials. In a complex hierarchical design, the Property Editor will show different Part Reference property values for each occurrence.<br />
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Building and Processing a Hierarchical Design<br />
<br />
Note OrCAD Capture is currently unable to add inter-sheet references for complex hierarchical designs.<br />
<br />
Checking Hierarchical Ports<br />
<br />
Use Design Rules Check to flag any hierarchical port naming or direction errors. You can request a list of all port names used in the design. Whenever a net name override occurs, the losing net is listed as an alternate. Always check the list of alternate net names in the DRC report.<br />
<br />
More Information Within each schematic folder, hierarchical ports take precedence over all other types of connections in the schematic. From highest to lowest, the precedence levels are listed in the table that follows.<br />
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Design Object...<br />
<br />
Takes precedence over...<br />
<br />
Hierarchical port<br />
<br />
All other types of connections.<br />
<br />
Off-page connector<br />
<br />
A net alias or a voltage symbol.<br />
<br />
PWR/GND symbol<br />
<br />
A net alias. When multiple voltage symbols are wired together, the lowest net (alphanumeric ally) takes precedence.<br />
<br />
Net alias<br />
<br />
An unlabeled wire. When multiple net aliases are wired together, the lowest net (alphanumeric ally) takes precedence. Will inherit its name from an off-page connector.<br />
<br />
Unlabeled wire<br />
<br />
The lowest level of connectivity is an unlabeled wire. The system generates a default net name.<br />
<br />
When you create a netlist for PCB design, the hierarchy is flattened. This means that the highest level of connectivity, at the highest level in the hierarchy, takes precedence in the netlist. A net alias on a wire at the top (or root) of the hierarchy will override the port symbol name in the lower level schematic. (The net name from the root schematic is passed down into the schematic below.)<br />
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<br />
Lab 7-5:<br />
<br />
Building and Processing a Hierarchical Design<br />
<br />
Annotating the Design (This will be Part 3 of the Hierarchical Process)<br />
<br />
Lab Objectives After completing this lab you will be able to: •<br />
<br />
Annotate all schematic folders<br />
<br />
•<br />
<br />
View part references as an instance (flat design) and occurrence (hierarchical design)<br />
<br />
Annotating Schematic Folders 1. In the Project Manager window, click on .\training.dsn and select Tools - Annotate. 2. In the Scope section, make sure the Update Entire Design option is selected. This means that all schematic folders in the Project Manager window will be annotated. 3. In the Action section, be sure Incremental Reference Update is selected. This option only assigns part references to parts that do not already have part references assigned. The J1, J2, and J3 connectors are already annotated, and we do not want to change their assignments. 4. In the Mode section, the Update Occurrences option should be selected by default. If not, select it now. 5. Click OK to annotate the design, and OK to continue. The design is annotated and saved to disk. When annotating a hierarchical design, OrCAD Capture annotates first in the root schematic folder, then in other schematic folders connected hierarchically to the root folder.<br />
<br />
Viewing Part References as an Instance and Occurrence 1. Open PAGE1 of the Data Schematic. Observe that all the parts in this page now have part references assigned. a. Select the DAAMP1 block symbol, right-click, and select Descend Hierarchy (or press <SHIFT+D>).<br />
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The underlying schematic is displayed. Observe some of the part references assigned to the parts in this schematic. b. Right-click and select Ascend Hierarchy. c. Now descend into the DAAMP2 block. You now have schematics for both DAAMP blocks open. 2. Use the Window pull-down menu to toggle between the two occurrences of the DAAMP Circuit schematics. They are the same schematic, but with different part reference assignments. Because there are two DAAMP block symbols in the design, the parts in each of those DAAMP Circuit schematics occur more than once in the hierarchical design. This is known as complex hierarchy, and is the reason OrCAD Capture differentiates between “instances” and “occurrences”. 3. Close all three schematic windows. 4. In the Project Manager window, double click PAGE1 of the schematic page in the DAAMP Circuit folder. 5. Observe that you are prompted for a specific occurrence of he schematic page (DAAMP1 or DAAMP2) as shown in the graphic that follows.<br />
<br />
6. Select the Data Schematic/DAAMP1 entry and click OK. The schematic associated with the DAAMP1 block symbol is displayed. 7. Close the schematic window. 8. In the Project Manager window, click on .\training.dsn and save the design. STOP<br />
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<br />
Lab 7-6:<br />
<br />
Building and Processing a Hierarchical Design<br />
<br />
Running Design Rules Check<br />
<br />
Lab Objectives After completing this lab you will be able to check a hierarchical design for design rule violations.<br />
<br />
Selecting Settings Within the Design Rules Check Dialog Box 1. Highlight .\training.dsn in the Project Manager window. 2. Select Tools - Design Rules Check. 3. In the Design Rules Check window, enter the settings shown in the following picture.<br />
<br />
4. Make sure you have D:\Capture\training\training.drc listed below View Output. If not, type it in or use the Browse button to add that directory. Click OK. The DRC report is displayed.<br />
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Reviewing the DRC Report This report contains five different sections, one for each of the schematic folders in the design. These five sections are: •<br />
<br />
Training Root Schematic<br />
<br />
•<br />
<br />
HSRAM<br />
<br />
•<br />
<br />
Data Schematic<br />
<br />
•<br />
<br />
DAAMP1 Circuit<br />
<br />
Take note of the sections within the report that contain warnings. OrCAD Capture generates DRC markers on the schematic pages where errors are occurring. 1. Close the DRC report window. In the Project Manager window, observe that the .\training.drc file was added to the Outputs folder. STOP<br />
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Lesson 7<br />
<br />
Lab 7-7:<br />
<br />
Building and Processing a Hierarchical Design<br />
<br />
Correcting Your Design<br />
<br />
Lab Objectives After you complete this lab you will be able to: •<br />
<br />
Identify DRC error markers<br />
<br />
•<br />
<br />
View and identify errors in the schematic<br />
<br />
•<br />
<br />
Fix the errors within the schematic<br />
<br />
Browsing for DRC Error Markers 1. Click on Training Root Schematic in the Project Manager window. 2. Select Edit - Browse - DRC Markers. The DRC errors for the Training Root Schematic appear in a Browse DRC Markers window. 3. Place your cursor between the column headings, and drag the mouse to increase the column width. The data in each column is now clearly visible.<br />
<br />
Observe that the data is sorted by the DRC error column (all the common error messages are grouped together). 4. Click on the Page column heading to sort the error messages by page number. 5. Click on the DRC Detail column heading to sort the error messages by design object. Observe that the net names involved in the error messages are almost the same (except for the forward slash). In an earlier lab you added offpage connectors to page one of the Training Root Schematic. Per the lab instructions, you named these off-page connectors BRD/, BWR/, FPGA/, and HS/.<br />
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<br />
Viewing the Errors in the Schematic 1. Double click an error message containing the BRD/ net name. (You must double click in the DRC Error column.) Page one of the Training Root Schematic opens, and the error you selected is highlighted. 2. Zoom into the area containing the DRC error markers as shown below.<br />
<br />
Another way to get information about an error message is to open the page and double click on an error marker.<br />
<br />
Fixing the Training Root Schematic 1. Click on the BRD/ text to the right of the off-page connector, rightclick, and select Edit Properties (you can also double click). 2. Remove the forward slash character from the off-page connector name and click OK. 3. Do the same thing for the HS/, FPGA/, BWR/ connector names. 4. Save the design. 5. Close the schematic page, and click No at the prompt to close the open window.<br />
<br />
Saving the Design 1. In the Project Manager window, click on .\training.dsn and select File - Save. 2. Click on the design file again, and select Tools - Design Rules Check and click OK. The report should be free of the error messages you just corrected. 3. Close the DRC report window.<br />
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STOP<br />
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September, 2006<br />
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End of Lab<br />
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8 Lesson 8: Preparing the Schematic for OrCAD Layout (This exercise is to be used when setting up the design for OrCAD Layout.)<br />
<br />
Lesson Objectives After you complete this lesson, you will be able to: •<br />
<br />
Understand the properties for OrCAD Layout<br />
<br />
•<br />
<br />
Add OrCAD Layout part placement properties<br />
<br />
•<br />
<br />
Create a netlist for OrCAD Layout<br />
<br />
Grouping Parts for PCB Design Orcad Layout<br />
<br />
Training Root Schematic J1 Group 2 Group 1<br />
<br />
Group 5 pg 1<br />
<br />
pg 2 Group 1<br />
<br />
HSRAM<br />
<br />
Data Schematic Group 2<br />
<br />
Group 6 Group 5<br />
<br />
J2 Group 3 J3 Group 6<br />
<br />
DAAMP Circuit DAAMP1 DAAMP2<br />
<br />
Group 4<br />
<br />
L? 1<br />
<br />
VR EF<br />
<br />
2<br />
<br />
COMPGROUP=3<br />
<br />
50 VCC<br />
<br />
L? 1<br />
<br />
1<br />
<br />
L? 1<br />
<br />
2 50<br />
<br />
2<br />
<br />
C? .1UF<br />
<br />
V+12<br />
<br />
COMPGROUP=4<br />
<br />
1<br />
<br />
2 GAIN<br />
<br />
DG419A<br />
<br />
4<br />
<br />
U?<br />
<br />
VA+<br />
<br />
1<br />
<br />
D G419A<br />
<br />
3<br />
<br />
+<br />
<br />
2<br />
<br />
-<br />
<br />
6<br />
<br />
OUT<br />
<br />
TLE2037A 4<br />
<br />
OUT<br />
<br />
1<br />
<br />
5<br />
<br />
7<br />
<br />
1<br />
<br />
SEL<br />
<br />
6<br />
<br />
INA INB<br />
<br />
VA-<br />
<br />
2<br />
<br />
2<br />
<br />
C? .1UF 2<br />
<br />
7<br />
<br />
2<br />
<br />
U? 8<br />
<br />
VL<br />
<br />
100<br />
<br />
AGND<br />
<br />
1<br />
<br />
100<br />
<br />
3<br />
<br />
AOU T<br />
<br />
6<br />
<br />
OUT<br />
<br />
TLE2037A<br />
<br />
-<br />
<br />
1<br />
<br />
VA-<br />
<br />
OUT<br />
<br />
+<br />
<br />
+<br />
<br />
.1UF<br />
<br />
TLC5602A<br />
<br />
6<br />
<br />
7<br />
<br />
1<br />
<br />
4 VA+<br />
<br />
V12N<br />
<br />
C? .1UF 2<br />
<br />
5 VL<br />
<br />
INB<br />
<br />
U? 3<br />
<br />
7<br />
<br />
6<br />
<br />
INA<br />
<br />
SEL<br />
<br />
2<br />
<br />
2<br />
<br />
U? 8<br />
<br />
AGND<br />
<br />
R? 100<br />
<br />
3<br />
<br />
1<br />
<br />
R? 100<br />
<br />
2<br />
<br />
TLC5602A AOUT<br />
<br />
+<br />
<br />
.1UF<br />
<br />
6<br />
<br />
D7 D6 D5 D4 D3 D2 D1 D0<br />
<br />
C?<br />
<br />
2<br />
<br />
CLK<br />
<br />
2 9 5 8 4<br />
<br />
1<br />
<br />
2<br />
<br />
12 13 14 15 16 17 18 19<br />
<br />
C?<br />
<br />
R?<br />
<br />
1 20 3 7 10<br />
<br />
D7 D6 D5 D4 D3 D2 D1 D0<br />
<br />
11<br />
<br />
VD1 VD2 VA1 VA2 REF<br />
<br />
U? VCLK<br />
<br />
4<br />
<br />
1<br />
<br />
Group 4<br />
<br />
DGN NC1 CMP NC2 AGN<br />
<br />
Group 3<br />
<br />
CLK<br />
<br />
12 13 D7 V+1 14 2 D6 15 D5 D4 16 17 D3 18 D2 D1 19 D0<br />
<br />
D7 D6 D5 D4 D3 D2 D1 D0<br />
<br />
VD1 VD2 VA1 VA2 REF<br />
<br />
11<br />
<br />
VCLK<br />
<br />
D GN NC1 CMP NC2 AGN<br />
<br />
U?<br />
<br />
2<br />
<br />
50<br />
<br />
R?<br />
<br />
1 20 3 7 10<br />
<br />
L? 1<br />
<br />
C? .1UF<br />
<br />
2 9 5 8 4<br />
<br />
VCC<br />
<br />
2<br />
<br />
50<br />
<br />
1<br />
<br />
2<br />
<br />
VR EF<br />
<br />
GAIN<br />
<br />
V12N<br />
<br />
138<br />
<br />
In Capture, the COMPGROUP part property is used to define parts to a specified group. For example, if you attach a COMPGROUP property with a value of 4 to all the parts in the DAAMP1 schematic, you can quickly move all parts with that value as an entire block when the design is loaded into OrCAD Layout.<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
8-1<br />
<br />
Preparing the Schematic for OrCAD Layout<br />
<br />
Lesson 8<br />
<br />
Part Properties for OrCAD Layout The table that follows lists and describes part properties you can define in OrCAD Capture for use in OrCAD Layout. If any of these properties are Part Property<br />
<br />
Description<br />
<br />
FPLIST<br />
<br />
Comma-separated list of alternate footprints.<br />
<br />
COMPROT<br />
<br />
Footprint rotation (degrees and minutes).<br />
<br />
COMPLOC<br />
<br />
Component X and Y coordinates on PCB.<br />
<br />
COMPGROUP<br />
<br />
Assigns a component to a group for placement.<br />
<br />
COMPFIXED<br />
<br />
Component is permanently fixed on the board (YES).<br />
<br />
COMPLOCKED<br />
<br />
Component is temporarily fixed on the board (YES).<br />
<br />
COMPSIDE<br />
<br />
Side of board component is placed (TOP, BOTTOM).<br />
<br />
set or modified in OrCAD Layout they are back-annotated to your schematic. To associate any of the above properties to a part, first select one or more parts, open the Property Editor, set then Filter by field to OrCAD-Layout, and the define or modify property values as desired.<br />
<br />
8-2<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 8<br />
<br />
Preparing the Schematic for OrCAD Layout<br />
<br />
Net Properties for OrCAD Layout The table that follows lists and describes net properties you can define in OrCAD Capture for use in OrCAD Layout. If any of these properties are Net Property<br />
<br />
Description<br />
<br />
ROUTELAYERS<br />
<br />
Assigns a net to a layer (comma delimited).<br />
<br />
PLANELAYERS<br />
<br />
Assigns a net to a plane (comma delimited).<br />
<br />
NETWEIGHT<br />
<br />
Assigns the priority for routing (1-100, default = 50). (This property should be set in OrCAD Layout.)<br />
<br />
VIAPERNET<br />
<br />
Via types allowed for a given net.<br />
<br />
WIDTH<br />
<br />
The routing width for a net (default set in .tch file).<br />
<br />
WIDTHBYLAYER<br />
<br />
Net width assigned to a layer (TOP=8, LAYERX=6, BOT=8).<br />
<br />
SPACINGBYLAYER<br />
<br />
Net spacing per layer (TOP=7)<br />
<br />
RECONNTYPE<br />
<br />
Establishes the type of route (i.e. ECL). (This property should be set in OrCAD Layout.)<br />
<br />
CONNWIDTH<br />
<br />
Default width when min/max set.<br />
<br />
MINWIDTH<br />
<br />
Define minimum net width.<br />
<br />
MAXWIDTH<br />
<br />
Defines maximum net width.<br />
<br />
TESTPOINT<br />
<br />
Test point to be assigned (YES).<br />
<br />
set or modified in OrCAD Layout they are back-annotated to your schematic. To associate any of the net properties listed in the table above to a net, select one or more nets, and in the Property Editor, set the Filter By field to OrCAD-Layout.<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
8-3<br />
<br />
Preparing the Schematic for OrCAD Layout<br />
<br />
Lesson 8<br />
<br />
Backannotation to the Schematic<br />
<br />
OrCAD Capture lets you backannotate schematics with design changes made in OrCAD Layout, OrCAD PCB Designer or Cadence Allegro PCB Editor. Thes tools create a .SWP (or SWAP file) that is used by OrCAD Capture to update the schematic design. The Back Annotate command lets you: •<br />
<br />
Change part references<br />
<br />
•<br />
<br />
Change net properties<br />
<br />
•<br />
<br />
Change footprint patterns<br />
<br />
•<br />
<br />
Swap gates<br />
<br />
•<br />
<br />
Swap pins<br />
<br />
Note More Information OrCAD Capture defines back annotations using a simple file format called a swap (.SWP) file format. Net changes should NEVER be made in the board layout tool, i.e. OrCAD Layout or Cadence Allegro PCB Editor. Backannotations are subject to the following conditions:<br />
<br />
8-4<br />
<br />
•<br />
<br />
Pin swaps are limited to pins of the same type and shape and MUST have been defined in the OrCAD Capture parts.<br />
<br />
•<br />
<br />
Part reference changes specified in the swap file must specify both the old and new values.<br />
<br />
•<br />
<br />
Part and Net property settings or changes.<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 8<br />
<br />
Lab 8-1:<br />
<br />
Preparing the Schematic for OrCAD Layout<br />
<br />
Grouping Parts for Placement<br />
<br />
Lab Objectives After you complete this lab you will be able to: •<br />
<br />
Use the OrCAD Layout filter<br />
<br />
•<br />
<br />
Add a part property to a group of components<br />
<br />
•<br />
<br />
View the occurrence properties<br />
<br />
Adding COMPGROUP to the DAAMP1 Block 1. In the Project Manager window, click the DAAMP Circuit folder. 2. From the right-mouse-button pop-up menu, select Edit Object Properties. The Property Editor opens and displays all the parts present in the folder. 3. If necessary, place the cursor in the left, top “box” of the window and from the pop-up menu select Pivot. The Property Editor window should look like the following picture. 4. Change the Property Filter to OrCAD-Layout.<br />
<br />
Notice that the Property Editor will display all the parts on both the DAAMP1 and DAAMP2 pages in pairs.<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
8-5<br />
<br />
Preparing the Schematic for OrCAD Layout<br />
<br />
Lesson 8<br />
<br />
5. Look for the COMPGROUP column. Using the <CTRL+LMB> method, select the first cell of each pair in that column. These will be the parts on the DAAMP1 page.<br />
<br />
6. Leave your cursor in the last box selected and with the pop-up menu, selct Edit and enter the number 3 for these parts. Click on the OK to apply.<br />
<br />
7. View the COMPGROUP property column to verify column content. All cells in the previously selected COMPGROUP column should be assigned to the value 3. 8. Using the same method, select the DAAMP2 cells of the pairs and assign the value 4 for the COMPGROUP column. The cell pairs should look like the following figure.<br />
<br />
8-6<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 8<br />
<br />
Preparing the Schematic for OrCAD Layout<br />
<br />
9. Close the Property Editor window to apply the edits.<br />
<br />
Viewing the Occurrence Properties 1. To verify the changes, double click PAGE1 in the DAAMP Circuit schematic folder. The Select Occurrence window appears. 2. Highlight the DAAMP1 schematic and click OK to open. 3. Resize the schematic window, and zoom to fit. 4. Select Edit - Find, and OK to select all parts on the page. All the parts in the DAAMP1 schematic are selected. 5. Right-click and select Edit Properties from the pop-up menu.<br />
<br />
Instance property values appear in the white column, and occurrence property values appear in the two yellow columns (one column for DAAMP1, and another column for DAAMP2).<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
8-7<br />
<br />
Preparing the Schematic for OrCAD Layout<br />
<br />
Lesson 8<br />
<br />
6. Locate the COMPGROUP property and observe the different values in the DAAMP1 and DAAMP2 columns. 7. Close the Property Editor and close the schematic page. 8. Save the design.<br />
<br />
Using the Entity Filter 1. Open PAGE1 of the Training Root Schematic. 2. Draw a box around the 4 capacitors you previously added to the page to select the four capacitors at the bottom of the page. 3. Right-click and select Edit Properties. 4. At the bottom of the Property Editor window, select the entity filter for Parts. 5. At the top of the Property Editor window, set the Filter by field to OrCAD-Layout. 6. If necessary, pivot the property list so it appears in the left column of the window. 7. Click on the COMPGROUP property name, right-click, and select Edit from the pop-up menu. .<br />
<br />
8. In the Edit Property Values window, enter a COMPGROUP property value of 1 and click OK.<br />
<br />
8-8<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 8<br />
<br />
Preparing the Schematic for OrCAD Layout<br />
<br />
All four capacitors you selected now have a COMPGROUP property value assigned. 9. Close the Property Editor window. 10. Press <Esc> to deselect the capacitors. 11. Save the design and click OK to save all pages. 12. Close the schematic window. STOP<br />
<br />
September, 2006<br />
<br />
End of Lab<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
8-9<br />
<br />
Preparing the Schematic for OrCAD Layout<br />
<br />
Lab 8-2:<br />
<br />
Lesson 8<br />
<br />
Netlist for OrCAD Layout<br />
<br />
Lab Objectives After completing this lab you will be able to: •<br />
<br />
Create a netlist<br />
<br />
•<br />
<br />
Choose a format for the netlist<br />
<br />
Creating a Netlist 1. Click training.dsn in the Project Manager window. 2. Select Tools - Create Netlist. 3. Click the Layout tab. Observe that the OrCAD Layout netlist will be stored in the D:\Capture\training directory. 4. Click OK. The OrCAD Layout netlist is extracted. In the Project Manager window, the training.mnl file is listed in the Outputs folder.<br />
<br />
Note The OrCAD Layout netlist is a binary file. There is a translator in the OrCAD Layout tool that can convert this file to a text readable file.<br />
<br />
Other Netlist Formats 1. To see an ASCII format netlist, select Tools - Create Netlist. 2. Click the Other tab. 3. In the Formatters list, select wirelist.dll. 4. Turn the View Output checkbox on. 5. Click OK. The ASCII netlist file is displayed. 6. View the netlist and close the window. In the Project Manager window, the training.net file is listed in the Outputs folder.<br />
<br />
8-10<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 8<br />
<br />
Preparing the Schematic for OrCAD Layout<br />
<br />
Closing the Training Project 1. Select File - Close Project.<br />
<br />
Note You cannot generate inter-sheet references for this design because this is a complex hierarchical design. Inter-sheet references can be created for flat or simple hierarchical designs only at this time. STOP<br />
<br />
September, 2006<br />
<br />
End of Lab<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
8-11<br />
<br />
Preparing the Schematic for OrCAD Layout<br />
<br />
8-12<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
Lesson 8<br />
<br />
September, 2006<br />
<br />
9 Lesson 9: Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor (Use this section to setup the design for the above tools.)<br />
<br />
Lesson Objectives After completing this lesson, you will be able to: •<br />
<br />
Add an Allegro technology part or net property to your design<br />
<br />
•<br />
<br />
Create a netlist for Allegro technology<br />
<br />
Part Properties for Allegro Technology There many OrCAD PCB Designer or Allegro PCB Editor part properties you can add to your design. These some of these properties are listed and described in the table that follows.<br />
<br />
September, 2006<br />
<br />
Allegro PCB Editor Part Properties<br />
<br />
Description<br />
<br />
* PCB Footprint<br />
<br />
Defines the Allegro PCB Editor footprint pattern. All Allegro PCB Editor parts are required to have this property. The name of this property can be up to 31 characters long and may include the characters A-Z, 0-9, as well as the underscore character. Blank spaces within the name are not permitted.<br />
<br />
ALT_SYMBOLS<br />
<br />
A list of alternate footprint patterns you can use apply to your part during PCB layout. Each alternate footprint must have the same pin count.<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
9-1<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Lesson 9<br />
<br />
Allegro PCB Editor Part Properties<br />
<br />
Description<br />
<br />
* CLASS<br />
<br />
Classify the part as either an IC, IO, or a Discrete device. Although this property is not an Allegro PCB Editor required property, this property is required if you are exporting your design to SPECTRAQuest. The Discrete and IO part classes affect the model assignment process in SPECTRAQuest.<br />
<br />
ROOM<br />
<br />
Assigns the part to a specific area or room of the PCB.<br />
<br />
POWER_GROUP<br />
<br />
Used to assign alternate voltages to parts. This property overrides the voltages specified by invisible power pins with the names of alternate voltages you want the part to use.<br />
<br />
In the previous table, the * symbol before a Part Property indicates a required property. To associate any of the properties shown in the above table to a part, select one or more parts, and set the Filter by field to Cadence-Allegro in the OrCAD Capture Property Editor. For a more detailed list of the properties you may set up for OrCAD PCB Designer or Cadence Allegro PCB Editor refer to Appendix E and F in the back of this training manual.<br />
<br />
9-2<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 9<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Grouping Parts for PCB Design Training Root Schematic<br />
<br />
Allegro PCB<br />
<br />
J1<br />
<br />
Room 2 Room 1 pg 1<br />
<br />
HSRAM pg 2<br />
<br />
Room 1<br />
<br />
Data Schematic<br />
<br />
HSRAM<br />
<br />
Room 2<br />
<br />
Data room<br />
<br />
J2<br />
<br />
HSRAM room<br />
<br />
DAAMP2<br />
<br />
J3 DAAMP1<br />
<br />
Data<br />
<br />
DAAMP Circuit DAAMP(1) DAAMP(2)<br />
<br />
L? 1<br />
<br />
VREF<br />
<br />
2<br />
<br />
ROOM=DAAMP2<br />
<br />
50 VCC<br />
<br />
L? 1<br />
<br />
1<br />
<br />
L? 1<br />
<br />
50<br />
<br />
2<br />
<br />
C? .1UF<br />
<br />
V+12<br />
<br />
ROOM=DAAMP1<br />
<br />
VA+<br />
<br />
2<br />
<br />
1<br />
<br />
VA-<br />
<br />
1<br />
<br />
DG419A<br />
<br />
GAIN<br />
<br />
+<br />
<br />
6<br />
<br />
VA+<br />
<br />
U?<br />
<br />
+<br />
<br />
2<br />
<br />
-<br />
<br />
6<br />
<br />
OUT<br />
<br />
TLE2037A 4<br />
<br />
1<br />
<br />
3<br />
<br />
DG419A<br />
<br />
1<br />
<br />
OUT VA-<br />
<br />
VL<br />
<br />
4<br />
<br />
7<br />
<br />
1<br />
<br />
INB SEL<br />
<br />
6<br />
<br />
INA<br />
<br />
A GND<br />
<br />
2<br />
<br />
2<br />
<br />
2<br />
<br />
U? 8<br />
<br />
C? .1UF<br />
<br />
7<br />
<br />
R? 100<br />
<br />
2<br />
<br />
TLC5602A AOUT<br />
<br />
R? 100<br />
<br />
5<br />
<br />
1<br />
<br />
+<br />
<br />
.1UF<br />
<br />
2<br />
<br />
4<br />
<br />
1<br />
<br />
6<br />
<br />
OUT<br />
<br />
TLE2037A<br />
<br />
-<br />
<br />
V12N<br />
<br />
C? .1UF 2<br />
<br />
VL<br />
<br />
OUT AGND<br />
<br />
INB<br />
<br />
3<br />
<br />
7<br />
<br />
2<br />
<br />
5<br />
<br />
1 6<br />
<br />
INA<br />
<br />
SE L<br />
<br />
8 2<br />
<br />
TLC5602A AOUT<br />
<br />
1<br />
<br />
2 9 5 8 4<br />
<br />
.1UF<br />
<br />
U?<br />
<br />
3<br />
<br />
D7 D6 D5 D4 D3 D2 D1 D0<br />
<br />
U? 2<br />
<br />
CLK<br />
<br />
R? 100<br />
<br />
2<br />
<br />
12 13 14 15 16 17 18 19<br />
<br />
R? 100<br />
<br />
6<br />
<br />
D7 D6 D5 D4 D3 D2 D1 D0<br />
<br />
+<br />
<br />
7<br />
<br />
D7 D6 D5 D4 D3 D2 D1 D0<br />
<br />
2 VCLK<br />
<br />
C?<br />
<br />
VD1 VD2 VA 1 VA2 REF<br />
<br />
U? 11<br />
<br />
4<br />
<br />
1<br />
<br />
50 C? .1UF<br />
<br />
DGN NC1 CMP NC2 AGN<br />
<br />
DAAMP2 room<br />
<br />
C?<br />
<br />
1 20 3 7 10<br />
<br />
DAAMP1 room<br />
<br />
C LK<br />
<br />
12 13 D 7 V+12 D 6 14 15 D 5 D4 16 17 D 3 18 D 2 D1 19 D0<br />
<br />
VD1 VD2 VA1 V A2 R EF<br />
<br />
11<br />
<br />
VCLK<br />
<br />
DGN NC1 CMP NC2 A GN<br />
<br />
U?<br />
<br />
2<br />
<br />
1 20 3 7 10<br />
<br />
L? 1<br />
<br />
2 9 5 8 4<br />
<br />
VCC<br />
<br />
3<br />
<br />
50<br />
<br />
1<br />
<br />
2<br />
<br />
VREF<br />
<br />
2<br />
<br />
GAIN<br />
<br />
V12N<br />
<br />
145<br />
<br />
The above graphic illustrates how the ROOM property can be used to define the value DAAMP1 to all parts in the DAAMP1 schematic. This graphic shows how a polygon defined on the Allegro PCB Editor board as DAAMP1 can be used in Allegro PCB Editor to automatically place the DAAMP1 parts into the DAAMP1 room. If desired, Allegro PCB Editor can be set up to display error markers when parts are incorrectly located in a room.<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
9-3<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Lesson 9<br />
<br />
Net Properties for Allegro Technology There are many different Allegro technology net properties you can add to your design. The table that follows describes five commonly used OrCAD Capture to Allegro technology net properties. Refer to Appendix F for a more complete list of additional net properties. . Allegro PCB Editor Net Properties<br />
<br />
Description<br />
<br />
MIN_LINE_WIDTH<br />
<br />
This property attaches to a net and sets the minimum width of a net or line. Use this property to override the Min line width rule in a physical constraint set. It also overrides the line Width electrical constraint for a differential pair, if set. The value of this property is in design units.<br />
<br />
NET_PHYSICAL_TYPE<br />
<br />
This property attaches to a net or constraint area. The name of the physical constraint set to be applied.<br />
<br />
NET_SPACING_TYPE<br />
<br />
This property attaches to a net or constraint area. The name of the spacing constraint set to be applied.<br />
<br />
PROPAGATION_DELAY<br />
<br />
This property defines the minimum and maximum propagation delay constraint between any pair of pins or rat-Ts in a net or an extended net (Xnet). Values assigned to this rule are string values.<br />
<br />
RELATIVE_PROPAGATION_DELAY<br />
<br />
This property is generally assigned through the Allegro PCB Editor Constraint Manager. This property replaces MATCHED_DELAY in Allegro PCB Editor version 14.0. This rule evaluates electrical constraints attached to pin pairs on a net. It specifies a group of pin pairs that are required to have interconnect propagation delays that match a specified delta (offset) and tolerance. A RELATIVE_PROPAGATION_DELAY group has one or more reference pin pairs against which all other pin pairs in the group are compared.<br />
<br />
To attach the properties shown in the list, select one or more nets, and set the Filter by field to Cadence-Allegro in the Property Editor. Then choose the corresponding net property from the list that displays.<br />
<br />
9-4<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 9<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Create Differential Pairs between flat nets OrCAD Capture has the ability to allow you to create Differential Pairs between flat nets in your design for Cadence Allegro PCB Editor. You can set the DIFFERENTIAL_PAIR property on selected nets using the Property Editor. See the Property filter for Cadence-Allegro PCB Editor. There is also a command Create Differential Pair located on the Tools pull-down menu. In the Create Differential Pair dialog box you can view the nets defined in your design and create a Differenctial Pair between selected nets.<br />
<br />
Note This feature will only work with Cadence Allegro PCB Editor with Performance option or Cadence Allegro PCB Editor Expert.<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
9-5<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Lesson 9<br />
<br />
Allegro Technology Netlist<br />
<br />
OrCAD Capture uses a configuration file to control part association with net properties. This configuration information which is included in the Allegro PCB Editor netlist is stored in the application installation directory by default. However, you may use the Setup button located in the Tool Create Netlist - Allegro dialog box to specify an alternate path to this file. As you create an Allegro PCB Editor netlist, three netlist files are created and stored in the directory location you specify in the Netlist Files Directory field. In the above illustration, the netlist files are created in the allegro subdirectory within the current project.<br />
<br />
Note The Allegro PCB Editor routing process creates a routing .dsn file that must be stored separately from the design .dsn file associated to the OrCAD Capture schematic. It is important to take note of the separate directory locations. As shown in the previous illustration, the three files created when you create an Allegro PCB Editor netlist are listed in the Project Manager window within the Outputs folder.<br />
<br />
9-6<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 9<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
•<br />
<br />
pstchip.dat: This file contains the library definitions of all the devices in the OrCAD Capture design.<br />
<br />
•<br />
<br />
pstxnet.dat: This file defines all the connections in the design. This file also contains net properties.<br />
<br />
•<br />
<br />
pstxprt.dat: This file is a parts list. All part properties are sent to Allegro PCB Editor in this file.<br />
<br />
The Create Netlist window also lets you load the three netlist files into an Allegro PCB Editor design. You can use an alias in the configuration file to map an old Allegro PCB Editor property into a new one. If you have a previous Allegro PCB Editor design that uses the DELAY_RULE property, you can map this property to another property name (for example, DELAY_RULE = PROPAGATION_DELAY).<br />
<br />
Common Issues and Errors The netlister has an Allegro PCB Editor-specific error checking mechanism that generates a list of Allegro PCB Editor formatting errors, and halts the netlist generation. The error messages are written to the session log. A netlist.log file is also written to the current working directory. The following table identifies and describes common problems associated with creating or loading an Allegro PCB Editor netlist. For additional information, please see Help - Product Notes within the OrCAD Capture application<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
9-7<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
9-8<br />
<br />
Lesson 9<br />
<br />
Error Message<br />
<br />
Description<br />
<br />
Missing PCB Footprint<br />
<br />
Every part in the design must have an assigned PCB Footprint property to ensure operation of the netlister. If you attempt to run the netlister before PCB footprints are assigned, the process will abort. The footprint property can be defined through either the library or parts in the design.<br />
<br />
No Connect Pins<br />
<br />
A pin with a No Connect symbol placed on it, will be tied to net name NC in the netlist. These are unconnected pins, as opposed to No Connect pins. No Connect pins are non-electrical pins on the physical package. No Connect pins are usually not present on the OrCAD Capture symbol. However, these pins must be defined, else errors occur when you load the netlist into Allegro PCB Editor. Use the NC property to supply a list of No Connect pin numbers for a part. No connect pins can be added to the OrCAD Capture symbol, but they must have unique pin names (for example, NC1, NC2, and so on). Pins that appear on the symbol should not be included in any NC property. Allegro PCB Editor package symbols can contain mechanical pins, or pins without numbers (for example, the mounting holes on a connector). A part in the OrCAD Capture library would not need an NC property to account for these mounting holes.<br />
<br />
Duplicate Pin Names<br />
<br />
If two or more visible pins have the same pin name, the netlister will abort. However, if the pin type is POWER, the netlister will automatically alter the duplicated pin names to make them unique.<br />
<br />
Illegal Characters<br />
<br />
The netlist does not allow the use of single quotes or exclamation marks in any pin, part, or net names. It is best to use A-Z, 0-9, and the underscore character as the only punctuation.<br />
<br />
Missing Pin Number<br />
<br />
Every pin must have an assigned pin number. The netlister will abort if you attempt to use it before completing pin number assignments.<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 9<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Backannotating the Schematic<br />
<br />
OrCAD Capture lets you backannotate schematics with design changes made in Allegro PCB Editor. The OrCAD Capture Back Annotate command lets you: •<br />
<br />
Change part references<br />
<br />
•<br />
<br />
Change net properties<br />
<br />
•<br />
<br />
Change part properties<br />
<br />
•<br />
<br />
Swap gates and pins<br />
<br />
When you use the OrCAD Capture back annotation command, you no longer need to export the net files to Allegro PCB Editor. In Allegro PCB Editor, when you use the File - Export Logic command to send information back to the OrCAD Capture schematic, Allegro PCB Editor produces four backannotation files: •<br />
<br />
pinView.dat: Contains all pins and net connections<br />
<br />
•<br />
<br />
netView.dat: Contains all net properties<br />
<br />
•<br />
<br />
compView.dat: Contains all part properties<br />
<br />
•<br />
<br />
funcView.dat: Contains all gate properties<br />
<br />
Note These files can also be produced in OrCAD Capture using the Tools - Back Annotate command, and selecting the Generate Feedback Files option. September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
9-9<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Lesson 9<br />
<br />
In OrCAD Capture, when you use the Tools - Back Annotate command, these four files are processed into a single backannotation file, called a swap file. The swap file is then used to update the OrCAD Capture schematic with new part references, as well as part and net properties. All gate and pin swapping data is automatically included in the swap file. The backannotation of part and net properties is controlled by the Allegro.cfg file.<br />
<br />
Creating an Allegro Technology Netlist There are three ways you can create an Allegro PCB Editor netlist.<br />
<br />
9-10<br />
<br />
•<br />
<br />
You can automatically create the netlist when you create a new Allegro PCB Editor board.<br />
<br />
•<br />
<br />
You can create an Allegro PCB Editor netlist using the OrCAD Capture commands Tools - Create Netlist - Allegro. Then import the three default Allegro PCB Editor net files into Allegro PCB Editor.<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 9<br />
<br />
Lab 9-1:<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Adding Allegro Technology Properties<br />
<br />
Lab Objectives After completing this lab you will be able to: •<br />
<br />
Browse parts<br />
<br />
•<br />
<br />
Add a PCB Footprint property<br />
<br />
•<br />
<br />
Add other properties<br />
<br />
•<br />
<br />
View the Occurrence properties<br />
<br />
Browsing Parts 1. In the Training Project Manager window, click .\training.dsn, and select Edit - Object Properties. The Property Editor window opens displaying the current properties of all of the parts in the design. 2. Set Fitler by to: Cadence-Allegro. 3. Close the Property Editor window. 4. Select Edit - Browse - Parts from the main menu. 5. Click OK to continue. The Browse Parts window lists all the parts in the design.<br />
<br />
Adding the PCB Footprint Property 1. Scroll down and click on part reference U5. 2. Select Edit - Properties from the pop-up manu. The Browse Spreadsheet displays properties currently attached to U5. 3. Locate the PCB Footprint column to verify a cell value of PLCC84. 4. If necessary, click in the cell, and enter: PLCC84<br />
<br />
5. Click OK to continue. 6. Close the Browse Parts window, and save the design.<br />
<br />
Browsing Nets 1. In the Project Manager window, click on .\training.dsn, and select Edit - Browse - Nets.<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
9-11<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Lesson 9<br />
<br />
2. Click OK to continue. The Browse Nets window lists all the nets in the design.<br />
<br />
Adding the MIN_LINE_WIDTH Property 1. Use <Ctrl+LMB> to select just one Object ID for each of the following nets: AGND, GND, GND_EARTH, V12N, VCC, and V+12).<br />
<br />
2. Select Edit - Properties. The Browse Spreadsheet opens and displays properties currently attached to these six nets. 3. Click New. 4. Enter MIN_NECK_WIDTH into the Name field. 5. Enter the value: 8<br />
<br />
6. Click OK to continue. 7. Scroll to locate the MIN_NECK_WIDTH property column. Verify the column values.<br />
<br />
Note You can also enter a column value if you: • • • •<br />
<br />
Click in the first cell in the MIN_NECK_WIDTH column. Enter a desired value. Copy the value. Click on column header and paste. The property value you copied is pasted into all column cells.<br />
<br />
8. Click New.<br />
<br />
9-12<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 9<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
9. Enter MIN_LINE_WIDTH into the Name field. 10. Enter the value: 15<br />
<br />
11. Click OK to continue.<br />
<br />
12. Close the Browse Nets window, and save the design.<br />
<br />
Browsing Parts in the DAAMP Circuit 1. In the Project Manager window, click on the DAAMP Circuit schematic folder, and select Edit - Browse - Parts. 2. Click OK to continue. The Browse Parts window lists every occurrence of every part found in the DAAMP1 and DAAMP2 blocks.<br />
<br />
Adding a ROOM Property to DAAMP1 1. Widen the column labeled Schematic to see the entire schematic path for each occurrence. 2. Click on the Schematic column heading to sort the entries by schematic path. All the DAAMP1 parts are now at the top of the list. The result is shown in the following picture.<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
9-13<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Lesson 9<br />
<br />
3. In the Reference column, use the <Shift> key and left mouse button (LMB) to group select all the parts on the DAAMP1 page (as shown above). 4. Select Edit - Properties. The Browse Spreadsheet appears, listing the selected part occurrences and their current properties. 5. Click New. 6. Enter the name: ROOM<br />
<br />
7. Enter the value: CHAN1<br />
<br />
8. Click OK. All the parts in the DAAMP1 block now have a ROOM property with a value of CHAN1.<br />
<br />
Adding ROOM to the DAAMP2 Block 1. Sort the Browse Parts window on the Schematic column again, and use the <Shift+LMB> to select all the occurrences in the DAAMP2 schematic. 2. Repeat the process of adding a ROOM property value, but this time set the value to: CHAN2<br />
<br />
9-14<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 9<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
3. When you are finished, close the Browse Parts window and save the design.<br />
<br />
Viewing the Occurrence Properties 1. To verify the changes, double click on PAGE1 page in the DAAMP Circuit folder. The Select Occurrence window appears. 2. Click OK to open the DAAMP, PAGE1 schematic. 3. Resize the schematic window, and zoom to fit. 4. Select Edit - Find, and OK to select all parts on the page. All the parts in the PAGE1 schematic are selected. 5. Right-click and select Edit Properties from the pop-up menu. Instance property values appear in the white column, and occurrence property values appear in the two yellow columns (one column for DAAMP1, and another column for DAAMP2). 6. Set the Filter by field to Cadence-Allegro. 7. Locate the ROOM property and observe the different values in the DAAMP1 and DAAMP2 columns.<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
9-15<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Lesson 9<br />
<br />
8. Close the Property Editor and close the schematic page. 9. Save the design. STOP<br />
<br />
9-16<br />
<br />
End of Lab<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 9<br />
<br />
Lab 9-2:<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Netlist for Allegro Technology<br />
<br />
Lab Objectives After completing this lab you will be able to: •<br />
<br />
Create an Allegro PCB Editor netlist<br />
<br />
•<br />
<br />
View netlist files<br />
<br />
Creating an Allegro PCB Editor Netlist 1. In the Project Manager, click on the design file and select Tools Create Netlist. 2. Click the PCB Editor tab. 3. Click the Setup button in the upper right corner. 4. Click the browser button and navigate to the directory: D:\<install directory>\tools\capture 5. Select the allegro.cfg file and click Open. 6. Click OK.<br />
<br />
Note The path of the configuration file varies with the location of the Cadence software. 7. Set the Create Netlist options, as shown in the following graphic.<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
9-17<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Lesson 9<br />
<br />
8. Click OK. 9. Click Yes to create an allegro folder for the netlist files. Observe that in the Project Manager window, the three Allegro PCB Editor netlist files are listed in the Outputs folder.<br />
<br />
Viewing the Netlist Files 1. In the Project Manager window, double click .\pstchip.dat. This is the library definition file. Close the window. 2. In the Project Manager window, double click .\pstxnet.dat. This is the nets and net properties file. Close the window. 3. In the Project Manager window, double click .\pstxprt.dat. This is the parts list and part properties file. 4. Close the netlist windows when you are done.<br />
<br />
9-18<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Lesson 9<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
Closing the Training Project 1. Select File - Close Project.<br />
<br />
Note This lesson did not generate inter-sheet references because this is a complex hierarchical design. Inter-sheet references can be created for flat or simple hierarchical designs only. STOP<br />
<br />
September, 2006<br />
<br />
End of Lab<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
9-19<br />
<br />
Preparing the Schematic for OrCAD PCB Designer or Allegro PCB Editor<br />
<br />
9-20<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
Lesson 9<br />
<br />
September, 2006<br />
<br />
10 Lesson 10: Using Component Information System (CIS) (Optional) Lesson Objectives After completing this lesson, you will be able to: •<br />
<br />
Use CIS to find and place database parts<br />
<br />
•<br />
<br />
Check the status of database parts in a design<br />
<br />
•<br />
<br />
Create a CIS Bill of Materials<br />
<br />
•<br />
<br />
Create design variants<br />
<br />
This lesson familiarizes you with the Component Information System (CIS), an option within OrCAD Capture for managing a parts database. This includes storing and accessing part data in a central location, defining part properties, and ensuring use of approved parts in production designs. When you finish this lesson, you will understand what a parts database is and how the Component Information System can help you manage part development and usage with a parts database. You will be able to perform the basic tasks involved in finding parts in a local parts database, placing them in designs, and making sure they reflect the current part information in the database. You will also be able to associate schematic and footprint symbols to database parts and generate Bills of Materials from designs containing database parts.<br />
<br />
September, 2005<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-1<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
CIS-Coordinated Part Management<br />
<br />
Engineering<br />
<br />
Parts Database<br />
<br />
Purchasing Manufacturing<br />
<br />
CIS coordinates and streamlines the part approval process by centralizing all company part information in a single database that all departments can access at any time. In contrast with the typical uncoordinated process, all interested parties provide input directly into the same database. Primary input for part definition typically comes from the Engineering department. However, other groups, such as Manufacturing and Purchasing, also need to provide and/or edit part information.<br />
<br />
10-2<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
How a Parts Database Works<br />
<br />
CIS U1A U2A<br />
<br />
Footprint Libraries<br />
<br />
U3B<br />
<br />
VCC<br />
<br />
GND<br />
<br />
Schematic Libraries 154<br />
<br />
When you use CIS, the information defining the parts you place in schematics comes from a centralized parts database containing (or referencing) all the information you should need for circuit design and analysis. In addition, the parts database can include information needed for other aspects of development and manufacturing, such as cost, preferred vendor, availability, and so on, as shown in the preceding picture. Using CIS, you can access and manage part data and the associated symbols from an ODBC-compliant parts database. Modern database programs, such as Microsoft Access, enable administrators to assign and restrict read-write privileges to different departments for only the database fields they need to control. In addition to containing part information, the parts database can also reference part information that resides elsewhere. For example, although the parts database used in this lesson contains information about part numbers and cost, it also references OrCAD libraries for schematic symbols and PCB layout footprints. CIS even supports database entries that reference supporting material over the internet, such as datasheets stored on manufacturers' websites.<br />
<br />
September, 2005<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-3<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
The CIS Explorer<br />
<br />
schematic symbol & package data<br />
<br />
database categories<br />
<br />
property values for selected part<br />
<br />
PCB footprint<br />
<br />
entries in opened category selected part is highlighted<br />
<br />
You can use the CIS Explorer to search the parts database, add parts from the database to the schematic, and modify part properties on parts already in the design. CIS is a graphical user interface accessible from within OrCAD Capture that provides access to a centralized, approved part database. This is an alternative methodology to placing schematic symbols from part libraries. The simplest way to find a part is to select the Explore tab and open a category of database parts, as shown in the previous picture, then scroll through the entries in the resulting parts list until you see a part you want. The component categories reflected in the CIS Explorer are defined by setting up individual tables in the database. The field headers in each table can be tailored to reflect the parametric data relevant for that type of component. For example, in a Resistors table, you would include a header for “tolerance,” whereas this would not be needed in a table for ICs.<br />
<br />
Internet Component Assistant (ICA) The Internet Component Assistant (ICA) feature is currently disabled. The ICA tab was previously used to access SpinCircuit.com, a website that provided part data for use with OrCAD Capture CIS.<br />
<br />
10-4<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Around June of 1999 Activeparts was spun off from Cadence Design Systems as SpinCircuit (www.SpinCircuit.com). SpinCircuit recently (10/ 01/01) decided they could no longer provide free access to Activeparts through the Internet Component Assistant (ICA), built into OrCAD Capture CIS. Cadence and SpinCircuit are developing replacement solutions. Currently, this issue is a work-in-progress. You can keep up to date with the progress by visiting www.activeparts.com.<br />
<br />
Querying for Database Parts<br />
<br />
search criteria<br />
<br />
Comparison Operators<br />
<br />
A more efficient way to find the part you need is to use the Query feature in the CIS Explorer. When you select the Query tab, a form appears in which you can build search criteria. As shown in the previous picture, the Query form consists of one or more rows of three fields in which you specify a property name, a property value and the type of comparison to perform. Suppose you specify the following search criteria: Part Type = Ceramic Value <= 0.5PF These search criteria would return a list of all parts in the selected component category with a Part Type property of Ceramic, and a Value property less than or equal to 0.5PF.<br />
<br />
September, 2005<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-5<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
Lab 10-1: Placing Database Parts Lab Objectives After completing this lab you will be able to: •<br />
<br />
Navigate the CIS parts database to find desired parts<br />
<br />
•<br />
<br />
Search the database for parts using Query criteria<br />
<br />
•<br />
<br />
Place database parts on a schematic<br />
<br />
Opening OrCAD Capture CIS 1. Select File > Open > Project. 2. Navigate to the D:\Capture\cis directory, select the cis.opj file, and click Open. 3. Open PAGE1, as shown in the following picture.<br />
<br />
10-6<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
In the previous graphic, notice how the arrows point to empty spaces for two Buffer Amplifiers and two Output Filters (one for CHANNEL 1 and one for CHANNEL 2). As you complete the steps in this lab you will add these circuits using parts from a CIS database.<br />
<br />
Accessing the CIS Explorer Window Use the sample schematic below as a guide to help you complete the steps in this lab. When you complete this lab you will have created a Buffer Amplifier for CHANNEL 1 and then copy it to CHANNEL 2.<br />
<br />
1. With the schematic page active, choose Place - Database Part. The CIS Explorer window appears. 2. In the upper left corner, click the plus sign (+) beside BenchAccess1000. The main component categories defined in the database are displayed.<br />
<br />
September, 2005<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-7<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
3. Click to expand the Capacitor category, then select the Ceramic folder. The lower window panel of the spreadsheet lists all ceramic capacitors defined in the CIS database. The arrow in the graphic that follows points from the Ceramic folder to the values of parts in that folder.<br />
<br />
4. Scroll down the parts list until you find a capacitor with the value of 0.01UF, then select it by clicking anywhere on that line.<br />
<br />
10-8<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
The entry in the spreadsheet window highlights in green, indicating that the schematic symbol assigned to this part has been found in the source library. The other windows display the schematic symbol, the PCB footprint, and a list of all properties and information associated with this part.<br />
<br />
Note You can resize any of the windows in the CIS Explorer to display more information. When you put the cursor on a window boundary, it changes shape to , indicating you can resize the window by dragging its border.<br />
<br />
Note In order to display PCB footprints, you must have access to OrCAD Layout or Allegro PCB Editor libraries. 5. Select the Place Database Part button at the upper right of the OrCAD Capture window (or just double click on the desired entry in the part list). The schematic page comes to the foreground, and the selected capacitor is attached to your cursor.<br />
<br />
September, 2005<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-9<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
6. Place the capacitor to the right of an AD9300KP part (please see the example at the beginning of this lab.) 7. Press <Esc> twice.<br />
<br />
Filtering the Spreadsheet Next you will place three 2.0K resistors, but this time you will use the Query function to filter the parts in the spreadsheet. 1. Right-click and select Place Database Part from the pop-up menu. 2. In the CIS Explorer, open the Resistor category, then the Carbon Film folder within it. All the carbon film resistors are listed in the spreadsheet. 3. Click the Query tab, as shown below.<br />
<br />
The Query Tab<br />
<br />
The Query tab displays a property table you can use to search the database. (You may need to resize the columns and/or the window to display all three fields.) The Query tab already knows you’re looking for a carbon film resistor based on the folders you selected in the Explore tab.<br />
<br />
10-10<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Default part search criteria appears in this row. To narrow the search, enter additional criteria in additional rows.<br />
<br />
4. Click in the Property column of line 2, and select the Value property from the pop-up menu. You may need to use the scrollbar to the right of the Query tab to display all fields of the property table. 5. Click in the Compare column of line 2 and select the = operation. 6. In the Value column, type 2.0K and press <Enter>. The Query tab should now match the following picture.<br />
<br />
The spreadsheet now shows only carbon film resistors with a value of 2.0K. Each row in the spreadsheet represents a different 2.0K resistor in the CIS database. You will now narrow the search even further.<br />
<br />
September, 2005<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-11<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
7. In the Query tab, click in the Property column of line 3, and select the Power property from the pop-up menu. 8. Click in the Compare column of line 3 and select the = operation. 9. In the Value column, type 1/8W and press <Enter>. Only one resistor in the CIS database meets that criteria. 10. Select the resistor from the spreadsheet at the bottom of the CIS Explorer window.<br />
<br />
10-12<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
The part entry highlights in green and the other windows of the CIS Explorer display the part symbol, footprint and properties.<br />
<br />
11. Double click the part in the spreadsheet. The schematic window comes to the foreground, and the resistor attaches to your cursor. 12. Place three instances of the 2.0K resistor to the right of the capacitor you just placed (you will rotate one of them later). 13. Press <Esc> twice.<br />
<br />
Completing the Buffer Amplifier Circuit 1. Refer to the example at the beginning of this lab and complete the Buffer Amplifier for CHANNEL 1. Save your work frequently. The following table will help you locate the Op Amps part in the CIS database.<br />
<br />
September, 2005<br />
<br />
Part<br />
<br />
Folder in CIS database<br />
<br />
Op Amps<br />
<br />
IC > Misc<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-13<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
2. When you finish creating the Buffer Amplifier for CHANNEL 1, make a copy for CHANNEL 2. Be sure to change the net aliases from CHANNEL1 to CHANNEL2. 3. Save the design.<br />
<br />
Adding the Output Filters 1. Use this example to create an Output Filter for CHANNEL 1. Save your work frequently.<br />
<br />
The table that follows provides information to help you find the parts you need in the CIS database. Part<br />
<br />
Folder in CIS database<br />
<br />
Capacitors<br />
<br />
Capacitor > Ceramic, and Electrolytic<br />
<br />
Inductors<br />
<br />
Misc > Passive > Inductor<br />
<br />
BNC connectors<br />
<br />
Misc > Connector<br />
<br />
Note The BNC connectors must be rotated. 10-14<br />
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Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
2. When you finish creating the first Output Filter, make a copy for CHANNEL 2. Be sure to change the net aliases from CHANNEL1 to CHANNEL2. 3. Save the design. 4. If it is still open, close the CIS Explorer window. (You can use the small X in the upper, right hand corner of the window.<br />
<br />
Annotating the Schematic 1. In the Project Manager, click on the design file and select Tools Annotate. 2. In the Annotate window, set the options as shown below and click OK.<br />
<br />
Be sure to select these options<br />
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September, 2005<br />
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Cadence OrCAD Capture Version 15.7<br />
<br />
10-15<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
3. Click OK again to proceed. OrCAD Capture assigns part references to every part in the design. 4. View the reference designator assignments, and close the schematic window. STOP<br />
<br />
10-16<br />
<br />
End of Lab<br />
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Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
CIS Bill of Materials Setup<br />
<br />
Name of CIS BOM template<br />
<br />
Properties that will be reported in BOM<br />
<br />
Select properties you want in the BOM, then click Add<br />
<br />
Use Arrow buttons to specify property sequence in BOM Select properties you do not want in BOM and click Remove button<br />
<br />
Specify prefixes of properties you want excluded from the BOM<br />
<br />
Select properties you want grouped in BOM and check here<br />
<br />
You can generate a CIS Bills of Materials in two formats: •<br />
<br />
Standard CIS BOM<br />
<br />
•<br />
<br />
Seagate Crystal Reports BOM<br />
<br />
When generating a Standard CIS Bill of Materials, you use the Standard Bill of Materials dialog shown in the accompanying picture to create a BOM template specifying which properties from the parts database to include in the BOM and how to sequence them. You can create multiple BOM templates specifying different combinations or arrangements of part data to report. When you need to generate a BOM, you choose the appropriate template for your purpose. The Select Properties box lists all available properties you can include in the BOM report. The Output Format box lists the properties you want to include and the sequence in which their columns will appear in the BOM.<br />
<br />
September, 2005<br />
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Cadence OrCAD Capture Version 15.7<br />
<br />
10-17<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
If you select a property in the Output Format list and check the Keyed check box, parts having that property are grouped together on the Bill of Materials. The Exclude Prefixes box provides a way to filter out data for certain types of parts from the Bill of Materials. For example, suppose you use the prefix “N” in part references for non-electrical parts. To exclude those parts from the Bill of Materials, you would enter N in the Exclude Prefixes box. The property icons have the following meanings: Icon<br />
<br />
Meaning The property is transferred from the parts database to the placed part on the schematic. The property comes directly from the parts database. The property is not in the database at all, only on the placed part in the schematic. The property comes from over the internet from SpinCircuit’s webbased Activeparts™ database. This appears if you have placed Activeparts in the design.<br />
<br />
The CIS Bill of Materials Report<br />
<br />
10-18<br />
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Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
In a previous lesson, you generated a Bill of Materials using the OrCAD Capture Bill of Materials command. CIS provides its own CIS Bill of Materials command that lets you generate BOM reports based on the data in the parts database, as well as properties added to instances after they have been placed in schematics. A sample of such a BOM is shown in the preceding picture. The CIS Bill of Materials offers additional options for generating part reports.<br />
<br />
September, 2005<br />
<br />
Regular Bill of Materials<br />
<br />
CIS BIll of Materials<br />
<br />
Scope of the BOM is determined by what you select in the Project Manager (page, schematic folder, or design).<br />
<br />
Scope of the BOM is the entire design, regardless of what you select in the Project Manager.<br />
<br />
BOM reports all parts in the schematic.<br />
<br />
BOM reports all parts in the schematic. For all database parts corresponding to entries in the CIS database, the BOM can report any of the part data stored in the database.<br />
<br />
You can specify only one BOM format at a time. Each time you want another format, you must re-specify the set and or sequence of properties to be used in generating the report.<br />
<br />
You can specify, save, and choose between multiple formats for the BOM. Each time you specify a new set and or sequence of properties, you can save that format under its own name.<br />
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Cadence OrCAD Capture Version 15.7<br />
<br />
10-19<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
The CIS Part Manager<br />
<br />
The Part Manager, shown in the preceding picture, reports the status of all parts in a design with respect to the CIS part database that OrCAD Capture is currently configured to use. •<br />
<br />
A green dot means that the instance in the design exactly reflects the parameters in the database entry for that part. This is the status a part should have for use in production designs.<br />
<br />
•<br />
<br />
A yellow dot means that the instance in the schematic has a Part Number property, but has not yet been checked against the database for correspondence. This is typical of new parts that are in the approval process.<br />
<br />
•<br />
<br />
A red dot means that the instance in the schematic has been checked and found not to match the parameters in the database entry for that part. Either the part was not found, a duplicate, undefined, or not current. A design with such parts will not produce a correct Bill of Materials.<br />
<br />
When all the status indicators are green, you are ready to generate a Bill of Materials report.<br />
<br />
Note The part status is based only on the part properties you have specified to be transferred from the parts database to instances placed in designs. Other properties that may reside in the parts database or in the design are not checked.<br />
<br />
10-20<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
A number of conditions determine which status category a part falls into. The following table describes the conditions distinguished by the CIS Part Manager. Condition of Placed Part<br />
<br />
Description<br />
<br />
Approved<br />
<br />
The part has a PART NUMBER property associated with it (but the property value is undefined).<br />
<br />
Defined<br />
<br />
The part has a PART NUMBER property value.<br />
<br />
Temporary<br />
<br />
The part has a temporary part number.<br />
<br />
Undefined<br />
<br />
The part does not have a PART NUMBER property associated with it.<br />
<br />
Undefined Part Reference<br />
<br />
The part has an undefined part reference property value.<br />
<br />
Current<br />
<br />
The transferable properties on the part match those of the database definition for that part.<br />
<br />
Not Current<br />
<br />
The part has at least one transferable property that does not match its database definition.<br />
<br />
Duplicate<br />
<br />
The part has a part number that occurs more than once in the parts database.<br />
<br />
Not Found<br />
<br />
The part has a part number that does not exist in the parts database.<br />
<br />
The next table correlates all condition combinations recognized by the Part Manager to the three primary status categories. In addition, for ease of reference, this table arbitrarily assigns a reference number to each possible status combination.<br />
<br />
September, 2005<br />
<br />
Ref. No.<br />
<br />
Status Dot Color<br />
<br />
Status of Placed Part<br />
<br />
Description<br />
<br />
1<br />
<br />
Green<br />
<br />
Approved: Current<br />
<br />
The PART NUMBER property value on the placed part matches the database part, and all the transferable properties match. Such parts are unconditionally approved.<br />
<br />
2<br />
<br />
Yellow<br />
<br />
Approved: Defined<br />
<br />
The placed part has a defined PART NUMBER property, but it has not yet been checked against the database part.<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-21<br />
<br />
Using Component Information System (CIS) (Optional)<br />
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10-22<br />
<br />
Lesson 10<br />
<br />
Ref. No.<br />
<br />
Status Dot Color<br />
<br />
Status of Placed Part<br />
<br />
Description<br />
<br />
3<br />
<br />
Yellow<br />
<br />
Approved: Undefined part reference<br />
<br />
The placed part has an undefined PART REFERENCE property value (such as “R?”).<br />
<br />
4<br />
<br />
Yellow<br />
<br />
Temporary: Current<br />
<br />
The placed part has a temporary part number, and all the transferable properties match the database part.<br />
<br />
5<br />
<br />
Yellow<br />
<br />
Temporary: Defined<br />
<br />
The placed part has a temporary part number, but it has not yet been checked against the database part.<br />
<br />
6<br />
<br />
Red<br />
<br />
Approved: Not Current<br />
<br />
A PART NUMBER property exists in the parts database, but one or more of the transferable properties do not match the database part.<br />
<br />
7<br />
<br />
Red<br />
<br />
Approved: Duplicate<br />
<br />
The part number on the placed part occurs more than once in the parts database. This status occurs only if your configuration does not allow duplicate part numbers.<br />
<br />
8<br />
<br />
Red<br />
<br />
Approved: Not Found<br />
<br />
The part number on the placed part does not exist in the parts database.<br />
<br />
9<br />
<br />
Red<br />
<br />
Undefined<br />
<br />
The placed part does not have a PART NUMBER property, or the property value is undefined.<br />
<br />
10<br />
<br />
Red<br />
<br />
Temporary: Not Current<br />
<br />
One or more of the transferable properties on the temporary part do not match the database part.<br />
<br />
11<br />
<br />
Red<br />
<br />
Temporary: Duplicate<br />
<br />
This status occurs only if you intentionally duplicate a temporary part number.<br />
<br />
12<br />
<br />
Red<br />
<br />
Temporary: Not Current<br />
<br />
The PART NUMBER property value on the placed temporary part does not exist in the parts database.<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Design Variants<br />
<br />
A design variant refers to variations of components in a core design resulting in different product assemblies or functions. For each design variation, some components may change and some may not be present at all.<br />
<br />
More Information Design variations are needed to support different models of the product (for example, memory capacity, speed, or additional functionality), and to support different requirements, depending on where the product is sold (for example, US, Asia, UK). Having a single PCB to support the variations reduces cost by allowing a single board design to represent multiple products.<br />
<br />
September, 2005<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-23<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
You can generate a standard Bill of Materials report for each design variation, or create a variant Bill of Materials report that lists the differences between a variant and the core design. You can also document these variations in printed schematics.<br />
<br />
Groups Multiple components are generally used to support a particular function or module (for example, a power or memory module). These components are defined as a group, and have varying versions numbers.<br />
<br />
Subgroups Each subgroup represents a version or assembly of the parent group. For example, if your power module has different assemblies for Europe and Asia, then the Power group would have two subgroups. The set of components in each subgroup is the same as the parent group.<br />
<br />
Core Design The core design is the base schematic and PCB from which design variants can be created.<br />
<br />
Common All components that are not part of a group, but are still part of the core design. These modules or functions remain unchanged in all assemblies.<br />
<br />
BOM Variants These are the versions of the design that are manufactured from a Bill of Materials that is specific to each assembly.<br />
<br />
10-24<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lab 10-2: Updating Part Status Lab Objectives After completing this lab you will: •<br />
<br />
Annotate the design<br />
<br />
•<br />
<br />
Check the status of design parts to ensure database consistency<br />
<br />
Annotate the Design 1. Activate the Project Manager and select Tools - Part Manager - Open. 2. Adjust the width of the columns so you can see the Part Status data as shown below (or use the scrollbar).<br />
<br />
Notice that the status dots are yellow, indicating that the parts have a defined part number property, but they still need to be checked against the CIS database. 3. Select Tools - Update Part Status. The Part Manager compares the parts in the schematic against the CIS database, and updates all property data. The Part Status column now shows green dots, indicating that the parts are now current and approved. 4. Close the Part Manager and save the design. STOP<br />
<br />
September, 2005<br />
<br />
End of Lab<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-25<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
Lab 10-3: Creating a CIS Bill of Materials Lab Objectives After completing this lab you will be able to create a CIS Bill of Materials<br />
<br />
Open a Standard BOM Report 1. Activate the Project Manager window and select Reports CIS Bill of Materials - Standard. The Standard Bill of Materials dialog box appears. 2. Click on a property in the Select Properties box, then click the Add button. The property is transferred to the Output Format box. 3. Do this with several properties. (You can also simply double click on the desired property.) 4. Reverse the process, using the Remove button or double clicking to transfer properties to the Select Properties box. 5. Select a property in the Output Format box, then click the up or down arrow to the right of the box to change its position in the list. Move a few other properties up or down in the list.<br />
<br />
Set Up BOM Properties 1. Now that you are familiar with the controls, specify the following list and sequence of properties for inclusion in the BOM: a. b. c. d. e. f. g.<br />
<br />
Item Number Quantity Part Reference Part Number Description Manufacturer Availability<br />
<br />
2. Under Part Reference Options, select Standard Separate Line Per Part. This produces one line in the BOM for each part in the design. The dialog box should now resemble the following picture.<br />
<br />
10-26<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
3. Click OK. The BOM template is saved in the Capture.ini file, and the Bill of Materials report is displayed.<br />
<br />
September, 2005<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-27<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
You cannot print the BOM report directly from the report view. 4. Select File - Save As. You can save the BOM report in any of three file formats: • • •<br />
<br />
Text-tab delimited format (*.bom), which can be read by any text editor or word processing program. Excel delimited format (*.csv), which can be read by the Microsoft Excel spreadsheet program. Access format (*.mdb), which can be read by the Microsoft Access database editor.<br />
<br />
5. Click Cancel. 6. Close the Bill of Materials report, and save the design. STOP<br />
<br />
10-28<br />
<br />
End of Lab<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lab 10-4: Creating a Design Variant 1. Select Tools - Part Manager - Open. 2. In the left panel of the Part Manager window, notice the Groups and BOM Variants folders. Under the Groups folder is a Common folder. 3. Click the Common folder. All parts in the design currently belong to this group.<br />
<br />
Building Groups 1. Click on the Groups folder, right-click, and select New Group from the pop-up menu. 2. In the New Group window, enter: Buffer Amplifier<br />
<br />
3. Click OK (or press <Enter>). 4. Repeat this process to create another group called Output Filter When you complete this step, the Part Manager tree should look like the graph below.<br />
<br />
5. Click the new group folders and notice that they are currently empty. You will now add parts to these two groups by selecting them in the schematic.<br />
<br />
Adding Parts to the Buffer Amplifier Group 1. In the Project Manager window, double click to open the CIS schematic you just created. 2. Drag a selection rectangle across both channels of the Buffer Amplifier circuit, similar to the following example.<br />
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September, 2005<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-29<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
All parts and wires in the rectangle are selected. 3. Right-click and select Add Part(s) To Group from the pop-up menu. The Add Parts window appears. 4. Select Buffer Amplifier and click Add. 5. Click OK to continue. 6. Press <Esc> to deselect all parts and wires. 7. Select Window - Part Manager - CIS.dsn. This brings the Part Manager window to the foreground. 8. In the Part Manager window, click on the Buffer Amplifier folder. The parts you selected in the schematic are listed in the panel to the right.<br />
<br />
Adding Parts to the Output Filter Group 1. Select Window - (SCHEMATIC1 : PAGE1). This brings the schematic window to the foreground. 2. Drag a selection rectangle across both channels of the Output Filter, similar to the following example.<br />
<br />
10-30<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
3. Right-click and select Add Part(s) To Group. 4. In the Add Parts window, select Output Filter and click Add. 5. Click OK to continue. 6. Press <Esc>. 7. Select Window - Part Manager - CIS.dsn. This brings the Part Manager window to the foreground again. 8. In the Part Manager window, click on the Output Filter folder. The parts you selected in the schematic display in the panel to the right. 9. Click on the Common folder, and notice that the parts you added to the other two groups have been removed from this folder.<br />
<br />
Note You can also add parts to a group by dragging them from the Common folder and dropping them onto another group folder. To move a part back into the Common folder, you must select it, rightclick, and select Remove from the pop-up menu.<br />
<br />
Saving the Design 1. Select Window - CIS.opj. This brings the Project Manager to the foreground. 2. In the Project Manager window, select the design file, and select File Save.<br />
<br />
September, 2005<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-31<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
3. Select Window - (SCHEMATIC1 : PAGE1). This brings the schematic window to the foreground. 4. Select File - Close to close the schematic window.<br />
<br />
Building Subgroups 1. Select Window > Part Manager - CIS.dsn. This brings the Part Manager window to the foreground again. 2. In the Part Manager, click on the Buffer Amplifier folder, right-click, and select New Subgroup from the pop-up menu. 3. In the New Subgroup window, enter: Assembly #1<br />
<br />
4. Click OK (or press <Enter>). 5. Add a second subgroup to the Buffer Amplifier folder called Assembly #2. 6. In the Part Manager, double click on the Buffer Amplifier folder to expand the tree, as shown below.<br />
<br />
7. Click the new subgroup folders and notice that each group contains the same parts. These new subgroups will be edited to represent two different assemblies of the Buffer Amplifier circuit.<br />
<br />
Modifying Buffer Amplifier Assembly #1 1. In the Part Manager, click on the Assembly #1 folder. The parts list displays in the panel to the right. You will be changing the resistance value of one of the resistors in this list. 2. In the right panel, you can adjust the width of the columns, or click on any column header to sort the parts in the list. 3. Click on the Value column header to sort the parts by value. 10-32<br />
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Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
4. Select one of the 2.0K resistors. 5. Right-click and select Link Database Part from the pop-up menu. The CIS Explorer window appears. Notice that the Explorer window automatically searches the database for all parts with a 2.0K value. 6. At the bottom of the Explorer window, click on any of the resistors in the CIS database, as shown below.<br />
<br />
7. Find the property window located just above the spreadsheet. This window compares the resistor you selected in the Assembly #1 folder (properties shown in the Schematic Contents column) against the resistor you just selected in the spreadsheet (properties shown in the Database Contents column). 8. Notice that the Schematic Contents column shows a PCB Footprint property value of SM/R_1206. (If not highlighted in red, select a different resistor from the CIS Explorer spreadsheet) Red is used to flag differences between properties found on the part in the design (Schematic Contents column) and properties found on the part currently selected in the spreadsheet (Database Contents column).<br />
<br />
Caution Watch out for PCB Footprint property differences, as this type of modification will cause a problem on the PCB.<br />
<br />
September, 2005<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-33<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
To modify the resistance value without changing the footprint pattern, you will need to filter the spreadsheet. 9. Use the Query filter to search the database for parts with a specific footprint pattern, as shown below.<br />
<br />
The Explorer window displays all resistors with a PCB Footprint property value of SM/R_1206. 10. Select any one of the resistors from the spreadsheet below and notice the difference in part number and resistance value flagged in red. This type of modification will not cause a problem on the PCB. 11. To apply the selection to the Part Manager, right-click and select Link Database Part. The Part Manager window comes to the foreground, and the selected resistor now displays a modified value and part number.<br />
<br />
Modifying Buffer Amplifier Assembly #2 1. Click on the Assembly #2 folder. The associated parts are listed in the panel to the right. In this assembly, some parts will be left off the PCB. 2. Use <Ctrl+LMB> to select both of the 75K resistors. 3. Right-click and select Set Part As Not Present from the pop-up menu, as shown in the following graphic.<br />
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10-34<br />
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Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2005<br />
<br />
Lesson 10<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
The Value and Part Number fields for the selected resistors now state “Do Not Stuff”.<br />
<br />
Saving the Design 1. Select Window - cis.opj. This brings the Project Manager to the foreground. 2. In the Project Manager window, select the design file, and select File Save. 3. Click Yes to continue.<br />
<br />
Closing the CIS Explorer Window 1. Select Window - CIS Explorer, and OK to continue. 2. Close the CIS Explorer window.<br />
<br />
September, 2005<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
10-35<br />
<br />
Using Component Information System (CIS) (Optional)<br />
<br />
Lesson 10<br />
<br />
Creating Output Filter Subgroups 1. Select Window - Part Manager - CIS.dsn. 2. In the Part Manager window, click on the Output Filter folder. 3. Right-click and select New Subgroup from the pop-up menu. 4. In the New Subgroup window, enter: Assembly #1<br />
<br />
5. Click OK (or press <Enter>). 6. Add a second subgroup to the Output Filter folder called Assembly #2. 7. Double click the Output Filter folder to expand the tree. These new subgroups will be edited to represent two different assemblies of the Output Filter circuit.<br />
<br />
Modifying Output Filter Assembly #1 1. In the Output Filter folder, click on Assembly #1. 2. Click on the Part Reference column header to sort the parts list. 3. Use <Ctrl+LMB> to select L1 and L2. 4. Right-click and select Set Part As Not Present from the pop-up menu.<br />
<br />
Modifying Output Filter Assembly #2 1. In the Output Filter folder, click on Assembly #2. 2. Use <Ctrl+LMB> to select L3 and L4. 3. Right-click and select Set Part As Not Present from the pop-up menu.<br />
<br />
Saving the Design 1. Select Window - CIS.opj. This brings the Project Manager to the foreground. 2. In the Project Manager window, select the design file, and select File Save. 3. Click Yes to continue.<br />
<br />
Building BOM Variants Now that you have defined the variations within the Buffer Amplifier and Output Filter circuits, you can use these subassembly folders to create design variants for Europe and Asia.<br />
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1. In the Part Manager window, click on the BOM Variants folder, rightclick, and select New BOM Variant from the pop-up menu. 2. In the New BOM Variant window, enter: Europe<br />
<br />
3. Click OK. 4. Create a second BOM Variant named Asia. 5. Double click on the BOM Variants folder to expand the tree.<br />
<br />
6. Press and hold the left mouse button, drag the Common folder, and drop it onto the Asia folder. 7. Now drag and drop the Common folder onto the Europe folder.<br />
<br />
8. Double click on the Asia and Europe folders to display the Common folders within.<br />
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<br />
9. Now drag and drop the Assembly #1 folders from the Buffer Amplifier and Output Filter folders onto the Asia folder.<br />
<br />
10. Similarly, drag and drop the Assembly #2 folders from the Buffer Amplifier and Output Filter folders onto the Europe folder.<br />
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11. Click the three sub-folders under Asia and Europe to see the differences between these two design variants. 12. In the Project Manager window, click on the design file and select File - Save, and Yes to continue.<br />
<br />
Variant BOM Reports 1. In the Part Manager window, click on the Asia folder, right-click, and select Reports - Variant Report from the pop-up menu. 2. In the Variant Report window, click OK. The BOM report for the Asia variant appears. The report lists the differences between the Asia variant and the core design. 3. Close the report window, and click No to discard changes. 4. Click on the Europe folder, right-click and select Reports Standard BOM from the pop-up menu. 5. In the Variants section (bottom), notice that Europe is automatically selected. 6. Click OK. This is a standard format BOM report for the Europe variant. Notice the missing inductors and resistors. 7. Close the report window, and click No to discard changes.<br />
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<br />
Saving and Closing the Project 1. In the Project Manager window, click on the design file and select File - Save, and Yes to continue. 2. Close the Part Manager window. 3. Select File - Close Project and Yes to continue.<br />
<br />
Exiting the OrCAD Capture Software 1. Select File - Exit. STOP<br />
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Benefits of CIS Part Management Benefits of CIS part management include: •<br />
<br />
Automatically consolidate part definition input from various departments<br />
<br />
•<br />
<br />
Import part data from existing company databases<br />
<br />
•<br />
<br />
Automatically enter new parts into approval process<br />
<br />
•<br />
<br />
Ensure production designs only contain approved parts<br />
<br />
•<br />
<br />
Automatically update schematics to reflect changes made to approved parts<br />
<br />
•<br />
<br />
Ensure Bill of Materials reflect the most up-to-date part data<br />
<br />
A parts database accessed and managed through CIS offers many advantages over using library-based parts. You can ensure that designs use only company-approved parts, and that designs and Bills of Materials always reflect up-to-date part parameters. You also have an orderly mechanism for consolidating part data throughout your company.<br />
<br />
Migrating to a Parts Database Approach Parts Libraries<br />
<br />
Parts Database<br />
<br />
Parts linked to database definitions<br />
<br />
Parts originally placed from libraries U1A U2A<br />
<br />
U3A<br />
<br />
U3B<br />
<br />
VCC<br />
<br />
GND<br />
<br />
166<br />
<br />
Once you have a parts database and CIS set up for new designs, you can place parts in schematics directly from your company’s preferred parts database.<br />
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But how do you migrate from an environment in which designs are created from parts libraries to one in which designs are based on a parts database? You need to convert your existing designs from using library parts to parts in your Preferred Parts database. CIS supports a process for doing this.<br />
<br />
More Information Before performing a part status check that identifies parts containing inconsistent or inaccurate part property data (using the Update Part Status command), link the representation of each library part on the schematic to a database part definition (using the Link Database Part command). This replaces the part and its properties with the database part and its transferable properties. If you do not have a parts database set up, you have several options for creating one. You can:<br />
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10-42<br />
<br />
•<br />
<br />
Use the CIS Database Creation Wizard, which is a free utility available from the www.ema-eda.com website. This wizard extracts all parametric properties from parts in designs, including symbols and their library sources, then uses this information to populate a database for you.<br />
<br />
•<br />
<br />
Engage the Database Creation Service, which is provided by parts database experts at Cadence that delivers a parts database designed for your company's requirements. The database delivered is populated with the parts and data you have been using to date.<br />
<br />
•<br />
<br />
Engage the CIS Implementation Service, which is a full custom implementation of CIS in your environment, that includes database creation, conversion of all prior sources of parts information, on-site installation, configuration and verification of CIS and your database.<br />
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Terminology The following table defines terms pertaining to parts databases and CIS.<br />
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Term<br />
<br />
Definition<br />
<br />
Parts database<br />
<br />
A structured repository of part-related information. May be a spreadsheet, or a set of database records.<br />
<br />
Database part<br />
<br />
A part whose defining attributes are specified in a database information structure that is editable using a spreadsheet or database program.<br />
<br />
Library part<br />
<br />
A part whose defining attributes are stored in a parts library, and edited through a schematic editor.<br />
<br />
ODBC<br />
<br />
Stands for “Open Database Connectivity”. A Driver Manager and a set of ODBC drivers that enable applications to access data from databases using SQL (Structured Query Language) as a standard language.<br />
<br />
ODBC data source<br />
<br />
The database file or database file server, and the associated ODBC driver that CIS will use to access part data.<br />
<br />
DSN<br />
<br />
Data source name. A name identifying an ODBC data source (that is, a database). Not to be confused with the .dsn extension designating OrCAD design files.<br />
<br />
.dbc file<br />
<br />
The CIS Database Configuration File. Specifies certain configurable attributes of the CIS database. In order to access the database you want to use, OrCAD Capture must point to a corresponding .dbc file/<br />
<br />
Transferable properties<br />
<br />
Properties defined in a parts database, which are designated to be transferred to parts placed on schematics. Properties are designated as transferable in the CIS database configuration (.dbc) file.<br />
<br />
MRP database<br />
<br />
Manufacturing Resource Planning database. You can create or update a parts database from an MRP database.<br />
<br />
ERP database<br />
<br />
Enterprise Resource Planning database, next generation MRP. You can create or update a parts database from an ERP database.<br />
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A Appendix A:<br />
<br />
Keyboard Shortcuts Capture provides two types of keyboard shortcuts for common tasks: •<br />
<br />
Shortcut keys provide a quick way to perform other types of actions such as scrolling across an editor's window. Shortcut keys include <Ctrl+key> such as <Ctrl+Delete> to delete, shift keys such as <Shift+P> to place a part, and function keys such as <F4> to repeat a command.<br />
<br />
•<br />
<br />
Menu access keys are a quick way to issue menu commands. For example, pressing <Alt rel="nofollow"> then <E>, then <T> executes the Cut command found on the Edit menu.<br />
<br />
When you select a tool in the part editor or schematic page editor, the tool palette becomes active. As a result, many keyboard shortcuts are not available until you make the editor window active again. The easiest way to do this is to click in the title bar of the editor window as soon as you have the tool selected. You don't have to press the <Shift> key to use most of the <Shift+> shortcuts. For example, pressing either <P> or <Shift+P> has the same result. These shortcuts are marked with <Shift> in Help and on OrCAD Capture menus for visibility. The description of each menu command includes keyboard, mouse, and other shortcuts. Many shortcuts are available while you use another command. For example, you can use <Shift+I> and <Shift+O> to zoom in and out while you move and place objects. The tables in this Appendix group keyboard shortcuts by the OrCAD Capture structures in which they are available. The conventions for representing key combinations are as follows:<br />
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•<br />
<br />
<Key1+Key2> means you press these keys simultaneously.<br />
<br />
•<br />
<br />
<Key1>, <Key2> means you press these keys sequentially.<br />
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.<br />
<br />
Environment<br />
<br />
Action<br />
<br />
Keyboard Shortcut<br />
<br />
All OrCAD Capture Windows<br />
<br />
Exit<br />
<br />
<ALT+F4 rel="nofollow"><br />
<br />
Exit<br />
<br />
<ALT rel="nofollow">, <F>, <X><br />
<br />
Exit<br />
<br />
<ALT, Spacebar rel="nofollow">, <C><br />
<br />
Select All<br />
<br />
<Ctrl+A><br />
<br />
Ascend hierarchy<br />
<br />
<Shift+A><br />
<br />
Descend hierarchy<br />
<br />
<Shift+D><br />
<br />
Place bus<br />
<br />
<Shift+B><br />
<br />
Place bus entry<br />
<br />
<Shift+E><br />
<br />
Place ground<br />
<br />
<Shift+G>, <G><br />
<br />
Place junction<br />
<br />
<Shift+J><br />
<br />
Place net alias<br />
<br />
<Shift+N><br />
<br />
Place no-connect<br />
<br />
<Shift+X><br />
<br />
Place part<br />
<br />
<Shift+P><br />
<br />
Place power<br />
<br />
<Shift+F>, <F><br />
<br />
Place text<br />
<br />
<Shift+T><br />
<br />
Place wire<br />
<br />
<Shift+W><br />
<br />
Place polyline<br />
<br />
<Shift+Y><br />
<br />
Record macro<br />
<br />
<F7><br />
<br />
Play macro<br />
<br />
<F8><br />
<br />
Configure macro<br />
<br />
<F9><br />
<br />
Previous part<br />
<br />
<Ctrl+B><br />
<br />
Next part<br />
<br />
<Ctrl+N><br />
<br />
Add a new column or row<br />
<br />
<Ctrl+N><br />
<br />
Apply a change<br />
<br />
<Ctrl+P><br />
<br />
Edit the Display Properties for a selected cell<br />
<br />
<Ctrl+D><br />
<br />
Delete a property<br />
<br />
<Ctrl+L><br />
<br />
Give focus to the Filter by dropdown list<br />
<br />
<Ctrl+B><br />
<br />
Schematic Page Editor<br />
<br />
Part Editor<br />
<br />
Property Editor<br />
<br />
A-2<br />
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Keyboard Shortcuts<br />
<br />
Environment<br />
<br />
Schematic Page and Part Editors<br />
<br />
Schematic Page and Part Editors<br />
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<br />
Action<br />
<br />
Keyboard Shortcut<br />
<br />
Edit a cell<br />
<br />
<Ctrl+E><br />
<br />
Find a value in a column<br />
<br />
<Delete><br />
<br />
Delete the contents of a cell<br />
<br />
<Ctrl+N><br />
<br />
Copy<br />
<br />
<Ctrl+C><br />
<br />
Edit properties<br />
<br />
<Ctrl+E><br />
<br />
Find<br />
<br />
<Ctrl+F><br />
<br />
Go to<br />
<br />
<Ctrl+G><br />
<br />
Print<br />
<br />
<Ctrl+P><br />
<br />
Rotate<br />
<br />
<Ctrl+R><br />
<br />
Save<br />
<br />
<Ctrl+S><br />
<br />
Cursor snap to grid (identical to the Preferences dialog box Grid display tab option).<br />
<br />
<Ctrl+T><br />
<br />
Ungroup<br />
<br />
<Ctrl+U><br />
<br />
Paste<br />
<br />
<Ctrl+V><br />
<br />
Cut<br />
<br />
<Ctrl+X><br />
<br />
Redo<br />
<br />
<Ctrl+Y><br />
<br />
Undo<br />
<br />
<Ctrl+Z><br />
<br />
Repeat<br />
<br />
<F4><br />
<br />
Delete (Design and Edit menus)<br />
<br />
<Del><br />
<br />
Delete (Design and Edit menus)<br />
<br />
<Delete><br />
<br />
Delete (Design and Edit menus)<br />
<br />
<Backspace><br />
<br />
Double-click left mouse button<br />
<br />
<Enter><br />
<br />
Deselect all and switch to selection tool (arrow pointer)<br />
<br />
<Escape> or <Esc><br />
<br />
Click left mouse button<br />
<br />
<Space><br />
<br />
Move 1 grid up (grid on) or 0.1 grid up (grid off)<br />
<br />
<Up Arrow><br />
<br />
Move 1 grid down (grid on) or 0.1 grid down (grid off)<br />
<br />
<Down Arrow><br />
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<br />
Environment<br />
<br />
Session Log<br />
<br />
Text boxes<br />
<br />
A-4<br />
<br />
Action<br />
<br />
Keyboard Shortcut<br />
<br />
Move 1 grid left (grid on) or 0.1 grid left (grid off)<br />
<br />
<Left Arrow><br />
<br />
Move 1 grid right (grid on) or 0.1 grid right (grid off)<br />
<br />
<Right Arrow><br />
<br />
Snap pointer to nearest grid and then move 5 grids up<br />
<br />
<Ctrl+Up Arrow><br />
<br />
Snap pointer to nearest grid and then move 5 grids down<br />
<br />
<Ctrl+Down Arrow><br />
<br />
Snap pointer to nearest grid and then move 5 grids left<br />
<br />
<Ctrl+Left Arrow><br />
<br />
Snap pointer to nearest grid and then move 5 grids right<br />
<br />
<Ctrl+Right Arrow><br />
<br />
Pan up<br />
<br />
<Page Up><br />
<br />
Pan down<br />
<br />
<Page Down><br />
<br />
Pan left<br />
<br />
<Ctrl+Page Up><br />
<br />
Pan right<br />
<br />
<Ctrl+Page Down><br />
<br />
Redraw<br />
<br />
<F5><br />
<br />
Center the view at the pointer's current position<br />
<br />
<D><br />
<br />
Mirror horizontally<br />
<br />
<H><br />
<br />
Zoom in<br />
<br />
<I><br />
<br />
Zoom out<br />
<br />
<O><br />
<br />
Rotate<br />
<br />
<R><br />
<br />
Mirror vertically<br />
<br />
<V><br />
<br />
Begin a wire, bus, or polyline (corresponding tool active)<br />
<br />
<Shift+B><br />
<br />
End a wire, bus, or polyline (corresponding tool active)<br />
<br />
<Shift+E><br />
<br />
Clears the session log<br />
<br />
<Ctrl+Del><br />
<br />
Clears the session log<br />
<br />
<Ctrl+Delete><br />
<br />
Delete the selected text<br />
<br />
<Backspace><br />
<br />
Delete the selected text<br />
<br />
<Del><br />
<br />
Delete the selected text<br />
<br />
<Delete><br />
<br />
Copy selected text to the Clipboard<br />
<br />
<Ctrl+C><br />
<br />
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Keyboard Shortcuts<br />
<br />
Environment<br />
<br />
September, 2006<br />
<br />
Action<br />
<br />
Keyboard Shortcut<br />
<br />
Paste the Clipboard contents<br />
<br />
<Ctrl+V><br />
<br />
Cut the selected text to the Clipboard<br />
<br />
<Ctrl+X><br />
<br />
Undo the last edit<br />
<br />
<Ctrl+Z><br />
<br />
Select word and any following space<br />
<br />
<Double Click><br />
<br />
Extend selection from the insertion point to cursor<br />
<br />
<Shift+Click><br />
<br />
Jump right one word<br />
<br />
<Ctrl+Right Arrow><br />
<br />
Jump left one word<br />
<br />
<Ctrl+Left Arrow><br />
<br />
Jump to the beginning of the line<br />
<br />
<Home><br />
<br />
Jump to the end of the line<br />
<br />
<end><br />
<br />
Jump to the beginning of the text box<br />
<br />
<Ctrl+Home><br />
<br />
Jump to the end of the text box<br />
<br />
<Ctrl+End><br />
<br />
Extend selection from insertion point to beginning of multiple-line text box<br />
<br />
<Shift+Home><br />
<br />
Extend selection from insertion point to end of multiple-line text box<br />
<br />
<Shift+End><br />
<br />
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B Appendix B:<br />
<br />
Custom Property Filters In Lesson 5, we discussed the Property Editor, and the default property filters that come with Capture. These include Allegro PCB Editor and OrCAD Layout filters that let you work with a list of part or net properties specific to these PCB tools, without having to view other unrelated properties at the same time. There are also several vendor-specific filters that apply to FPGA design. The Property Editor lets you create custom property filters for different purposes. For example, you may want to view only a handful of properties required for your Bill of Materials report. Or you may want to check all parts for a valid footprint, and don’t want to scan through a long list of properties to find just the PCB Footprint property name. In this case, you can create a custom filter that displays only a specific set of properties and associated values. Use the following procedure to create a custom property filter. 1. Open an existing design and double click on a part to display the Property Editor. 2. If necessary, pivot the spreadsheet so that all current properties appear in a column along the left hand side. See Lab 5-1 for reference. 3. Position the cursor as shown below, click the right mouse button, and select Filters > Add Filters from the pop-up menu.<br />
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<br />
place cursor here and click your right mouse button<br />
<br />
The Add Filters window appears. 4. In the Filter name field, enter: Footprints<br />
<br />
5. Click OK. You just created a new filter called Footprints. Its name appears in the Filter by field at the top of the Property Editor window.<br />
<br />
By default, this new filter contains all the properties that are currently assigned to the selected object. 6. To clear the new filter of all default properties, place your cursor in the same location as previously shown, click right, and select Filters > Show Undefined. 7. In the upper left corner of the Property Editor window, click New Row. The Add New Row window appears. 8. In the Name field, enter: PCB Footprint<br />
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B-2<br />
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Custom Property Filters<br />
<br />
Since this is a reserved property name in OrCAD Capture, you must enter it exactly as it is spelled.<br />
<br />
Note If the part you have selected already has a PCB Footprint property assigned in the schematic, its name will automatically appear in the Value field. 9. Click Apply. The PCB Footprint property is added to the new filter.<br />
<br />
Note If you misspell a reserved property name, you must select the applicable row and use the Filters > Undefined command to remove (undefine) it. You cannot edit a property name after it has been added to the filter list. 10. In the Name field, enter: MyProperty<br />
<br />
This could be a new user property that you want to add. 11. Click OK. The user property is added to the filter. Notice that when a user property has no assigned value, the cell contains gray, diagonal lines. 12. Close the Property Editor window. 13. Double click on another part in the schematic, and notice that the Property Editor window defaults to the last filter setting, Footprints. You now have a custom filter that can be used to view or edit a specific list of properties for a part. This filter could also contain properties for nets, pins, and other design objects. You would need to select a net or pin before you add net or pin properties to the filter. 14. To remove the new filter from OrCAD Capture, position the cursor as previously shown, click right, and select Filters > Remove Current Filter. The Footprints filter is deleted from OrCAD Capture. As discussed in Lesson 5, all custom filters are stored in a prefprops.txt file located in the OrCAD Capture installation directory. You can change any filter supplied with OrCAD Capture except the <Current properties> filter.<br />
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Appendix B<br />
<br />
More Filter Commands The Filter command pop-up menu contains several other useful commands. For example, you can use the Hide option to remove a property from the spreadsheet, but not from the filter itself. Use the Invert Filter command to toggle the display between properties defined in the current filter or properties on the selected object that are not defined in the current filter (including hidden and optional properties). The Show Undefined option toggles the display between properties defined in the current filter or properties defined in the filter plus any properties on the selected object not defined in the current filter. When you create a new filter, by default, the Show Undefined option is enabled. This causes all current properties on the selected object to display in the spreadsheet (because they are not yet defined as part of the current filter). Use the Show option to add a current property to the current filter, or to redisplay a hidden property. Use the Undefined option to remove the selected property from the current filter. Setting the status of a property to Optional causes a user-defined property to disappear from the spreadsheet if no value exists on the selected object. The Optional setting has no effect on reserved property names. Please keep in mind that we are talking about controlling the display of properties in the Property Editor spreadsheet (not the visibility of properties and values in the schematic for the selected object).<br />
<br />
Null versus Blank Property Values To set a property value to <null>, select the property value cell in the spreadsheet and click the Delete Property button. For user-defined properties, the cell then displays a pattern of diagonal lines to indicate a null value. If you use the <Delete> or <Backspace> keys to clear a property value from a cell, the selected property will have a blank value instead.<br />
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C Appendix C:<br />
<br />
More Symbol and Part Creation<br />
<br />
Creating a Power Symbol 1. In the project window, open the part library file TRNG.OLB. 2. Choose Design > New Symbol. The New Symbol Properties dialog box appears, as shown in the following picture:<br />
<br />
3. Name the symbol VCC, set the Symbol Type to Power, and click OK. 4. Select View > Zoom> All to see the symbol graphics, which should resemble the following picture:<br />
<br />
connection point<br />
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5. Drag the connection point to the bottom center of the bounding box. 6. Draw a vertical line one grid long, up from the connection point. 7. Draw a circle (or an arrow shape) on the top of a line drawn from the connection point. If this requires the circle to be placed off-grid, disable snap-to-grid by clicking the Snap To Grid toolbar icon (so that it turns red) or press <Ctrl+T>. Then draw (or Move) the circle off-grid as needed. Zoom in to help with the placement, if necessary.<br />
<br />
Caution Be sure to turn grid snap back on by clicking on the Snap to Grid toolbar icon again or by pressing <Ctrl+T>. 8. Using the techniques you learned in previous labs, make the VALUE property value visible. 9. Position the part name so it is located in the upper left corner of the bounding box. The symbol should resemble one of the following examples:<br />
<br />
10. Save the symbol and close it.<br />
<br />
Creating a Heterogeneous Part - 754LS241 These two symbols below are sections within the same physical package. What makes the sections unique are the output enable pins, 1OE (active low) and 2OE (active high). As you complete the steps in this section, you will create this heterogeneous part.<br />
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1. In the Project Manager window, select the part library file TRAINING-LIB.OLB and select Design > New Part. The New Part Properties dialog box appears. 2. Copy the settings shown in the following picture.<br />
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3. Click OK.<br />
<br />
Creating the Symbol for Section One 1. Set your window to full, then select View > Zoom > All (or click the button in the toolbar) to adjust the view. 2. Click on the package boundary and expand it by two grid spaces, as shown below:<br />
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3. Select Place > Rectangle (or click the Place rectangle icon) and click to add the rectangle as shown below.<br />
<br />
Adding Pins for Section One 1. Click the Place > Pin Array button. 2. Enter the information shown in the following picture, then click OK.<br />
<br />
3. The pin image appears, attached to the cursor. Position it as shown in the following picture, and click to place it.<br />
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4. Select Place > Pin Array. 5. Enter the information shown in the following picture, then click OK.<br />
<br />
6. Place the output pins 1Y1 through 1Y4. 7. Select Place > Pin. 8. Enter the information shown in the following picture, then click OK.<br />
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9. Place the 1OE input pin. 10. Add the GND and VCC pins for the part. When you are finished, the part should look like the picture that follows (move the Reference Designator and Value properties, if necessary).<br />
<br />
11. Select Options > Part Properties, and add a PARTGROUP property to the part. Leave the Value field blank and use the Display button in the User Properties from to make the property visible. 12. Select all the pins using <Ctrl+LM>. 13. Select Edit > Properties to open the Browse Spreadsheet.<br />
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14. Add the pin numbers for each pin on the part (refer to the part diagram at the beginning of this lab), then change the 1OE pin to Dot, as shown the graphic that follows.<br />
<br />
15. Click OK. The part should look like the following picture.<br />
<br />
16. Select File > Save.<br />
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More Symbol and Part Creation<br />
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Creating the Symbol for Section Two 1. Select View > Next Part. 2. Using the skills you learned above, create the next section in the package. What makes this section unique from section one is the 2OE pin, which is active high (no Dot). Please refer to the diagram at the beginning of this lab for the pin names and numbers on section two. 3. Select File > Save. 4. Close the Part Editor window.<br />
<br />
Testing the 74LS241 Part 1. Select File > New Design. 2. Select Place > Part. 3. Select the 74SL241 part from the TRNG library, as shown below:<br />
<br />
Notice that the Packaging section of the Place Part form shows two parts per package. The Part field defaults to A, or section one of the package. 4. Place the part on the schematic<br />
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5. Add the second section of the 74LS241 package into the schematic by toggling the Part field in the Place Part form to B. 6. Use <Ctrl+LMB> to select both instances of the 74LS241 in the schematic. 7. Click right and select Edit Properties from the pop-up menu. 8. In the Property Editor window, locate the PARTGROUP property. 9. Set the PARTGROUP property value to 1 for both instances. 10. You may need to pivot your Property Editor window to match the example below (optional).<br />
<br />
11. Click Apply and close the Property Editor. 12. In the Project Manager window, select the design name. 13. Select Tools > Annotate. 14. Under Physical Packaging, add the PARTGROUP property to the end of the Combined Property String. 15. Be sure to enclose the property name in curly braces, as shown in the following graphic.<br />
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16. Click OK. 17. Check the schematic to see if the two sections of the 74LS241 part were placed into the same package (same reference designator). 18. Close the test schematic.<br />
<br />
Note If the PARTGROUP property had not been added to the Combined Property String, it would have been ignored during annotation, resulting in two separate 74LS241 packages.<br />
<br />
Note To pin swap in Allegro PCB Editor, the SPLIT property must be added to all sections of a heterogeneous part. Give the SPLIT property a value of TRUE. There must not be any duplicate pins across the sections of the split part.<br />
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D Appendix D:<br />
<br />
Creating a Hierarchical Block<br />
<br />
Lab Objective This appendix provides hands-on experience in addition to Lesson 6. After you complete this lab, you will be able to manually create a hierarchical block.<br />
<br />
Overview If an existing schematic is already part of the Design Folder and has hierarchical ports for inputs and outputs, when you create a hierarchical block referencing that schematic, OrCAD Capture automatically places the appropriate pins on the block symbol as demonstrated in previous lab exercises. If you want to create the hierarchical block first and create a schematic view later, you must build the block symbol manually. In this supplemental lab exercise, you will manually build the hierarchical block in the Data schematic as shown in the graphic below.<br />
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Creating a Hierarchical Block<br />
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Appendix D<br />
<br />
Drawing the Rectangle 1. In the Project Manager, double click on Data Pg1 of the Data Schematic. 2. Click in the Data schematic window, and select the Place hierarchical block icon<br />
<br />
.<br />
<br />
3. In the Reference field, enter: LOGIC<br />
<br />
4. Set the Implementation Type to Schematic View. 5. In the Implementation name field, enter: LOGIC Circuit<br />
<br />
6. Click OK. 7. In the lower left corner of the page, drag a rectangle to define a hierarchical block symbol. 8. Press <Esc>. Because there is no LOGIC Circuit schematic yet, the hierarchical block you draw does not have pins created automatically, as occurred in the previous exercise.<br />
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Creating a Hierarchical Block<br />
<br />
Adding Block Pins D0-D7 1. Click on the LOGIC Circuit block symbol, and click the Place pin icon. The Place Hierarchical Pin window displays. 2. In the Name field, enter: D0<br />
<br />
3. Set the Type field to Input and click OK. A hierarchical pin attaches to the edge of the rectangle. As you move your cursor, the block pin moves along the perimeter of the rectangle. 4. Click to place the pin along the left edge of the rectangle, near the lower left corner. 5. Move your cursor up one grid and click to add another block pin. OrCAD Capture automatically increments the pin name to D1. 6. Continue adding block pins D0 through D7. 7. Press <Esc> to exit the command, and <Esc> again to deselect.<br />
<br />
Adding Block Pins VCLK, GAIN, VREF, and OUT 1. Select the block symbol, click the Place pin icon pin two grids above pin D7.<br />
<br />
and add a VCLK<br />
<br />
2. While in add pin mode, click right and select Edit Properties. 3. In the Place Hierarchical Pin window, change the Name field to GAIN and click OK. 4. Add a GAIN pin two grids below pin D0. 5. Add a VREF pin on the right edge of the rectangle. 6. Before adding the next pin, click right and select Edit Properties. a. Change the Name field to OUT. b. Set the Type field to Output and click OK. 7. Add an OUT pin below the VREF pin. 8. Press <Esc> twice. 9. Save the design.<br />
<br />
Creating the LOGIC Circuit Schematic 1. Click on the LOGIC Circuit block symbol, click right, and select Descend Hierarchy.<br />
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OrCAD Capture prompts you for the name of the new LOGIC Circuit schematic page. 2. Click OK. The LOGIC Circuit schematic window opens. Observe how OrCAD Capture automatically adds hierarchical port symbols to the new schematic page. These ports correspond to the pins you added to the block symbol. 3. Save the design and close both the LOGIC Circuit and Data schematic pages. 4. In the Project Manager window, observe that a new schematic folder was added for the LOGIC Circuit. The LOGIC Circuit block symbol and its associated schematic have been left unconnected. In the next lesson, these errors will be flagged by the DRC program. STOP<br />
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E Appendix E:<br />
<br />
Allegro Technology Properties<br />
<br />
Overview You use Allegro technology properties in an OrCAD Capture schematic to control placement and routing processes (the properties get passed to the Allegro PCB Editor design). This Appendix lists all Allegro PCB Editor properties alphabetically, in a quick-reference table. To get a detailed description of each of the properties listed, see the Allegro Properties, Reports, and Extract Reference in the Cadence online documentation library. The following is a description of the columns in the Allegro PCB Editor properties table, and the types of information contained in them.<br />
<br />
Column Heading<br />
<br />
Description<br />
<br />
Property Name<br />
<br />
The name of the Allegro PCB Editor property. An asterisk by the name means Allegro PCB Editor attaches the property automatically in response to a particular Allegro Design Entry HDL property. The Legal Value column lists the Allegro Design Entry HDL property.<br />
<br />
On<br />
<br />
A letter code identifying the legal elements to which the given property can be attached. The following table describes the meaning of each letter code. If the property is one that can be attached to a reference designator, it can be added through the schematic (Allegro Design Entry HDL). Reference Letter<br />
<br />
Allegro PCB Editor Element<br />
<br />
Defined Where?<br />
<br />
D<br />
<br />
Device<br />
<br />
Part Table File chips view<br />
<br />
N<br />
<br />
Net<br />
<br />
Schematic<br />
<br />
R<br />
<br />
Reference designator (component)<br />
<br />
Schematic<br />
<br />
Used By<br />
<br />
The tools that use the given property<br />
<br />
Legal Value<br />
<br />
The values Allegro PCB Editor expects the property to have. Many properties have the value YES, which activates (enables) the property.<br />
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Allegro PCB Editor Properties Table<br />
<br />
Property Name<br />
<br />
On<br />
<br />
Used By<br />
<br />
Legal Value<br />
<br />
ALT_SYMBOLS<br />
<br />
D<br />
<br />
Placement<br />
<br />
Package symbol names<br />
<br />
DELAY_RULE<br />
<br />
N<br />
<br />
Constraints, Autoroute<br />
<br />
See Properties Glossary; Allegro User Guide: Routing<br />
<br />
DIFFERENTIAL_PAIR<br />
<br />
N<br />
<br />
Autorouter, Constraints<br />
<br />
Pair name<br />
<br />
DIFFP_2ND_LENGTH<br />
<br />
N<br />
<br />
Constraints<br />
<br />
Length<br />
<br />
DIFFP_LENGTH_TOL<br />
<br />
N<br />
<br />
Constraints<br />
<br />
Length<br />
<br />
DRIVER_TERM_VAL<br />
<br />
N<br />
<br />
Auto Term Assign<br />
<br />
Value of a terminator component to be added to the driver end of the ECL net<br />
<br />
ECL<br />
<br />
N<br />
<br />
Auto Term Assign, Autoroute<br />
<br />
YES<br />
<br />
ELECTRICAL_CONSTRAINT_SET<br />
<br />
N<br />
<br />
Constraints<br />
<br />
Name of constraint set<br />
<br />
HARD_LOCATION<br />
<br />
R<br />
<br />
Rename, Autoswap<br />
<br />
YES<br />
<br />
IMPEDANCE_RULE<br />
<br />
N<br />
<br />
Constraints, Autoroute<br />
<br />
See Properties Glossary; Allegro User Guide: Routing<br />
<br />
LOAD_TERM_VAL<br />
<br />
N<br />
<br />
Auto Term Assign<br />
<br />
Resistor value to be selected as load end terminator<br />
<br />
MATCHED_DELAY<br />
<br />
N<br />
<br />
Constraints<br />
<br />
Length<br />
<br />
MAX_PARALLEL<br />
<br />
N<br />
<br />
Constraints<br />
<br />
Length<br />
<br />
MAX_VIA_COUNT<br />
<br />
N<br />
<br />
Constraints<br />
<br />
Integer<br />
<br />
MIN_LINE_WIDTH<br />
<br />
N<br />
<br />
Constraints<br />
<br />
Width<br />
<br />
MIN_NECK_WIDTH<br />
<br />
N<br />
<br />
Constraints<br />
<br />
Width<br />
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Allegro Technology Properties<br />
<br />
Property Name<br />
<br />
On<br />
<br />
Used By<br />
<br />
Legal Value<br />
<br />
NET_PHYSICAL_TYPE<br />
<br />
N<br />
<br />
Constraints<br />
<br />
Physical Constraint Set name<br />
<br />
NET_SPACING_TYPE<br />
<br />
N<br />
<br />
Constraints<br />
<br />
Net<br />
<br />
PART_NUMBER<br />
<br />
D<br />
<br />
CIMLink Interface<br />
<br />
String<br />
<br />
RATED_CURRENT<br />
<br />
D<br />
<br />
DF/Viable<br />
<br />
Amperes #<br />
<br />
RATED_POWER<br />
<br />
D<br />
<br />
DF/Viable<br />
<br />
Watts #<br />
<br />
RATED_VOLTAGE<br />
<br />
D<br />
<br />
DF/Viable<br />
<br />
Volts #<br />
<br />
ROOM<br />
<br />
R<br />
<br />
Autoswap, Autopic, Autoroute, Gloss<br />
<br />
Room text<br />
<br />
ROUTE_PRIORITY<br />
<br />
N<br />
<br />
Autoroute<br />
<br />
Positive integer<br />
<br />
SIGNAL_MODEL<br />
<br />
R<br />
<br />
DF/SigNoise<br />
<br />
The name of Packaged Device Model for the component<br />
<br />
TERMINATOR_PACK<br />
<br />
D<br />
<br />
AutoTerm Assignment<br />
<br />
YES<br />
<br />
TOL<br />
<br />
D<br />
<br />
fet2A, Gate Assign, Auto Term Assign<br />
<br />
% tolerance<br />
<br />
Can also be set in netlist<br />
<br />
VALUE<br />
<br />
D<br />
<br />
fet2A, Gate Assign<br />
<br />
Device value<br />
<br />
Can also be set in netlist<br />
<br />
VOLTAGE<br />
<br />
R/N<br />
<br />
DF/Viable<br />
<br />
Volts #<br />
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The Package Device Model defines the electrical I/O models and package parasitics used in signal analysis<br />
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E-4<br />
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Appendix E<br />
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F Appendix F:<br />
<br />
OrCAD Capture to Allegro Technology Net Rules The table included within this appendix lists many OrCAD Capture to Allegro technology net rules. This table provides a brief description of each rule and identifies whether the constraint is supported in PCB Design Studio, Studio Performance & PCB Designer, or PCB Expert.<br />
<br />
OrCAD Capture TO Allegro PCB Editor NET RULES<br />
<br />
Description<br />
<br />
ASSIGN_TOPOLOGY<br />
<br />
Name of net to be treated as a bus by interactive and automatic routing. Allegro Design Entry HDL adds this property automatically for signals identified as part of a bus. You can also attach this property interactively. The values assigned to this rule are string values.<br />
<br />
BUS_NAME<br />
<br />
Name of net to be treated as a bus by interactive and automatic routing. Allegro Design Entry HDL adds this property automatically for signals identified as part of a bus. The values assigned to this rule are string values.<br />
<br />
CLOCK_NET<br />
<br />
This property is related to the Allegro SI timing spreadsheet and the File-Import-Timing command. The Import Timing commands adds this property on a net to store the name of the net that is used to clock the net’s data.<br />
<br />
DIFFP_COUPLED_MINUS<br />
<br />
This property overrides the Coupled Tolerance (-) electrical constraint for differential pairs. Together with DIFFP_COUPLED_PLUS, these two properties define two bands around the primary gap in which the lines of a pair legally go beyond or closer than the DIPPF_PRIMARY_GAP. This value assigned to this property should allow etch to remain above the DIFFP_MIN_SPACE value.<br />
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<br />
PCB Expert<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
F-1<br />
<br />
OrCAD Capture to Allegro Technology Net Rules<br />
<br />
OrCAD Capture TO Allegro PCB Editor NET RULES<br />
<br />
Appendix F<br />
<br />
Description<br />
<br />
PCB Design Studio<br />
<br />
Studio Performance & PCB Designer<br />
<br />
PCB Expert<br />
<br />
DIFFP_COUPLED _PLUS<br />
<br />
This property overrides the Coupled Tolerance (+) electrical constraint for differential pairs. Together with DIFFP_COUPLED_MINUS, these two properties define two bands around the primary gap in which the lines of a pair legally go beyond or closer than the DIFFP_PRIMARY_GAP. When lines of etch are within these bands, they are considered coupled.<br />
<br />
X<br />
<br />
X<br />
<br />
DIFFP_GATHER_CONTROL<br />
<br />
This property overrides the Gather control electrical constraint for differential pairs. You can set values for this rule to either Include or Ignore. The value you select determines whether the line segments that diverge as the pair of nets go from driver pins and to receiver pins should be included or excluded from the DIFP_UNCOUPLED_LENGTH. The points at which the line segments converge after leaving driver ins or diverge as they move toward receiver ins are called gather points. Any other divergences are simply uncoupled segments.<br />
<br />
X<br />
<br />
X<br />
<br />
DIFFP_MIN_SPACE<br />
<br />
This property overrides the Minimum line spacing electrical constraint for differential pairs. Defines a pure line-to-line manufacturing constraint that should always be maintained between the lines in the pair. The value of this property is in design units.<br />
<br />
X<br />
<br />
X<br />
<br />
DIFFP_NECK_GAP<br />
<br />
This property overrides the Neck Gap electrical constraint for differential pairs. Defines the edge-to-edge spacing between a pair as it goes through tight areas full of component pins and vias. The value of this property is in design units.<br />
<br />
X<br />
<br />
X<br />
<br />
DIFFP_PHASE_TOL<br />
<br />
This property replaces DIFFP_LENGTH_TOL. Use this property to override the Phase tolerance electrical constraint for differential pairs. It defines the allowable difference between the length of the lines of etch in a differential pair. The value is a string--either a length or a delay. The units you enter define the value type. If no units are entered, the system assumes a length measurement.<br />
<br />
X<br />
<br />
X<br />
<br />
F-2<br />
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Appendix F<br />
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OrCAD Capture TO Allegro PCB Editor NET RULES<br />
<br />
OrCAD Capture to Allegro Technology Net Rules<br />
<br />
Description<br />
<br />
PCB Design Studio<br />
<br />
Studio Performance & PCB Designer<br />
<br />
PCB Expert<br />
<br />
DIFFP_UNCOUPLED_LENGTH<br />
<br />
This property replaces DIFFP_2ND_LENGTH and overrides the Max uncoupled length electrical constraint for differential pairs. This rule sets the cumulative maximum distance that segments of one net in a differential pair can run inside or outside the coupling band. The value of this property is in design units.<br />
<br />
X<br />
<br />
X<br />
<br />
DRIVER_TERM_VALUE<br />
<br />
Attach to a net. The value of a terminator component not be added to the driver end of the net. Used by the automatic terminator assignment program.<br />
<br />
X<br />
<br />
X<br />
<br />
ECL<br />
<br />
This property identifies a high speed net with a value of either TRUE or FALSE. Used by automatic routing and ratsnest scheduling. If the CL property is attached to a net, Allegro PCB Editor/APD assumes a stub length of zero and a ratsnest schedule of SOURCE_LOAD_DAISY_CHAIN.<br />
<br />
X<br />
<br />
X<br />
<br />
ECL_TEMP<br />
<br />
Attached to nets to be processed by the terminator assignment program in incremental mode.<br />
<br />
EDGE_SENS<br />
<br />
This constraint property defines whether or not a receiver in is sensitive to non-monotonicity in the waveform. The value of this constraint shows which edges of the waveform are sensitive, that is, rising edge only, falling edge only, both edges, or neither edge.<br />
<br />
X<br />
<br />
X<br />
<br />
ELECTRICAL_CONSTRAINT_SET<br />
<br />
This property names the electrical constraint set to apply to the net. Any net that does not have an ELECTRICAL_CONSTRAINT_SET property has the default ECSet.<br />
<br />
X<br />
<br />
X<br />
<br />
EMC_CRITICAL_NET<br />
<br />
String that identifies the class of a critical net. Used by EMControls.<br />
<br />
FIXED<br />
<br />
Attached to components, symbols, nets, pins, vias, clines, lines, filled rectangles, rectangles, shapes and groups. To Indicate that the object cannot be moved or deleted, the automatic router is not to rip up connections in the net, and that glossing is not to be performed on the net assign a TRUE value.<br />
<br />
IMPEDANCE_RULE<br />
<br />
Specifies an impedance restriction between any two pins on a net or between any pin and Tpoint connection on a net. Used by DRC checking and routing.<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
X<br />
<br />
X X<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
F-3<br />
<br />
OrCAD Capture to Allegro Technology Net Rules<br />
<br />
OrCAD Capture TO Allegro PCB Editor NET RULES<br />
<br />
Appendix F<br />
<br />
Description<br />
<br />
PCB Design Studio<br />
<br />
Studio Performance & PCB Designer<br />
<br />
PCB Expert<br />
<br />
MAX_BOND_LENGTH<br />
<br />
Attached to a net or connect line. The maximum length of bonding wire for a net. A bonding wire is any connect line on an Etch subclass of type bonding wire.<br />
<br />
X<br />
<br />
X<br />
<br />
MAX_BVIA_STAGGER<br />
<br />
Attached to a net, the maximum center-to-center distance between the connect point of one pin or blind/buried via (the pin or via’s x,y location) and the connect point of the other, where the two pins or vias are on the same net and have a single connect line joining them.<br />
<br />
X<br />
<br />
X<br />
<br />
MAX_FINAL_SETTLE<br />
<br />
Attached to a net, this property overrides the Maximum Crosstalk Final Settle electrical constraint. Defines the maximum final settle delay for driver/receiver pin pairs in the Xnet of which this net is part. A maximum final settle delay for a rising (falling) edge is the time from when the driver starts switching to when the receiver passes up (down) through the Vil (Vih) switching threshold for the final time.<br />
<br />
X<br />
<br />
MAX_OVERSHOOT<br />
<br />
Attached to a net, this property overrides the Maximum Overshoot electrical constraint. The maximum voltage overshoot tolerated by the net. The default value s 600 mV.<br />
<br />
X<br />
<br />
MAX_PARALLEL<br />
<br />
Attached to a net or connect line. This property overrides the Max parallel electrical constraint. The value is a character string of up to four different lengths and distances. Separate each length-distance value by a colon (:). Separate each length-distance pair by a semicolon (;).<br />
<br />
MAX_PEAK_XTALK, formerly MAX_PEAK_CROSSTALK<br />
<br />
Defines the high and low state maximum peak crosstalk constraints. Values assigned to this rule are string values.<br />
<br />
X<br />
<br />
MAX_SSN<br />
<br />
Attached to a net, this property overrides the Maximum Simultaneous Switching Noise electrical constraint. This rule defines the maximum noise allowed on a net due to simultaneous switching.<br />
<br />
X<br />
<br />
MAX_XTALK<br />
<br />
Specifies the maximum crosstalk summed across all neighbor nets, tolerated by this net. Crosstalk is the transmission of a signal from one etch/conductor trace to another. On a printed circuit board/multi-chip module, parallel etch/conductor can exhibit significant crosstalk.<br />
<br />
X<br />
<br />
F-4<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
X<br />
<br />
X<br />
<br />
September, 2006<br />
<br />
Appendix F<br />
<br />
OrCAD Capture TO Allegro PCB Editor NET RULES<br />
<br />
OrCAD Capture to Allegro Technology Net Rules<br />
<br />
Description<br />
<br />
PCB Design Studio<br />
<br />
Studio Performance & PCB Designer<br />
<br />
PCB Expert<br />
<br />
MIN_BOND_LENGTH<br />
<br />
Attached to a net or connect line. The maximum length of bonding wire for a net. A bonding wire is any connect line on an Etch subclass of type bonding wire.<br />
<br />
X<br />
<br />
X<br />
<br />
MIN_BVIA_GAP<br />
<br />
This rule attaches to a net and evaluates the minimum center-to-center spacing between the connect points of two buried vias that do not share a common layer.<br />
<br />
X<br />
<br />
X<br />
<br />
MIN_BVIA_STAGGER<br />
<br />
Attached to a net. The minimum center-to-center distance between the connect point of one pin or via (the x,y location of the pin or via) and the connect point of the other, where the two pins or vias are on the same net and have a single connect line joining them.<br />
<br />
X<br />
<br />
X<br />
<br />
MIN_FIRST_SWITCH<br />
<br />
Attached to a net, this property overrides the Minimum Crosstalk First Switch electrical constraint. Defines the minimum first switch delay for driver/receiver pin pairs in the Xnet of which this net is a part. A minimum first switch delay for a rising (falling) edge is the time duration the driver starts switching to the time the receiver first passes the Vil (Vih) switching threshold.<br />
<br />
MIN_HOLD<br />
<br />
Used by the Timing Setup/Hold tab of the Allegro PCB Editor Constraint Manager. It defines the minimum hold time of a data signal relative to a clock signal. The value of the property is in nanoseconds and can be attached to either the data net or a pin of the data net.<br />
<br />
MIN_LINE_WIDTH<br />
<br />
This rule attaches to a net and sets the minimum width of a net or line. Use this property to override the Min line width rule in a physical constraint set. It also overrides the Line Width electrical constraint for a differential pair, if set. The value of this property is in design units.<br />
<br />
MIN_NOISE_MARGIN<br />
<br />
This rule attaches to a net. Use this property to override the Minimum Noise Margin electrical constraint. The minimum noise margin tolerated by this net. The default value is 0 mV.<br />
<br />
MIN_SETUP<br />
<br />
This rule is used by the Timing Setup/Hold tab of the Allegro PCB Editor Constraint Manager. It defines the minimum setup time of a data signal relative to a clock signal. The value of this property is in nanoseconds and can be attached to either the data net or a pin of the data net.<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
F-5<br />
<br />
OrCAD Capture to Allegro Technology Net Rules<br />
<br />
OrCAD Capture TO Allegro PCB Editor NET RULES<br />
<br />
Appendix F<br />
<br />
Description<br />
<br />
PCB Design Studio<br />
<br />
Studio Performance & PCB Designer<br />
<br />
PCB Expert<br />
<br />
NO_GLOSS<br />
<br />
This rule attaches to a net and when you assign a TRUE value, indicates the net should not be glossed.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
NO_PIN_ESCAPE<br />
<br />
This rule attaches to a reference designator, net, or pin. When a TRUE value is assigned, the Pin Escape Router is not to place pin escapes on this component, net, or pin during routing.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
NO_RAT<br />
<br />
This rule attaches to a net. When a TRUE value is assigned, nets do not display ratsnests for unconnected ins.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
NO_RIPUP<br />
<br />
This rule attaches to a net. When a TRUE value is assigned, the etch on this net is not to be ripped up (removed) by the automatic router. Any connections on a net added after you assign this property can be ripped up.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
NO_ROUTE<br />
<br />
This rule attaches to a net or reference designator (component). When a TRUE value is assigned, missing connections on this net are not routed.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
NO_TEST<br />
<br />
This rule attaches to a net. When a TRUE value is signed, test points are not added during test point generation.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
PROBE_NUMBER<br />
<br />
This rule attaches to a net. Assign a positive integer to this rule to represents the test probe to be used for testing the net.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
PROPAGATION_DELAY<br />
<br />
This rule defines the minimum and maximum propagation delay constraint between any pair of pins or rat-Ts in a net or an extended net (Xnt). The value assigned to this rule is a string value.<br />
<br />
X<br />
<br />
X<br />
<br />
RELATIVE_PROPAGATION_DELAY<br />
<br />
This property replaces MATCHED_DELAY in Allegro PCB Editor version 14.0. Electrical constraint attached to pin pairs on a net. Specifies a group of pin pairs that are required to have interconnect propagation delays that match a specified delta (offset0 and tolerance. A RELATIVE_PROPAGATION_DELAY group has one or more reference pins pairs against which all other pin pairs in the group are compared.<br />
<br />
X<br />
<br />
X<br />
<br />
F-6<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
September, 2006<br />
<br />
Appendix F<br />
<br />
OrCAD Capture TO Allegro PCB Editor NET RULES<br />
<br />
OrCAD Capture to Allegro Technology Net Rules<br />
<br />
Description<br />
<br />
PCB Design Studio<br />
<br />
Studio Performance & PCB Designer<br />
<br />
PCB Expert<br />
<br />
ROUTE_PRIORITY<br />
<br />
This rule attach to a net. The positive integer assigned to this rule represents the routing priority for the net. Allegro PCB Editor/APD routes the net according to the priority order. Nets with the lowest number have the highest priority. To identify nets to be routed first, tag those critical nets with a ROUTE_PRIORITY property value of 1.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
SAME_NET<br />
<br />
This rule attaches to a net. When a TRUE value is assigned, elements in the same net are checked for spacing violations.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
SHIELD_NET<br />
<br />
This property adds a “shield” statement to the “net” statement. The value assigned to this rule is the name of the net used for shielding the net associated to the property. This allows you to control SPECCTRA® for OrCAD.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
SHORTING_SCHEME<br />
<br />
This net is attached automatically by APD to selected pins or vias in the nets or subnets that connect to power or ground planes when using the Route-Define Short command.<br />
<br />
X<br />
<br />
STUB_LENGTH<br />
<br />
This net attaches to ECL nets. Use this property to override the Maximum Stub Length electrical constraint. The maximum length allowed for a stub, in database units. The STUB_LENGTH property overrides the ECL property, which indicates the net does not allow stubs. A value of zero for the STUB_LENGTH property eliminates stubs.<br />
<br />
X<br />
<br />
SUBNET_NAME<br />
<br />
This rule is used by APD and attaches to one or more pins on the same net. You identify a subnet with a subnet name, either in the netlist or interactively through the Edit-Properties command.<br />
<br />
X<br />
<br />
TESER_GUARBAND<br />
<br />
This rule is used by the Timing Setup/Hold tab of the Allegro PCB Editor Constraint Manager. It can be used to define a fudge factor for the setup and hold calculation. Assigned values are measured in nanoseconds and can be attached to either a net or a pin of a net where the net is the data net of a timing check.<br />
<br />
X<br />
<br />
X<br />
<br />
TESTPOINT_QUANTITY<br />
<br />
This rule specifies the desired number of test points on the net. When test points are generated automatically using Manufacture-TestprepAutomatic, the number of test points generated do not exceed the number specified. A net with the TESTPOINT_Quantity property has a default value of 1.<br />
<br />
X<br />
<br />
X<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
F-7<br />
<br />
OrCAD Capture to Allegro Technology Net Rules<br />
<br />
OrCAD Capture TO Allegro PCB Editor NET RULES<br />
<br />
Appendix F<br />
<br />
Description<br />
<br />
PCB Design Studio<br />
<br />
Studio Performance & PCB Designer<br />
<br />
PCB Expert<br />
<br />
TIMING_DELAY_OVERRIDE<br />
<br />
This rule is a user defined delay that can be specified to override any First Switch or Final Settle delays that are computed for a net. This value is used by the Allegro PCB Editor Constraint Manager when checking setup and hold violations for a net.<br />
<br />
TOPOLOGY_TEMPLATE<br />
<br />
This net attaches to a net. In version 13.6, this rule records the name of the topology template assigned to the net. In version 14.0 this information is recorded as part of an ECset while the property remains compatible with 13.6 drawings. The value assigned can be upreved to 14.0 ECset assignments using the Audit-Topology Templates command in the Allegro PCB Editor Constraint Manager.<br />
<br />
X<br />
<br />
X<br />
<br />
TOTAL_ETCH_LENGTH<br />
<br />
Use this property as an override to the constraint by the same name. The value of this property is a string with a format of <min>:<max>, where both <min> and <max> are etch length values with optional units. If no units are specified, the units of the drawing will be assumed. Either value is optional. If only a max value is specified, the leading colon is required. If only a min value is defined, the trailing colon is optional.<br />
<br />
X<br />
<br />
X<br />
<br />
TS_ALLOWED<br />
<br />
This rule attaches to a net and specifies whether T connections can be made and the location of the T connections.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
VIA_LIST<br />
<br />
This rule attaches to a net. This rule lists the via names (wildcards allowed) that can be used for connections in this net.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
VOLTAGE<br />
<br />
This rule attaches to a net to indicate that the net is a DC net. The value of this property is the voltage of the DC net. For example, a value might be 2.2 V. Nets with the voltage property do not display a ratsnets. Unconnected nets with this property are displayed by a boxed X feature rather than a rat to the unconnected pins.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
WEIGHT<br />
<br />
This rule attaches to a net. It used by automatic placement and automatic gate swapping. The assigned value is an integer between 0 and100 where a high weight value instructs Allegro PCB Editor/APD to make nets as short as possible. Automatic placement uses the WEIGHT property to keep the components on the net close together.<br />
<br />
X<br />
<br />
X<br />
<br />
X<br />
<br />
F-8<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
X<br />
<br />
September, 2006<br />
<br />
Appendix F<br />
<br />
OrCAD Capture TO Allegro PCB Editor NET RULES<br />
<br />
OrCAD Capture to Allegro Technology Net Rules<br />
<br />
Description<br />
<br />
PCB Design Studio<br />
<br />
Studio Performance & PCB Designer<br />
<br />
PCB Expert<br />
<br />
XTALK_ACTIVE_TIME<br />
<br />
This rule attaches to a net. This rules determines when nets are active with changing voltage. It is used by SigNoise to determine when a net effects other nets. It is also used by constraints for crosstalk analysis.<br />
<br />
X<br />
<br />
XTALK_IGNORE_NETS<br />
<br />
This rule attaches to a net. Use this property to override the Crosstalk Ignore Nets electrical constraint. This rule lists the names of nets (wildcards allowed) ignored by SigNoise during crosstalk analysis.<br />
<br />
X<br />
<br />
XTALK_SENSITIVE_TIME<br />
<br />
This rule attaches to a net. It is used by SigNoise to determine when a net is affected by other nets. This rule lists the times when a net is noise sensitive to the voltage changes of another net. Use this property to override the Crosstalk Sensitive Time electrical constraint.<br />
<br />
X<br />
<br />
September, 2006<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
F-9<br />
<br />
OrCAD Capture to Allegro Technology Net Rules<br />
<br />
F-10<br />
<br />
Cadence OrCAD Capture Version 15.7<br />
<br />
Appendix F<br />
<br />
September, 2006<br />
<br />
</div>
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(function () {
var IDOCTIPS_cookie_box_viewed = (function (name) {
var matches = document.cookie.match(new RegExp("(?:^|; )" + name.replace(/([\.$?*|{}\(\)\[\]\\\/\+^])/g, '\\$1') + "=([^;]*)"));
return matches ? decodeURIComponent(matches[1]) : undefined;
})('IDOCTIPS_cookie_box_viewed');
if (IDOCTIPS_cookie_box_viewed) {
hide_IDOCTIPS_cookie_box();
}
})();
</script>
<!-- end cookie policy -->
</body>
</html>
