Multiple Choice Questions Course code EE6303
C our se
C l a s s & B at c h
Se S e m e st e r
Linear Integrated Circuits and Applications
II BE-EEE (2017 (2017 Batch Batch))
III
Co ur se F ac ult y
UNIT I IC FABRICATION
IC classification, fundamental of monolithic IC technology, epitaxial growth, masking and etching, diffusion of impurities. Realisation of monolithic ICs and packaging. Fabrication of diodes, capacitance, resistance and FETs. 1. Which of the following electrical characteristics is not exhibited by an ideal op -amp? a. Infinite Infinite voltage voltage gain b. Infinite Infinite bandwidth bandwidth c. Infinite Infinite output resistanc resistance e d. Infinite Infinite slew slew rate 2. An ideal op-amp requires infinite bandwidth because a. Signals can be amplified without without attenuation b. Output common-mode noise voltage is zero c. Output voltage occurs simultaneously simultaneously with input voltage voltage changes d. Output can drive infinite infinite number of device
3. Ideal op-amp has infin infinite ite voltag voltage e gain gain because because a. To control control the output voltage voltage b. To obtain finite output output voltage c. To obtain obtain infinite infinite output output voltage voltage d. To receive receive zero zero noise noise output output voltage voltage 4. How will will be the output voltage voltage obtained obtained for for an ideal op-amp? a. Amplifies the difference difference between the the two input voltages b. Amplifies individual individual voltages input voltages c. Amplifies products products of two two input voltage d. Amplifies error in the output voltage 5. Find the input input voltage of an ideal op-amp. It’s one of the inputs and output voltages are 2v and 12v. (Gain=3) a. 8v b. 4v c. -4v -4v d. -2v -2v
6. Which factor factor determin determine e the output voltage voltage of an op-amp? op-amp? a. Positive Positive saturation saturation b. Negative Negative saturation saturation c. Both positive and and negative saturation voltage d. Supply voltage voltage 7. Free runnin running g multivibrat multivibrator or is also called called as a. Stable Stable multivibrato multivibratorr b. Voltage Voltage control oscillator oscillator c. Square Square wave oscillator oscillator d. Pulse stretcher stretcher 8. At which state the phase-lock phase-locked ed loop tracks tracks any change change in input frequen frequency? cy? a. Free runni running ng state state b. Capture Capture state c. Phase locked locked state d. Uncontroll Uncontrolled ed state 9. Match the list I with list II which represents represents the three stages of phase locked locked loop.(PLL) List I
List II
1.Be 1.Befo fore re inp input ut fre frequ quen ency cy app appli lied ed
i. PLL PLL-P -Pha hase se loc locke ked d stat state e
2.When 2.When the input input frequ frequency ency applied applied ii.PLL=Fre ii.PLL=Free e running running state 3.Af 3.Afte terr input nput freq frequ uency ency appl appliied
iii iii. PL PLL-C L-Captu apturre mod mode e
a. 1-ii, 2-iii, 2-iii, 3-i b. 1-iii, 1-iii, 2-ii, 2-ii, 3-i c. 1-i, 2-ii, 3-iii d. 1-ii 1-ii,, 2-i, 3-ii 3-iiii 10. What is the function of low pass filter in in phase-locked loop? a. Improves Improves low frequency frequency noise b. Removes high high frequency frequency noise noise c. Tracks Tracks the voltage voltage changes d. Changes Changes the input frequency frequency UNIT II CHARACTERISTICS OF OPAMP
Ideal OP-AMP characteristics, DC characteristics, AC characteristics,, differential amplifier; frequency response of OP-AMP; Basic applications applications of op-amp – Inverting and Non-inverting Non-inverting Amplifiers-V/I & I/V converters ,summer, differentiator and integrator. 11. What is the need to generate generate corrective corrective control control voltage? voltage? a. To maintain maintain the the lock b. To change the input signal frequency c. To shift shift the VCO frequency frequency d. To track the angle angle of an input input signal signal
12. At what range the PLL can maintain the lock in the circuit? a. Lock in range range b. Input range range c. Feedback Feedback loop loop range d. Capture Capture range range 13.The pull-in time depends on a. Initial phase and frequency frequency difference between between two sign b. Overall Overall loop loop gain c. Loop filter character characteristic isticss d. Band Band Width Width 14. The purpose of level shifter shifter in Op-amp internal circuit is to a. Adjust Adjust DC voltage voltage b. Increase Increase impedance impedance c. Provide Provide high high gain gain d. Decrease Decrease input resistance resistance 15. What is the purpose of differential amplifier stage in internal circuit of Op-amp? a. Low gain to differential mode signal b. Cancel differen difference ce mode signal c. Low gain gain to common common mode signal signal d. Cancel common common mode signal signal 16. In LM317 voltage regulator, what is the minimum value value of voltage required between its input & output in order to supply power to an internal circuit? a. 1V b. 3V c. 5V d. 10V 10V 17. For a PLL IC 565 with timing resistor & timing timing capacitor of about 15 kΩ & 0.02μF respectively, what would be the value of output frequency (f 0)? a. 433.33 Hz b. 833.33 Hz c. 1000 Hz d. 2500 Hz 18. In VCO IC 566, the value of charging & discharging is dependent on the voltage applied a pplied at__________ a. Triangular Triangular wave wave output b. Square Square wave output output c. Modulating Modulating input d. Sine wave output
19. According to transfer characteristics of PLL, the phase error e rror between VCO output & incoming signal must be maintained between _______ in order to maintain a lock. a. 0 & π b. 0 & π/2 c. 0 & 2π d. π & 2π 20. In DACs, gain gain error occurs due to _________. _________. a. offset voltages of op-amps b. leakage current in the switches c. error in feedback resistor value d. error in current source resistance values UNIT III APPLICATIONS OF OPAMP Instrumentation amplifier, Log and Antilog Amplifiers, first a nd second order active filters, comparators, multivibrators, waveform generators, clippers, clampers, peak detector, S/H circuit, D/A converter (R- 2R ladder and weighted resistor resistor types), A/D converters using using opamps.
21. In a peak detector circuit, which which component holds the peak value till a higher peak value is detected? a. Diode b. Inductor c. Capacitor d. MOSFET switch 22. In hysteresis width, the hysteresis voltage is equal to _______ upper & lower threshold voltages (VUT & VLT). a. sum of b. difference between c. product of d. division of 23. In an inverting Schmitt Trigger circuit, the hysteresis ________ is also known as 'hysteresis width'. a. voltag voltage e b. curren current t c. resist resistanc ance e d. powe powerr 24. Which among the following circuits circuits is known as ' Threshold Detector '? a. Window Window detector detector b. Over voltage voltage indicator indicator
c. Level detector detector d. Zero Zero crossi crossing ng detecto detectors rs 25. In absence absence of any applied applied AC input signal, signal, what what would be the gain gain of an ideal integrator? a. Zero Zero b. Unit Unity y c. Infini Infinity ty d. Unpredictab Unpredictable le 26. In an inverting inverting ideal integrator, which which component exhibits exhibits the feedback feedback path connection? a. Resist Resistor or b. Induct Inductor or c. Capaci Capacitor tor d. Diod Diode e 27. Which performance parameter of of a regulator is defined as the change change in regulated load voltage due to variation in line voltage in a specified range at a constant load current? a. Load regulation regulation b. Line regulation regulation c. Temperature Temperature stability stability factor d. Ripple rejection rejection 28. Which among the following characteristics characteristics of D/A converter occur/s due to resistor and semiconductor aging? a. Spee Speed d b. Settling Settling time c. Long term drift drift d. Supply rejection rejection 29. For reducing the effects of input offset in comparator, comparator, what would be the possible value of input offset voltage? a. Lo Low w b. Modera Moderate te c. High High d. Zero Zero 30. Zero crossing detector circuit plays a crucial role in conversion conversion of input sine wave into a perfect _________at its output. a. triangular triangular wave b. square square wave wave c. saw-tooth saw-tooth wave d. pulse pulse wave wave
UNIT IV SPECIAL ICs
Functional block, characteristics & application circuits with 555 Timer Ic-566 voltage controlled oscillator Ic; 565-phase lock loop Ic ,Analog multiplier ICs. 31. For a temperature controller circuit comprising comprising instrumentation amplifier, amplifier, which among the following is adopted as a temperature temperature sensor? a. Thermi Thermisto storr b. Resist Resistor or c. Thyris Thyristor tor d. Thermocou Thermocouple ple 32. For non-inverting adder, adder, which theorem is applicable to determine the expression for output voltage? a. Theven Thevenin' in'ss b. Norton Norton's 's c. Miller Miller's 's d. Superpositi Superposition on 33. What is the feedback factor factor of voltage follower circuit? circuit? a. Zero Zero b. Unit Unity y c. Infini Infinity ty d. Between Between zero & one 34. Which among the following following is a nonlinear nonlinear application of op-amp? a. V to I converter converter b. Compar Comparato atorr c. Precision Precision rectifie rectifierr d. Instrument Instrumentation ation amplifier 35. In op-amps, which type of noise occurs due to discrete flow of current in the device? a. Shot Shot noise noise b. Burst Burst noise noise c. Thermal Thermal noise d. Flicker Flicker noise 36. How many stages are involved in bipolar op-amp? a. 2 b. 3 c. 4 d. 6 37. In a typical op-amp, op-amp, which which stage is supposed supposed to be a dual-input dual-input unbalanced unbalanced output output or single-ended output differential amplifier? a. Input Input stage stage b. Intermedia Intermediate te stage c. Output Output stage stage d. Level shifti shifting ng stage stage
38. Which of the following is not a linear/digital IC? a. Phase-locked loop b. Voltage-controlled oscillator c. Passive filter d. Comparator 39. On which of the following does the conversion depend in ladder -network conversion? a. Comparator b. Control logic c. Digital counter d. Clock 40. How many Vcc connections does the 565 PLL use? a. 0 b. 1 c. 2 d. 3 UNIT V APPLICATION ICs IC voltage voltage regulators regulators –LM78XX, –LM78XX, 79XX Fixed Fixed voltage regulators regulators - LM317, 723 Variable Variable Voltage Voltage regulators, regulators, switching switching regulatorregulator- SMPS- LM 380 power amplifieramplifier- ICL 8038 function function generator IC.
41. When is the counter set to zero in the dual-slope method of conversion? a. Prior to the charging of the capacitor of the integrator b. While the capacitor is being charged c. At the end of the charging of the capacitor d. During the discharging of the capacitor 42. Which of the following best describes the output of a 566 voltage-controlled voltage-c ontrolled oscillator? a. Square-wave b. Triangular-wave c. Sine-wave d. Both square- and triangular-w triangular-wave ave 43. An astable multivibrator multivibrator is also known as a: a. free-running multivibrator b. one-shot multivibrator c. bistable multivibrator d. monostable multivibrator 44. In order for an output to swing above and below a zero reference, the op -amp circuit requires: a. a wide bandwidth b. a resistive feedback network c. zero zero offset offset d. a negative and positive supply
45. A portion of the output that provides provides circuit stabilization stabilization is considered to be: a. distortion b. negative feedback c. positive feedback d. open-loop 46. The ratio between differential gain and common-mode gain is called: a. amplitude b. common-mode rejection c. differential-mode rejection d. phase 47. One input terminal of high gain comparator circuit is connected to ground and a sinusoidal voltage is applied to the other input. The output of comparator will be a. a sinusoid b. a full rectified sinusoid c. a half rectified sinusoid d. a square wave 48. The most commonly used amplifier in sample and hold circuit is a. a unity gain inverting amplifier b. a unity gain non inverting amplifier c. an inverting amplifier with a gain of 10 d. an inverting amplifier with a gain of 100 49. An ideal op-amp is an ideal a. voltage controlled current source b. voltage controlled voltage source c. current controlled current source d. current controlled voltage source 50. Voltage multipliers are circuits circuits best used to produce produce a. low voltage and low current b. low voltage and high current c. high voltage and low current d. high voltage and high current
LICA- MCQ ANSWERS ANSWERS 1. c 2. a 3. b 4. a 5. d 6. c 7. b 8. c 9. a 10.b 11.a 12.a 13.d 14.a 15.d 16.b 17.b 18.c 19.a 20.c 21.c 22.b 23.a 24.c 25.c 26.c 27.b 28.c 29.a 30.b 31.a 32.d 33.b 34.c 35.a 36.b 37.b 38.c
39.a 40.c 41.c 42.d 43.a 44.d 45.b 46.b 47.d 48.b 49.b 50.c
