Internal Use Only Website http://biz.lgservice.com S E R V I C E M A N U A L
DVB-T/HDD/DVD RECORDER M O D E L : R H
SERVICE MANUAL
T
3 9 7
H / R H T 3 9 8 H
MODEL: RHT397 T397H H/RHT398H CAUTION
BEFORE SERVICING THE UNIT, READ THE “SAFETY PRECAUTIONS” IN THIS MANUAL.
5914227 P/NO : AFN3 AFN35914227
MARCH,
2008
CONTENTS SECTION 1.........SUMMAR 1.........SUMMARY Y SECTION 2.........CABINET & MAIN CHASSIS SECTION 3 .........ELEC .........ELECTRICAL TRICAL SECTION 4.........RS-06A 4.........RS-06A LOADER PART PART SECTION 5.........REPLACEMENT PARTS LIST
SECTION 1 SUMMARY CONTENTS
............................ ............................. ............................. .........................1-3 ..........1-3 NEW FUNCTIONS OF DVB-T/HDD/DVD RECORDER .............
PRODUCT SAFETY SAFETY SERVIC SERVICING ING GUIDELINES GUIDELINES FOR ............................. ............................. ............................. ............................. ............................. ..............1-4 1-4 DVB-T/HDD/DVD RECORDER PRODUCTS ............... ........................... ............................. .............................. ............................. ............................. ............................. ............................. ................1-5 .1-5 SERVICING PRECAUTIONS ............. • GENERAL SERVI SERVICING CING PRECAUTIONS PRECAUTIONS • INSULATION CHECKING PRODEDURE • ELECTROSTATI ELECTROSTATICALLY CALLY SENSITIVE (ES) DEVICES ............................. ............................. ............................. ......................1-6 ........1-6 SERVICE INFORMATION FOR EEPROM IC SETTING ...............
UPGRADE THE MAIN & LOADER PROGRAM
..........1-7
NEW FUNCTIONS OF DVB-T/HDD/DVD RECORDER • HDMI HDMI IS THE SPECIFICATION FOR THE HIGH-DEFINITION MULTIMEDIA INTERFACE. HDMI IS PROVIDED FOR TRANSMITTING TRANSMITTING DIGITAL DIGITAL TELEVIS TELEVISION ION AUDIOVISUAL AUDIOVISUAL SIGALS FROM HDD-DVD RECODER TO TELEVISION SETS, OTHER VIDEO DISPLAYS. DISPLAYS. HDMI CAN CARRY HIGH QUALITY MULTI-CHANNEL AUDIO DATA DATA AND CAN CARRY ALL ST STANDARD ANDARD AND HIGH DEFINITION DEFINITION CONSUMER CONSUMER ELECTRONICS VIDEO FORMA FORMATS. CONTENT PROTECTI PROTECTION ON TECHNOLOGY TECHNOLOGY IS AV AVAILABLE AILABLE.. HDMI CAN ALSO CARRY CARRY CONTROL AND STA STATUS INFORMATION IN BOTH DIRECTIONS. << OPERATING >> AUDIO, VIDEO VIDEO AND AUXILIA AUXILIARY RY DA DAT TA IS TRANSMITTED TRANSMITTED ACROSS ACROSS THE THREE TMDS TMDS DATA DATA CHANNELS. THE VIDEO VIDEO PIX PIXEL EL CLO CLOCK CK IS TRAN TRANSMI SMITTED TTED ON ON THE TMDS CLOC CLOCK K CHANNEL CHANNEL AND USED USED BY THE RECEIVER RECE IVER AS A FREQ FREQUENC UENCY Y REFE REFERENC RENCE E FOR DAT DATA RECO RECOVER VERY Y ON THE THREE THREE TMDS TMDS DAT DATA CHAN CHAN-NELS. VIDEO DAT DATA IS CARRIED AS A SERIES OF 24-BIT 24-BIT PIXELS ON THE THE THREE TMDS TMDS DAT DATA CHANNELS. TMDS ENCODING ENCODING CONVER CONVERTS TS THE 8BIT PER CHANNEL CHANNEL INTO THE 10BIT 10BIT DC-BALA DC-BALANCED. NCED. VIDEO PIXEL PIXEL RA RATES TES CAN RANGE RANGE FROM 25MHz 25MHz TO 165MHz. 165MHz. THE THE VIDEO PIXELS CAN BE ENCODED IN IN EITHER EIT HER RGB, RGB, YCbCr YCbCr 4:4 4:4:4 :4 OR YCbCr YCbCr 4:2 4:2:2 :2 FORMA FORMATS. TS. IN IN ALL ALL THRE THREE E CASES, CASES, UP TP 24 BITS BITS PER PIXEL PIXEL CAN BE TRANSFERRED.
FAST DUBBING DUBBING MEANS A COPYING FUNCTION FUNCTION BETWEEN HDD TO DVD DISCS.
PRODUCT SAFETY SERV SERVICING ICING GUIDELI GUIDELINES NES FOR FOR DVB-T/HDD/DVD RECORDER PRODUCTS IMPORTANT IMPORT ANT SAFETY NOTICE
This manual was prepared for use only by properly trained audio-video service technicians. When servicing this product, under no circumstances should the original design be modified or altered without permission from LG Corporation. All components should be replaced only with types identical to those in the original circuit and their physical location, wiring and lead dress must conform to original layout upon completion of repairs. Special components are also used to prevent x-radiation, shock and fire hazard. These components are indicated by the letter “x” included in their component designators and are required to maintain safe performance. No deviations are allowed without prior approval by LG Corporation. Circuit diagrams may occasionally differ from the actual circuit used. This way, implementation of the latest safety and performance improvement changes into the set are not delayed until the new service literature is printed. CAUTION: Do not attempt to modify this product in any way. Never perform cus-
tomized installations without manufacturer’s approval. Unauthorized modifications will not only void the warranty, but may lead to property damage or user injury. Service work should be performed only after you are thoroughly familiar with these safety checks and servicing guidelines. GRAPHIC SYMBOLS
The exclamation point within an equilateral triangle is intended to alert the service personnel to important safety information in the service literature. The lightning flash with arrowhead symbol within an equilateral triangle is intended to alert the service personnel to the presence of noninsulated “dangerous voltage” that may be of sufficient magnitude to constitute a risk of electric shock.
TIPS ON PROPER INSTALLATION
1. Never install any receiver in a closed-in recess, cubbyhole, or closely fitting shelf space over, or close to, a heat duct, or in the path of heated air flow. 2. Avoid conditions of high humidity such as: outdoor patio installations where dew is a factor, near steam radiators where steam leakage is a factor, etc. 3. Avoid placement where draperies may obstruct venting. The The customer should also avoid the use of decorative scarves or other coverings that might obstruct ventilation. 4. Wall- and shelf-mounted installations using a commercial mounting kit must follow the factory-approved mounting instructions. A product mounted to a shelf or platform must retain its original feet (or the equivalent thickness in spacers) to provide adequate air flow across the bottom. Bolts or screws used for fasteners must not touch any parts or wiring. Perform leakage tests on customized installations.
SERVICING PRECAUTIONS CAUTION: Before servicing the DVB-T/HDD/DVD RECORDER covered by this service data and its supplements and addends, read and and follow follow the SAFET SAFETY Y PRECAU PRECAUTIONS. TIONS. NOTE: if unforeseen circumstances create conflict between the following servicing precautions and any of the safety precautions in this publication, always follow the safety precautions. Remember Safety First:
Electrostatically Sensitive (ES) Devices Some semiconductor (solid state) devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive (ES) Devices. Examples of typical ES devices are integrated circuits and some field effect transistors and semiconductor chip components. The following techniques should be used to help reduce the incidence of component damage caused by static electricity.
General Servicing Precautions 1. Always unplug the DVB-T/HDD/DVD RECORDER AC power cord from the AC power source before: (1) Removing or reinstalling any component, circuit board, module, or any other assembly. (2) Disconnecting or reconnecting any a ny internal electrical ele ctrical plug or other electrical connection. (3) Connecting a test substitute in parallel with an electrolytic capacitor. substitution or incorrect incorrect polarity polarity Caution:: A wrong part substitution Caution installation of electrolytic capacitors may result in an explosion hazard.
1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any electrostatic charge on your body by touching a known earth ground. Alternatively, obtain and wear a commercially available discharging wrist strap device, which should be removed for potential shock reasons prior to applying power to the unit under test.
2. Do not spray chemicals on or near this this DVB-T/HDD/DVD RECORDER or any of its assemblies.
3. Use only a grounded-tip soldering iron to solder or unsolder ES devices.
2. After removing an electrical assembly equipped with ES devices, place the assembly on a conductive surface such as aluminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
SERVICE INFORMATION FOR EEPROM IC SETTING 1. Pre Press ss both both “CL “CLEAR” EAR” but button ton on the the Remoc Remocon on and and “
The picture on OSD will be as bellow :
OP1 OP2 OP3 OP4 OP5 OP6
: : : : : :
DA/DA 30/30 D3/D3 60/60 0E/0E AE/AE
OPEN/CL OPE N/CLOSE OSE”” butto button n on the the Front Front Pane Panell about about ±5 sec. sec.
MODEL : RHT397H/RHT398H
00000000 00000000 071102A 00000000 00000000 00000000 00000000
UPGRADE THE MAIN & LOADER PROGRAM 1. MAKING MAKING UPGRADE UPGRADE DISC DISC MAIN SW SW AND AND LOADER SW 1) Do Physica Physicall format format as as ISO9660 ISO9660 or or JOLIET JOLIET fil file e system 2) Don’t care care about about the CD Volume Volume label label 3) Writ Write e Main SW SW file and and Loader Loader SW file file on Root Root
5) Press “PLA “PLAY” button button to update S/W S/W and anothanother button to cancel. 6) Main S/W S/W under under updat updated. ed. Do not turn off the power during updating process...!
Main SW file name is : - LG_RH300_UPDATE_P LG_RH300_UPDATE_PAL.ROM AL.ROM Loader SW file name is : - DvdS620.rs6 - YASMS620 7) If updating updating succeed, succeed, tray tray disc will be opened.
Take the disc and turn off the power. 8) Turn on the po power wer,, and check check the Main Main S/W Version.
3. UPGRADE LOADER S/W
5) Press “PLA “PLAY” Y” button button to update S/W S/W and anothanother button to cancel. 6) Loa Loader der S/W S/W under under updated updated.. Do not turn off the power during updating process...!
3) Sel Select ect men menu u “LOCK “LOCK””
If updating succeed, after completed there will be message : 4) Press button number 7 - 8 - 8 - 9 on the Remocon The picture on TV screen as below :
Power will be automatically turn off. 7) Tur Turn n on the power power and check check the Loader Loader S/ S/W W
SPECIFICATIONS • GENERAL Power requirements Power consumption Dimensions (approx.) Net weight (approx.) Operating temperature Operating humidity Television system Recording format
• RECORDING Recording format Recordable me media Recordable time
Video recording format Sampling frequency Compression format
AC 200 ~ 240V, 50/60Hz 30W 430 X 49 X 275mm (w x h x d) without foot 4k g 5°C to 35°C 5% to 90% Analog: PAL I, B/G, I/I, SECAM D/K, K1, SECAM L color system Digital: DVB-T DVB-T standa standard rd compliant compliant PAL
DVD Video Recording, DVD-VIDEO HDD (3 (320GB), DV DVD-ReWritable, DV DVD-Recordable, DV DVD+ReWritable, DVD+Recordable, DVD+Recordable (Double Layer), DVD-RAM DVD (4.7GB) : Approx. 1hour (XP mode), 2hours (SP mode), 4hours (LP mode) mode),, 6hours 6hours (EP (EP mode), 11hours (MLP mode) DVD+R DL (8.5G (8.5GB) B) : Approx. 2.9hou 2.9hourr (XP mode), 3.8hours 3.8hou rs (SP (SP mode), 7.3hour 7.3hours s (LP mode) mode),, 9.1hours 9.1hours (EP mode) HDD (320GB, MPEG2 Recording) : Approx. 85hour 85hours s (XP mode), 129hour 129hours s (SP mode) mode),, 323hours 323hour s (LP (LP mode), 456hour 456hours s (EP (EP mode), 1081hou 1081hours rs (MLP (MLP mode) 27MHz MPEG2 or MPEG4 (HDD only)
MEMO
SECTION 2 CABINET & MAIN CHASSIS CONTENTS
............................ ............................. ............................. ............................. ............................. ............................. ............................. ........................... ..................2-2 ......2-2 EXPLODED VIEWS ............. 1. CABINET AND MAIN FRAME FRA ME SECTION .............. ............................ ............................. .............................. ............................. ............................. .......................... ...........2-2 2-2 2. DECK MECHANISM SECTION (RS-06A) ............. ............................ ............................. ............................. ............................. ............................. .......................... ...........2-3 2-3 3. PACKING ACCESSORY AC CESSORY SECTION.......................... SECTION........................................ ............................. ............................. ............................. ............................. .......................2-4 .........2-4
2. DECK MECHANISM SECTION (RS-06A) 1431
RS-06A(DR-11H)
1001 1003
1002
1030
A001
1434 1033 1032 1034 A002
1437 1025
1038 1432
3. PACKING PACKING ACCESSOR ACCESSORY Y SECTI SECTION ON
OPTIONAL PARTS 810 Acc Accesso essory ry Assem Assembly bly 806 RCA Plu Plug(B g(Blac lack) k) 808 Ba Battte tery ry 821 SC SCAR ART T Cable Cable
900 Re Remo mote te Cont Contro roll
80 1 Instruction Ass'y 8 04 04 Bag 803 Pac acki king ng
803 Pac acki king ng
SECTION 3 ELECTRICAL CONTENTS ELECTRICAL TROUBLESHOOTING GUIDE...........3-2
1. POWER SUPPLY SUPPLY ON SMPS BOARD .... ........ ........ .....3-2 .3-2 2. POWER SUPPLY ON I/O BOARD ........... ...................3-4 ........3-4 3. SYSTEM CIRCUIT PART ............ ........................ ......................3-8 ..........3-8 4. DISC NOT RECOGNIZED................. RECOGNIZED............................. ................3-8 ....3-8 5. WHEN PLAYING DISC, NO AUDIO OUTPUT ........... ........................ ......................... ..................3-9 ......3-9 6. NO OPTICAL/DIGITAL OPTICAL/DIGITAL OUTPUT ............ ....................3-10 ........3-10 7. NO TUNER AUDIO OUTPUT OUTPUT........... ....................... ...............3-1 ...3-11 1 8. NO EXTERNAL AUDIO INPUT.......................3-12 INPUT.......................3-12 9. NO RGB / COMPONENT COMPONENT VIDEO SIGNAL SIGNAL WHEN PLAY DISC.................. DISC............................... .........................3-13 ............3-13 10. NO COMPOSITE / S-VIDEO SIGNAL WHEN PLAY PLAY DISC DISC............ ......................... ......................... ..................3-14 ......3-14 11. NO TV, TV, EXTERNAL INPUT
4. POWER MAIN BOARD BLOCK DIAGRAM ..3-33 5. I/O BOARD BLOCK DIAGRAM DIAGRAM ............. ......................3-34 .........3-34 6. VIDEO INPUT BLOCK DIAGRAM DIAGRAM............. ..................3-35 .....3-35 7. VIDEO OUTPUT BLOCK DIAGRAM..............3-36 DIAGRAM..............3-36 8. AUDIO INPUT BLOCK DIAGRAM..................3-37 DIAGRAM..................3-37 9. AUDIO OUTPUT BLOCK DIAGRAM..............3-38 DIAGRAM..............3-38 10. POWER I/O BLOCK DIAGRAM......................3-39 11. FLD TIMER BOARD BLOCK DIAGRAM........3-40 12. POWER TIMER AND CI BLOCK DIAGRAM....................... DIAGRAM................................... ................3-41 ....3-41 ......................... ........................ ..................3-43 ......3-43 CIRCUIT DIAGRAMS ............. 1. SMPS CIRCUIT DIAGRAM ........... ........................ ..................3-43 .....3-43 2. MPEG CIRCUIT DIAGRAM................ DIAGRAM............................ .............3-45 .3-45 3. FLASH / DDR CIRCUIT DIAGRA DIAGRAM M 3-47
ELECTRICAL ELECTRI CAL TROUBLES TROUBLESHOOTING HOOTING GUIDE 1. POWER SUPPL SUPPLY Y ON SMPS BOARD BOARD No .5.3VA YES
Is the F101 normal?
NO
Replace the F101 (Use the same Fuse)
YES
Is the BD101 normal?
NO
Replace the BD101
YES
Is the R101 normal?
NO
Replace the R101
YES
Is Vcc (10V~17V) supplied to IC101 Pin6?
NO
Is the D102 normal? NO
Check or Replace D102
YES
Is the D128 normal? YES
NO
Replace the D128
No 5V for HDD & DVD Loader YES
Is the 5.5V supplied To IC156 Pin1?
NO
Check or Replace D125
YES
Is the IC156 Pin4 “H”? YES
Check or Replace IC156
No 12V for HDD & DVD Loader
NO
Check the ‘PWR CTL “H”’ signal from from µ-COM µ-COM
2. POWER SUPPL SUPPLY Y ON I/O BOARD BOARD No SW_12VG YES
Is the Vcc (14V) supplied to Q164 collector?
NO
Check D124 on SMPS board and Replace
YES
Is there about 12.5V at ZD151 & Q164 base?
NO
Check Q164 and Replace
YES
Is the Vcc (33V) supplied to Q162 emiter? YES
NO
Check D126 on SMPS board and Replace
No 5.0VD YES
Is there about 5.3V at the IC602 Pin1?
NO
Check 5.3VA 5.3VA on SMPS board board
YES
Is there about 4V ~ 5V at the IC602 Pin4? YES
Check the IC602 and Replace
No 3.3V
NO
Check the ‘PWR ‘PWR CTL “H”’ signal from µ-COM
No 2.5V YES
Is there about 3.3V at the IC151 Pin1?
NO
Check D154 on I/O and D127 on SMPS board
NO
Check the ‘PWR ‘PWR CTL “H”’ signal from µ-COM
YES
Is there about 4V ~ 5V at the IC151 Pin4? YES
Check the IC151 and Replace
No 1.8V YES
Is there about 3.3V
NO
Check power supply 3.3V on I/O board
No SW_FD(+) YES
Is the Vcc (FD+) supplied to Q163 collector?
NO
Check D121 on SMPS board and Replace
YES
Is there about 5.3V at R184 and Q163 collector?
NO
Check Q163 and Replace
YES
Is the VCC (5.3V) supplied to Q153 emiter?
NO
Check 5.3VA 5.3VA on SMPS board board
YES
Is there about 0V at Q153 base? YES
NO
Check the “1W_H” signal from µ-COM
3. SYSTEM CIRCUIT PART “Please wait” displayed continue at power on YES
IC1198 : . (/RST_HOST)
NO
Check IC701 Pin62
YES
X1101 : Clock oscillated? (13.5MHz)
NO
Replace X1101
YES
IC1201 Pin26 :
YES
NO
Check IC1201 (Flash memory), IC1201 (DDRAM)
5. WHEN PLA PLAYING YING DISC, NO AUDIO OUTPUT When playing DISC, no Audio output
IC803 Pin14,15 : Is there a signal?
NO
Check IC803 Pin5,6,7,8 : . Pin3,4 (Host CLK &DATA) :
YES YES
Check Q801,Q808, Q809,Q810
NO
IC803 Pin1,16 (Z_Mute_R/L) : . IC701 Pin24 (Sys_Mute_L) :
Check IC803 Pin11 (5.0VD)
YES YES
NO
IC1101 defect
6. NO OPTICAL/DIGIT OPTICAL/DIGITAL AL OUTPU OUTPUT T R1107 : . Is there a signal? YES
Check PVM02 Pin2 (SPDIF_OUT) :
.
YES
R857 : . Is there a signal?
C858 : . Is there a signal?
YES
Check JK803 Pin2 (5V)
YES
L805 :
.
7. NO TUNER AUDIO OUTPUT TU701 Pin17 (SIF) : Is there a signal? YES
IC901 Pin106, 107 Is there a signal? YES
IC801 Pin40, 41 : Is there a signal?
NO
Check IC801 Pin14 (12V) Pin30 (5, 3V) Pin31, 32 (SCL, SDA) : .
NO
Replace IC801
YES
IC901 Pin 98, 99, 100, 95 (Ain_D0, AIN_SCLK, AIN_FSYNC, AIN_MCLK) : Is there a signal?
NO
Check Pin51 /RST_SAA7138 Is there a signal?
NO
Check reset from IC1101
8. NO EXTERN EXTERNAL AL AUDIO INPUT < AV1/AV2> IC801 Pin2,3,5,6 : Is there a signal?
< AV3 > NO
NO
YES
C941,C942 : Is there a signal?
Check PVM01 & PMV01 Pin12,14 NO
Check PMT03 Pin12,14 & CN1 Pin17,19 NO YES
Check cable connections & input signal.
IC801 Pin40,41 : Is there a signal?
NO
Check IC801 Pin14 (12V) Pin30 (5,3V) Pin31,32 (SCL,SDA) :
YES
Replace IC801
9. NO RGB / COMPON COMPONENT ENT VIDEO VIDEO SIGNAL SIGNAL WHEN PLA PLAY Y DISC PVM01 and PMV01 Pin5,7,9 : Is there a signal? YES
IC801 Pin24,25,26 : Is there a signal?
NO
Check IC801 Pin14 (12V) Pin30 (5, 3V) Pin31, 32 (SCL, SDA) : .
YES
Check condition RGB_Sel_Out & Comp_Mute_L
YES
YES
10. NO NO COMPOSITE COMPOSITE / S-VIDEO S-VIDEO SIGNAL SIGNAL WHEN PLA PLAY DISC PVM01 and PMV01 Pin1,4,6 : Is there a signal?
YES
IC801 Pin27,29 : Is there a signal?
NO
Check IC801 Pin14 (12V) Pin 30 (5, 3V) Pin31,32 (SCL,SDA) : . YES
NO
IC801 Pin36,39 : Is there a signal?
11. NO TV, TV, EXTERNAL INPUT VIDEO SIGNAL When Cable connecting Tuner and Rear SCART1,2 No TV video signal (AV1/2)
No video signal of external input AV3 (Front RCA input)
R905 : Is there a signal ?
NO
NO
Check PVM01 & PMV01 Pin8
YES
IC801 Pin42 : Is there a signal?
NO
YES
C859,C896, C895 : Is there a signal?
Check PMT03 Pin16 & CN1 Pin15
NO
Check IC801 Pin14 (12V) Pin30 (5, 3V) Pin31, 32 (SCL, SDA) : . YES
NO YES
Check cable connection &
Replace IC801
12. NO DV (IEEE1394) INPUT (VIDEO/AUDIO) SIGNAL Check DV_Jack connection YES
DV-mode switching?
NO
Change to DV-mode using remote control
YES
IC1301 power 3.3V
NO
Check power 3.3V
YES
“High”
IC1301 Pin37: & X1301 (24.576MHz) oscillated ? YES
NO
Check R1143 reset from IC1 IC1101 101
13. NO DVB_T AUDIO / VIDEO OUTPUT Check the RF cable
IC606 Pin9, Pin10 Is there signal?
NO
Check IC606 Pin6, Pin12 “H” NO
Check Q602 and IC606 Pin14 VCC (5.3VA)
YES
RR2000,RR2007 Is there signal?
NO
Check TU601 VCC YES
YES
Replace TU601
WAVEFORMS 1. SYSTEM BLOCK IC1101 1
1 Frequency=13.5MHz
< Main Clock >
3
< DDR Bank Address >
4 5
7
8
2. VIDEO BLOCK (COLOR BAR INPUT)
1
< CVBS_OUT >
IC1101 1
2
2
3
3. AUDIO BLOCK (1kH (1kHz z SINEW SINEWA AVE INPUT) INPUT)
1 2 3 4
5
5
< SPDIF_OUT >
IC1101
4. SERIAL INTER INTERF FACE BLOCK BLOCK (BETWEEN (BETWEEN MAIN MAIN & I/O) I/O)
1 2
3
5. TUNER BLOCK
1
1 0 9 C I
7. HDM HDMII BLOCK BLOCK
2
1
WIRING DIAGRAMS 1. WIRIN WIRING G DIAGRAM DIAGRAM 1
d d í í B B n n o o i i t t c c n n u u J J
Half Nim TUNER l a c i t p O
e t i o l a s e i o d x p i a V o m o S C C
6
D R A O B O / I
n i p 0 4
D D H
n i p 4 2
n i p 4
N I _ A / / N I _ V V D B S U
n i p 4
8 4
40pin
3
24pin
2 / 1 T R A
n i p 0 5
n i p 0 5
d r a o
r e m i T
2. WIRIN WIRING G DIAGRAM DIAGRAM 2
6
8 4
3
1
2
3
4
BLOCK DIAGRAMS 1. OVE OVERAL RALL L BLO BLOCK CK DIA DIAGRA GRAM M
d r a o B O / I
d r a o
1 2 U U E E R r / R / _ _ P L L / S S B _ _ / b B B C P G T T V V / / / U U C C Y Y R O O _ _ _ _ _ _ _ T T T T T A U U U U U A _ _ O O O O O 1 2 V V V V V E E
h 3 r h c 3 c t r 6 o t i 6 e i e 7 o e f 7 e f w f & 1 d w d 1 i f u & S i u S M M V B V V B V M M A A
e e l l u M M u d A d A
r B
R / L _ T U O _ A
T U O L A C I T P 0 M 8 O J 5 N 4 T A U _ O C _ A R D / L 0 8 7 C 1 A M D C P
T U O L A I X A O C
e H t S y A B L M F 8 ] 1 2 : 6 [ A H
3 7 3 h 6 c 1 t a T L V L 4 7
T
d r a o B N I A M M M A e A M M e t R t R A y A y e B D e t D R t B R y S y M M S D B D 4 B 4 S R 6 M S R 6 M 4 D 4 D R 6 R 6 D D D D D D
R E D A O L
D D H
2. SMPS BOARD BLOCK DIAGRAM 1 0 7 1 P
) + ( D F
) - V A A ( V V 8 D 9 . - 4 F 2 1 3
A A V V 3 3 . 3 5
L T C R W P
) D D H ( V 5
) D D H ( V 2 1
1 0 V D V 1 5 2 1 P
K , & C 6 5 6 G O 1 E L R , 5 1 R B 6 5 C V W 1 5 / C S I , 1 K 8 C 1 1 R , 2 & O L 0 1 D R B 2 1 Z , E I G C , 1 F 3 I N 1 1 T I 2 R 1 , C H T E O R 1 R O F , 9 1 1 2 R M S 1 D
K C 2 2 & O L 1 R B R , E I G 2 2 F I N 1 T I C H , C T 2 E O 2 R O 1 D M S
K & C O R L 1 E I B 2 1 F I G C , T N 5 C I 2 E H 1 R T O D V O 5 M S
K 3 3 & C 1 C , R O L 3 E I B 2 F I G 1 T N L , C I 3 2 E H 1 R T C , V O 4 O 4 2 1 M 1 S D
K 4 & C 3 1 C R O L , E I B 4 2 F I G 1 T N L , C I 4 E H 2 R T 1 , V O C 8 . O 7 2 3 M 1 S D
2 K 2 & C 1 D Z R O , L E I B 7 4 F I G 1 T N R , C I 6 E H 2 R T 1 C V O , 3 O 6 3 M 2 S 1 D
K & C , 5 R O L 2 E 5 I B 1 3 C F , I G 0 1 T N 3 C , C I 1 5 E H D 2 R T 8 1 L V O 2 1 3 . O D 5 M S
, 5 & K C 5 G O 1 5 E L R , 5 1 R B 5 5 C V W 2 / 1 1 S C I
, , , K 2 6 C K 4 4 4 4 A C 1 1 1 3 B O R , R , R , 4 D L 1 3 5 1 E B 4 4 4 C E 1 1 1 F R R R
4. POWER MAIN BOARD BLOCK DIAGRAM V V 3 . 5 3
V 3 . 3
H S A L F _ 3 3 V
1 H H 1 0 S 0 S 2 2 A 1 A 1 L L C C I F F I
3 3 7 7 3 5 3 5 6 0 6 0 1 2 1 2 T 1 T 1 V C V C I L L I 4 4 7 7
V 8 . 1 I M D H _ 8 1 V
I M
V 5 . 2
V 8 . 1
V 5 2 . 1
5. I/O BOARD BLOCK DIAGRAM O I D U A . R A E R 2 T R A C S 2 T R A C S Y _ O E D I V . R S / / L _ N N I I _ _ A V _ _ 2 2 U U E E
R / L _ T U O _ A
1 1 0 M 2 A O 0 6 R 7 1 P S C I C E 4 E 2 S O / I C 2 I
O / I C 2 I
e t u k M c o O l I D B U A H _ L L _ T E C T _ U E M T _ U S M - Y Z S
R / L _ E T U M _ Z
1 T R A C S
R / L _ T T U U O O _ _ V A _ _ 2 2 U U E E
N I _ V _ 1 U E
R / L _ N I _ A _ 1 U E
T A U _ O C _ R A / D L
T U O _ R / L _ U T
T U O _ T R A C S _ R
T U O _ T R A C S _ G
T U O _ T R A C S _ B
T U O r_ P _ R
T U O _ y P _ G
T U O _ b P _ B
O O _ _ A A C C R R _ b _ P Y
O E D I V S
T U O _ A C R r_ P
T U O _ A P E S _ C
L L A A I C I X T A P O O C
T U O _ A P E S _ Y
r r e h f e f 3 h f c 3 f c t 6 1 u t i 1 u 7 i 0 6 B 0 w 1 w + B 8 7 1 + 8 S o o S C M C I M e I e V d M V M d i A i A V V
R / L _ T U O _ A
2 0 8 C I
T U O _ V _ 1 U E
R / L _ T U O _ A _ 1 U E
T N E N O P M O T T C U U
R / L _ T U O _ A _ W S
T U O _ V _ W S
L _ A N E _ T S O H
C 0 C 0 A 8 A 8 3 D 7 D 3 0 7 1 0 8 1 O O 8 I M I C M C I D C I D C P U P U A A
N I _ K L C _ T S O H N I _ A T A D _ T S O H
M O C I M
K L C M _ T U O A 0 D _ T U O A
T U T T T O _ U U U S O O O B _ _ V _ R G B C
T U O _ Y
T U O _ C
T U O _ F I D P S
6. VIDEO INPUT BLOCK DIAGRAM
n I F R
NIM TUNER TU601
] 0 : 7 [ A T A D _ S T
PVC01 CN2000
] 0 [ A T A D _ S T
TU_V_IN
r r e o d s s o e 8 1 c c 3 1 0 e o r 9 D 7 P A C I o o A e i S d i d u V A
SW_V_IOUT
EU1_V_IN
3 6 1 W / 0 S 7 8 1 C M I V A M
EU2_V_IN/S.VID_Y B_SCART_IN G_SCART_IN R_SCART_IN/S.VID_C
) 1 V A ( S A B C V R C / T R A C S
S ) B 2 V V C A B ( T / R G A / C R S
7. VIDEO OUTPUT BLOCK DIAGRAM
e ) n e d t o i u o t M m p r B o T P / / G R b / A P / R t Y a C S (
2 0 8 K J
T U O _ L E S _ B G R
I M
) 1 V R A / ( B A / C G R / S T B R V A C C S
r P / b P / Y C / Y
)
B G /
R /
S S B B
S 2 B V V A
8. AUDIO INPUT BLOCK DIAGRAM
n I F R
NIM TUNER TU701
] 0 : 7 [ A T A D _ S T
PVC01 CN2000
T U O R / L _ U T
M F A I _ S M A ] C 0 [ E A S T A D _ S T
P S M
N I S 2 I
C A D
c P 8 e S 3 1 D 0 . D 1 7 9 o i o e d A C I d i u A V A S S T
O I R D / U L A _ _ T U W S O
3 3 W / 0 6 8 S 7 1 V 1 M C I A M
) 1 V A ( A N I C R R / / L T R A C S ) 2 V N I A ( R T / R L A C
9. AUDIO OUTPUT BLOCK DIAGRAM
t u O R / L 2 A 0 C 8 R
K J
l a i x a o C
M O C I M
E T U M _ S Y S
T U R O / _ L A
P 2 M r 0 A e 8 P t l i C I O F
i E t T u c r U i M C
E T R U
T U C O
3 6 1 W / 0 S 7 8 1 C M I V A M
) 1 V t A u ( o A R C / R L / T R A C S t u o R / L
) 2 V A ( T R A C S
10. POWER I/O BLOCK DIAGRAM A V 3 . 5 _ W S
V 8 . 1
3 6 1 3 1 7 0 6 7 0 1 8 1 8 C M C I M I M M
P P M 0 M 0 A 8 A 8 5 P 5 P 4 4 O O M M 2 J 2 0 J 0 N N 8 8 C C I I
G V 2 1 _ W S
A V 3 . 3
V 8 . 1 R R D D E E 5 8 5 D 8 5 D 3 R 5 3 R 1 1 O O 1 1 1 E 1 E 0 C 7 G C 0 7 G N 9 E N 9 A A E U V C D A U V C I T F I D A T F S S D V D V / / T T V A A
8 . 4 1 5 7 1 1 1 C I 1 D L
C C E k E k C c C c I l o I o l M M B B D D H H
n n i i a a p M p M U U l S S l l l 2 2 u I u I P r P r o o f f
V 5 . 2
V 3 . 3 H _ L T C _ R W P
A V 8 . 3 D V 0 . 5
3 3 2 R 5 8 1 7 C 2 I A I K
H _ L T C _ R W P
5 1 2 5 R 1 8 7 C I A I K
A V 3 . 3 V 5 2 . 1
11. FLD TIMER BOARD BLOCK DIAGRAM
Y A D L F P V S I D D D D D D E D E L H L H 1 1 P ~ 1 1 1 D D 0 E E P L L
D D E V L D
Y E K
R E M
1 / 0 N T R _ Y E
7 0 G ~ 1 0 G
N r O e v C i O e M c e E R R
V A T K N C O A J R F
n K I C V A D J
B K S C U A J
r e 5 v 1 1 i 0 3 r 9 6 D C I T P D F V T U O _ R B K E L T S C M
) A + V ( N I 3 D . _ F A C A 5 ) _ V V _ ( M 9 W D W 3 . R
N I _ S B V C _ F
R / L _ A _ F
A / + A _ P T
B / + B _ P T
D / + D _ B S U
C C V _ B S U
12. POWER TIMER AND CI BLOCK DIAGRAM r r e e v v i i 1 1 e e 0 c 0 c 9 e 9 e C C R R R R C C / / R R
A V 3 . 5 ) ( D F n n o o r r 1 t t 1 i i 0 0 g 9 g 9
I C _ C C V D D R R
MEMO
IMPORTANT SAFETY
NOTE :
WHEN SERVICING THIS CHASSIS, UNDER NO CIRCUMSTANCES SHOULD THE ORIGINAL DESIGN BE MODIFIED OR ALTERED WITHOUT PERMISSION FROM THE LG CORPORATION. ALL COMPONENTS SHOULD BE REPLACED ONLY WITH TYPES IDENTICAL TO THOSE IN THE ORIGINAL CIRCUIT. SPECIAL COMPONENTS ARE SHADED ON THE SCHEMATIC
CIRCUIT DIAGRAMS 1. SMPS CIRCUIT DIAGRAM
FOR EASY IDENTIFICATION. THIS CIRCUIT DIAGRAM MAY OCCASIONALLY DIFFER FROM THE ACTUAL CIRCUIT USED. THIS WAY,IMPLEMENTATION OF THE LATEST SAFETY AND PERFORMANCE IMPROVEMENT CHANGES INTO THE SET IS NOT DELAYED UNTIL THE NEW SERVICE LITERATURE IS PRINTED.
FD(+)FD(-) No Power D121 is Defective No Power BD101, R101 is Defective
-28VA No Power D122 is Defective
5V No Power D125 is Defective
S/W Error IC101 is Defective
13.5VA No Power D124 is Defective
No Power D102 is Defective
3.8VA No Power D127 is Defective
5.3VA No Power D128 is Defective No Power F101 is Defective
33VA No Power D126 is Defective
Switching Error IC102, IC103 are Defective
12V No Power IC155 is Defective
5V No Power IC156 is Defective
1. Shaded( ) parts are critical for safety. Replace only with specified part number. 2. Voltages are DC-measured with a digital voltmeter during Play mode.
2. MPEG CIRCUIT DIAGRAM
3. FLASH / DDR CIRCUIT DIAGRAM
4. IEEE1394 CIRCUIT DIAGRAM
5. ATAPI ATAPI / HDMI / USB CIRCUIT DIAGRAM
6. I/O µ-COM CIRCUIT DIAGRAM
7. SCART / RCA CIRCUIT DIAGRAM
8. TUNER / DECODER CIRCUIT DIAGRAM
9. LDO CIRCUIT DIAGRAM
10. COMMON INTERFACE BOARD CIRCUIT DIAGRAM(OPTIONAL PART)
11. HDMI DAUGHTER BOARD CIRCUIT DIAGRAM
12. TIMER CIRCUIT DIAGRAM (8 & 9 TOOLS)
13. KEY CIRCUIT DIAGRAM (8 & 9 TOOLS) TOOLS)
INFORMATION : 1. Voltage Check using RH300 DV1 2. EE Mode : Check with Signal C2 3. Playback Mode : Check with DVD TEST DISC KDV-N Chapter 2 4. Record Mode : Check with with recording signal C2 using DVD -RW
CIRCUIT VOLTAGE CHART 1. ICs on MAIN BOARD (TOP) PIN NO.
PIN NAME
EE M ODE
PB M ODE
REC M OD E
IC1201 M29W640GT(STM_8MB) FLASH MEMORY IC201 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
HA HA16 HA HA15 HA HA14 HA HA13 HA HA12 HA HA11 HA HA10 HA9 HA HA20 HA21 / E5 E5 _ _L LWE n / RS RS T_ T_ FL FL AS AS H HA22 /RST_FLASH (WP#) NC HA19 HA18 HA8 HA7 HA6 HA5 HA4 HA3 H A2 A2 HA1 / CS CS 0_ 0_ FL FL AS AS H VSS /E5_OE HD0 HD8 HD1 HD9 HD2 HD10 HD3 HD11 VDD HD4 HD12 HD5 HD13 HD6 HD14 HD7 HD15 VSS V 33 33_ F FL L AS AS H HA17
0.08 0.08 0.08 0.08 0.08 0.08 0.08 0.08 0.08 0.08 3 .2 6 4 .0 0 0.00 4 .0 0 0.00 0.08 0.08 0.08 0.08 0.08 3.26 3.26 3.26 3 .2 6 3.26 3 .2 6 0.00 3.26 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 3.28 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 0.00 3 .2 8 0.08
0. 0 8 0. 0 8 0. 0 8 0. 0 8 0. 0 8 0 .0 8 0. 0 8 0. 0 . 08 0. 0 8 0. 0 8 3 .2 6 4 .0 .0 0 0. 0 0 4 .0 0 0. 0 .0 0 0. 0 8 0. 0 8 0 .0 8 0 .0 8 0 .0 8 3 .2 6 3 .2 6 3 .2 6 3 .2 .2 6 3 .2 6 3 .2 .2 6 0 .0 0 3. 2 6 0 .0 0 0 .0 0 0 .0 0 0 .0 0 0 .0 0 0. 00 0 .0 0 0. 00 3 .28 0 .0 0 0. 00 0 .0 0 0. 00 0 .0 0 0. 00 0 .0 0 0. 00 0 .0 0 3 .2 8 0. 0 8
0. 0 8 0. 0 8 0. 0 8 0. 0 8 0. 0 8 0 .0 .08 0. 0 8 0 . 08 0. 0 8 0 . 08 3 .1 9 4 .0 .0 0 0 . 10 4 .0 0 0 . 00 0 . 08 0 . 08 0. 0 8 0. 0 8 0. 0 8 3. 1 9 3. 1 9 3. 1 9 3 .1 .1 9 3. 1 9 3 .1 .1 9 0. 01 3. 1 9 0. 01 0. 01 0. 01 0. 01 0. 01 0. 01 0. 01 0. 01 3. 25 0. 01 0. 01 0. 01 0. 01 0. 01 0. 01 0. 01 0. 01 0. 01 3 .2 5 0 . 08
IC1202 HYB25DC512160CE-5 16X16 DDR SDRAM IC1202 1 2 3 4 5 6 7 8 9 10 11 12
VDD S DRA M_ M_ DQ 0 VD VDDQ S DRA M_ M_ DQ 1 S DRA M_ M_ DQ 2 VS VSSQ S DRA M_ M_ DQ 3 S DRA M_ M_ DQ 4 VD VDDQ S DR DR AM AM _D _D Q5 Q5 S DR DR AM AM _D _D Q6 Q6 VSSQ
2.42 1 .2 3 2.42 1 .1 0 1 .1 0 0.00 1 .1 0 1 .1 0 2.42 1 .1 0 1 .1 0 0.00
2. 2 .4 2 1 .2 3 2 .4 .42 1 .1 0 1 .1 0 0 .00 1 .1 0 1 .1 0 2 .4 .40 1 .0 .0 7 1 .0 .0 7 0. 00
2 . 41 1 .2 3 2 . 46 1 .1 0 1 .1 0 0. 00 1 .0 7 1 .1 0 2 . 40 1 .0 .0 7 1 .0 .0 7 0 . 00
Brand : Mitsubishi, VR Mode
2. ICs on MAIN BOARD (BOTTOM) PIN NO. 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66
PIN NAME S DR DR AM AM _D _D Q7 Q7 NC VDDQ S DR DR AM AM _D _D QS QS 0 S DR DRA M_ M_ A1 A13 VDD NC S DR DR AM AM _D _D QM QM 0 S D RA M_ M_ WE WE # S DR DR AM AM _C _C AS AS # S DR DR AM AM _R _R AS AS # /CS NC S DR DRA M_ M_ BA BA0 S DR DRA M_ M_ BA BA1 S DR DRA M_ M_ A1 A10 SD SDRA M_ M_ A0 A0 SD SDRA M_ M_ A1 A1 SD SDRA M_ M_ A2 A2 SD SDRA M_ M_ A3 A3 VDD V SS SS SD SDRA M_ M_ A4 A4 SD SDRA M_ M_ A5 A5 SD SDRA M_ M_ A6 A6 SD SDRA M_ M_ A7 A7 SD SDRA M_ M_ A8 A8 SD SDRA M_ M_ A9 A9 S DR DR AM AM _A _A 11 S DR DRA M_ M_ A1 A12 NC S DR DR AM AM _C _C LK LK E S DR DR AM AM _C _C LK LK 1 S DR DR AM AM _C _C LK LK #1 #1 S DR DR AM AM _D _D QM QM 1 VSS VREF NC S DR DR AM AM _D _D QS QS 1 VSSQ NC S DR DR AM AM _D _D Q8 Q8 VDDQ S DR DR AM AM _D _D Q9 Q9 S DR DR AM AM _D _D Q1 Q1 0 VSSQ S DR DR AM AM _D _D Q1 Q11 S DR DR AM AM _D _D Q1 Q1 2 VDDQ S DR DR AM AM _D _D Q1 Q1 3 S DR DR AM AM _D _D Q1 Q1 4 VSSQ S DR DR AM AM _D _D Q1 Q1 5 VSS
EE MODE 1 .1 0 0.00 2.42 1 .2 0 1 .1 4 2.42 0.00 0 .5 8 1 .8 1 1 .7 6 1 .8 0 0.00 0.00 1 .2 1 1 .2 0 1 .1 6 1 .1 5 1 .2 0 1 .1 6 1 .2 0 2.42 0 .0 0 1 .2 0 1 .2 0 1 .2 0 1 .2 0 1 .2 0 1 .2 0 1 .1 6 1 .1 5 0.00 1 .8 4 1 .2 3 1.1 18 8 0 .5 8 0.00 1.20 0.00 1 .2 0 0.00 0.00 1 .0 9 2.42 1 .1 0 1 .0 8 0.00 1 .0 8 1 .1 3 2.42 1 .0 8 1 .0 7 0.00 1 .1 0 0.00
PB M ODE 1 .0 .0 3 0. 0 .0 0 2. 4 0 1 .1 .1 9 1 .2 0 2 .42 0. 0 .0 0 0 .5 .5 8 1 .7 .7 7 1 .6 .6 7 1 .7 .7 7 0. 0 . 00 0. 0 .0 0 1 .2 1 1 .2 0 1 .2 1 1 .1 0 1 .1 2 1 .1 2 1 .1 9 2 .40 0 .0 .0 0 1 .1 9 1 .1 9 1 .1 9 1 .1 9 1 .1 9 1 .1 9 1 .1 .11 1 .1 2 0. 0 .0 0 1 .8 .8 2 1 .2 .2 2 1 .1 .1 8 0 .5 .5 7 0 .0 1 1. 19 0. 0 .0 0 1 .1 .1 9 0. 00 0. 0 .0 0 1 .0 .0 8 2. 4 1 1 .0 .0 9 1 .0 .0 6 0. 01 1 .0 .0 3 1 .1 .1 2 2. 4 0 1 .0 .0 5 1 .0 .0 7 0. 00 1 .0 .0 8 0 .0 0
REC M ODE 1 .0 .0 3 0 . 00 2. 4 1 1 .1 .1 9 1 .1 2 2 . 41 0 . 00 0 .5 .5 7 1 .7 .7 8 1 .7 .7 0 1 .8 .8 5 0 . 01 0 . 00 1 .2 2 1 .2 2 1 .2 1 1 .2 1 1 .2 1 1 .1 3 1 .1 9 2 . 40 0 .0 .0 0 1 .1 9 1 .1 9 1 .1 9 1 .1 9 1 .1 9 1 .1 9 1 .1 .1 3 1 .1 3 0 . 00 1 .8 .8 3 1 .2 .2 2 1 .1 .1 8 0 .5 .5 7 0 . 01 1. 19 0 . 00 1 .1 .1 9 0. 0 0 0 . 00 1 .0 .0 8 2. 4 1 1 .0 .0 9 1 .0 .0 6 0. 0 1 1 .0 .0 3 1 .1 .1 2 2. 4 0 1 .0 .0 5 1 .0 .0 5 0. 0 0 1 .0 .0 3 0 . 00
IC1203 HYB25DC512160CE-5 16X16 DDR SDRAM IC1203 1 2 3 4 5 6 7 8
VDD S DR DR AM AM _D _D Q1 Q1 6 VD VDDQ S DR DR AM AM _D _D Q1 Q1 7 S DR DR AM AM _D _D Q1 Q1 8 VS VSSQ S DR DR AM AM _D _D Q1 Q1 9 S DR DR AM AM _D _D Q2 Q2 0
2.42 1 .2 1 2.42 1 .2 1 1 .2 1 0.01 1 .2 1 1 .0 0
2. 2 .4 2 1 .2 .2 1 2 .4 .42 1 .2 .2 1 1 .2 .2 1 0 .01 1 .2 .2 1 0 .9 .9 3
2 . 41 1 .2 .2 1 2. 4 1 1 .2 .2 0 1 .2 .2 0 0 . 01 1 .2 .2 0 0 .9 .9 3
PIN NO. 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66
PIN NAME VD VDDQ S DR DR AM AM _D _D Q2 Q2 1 S DR DR AM AM _D _D Q2 Q2 2 V S SQ S DR DR AM AM _D _D Q2 Q2 3 NC VDDQ S DR DR AM AM _D _D QS QS 2 S DR DR AM _A _A 13 13 VDD NC S DR DR AM AM _D _D QM QM 2 S D RA M_ M_ WE WE # S DR DR AM AM _C _C AS AS # S DR DR AM AM _R _R AS AS # /C /CS NC S DR DRA M_ M_ BA BA0 S DR DRA M_ M_ BA BA1 S DR DR AM _A _A 10 10 SD SDR AM _A _A 0 SD SDR AM _A _A 1 SD SDR AM _A _A 2 SD SDR AM _A _A 3 VDD V SS SS SD SDR AM _A _A 4 SD SDR AM _A _A 5 SD SDR AM _A _A 6 SD SDR AM _A _A 7 SD SDR AM _A _A 8 SD SDR AM _A _A 9 S DR DR AM _A _A 11 S DR DR AM _A _A 12 12 NC S DR DR AM AM _C _C LK LK E S DR DR AM AM _C _C LK LK 0 S DR DR AM AM _C _C LK LK #0 #0 S DR DR AM AM _D _D QM QM 3 VSS VREF NC S DR DR AM AM _D _D QS QS 1 V S SQ NC S DR DR AM AM _D _D Q2 Q2 4 VDDQ S DR DR AM AM _D _D Q2 Q2 5 S DR DR AM AM _D _D Q2 Q2 6 V S SQ S DR DR AM AM _D _D Q2 Q2 7 S DR DR AM AM _D _D Q2 Q2 8 VDDQ S DR DR AM AM _D _D Q2 Q2 9 S DR DR AM AM _D _D Q3 Q3 0 V S SQ S DR DR AM AM _D _D Q3 Q3 1 VSS
EE MODE 2.42 1 .2 1 1 .2 1 0.00 1 .2 1 0.00 2.42 0 .8 5 1 .1 4 2.42 0.00 0 .0 1 1 .8 1 1 .7 6 1 .8 0 0.01 0.00 1 .2 2 1 .2 1 1 .1 6 1 .1 6 1 .1 6 1 .1 6 1 .2 0 2.42 0 .0 0 1 .2 0 1 .2 0 1 .2 0 1 .2 0 1 .2 0 1 .2 2 1 .1 4 1 .1 3 0.00 1 .8 6 1 .2 4 1.2 21 1 0 .5 6 0.01 1.21 0.00 0 .8 2 0.00 0.00 1 .2 2 2.45 1 .2 2 1 .2 2 0.00 1 .2 2 1 .2 2 2.45 1 .2 2 1 .1 6 0.01 1 .2 2 0.00
PB M ODE 2 .4 .42 1 .2 .2 1 1 .2 .2 1 0 . 00 1 .2 .2 1 0. 0 . 00 2. 4 2 0 .8 .8 5 1 .1 4 2 .42 0. 0 . 00 0 .0 .0 1 1 .8 .8 1 1 .7 .7 6 1 .8 .8 0 0. 0 . 01 0. 0 . 00 1 .2 2 1 .2 1 1 .1 6 1 .1 6 1 .1 6 1 .1 6 1 .2 0 2 .42 0 .0 .0 0 1 .2 0 1 .2 0 1 .2 0 1 .2 0 1 .2 0 1 .2 2 1 .1 2 1 .1 0 0. 0 . 00 1 .8 .8 6 1 .2 .2 4 1 .2 .2 1 0 .5 .5 6 0 . 01 1. 21 0. 0 . 00 0 .8 .8 2 0 . 00 0. 0 . 00 1 .2 .2 2 2. 4 5 1 .2 .2 2 1 .2 .2 2 0 . 00 1 .2 .2 2 1 .2 .2 2 2. 4 5 1 .2 .2 2 1 .1 .1 6 0 . 01 1 .2 .2 2 0 . 00
REC M ODE 2. 4 1 1 .2 .2 0 1 .2 .2 0 0. 0 1 1 .2 .2 0 0 . 00 2. 41 0 .8 .8 9 1 .1 2 2. 41 0 . 00 0 .0 .0 1 1 .7 .7 9 1 .7 .7 1 1 .7 .7 8 0 . 01 0 . 00 1 .2 1 1 .2 1 1 .1 3 1 .1 3 1 .1 3 1 .1 4 1 .2 0 2. 41 0 .0 .0 1 1 .2 0 1 .2 0 1 .2 0 1 .2 0 1 .2 0 1 .2 0 1 .1 4 1 .1 3 0 . 00 1 .8 .8 4 1 .2 .2 3 1 .1 .1 9 0 .5 .5 5 0 . 01 1. 19 0 . 00 0 .8 .8 9 0. 0 0 0 . 00 1 .2 .2 0 2. 41 1 .1 .1 9 1 .0 .0 1 0. 0 1 1 .3 .3 8 1 .3 .3 5 2. 41 1 .2 .2 0 1 .2 .2 2 0. 0 1 1 .3 .3 5 0 . 01
IC1204 G2995 IC204 1 2 3 4
NC GND V SE SENSE VR VREF
0.00 0.00 1.21 1.20
0 0..00 0. 0 . 00 1. 2 1 1 .19
0 0..00 0 . 00 1. 2 1 1. 19
PIN NO. 5 6 7 8
PIN NAME VD VDDQ AVIN PV PVIN VTT
EE MODE 2.42 2.42 2.42 1.21
PB MODE 2.40 2. 2 .4 0 2. 2 .4 0 1. 1.21
REC M ODE 2. 41 2 .41 2 .41 1. 1 .2 1
IC1301 TSB41AB1 IEEE1394-DV Input IC401 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
P HY HY _C _CL K P HY _C _CT L0 L0 P HY _C _CT L1 L1 P HY HY _D _D ATA 0 P HY HY _D _D ATA 1 P HY HY _D _D ATA 2 P HY HY _D _D ATA 3 P HY HY _D _D ATA 4 P HY HY _D _D ATA 5 P HY HY _D _D ATA 6 P H Y_ Y_ DA DATA 7 13 39 94 4_ _P D P HY _L _L PS PS GND P HY HY _L _L IN IN KO KO N PC0 PC1 PC2 ISO CPS DV DVDD21 TESTM SE SM AVDD25 GND TPBTPB+ TPATPA+ TPBIAS AG AGND32 RO RI AVDD35 GND / RS RS T_ T_ PH PH Y FI LTE R0 FI LTE R1 PL PLLVDD PL PLLGND XI XO DV DVDD44 DV DVDD45 GND GND PH PH Y_ Y_ LR LR EQ EQ
1 .6 7 0 .0 1 0 .0 1 0 .0 1 0 .0 1 0 .0 1 0 .0 1 0 .0 1 0 .0 1 0 .0 1 0 .0 1 0 .0 1 3 .1 9 0.00 0 .0 .0 2 0.01 0.01 0.01 3.24 3.24 3.24 3.24 0.01 0.01 3.24 0.00 1.57 1.78 1.85 1.78 1.83 0.01 0.01 1.21 3.24 0.00 3 .2 1 0 .0 1 1 .2 7 3.26 0.00 1.49 1.49 3.26 3.26 0.00 0.00 0 .0 1
1 .6 .6 7 0. 01 01 0. 01 01 0 .0 1 0 .0 1 0 .0 1 0 .0 1 0 .0 1 0 .0 1 0 .0 .0 1 0 .0 1 0 .0 .0 1 3. 19 19 0. 0.00 0 .0 .0 2 0 0..01 0 0..01 0 0..01 3 3..24 3. 3.24 3.24 3.24 0. 0.01 0 0..01 3.24 0. 0.00 1. 1 . 57 1 .7 .78 1. 1 . 85 1. 1.78 1.83 0.01 0.01 1. 1.21 3.24 0. 0.00 3 .2 0 0 .0 .0 1 1 .2 .2 8 3. 24 0.00 1.48 1 1..49 3.24 3.24 0. 0.00 0. 0.00 0 .0 1
1.6 69 9 0 .0 1 0 .0 1 0 .0 .0 1 0 .0 .0 1 0 .0 .0 1 0 .0 .0 1 0 .0 .0 1 0 .0 .0 1 0 .0 .0 1 0 .0 .0 1 0 .0 1 3 .2 0 0. 0 . 00 0 .0 .0 2 0 . 01 0 . 01 0 . 01 3 3..24 3. 3.24 3 . 24 3.24 0. 0.01 0 0..01 3. 2 4 0. 0 . 00 1 .5 .57 1. 78 1 .8 .85 1 .78 1. 83 0. 01 0. 0.01 1. 1.21 3. 2 4 0. 0 . 00 3 .2 .2 0 0.0 01 1 1.2 28 8 3. 2 4 0. 00 1 1..48 1 1..49 3 . 24 3 . 24 0. 0 . 00 0. 0 . 00 0 .0 .0 1
IC1401 TPS2051B_1CH USB INTERFACE
IC1401 1 2 3 4 5 6 7 8
GND IN IN U SB SB _P _P WR WR _E _E N USB_OCS OUT OUT US U SB_5V
0.00 4.96 4.96 0 .0 5 4.95 4.95 4.93 4.92
0. 0 .0 0 4 4..96 4 4..96 0 .0 .0 5 4.95 4. 4 . 94 4. 4 . 94 4.90
0 . 00 4 4..96 4 4..96 0 .0 .0 5 4. 94 4 .9 4 4 .9 4 4. 92
PIN NO.
PIN NAME
EE MODE
PB MODE
REC M ODE
IC1205 74LVT16373 ADDRESS LATCH IC1205 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
1OE HA6 HA7 GND HA8 HA9 VCC HA HA10 HA HA11 GND HA12 HA13 HA14 HA15 GND HA16 HA17 VCC HA18 HA19 GND HA20 HA21 2OE E5 E5_ALE HD15 HA14 GND HD13 HD12 VCC HD11 HD10 GND HD9 HD8 HD7 HD6 GND HD5 HD4 VCC HD3 HD2 GND HD1 HD0 1LE
0.00 0.08 0.09 0.01 0.08 0.08 3.23 0.08 0.08 0.01 0.08 0.08 0.08 0.08 0.01 0.08 0.08 3.23 0.08 0.08 0.01 0.08 0.08 0.01 0.01 0.01 0.01 0.01 0.01 0.01 3.23 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 3.23 0.01 0.01 0.01 0.01 0.01 0.01
0. 0 .01 3. 3.23 0. 0.08 0. 0 .01 0. 0.08 0. 0.08 3. 3 .23 0 .08 0 .08 0 .01 0.08 0.08 0.08 0.08 0 .01 0.08 0.08 3 .23 0.08 0.08 0 .01 0.08 0.08 0 .01 0.01 0.01 0.01 0 .01 0.01 0.01 3 .23 0 .0 .01 0.01 0 .01 0 .01 0 .01 0 .01 0 .01 0 .01 0 .01 0 .01 3 .23 0 .01 0 .01 0 .01 0 .01 0 .01 0 .01
0 .01 0. 0 .0 8 0. 0 .0 8 0 .01 0. 0 .0 8 0. 0 .0 8 3 .23 0.08 0.08 0.01 0.08 0.08 0.08 0.08 0.01 0.08 0.08 3 .23 0.08 0.08 0.01 0.08 0.08 0.01 0.01 0.01 0.01 0.01 0.01 0.01 3 .23 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 3 .23 0.01 0.01 0.01 0.01 0.01 0 . 01
INFORMATION : 1. Voltage Check using RH300 DV1 2. EE Mode : Check with Signal C2 3. Playback Mode : Check with DVD TEST DISC KDV-N Chapter 2 4. Record Mode : Check with recording signal C2 using DVD -RW Brand : Mitsubishi, VR Mode
3. ICs on I/O BOARD PIN NO.
PIN NAME
EE M OD E
PB REC MOD E MOD E
IC151 KIA78R25 1 2 3 4
IN O UT UT GND
3V 2.48V 0V
CONTROL
3.9V
3V 3V 2.48V 0V 3.9V
3V 3V 2.48V 0V 3.9V
IC152 KIA278R33 1
IN IN
3.68V
3.68V
3.68V
2 3 4
O UT UT GND C ON ON TR OL OL
3.28V 0V 4 .4 .4 7V 7V
3.28V 0V 4 . 47 V
3.28V 0V 4 .4 .4 7V 7V
IC153 G5627 1 2 3
V CC CC R EF EF GND
5.23V 0.79V 0V
5.23V 0.79V 0V
5.23V 0. 0.79V 0V
4 5 6
FB EN PGND
0.8V 2.6V 0.05V
0. 0.8V 2. 2.6V 0. 0.05V
0. 0.8V 2. 2.6V 0. 0 .05V
7 8
L LX X VI V IN
1.37V 5.23V
1.37V 5.23V
1.37V 5.23V
IC154 LD1117_1.8 1 2 3 4
AD ADJ/GND OU OUT IN IN VO VOUT
0V 1.8V 3.19V 1.8V
0V 1. 1.8V 3.19V 1 .8V
0V 1. 1 .8V 3.17V 1.8V
IC602 KIA78R05 1
IN
5.2V
5. 5.2V
5. 5.2V
2 3 4
O UT UT GND C ON ON TR OL OL
4.97V 0V 3 .7 .7 6V 6V
4.97V 0V 3 . 76 V
4.97V 0V 3 .7 .7 6V 6V
1 2
GND A NT NT( 5 5V V)
0V 0 .0 2 2V V
0V 0 .0 .03 V
0V 0. 0.0 3 3V V
3 4 5
A NT NT( 5 5V V) V CC CC ( 5 5.. 3V 3V) A NT NT_5V_CTL
0 .0 2 2V V 5 .2 V 0V
0 .0 .03 V 5 .2 V 0V
0. 0.0 3 3V V 5 .2 V 0V
6
5.15V VCC (100K/5.3V) 5.15V
5.15V 5.15V
5.15V 5.15V
IC604 SI3865DV
IC606 74HC4066 1 2 3 4
I2 2C C_ CL K 4 .9 3 3V V A_TUN A_TUNER_ ER_CLK CLK 4.93 4.93V V A_TUNER_DATA 4.93V 4.93V I 2C 2C _D _D ATA 4 .9 .9 3V 3V
4 .9 .93 V 4.93V 4.93V 4.93V 4.93V 4 . 93 93 V
4 .9 3 3V V 4.93V 4.93V 4.93V 4.93V 4 .9 .9 3V 3V
5 6 7 8 9 10 11 12 13
2E PW WR R_CTL_H GND SC SC L D_TUNER_CLK D_TUNER_DATA SDA PW PWR_CTL_H 1E
5.2V 0V 0V 2.41V 2V 2V 2.37V 0V 5.2V
5. 5.2V 0V 0V 2.46V 2.7V 2.7V 2. 2.4V 0V 5. 5.2V
5. 5.2V 0V 0V 2. 2.7V 2V 2V 2.7V 0V 5. 5.2V
14
VC VCC
5.21V
5. 5.21V
5. 5.21V
IC701 UPD78F0535GK 1 2 3 4
NC NC FL FLMD0 ANT_5V_CTL MIC_DE MIC_DET_I T_IN_L N _L
5.19V 0V 0V 0.55V 0.55V
5.2V 0.01V 0.01V 0.66V 0.66V
5. 5.19V 0V 0V 0.55V 0.55V
5 6 7
S_ S _DET_L RE R E S ET XT2 (32.7 (32.7 KHZ) KHZ)
0V 5.2V 2.95V 2.95V
0.01V 5.2V 3.07V 3.07V
0V 5.2V 3.02V 3.02V
8 9
X T1 T1 ( 32 32 .7 .7 K HZ HZ ) FLMD0
2 .0 .0 8V 8V 0V
3 .2 .2 V 0V
2 .1 .1 2V 2V 0V
PIN NO. 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
PIN NAME X 2 ( 10 10 M Hz Hz ) X1 (1 10 0 M Hz Hz ) RE REGC VS S EV SS VDD EVDD I2 2C C _C _C LK LK I 2C 2C _D _D ATA S TA NB NB Y_ Y_ LE LE D C EC EC_TX C EC EC _R X A UD UD IO IO _ _S S EL EL COMP_MUTE_H AUDIO_MUTE_L VIDEO_MUTE_L Z_MUTE_CTL_L GREEN_PWR_H T IM IM ER ER _H _H POWER_CTL_H DAV _I _IN MO OD D _O _O N_ N_ H D _T _T U_ H S YN YN C_ D_ D_ H R GB GB _C _C ON ON T R GB GB _O _O UT UT T U_ U_ SE SE _V _V L_ L_ H T U_ U_ SE SE CA CA M_ M_ H REMOCO REMOCON_I N_IN NC NC IT TT T _R _R ES ES ET ET _L _L F LD LD _E _E NA NA _L _L TX TXD RX RXD FLD_DATA_OUT FL FLD_DATA_IN F LD LD _C _C LK LK AV AV RE F AVSS K EY EY _R _R TN TN _0 _0 K EY EY _R _R TN TN _1 _1 AF AFT_IN C+ C+ _D _DE T_ T_H R GB GB _I _I N_ N_ H NC NC NC NC NC DIG_LINK_TV_H HOST_C HOST_CLK_ LK_IN IN HOST_DATA_IN HOST_DATA_OUT H OS OS T_ T_ EN EN A_ A_ L HOST_RESET_L OPTION OPTION_RT _RTN1 NT/PAL OPTION
EE MODE 3 .1 .1 V 2 .5 .5 8V 8V 2.52V 0V 0V 5.2V 5.2V 4 .9 5V 5V 4 .9 5V 5V 0 .6 .6 V 3.04V 5 .2 4 4V V 0 .0 .0 1V 1V 5 .2 .2 V 5.18V 5.18V 5 .2 .2 V 5.17V 5.17V 0 .0 .0 9V 9V 5 .1 9V 9V 5.17V 5.17V 0 .6 V 0 .0 .0 2V 2V 0 .0 9 9V V 5 .0 3V 3V 0 .0 .0 2V 2V 0 .0 2V 2V 0 .0 .0 2V 2V 0 .0 .0 2V 2V 4.88V 4.88V 0.02V 0 .0 .0 2V 2V 4 .9 .9 1V 1V 5.19V 0.02V 0.75V 0.75V 0V 5 .1 4V 4V 5 .2 4 4V V 0V 5 .2 .2 4V 4V 5 .2 .2 4V 4V 3.1V 0V 0 .0 9V 9V 5.03V 0V 4.42V 5 .2 .2 V 5.03V 5.03V 0V 0.43V 0.43V 5 .1 .1 9V 9V 5.14V 5.14V 0.52V 0V
PB MODE 3 .2 2V 2V 2 .6 .6 1V 1V 2. 2.52V 0V 0V 5. 5 .2V 5 .2V 4 .9 .9 4V 4V 4 .9 4V 4V 0 .6 .6 1V 1V 2. 2.98V 5 .2 .2 4 4V V 0 .0 .0 1V 1V 5 .2 V 5.17V 5.17V 5 .1 .1 9V 9V 5.17V 5.17V 0 .1 .1 V 5 . 19 19 V 5.12V 5.12V 0. 0.4 6 6V V 0 .0 .0 2V 2V 0 .0 .0 9 9V V 5 .0 3V 3V 0 .0 .0 2V 2V 0 .0 2V 2V 0 .0 .0 2V 2V 0 .0 .0 2V 2V 4.88V 4.88V 0.02V 0 .0 .0 2V 2V 4 .9 .9 7V 7V 5. 5.19V 0. 0.02V 0.75V 0.75V 0V 5 . 14 14 V 5. 5.2 4 4V V 0V 5 .2 .2 4V 4V 5 .2 .2 4V 4V 3.1V 0 .0 1 1V V 0 .0 9V 9V 5.03V 0. 0.01V 4.42V 5 .1 .1 9V 9V 5.03V 5.03V 0.01V 0.43V 0.43V 5 .1 .1 9V 9V 5.14V 5.14V 0.42V 0.42V 0V
REC M ODE 3 .1 8V 8V 2 .6 .6 1V 1V 2. 2.52V 0V 0V 5 .2V 5.2V 4 .9 .9 5V 5V 4 .9 5V 5V 0 .6 .6 2V 2V 3V 5. 23 23 V 0 .0 .0 1V 1V 5 .1 9V 9V 5.17V 5.17V 5 .1 .1 9V 9V 5.17V 5.17V 0 .0 .0 9V 9V 5 .1 .1 9V 9V 5.12V 5.12V 0. 0. 51 51 V 0 .0 .0 2V 2V 0. 09 09 V 5 .0 3V 3V 0 .0 .0 2V 2V 0 .0 2V 2V 0 .0 .0 2V 2V 0 .0 .0 2V 2V 4.88V 4.88V 0.02V 0 .0 .0 2V 2V 4 .9 .9 7V 7V 5. 5.19V 0. 0.02V 0.74V 0.74V 0V 5 .1 .1 3V 3V 5 .2 4 4V V 0V 5 .2 .2 3V 3V 5 .2 .2 3V 3V 3.1V 0 .0 .0 1 1V V 0 .0 9V 9V 5.03V 0V 0V 4.42V 5 .1 .1 9V 9V 5.03V 5.03V 0V 0.43V 0.43V 5 .1 .1 9V 9V 5.14V 5.14V 0.55V 0.55V 0V
IC702 S-24CS16A011_6Kbit 1 2
E0 E1
3 4 5 6 7
E2 GND I 2C 2C _D _D ATA I2 C_ C_ CL K WC
0V 0V
0V 0V 0V 0V
0V 0V 0V 0V
0V 0V 4 .9 5V 5V 4 .9 4 4V V 0V
0V 0V 0V 4 . 95 95 V 4 .9 .9 4 4V V 0V 0V
0V 0V 0V 4 .9 .9 5V 5V 4 .9 .9 4 4V V 0V
PIN NO. 8
PIN NAME V CC CC
EE MOD E 5.24V
PB REC MOD E MODE 5.24V
5.24V
IC703 74HCT125 1 2
0V 3 .0 .0 5V 5V
0V 3 .0 .0 5V 5V
0V 3 .0 .0 4V 4V
5.03V 5.03V 0V 0.02V 0.02V
5.03V 5.03V 0V 0.02V 0.02V
5.02V 5.02V 0V 0.02V 0.02V
6 7 8
GND H OS OS T_ T_ CL CL K_ K_ IN IN BUFFER_DATA_IN GND HOST_DATA_IN BUFFER_CLK_IN GND C EC EC_ RX
0.01V 0.01V 0V 5 .2 4 4V V
0.01V 0.01V 0V 5 .2 .24 V
0.01V 0.01V 0V 5. 5.2 4 4V V
9 10 11 12 13 14
C EC EC_ TX GND BUFFER_ENA_L H OS OS T_ T_ EN EN A_ A_ L GND V CC CC ( 5 5.. 3V 3V A) A)
3 .0 4 4V V 0V 5.24V 5.24V 3 .1 .1 8V 8V 0V 5 .2 .2 4V 4V
2 .99 V 0V 5.24V 5.24V 3 .1 .1 8V 8V 0V 5 .2 .2 4V 4V
3. 3.0 4 4V V 0V 5.24V 5.24V 3 .1 .1 8V 8V 0V 5 .2 .2 4V 4V
1 2
E U1 U1 _V _V _I _I N E U1 U1 _A _A _I _I N_ N_ R
1 .0 .0 7V 7V 7 .0 .0 5V 5V
1 .0 .0 7V 7V 7 .0 .0 5V 5V
1 .0 7V 7V 0 .0 .0 1V 1V
3 4 5 6 7 8 9 10
E U1 U1 _A _A _I _I N_ N_ L E U2 U2 _V _V _I _I N E U2 U2 _A _A _I _I N_ N_ R E U2 U2 _A _A _I _I N_ N_ L T U_ V_ V_ O OU UT T U_ U_ A_ A_ R_ R_ O OU UT T U_ U_ A_ A_ L_ L_ O OU UT V in in EX EX T ( NC NC )
7 .0 .0 5V 5V 1 .0 .0 7V 7V 7 .0 .0 6V 6V 7 .0 .0 6V 6V 1 .6 V 7 .0 .0 8V 8V 7 .0 .0 8V 8V 1 .0 .0 7V 7V
7 .0 .0 5V 5V 1 .0 .0 7V 7V 7 .0 .0 6V 6V 7 .0 .0 6V 6V 1 .69 V 7 .0 .0 8V 8V 7 .0 .0 8V 8V 1 .0 .0 7V 7V
0 .0 .0 1V 1V 1 .0 7V 7V 7 .0 .0 6V 6V 7 .0 .0 6V 6V 1. 6V 6V 7 .0 .0 8V 8V 7 .0 .0 8V 8V 1 .0 .0 7V 7V
11 12 13
A _O _O UT UT _R _R A _O _O UT UT _L _L C_ C_ O OU UT
7 .0 .0 6V 6V 7 .0 .0 6V 6V 2 .4 5 5V V
7 . 06 06 V 7 .0 .0 6V 6V 2. 2. 45 V
7 . 06 06 V 7 .0 6V 6V 2. 2.4 5 5V V
14 15 16
VCC2 VCC2 (12 V) C V BS BS _O _O UT UT GND2
12.15V 1 5V 12.15V 12.15V 1 .5 .5 1V 1V 1 .5 V 0V 0V
3 4 5
IC801 MM1763
12.15V 1 5V 1 .5 1V 1V 0V
17 18 19
Y_ Y_ O OU UT BI BIAS G_ G_ O OU UT
1 .0 6 6V V 2.46V 1 .0 7 7V V
1. 1. 06 V 2.46V 1. 1. 07 V
1. 1.0 6 6V V 2. 2.46V 1. 1.0 7 7V V
20 21 22
Fs Fsout B_ B_ O OU UT R_ R_ O OU UT
9.89V 2 .4 5 5V V 2 .4 5 5V V
9. 9.89V 2. 2. 45 V 2. 2. 45 V
9. 9.89V 2. 2.4 5 5V V 2. 2.4 5 5V V
23 24 25 26 27 28 29 30 31 32 33 34 35 36
GND1 R _P _P r_ r_ OU OU T B _P _P b_ b_ OU OU T G _ Y_ Y_ OU OU T Y _S _S EP EP A_ A_ O OU UT VO VOUT (NC) C _S _S EP EP A_ A_ O OU UT V CC CC 1 ( 5V 5V ) I 2C 2C _C _C LK LK I 2C 2C _D _D ATA GND3 EU2_A_ EU2_A_OUT OUT_L _L EU2_A_ EU2_A_OUT OUT_R _R E U2 U2 _V _V _O _O UT UT
0V 2 .5 .5 2V 2V 2 .5 .5 2V 2V 1 .1 .11 V 1 .0 .0 9V 9V 2V 2 .5 .5 2V 2V 5 .1 .1 6V 6V 4 .9 .9 3V 3V 4 .9 .9 3V 3V 0V 6.48V 6.48V 6.48V 6.48V 2 .0 .0 2V 2V
0V 2 .5 2V 2V 2 .5 2V 2V 1 .1 .11 V 1 .0 .0 9V 9V 2V 2 .5 .5 2V 2V 5 .1 .1 6V 6V 4 .9 .9 3V 3V 4 .9 .9 3V 3V 0V 6.48V 6.48V 6.48V 6.48V 2 .0 .0 2V 2V
0V 2 .5 2V 2V 2 .5 2V 2V 1 .11 V 1 .0 .0 9V 9V 2V 2 .5 .5 2V 2V 5 .1 6V 6V 4 . 93 93 V 4 .9 3V 3V 0V 6.48V 6.48V 6.48V 6.48V 2 .0 .0 2V 2V
37 38 39
EU1_A_ EU1_A_OUT OUT_L _L EU1_A_ EU1_A_OUT OUT_R _R E U1 U1 _V _V _O _O UT UT
6.48V 6.48V 6.48V 6.48V 2 .0 .0 2V 2V
6.48V 6.48V 6.48V 6.48V 2 .0 .0 2V 2V
6.48V 6.48V 6.48V 6.48V 2 .0 .0 2V 2V
40 41 42
S W_ W_ A_ A_ O OU U T_ T_ R S W_ W_ A_ A_ O OU U T_ T_ L S W_ W_ V_ V_ OU OU T
6 .4 .4 8V 8V 6 .4 .4 8V 8V 1 .6 V
6 .4 .4 8V 8V 6 .4 .4 8V 8V 1 .6 V
6 .4 .4 7V 7V 6 .4 .4 7V 7V 1 .6 1V 1V
1 2
A_OUT_L DAC_A_L
IC802 NJM4580 6.1V 6.1V
6.1V 6.1V
6.09V 6.09V
PIN NO. 3 4 5 6 7 8
PIN NAME V CC CC 1 GND VC VCC2 DAC_A_R A_OUT_R V CC CC ( 12 12 V) V)
EE MODE 6 .1 .1 V 0V 6.1V 6.1V 6.1V 1 2. 2. 2V 2V
PB REC M ODE M ODE 6 .1 V 6 .0 9V 9V 0V 0V 6 .1V 6. 6.09V 6.1V 6.09V 6.1V 6.09V 1 2. 2. 2V 2V 1 2. 2. 19 19 V
IC803 PCM1780 AUDIO DAC 1 2
Z_MUTE_L E 5_ 5_ SP SPI _C _CS
4.95 3 .2 6
4.95 3. 26 26
3 4
E 5_ 5_ SP SPI _C _CL K E 5_ 5_ SP SP I_ MO MO SI SI
3 .1 3 0 .0 2
3. 12 12 0 .0 2
4 . 95 3 .1 8 3 .0 7 0 .0 .0 2
5 6
A OU OUT_ MC MCL K A OU OUT_ DA DATA
1 .6 5 1 .6 3
1. 66 66 1. 60 60
1 .6 2 1. 60 60
7 8
A OU OUT_ SC SC LK LK A OU OU T_ FS FS YN YN C
1 .6 4 1 .6 3
1. 63 63 1 .6 3
1 .6 1 1 .6 0
9 10 11
NC NC V CC CC
0.00 0.00 4 .9 5
0 0..00 0. 0 .0 0 4 .9 5
0 0..00 0 . 00 4 .9 5
12
GND
0.00
0 . 00
0 .0 .00
13
VCOM
2.47
2.49
2. 49
14 15 16
AO AOUT_R AO AOUT_L Z_ Z_ MU MUTE _R _R
2.42 2.42 4 .9 5
2.42 2.42 4. 95 95
2 . 42 2 . 42 4 .9 5
1 2
F SW SW ( NC NC ) AV C ( NC NC)
0 .4 7V 7V 0 .4 7 7V V
3
VDDA(SADC) (1.8V) V SS SS A ( PL PL L) L) V DD DD A ( PL PL L) L) VSSA (AVI1)
1.78V 1.78V
1.78V 1.78V
1.78V 1.78V
0 .0 2V 2V 3 .1 8V 8V 0V
0 .0 2V 2V 3 .1 8V 8V 0V
0 .0 2V 2V 3 .1 8V 8V 0V
V DD DD A ( A AV V I1 I1 ) EU2_V_IN (AI11) A I12
3 .1 .1 7V 7V
3 .1 .1 7V 7V
3 .1 .1 7V 7V
0.58V 0.58V 0.58V
0.58V 0.58V 0.58V
0.58V 0.58V 0.58V
10 11
AI AI13 AI10
0.58V 1V
0. 0.58V 1V
0. 0.58V 1V
IC901 SAA7138
4 5 6 7 8 9
0 .4 8V 8V 0 .6 2 2V V
0 .6 2V 2V 0. 62 62 V
12 13
VS VSSA(AVI2) V DD DD A ( A AV V I2 I2 )
0V 3 .1 .1 7V 7V
0V 3 .1 .1 7V 7V
0V 3 .1 .1 6V 6V
14 15 16 17
0.56V R_SCART_IN (AI21) 0.56V AI AI22 F_CVBS_IN(AI23) AI20
0.56V 0.56V 0.56V 1V
0.56V 0.56V 0. 0.56V 0.56V 0.56V 1V
0.56V 0.56V 0. 0.56V 0.56V 0.56V 1V
18 19 20 21
V DD DD A ( 1 1.. 8V 8V ) RE RES_REF_V A OU OU T1 T1 ( NC NC ) V DD DD A ( A AO O UT UT )
1 .7 .7 3V 3V 0V 1 .9 .9 1V 1V 3 .1 .1 7V 7V
1 .7 .7 8V 8V 0V 1 .9 .9 1V 1V 3 .1 .1 7V 7V
1 .7 .7 8V 8V 0V 1 .9 .9 1V 1V 3 .1 .1 6V 6V
22 23 24
A OU OUT2 (NC) VS SA V SS SSA (OUT)
0V 0V 0V
0V 0V 0V
0V 0V 0V
25
V SS SSA (AVI3)
26
V DD DD A ( A AV V I3 I3 ) G_SCAR_IN (AI31) AI AI32
27 28 29
0V
0V
0V
3 .1 .1 7V 7V
3 .1 .1 7V 7V
3 .1 .1 6V 6V
0.58V 0.58V 0.58V 0.96V 0.96V
0.58V 0.58V 0. 0.58V 0.96V 0.96V
0.58V 0.58V 0. 0.58V 0.96V 0.96V
30 31 32
SW_V_OUT(AI33) AI30 V SS SSA (AVI4) V DD DD A ( A AV V I4 I4 )
1V 0V 3 .1 .1 8V 8V
1V 0V 3 .1 .1 7V 7V
1V 0V 3 .1 .1 6V 6V
33 34 35 36
SS SSIF 1.01V SSIFD 1V 0.58V B_SCART_IN (AI41) 0.58V AI AI42 0.58V
1.01V 1V 0.58V 0.58V 0. 0.58V
1. 1.01V 1V 0.58V 0.58V 0. 0.58V
37
AI AI43
0.58V
0. 0.58V
0. 0.58V
38
AI40
1V
1V
1V
PIN NO. 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 10 00 0 101
EE MOD E 0V 1 .5 .5 6V 6V 3 .2 V 1.1V TDI 3.2V SC SCL 2.44V SD SDA 0.18V S CL CL _S _S IL IL EN EN T 0 .4 .4 2V 2V S DA DA _S _S IL IL EN EN T 0 .4 .4 2V 2V V DD DD D ( CO CO RE RE ) 1 .7 .7 7V 7V VSSD (CORE) 0V I NT NT_A 0.04V 3.21V /RST_SAA7138 (CE) 3.21V V SS SSA (OSC) 0V X TA TAL1 0.86V XT XTAL0 0.8V V DD DD A ( OS OS C) C) 1 .8 V VI VI N_ D2 0 .0 2 2V V VI VI N_ D3 0 .0 2 2V V VI VI N_ D4 0 .0 2 2V V V DD DD D ( IO ) 3 .2 .2 8V 8V VS VSSD (IO) 0V VI VI N_ D5 0 .0 2 2V V VI VI N_ D6 0 .0 2 2V V VI VI N_ D7 0 .0 2 2V V VI VI N_ D8 0 .0 2 2V V VIND9 VIND9 (ITU12) U12) 0.02V 0.02V ITU11 ITU11 (TP902 (TP902)) 3.28V 3.28V V DD DD D ( IO ) 3 .2 .2 4V 4V VS VSSD (IO) 0V V DD DD D ( CO CO RE RE ) 1 .7 .7 7V 7V VSSD (CORE) 0V ITU10 ITU10 (TP901 (TP901)) 2.68V 2.68V V _C _CLK 1.33V I TU TU 9 ( NC NC ) 1 .2 .2 4V 4V I TU TU 8 ( NC) 1 .3 V I TU TU 7 ( NC) 1 .3 V I TU TU 6 ( NC NC ) 1 .3 .3 2V 2V V DD DD ( IO IO ) 3 .2 .2 2V 2V VSSD(IO) 0V I TU TU 5 ( NC NC ) 1 .2 .2 6V 6V I TU TU 4 ( NC NC ) 1 .1 .1 2V 2V I TU TU 3 ( NC NC ) 1 .1 .1 5V 5V I TU TU 2 ( NC NC ) 0 .5 .5 2V 2V I TU TU 1 ( NC NC ) 0 .6 .6 7V 7V I TU TU 0 ( NC NC ) 1 .7 .7 2V 2V V DD DD D( IO IO ) 3 .2 V VS VSSD (IO) 0V GP PII O O0 0 ( NC NC ) 3 .2 .2 1V 1V GP PII O O1 1 ( NC NC ) 3 .2 .2 1V 1V GP PII O O2 2 ( NC NC ) 3 .2 .2 1V 1V V DD DD D ( CO CO RE RE ) 1 .7 .7 7V 7V VSSD (CORE) 0V G PI PI O3 O3 ( NC NC ) 3 .2 .2 1V 1V G PI PI O4 O4 ( NC NC ) 3 .2 .2 1V 1V G PI PI O5 O5 ( NC NC ) 3 .2 .2 1V 1V AIN_MC AIN_MCLKO LKOUT UT 1.61V 1.61V V DD DDD ( IO ) 3 .2 V VS VSSD (IO) 0V A IN IN _F _F SY SY NC NC 1 .5 .5 2V 2V A IN IN _S _S CL CL K 1 .3 .3 8V 8V AI AI N_ D0 0 .5 2 2V V A_MUT A_MUTE E (NC) (NC) 0.01V 0.01V PIN NAME
TRST_PDR_N(GND) T CX CX ( NC NC ) T MS MS ( NC NC) TDO
PB MOD E 0V 1 .5 6V 6V 3. 2V 2V 1. 1 .1V 3. 3 .2V 2.47V 0.18V 0 .4 .4 2V 2V 0 .4 .4 2V 2V 1 .7 .7 7V 7V 0V 0. 0.04V 3.21V 3.21V 0V 0. 0.86V 0.8V 1 .8 V 0 .0 2 2V V 0 .0 2 2V V 0 .0 2 2V V 3 .2 8V 8V 0V 0 .0 2 2V V 0 .0 2 2V V 0 .0 2 2V V 0 .0 2 2V V 0.02V 0.02V 3.28V 3.28V 3 .2 2V 2V 0V 1 .7 .7 7V 7V 0V 2.67V 2.67V 1 .33V 1 .2 4V 4V 1. 3V 3V 1. 3V 3V 1 .3 2V 2V 3 .2 1V 1V 0V 1 .2 6V 6V 1 .1 2V 2V 1 .1 5V 5V 0 .5 2V 2V 0 .6 7V 7V 1 .7 2V 2V 3 . 21 21 V 0V 3 .2 .2 1V 1V 3 .2 .2 1V 1V 3 .2 .2 1V 1V 1 .7 .7 7V 7V 0V 3 .2 V 3 .2 V 3 .2 V 1.62V 1.62V 3 .2 1 1V V 0V 1 .5 .5 2V 2V 1 .3 8V 8V 0 .5 .5 2 2V V 0.01V 0.01V
REC MODE 0V 1 .5 6V 6V 3 .1 9 9V V 1 .1V 3 .2V 2. 2.47V 0. 0.18V 0 .4 .4 2V 2V 0 .4 .4 2V 2V 1 .7 .7 7V 7V 0V 0 .04V 3.17V 3.17V 0V 0 .8 .86V 0.8V 1 .8 1V 1V 0 .0 .0 2 2V V 0 .0 .0 2 2V V 0 .0 .0 2 2V V 3 .2 8V 8V 0V 0 .0 .0 2 2V V 0 .0 .0 2 2V V 0 .0 .0 2 2V V 0 .0 .0 2 2V V 0.02V 0.02V 3.28V 3.28V 3 .2 2V 2V 0V 1 .7 .7 7V 7V 0V 2.67V 2.67V 1 .3 .33V 1 .2 4V 4V 1 .3 V 1 .3 V 1 .3 2V 2V 3 .2 2V 2V 0V 1 .2 6V 6V 1 .1 2V 2V 1 .1 5V 5V 0 .5 2V 2V 0 .6 7V 7V 1 .7 2V 2V 3 .2 1V 1V 0V 3 .2 .2 1V 1V 3 .2 .2 1V 1V 3 .2 .2 1V 1V 1 .8 .8 V 0V 3 .2 .2 V 3 .2 .2 V 3 .2 .2 V 1.62V 1.62V 3 .2 V 0V 1 .5 .5 2V 2V 1 .3 8V 8V 0 .5 2 2V V 0.01V 0.01V
PIN NO. 102 1 03 03 1 04 04 1 05 05 106 107 1 08 08 109 110 111 112 1 13 13 1 14 14 1 15 15 116 117 1 18 18 119 119 120 121 1 22 22 1 23 23 1 24 24 1 25 25 126 127 128
EE MODE 3 .2 .2 V I 2S 2S _I _I _W _W S 1 .3 2V 2V I 2S 2S _I _I _C _C LK LK 1 .3 .3 2V 2V I 2S 2S _I _I _S _S D 1 .3 2V 2V TU_A_L_OUT _L_OUT 1.59V 1.59V TU_A_R_ TU_A_R_OUT OUT 1.59V 1.59V V DD DD A ( DA DA C) C) 3 .2 .2 1V 1V OUT1_RIGHT(NC) GHT(NC) 1 .5 .5 9V 9V .5 9V 9V OUT1_LEFT (NC) 1 .5 V REF0 (GND) 0V VS VSSA (DAC) 0V V R E F_ DA DA C 1 .5 .5 8V 8V V RP RP OS OS _A _A DC DC 3 .0 .0 4V 4V V RN RN EG EG _ _A A DC DC 0 .0 .0 1V 1V 3.21V VDDA(SADC)(3.3V) 3.21V VS VSSA (SADC) 0V V DD DD D ( CO CO RE RE ) 1 .7 .7 7V 7V VSSD VSSD (CORE) (CORE) 0.01V 0.01V SW_A_OUT SW_A_OUT_R 1.58V 1.58V SW_A_OUT SW_A_OUT_L 1.58V 1.58V F _ A_ A_ R_ R_ IN IN 1 .5 8V 8V F _A _A _L _L _I _I N 1 .5 8V 8V V R EF EF _A _A DC DC 1 .5 .5 8V 8V S EC EC AM AM _A _A M 1 .5 .5 8V 8V IN3_LE IN3_LEFT FT (NC) (NC) 1.58V 1.58V 1.58V IN4_RIGHT (NC) 1.58V IN4_LE IN4_LEFT FT (NC) (NC) 1.58V 1.58V PIN NAME
I2S_O_SD1 (NC)
PB M ODE 3 .2 V 1 .3 2V 2V 1 .3 .3 2V 2V 1 .3 2V 2V 1.59V 1.59V 1.59V 1.59V 3 .2 .2 2V 2V 1 .6 .6 V 1 .6 .6 V 0V 0V 1 .5 .5 9V 9V 3 .0 .0 4V 4V 0 .0 .0 1V 1V 3.22V 3.22V 0V 1 .8 .8 V 0.01V 0.01V 1.58V 1.58V 1.58V 1.58V 1 .5 8V 8V 1 .5 8V 8V 1 .5 .5 8V 8V 1 .5 .5 8V 8V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V
REC M ODE 3 .2 V 1 .3 .3 2V 2V 1 .3 .3 2V 2V 1 .3 2V 2V 1.59V 1.59V 1.59V 1.59V 3 .2 .2 V 1 .5 .5 9V 9V 1 .5 .5 9V 9V 0V 0V 1 .5 .5 8V 8V 3 .0 .0 4V 4V 0 .0 .0 1V 1V 3.28V 3.28V 0V 1 .8 .8 V 0.01V 0.01V 1.58V 1.58V 1.58V 1.58V 1 .5 .5 8V 8V 1 .5 .5 8V 8V 1 .5 .5 8V 8V 1 .5 .5 8V 8V 1.58V 1.58V 1.58V 1.58V 1.58V 1.58V
INFORMATION : 1. Voltage Check using RH300 DV1 2. EE Mode : Check with Signal C2 3. Playback Mode : Check with DVD TEST DISC KDV-N Chapter 2 4. Record Mode : Check with recording signal C2 using DVD -RW Brand : Mitsubishi, VR Mode
4. DMN8673 PIN NO.
PIN NAME
EE M ODE
PB M ODE
REC M OD E
IC1101 LSI DMN8673 IC101 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 10 A11 A 12 12 A 13 13 A 14 A 15 15 A 16 16 A 17 17 A 18 18 A 19 19 A 20 20 A 21 21 A 22 A 23 A 24 24 A 25 25 A 26 26 B1 B2 B3 B4 B5 B6 B7 B8 B9 B 10 B11 B 12 12 B 13 13 B 14 14 B 15 15 B 16 16 B 17 17 B 18 18 B 19 19 B 20 B21 B22 B23 B 24 24 B 25 B 26 C1 C2 C3 C4 C5 C6 C7 C8 C9
VI VI_E[1] V I_ I_ VS VS YN YN C[ 0] 0] VI VI_D[3] V I_ CL K[ K[ 1 1]] V I_ CL K[ K[ 0 0]] VO VO_CLK VI VIO_D[6] VO_E VO VO_D[0] VO_D[4] VO_D[8] V O_ O_D [11 ] V O_ O_D [1 4 4]] AIN_MCLKI AI AI N_ MC MC LK LK O A O UT _I _I EC EC 95 95 8 A O UT _M _M CL CL KI KI A O UT UT _M _M CL CL KO KO A 2O 2O UT UT _D _D [0 ] UA UA RT2 _ _T TX S PI PI _ _C C S1 S1 SPI_CS3 SPI_CS2 UA UA RT1 _ _T TX UA UA RT1 _ _R RX UA UA RT RT 1_ 1_ CT CT S VI VI_E[0] VI VI_D[0] VI VI_D[4] VI VI_D[7] VI VIO_D[0] VI VIO_D[3] VI VIO_D[7] V O_ O_V SY SY NC NC VO VO_D[1] VO_D[5] VO_D[9] V O_ O_D [1 2 2]] V O_ O_D [1 5 5]] AI AI N_ FS FS YN YN C A2 A2 _F SY SY NC A OU OU T_ SC SC LK LK A IN_ D[ D[1 ] AO AO UT_ D[ D[2 ] UA UA RT RT 2_ 2_ CT CT S SDA SPI_CS0 --> SIO_SPI_CS0# SPI_MISO --> SIO_SPI_MISO SPI_CLK --> SIO_SPI_CLK UA UA RT RT 1_ 1_ RT RT S IRTX2 IRRX V I_ I_ VS VS YN YN C[ C[ 1] 1] VI VI_D[1] VI VI_D[5] VI VI_D[8] VI VIO_D[1] VI VIO_D[4] VI VIO_D[8] V O_ O_H SY SY NC VO VO_D[2]
1.17 0 .0 0 1.37 0 .0 0 1 .6 1 1.60 1.58 3.20 1.25 1.58 1.25 1 .0 8 1 .1 0 NC 3 .2 2 1 ..6 63 1 .6 3 1 ..6 63 0 .0 0 3 .2 4 0 ..0 00 0.00 0.00 3 .2 3 2 .3 1 3 .2 1 3.21 0.27 1.39 1.22 0.00 1.16 1.01 3 .2 0 1.18 1.02 1.19 1 .2 2 2 .1 7 1 .6 0 1 .6 1 1 .6 2 0 .0 0 0 .0 0 4 .9 1 3.12
1. 1 9 0 .0 .0 0 1. 3 6 0 .0 0 1 .6 4 1 . 62 1. 61 3. 23 0. 67 1. 62 0. 67 0 .9 4 1 .0 8 NC 3 .2 .2 3 1 .6 .6 4 1 .6 .6 4 1 .6 .6 4 0 .0 .0 0 3 .2 4 0 ..0 00 0. 0 0 0. 0 0 3 .2 4 2 .3 2 3 .2 .2 1 3. 2 2 0. 2 7 1. 3 9 1. 2 2 0. 00 1. 21 1. 07 3 .2 0 1. 22 1. 07 1. 22 1 .2 5 2 .1 4 1 .6 .6 1 1 .6 2 1 .6 .6 2 0 .0 0 0 .0 0 4 .9 .9 1 3. 1 4
1. 17 0 .0 .0 0 1 . 36 0 .0 0 1 .6 4 1. 6 2 1. 5 9 3 . 21 1. 25 1 . 60 1 . 25 1 .0 6 1 .1 0 NC 3 .2 .2 0 1 .6 .6 2 1 .9 .9 8 1 .6 .6 3 0 .0 .0 0 3 .2 3 0 . 00 00 0. 0 0 0. 0 0 3 .2 2 2 .3 0 3 .2 .2 1 3. 21 0 . 27 1 . 39 1 . 21 0. 0 0 1. 1 8 1. 0 1 3 .1 9 1. 18 1 . 02 1 . 18 1 .2 4 2 .1 7 1 .5 .5 9 1 .6 0 1 .6 .6 1 0 .0 0 0 .0 0 4 .9 .9 1 3 . 14
2 .7 5
2 .8 0
2 .8 4
4 .8 0
4 .9 0
4 .8 2
3 .0 8
3 .11
3 .1 0
3 .2 1 3.20 3.21 2 .2 4 2.67 1.32 1.28 0.00 1.19 1.10 2 .8 6 1.18
3 .2 .2 1 3. 23 3 . 23 2 .2 .2 5 2. 67 1. 32 1. 28 0 . 00 0 . 38 1 . 08 2 .8 6 0. 38
3 .2 .2 1 3 . 21 3. 2 1 2 .2 .2 5 2 . 66 1 . 32 1 . 27 0. 00 1. 17 1. 10 2 .8 5 1 . 18
PIN NO. C10 C11 C1 2 C1 3 C 14 14 C 15 15 C1 6 C 17 17 C 18 18 C 19 19 C20 C 21 21 C 22 22 C 23 23 C24 C 25 25 C 26 26 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D 11 D 12 12 D 13 13 D1 4 D1 5 D1 6 D 17 17 D1 8 D1 9 D20 D 21 21 D 22 22 D 23 23 D 24 24 D 25 25 D 26 26 E1 E2 E3 E4 E23 E 24 24 E 25 25 E 26 26 F1 F2 F3 F4 F 23 23 F 24 24 F 25 25 F 26 26 G1 G2 G3 G4 G 23 23 G 24 24 G 25 25
PIN NAME VO_D[6] V O_ O_ D[ 10 10 ] V O_ O_ D[ 13 13 ] A IN_ SC SCL K A 2I 2I N_ N_ D_ D_ G GP P IO IO A OU OU T_ T_ F FS S YN YN C A IN_ D[ 0] 0] A OU OU T_ T_ D[ D[ 3] 3] A OU OU T_ T_ D[ D[ 0] 0] UA UA RT 2_ 2_ RT RT S SCL V DD DD _C _C OR OR E VD VD D_ D_ CO CO RE RE V DD DD _D _D RA RA M IRTX1 S DR DR AM AM _A _A [2 ] S DR DR AM AM _A _A [3 ] TCK VI VI_D[2] VI VI_D[6] VI VI_D[9] VI VIO_D[2] VI VIO_D[5] VI VIO_D[9] V O_ O_ AC ACT IV E VO_D[3] VO_D[7] VD VD D_ D_ CO CO RE RE VD VD D_ D_ CO CO RE RE V DD DD _P _P AD AD 1 V DD _P _PA D2 V DD _P _PA D3 V DD _P _PA D4 A OU OU T_ T_ D[ D[ 1] 1] A 2_ 2_ SC SCL K U ART 2_ 2_ RX SPI_MOSI --> SIO_SPI_MOSI VD VD D_ D_ CO CO RE RE S DR DR AM AM _V _V RE RE F VD VD D_ D_ DR DR AM AM S DR DR AM AM _A _A [1 [1 0] 0] S DR DR AM AM _A _A [0 ] S DR DR AM AM _A _A [1 ] TDO TDI TMS TR TRSTn GND S D RA M_ M_ RA RA Sn Sn S D RA M_ M_ BA BA [0 [0 ] S D RA M_ M_ BA BA [1 [1 ] AGND_AUDINPLL AGND_AUDOUTPLL A GN GN D_ D_ SY SY SP SP LL LL BI BIAS_5V S DR DR AM AM _A _A [4 ] S DR DR AM AM _A _A [1 [1 3] 3] S DR DR AM AM _W _W En En S D RA M_ M_ CA CA Sn Sn CLKI A GN GN D_ D_ VI VI DP LL LL AVDD_AUDINPLL A V DD DD _S _S YS YS PL PL L S DR DR AM AM _A _A [8 ] S DR DR AM AM _A _A [7 ] S DR DR AM AM _A _A [6 ]
EE MOD E 1.10 1 .1 9 1 .0 2 1 .6 2 0 .0 .0 0 1 .6 .6 2 1 .2 1 0 .0 0 1 .6 2 0 .0 0 3.15 1 .0 .0 8 1 .0 8 2 .3 .3 5 3.21 1 .1 4 1 .1 7 2.25 1.55 1.50 1.62 1.25 1.18 1.80 2 .4 9 1.08 1.81 1 .0 8 1 .0 8 3 .2 .2 2 3 .2 2 3 .2 2 3 .2 2 0 .0 0 1 .6 1 4 .9 1
PB REC MOD E MODE 1.08 1.10 0 .3 8 1 .1 7 1 .0 7 1 .0 1 1 .6 3 1 .6 1 0 .0 .0 0 0 .0 .0 0 1 .6 .6 3 1 .6 .6 1 1 .2 1 1 .2 0 0 .0 0 0 .0 0 1 .6 4 1 .6 1 0 .0 0 0 .0 0 3.18 3.16 1 .0 .0 5 1 .0 .0 5 1 .0 5 1 .0 5 2 .2 .2 9 2 .3 .3 0 3.23 3.21 1 .1 0 1 .1 0 1 .1 6 1 .1 5 2 .25 2 .25 1.55 1.55 1.50 1.49 1.62 1.61 0.66 1.25 0.94 1.06 1.77 1.80 2 .4 9 2 .4 8 0.94 1.07 1.78 1.81 1 .0 5 1 .0 5 1 .0 5 1 .0 5 3 .2 .2 4 3 .2 .2 2 3 .2 4 3 .2 2 3 .2 4 3 .2 2 3 .2 4 3 .2 2 0 .0 0 0 .0 0 1 .6 1 1 .6 0 4 .9 1 4 .9 1
3 .0 5
3 .0 5
3 .0 4
1 .0 8 1 .1 .1 9 2 .3 5 1 .1 .1 2 1 .1 4 1 .1 4 0.89 2.23 2.25 0.00 0.00 2 .0 .0 1 1 .2 .2 1 1 .1 .1 8 0 .0 0 0 .0 0 0.0 00 0 1.05 1 .1 9 1 .1 .1 8 2 .0 3 2 .0 .0 8 1.48 0 .0 0 1 .0 5 2 .3 .3 5 1 .1 7 1 .1 8 1 .1 7
1 .0 5 1 .1 .1 7 2 .2 9 1 .0 .0 8 1 .0 9 1 .0 9 0 .40 2 .24 2 .26 0.00 0.00 1 .9 .9 7 1 .1 .1 8 1 .1 .1 8 0 .0 0 0 .0 0 0 .0 .0 0 1.05 1 .1 6 1 .0 .0 6 1 .9 8 1 .9 .9 3 1.49 0 .0 0 1 .0 5 2 .2 .2 6 1 .1 6 1 .1 6 1 .1 6
1 .0 5 1 .1 .1 7 2 .3 0 1 .0 .0 4 1 .0 3 1 .0 8 0 .85 2 .24 2 .25 0.00 0.00 1 .9 .9 7 1 .1 .1 8 1 .1 .1 6 0 .0 0 0 .0 0 0 .0 .0 0 1.06 1 .1 5 1 .0 .0 2 1 .9 8 1 .8 .8 5 1.49 0 .0 0 1 .0 6 2 .3 .3 0 1 .1 5 1 .1 5 1 .1 5
PIN NO. G 26 26 H1 H2 H3 H4 H 23 23 H 24 24 H 25 25 H 26 26 J1 J2 J3 J4 J23 J24 J25 J26 K1 K2 K3 K4 K23 K24 K25 K26 L1 L2 L3 L4 L11 L12 L13 L14 L15 L16 L 23 L 24 L25 L26 M1 M2 M3 M4 M11 M12 M13 M14 M15 M16 M 23 23 M 24 24 M25 M26 N1 N2 N3 N4 N11 N 12 N 13 N 14 N 15 N 16 N23 N 24 24 N 25 25 N 26 26
PIN NAME S DR DR AM AM _A _A [5 ] CLKX A GN GN D_ DC DC XO XO A VD VD D3 D3 3_ 3_ DC DC XO XO AVDD_AUDOUTPLL S DR DR AM AM _C _C KE KE S DR DR AM AM _A _A [1 [1 2] 2] S DR DR AM AM _A _A [1 [1 1] 1] S DR DR AM AM _A _A [9 ] D AC AC_ Dv Dvs s DA C_ O OU U TB DA C_ O OU U TB AVDD33_VIDPLL SDRAM_DQ[28] SDRAM_DQ[29] SDRAM_DQ[30] SDRAM_DQ[31] DAC2 DAC1 A V DD 33 33 _D _D AC AC V DD DD_ CO CO RE SDRAM_DQ[24] SDRAM_DQ[25] SDRAM_DQ[26] SDRAM_DQ[27] DAC5 DAC3 AV DD DD 33 33 _D _D AC AC V DD DD_ CO CO RE GND GND GND GND GND GND V DD DD_ DR DRA M V DD DD_ DR DRA M SDRAM_DQM[3] SDRAM_DQS[3] DAC6 DAC4 A V DD DD 33 33 _D _D AC AC D VD VDD_ PA D5 GND GND GND GND GND GND S D RA RA M_ M_ CL CL K[ K[ 1] 1] VD VD D_ DR DR AM AM SDRAM_DQM[2] SDRAM_DQM[2] SDRAM_DQS[2] G ND ND_ BA BATT VS VSS_REF RT RTC_ CL CL KI V DD DD_ PA D6 GND GND GND GND GND GND SDRAM_CLKn[1] VD VD D_ DR DR AM AM S DR DR AM AM _D _D Q[ Q[ 22 22 ] S DR DR AM AM _D _D Q[ Q[ 23 23 ]
EE M ODE 1 .1 6 1.69 0 .0 0 3.2 23 3 1 .0 6 2 .1 0 1 .1 .1 4 1 .1 .1 2 1 .1 7 0. 00 00 1 .5 8 1 .5 8 3 .2 3 1 .1 8 1 .11 1 .11 1 .11 0.63 0.64 3 .2 1 1. 08 08 1 .11 1 .1 3 1 .1 2 1 .11 0.72 0.73 3 .2 1 1. 08 08 0.00 0.00 0.00 0.00 0.00 0.00 2. 35 35 2. 35 35 0 .3 5 1 .1 6 0.72 0.64 3 . 21 21 3 .2 2 0.00 0.00 0.00 0.00 0.00 0.00 1 .2 .2 2 2 .3 5 0 ..3 35 1 .1 6 0 .0 0 0.00 0. 00 00 3. 22 22 0.00 0.00 0.00 0.00 0.00 0.00 1 .2 0 2 .3 5 1 . 13 13 1 . 13 13
PB M ODE 1 .1 .1 6 1. 72 0 .0 .0 0 3 .2 .2 4 1 .0 5 2 .0 .0 5 1 .0 .0 9 1 .0 .0 8 1 .1 .1 4 0 .0 0 1 .5 8 1 .5 8 3 .2 3 1 .1 8 1 .1 .11 1 .1 .11 1 .1 .11 0 ..6 61 0 ..6 62 3 .2 .2 2 1 .0 5 1 .1 .11 1 .1 3 1 .1 2 1 .1 .11 0. 72 0. 73 3 .2 .2 2 1 .0 5 0 . 00 0 . 00 0 . 00 0 . 00 0 . 00 0 . 00 2 .2 9 2 .2 9 0 .3 2 1 .1 6 0. 7 2 0. 6 2 3 .2 .2 2 3 .2 4 0 ..0 00 0. 0 0 0. 0 0 0. 0 0 0. 0 0 0. 0 0 1 .2 .2 0 2 .2 .2 9 0. 32 1 .1 6 0 .0 0 0 . 00 0 .0 0 3 .2 4 0. 0 0 0. 0 0 0. 0 0 0. 0 0 0. 0 0 0. 0 0 1 .1 7 2 .2 .2 9 1 .1 .1 3 1 .1 .1 3
REC M OD E 1 .1 .1 5 1 . 73 0 .0 .0 0 3 .2 .2 2 1 .0 6 2 .0 .0 5 1 .0 .0 6 1 .0 .0 5 1 .1 .1 5 0 .0 0 1 .5 8 1 .5 8 3 .2 2 1 .1 8 1 .1 .11 1 .1 .11 1 .1 .11 0 . 64 0 . 64 3 .2 .2 0 1 .0 5 1 .1 .11 1 .1 3 1 .1 2 1 .1 .11 0 . 72 0 . 64 3 .2 .2 0 1 .0 5 0. 0 0 0. 0 0 0. 0 0 0. 0 0 0. 0 0 0. 0 0 2 .3 0 2 .3 0 0 .3 0 1 .1 5 0. 7 3 0. 7 3 3 .2 .2 0 3 .2 2 0. 00 0. 00 0. 00 0. 00 0. 00 0. 00 1 .2 .2 0 2 .3 .3 0 0. 30 1 .1 5 0 .0 0 0. 0 0 0 .0 0 3 .2 2 0. 0 0 0. 0 0 0. 0 0 0. 0 0 0. 0 0 0. 0 0 1 .1 6 2 .3 .3 0 1 .1 .1 3 1 .1 .1 3
PIN PIN NAME NO. P1 V_ V_REF P2 V DD_REF P3 RTC_CLKX P4 VD VDD _P _PA D7 P11 GND P12 GND P13 GND P14 GND P15 GND P16 GND P 23 23 S DR DR AM AM _C _C LK LK [0 [0 ] P 24 24 VD VD D_ D_ DR DR AM AM P 25 25 S DR DR AM AM _D _D Q[ Q[ 20 20 ] P 26 26 S DR DR AM AM _D _D Q[ Q[ 21 21 ] R 1 A GN GN D_ D_ AD AD CD R 2 A VD VD D3 D3 3_ 3_ AD AD CD CD R3 VD VDD _B _B ATT R4 VD VDD _P _PA D8 R11 GND R12 GND R13 GND R14 GND R15 GND R16 GND R23 SDRAM_CLKn[0] R 24 24 VD VD D_ D_ DR DR AM AM R25 SDRAM_DQ[18] R26 SDRAM_DQ[19] T1 RFP T2 RFN T 3 A V DD 33 33 _A _A DC DC T 4 A V DD 33 33 _A _A DC DC T11 GND T12 GND T13 GND T14 GND T15 GND T16 GND T 23 23 VD VD D_ D_ DR DR AM AM T 24 24 VD VD D_ D_ DR DR AM AM T25 SDRAM_DQ[16] T26 SDRAM_DQ[17] U1 US USB_VSS U2 AV AVDD33_USB U 3 AG AG ND _A _A DC U 4 AG AG ND _A _A DC U23 SDRAM_DQ[12] U24 SDRAM_DQ[13] U25 SDRAM_DQ[14] U26 SDRAM_DQ[15] V1 US USB_DPLUS0 V2 US USB _D _D MI NUS 0 V3 US USB_DPULS1 V4 US USB _D _D MI NUS 1 V 23 23 S D RA RA M_ M_ DQ DQ [[8 8] V 24 24 S D RA RA M_ M_ DQ DQ [[9 9] V25 SDRAM_DQ[10] V26 SDRAM_DQ[11] W 1 U SB _O _O C_ C_0 W2 USB_PO_0 W3 USB_PO_1 W 4 U SB _O _O C_ C_1 W 23 23 S DR DR AM AM _D _D Q[ Q[ 6] 6] W 24 24 S DR DR AM AM _D _D Q[ Q[ 7] 7] W25 SDRAM_DQM[1] W 26 26 S D RA RA M_ M_ DQ DQ S S[[ 1] 1] Y1 CLKO
EE MOD E 1.18 3.22 NC 3 .2 2 0.00 0.00 0.00 0.00 0.00 0.00 1 . 21 21 2 .3 5 1 . 13 13 1 . 14 14 0 .0 0 0.00 0 .0 0 3 .2 2 0.00 0.00 0.00 0.00 0.00 0.00 1 .2 0 2 .3 5 1 .1 8 1 .1 8 0.00 0.00 0 .0 0 0 .0 0 0.00 0.00 0.00 0.00 0.00 0.00 2 .3 5 2 .3 5 1 .1 8 1 .1 8 0.00 NC 0 .0 0 0 .0 0 1 .1 8 1 .1 8 1 .1 8 1 .1 8 NC NC NC NC 1 .1 .1 8 1 .1 .1 8 1 .1 8 1 .1 8 0 .0 0 NC NC 0 .0 0 1 .1 .1 8 1 .1 .1 8 0 .3 5 1.1 16 6 1.65
PB MODE 1.18 3.23 NC 3 .2 4 0 .0 .00 0.00 0.00 0.00 0.00 0.00 1 .1 .1 9 2 .2 9 1 .1 .1 3 1 .1 .1 4 0 .0 0 0 .0 .0 0 0 .0 0 3 .2 4 0.00 0 .0 .00 0 .0 .00 0 .0 .00 0 .0 .00 0 .0 .00 1 .1 7 2 .2 9 1 .1 8 1 .1 8 0 .00 0 .00 0 .0 0 0 .0 0 0 .0 .00 0.00 0.00 0.00 0.00 0.00 2 .2 9 2 .2 9 1 .1 8 1 .1 8 0.00 NC 0 .0 0 0 .0 0 1 .1 8 1 .1 8 1 .1 8 1 .1 8 NC NC NC NC 1 .1 .1 8 1 .1 .1 8 1 .1 8 1 .1 8 0 .0 0 NC NC 0 .0 0 1 .1 .1 8 1 .1 .1 8 0 .3 2 1 .1 .1 6 1.65
REC MODE 1.18 3.22 NC 3 .2 2 0.00 0.00 0.00 0.00 0.00 0.00 1 .1 .1 9 2 .3 0 1 .1 .1 3 1 .1 .1 4 0 .0 0 0 .0 .0 0 0 .0 0 3 .2 2 0.00 0.00 0.00 0.00 0.00 0.00 1 .1 7 2 .3 0 1 .1 8 1 .1 8 0 .00 0 .00 0 .0 0 0 .0 0 0.00 0.00 0.00 0.00 0.00 0.00 2 .3 0 2 .3 0 1 .1 8 1 .1 8 0.00 NC 0 .0 0 0 .0 0 1 .1 8 1 .1 8 1 .1 8 1 .1 8 NC NC NC NC 1 .1 .1 8 1 .1 .1 8 1 .1 8 1 .1 8 0 .0 0 NC NC 0 .0 0 1 .1 .1 8 1 .1 .1 8 0 .3 0 1 .1 .1 5 1.64
PIN NO. Y2 Y3 Y4 Y 23 23 Y 24 24 Y25 Y26 AA1 A A2 A2 A A3 A3 A A4 A4 AA23 A A2 A2 4 A A2 A2 5 A A2 A2 6 AB1 A B2 B2 AB3 A B4 B4 A B 23 AB24 A B2 B2 5 A B2 B2 6 AC1 AC2 A C3 C3 A C4 C4 A C5 C5 AC6 AC7 AC8 AC9 AC10 A C1 C11 A C1 C1 2 A C1 C1 3 A C1 C1 4 A C1 C1 5 A C1 C1 6 A C1 C1 7 A C1 C1 8 A C 19 A C 20 A C2 C2 1 A C 22 A C 23 A C 24 A C2 C2 5 AC26 AD1 A D2 D2 AD3 A D4 D4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 A D1 D1 2 A D1 D1 3 A D1 D1 4 A D1 D1 5 A D1 D1 6 A D1 D1 7
PIN NAME A TA PI PI _D _D AT A[ A[ 6] 6] A TA PI PI _D _D AT A[ A[ 7] 7] A TA PI PI _D _D AT A[ A[ 8] 8] S D RA M_ M_ DQ DQ [[4 4] S D RA M_ M_ DQ DQ [[5 5] SDRAM_DQM[0] SDRAM_DQS[0] ATAPI_DATA[10] A TA PI PI _D _D AT A[ A[ 4] 4] A TA PI PI _D _D AT A[ A[ 5] 5] A TA PI PI _D _D AT A[ A[ 9] 9] RST- /RST_E5/ FLASH S DR DR AM AM _D _D Q[ Q[ 1] 1] S DR DR AM AM _D _D Q[ Q[ 2] 2] S DR DR AM AM _D _D Q[ Q[ 3] 3] ATAPI_DATA[12] A TA PI PI _D _D AT A[ A[ 2] 2] ATAPI_DATA[11] A TA PI PI _D _D AT A[ A[ 3] 3] D[00] HOST_ALE E5_ALE H OS OS T_ T_ UD UD Sn Sn S DR DR AM AM _D _D Q[ Q[ 0] 0] ATAPI_DATA[15] ATAPI_DATA[14] A TA TA PI PI _D _D AT A[ A[ 1] 1] A TA TA PI PI _D _D AT A[ A[ 0] 0] A TA TA PI PI _D _D MA MA RQ RQ ATAPI2_DATA[2] ATAPI2_DATA[6] ATAPI2_DATA[10] ATAPI2_DATA[14] ATAPI2_ADDR[2] V DD DD _C _C OR OR E V DD DD _C _C OR OR E V DD DD _C _C OR OR E V DD DD _P _PA D9 D9 V DD DD _P _PA D1 D1 0 V DD DD _P _PA D1 D11 P HY HY _L _L RE RE Q C S1 S1 / E5 E5 _C _C S1 S1 MA[23] MA[2] WA IT / WA IT D[12] D[10] D[4] O EE- / E5 E5 _O _O E GPIO[1] VINT_INT ATAPI_DATA[13] AT ATA PI PI _D _D IO IO Rn Rn ATAPI_DMAACKn A TA PI PI _A _A DD DD R[ R[ 1] 1] ATAPI2_DMARQ ATAPI2_DATA[3] ATAPI2_DATA[7] ATAPI2_DATA[11] ATAPI2_DATA[15] ATAPI2_ADDR[3] ATAPI2_DMAACKn ATA PI PI 2_ 2_ IN IN TR TR Q P HY HY _C _C TL TL [0 ] P HY HY _D _D ATA [0 [0 ] P HY HY _D _D ATA [6 [6 ] P HY HY _C _C TL TL [1 ] C S4 S4 / E5 E5 _C _C S4 S4
EE M ODE 0 .7 .7 6 0 .0 .0 0 0 .7 .7 7 1 .1 .1 8 1 .1 .1 8 0. 35 35 1. 16 16 0. 77 77 0 .7 .7 7 0 .7 .7 7 0 .7 .7 6
PB M ODE 0 .7 .7 4 0 .0 .0 0 0 .7 .7 5 1 .1 .1 8 1 .1 .1 8 0 .3 2 1 .1 6 0 .7 7 0 .7 .7 6 0 .7 .7 7 0 .7 .7 4
REC M OD E 0 .8 .8 4 0 .0 .0 0 0 .8 .8 6 1 .1 .1 8 1 .1 .1 8 0 .3 0 1 .1 5 0 .8 8 0 .8 .8 4 0 .8 .8 4 0 .8 .8 5
3. 12 12
3 .1 3
3 .11
1 .1 .1 8 1 .1 .1 8 1 .1 .1 8 0. 77 77 0 .7 .7 6 0. 77 77 0 .7 .7 7 0.00 0. 00 00 3 .2 1 1 .1 .1 8 0. 78 78 0. 77 77 0 .7 .7 7 0 .7 .7 6 0 .0 .0 0 1. 95 95 1. 94 94 1. 91 91 1 ..9 94 0. 00 00 1 .0 8 1 .0 8 1 .0 8 3 .2 .2 2 3 .2 .2 2 3 .2 .2 2 0 .0 .0 0 3 .2 .2 2 0.00 0.00 3 .8 2 2.87 0.00 0.00 3 .2 1 3. 23 23 0. 76 76 3 .2 .2 3 3. 23 23 0 .0 .0 0 0. 00 00 1. 95 95 0. 00 00 1 ..9 93 1. 93 93 3. 22 22 3. 22 22 0 .0 .0 0 0 .0 .0 7 0 .0 .0 0 0 .0 .0 0 0 .0 .0 3 3 .2 .2 3
1 .1 .1 8 1 .1 .1 8 1 .1 .1 8 0 .7 7 0 .7 .7 5 0 .7 5 0 .7 .7 6 0. 00 0 .0 0 3 .2 .2 3 1 .1 .1 8 0 .7 8 0 .7 6 0 .7 .7 7 0 .7 .7 6 0 .0 .0 0 1 .9 2 1 .9 0 1 .8 8 1. 91 0 .0 0 1 .0 .0 5 1 .0 .0 5 1 .0 .0 5 3 .2 .2 4 3 .2 .2 4 3 .2 .2 4 0 .0 .0 0 3 .2 .2 4 0 . 00 0 . 00 3 .8 .8 2 2. 86 0. 00 0. 00 3 .2 .2 3 3 .2 4 0 .7 4 3 .2 .2 4 3 .0 5 0 .0 .0 0 0 .0 0 1 .9 2 0 .0 0 1. 90 1 .9 0 3 .2 3 3 .2 4 0 .0 .0 0 0 .0 .0 7 0 .0 .0 0 0 .0 .0 0 0 .0 .0 3 3 .2 .2 4
1 .1 .1 0 1 .1 .1 8 1 .1 .1 8 0 .8 7 0 .8 .8 4 0 .8 7 0 .8 .8 4 0 . 00 0 .0 0 3 .2 .2 1 1 .1 .1 2 0 .8 9 0 .8 9 0 .8 .8 4 0 .8 .8 4 0 .0 .0 0 1 .9 3 1 .9 1 1 .9 0 1 . 92 0 .0 0 1 .0 .0 5 1 .0 .0 5 1 .0 .0 5 3 .2 .2 2 3 .2 .2 2 3 .2 .2 2 0 .0 .0 0 3 .2 .2 1 0. 00 0. 0 0 3 .8 .8 1 2. 8 6 0. 0 0 0 . 00 3 .2 .2 1 3 .2 2 0 .8 7 3 .2 .2 2 3 .2 2 0 .0 .0 0 0 .0 0 1 .9 3 0 .0 0 1 . 91 1 .9 1 3 .2 1 3 .2 1 0 .0 .0 0 0 .0 .0 7 0 .0 .0 0 0 .0 .0 0 0 .0 .0 3 3 .2 .2 2
PIN NO. A D1 D1 8 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 A E1 E1 A E2 E2 A E3 E3 A E4 E4 AE5 AE6 AE7 AE8 AE9 AE10 A E1 E1 1 A E1 E1 2 A E1 E1 3 A E1 E1 4 A E1 E1 5 A E1 E1 6 A E1 E1 7 A E1 E1 8 AE19 AE20 A E2 E2 1 AE22 AE23 AE24 AE25 AE26 A F1 F1 A F2 F2 A F3 F3 A F4 F4 AF5 AF6 AF7 AF8 AF9 A F1 F1 0 A F1 F1 1 A F1 F1 2 A F1 F1 3 A F1 F1 4 A F1 F1 5 A F1 F1 6 A F1 F1 7 AF 18 A F 19 AF20 AF 21 AF22 A F 23 A F 24 A F 25 A F 26
PIN NAME C S2 S2 / E5 E5 _C _C S2 S2 MA[22] MA[1] GPIO[3] HATA_IRQ GPIO[0] --> SiL9030_INT D[13] D[8] D[5] D[3] A TA PI PI _D _D IO Wn Wn A TA PI PI _R _R ES ES ET ET A TA PI PI _A _A DD DD R[ R[ 3] 3] AT ATA PI PI _I _I NT NT RQ RQ ATAPI2_DATA[0] ATAPI2_DATA[4] ATAPI2_DATA[8] ATAPI2_DATA[12] ATAPI2_ADDR[0] ATAPI2_ADDR[4] ATA PI PI 2_ 2_ IO IO RD RD Y AT ATA PI PI 2_ 2_ RE RE SE SE T P HY HY _D _D AT ATA [3 [3 ] P HY HY _D _D AT ATA [4 [4 ] P HY HY _D _D AT ATA [7 [7 ] P HY HY _D _D AT ATA [1 [1 ] C S5 S5 C S0 S0 / E5 E5 _C _C S0 S0 MA[5] MA[4] GP PII O O[[ 4] 4] GPIO[2] /ETHERNET_IRQ D[15] D[14] D[2] D[1] A TA PI PI _A _A DD DD R[ R[ 4] 4] A TA PI PI _A _A DD DD R[ R[ 2] 2] A TA PI PI _A _A DD DD R[ R[ 0] 0] A TA PI PI _I _I O OR R DY DY ATAPI2_DATA[1] ATAPI2_DATA[5] ATAPI2_DATA[9] ATAPI2_DATA[13] ATAPI2_ADDR[1] AT ATA PI PI 2_ 2_ DI DI O OW Wn ATA PI PI 2_ 2_ DI DI O OR Rn P HY HY _L _L IN IN K_ K_ O ON N P HY HY _D _D AT ATA [2 [2 ] P HY HY _D _D AT ATA [5 [5 ] P HY _C _C LK LK P HY _L _L PS PS C S3 S3 / E5 E5 _C _C S3 S3 MA[24] MA[3] LWE- /E5_LWEn DTACK GPIO[5] SIO_SPI_CS0 D[9] D[11] D[6] D[7]
EE MOD E 3 .2 .2 2 0.00 0.00 0 .0 0
PB MODE 3 .2 .2 4 0.00 0.00 0 .0 0
REC MODE 3 .2 .2 1 0.00 0.00 0 .0 0
3 .2 3
3 .2 4
3 .2 2
0.00 0.00 0.00 0.00 3 .2 .2 3 3 .2 .2 3 3 .2 .2 3 0 .0 .0 0 1 .9 4 1 .9 2 1 .9 2 1 .9 5 0 .0 0 3 .2 1 4 .5 .5 0 3 .2 .2 3 0 .0 .0 0 0 .0 .0 0 0 .0 .0 0 0 .0 .0 0 3 .2 .2 3 3 .2 .2 2 0.00 0.00 3 .2 .2 3
0.00 0.00 0.00 0.00 3 .2 .2 4 3 .2 .2 4 3 .2 .2 4 0 .0 .0 0 1 .9 1 1 .8 7 1 .8 9 1 .9 2 0 .0 0 3 .2 2 4 .5 .5 0 3 .2 .2 4 0 .0 .0 0 0 .0 .0 0 0 .0 .0 0 0 .0 .0 0 3 .2 .2 4 3 .2 .2 4 0.00 0.00 3 ..2 24
0.00 0.00 0.00 0.00 3 .2 .2 2 3 .2 .2 2 3 .2 .2 2 0 .0 .0 0 1 .9 2 1 .8 9 1 .9 1 1 .9 3 0 .0 0 3 .2 1 4 .5 .5 0 3 .2 .2 2 0 .0 .0 0 0 .0 .0 0 0 .0 .0 0 0 .0 .0 0 3 .2 .2 2 3 .2 .2 1 0.00 0.00 3 . 22 22
3 .2 0
3 .2 3
3 .2 1
0.00 2.87 0.00 0.00 3 .2 .2 2 0 .0 .0 0 0 .0 .0 0 4 .6 .6 0 1 .9 6 1 .9 3 1 .9 5 1 .9 3 0 .0 0 3 .2 .2 3 3 .2 .2 3 0 .0 .0 0 0 .0 .0 0 0 .0 .0 0 1 .6 4 3 .2 1 3 .2 .2 2 0.00 0.00 3 .2 1 3.23
0.00 2.86 0.00 0.00 3 .2 .2 3 0 .0 .0 0 0 .0 .0 0 4 .6 .6 0 1 .9 2 1 .8 9 1 .9 2 1 .9 0 0 .0 0 3 .2 .2 3 3 .2 .2 3 0 .0 .0 0 0 .0 .0 0 0 .0 .0 0 1 .6 6 3 .2 3 3 .2 .2 4 0.00 0.00 3 .2 3 3.24
0.00 2.86 0.00 0.00 3 .2 .2 1 0 .0 .0 0 0 .0 .0 0 4 .6 .6 1 1 .9 4 1 .9 1 1 .9 3 1 .9 1 0 .0 0 3 .2 .2 1 3 .2 .2 1 0 .0 .0 0 0 .0 .0 0 0 .0 .0 0 1 .6 6 3 .2 3 3 .2 .2 1 0.00 0.00 3 .2 1 3.22
3 .2 3
3 .2 4
3 .2 2
0.00 0.00 0.00 0.00
0.00 0.00 0.00 0.00
0.00 0.00 0.00 0.00
5. ALUMINUM CAPACITORS on MAIN BOARD Location ation No.
Capacity acity
C1152 C1153 C 1233 C 1281 C 1282 C 1285 C 1286 C 1403 C 1404 C 1407 C 1408 C 1410 C 1413
100uF 100uF 220uF 220uF 220uF 220uF 220uF 220uF 220uF 220uF 220uF 220uF 100uF
Capacitor Voltage Spec 16 16 6 6 6 6 6 6 6 6 6 6 16
EE Mode 4 .9 5 2 .4 8 1 .21 1 .21 2.4 2.4 2.4 3 .26 3 .27 4 .95 1.8 1 .23 4 .9 5
Playback Mode 4.95 2.48 1.21 1.21 2.4 2.4 2.4 3.26 3.27 4.95 1.8 1.23 4 .95
INFORMATION : 1. Voltage Check using RH 300 DV1 2. SET : Ver=070827B Cware=v15_06 BSP=rh3t FME IO : Ver=70824_1 Loader: S603 3. EE Mode : Check with Signal C2 4. Playback Mode : Check with DVD TEST DISC KDV-N Chapter 2 5. Record Mode : Check with recording signal C2 using DVD -RW Brand : Mitsubishi, VR Mode
Record Mode 4.9 5 2.4 8 1.2 1.2 2.4 2.4 2.4 3 .26 3 .27 4 .95 1.7 9 1 .23 4.9 5
6. CAPACITORS on I/O BOARD Lo c a . Value No. C ap ap ac ac it it or or Vo lt lt ag ag e_ e_ Sp Sp ec ec
EE Mode P os os it it iv iv e ( +) +) N eg eg at at iv iv e ( -) -)
G ap ap
Playba ck M ar ar gi gi n P os os it it iv iv e ( +) +) N eg eg at at iv iv e ( -) -)
G ap ap
Re cord M ar ar gi gi n P os os it it iv iv e ( +) +) N eg eg at at iv iv e ( -) -) G ap ap
M ar ar gi gi n
C 152
100uF 10
16V
3.12V
0V
3.12V
1 2 . 8 8V
3 . 1 2V
0V
3.12V
12.88V
3.1V
0V
3.1V
12 12.9V
C 164
100uF 10
16V
2.5V
0V
2.5V
1 3 . 5V
2.51V
0V
2 . 5 1V
13.49V
2.47V
0V
2.47V
13.53V
C 165
100uF 10
16V
3.31V
0V
3.31V
1 2 . 6 9V
3 . 3 1V
0V
3.31V
12.69V
3.3V
0V
3.3V
12 12.7V
C 163
47uF
16V
5 . 2 2V
0V
5.22V
10.78V
5.22V
0V
5.22V
10.78V
5 . 2V
0V
5.2V
10 10.8V
C 162
4.7uF
50V
12.64V
0V
12.64V
37.36V
12.62V
0V
12.62V
37.38V
12.66V
0V
12.66V
37.34V
C 159
1 00uF 10
16V
1.81V
0V
1.81V
1 4 . 1 9V
1 . 8 1V
0V
1.81V
14.19V
1 . 7 9V
0V
1.79V
1 4 . 2 1V 13.66V
C 602
10uF
16V
2 . 3 4V
0V
2.34V
15.37V
2.34V
0V
2.34V
15.37V
2.34V
0V
2.34V
C 603
220uF
6 .3 V
2.34V
1.31V
1.03V
5.27V
2 . 3 3V
1 . 3 1V
1.02V
5 . 2 8V
2.34V
1 . 3 3V
1.01V
5. 5.29V
C 618
22uF
16V
5 . 1 9V
0V
5.19V
10.81V
5.19V
0V
5.19V
10.81V
5.17V
0V
5.17V
10.83V
C 624
470uF 47
10V
4.83V
0V
4.83V
5.17V
4.83V
0V
4.83V
5.17V
4 .8 V
0V
4 .8V
5 . 2V
C 632
22uF
16V
1 . 8V
0V
1 . 8V
14.2V
1.81V
0V
1.81V
1 4 . 1 9V
1 . 7 8V
0V
1.78V
1 4 . 2 2V
C 634
22uF
16V
3 . 2 3V
0V
3.23V
12.77V
3.22V
0V
3.22V
12.78V
3 . 2V
0V
3.2V
12 12.8V
C 807
22 22uF
16V
1 2V
0V
12V
4V 4V
11.99V
0V
11.99V
4 . 0 1V
12V
0V
12V
4V
C 808
22uF
16V
6V
2 . 4 4V
3.56V
12.44V
6V
2 . 4 3V
3.57V
12.43V
6V
2 . 4V
3.6V
12 12.4V
C 823
10uF
16V
6V
0V
6V
10V
6V
0V
6V
1 0V
6V
0V
6V
10 10V
C 829
22uF
16V
6V
2.4V
3 . 6V
12.4V
6V
2.4V
3 . 6V
1 2 . 4V
6V
2.41V
3.59V
1 2 . 4 1V
C 843
22uF
16V
6V
0V
6V
10V
6V
0V
6V
1 0V
6V
0V
6V
10 10V
C 844
22uF
16V
6V
0V
6V
10V
6V
0V
6V
1 0V
6V
0V
6V
10 10V
C 858
22uF
16V
6 . 4 8V
1 . 9 2V
4.56V
11.44V
6.48V
1 . 9 2V
4 . 5 6V
11.44V
6.46V
1 . 9 3V
4.53V
11.47V
C 859
22uF
16V
1 . 6V
1.8V
-0.2V
1 6 . 2V
1.6V
1.8V
-0.2V
16.2V
1 . 6V
1.8V
-0.2V
1 6 . 2V
C 875
22uF
16V
6 . 4 9V
1 . 9 6V
4.53V
11.47V
6.48V
1 . 9 8V
4.5V
11.5V
6 . 4 6V
2 . 0 5V
4.41V
11.59V
C 868
22uF
16V
11.99V
0V
11.99V
4 . 0 1V
11.99V
0V
11.99V
4.01V
12.01V
0V
12.01V
3 . 9 9V
C 849
22uF
16V
1 . 4 8V
4 3V
-41.52V 57.52V
1.59V
0.54V
1.05V
14.95V
1.48V
0.44V
1.04V
14.96V
C 867
22uF
16V
2 . 4 9V
0V
2.49V
13.51V
2.49V
0V
2.49V
13.51V
2.46V
0V
2.46V
13.54V
C 825
22uF
16V
6 . 4 9V
0V
6.49V
9 . 5 1V
6 . 4 9V
0V
6.49V
9.51V
6.46V
0V
6.46V
9.54V
C 826
22uF
16V
1 . 6 1V
0V
1.61V
14.39V
1.61V
0V
1.61V
14.39V
1.61V
0V
1.61V
14.39V
C 845
22uF
16V
6 . 4 9V
0V
6.49V
9 . 5 1V
6 . 4 9V
0V
6.49V
9.51V
6.46V
0V
6.46V
9.54V
C 872
470uF
10V
1.93V
0.14V
1 . 7 9V
8.21V
1.9V
0.21V
1 . 6 9V
8.31V
1 . 9 6V
0 . 0 7V
1.89V
8.11V 8.
C 876
470uF 47
10V
1.94V
0V
1.94V
8.06V
2.27V
0V
2.27V
7.73V
1 . 9 6V
0V
1.96V
8 . 0 4V
C 848
220uF
6 .3 V
2.53V
2.42V
0.11V
6.19V
2 . 5 4V
2 . 4 2V
0.12V
6 . 1 8V
2.51V
2 . 4 1V
0.1V
6.2V
C 870
22uF
16V
5 . 1 8V
0V
5.18V
10.82V
5.18V
0V
5.18V
10.82V
5.16V
0V
5.16V
10.84V
C 871
470uF 47
10V
1.97V
0V
1.97V
8.03V
1.95V
0V
1.95V
8.05V
1 . 9 9V
0V
1.99V
8 . 0 1V
C 873
2 20uF 22
6 .3 V
2.53V
0V
2.53V
3 . 7 7V
2 . 5 3V
0V
2.53V
3.77V
2.52V
0V
2.52V
3 . 7 8V
C 874
2 20uF 22
6 .3 V
2.53V
0V
2.53V
3 . 7 7V
2 . 5 3V
0V
2.53V
3.77V
2.52V
0V
2.52V
3 . 7 8V
C 850
470uF
10V
1.93V
1.92V
0 . 0 1V
9.99V
1.95V
1.9V
0 . 0 5V
9.95V
1 . 9 5V
1 . 9 2V
0.03V
9.97V 9.
C 706
470uF 47
10V
5.21V
0V
5.21V
4.79V
5.21V
0V
5.21V
4.79V
5 . 1 9V
0V
5.19V
4 . 8 1V
C 709
47uF
16V
5 . 2 1V
0V
5.21V
10.79V
5.21V
0V
5.21V
10.79V
5.19V
0V
5.19V
10.81V
C 903
10uF
16V
3 . 2 1V
0V
3.21V
12.79V
3.21V
0V
3.21V
12.79V
3 . 2V
0V
3.2V
12 12.8V
C 904
10uF
16V
1 . 8V
0V
1 . 8V
14.2V
1 . 8V
0V
1 . 8V
1 4 . 2V
1 . 7 7V
0V
1.77V
1 4 . 2 3V
C 906
10uF
16V
1 . 6V
0V
1 . 6V
14.4V
1 . 6V
0V
1 . 6V
1 4 . 4V
1 . 5 8V
0V
1.58V
1 4 . 4 2V
C 950
22uF
16V
6 . 4 8V
1.6V
4.88V
11.12V
6 . 4 7V
1.6V
4.87V
11.13V
6 . 4 5V
1 . 5 8V
4.87V
11.13V
C 951
22uF
16V
6 . 4 8V
1.6V
4.88V
11.12V
6 . 4 8V
1.6V
4.88V
11.12V
6 . 4 5V
1 . 5 8V
4.87V
11.13V
C 952
10uF
16V
3 . 2 6V
0V
3.26V
12.74V
3.26V
0V
3.26V
12.74V
3.24V
0V
3.24V
12.76V
C 909
47uF
16V
1 . 6 1V
0V
1.61V
14.39V
1.61V
0V
1.61V
14.39V
1.59V
0V
1.59V
14.41V
C 955
10uF
16V
3 . 2 6V
0V
3.26V
12.74V
3.26V
0V
3.26V
12.74V
3.24V
0V
3.24V
12.76V
C 943
22uF
16V
7 . 0 7V
1 . 6 2V
5.45V
10.55V
7.05V
1 . 6 2V
5 . 4 3V
1 0 . 5 7V
7.04V
1 . 6 1V
5.43V
1 0 . 5 7V
C 944
22uF
16V
7 . 0 7V
1 . 6 2V
5.45V
10.55V
7.07V
1 . 6 2V
5 . 4 5V
1 0 . 5 5V
7.04V
1 . 6 1V
5.43V
1 0 . 5 7V
C 948
10uF
16V
3 . 2 6V
0V
3.26V
12.74V
3.25V
0V
3.25V
12.75V
3.24V
0V
3.24V
12.76V
PRINTED CIRCUIT BOARD DIAGRAMS 1. MAIN P.C.BOARD (TOP (TOP VIEW)
(BOTTOM VIEW)
2. I/O P.C.BOARD (TOPVIEW)
I/O P.C.BOARD (BOTTOM VIEW)
3. SMPS (POWER) P.C.BOARD P.C.BOARD (TOP VIEW)
(BOTTOM VIEW)
4. TIMER & KEY P.C.BOARD 4-1. 8 TOOL (TOP VIEW)
4-2. 9 TOOL (BOTTOM VIEW)
(TOP VIEW)
(BOTTOM VIEW)
5. COMMON INTERFACE P.C.BOARD(OPTIONAL PART) (TOPVIEW)
(BOTTOM VIEW)
6. HDMI P.C.BOARD (TOPVIEW)
(BOTTOM VIEW)
MEMO
MEMO
SECTION 4 RS-06A RS06A LOA LOADER DER PART CONTENTS ............................. ............................. ............................. ............................. ...........................4-2 ............4-2 ELECTRICAL ELECTRICA L TROUBLE TROUBLESHOOTING SHOOTING GUIDE ...............
THE DIFFERENCE OF DVD-R/RW, DVD+R/RW DISCS AND DVD-ROM ..............................4-16 1. 2. 3. 4.
RECORDING LAYER .............. ............................ ............................. ............................. ............................. ............................. ............................. .......................... .......................4-16 ............4-16 DISC SPECIFICATION .............. ............................. ............................. ............................. ............................. ............................. ............................. ......................... .....................4-17 ..........4-17 DISC MATERIALS .............. ............................ ............................. .............................. ............................. ............................. ............................. ......................... ......................... .................4-17 ...4-17 ORGANIZATION OF THE INNER DRIVE AREA, OUTER DRIVE AREA, LEAD-IN ZONE AND LEAD-OUT ZONE.................... ZONE................................... ............................. ............................. ............................. ............................. .................4-21 ..4-21
.............................. ............................. ............................. ............................. ............................. ............................. ..........................4-24 ............4-24 OPTICAL OPTI CAL POW POWER ER SETTING SETTING ............... 1. AUTOMATIC AUTOMATIC OPTICAL POWER SETTING (SET-BASED) ............. ............................ ............................. ............................. .........................4-24 ..........4-24 2. MANUAL OPTICAL POWER SETTING .............. ............................ ............................. .............................. ............................. ............................. ........................4-25 .........4-25 2-1. ALPC MEASUREMENT SYSTEM....................... SYSTEM...................................... ............................. ............................. ............................. ............................. .................4-25 ..4-25 2-2. ALPC PROGRAM ............... .............................. ............................. ............................. ............................. ............................. ............................. ......................... .....................4-25 ..........4-25 2-3. EXECUTE ALPC PROGRAM PROGRAM............. ............................ .............................. ............................. ............................. ............................. ............................. ...................4-26 ....4-26 2-4. OPTICAL OPT ICAL POWER SETTING ............. ............................ .............................. ............................. ............................. ............................. ............................. ...................4-28 ....4-28 2-5. CONFIRM OPTICAL POWER SETTING PARAMETER .......4-29
ELECTRICAL ELECTRICAL TROUBLESHOOTING TROUBLESHOOTING GUIDE Reset or power check.
Check it after connecting the power cable only on interface cable for NO Reset or Power ON.
Are the pin1 of LPB272+5V, pin4 of LPB272+12V respectively after the power cable connecting?
NO
Check the power (5V/12V) short. Repair the SMPS Block
YES
Does the pin1 (Reset) of LIC401 change 0V to 3.3V at the power supply initial input mode?
NO
Check the LIC401.
YES NO
Check the LX201 (16.9MHz).
System check.
Load tray without inserting disc. YES
Does Tray operate normally?
NO
Go to “Tray operating is abnormal”
YES
Does Pick-up move to inside or outside?
NO
Go to “Sled operating is abnormal”
YES
Does Pickup lens move up/down?
NO
Go to “Focus Actuator operating is abnormal”
YES
Does Laser turn on? YES
After eject tray, Insert CD-ROM Disc
NO
Go to “Laser operating is abnormal”
Tray operating is abnormal.
Tray open doesn’t work. YES
Is the input voltage 0V at LIC201 pin49 when push the EJECT EJECT SW?
NO
• Check the connction of LIC201 pin49.
YES
Is there Tray control signal input? (LIC301 pin20)
NO
• Check the connction of LIC201 pin70. • Replace the LIC201. • Check the communication line between LIC201.
YES
Is there Tray drive voltage output? (LIC301
NO
When LPF303 is open, Is there Tray drive signal
NO
Replace the LIC301.
Sled operating is abnormal.
Is there Sled control signal output? (LIC201 pin75, 76)
NO
Replace the LIC201.
YES
Is there Sled drive voltage input? (LIC301 pin25, 26)
NO
Check the LR319, LR320.
YES
Is there Sled drive voltage output? (LIC301 pin29, 30, 31, 32)
NO
Is CTL2 signal “H”? (LIC301 pin17)
YES
NO
Check the connection of LIC101 pin27.
YES
Spindle operatingis abnormal
Is there Spindle control DSP output output? ? (LIC201 (LIC201 pin77)
NO
Replace the LIC201.
YES
Is there Spindle drive voltage output? (LIC301 pin35, 36, 37)
NO
Is there FG signal input? (LIC201 pin65)
YES YES
Is there
OK
NO
• Check the output of LIC301 pin43. • Check the connector LPM301. • Replace the LIC301.
Focus servo is unstable
Is FE signal output normal in focusing Up/Down? (LIC101 pin22*)
NO
Check Pickup Read Power is 1.3~1.7mW?
NO
Replace the Pick up.
YES YES
Is FDRV signal output normal in focusing Up/Down? (LIC201 pin 69) YES
Go to “Focus actuator operating is abnormal”
Replace the LIC101.
NO
Replace the LIC201.
* LIC101 pin22 is MOUT2(FEP MOUT2(FEP Monitor2). Monitor2). After disc recognition action, Monitor port is off. So, please check FE signal during disc recognition.
Track servo is unstable
Is TE signal output normal in focusing ON and tracking OFF? (LIC101 pin20*)
NO
Is PICK UP (E, F, G, H) output normal? (LPM101 pin35, 38, 39, 42) YES
Replace the LIC101.
YES
Is there TDRV signal output in tracking ON? (LIC201 pin73)
NO
Replace the LIC201.
NO
Check the PICK UP UP FFC. Replace the PICK UP.
Recognition fail case 1 : CD-ROM fail
Check pick-up Read power was 1.3 ~1.7mW?
NO
Go to “LD CHECK”.
YES
Does focus servo operate normally?
NO
Go to “Focus servo is unstable”.
YES
Check pick-up RF signal LIC101(pin83) RFOUT RFOUT was abou aboutt 400mV?
NO
Check the pick-up FFC and LPM101. Replace the pick-up.
Recognition fail case 2 : DVD Disc
Check pick-up read power was 1.1~1.3mW.
NO
Go to “LD CHECK”.
YES
Is there RF signal at LIC101 pin78?
NO
Replace the Pickup.
YES
Is there RF signal at LIC101 pin88(RFP) and pin87(RFN)?
NO
Replace the LIC101.
In case of writing fail.
Normal case
Check the media DVD R/RW?
NO
Check disc label.
YES
Does the disc have any dust, scratch, fingerprint ...?
YES
Remove the dust, fingerprint and if the disc has long width scratch, change it.
Writing Part Check
Load tray with DVD
R/RW disc.
Press the “REC” key.
Does writing finish without any error?
NO
YES
Is the written file read normally?
NO
Eject tray.
LD CHECK (Laser operating is abnormal)
Perform 6. Optical power setting parameter check from “How to use Test tool”.
Is ALPC parameters valid?
YES
Execute “C.Laser power setup” of “How to use test tool”
NO
Perform 5. Optical Power Setting
OFF level OK
N.G
Check reference voltage.
E
CD/DVD?
DVD
CD
Select Mode : CD, Test and perform Test from 4. LD Test of “How to use Test tool”
Check the input of CD/DVD. (pin10 of LPM 101)
Select Mode : DVD, Test and perform Test from 4. LD Test of “How to use Test tool”
Check the input of CD/DVD. (pin10 of LPM101)
F
Select Mode : DVD, Test and perform Test from 4. LD Test of “How to use Test tool”
G
Select Mode : DVD, Test and perform Test from 4. LD Test of “How to use Test tool”
Check the input of CD/DVD. (pin10 of LPM101)
Check the input of CD/DVD. (pin10 of LPM101)
Check the input of W2SET. (pin13 of LPM101)
Check the input of W3SET. (pin14 of LPM101)
THE DIFFERENCE OF DVD-R/RW, DVD-R/RW, DVD+R/RW DISCS AND DVD-ROM 1. RECORDING LAYER LAYER • DVD-ROM DVD-ROM (Read (Read Only Disc) Disc)
m u 4 7 0.
T 3
0.4 um
2. DISC SPECIFICATION SPECIFICATION
2) Recordin Recording g format format using using organic organic dye dye materi material al (DVD-R / DVD+R) The format that records data through the creation of recorded marks by changing the organic dye material with a laser beam.
• Disc structure
3) Recordin Recording g format using using phase-c phase-chang hange e recording recording materia materiall (DVD-RW / DVD+RW) Data is recorded by changing the recording layer from the amorphous status to the crystalline status, and played back by reading the difference of the reflection coefficient. Amorphous: Non-crystalline.
• Disc structure
• Recording principles [ Recording ]
To make recordings, it is necessary to modulate the write pulse, which is called “Write Strategy”. There can be many types in Write Strategy. Strategy. Typically Write Strategy for DVD R has NMP(Non Multi-Pulse) type and MP(Multi-Pulse) type. In In NMP type each single mark is created created by subsequent separated short pulses. In MP type each single mark is created by one continuous pulse. Write Strategy for DVD RW has Type 1 and Type 2. In Type 1 the mark with nT width is created by one top pulse and (n-2) multi-pulses. Thus mark 3T is made by one top pulse and one multi-pulse. In Type 2 the mark with nT width is created created by one top pulse and (n-3) (n-3) multi-pulses multi-pulses.. Thus mark 3T is made by one top pulse only. RS-06A uses MP type Write Strategy Strategy for DVD R and Type Type 1 for DVD RW as shown below. below.
4. ORGANIZATION ORGANIZATION OF THE INNER DRIVE AREA, OUTER DRIVE AREA, LEAD-IN ZONE AND LEAD-OUT ZONE 1) Layout Layout of DVD-R DVD-ROM OM disc disc
2) Layo Layout ut of DVD+ DVD+R R dis disc c
3) Layo Layout ut of of DVD+ DVD+RW RW disc disc
4) Layout Layout of DVD-R DVD-R/R /RW W disc disc
OPTICA OPTICAL L POWER POWER SETTING SETTING 1. AUTOMA AUTOMATIC TIC OPTICAL POWER SETTING (SET-BASED) (SET-BASED) The RS-06A mounted models models are supported by the B/END to automatically automatically execute the optical power setting of the loader at the set condition with the following steps. 1. Use the remote remote controller controller to select select the mode as Lock Lock position position at the Setup menu. menu. 2. Use the remote remote controll controller er to enter enter 5 -> 7 -> 2 -> -> 0 into the the set. When they are normally entered, the GUI is displayed as shown at Fig. 1. 3. When you select ‘Yes’, ‘Yes’, the optical power setting is automatically proceeded and it takes about 20 seconds. 4. When setting setting is finished, finished, OK or NG is displayed displayed on the screen. screen. The OK screen is displayed for the normal termination (Fig. 2) The NG screen is displayed for the abnormal termination (Fig. 3) 5. When you select select ‘Yes’ ‘Yes’ button button,, the GUI is cleared cleared and it normally normally operates operates..
2. MANU MANUAL AL OPTI OPTICA CAL L POWE POWER R SETTI SETTING NG If the manual optical power setting is not accomplished, you can use the automatic optical power setting.
2-1. ALPC Measurement System We need basically several measurement instruments to adjust Optical Power of CD and DVD Disc
• ESSENT SENTIA IAL L INS INSTRUM TRUME ENT 1) Optical Power meter & Sensor (ADVANTEST, TQ8230/Q82014A) 2) Personal Computer 3) Adjustment Program (Dragon or ALPC) --> being recommended ALPC Program in case of SVC
• OPTIO TIONAL NAL INST INSTRU RUM MENT 1) USB-ATAPI Interface (if you don’t have Notebook which has ATAPI Interface or use PC USB Port) 2) Connector-ATAPI Connector-ATAPI Interface Board
2-3. Execute ALPC Program 1) Execute Dragon_JW3P D ragon_JW3P.exe .exe file.
2) Enter the password password.. It is “qaz”. “qaz”. When you enter the password, turn off the “Caps lock” in your keyboard.
4) If the target device setting is i s completed, execute the “Setup Laser Power(Manual)” in the “Alpc/Opc” menu.
2-4. Optical power setting When you change the Travers ass’y(including pick-up) or loader PCB, you must do the laser power setting to match pick-up and loader PCB.
1) DVD LD LD power power setting setting • Select the DVD in the “Select Laser Diode” • Press
(Read power on, Strong read light)
• Measure optical read Power. • Write read power value. • In case of
,
you are able to measure the power through same procedure. (caution) Don’t watch light directly. • When you finish optical power measurement, press • Press
button(LD Off). button.(save to ERPROM)
2-5. Confirm Optical Power Setting Parameter LD Test result is ok, but Loader performance is bad.
1)
1. Check Check ALPC ALPC param paramete eterr value value 1) Pres Press s 2) Press
++
butt button on to open open “Res “Resul ults ts Disp Displa lay” y” dial dialog og..
ALPC Para
button.
-
We can see optical power setting value. Write optical Power Setting value to paper. Adjust power setting again. Compare original parameter to new parameter. if parameter value is different, original value is wrong or optical power may change. - But pick-up LD test is all ok, just adjust optical power setting again.
Normal range of ALPC parameter
2)
2-6. Attachment. Optical Power Measurement Optical Power measurement is to adjust LD power from Pick-up To measure optical power, LD status is on. Other light affects optical power. Avoid other light to measure exact power Generally headlight power is about 50µW, Sun power is about 100mW. Optical Power measurement method 1. Fit optical optical Power Meter
(wavelength) (wavelength) value to DVD.(generally DVD.(generally 660nm)
2. DVD DVD LD LD On. On. 3. Approach Approach power sensor to Pick-up Lens about 3mm vertically vertically.. Fix Lens and Sensor mark position. 4. Read Monitor Monitor value. (move (move sensor read read just a little little and read max value.) value.) (caution) unit is mW. 5. Write Write monitoring monitoring value value x 100. Only Only an integer integer.. 6. Fit Power Meter Meter (wavelength (wavelength)) value to CD.(general CD.(generally ly 780nm) 7. CD LD LD On On.
INTERNAL INTERNAL STRUCTUR STRUCTURE E OF THE PICK-UP PICK-UP 1. BLOCK BLOCK DIAGRAM DIAGRAM OF THE THE PICK-UP PICK-UP (HOP-7232T (HOP-7232TL) L) IC2 FM
5
CD-VR
6 DVD-V R
+
In
4
Out
3
High Gain ᵏ High Low Gain ᵏ Low
High Out
7
SW R15 0
2
Low Out 8
R14 0
Gnd
+
Vref
C16
Vcc
1
R8 C4
Tilt-
2
Tilt+
3
TR-
4
TR+
5
AF-
6
AF+
7
Gnd(FM)
8
FM
9
Vref
10
SelCD
11
Vcc(FM)
12
ENBL
13
IR
14
I1
15
I2
16
I3
17
Gnd(LDD)
18
W1DIS
19
W1DISN
Rd
C17
C5
1
R7 R6
C3 C2
R5 R4
IC1 LDD
C1
14 13 12 11 10 9 I n R
15 ENBL
DVD-LD
I n W 1
I n W 2
I n W 3
N C
V d d 1
8
R d i s
R3
W1dis+
7
16 Vdd2
W1dis-
6
20
Vdd(LDD)
17 IOut2
W2dis+
5
21
W2DIS
R2
2. PICK PICK UP PIN ASSIGN ASSIGNMEN MENT T No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Signal Name TiltTilt+ TRTR+ AFAF+ Gnd(FM) FM Vref SELCD Vcc(FM) ENABLE IR I1 I2 I3 GND(LDD) W1DIS W1DISN VDD(LDD)
Signal Description Tilting Actuator drive signal Tilting Actuator drive signal + Tracking Actuator drive signal Tracking Actuator drive signal + Focusing Actuator drive signal Focusing Actuator drive signal + Ground connection for FM FM output FM reference voltage input High:selects CD-LD,CD-VR Low: selects DVD-LD,DVD-VR Power supply for FM (+5 V) Disables output current regardless of **DIS (Low voltage:No Iout) Input current for current amplifier Input current for current amplifier Input current for current amplifier Input current for current amplifier Ground connection for LDD LVDS control for output current (Low active) (LVDS+) LVDS control for output current (LVDS-) P l f LDD ( 5 V)
I/O I I I I I I O I I I I I I I I I
3. SIGNAL SIGNAL DETECT DETECTION ION OF OF THE THE P/U
1) Focus Focus Error Signal Signal ==> (A+C)-(B (A+C)-(B+D) +D) This signal is generated in RF IC (LIC121 : AN22113A) and controls the pick-up’s up and down to focus on Disc.
2) Tracking Tracking Error Signal Signal (DPP Method) ==> {(A+D)-(B+C)}- k x {(EF1+EF4)-(EF2+EF3)} {(EF1+EF4)-(EF2+EF3)} This signal is generated in RF IC (LIC121 : AN22113A) and controls the pick-up’s left and right shift to find track on Disc.
3) RF Signal Signal ==> (A+B+C (A+B+C+D) +D) This signal is converted converted to DAT DATA signal in DSP IC (LIC201 : MN103SA6G). MN103SA6G).
DESCRIPTION OF CIRCUIT 1. ALPC (AUTOMATIC (AUTOMATIC LASER POWER CONTROL) CIRCUIT 1-1. Block Diagram LIC101
LPM101 VREFPD Optical Pick-up HOP-7232TL
FM
19
AN22117A
LIC201
124
APC
S/H2 LPF
M S/H3
VGA
123
Erase
P X
FPD
S/H1
VGA
LD
MN103SC7G
Ave
Space
PD 40
LDD
SH3
SH2
42
Write Strategy
SH1
S/H Signal
D/A D/A D/A
Serial
D/A
I/F
D/A
41
A/D
ADSC
2. FOCUS/TRACKING/SLED SERVO CIRCUIT 2-1. Focus, Tracking & Sled Servo Process Focus, Tracking, Sled Servo
Pick-up
LIC101 AN22117A
E F B
A
C
D
A,B,C,D E,F,G,H
G H
MPX Block
LIC201 Servo Control MN103SC7G
A,B,C,D
Tracking Focusing
Focus Error
A,B,C,D
E,F,G,H
Track Error
3. SPINDLE SPINDLE SERVO CIRCUIT CIRCUIT 3-1. Spindle Servo Process
LIC101 AN22117A
Pick-up
Wobble Signal Generator
E
WBLIN
F B
A
RF
C
D
SRF
EFM
G H
LIC201 MN103SC7G
Spindle Motor
M
SERVO DSP
• Pin Assign signm ment Pin no.
Pin Name
Type
Function
1
NC
-
-
2
PO3
O
General CMOS output pin
3
PO2
O
Head Amp/OEIC gain change signal output pin 3.
4
PO1
O
Head Amp/OEIC gain change signal output pin 2.
5
PO0
O
Head Amp/OEIC gain change signal output pin 1.
6
VCC53
PS
Power supply pin for CMOS I/F & LOGIC.
7
PIO0
I/O
General CMOS Input/Output pin 0.
8
PIO1
I/O
General CMOS Input/Output pin 1.
9
PIO2
I/O
General CMOS Input/Output pin 2.
10
PIO3
I/O
General CMOS Input/Output pin 3.
11
PIO4
I/O
General CMOS Input/Output pin 4.
12
CXDPH1
I
PH capacitor commection pin 1 for LPOS.
13
CXDPH2
I
PH capacitor commection pin 2 for LPOS
14
GND6
PS
15
STMDN
I
PD input pin for STM.
16
STMD
I
PD input pin for STM.
17
VREF08
O
0.8V reference voltage output pin (APC).
18
SEO1
O
Output pin 1 after selection of each error signal.
GND pin for BG.
Pin no.
Pin Name
Type
41
SH2
I
Function PCA pe peak/bottom detection, APC space detection/ Playback power detection/Erase detection sample timing signal input pin (pulldown)
42
SH1
I
ROPC space detection, APC space detection/ Playback power detection sample timing signal input pin(pulldown).
43
FEPIDGT/SH6
I
CAPA through signal input pin/servo sampling signal input pin (pull-down)
44
SH5
I
Sample-and-hold timing signal input pin of wobble S/H at recording (pull-down)
45
VCC4
PS
Power supply pin for internal LOGIC (5.0V)
46
LSDAT
I/O
Serial data input for LPC.
47
LSCK
I
Serial clock enable input LPC.
48
LSEN
I
Serial enable input for LPC.
49
TGCHG
I
LPC DAC bank change control signal input pin.
50
NC
-
-
51
CHSEL
I
Serial MPX channel change data input pin.
52
SEN
I
Serial enable input pin for FEP (p ( pull-down)
53
SCK
I
Serial clock input pin for FEP (p ( pull-up).
54
SDAT
I/O
55
NC
-
-
56
RSEN
I
Serial enable input for RF (pull-down).
Serial data input pin for FEP.
Pin no.
Pin Name
Type
Function
78
RFIN2
I
RFAGC signal input pin 2.
79
RFIN1
I
RFAGC signal input pin 1.
80
HDVREF
O
2.2V reference voltage output pin.
81
CLPPPH
I
Capacitor connection pin for LPP peak hold
82
CLPPHPF
I
Capacitor connection pin for LPPHPF
83
RFOUT
O
RF signal output pin.
84
NC
-
-
85
AIDENV/WBLDIF
O
ASENV binary output/Differential signal output pin for ADIP detection
86
CDRF
I
CD RF signal input pin.
87
RFA
I
DVD RF differential input pin 1.
88
RFB
I
DVD RF differential input pin 2.
89
CWBLBUF
I
Capacitor connection pin for WBLDIF. WBLDIF.
90
CWBL CWBLCM CMP P
I
Floa Floati ting ng Capa Capaci cito torr conn connec ecti tion on pin pin for for VGA VGA befo before re WBL WBL bina binary ry..
91
CRWAGC
I
AGC adjustment capacitor connection pin for +RW.
92
CRWC CRWCMP MP
I
Floa Floatting ing Capa Capaci cito torr conn connec ecttion ion pin pin for for VGA VGA bef before ore WBLD WBLDIF IF AGC. AGC.
93
CWBLVGA2 CWBLVGA2
I
Floating Capacitor connection pin for VGA before SRL.
94
CWAGC2
I
AGC adjustment capacitor connection pin 2 for WBL extraction.
95
CWAGC1
I
AGC adjustment capacitor connection pin 1 for WBL extraction.
Pin no.
Pin Name
Type
118
CTC1
I
Capacitor connection pin for TC HPF. HPF.
119
CBDOS
I
Capacitor connection pin for BDO detecting circuit LPF. LPF.
120
CBDOF
I
Capacitor connection pin for BDO detecting circuit Pick detection.
121
VCC3
PS
Power supply pin for APC/OPC/ASENV (5.0V).
122
VREF25
O
2.5V reference voltage output pin.
123
VPD
I
DVD front monitor signal input pin.
124
VREFPD
I
Front light system reference level input pin.
125
GND3
PS
Ground pin for APC/OPC/ASENV. APC/OPC/ASENV.
126
PO6
O
Ground CMOS output pin 6.
127
PO5
O
Ground CMOS output pin 5.
128
PO4
O
Ground CMOS output pin 4.
I : Input pin
O: Output pin
Function
I/O : I/O pin
PS : Power supply/Ground pin
N.C: Non Connection
2. LIC201 LIC201 (MN103SC7G) (MN103SC7G) : ENCODER, ENCODER, DECODER DECODER & DSP SINGAL PROCESSOR • Pin Assign signm ment
C R 1 D A B C P A D T 3 T T R M 3 3 1 2 1 G T G L 3 3 T T O 3 A 2 D H D A K N H E D U U D B T 1 D S 1 2 D P P S F R 1 3 T G I 3 2 1 5 D O O G F F A D S 0 0 D O O S I E T D S D O G P D D C E C S S V Q Q E E E D V V E E V P P V V R C F D S D D T I H H H E H S S S G H S A E E R R R C A A S S A C C A R V T O V V V B W W S S S F S L L L T C V 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 4 4 4 4 4 3 3 3 3 3 3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
AVSSDRC AIDENV REFMDLA AVDD_RX AVSS_RX AVSS_TX
1 2 3 4 5 6
AVDD_TX MSTPOL MASTER NRESET HDD7 HDD8 HDD6 HDD9 VSS VDD3 HDD5
7 8 9 10 11 12 13 14 15 16 17
MN103SC7G
108 107 10 7 106 105 10 5 104 103 10 3 102 101 10 1 100 10 0 99 98 97 96 95 94 93 92
NPK3MD PK3M PK 3MD D NPK2M NP K2MD D PK2M PK 2MD D NPKMD NP KMD PKMD PK MD NBSMD NB SMD BSMD BS MD VDD3 VD D3 P0 6 V DD DD 5 V DD DD 3 VDD1 VD D12 2 VDD1 VD D18 8 VS S LDDEN LD DENA A P0 2
•
Bloc Block k Dia Diagr gram am (SOD (SODC C : MN1 MN103 03SC SC7G 7G))
FEP
DVD Formatter
DRC CIRC
DVD/CD error correction
HOST
ATAPI I/F
DMA bus
LDD ANALOG
FEP
CD Write
ODC (ECC command)
e
DRAM I/F
eDRAM 16 Mbit
• Pin Table Pin
Pin Name
I/O
Connection Target
1
AVSSDRC AVSSDRC
GND
GND
DRC analog Vss
2
AIDENV
I
FEP
TE signal for DVD-RAM
Number
WBLDIF WBLDIF
Description
ADIP detector detector signal input
3
REFM REFMDL DLA A
O
Cap Cap
4
AVDD_RX AVDD_RX
Power supply
Power supply
5
AVSS_RX AVSS_RX
GND
GND
Analog ground
6
AVSS_TX
GND
GND
Analog ground
7
AVDD_TX
Power supply
Power supply
Analog power supply (3.3V)
-
MASTER pin polarity switch
-
Trace data 1
-
General-purpose I/O (GIO/PWM1)
MSTPOL 8
TRCDATA TRCDATA 1
I/O
P17 9
MASTER
I/O
P23
HOST -
Anal Analog og-t -too-di digi gita tall conv conver erte terr refe refere renc nce e volt voltag age e for for ADIP ADIP Analog power supply (3.3V)
ATAPI master/slave signal General-purpose I/O (GIO/TxD0/PWM0)
10
NRESET
I
HOST
ATAPI reset signal
11
HDD7
I/O
HOST
ATAPI data I/O
12
HDD8
I/O
HOST
ATAPI data I/O
Pin
Pin Name
I/O
Connection Target
36
INTR INTRQ Q
O
HOST HOST
ATAPI API Inte Interr rrup uptt requ reques estt to ATAPI API host host
37
NIOC NIOCS1 S16 6
I/O I/O
HOST HOST
ATAPI API host host bus bus widt width h sele select ct sign signal al
Number
P22
-
Description
General-purpose I/O (GIO)
38
DA1 DA1
I
HOST HOST
39
VDD3
Power supply
Power supply
40
VSS
GND
GND
41
NPDI NPDIAG AG
I/O I/O
HOST HOST
Diag Diagno nost stic ic sign signal al from from ATAPI API slav slave e to mast master er
42
DA0 DA0
I
HOST HOST
ATAPI API host host addr addres ess s sign signal al
43
DA2 DA2
I
HOST HOST
ATAPI API host host addr addres ess s sign signal al
44
NCS1 NCS1FX FX
I
HOST HOST
ATAPI API host host chip chip sele select ct sign signal al
45
NCS3 NCS3FX FX
I
HOST HOST
ATAPI API host host chip chip sele select ct sign signal al
46
NDASP
I/O
HOST
ATAPI host chip select signal
47
DRAMVDD12D Power supply DASPST
48
TRCDATA0 P16
I/O
Power supply
ATAPI API host host dadd daddre ress ss sign signal al inpu inputt I/O pad VDD (3.3V) Digital Vss
DRAM VDD (1.2V)
-
DASP setting
-
Trace data 0
-
General-purpose
I/O (GIO/PWM0)
Pin
Pin Name
I/O
Connection Target
64
CLUMPGT
O
FEP
65
FG
I
DRIVER
Number
Description RF AGC bias circuit clamp signal Spindle FG input
66
DRAMVDD3 Power supply
Power supply
DRAM VDD (3.3V)
67
DRAMVDD12D Power supply
Power supply
DRAM VDD (1.2V)
68
VHAL VHALF F
I/O I/O
FEP FEP
69
PWM0A WM0A
O
DRIV DRIVER ER
Focus ocus driv drive e dif differe ferent ntia iall PWM+ WM+ outp output ut,, focu focus s driv drive e BSDA out output. put.
70
PWM0B
I/O
DRIVER
Focus drive differential PWM- output
P10 71
PWM1 PWM1A A
O
DRIV DRIVER ER
Driv Drive e pin pin cent centra rall refe refere renc nce e volt voltag age e inpu inputt
General-purpose I/O (GIO/TxD0/SerialCLK0/PMW0) Focu Focus s 2 (til (tilt) t) driv drive e dif differe ferent ntia iall PWM+ PWM+ outp output ut,, focu focus s 2 driv drive e BSDA BSDA output.
72
PWM1B
I/O
DRIVER
P11 73
PWM2 PWM2A A
Focus 3 (tilt) drive differential PWM-output General-purpose I/O (GIO/RxD0/PWM1)
I/O I/O
DRIV DRIVER ER
Track rackin ing g driv drive e dif differe ferent ntia iall PWM+ PWM+ outp output ut,, trac tracki king ng driv drive e BSDA BSDA output
P27 PWM2B
General-purpose I/O (GIO/PWM0) DRIVER
Tracking drive differential PWM - output
Pin
Pin Name
I/O
Connection Target
91
VPPEX
Power supply
Power supply
92
P02
I/O
-
Number
NLDERR
Description Flash memory power supply Vpp General-purpose I/O (GI (GIO/RxD0 xD0/PWM0/external interrupt 0)
PU
Laser error detection signal LDD enable signal
93
LDDENA
O
PU
94
VSS
GND
GND
95
VDD18
Power supply
Power supply
Flash memory power supply Vpp
96
VDD12
Power supply
Power supply
Internal logic VDD (1.2V)
97
VDD3
Power supply
Power supply
I/O pad VDD (1.2V)
98
VDD5
Power supply
Power supply
DRAm DRAm VDD (5.0V)
99
P06
I/O
-
HFON
PU
Digital Vss
General-purpose I/O (GI (GIO/RxD0 xD0/PWM1/external interrupt 2) External high frequency module (HFM) ON/OFF
100
VDD3
Power supply
Power supply
I/O pad VDD (1.2V)
101
BSMD
O
PU
BIAS modulation signal differential current output
102
NBSMD
O
PU
NBIAS modulation signal differential current output
103
PKMD
O
PU
PEAK1 modulation signal differential current output
104
NPKMD
O
PU
NPEAK1 modulation signal differential current output
Pin
Pin Name
I/O
Connection Target
SH1 SH1
I/O I/O
FEP FEP
Number 117
Description Samp Sample le timi timing ng sign signal al for for ROPC ROPC spac space e dete detect ctio ion, n, APC APC spac space e detection, and read power detection
118
SH2 SH2
I/O I/O
FEP FEP
Samp Sample le timi timing ng sign signal al for for PCA PCA peak, peak, bot botto tom m det detec ecti tion on,, APC APC pea peak k detection, and mean valuer detection
119
SH3 SH3
I/O I/O
FEP FEP
Samp Sample le timi timing ng sign signal al for for PCA PCA mean mean valu value e dete detect ctio ion, n, APC APC spac space e detection, and read power detection, and erase detection
WIDGT 120 120
SH4 SH4
VFO punch out signal I/O I/O
P24
FEP FEP -
ROP ROPC mark ark dete detect ctio ion n samp samplling ing sign signal al General-purpose I/O (GIO/TxD1)
1 21
WTGT
O
FEP
Write gate
1 22
BDO
I
FEP
Dropout signal input
123
VDD3 VDD3
Power Power supply supply
Power Power supply supply
I/O I/O pad VDD (3.3V) (3.3V)
1 24
VSS
GND
GND
125
VDD12
Power supply
Power supply
1 26
OFTR
I
FEP
Off track signal input
1 27
TC
I
FEP
Track cros rossing sig signal input
Digital Vss Internal logic VDD (1.2V)
3. LIC301 (BD7776ARFS) : CD-ROM/DVD-ROM 7CH POWER DRIVER • Block Di Diagram P R T F L G
P R T R S T
L D I N
V c c
2 2
2 1
2 0
1 9
L D V M 1 8
C T L 2
C T L 1
L D O -
L D O +
A G N D
T L O -
T L O +
T K O -
T K O +
F C O -
F C O +
F C I N
T K I N
A V M
T L I N
D V c c
G N D
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1 0
9
8
7
6
5
4
3
2
1
STBY BRAKE CONTROL LEVEL SHIFT
LEVEL SHIFT
LEVEL SHIFT
LEVEL SHIFT
PROTECT
TSD CURRENT SENSE
FF
FF
CURRENT SENSE CURRENT SENSE
LRPM
OSC LOGIC PRE LOGIC
PRE LOGIC
BEMF DETECTER
BLOCK DIAGRAM t s o H
G 7 C S 3 0 1 N M C D O S
M A R D e M 6 1
U P C b 2 3
I N P O A C T S A Y S
C C R I N C E / C C D D O C C E
x 6 1 M A R T S T W x 6 1
O C V C C R R E N D E D E S
y r o m e M h s a l F t i b M 6 1
r v o 0 t a 2 . l u 1 / g v e 3 . R 3
l a i r e S
M A R
MEMO
CIRCUIT DIAGRAM
CIRCUIT VOLTAGE CHART PIN NO.
VOLTAGE
LIC101
PIN NO.
VOLTAGE
PIN NO.
VOLTAGE
PIN NO.
VOLTAGE
PIN NO.
VOLTAGE
PIN NO.
VOLTAGE
pulse pulse 0.00
106 107 108
1.76 1.73 4.97
30 31 32
pulse pulse pulse
83 84 85
3.3 3 pulse pulse
136 137 138
0.00 3.31 0.83
1 2
3.32 0.00
53 54 55
3
0.00
56
pulse
109
1.74
33
pulse
86
pulse
139
4 5 6
0.00 0.00 3.32
57 58 59
pulse 3.32 0.00
110 111 112
1.75 0.00 1.67
34 35 36
pulse pulse pulse
87 88 89
3.1 7 pulse 0.0 0
140 141 142
7 8
0.00 3.21
60 61
3.32 3.32
113 114
0.00 0.00
37 38
4.94 3.27
90 91
pulse 3.3 3
143 144
2.00 3.30
VOLTAGE
LIC601 1.GND 2.VOUT
0.00 1.20
2.27
3.VIN
3.30
1.76 1.26 2.00
1.GND 2.VOUT
0.00 3.30
3.VIN
4.95
LIC301
9
3.32
62
0.00
115
0.00
39
3.28
92
3.3 2
10
0.00
63
0.00
116
1.67
40
0.00
93
3.3 2
1
0.00
11 12 13
0.00 3.32 3.51
64 65 66
0.00 2.04 2.04
117 118 119
2.28 2.21 3.08
41 42 43
4.95 3.27 3.27
94 95 96
0.0 0 1.8 0 1.1 9
2 3 4
4.88 1.65 4.88
14
0.00
67
4.97
120
4.10
44
pulse
97
3.2 7
5
1.65
15 16 17
2.22 1.67 0.82
68 69 70
2.21 1.20 0.65
121 122 123
4.97 2.51 2.49
45 46 47
3.27 4.94 1.18
98 99 100
4.9 4 3.3 0 3.28
6 7 8
1.65 2.45 2.54
18 19
2.09 1.60
71 72
0.85 0.82
124 125
2.51 0.00
48 49
0.00 3.28
101 102
1.39 1.00
9 10
2.45 2.54
20 21
0.85 0.82
73 74
0.00 0.00
126 127
0.00 3.28
50 51
0.00 2.63
103 104
1.39 1.00
11 12
2.48 2.49
22 23 24
0.65 4.97 0.00
75 76 77
0.00 0.00 0.00
128
3.28
1
0.00
52 53 54
0.00 0.00 3.27
105 106 107
1.39 0.98 1.00
13 14 15
0.00 6.00 6.00
25
0.00
78
0.00
2
2.00
55
3.27
108
1.40
16
3.26
26 27 28
0.00 0.00 0.00
79 80 81
2.18 2.22 0.00
3 4 5
3.31 3.31 0.00
56 57 58
0.00 3.28 0.00
109 11 0 111
0.00 pulse 3.3 1
17 18 19
3.26 12.50 12.50
29
0.00
82
2.20
6
0.00
59
3.29
11 2
pulse
20
1.65
30 31
1.00 3.32
83 84
2.22 0.00
7 8
3.31 3.30
60 61
OSC OSC
11 3 11 4
pulse pulse
21 22
0.00 0.00
32 33
0.00 3.32
85 86
0.00 2.22
9 10
0.00 3.30
62 63
0.00 0.00
11 5 11 6
3.3 1 0.0 0
23 24
12.50 1.66
34 35
3.32 0.00
87 88
2.18 2.18
11 12
pulse pulse
64 65
0.00 pulse
11 7 11 8
0.0 0 0.0 0
25 26
1.70 1.71
36 37
0.00 0.00
89 90
0.00 2.23
13 14
pulse pulse
66 67
3.29 1.19
11 9 120
0.0 0 0.0 0
27 28
0.00 1.17
38 39
0.00 0.00
91 92
1.62 1.58
15 16
0.00 3.29
68 69
1.65 1.63
121 122
0.0 0 0.0 0
29 30
12.50 12.50
40 41
0.00 0.00
93 94
1.59 0.00
17 18
pulse pulse
70 71
1.64 1.64
123 124
3.2 8 0.0 0
31 32
12.50 12.50
42
0.00
95
0.00
19
pulse
72
0.00
125
1.1 9
33
0.00
43 44
0.00 0
96 97
4.97 0.00
20 21
pulse pulse
73 74
1.64 0.00
126 127
0.0 0 3.2 8
34 35
0.00 PULSE
LIC201
PIN NO.
45
4.97
98
0.00
22
pulse
75
1.66
128
2.2 1
36
PULSE
46 47
pulse pulse
99 100
0.00 0.00
23 24
pulse pulse
76 77
1.97 1.85
129 130
1.5 0 0.0 0
37 38
PULSE 1.12
48 49
pulse 3.31
101 102
1.80 1.78
25 26
3.28 0.00
78 79
0.00 3.29
131 132
0.0 0 0.0 0
39 40
1.76 PULSE
50
0.00
103
1.77
27
pulse
80
1.20
133
3.3 1
41
PULSE
51 52
pulse pulse
104 105
1.80 3.32
28 29
pulse pulse
81 82
3.33 3.33
134 135
1.6 0 2.0 8
42 43
PULSE PULSE
LIC701
PRINTED CIRCUIT BOARD DIAGRAMS 1. MAIN P.C.BOARD P.C.BOARD (TOP VIEW)
2. MAIN P.C.BOARD (BOTTOM VIEW)
