EECE 407 Micropr Microprocessor ocessor and Interfacing Level – 4/Term 4/Term – II II 30 June, 2013 – 01 01 December 2013 Course Teacher Shuvr Shu vro o Chowd Chowdhur hury y Lecturer Department of Electrical and Electronic Engineering Bangladesh University of Engineering and Technology Technology http://teacher.buet.ac.bd/schowdhury
About the Course 3 credits, 3 hours/week
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Scheduled class time Wednes Wednesday day at 8.00 A.M. – 10.5 10.50 0 A.M. A.M. Class duration is 3 hours.
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Course Outline Introduction to
microprocessors.
Intel
8086 microprocessor: Architecture, addressing modes, instruction sets, assembly language programming, system design and interrupt.
Interfacing: Programmable
peripheral interface, programmable timer, serial communication interface, programmable interrupt controller, direct memory access, keyboard and display interface.
Introduction
to micro-controllers.
Marks Distribution Category
Total marks
Attendance
Percentage (%)
30
10
Class test (best 3 will be counted)
4
20 × 3 = 60
20
Term final exam
1
210
70
300
100
Total
Grade Distribution Marks (%)
Grade Point
Letter Grade
80 - 100
4.00
A+
75 - 79
3.75
A
70 - 74
3.50
A-
65 - 69
3.25
B+
60 - 64
3.00
B
55 - 59
2.75
B-
50 - 54
2.50
C+
45 - 49
2.25
C
40 - 44
2.00
D
< 40
0.00
F
Reference Books Text Books: 1. Di gital Computer Electroni cs – Albert P. M alvino and Jerald A. Brown (3rd Edition) 2. Assembly L anguage Programming and Organi zation of the I BM PC – Ytha Yu and
Charles Marut 3. M icroprocessor and I nterf acin g Programming and Hardware – Douglas V. H all Ref er ence Books: 1.
M icroprocessors
and
M icrocomputer-Based
System
Design – Mohammed
Rafiquzzaman (2 nd edition) 2.
The I ntel M icroprocessors – Barry B. Brey (6th Edition)
3.
The 8051 M i crocontroll er and Embedded Systems – M. A. Mazidi, J. G. Mazidi, R.
D. McKinlay
For Further Contact Shuvro Chowdhury
Lecturer Department of Electrical and Electronic Engineering Bangladesh University of Engineering and Technology Dhaka-1000, Bangladesh. Room No.: 431 (Fourth Floor), ECE Building West Palashi, Dhaka, Bangladesh. Mobile: +880 1717 225412 E-mail:
[email protected],
[email protected]
Components of a Computer System
Basic Elements of a Computer System Memory
Arithmetic Logic Unit (ALU) Input Devices
Control Unit Central Processing Unit (CPU)
Output Devices
Three key concepts •
Von Neumann Machine
Data and instructions are stored in a single set of read‐write memory
Contents of memory are addressable by memory address, without regard to the type of data contained
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Execution occurs in a sequential fashion, unless explicitly altered, from one instruction to the other
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Computer System Components •
Memory Stores instructions and data •
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Input/Output Called peripherals Used to input and output instructions and data •
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Arithmetic and Logic Unit Performs arithmetic operations (addition, subtraction) Performs logical operations (AND, OR, XOR, ROTATE) •
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SHIFT,
Computer System Components •
Control Unit Coordinates the operation of the computer •
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System Interconnection and Interaction Bus — A group of lines used to transfer bits between the microprocessor and other components of the computer system. Bus is used to communicate between parts of the computer. There is only one transmitter at a time and only the addressed device can respond. •
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Types •
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Address Data Control signals
Microprocessor A silicon chip that contains a CPU. In the world of personal computers, the terms microprocessor and CPU are used interchangeably. At the heart of all personal computers and most workstations sits a microprocessor. Microprocessors also control the logic of almost all digital devices, from clock radios to fuelinjection systems for automobiles.
Microprocessor • • • • • •
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is a semiconductor device consisting of electronic logic circuits manufactured by using various fabrication schemes capable of performing computing functions capable of transporting data/information is a programmable device the programmer selects instruction from the list and determines the sequence of execution for a given task. can be divided into 3 segments: Arithmetic and Logic Unit Register Unit Control Unit • • •
Differentiating Characters of Microprocessors •
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Instruction set: The set of instructions that the microprocessor can execute. Bandwidth : The number of bits processed in a single instruction. Clock speed : Given in megahertz (GHz), the clock speed determines how many instructions per second the processor can execute.
Control Unit •
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CPU Components
Generates control signals which are necessary for execution of an instruction. Connect registers to the bus. Controls the data flow between CPU and peripherals (including memory). Provides status, control & timing signals required for the operation of memory and I/O devices to the system. Acts as a brain of computer system All actions of the control unit are associated with the decoding and executions of instructions (fetch and execute cycles).
Registers
CPU Components
Hold data, instructions, or other items
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Various sizes
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Program counter and memory address registers must be of same size/width as address bus
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Registers which hold data must be of same size/width as memory words
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Arithmetic Logic Unit
CPU Components
Executes arithmetic and logical operations.
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Accumulator is a register associated with ALU.
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Source of one of the operands of an arithmetic or logical operation.
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serves as one input to ALU.
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Final result of an arithmetic or logical operation is placed in accumulator.
Functions
Arithmetic and Logic Unit
ALU performs the following arithmetic & logical operations: •
Addition
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Subtraction
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Logical AND
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Logical OR
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Logical EXCLUSIVE OR
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Complement(logical NOT)
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Increment (add 1)
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Decrement (subtract 1)
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Left shift, Rotate Left, Rotate right
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Clear etc.
Simple As Possible Computer Version 1 (SAP - 1 )
Introduction
SAP – 1
Designed for the beginners.
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Main purpose is to introduce all the crucial ideas behind computer operation avoiding too much details.
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There are three generations of SAP. SAP-1 is the first stage towards the evolution of modern computers. We shall try to cover SAP-1 and SAP-2 if time permits
SAP – 1
Architecture CLR CLK CP EP
CLK LM
Program Counter Input and MAR 4 4
8 8
4
LA
Accumulator
CLK EA
8 4 8
Adder/ Subtractor
SU
B Register
LB
EU
CE
16 x 8 RAM
8 8
CLR CLK LI EI
Instruction Register
4
8
Controller/ Sequencer
Output Register 8 Binary Display
12 CON = CPEPLMCELIEILAEASUEULBLO
CLK
8
4 CLK CLR CLK CLR
8
W BUS
LO CLK
Architecture •
SAP – 1
Bus or ganized architecture.
All register outputs to the W-bus are three state which allows orderly transfer of data.
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All other register outputs are two-state .
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Program Counter •
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SAP – 1 Architecture
A part of control unit. 4-bit up counter, counts from 0000 to 1111. The program for the computer is stored at the beginning of the memory with the first instruction at binary address 0000. Its job is to send to the memory address of the next instruction to be fetched and executed. Program counter is reset to 0000 before each computer run. At the beginning it sends address 0000 to memory. Then the counter is incremented to 0001. When the first instruction is fetched and executed, it sends address 0001. And the process continues.
Input ad MAR
SAP – 1 Architecture
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Contains address and data switch registers.
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Address and data switch registers are part of input unit.
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These registers allow programmer to send 4 bit address and 8 bit data bits to RAM.
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MAR (Memory Address Register) is a part of memory unit.
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During a computer the addresses of program counter are latched into it.
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These latched addresses are fed to RAM when a read operation is performed.
RAM (Random Access Memory)
SAP – 1 Architecture
Part of memory unit.
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16 byte static TTL RAM.
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Can be programmed by means of address and data switches.
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Receives address from MAR and places the stored content of on the W bus.
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Instruction Register
SAP – 1 Architecture
Part of control unit. To fetch an instruction from the memory the computer does a memory read operation. This places the contents of the addressed memory location on to W bus. At the same time the IR is set up for load on the next positive clock edge. The contents of IR are divided into two nibbles. The upper nibble is two state and goes to controller/sequence. The lower nibble is three state output that is read onto the W bus when needed.
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Controller/Sequencer
SAP – 1 Architecture
Brain of the control unit.
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Before each computer run, C/S sends clear signal to reset program counter and IR.
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Sends clock signal to all buffer registers to synchronize the operation of the computer.
The output of C/S is a 12 bit word known as Control Word (CON) contains signals those controls the rest of the computer.
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These 12 bit signal constitutes what is called control bus .
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Thank you all for your patience.
