LAPTOP POWER Sequence
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Laptop Voltage requirement
Supply requirement on motherboard ADOPTER INPUT VOLT VOLT 18V
Vin
Batary Charging Voltage 10.8v
CPU 1V or 0.8v,1.05v(30amp) 0.8v,1.05v(30amp) MCH 1.05v or 1.5v,1.8v 1.5v,1.8v ICH 1.05 or 1.5v,1.8,3.3v 1.5v,1.8,3.3v,5v ,5v DDR 2 1.8v,3.3v,0.9v SIO(KBC) 3.3v Clock chip 3.3v BIOS 3.3v Network chip 3.3v Audio chip 3.3v Audio amp 5v Temp. sensor 3.3v Card reader 3.3v LCD supply 3.3v Hard disk 5.0v DVD writer 5.0v USB 5.0
Laptop Voltage requirement
Supply requirement on motherboard ADOPTER INPUT VOLT VOLT 18V
Vin
Batary Charging Voltage 10.8v
CPU 1V or 0.8v,1.05v(30amp) 0.8v,1.05v(30amp) MCH 1.05v or 1.5v,1.8v 1.5v,1.8v ICH 1.05 or 1.5v,1.8,3.3v 1.5v,1.8,3.3v,5v ,5v DDR 2 1.8v,3.3v,0.9v SIO(KBC) 3.3v Clock chip 3.3v BIOS 3.3v Network chip 3.3v Audio chip 3.3v Audio amp 5v Temp. sensor 3.3v Card reader 3.3v LCD supply 3.3v Hard disk 5.0v DVD writer 5.0v USB 5.0
Volt In section
18volt adopter or battery supply
DCBAT B++
BEFORE POWER ON
LED INVERTER
STEP DOWN 1 3.3VSUS 3.3VOLT
5VOLT
Always voltage
RUN VOLTAGE STEP DOWN 2
GFX CORE VOLT
1.8V 1.5V 1.05v
1 TO 1.2VOLT APPROX
CPU CORE VOLT
5VSUS
1VOLT APPROX 30AMP
Laptop power sequence HDD
Always voltage
5v
MOSFET
DVDW
Step Down 1
ICH
3.3v BATT
BIOS
230volt input
AC Adopter
AMP USB
SIO
N I T L O V
5v suspend voltage
MOSFET
Suspend volt
1.05v
NETWORK
LCD VDD
AC97 AUDIOCON
3.3volt suspend voltage
ICH
MCH
Step Down 2 1.8v 0.9v
CPU CORE volt (VRM)
DDR2
vcccore
CPU inverter
CORE i3 Laptop power sequence HDD
Always voltage
5v
MOSFET
DVDW
Step Down 1
5v suspend voltage
3.3v BATT
AMP USB
SIO
BIOS
230volt input
AC Adopter
N I T L O V
MOSFET
Suspend volt
1.8V
NETWORK
LCD VDD
AC97 AUDIOCON
3.3volt suspend voltage 1.05v
PCH
Step Down 2 1.5v 0.75v
DDR3 CPU Core
CPU CORE volt (VRM)
CPU
GFX Core volt
LED BACKLIGHT
Above 100 ohm
Vin voltage
CPU Core supply
Battery Charging
Above 100 ohm
GFX core Above 100 ohm
3.3volt
1.5volt Above 100 ohm
1.05volt Above 15 ohm
5volt
Above 100 ohm
1.8volt
LAPTOP CHIPS VOLTAGES CPU VCORE (1V Aprox 30Amp current)
2.5V (VDD) 1.25V (VTT )
DDR 1
3.3V
LAN
3.3V (SPD)
1.05VCCP
5V
HDD
3.3V
Vtt CPU 1.8V (VDD) 0.9V (VTT DDR) 1.05VCCP or 1.5v 1.8V 3.3V
MCH North bridge
DDR 2
BIOS 3.3V
FAN 5V
3.3V (SPD) 1.5V (VDD) 0.75V (VTT )
5V
5V
USB
DDR 3
AUDIO 3.3V
3.3V (SPD) 1.35V (VDD) 0.65V (VTT )
RTC 1.05VCCP 3.3V 5V
ICH South bridge
3.3V
DDR 3L
CARD READER
3.3V
THERMAL
3.3V (SPD) V IN 3.3V
LCD/ LED
3.3V
CLOCK
5V
DVD
CORE i3,i5,i7 3.3V
GFXCORE1.1V
3.3V
SIO (KBC)
1.8V 1.5 V
GPU GFX CHIP
VCORE GFXCORE
1.05VCCP 1.5V
1.05V
Core i3 CPU
1.8V RTC 1.5V
PCH
CORE I CPU 1 st Generation CPUCORE
1.5volt
GFXCORE
1.05volt
CORE I CPU 2 nd & 3rd Generation CPUCORE GFXCORE
1.5volt 1.05volt
CORE I CPU 4th & 5th Generation CPUCORE
1.35volt
GFXCORE 3.3volt
1.05volt
MOSFET Drain N-Channel Gate Source Drain P-Channel Gate Source 1,2 D1
D1
G1
1
8
G1 S1,D2 S1
D2
3
G2
2 S2
S1,D2
5 6 G2 7
S2
Pulse Width Modulator 18 volt
5v DC
Switching AC voltage Smooth DC voltage
18 volt DC
5 volt DC
A
18volt
B
PWM
A B
5volt Pulse-width modulation control works by switching the power supplied on and off very rapidly. The DC voltage is converted to a square-wave signal.
Sample pulse width modulator +ve
enable Output DC PWM Power good
-ve
feedback
Components in power unit capacitor coil
Mosfet
Diode
Adopter Input 230volt AC
Chip manufacturer
Batary Charging
Adapter
v
Battery
18 volt DC
10.8volt DC
Volt in output
VIN B++
ISL MAXIM TI RICHTEK
Voltage input and battery charging section
Adopter Dc input
18V DC
1
CURRENT SENSE RESISTER
2
MOSFET
VIN(DCBATB++) Output
5
MOSFET
MOSFET
Ac ok
CSSP
CSSN
Dc Power for chip
MOSFET
AC in CELLS
ACPRESENT(AC OK)
CHGLED
SIO AC IN
V in power
SMD
3
M W P MOSFET
4 10.8vDC T I
Bat drv
SM BUS SMC
Batt BATLOW SMDATA SMCLOCK
Battery
SM BUS TEMP
PCH www.shriraminfotech.net
U C R I C L O R T N O C
S L L E C N O I I L
Voltage input and battery charging section VIN(DCBATB++) Output
Adopter Dc input
18V DC
1
2
MOSFET
5
MOSFET
MOSFET
Ac ok
CSSP
CSSN
Dc Power for chip
MOSFET
3
Battery
AC in CELLS
ACPRESENT(AC OK)
CHGLED
SIO AC IN
V in power
SMD
MOSFET
4 10.8vDC T I
Bat drv
SM BUS SMC
Batt BATLOW SMDATA SMCLOCK
SM BUS TEMP
PCH www.shriraminfotech.net
U C R I C L O R T N O C
S L L E C N O I I L
Adopter Dc input
1
18V DC
2
MOSFET
Not powering on battery
VIN(DCBATB++) Output
5
MOSFET
MOSFET
Ac ok
CSSP
Batt. drv
CSSN
Dc Power for chip
Not working on adopter
MOSFET
3
Battery
AC in
ACPRESENT(AC OK)
CHGLED
SIO
V in power
SMD
MOSFET
4 10.8vDC T I
U C R I C L O R T N O C
Bat drv
SMC
Batt BATLOW
SMDATA
SMBUS
SMCLOCK
TEMP
ICH
Battery not detecting Communication between sio & battery
Battery not charging
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S L L E C N O I I L
adopter
battery
Some sample chip
Up to C2D CPU
1
3volt VCC
(cpu) 32.7KHZ
BIOS
VR_ON
PWR_ON ( main_on, Run on)
SIO
KBC_PWRBTN
3 6
2
T S R M S R
N T B R W P _ M P
4
3 S _ P L S _ b M s P u s
5
4 S _ P L S _ c M s P u s
SUSp_ON
3 VOLT VCC RSMRST
PWRBTN
ICH
PM_PWRBTN SLP_S3 SLP_S4
POWER ON BUTTON SEQ.
(B
STEP 2 TURN ON SLP_S4
SIO
CPU CORE ON RSMRST
POWER BUTTON
ADOPTAR PRESENT
POWER BUTTON TO PCH SUSPEND ON
3volt VCC
32.7KHZ
1
Pin No 8
EC BIOS
VR_ON
2
7
PWR_ON
(cpu) (Bridge, Ram supply)
Main on(sys on)
KBC_PWRBTN
SIO T S R M S R
4
3 N T B R W P _ M P
5
3 S _ P L S _ b M s P u s
6
SUSP_ON
4 S _ P L S _ c M s P u s
PCH
POWER ON BUTTON SEQ.
Core i3 power sequence S W
S W
1
R304
Y1 C345
R491 R490 R503
EC SIO
R105
PCH
ITE-8518 9 SUS_ON RUN_ON 10 EC_PWROK HWPG
VR_ON 12
11
1 13 3
Step down 1 voltage(always voltage) V+ vin
18 v LD05 (VREG5)
LD03(VREG3) 3v Linear regulator
5v Linear regulator
18v
18v
Vcc 5V
MOSFET
UG
vcc
UG
MOSFET
3VALW
3volt MOSFET
BIOS
LG
3 On
SIO
PG signal
Enable
3.3v Osc PWM
5v Osc PWM
5 on
LG
MOSFET
5VALW
Step down 1 voltage(always voltage) V+ vin
18 v
3volt
LD05 (VREG5)
LD03(VREG3) 3v Linear regulator
5v Linear regulator
SIO
18v
Vcc 5V
p s u s
MOSFET
UG
MOSFET
MOSFET
LG
3 On
PG signal
UG
MOSFET
5VALW
3VALW
3VS
vcc
p s u s
3.3v Osc PWM
5v Osc PWM
5 on
5VS MOSFET
LG
MOSFET
V IN V OLTAG E
Li nea r out pu t
Step down 1 voltage(always voltage) V+ in
LD03
3v Out
5v Out
LD05
Vcc
vcc
3VALW
5VALW
5v Osc PWM
3 On
3v Osc PWM
5 on
PG signal
Enable
r e l l o r t n o c o r c i M
Step down 2 1.8V & 1.05v voltage V+ in
SIO
ENABLE
Power Good
1.05v osc
1.8 VOLT OR 1.5 VOLT 0R 1.05V0LT
RAM VTT Voltage 1.8V OR 1.5V
VTT Enable
0.9V or 0.75
CPU Core voltage 5Volt V IN 1v 30Amp
VR_ON
PWM
SIO VRM PWRGD
CPU VRM
VCORE
CPU CPU
V IN V IN
PWM
CLK ENABLE
VID signal
1
Vin voltage
5volt VCC 2 3 From SIO
1 v to 1.5v
VR_ON
6 Clock enable
VRM Core v
To SIO
6
5 4
VRM power good
Core i3 CPU U P C m o r f l a n g i s D I V
GFX Core
GND
Power Block Diagram 230v AC CPU Core volt
0.8v or 1v VCORE
Adopter
Battery
17 18 1
0.9v
Volt In S U B M S
Step down 2
E L B A N E _ G H C
VR_ON
(SIO) l
a t s y r c z h k 7 . 2 3
12
16
SYS_ON
13
SUSP
11
4
G P
PG signal
6
3VL
5
5VALWS
3 RSMRST
9
PWRBTN
PWRBTN
10 3 volt
3.3VALWS
Step down 1
VRMPWRGD
3v supply
5vSUS
MOSFET
SLP_S5
Enab K sig O
KBC
3.3vSUS
MOSFET
e l b a n E
14
1.05v
15
2
On\off switch 8
1.8v
SLP3,SLP4,
7
ICH
Power Block Diagram
SUS_PWRGD
MAIN_PWRGD GFX_PWRGD
230v AC CPU Core volt
Battery
0.8v or 1v VCORE 18
Adopter
1
15
GFX
Volt In S U B M S
1.8v Step down 2
E L B A N E _ G H C
N I C A
15
2 VR_ON
HWPG
SIO l
e l b a n E
Enab KBCsig
a t s y r c z h k 7 . 2 3
11
14
19
10 Step down 1
VRMPWRGD
SLP_S5
4
PG signal
9
7
5
5VALWS
RSMRST 8
PM_PWRBTN
PWRBTN
3 volt
3.3VALWS
3
3v supply
On\off switch
5vSUS
MOSFET
12 SYS_on(Runon) SUSP
13
3.3vSUS
MOSFET
17
GFX_ON
16
1.05v 0.9v
SLP3,SLP4,
6
ICH
battery Li-ion
3.6V
3.6v
4500 Times charge/discharge
3.6v
3.6v
2Amp 2Amp 3.6v
3.6v
3.6v
10.8volt 4amp
Battery connector
1
2 3456
Pin
Signal
Description
Type
1
GND
Ground
2
Temp
Temperature monitor
I
3
Clock
SM Bus
I/O
4
Data
SM Bus
I/O
5
NC
No Connection
6
BAT_S
Positive voltage
power
In side the battery clock
SM Bus Interface
data
Temp sense
Dis-charging
+ve
Battery Sense & control
-ve charging
Battery connector Li-ion cell
Laptop Power ALWAYS ON
SUS_POWER
5V_AUX ICH
POWER ON
VRON
5V ICH FAN USB HDD DVDW AUDIO
AC ADOPTER V IN
3.3V_AUX
ICH
BATTARY
3.3V ICH BIOS CLOCK LAN LCD THERMAL HDD
DDR2
1.8V 3.3V_ALWS
0.9V MICOM DDR2 VTT 5V_ALWS
1.05V ICH MCH
CPU CORE
S4 / S5
S3
S0
POWER RAIL INPUT SUPPPLY
VIN
BATT 0r ADOPT
B+
Linear output
3VL
pwm always voltage out
5VALW/3VALW
RSMRST from kcb to ich
RSMRST
user press on button
ON/OFF
pwrbtn signal to ich
PWRBTN
ich to SIO
SLP_S5
ich to SIO
SLP_S4
SIO to power
SYSON 1.8V
ich to SIO
SLP_S3
kbc to power
SUSP 5VS/3VS/1.05VS
kbc to power
VR_ON CPU_CORE
VRM Chip to KBC
VRMPWRGD
KBC TO ICH
CLPWROK) M_PWROK
Clock reset
CL_RST
Clock power good
CL_PWRGD
KBC TO MCH
PM_PWROK
ICH TO CPU
H_PWRGOOD
ich to mch
PLT_RST (PCI_RST)
mch to cpu
RESET
On/off SW
18v adopter Input
10.8 Battary Input
ON/OFF SW
POWER ON AND RESET SEQUENCE
8 SLP4
10
SLP3
20
CPU
9
SIO
16
22
SYS_ON (MAIN ON) 13 RST CKT
CORE_V
23 CPU_PWRGD
17
D G R W P _ K C
M_PWRGD
25
ECPWORK
21
KBC_RST
19
RSMRST
7
15
HWPG
1
Clock
PM_PWRBTN
ACIN
V In
Clock start
t e s e R U P C
D G R W P _ U P C
PLTRST
3 S W L A _ 3 D 3 _ C B K
BIOS 5 S _ P L S
2 4 Step down 1 5
VRMPWRGD
S U S O N
6
D G R W P
MCH
(VGATE)
North Bridge RSTIN
CL_RST
11 24
6
12
3.3v_ALWS
PLTRST
3.3V_SUSP
CL_RST
5V_ALWS
CLK_PWRGD
5v_SUSP
SLP4/ 5
PWROK
1.8v
Step Down 2
SLP3
To DDR 0.9v
14
1.05V
7
15
RSMRST PWROK 3.3V
VR_ON
1.05V
CPU Core
17 CPU_CORE VRMPWRGD
18
VRMPWRGD
ICH South Bridge
23
WIFI Card Test Point
CLJ 33MHZ 11
16 SM BUS 30,32
22 PLTRST
CPU RESET R322
CPU
SIO R313
R605
ECPWROK
PCH
ADOPTER
Battery
ALWS PWRGD
CLOCK
MAIN PWRGD HWPG
SUS PWRGD
18
PWRBTN ACIN
Step down 1
1
13 3
Slp _S5
EC BIOS
21
20
D G R W P M A R D
SUSB, SLP_S3
5V
SUSC, SLP_S4
4
N O S U S
MOSFET
19
ECPWORK
2
3.3VAL
T S R T L 22 P
D G R W P U P C
PM_PWRBTN RSMRST
8 7
PCH
6
3.3V MOSFET
Step Down 2
5
5V
9 10
MAINON 1.05V(PCH, CPU) 1.5V(DDR3) 1.8V
GFX CORE
11
GFX ON
12
GFXCORE V
14
VR_ON
CPU Core
CPUCORE V
15
D G R W P _ R V
16
BIOS CS
17
CLOCK CHIP
23
ADOPTER Battery
ALWS PWRGD MAIN PWRGD
CLOCK HWPG
SUS PWRGD
PWRBTN ACIN
Step down 1
1
13 3
SLP _S5
19
ECPWORK
2
3.3VAL
SUSB, SLP_S3
SUSC, SLP_S4
5V
4
N O S U S
MOSFET
RSMRST
9
6
3.3V
5
MOSFET
Step Down 2
PM_PWRBTN
8 7
MAINON 1.05V(PCH, CPU)
10
1.5V(DDR3)
GFX ON GFX CORE
11 12
14
16
GFXCORE V VR_ON CPUCORE V
CPU Core
15
17
21 20
22 PCH
from
COMPAL 4TH GEN. CPU POWER ON SEQ. ACIN +3VLP
EC_ON 3VALW 5VALW SPOK
1VALW 1.8VALW
ON\OFF BTN
SIO
RSMRST PBTN_OUT
Adopter present 3volt linear SIO turn on 3.3volt 5volt Always voltage power good to SIO 1volt 1.8volt
POWER BTN Resume & Reset siganl Power button out from SIO to PCH
CPU
SLP_S4
Power on s4 state from PCH to SIO
CPU
SLP_S3
Power on s4 state from PCH to SIO
SYSON 1.35V
System on signal from SIO 1.35 volt
DDR_PWROK VR_ON
Core volt turn on
+SOC_VCC +SOC_VNN VGATE SUSP#
Suspend voltage enable
+1.0VS +1.05VS +1.35VS
+1.5VS +1.8VS
+3VS +5VS KBRST# PMC_CORE_PWROK DDR_CORE_PWROK PLTRST#
DDR POWER OK
Platform Reset
