Circuit Diagram iR3245/3235/3230/3225 Series
IMPORTANT This documentation is published by Canon Inc., Japan, to serve as a source of reference for work in the field. Specifications and other information contained herein may vary slightly from actual machine values or those found in advertising and other printed matter. Any questions regarding the information contained herein should be directed to the Copier Service Department of the Sales Company. This documentation is intended for all sales areas, and may contain information not applicable to certain areas. Reproduction without permission not allowed. Use of this manual should be strictly supervised to avoid disclosure of confidential information.
COPYRI GHT
2001 CANON INC .
Printed in Japan
Caution Use of this manual should be strictly supervised to avoid disclosure of confidential information.
Contents
Controller................................................................................................................................................ 1 Reader Controller PCB.......................................................................................................................... 1 2 Reader unit........................................................................................................................................... 11 LED Driver PCB .................................................................................................................................. 11 1
Reader Controller PCB (2/8) iR3225 / iR3225N / iR3235 / iR3235N / iR3245 / iR3245N
R76
AHSYNC
+3.3V
R56
5 8 P C
1
2
1
2
1
2
BIN7
1
8
BIN6
2
7
BIN5
3
6
R54
BIN9 2
R53
BIN8
1
CP603
2
1
1
check
J2
50 J2
BIN4
4
+12V
10
CP576
check
1
check
1
5
check
1
3 1 9 8 7 6 1 8 8 8 8 P P P P P C C C C C
CP108 CP107
RA12
+3.3V
CP577
check
1
0 5 2 P C
J50P+LOCK2P
J50P+LOCK2P
1
k c e h c
1 1
R57
FFC_WATCH
k c e h c
k c e h c
k c e h c
k c e h c
4 8 0 2 2 C C
k c e h c
1 1 1 1 1
J2
CP115
check
2
R77
k c e h c
1
1
+3.3V
J50P+LOCK2P
2
11
R147
1
4
16
1
2 check
1
2
check
2 +3.3V
2
12 J2
check
1
J50P+LOCK2P
C26
1
C126
1
R146 IC1 1
CP529
1
18
BIN3
1
8
BIN2
2
7
BIN1
3
6
BIN0
4
5
CP106
1
2
1 check
CP581
R140
1
check
1
1 4
1 3
1 2
1 1
R D 5
R D 6
R E 0
R E 1
R E 2
1 0 R E 3
1
2
check
13 J2
check
1
2
CP574
1
1
9
V C C 1
8
R E 4
7
R E 5
6
R E 6
5
R / F
4
O E
3
P D
2
T E S T
1
0 3 C
G N D 1
CP575
1
C13
17 RD4
PVCC
64
C29
RA14
18 RD3
PGND
63
19 RD2
RE+
62
CP235
20 RD1
RE-
61
CP237
21 RD0
RD+
60
CP239
22 RC6
RD-
59
CP238
LGND
58
23 VCC2
49 J2
1
GIN9
1
8
CP112
GIN8
2
7
CP104
GIN7
3
6
CP103
GIN6
4
5
CP102
1
24 RC5
RCLK+
57
CP241
1
25 RC4
RCLK-
56
CP240
1
26 RC3
RC+
55
CP243
1
27 RC2
RC-
54
CP242
1
28 RC1
LVCC
53
CP249
1
29 RC0
RB+
52
CP245
IC14
R148 IC1 14
check
1
CP101
CP580
R141
1 check
+3.3V
CP114
14 J2
check
2
1
1
1
2
1
1
GIN5
IC1
1
CP525
R130 1
CP532
1
2
8
12
CP579
R142
1
check
1
1
2
check
15 J2
check
1
2
1
8
GIN4
2
7
GIN3
3
6
GIN2
4
5
J50P+LOCK2P
RB-
51
CP244
31 CLKOUT
RA+
50
CP247
1
32 RB6
RA-
49
CP246
check
CP109
R149
46 J2
2
J50P+LOCK2P
45 J2 44 J2
1
J50P+LOCK2P
R48
1
1
43 J2
2
J50P+LOCK2P
42 J2
1
R49
1
1
2 J50P+LOCK2P
41 J2
1
J50P+LOCK2P
40 J2
1
J50P+LOCK2P
R50
1
1
2
39
check
R51
1
1
J50P+LOCK2P
2
37 J2
check J50P+LOCK2P
R B 5
R B 4
3 3
3 4
R B 3
V C C 3
R B 2
3 5
3 6
3 7
R B 1
R B 0
3 8
3 9
R A 6
4 0
R A 5
4 1
R A 4
4 2
R A 3
4 3
G N D 4
4 4
R A 2
4 5
R A 1
4 6
R A 0
4 7
36 J2
V C C 4
J50P+LOCK2P
+3.3V
4 8
35 J2
L5 1
J50P+LOCK2P
34 J2
2
J50P+LOCK2P
CP110
1
C125
2
33 J2
2
check
J50P+LOCK2P
1 3 C
1
1
32 J2
2 3 C
J50P+LOCK2P
31 J2 J50P+LOCK2P
30 J2
2
R171
2
2
1
1
2
2
J50P+LOCK2P
29 J2
IC1
1
CP533
SH_R
11
9
CP566
R143
1
1
1
2
check
9 1
2
1
1
J50P+LOCK2P
28 J2
16 J2
check
J50P+LOCK2P
27 J2
J50P+LOCK2P
6 7 0 2 1 1 1 1 1 1 2 C C 1 7 6 5 4 3
C127 1 1 1
1
k c e h c
17
k c e h c
k c e h c
k c e h c
0 9 8 0 9 9 1 P P P C C C
J2
J50P+LOCK2P
k c e h c
k c e h c
k c e h c
k c e h c
5 5 2 0 C 2 C 2 1 0
J50P+LOCK2P
26 J2
1 1 1
k c e h c
k c e h c
1 9 9 9 9 9 1 P P P P P P C C C C C C
k c e h c
k c e h c
9 9 9 P P P C C C
+24S
+3.3A 8
7
6
8
5
7
6
5
8
7
6
5
FU7 +3.3V
IC1 17
IC1 3
15
9 1
IC1 5
13
7
9 1
+3.3V
IC1
9 1
2
10
C1
VCC GND
1
1 1 A R
IC18 2
14 7
C38
1
2
14
VCC
7
GND
1 2 3 4
1 2 3 4
+3.3V
IC15 20
VCC GND
J2
38 J2
1 check
1
+3.3V
1
J50P+LOCK2P
RA13
1BOX_CCD_LOAD
R47
1
check
CP116
2
check
2
47 J2 J50P+LOCK2P
check
30 GND3 1
L17
CP610
R55
MCLK
J50P+LOCK2P
check
check
J50P+LOCK2P
C124
48 J2
2
check
check
1
2
1
1
check
check
CP531 6
J50P+LOCK2P
R52
1
check
check
1
1
check
check
2
CP524
3 3 C
J50P+LOCK2P
check
2
1
check
2
1
1
check
1
+3.3V
R202
2
check
check
C117
1
1BOX_CCD_SCLK
2
check
check
J50P+LOCK2P
2
1
1 2
J50P+LOCK2P check
CP105
1
CP527 2
1 5
1 check
RA15
2
R97
1 6 G N D 2
L3
CP248
R78
1
CP582
R99
1
check
1BOX_CCD_DATA_IN
1
CP236 CP530
1
2
2
1
2
L2 1
CP528
R98
1BOX_CCD_DATA_OUT
2 +3.3V
J2
J50P+LOCK2P
IC1
1
1
1 2 3 4
0 1 A R
9 A R
2
18
19
2 J2 J50P+LOCK2P
J2
3 J2
J50P+LOCK2P
20
C40
J2
J50P+LOCK2P
J50P+LOCK2P
J2
+24U
J50P+LOCK2P
1 0 9 8 N N N N I I I I G G R R
1
7 6 5 4 N N N N I I I I R R R R
3 2 1 0 N N N N I I I I R R R R
21
4 J2
J2
J50P+LOCK2P
J50P+LOCK2P
5 J2
+5V
J50P+LOCK2P
22 J2
LED_BAR_1
J50P+LOCK2P
6 J2 J50P+LOCK2P
23 J2
J50P+LOCK2P
24 J2
2
R73
SHARK_RST
25 J2 J50P+LOCK2P
+3.3V
C41 1
J50P+LOCK2P
1
(SHARK;80p)
P3_ONLY_RST
LOCK1
LOCK
LOCK2
IC7
2
R63
CP596 1
1 CD
VDD
5
VOUT
4
1
check
2 VSS
4 6 C
2
3 MR
IC15
1
12
CP251
13
1
check
CP252
1 3
1
2
CP257
R60
6
1
IC18
CP256
1
2
5
6
check
P3_PLLRST (P3_PLLDIVRSTX;209p)
IC18
CP254
5
1 check
IC18
4
check
P3_PLLDIVRST (P3_PLLRSTX;208p)
1
IC15
IC15 CP267 11
check
1
CP255
k c e h c
1
9
1
IC18
CP258
R61
8
CP259
1
2
check
11
check
10
R58
2
2 6 R
2
C36
2
R67
1
12
1 check
2
2
R68
1 1
1
C34
1
1
1
WDTOVF
check
EMLE_RST
IC18 1
CP264
1
2
IC15
IC18
CP263
R59
1
check
2
CP265
1
3
4
1
check
check
2
2
C35
CP266
9 8
1
10
check
2
R74
2
R71
R72 1
1
1
1
F-1-2
CP271
R4 1
1
2 check
2
R69
1
CP272
13
R200 1
CP262 1
2
P3_RST
check
(P3_RSTX;90p) 2
2
DDIS_SPO1
CP260
1 check
check
CPU_RST
R70 1
LED_BAR_2
8 J2 J50P+LOCK2P
9 J2 J50P+LOCK2P
LOCK J50P+LOCK2P
3 1 5 2 P C
J2
J50P+LOCK2P
(SHARK;119p)
2
+3.3V
7 J2
J50P+LOCK2P
+3.3V
J2
Reader Controller PCB (3/8) iR3225 / iR3225N / iR3235 / iR3235N / iR3245 / iR3245N
9 8 7 6 N N N N I I I I G G G G _ _ _ _ 3 3 3 3 P P P P
5 4 3 2 1 0 9 8 N N N N N N N N I I I I I I I I G G G G G G R R _ _ _ _ _ _ _ _ 3 3 3 3 3 3 3 3 P P P P P P P P
7 6 5 4 3 2 1 0 N N N N N N N N I I I I I I I I R R R R R R R R _ _ _ _ _ _ _ _ 3 3 3 3 3 3 3 3 P P P P P P P P
7 8 9 0 9 9 9 0 4 4 4 5 P P P P C C C C
4 3 2 1 8 7 6 5 0 0 0 0 0 0 0 0 5 5 5 5 5 5 5 5 P P P P P P P P C C C C C C C C
2 1 0 9 6 5 4 3 1 1 1 0 1 1 1 1 5 5 5 5 5 5 5 5 P P P P P P P P C C C C C C C C
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
1 1 1 1
6 1 A R
8
7
6
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
1 1 1 1 1 1 1 1
1 2 3 4
7
6
5 8
7
6
5 R
2 3 4 1 2 3 4
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
1 1 1 1 1 1 1 1
8 1 A
7 8 1 A R 1
5
8
9 1 A R
7
6
5 8
7
6
5
1 2 3 4 1 2 3 4
0 2 A R
CP517
R210 1
1
2
R137 1
P3_ONLY_RST
2
check
7 4 8 9 2 4 2 2 1 1 1 1 P P P P C C C C
+1.8V
L6 1
2 4 C
2
k c e h c
8 1 5 1 P C
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
1 1 1 1 1 1 1 1 1
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
2
1 0 5 5 1 1 P P C C
k c e h c
k c e h c
1 1 1 1 1 1 1
C211
1 DBUS[15:0]
k c e h c
DBUS15
1 1
k c e h c
1
CP485
k c e h c
9 0 1 2 3 7 8 3 4 4 4 4 4 4 1 1 1 1 1 1 1 P P P P P P P C C C C C C C
DBUS14 DBUS13
4 5 C
5 5 C
6 5 C
3 4 C
7 5 C
2
2
2
2
2
2
1
1
1
1
1
1
L7 2
k c e h c
1 1 1 1
2
+3.3V
1
k c e h c
0 1 2 3 4 5 6 7 8 3 3 3 3 3 3 3 3 3 1 1 1 1 1 1 1 1 1 P P P P P P P P P C C C C C C C C C
1
8 5 C
check
9 5 C
2 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 4 4 4 4 4 3 3 3 3 3 3 3 3 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1
5 6 ] ] S E 8 7 S D [ [ V D G G O V A A O T T A A D D O O
C45 2
RA21
CP146
1
] 6 [ G A T A D O
] 2 6 ] ] 5 1 I 4 3 [ S D [ [ G S D G G A V V A A T T T A A A D D D O O O
] 2 [ G A T A D O
] 1 [ G A T A D O
] 0 [ G A T A D O
] 9 [ R A T A D O
] 8 [ R A T A D O
] 7 [ R A T A D O
] 1 4 ] ] 6 1 E 5 4 [ S D [ [ R S D R R A V V A A T T T A A A D D D O O O
] 3 [ R A T A D O
] 2 [ R A T A D O
] 1 [ R A T A D O
] 0 [ R A T A D O
CP486
1
1
CP117
8
check
P3_BIN1
CP487
108
DBUS12
CD[11]
107
DBUS11
CD[10]
106
DBUS10
CD[9]
105
DBUS9
5 ODATAB[2]
CD[8]
104
DBUS8
6 ODATAB[3]
CD[7]
103
DBUS7
1
3 ODATAB[0]
1
4 ODATAB[1]
1 1 1
7 ODATAB[4]
1
8 ODATAB[5]
CD[6]
101
DBUS6
9 VSS1
CD[5]
100
DBUS5
check
1
2
CP122
7
check
P3_BIN2
CP488
P3_BIN3
CP489
4 ] ] ] 5 E 5 4 3 I D 1 1 1 D D [ [ [ D V D D D V O C C C
2 ODATAG[9]
check
P3_BIN0
T 5 0 L 1 4 S E 1 E I S R D S S N S 3 D S K O V P V V L M O / O C 3 / I 2 N I O N M O M
CD[12]
1 VDDI1
1
check
1
3
6
CP121
1
4
5
CP120
check
check
check
check
CP119
RA22
VSS9
102
check
CP118 check
P3_BIN4
CP493
1
1
8
1
2
7
1
3
6
C50
check
P3_BIN5
CP492
P3_BIN6
CP491
10 OVDDE1
CD[4]
99
1
11 O D A T A B [ 6 ]
CD[3]
98
1
12 O D A T A B [ 7 ]
CD[2]
97
1
13 O D A T A B [ 8 ]
OVSS3
96
1
14 O D A T A B [ 9 ]
1
15 S H S Y N C X
1
16 B C T X 1
1
17 B C T X 2
2
check
CP126
check
P3_BIN7
CP490
1
4
CP125
5
check
P3_BIN8
CP496
1
CP495
1 check
SH_R
CP494
DBUS4 DBUS3 DBUS2
check
check
P3_BIN9
1
check
1
R136 R135 R217
1
CP124
2
C53
check
1
CP123
2
OVDDE3
95
1
2
check
1
CP145
2
check
CD[1]
94
CD[0]
93
DBUS1 +3.3V
check
CP519
DBUS0
R88
check
CP520
IC6
check
C46
2
1
+1.8V
CP571
2
R30
REFA
1
92
VSS8
91
CP540
1
19 VSS2
VDDE3
90
1
2
1
2
C52
20 PLLVSS
CA[9]
89
ABUS10
1
21 PLLVDD
CA[8]
88
ABUS9
1
22 REFA
CA[7]
87
ABUS8
23 OVDDE2
CA[6]
86
ABUS7
24 O V S S 1
CA[5]
85
ABUS6
25 PLLDIVRSTX
CA[4]
84
ABUS5
L8 1
XTST
check
18 V D D E 1
check
CP273
2
check
2 0 6 1 C
52 6 1 C
C47 +3.3V
R145 1
CP568
2
1
2
1
check
P3_CCDHSYNC
CP567
26 P L L T E S T M O D E
CA[3]
83
1
27 EXHSYNCX
CA[2]
82
1
28 B C R X 1
VSS7
81
1
29 B C R X 2
RSTX
80
ABUS4 ABUS3
check
R134 R226
1
CP569
2
check
1
CP570
2
SHARK_RST
check
CP521
ABUS2
30 VSS3
CA[1]
79
1
31 BCSCLK
CA[0]
78
1
32 I D A T A B [ 9 ]
CSX
77
1
33 I D A T A B [ 8 ]
RDX
76
RD
1
34 I D A T A B [ 7 ]
LWRX
75
LWR
1
35 I D A T A B [ 6 ]
HWRX
74
HWR
1
] ] ] ] ] ] ] 36 I D A T A B [ 5 ]
ABUS1
check
BIN9
CP541
BIN8
CP542
BIN7
CP543
CP523
ch eck
1
SHARK_CS
ch eck
check
check
BIN6
CP544 check
BIN5
CP545
4 3 [ [ B B 2 A A I T T D A A D D D V I I
check
2 1
C12
2 [ B A T A D I
1 [ B A T A D I
0 [ B A T A D I
9 [ G A T A D I
8 [ G A T 4 K A S L D S C I V C
] ] 7 6 [ [ G G 2 A A S T T S A A V D D O I I
] 5 [ G A T A D I
] 4 [ G A T A D I
] 3 [ G A T A D I
] 2 [ G A 2 T E 5 A D S D D S I V V
] 1 [ G A T A D I
] 0 [ G A T A D I
] 9 [ R A T A D I
] 8 [ R A T A D I
] 7 [ R A T A D I
] 6 [ R A T A D I
] 5 [ R A T A D I
] 4 [ R A T A D I
] 3 [ R K A 3 L T I 6 C A D S U D D S P I V V C
] 2 [ R A T A D I
] 1 [ R A T A D I
] 0 [ X R C L A N E T Y S A S K D H L I C C
7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 3 3 4 4 4 4 4 4 4 4 4 4 5 5 5 5 5 5 5 5 5 5 6 6 6 6 6 6 6 6 6 6 7 7 7
1
1
1
2
C 4 8
2
2
1 1 1 1 1 1 1 k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
1 k c e h c
1 1 1 1 1 1 k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
6 7 8 1 0 9 2 4 4 4 5 5 4 5 5 5 5 5 5 5 5 P P P P P P P C C C C C C C
9 5 5 P C
7 6 5 4 8 3 5 5 5 5 5 5 5 5 5 5 5 5 P P P P P P C C C C C C
4 3 2 1 0 9 8 N N N N N N N I I I I I I I B B B B B G G
K L C M
7 6 5 4 3 2 N N N N N N I I I I I I G G G G G G
F-1-3
C 4 4
1 1 1 1 1 1 1 1 1 k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
5 4 3 2 1 6 7 9 8 7 7 7 7 7 7 7 7 7 4 4 4 4 4 4 4 4 4 P P P P P P P P P C C C C C C C C C
1 0 9 8 7 6 5 4 3 N N N N N N N N N I I I I I I I I I G G R R R R R R R
C 4 9
1 1 1 1 1 1 k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
k c e h c
3 2 1 0 4 2 8 8 8 8 8 2 4 4 4 4 4 5 P P P P P P C C C C C C K C L N C 2 1 0 Y U N N N S P I I I H C R R R A
VDDI4
73
1
2
1 5 C
2 1
C212
ABUS[10:1]
Reader Controller PCB (5/8) iR3225 / iR3225N / iR3235 / iR3235N / iR3245 / iR3245N
J1 51
+3.3V
J51P
+3.3V
+3.3V 2
CP414
R107
1
J1
CP583
R108
1
1
2
check
2
4 2 R
50
check
J51P
2
1
1
CP415
1
Q16
3
check
2
DDIS_SPRDY (CPU_46p,P32)
1
Q15
3
2
2
1
2
1
3
NF
k c e
16 EN
RIN1- 1
1
15 ROUT1
RIN1+ 2
1
14 ROUT2
RIN2+ 3
1
1
13 VCC
RIN2- 4
R105
DDIS_SRTS (CPU_45p,P31)
2
CP391
1
R127
1
DDIS_SCPRDY (CPU_51p,P37)
1
1
CP412
R125
1
RIN3- 5
11 ROUT3
RIN3+ 6
10 ROUT4
RIN4+ 7
1
2
Q6
check
2
2
C129
3
Q19
1
CP411
3
CP413
1
1
2
check
19J1 J51P
2
R116
1
2
2
1
1 4
18J1
J51P
17J1
R101
R IN 4 - 8
J51P
16J1
CP399
1
check
5
J51P
2
CP398
1
15J1
1
check
J51P
14J1
1 C
J51P
49
check
1
J51P
CP401 check
2
13J1
(SSCNST+) J51P
R100
1 3 2 1 C 1
2
J1
CP584
R115
1
check
1
6 4 1 C
1
2
1
9 E NB
C128
2
1
J51P
check
2
R109
20J1
R111
CP394 check
12 GND
21J1
J51P
+3.3V 2
1
CP397
1
check
+3.3V
22J1 J51P
2
CP395 check
check
CP392
J51P
CP396 check
1 check
1
23J1
R104
h c
CP393
1
IC21
0 1 0 4 P C
2
1
R120
DDIS_SPO1
NF4
9 1 2 R
2
R106
DDIS_SCMD (CPU_90p,RxD4)
1
8 1 2 R
+3.3V
1
1
1
2
CP402
12J1
(SSCNST-)
check
J1
CP585
R103
1
1
J51P
11J1
48 J51P
check
J51P
1
CP404
10J1
(SPBD-)
check
2
J51P
R102
NF3
+3.3V 1
1
CP403
3
5 5 1 3 P C
k c e h c
2
2
1
1
5 6 1 C
F N
1
+3.3V
1
NF
8 J1 J51P
7 J1
3
J51P
2
6 6 1 C 1
1 VCC1
TXIN4 56
1
1
2 TXIN5
TXIN3 55
1
1
3 TXIN6
TXIN2 54
1
1
4 TXIN7
GND 53
CP349
SVDO_B3
check
SVDO_B2
CP341
2
2
2
SVDO_B1
CP343
1
1
1
SVDO_B0
CP342
check
1 6 1 C
CP350 CP351
5 GND1
SVDO_G7
CP344
TXIN1 52
1
1
6 TXIN8
TXIN0 51
1
check
SVDO_G6
CP346
SVDO_G5
CP345
CP354
1
7 TXIN9
TXIN27 50
1
CP353
1
1
1
8 TXIN10
TXOUT0- 48
1
1
10 TXIN11
TXOUT0+ 47
1
1
11 TXIN12
SVDO_G2
CP339
SVDO_G1
CP335
SVDO_G0
CP337
TXOUT1- 46
1
CP352
SVDO_R7
CP336
1
12 TXIN13
TXOUT1+ 45
1
L24
CP360 check
13 GND2
LVDSGND2 43
15 TXIN15
TXOUT2- 42
1
1
16 TXIN16
TXOUT2+ 41
1
SVDO_R5
CP334
SVDO_R4
CP333
17 VCC3
TXCLKOUT- 40
1
1
18 TXIN17
TXCLKOUT+ 39
1
1
19 TXIN18
TXOUT3- 38
1
1
20 TXIN19
TXOUT3+ 37
1
CP366 check
L22
CP368
CP331 CP330
SVDO_R1
CP329
L21
CP370 check
CP369 check
21 GND3
SVDO_R2
2
4
3
1
2
1
J51P
CP362
1
22 TXIN20
1
23 TXIN21
PLLVCC 34
1
24 TXIN22
PLLGND1 33
1
2 3
1
2
1
J51P
CP375
P3_SVSYNC
CP348
1
TXIN26 30
28 TXIN25
37J1
CP376
J51P
2
2
2
1
1
1
1
3 6 1 C
CP379
GND4 29
0 5 1 C
+3.3V
k c e h c
33J1
2
R247 R124 1
J51P
2
CP590 1
2
2 6 1 C
R122 R123 1
9
1
CP407
8 10
check
32J1
+3.3V
2
IC13
1
MD2
J51P
CP378
BOOT_ON
2
3 9 5 P C 1
+3.3V
36J1
34J1 J51P
check
1 5 1 C
1
J51P
CP377 check
CP371
check
1
R235
38J1
check
1
1
39J1
J51P
CP372 check
1
R174
40J1
check
1
2
41J1
35J1
check
2
+3.3V
42J1
J51P
1
TXCLKIN 31
27 TXIN24
1
J51P
check
CP347
1
45J1
43J1
CP373 check
1
3
4
PWRDWN 32
26 VCC4
1
Q7 2
1
3
Q17 1
CP406
2
1
CP405
3
check
C135
1
1
1
3 J1
1
check
2
check
2
J51P
R121
C136
1
2 J1
1 J51P
2
NF2 NF
2
2
1
1
4 4 1 C
R168
MD1
1
2
CP591 1
12
CP595 1
11
check
13
check
2
J51P
1
IC13
1
3 4 1 C
1 J1
R176 R245
3
2
C133
1
P3_SVCLK
+3.3V +3.3V
SPI_1
IC13 2
14
R41
+3.3V
IC13
NF6 MD0
2
7 1 R 1
R118 2
1
1
0 2 2 R
1
2
NF
2
1
CP388
3
C134
IC17
0 1 9 3 P C
k c e h c
1 EN
DOUT1- 16
1
2 DIN1
DOUT1+ 15
1
CP382
check
1
CP381
check
3 DIN2
DOUT2+ 14
1
2
3
1
2
1
31J1
CP386 check
1
J51P
CP385 check
CP389
1
1
CP380
29J1 J51P
L27
4 VCC
DOUT2- 13
5 GND
DOUT3- 12
4
3
6 DIN3
DOUT3+ 11
1
2
7 DIN4
DOUT4+ 10
8 ENB
DOUT4- 9
check
0 7 1 C
2
2
30J1
J51P
CP383
check
1
1
28J1
CP387 check
1
J51P
CP384 check
27J1
J51P
26J1 J51P
25J1
(SPRTST-) J51P
1
1
9 6 1 C
2
2
R236
L26 4
check
R119
2
1
check
check
(CPU_89p,TxD)
CP592
R40
24J1
(SPRTST+) J51P
F-1-5
1 1
4 6
CP594 1
check
5
2
VCC
1
+3.3V
DDIS_SCTS
2
1
+3.3V +3.3V
1
(CPU_47p,P33)
CP416
R117
check
2
+3.3V
3 5 1 C
2
DDIS_SSTS
J51P
C132
J51P
check
1
check
P3_SHSYNC
R114
4 J1
1
2
check
2
44J1
CP374
PLLGND2 35
25 TXIN23
1 check
2
J51P
CP361 check
1
check
1
CP560
R113
1
check
1
check
1
2
1
check
CP328
CP408
3
1
J51P
CP364
check
SVDO_R0
1
Q18
2
1 2
CP409
3
46J1
CP363 check
1
LVDSGND1 36
check
2 5 1 C
Q8 2
C130
1
check
1
3
4
CP365 check
check
SVDO_R3
3
1
4
check
check
1
2
J51P
check
9 5 1 C
4
L23
CP367
check
2
1
2
check
J51P
14 TXIN14
1
check
2
1
(CPU_49p,P35)
LVDSVCC 44
1 check
CP332
1
1
CP410
R126
DDIS_SLIVEWAKE
8 4 1 C
47J1
CP357 CP356 check
check
SVDO_R6
R112
J51P
check
1
R110
SPI_0
L25
CP358 check
check
2
7 4 1 C
LVDSGND3 49
check
6 5 1 C
1
1
+3.3V 2
SVDO_B7
check
2
2
1
+3.3V
check
1
9 VCC2
CP340
1
2
1
SVDO_B6
check
CP338
SVDO_G3
7 5 1 C
6 J1
1 4 1 C
J51P
check
check
SVDO_G4 2
8 5 1 C
1
check
2
2
2
9 4 1 C
SVDO_B5
check
check
2
4 5 1 C
1
J51P
SVDO_B4
check
check
5 5 1 C
2
2 4 1 C
CP359 check
0 6 1 C
2
5 J1
IC4
4 6 1 C
J51P
NF1
2
9 J1
(SPBD+)
check
GND
7
1
C123
Reader Controller PCB (6/8) iR3225 / iR3225N / iR3235 / iR3235N / iR3245 / iR3245N
J6
1
(24V)
C24
J2P
+12V 2
J6
2
1 +3.3V 2
R138 R81
1
+24V
4
FU1
(24V)
1
1
2
J4P
3
CP418
R139 1
24V_WATCH
2
R80
2
2
L13
CP433
1
R66 2
1
check
1
check
1 CE
VIN
5
EXT/
4
1
4 3 4 P C 1
check
2 VSS
1
3 FB
CP431
1
4 D Z 2
k c e h c
1
check
R79 2
check
C172
1
J5 3
C3
1
R248
1
2
2 1
1
D3
C37 2
1
(PGND)
J4P
+3.3V 2
RGV12
+12V
1
J5 2
(12V)
L18 1
FU5 2
1
1
1
2
2
CP420
3
CP419
R128 1
13V_WATCH (CPU_110p,PA0)
2
check
Q21
check
1
CP538 2
2
1
J4P
R129
1
ZD2
C175
check
1 2
2
C173
1
C4
1
CP270 J5 1
1 check
(LGND)
J4P
IC16 ETH1 1
6
ETH2 1
E
2
E
G N D 2
+3.3V
CP613
2
1
+1.8V
1 D N G
C N
T U O
1 2 3
4
5
N I
check
N E
CP539 1 check
C182 C181
2
2 1
D2
1 1
C5 +12V 2
1
1
1
R64
1 3 1 R
2
R65
2
+3.3A
Q22 L4
CP422
1
2
R25 1
1
2
check
1
CP423
6 2 4 P 1 C
IC2
1
k c e h c
CP526 1 CE
VIN
2
R29
2 VSS
CP424
CP428
1
3 FB
EXT/
k c e h
L12
c
CP609
1
1
1
5
check
C8
2 3
check
3
2
2
1
1
1
1
1
2
2
+3.3V
CP421
check
Q9
4
1
check
check
5 2 4 P 1 C
1
3 D Z 2
k c e h c
2
C6
1
2 1
9 C
2
R28
2
R43
2
R132
1 2 1
1
1
1
D1
C2 2 k c e h c
CP607
1
IC13 1BOX-CCD_POWER_ON
CP608
1 3
WDTOVF
2
2
1
3
Q14
check
1 2
R42 1
F-1-6
CP432
L14
5 3 4 P 1 C
1
2
3
2
k c e h c
CP615
CP430
2
1
2
2
C39
1
+5V
CP429
check
1
1
IC3
1
1
2
C174
check
4 0 2 R
2
(CPU_111p,PA1)
Q20 1
2
1
check
2
CP417
check
CP537 2
1
ZD1 1
J5
1
1
Q11
(PGND)
J2P
2
2 7 7 1 1 C
2
7 C 1
2 1
C10
2 1
1 1 C
Reader Controller PCB (7/8) iR3225 / iR3225N / iR3235 / iR3235N / iR3245 / iR3245N
+5V
R213 1
CP437 1
R212 1
2
1
CP438 1
2
check
Q24
3 check
2 2 SIZE_ON
3
(CPU_86p,P16)
Q27
+3.3V
1 2
J9
R164
1
OPT_M_EN
J7P
1
SIZE0
CP440
R158 1
1
2
J9
R166 1
2
(CPU_37p,P23)
2
2
check
(CPU_79p,P14)
J7P
J9
+3.3V
C188
3
1
2
OPT_M_CLK (CPU_43p,TIOCA0)
J7P
J9
R163
4 J7P
1
SIZE1
CP441
R159 1
1
2
J9
R160 1
5
2
check
(CPU_80p,P15) 2
OPT_M_CW/CCW (CPU_41p,P27)
+5V
J7P
2
+24V
R244
J9
C187
6
1
2
1
J7P
2
J9
IC8
7
4 U F
J7P
CP587 1
CR
36
2 DMODE2
CLK
35
ENABLE
34
OUT/B
33
+5V
3 DMODE3 4 CW/CCW
2 2
J11
R224
1 J7P
1
1
CP572 1
2
J11
R223 1
2
2
check
2
CP449 1
OPT_M_VREF (CPU_107p,DA0)
1
C198
R170 1
1
2
5 VDD
CP268
2
check
3
IC12
C199
4
2
1
R172
R251
1
h c
2 1
1
R173 1
CP446
2
1
31
NC6
30
8 NC2
OUTB
29
9 RSB
PGND2
28
2
C196
1
10 RSA
PGND1
27
J8 (B)
11 NC3
OUTA
26
NC5
25
MDT2
24
(A)
12 NC4
SIZE3
1
1
2
1
J8
MDT1
23
1 15 CCPA
OUT/A
22
1 16 CCPB
14 STANDBY
TORQUE2
21
CP447
J11
17 CCPC
TORQUE1
20
18 M0
PROTECT
19
CP451
J11
2
7 J7P
2 3 9 1 1 C
2 1
4 1 C
42 9 1 1 C
1
1 check
5 9 1 C
2 2 9 1 1 C
CP586
+3.3V
1 check
1
+5V
J10 1
2 J9P
8
J10
2
R167
2 J9P
R216 1
2
R201 1
2
1
CP442
R154 1
1
2
1
3
2
2
J9P
C186
R162
1
+3.3V
1
J10 4
2
R211
R205
1
1
2
2
R207
R237
1
1
2
2
J9P
J10
2
R151
5
R206
R238
1
1
2
2
J9P
1
CVR_OPEN_S0
CP443
R153 1
1
2
J10
R156 1
6
2
check
(CPU_100p,P52) 2
J9P
C185
R161 +3.3V
1
2
R150
1
J10 7
2
R240 1
2
R144 1
2
J9P
J10 8
R241
R243
1
1
2
2
J9P
1
CVR_OPEN_S1
CP444
R152 1
1
2
2
C184
J10
R155 1
check
(CPU_102p,P53)
R242
R239
1
1
2
2
9
2
6
IC12
7 5
J10
R157
check
J9P
R231
R232
1
1
2
2
1
R228
R233
1
1
2
2
R227
R234
1
1
2
F-1-7
2
1 J4P
check
1
R165
(/A)
check
CP450
6
+3.3V
2
J8
J7P
C122
J7P
CCD_HP_S (CPU_104p,IRQ4)
(/B) J4P
5
2
check
2
13 VM
J11
R229
3 J4P
4 J7P
1
CP573
R225
4
J8
check
J11
R230
32
7 NC1
J4P
CP445
2
J7P
2
RESET DATAMODE
6 VREF
37 FINGND1 FINGND2 38
3
1
k c e
check
J11
+3.3V
1 check
J7P
C121
6 1 0 6 P C
8
+3.3V
R222
1 check
1
check
SIZE2
9 6 1 R 1
CP448 1 DMODE1
2 4 1
C197
2 9 8 1 1 C
2 0 9 1 1 C
12 9 1 1 C
Reader Controller PCB (8/8) iR3225 / iR3225N / iR3235 / iR3235N / iR3245 / iR3245N
+24V
J4 1 J13P
J4 J3 1
2
(GND)
J13P
RGV12
J14P
J4 3
+3.3V
J3 2
J13P
(12V)
J4
2 J14P
R178
4 J13P
1
J3 3
CP452
R189
(ADF_DATA_IN)
1
1
2
J14P
2
J3 4
R193 1
+24S
ADF_DATA_IN (CPU_73p,RxD2)
2
check
C202
J4 5
1
(ADF_DATA_OUT)
R192 1
2
J13P
CP459 1
J14P
Q5
+24U
IC20
2
check
CP453 3
1
R194 1
2
CP454 1
check
1
2
1
check
ADF_DATA_OUT (CPU_72p,TxD2)
J4
R188 1
6
2 J13P
J3 5
(ADF_SCLK)
R190 1
2
1
J14P
CP455 3
1
R191 1
2
CP456 1
4
3
check
ADF_SCLK (CPU_74p,SCK2)
8 J13P
CP598 1
IC20
2
check
J4
LED_BAR_2
2
1
Q1
CP460 3
1
R196 1
2
CP461 1
check
1 7
2
CP458
J14P
J3
1
R187 1
(ADF_LOAD)
R195
check
1
6
7 J13P
IC20
2
check
Q4
J3
J4
LED_BAR_1
CP457
6
5
1
J4
R82 1
9
2
check
ADF_LOAD (CPU_75p,P13)
check
J13P
2
LED1_ON
3
Q25
R180
1
2
(GND)
J14P
CP269
J3
1
8
J4
R83 1
10
2
check J14P
J13P
2
LED2_ON
3
Q28
+3.3V
1 2
R175 1
J3 9
CP462
R177
(REG_SENSOR)
1
1
2
J14P
R197 1
2
CP463
REG_SENS (P3_199p,RMAESENS)
1
check
check
CP599 1
J4
R26 1
C201
1
1
2
J13P
2
CP597
R8
LED_PWM
1
11
2
check
2 +3.3V
Q23
3 check
1
R7
2 1
R181
2
1
J3 10
CP464
R179
(READ_SENSOR)
1
1
2
J14P
CP611
R198 1
1
RD_SENS (P3_198p,RDSENS)
2
check
J3 11
J4
R16 1
12
2
check
J13P
2
FAN_ON 2
3
Q26
C200
1
1
(GND)
J14P
+3.3V 2
R203 J3 12
(ADF_MOTOR_CLK1)
R185 1
2
CP469 1
J14P
Q3
CP467 3
1
(ADF_MOTOR_CLK2)
J14P
R182 1
2
8
9
ADF_M_CLK1 (CPU_48p,TIOCA1)
check
IC20 1
R184 1
check
2
CP466 1
10
11
ADF_M_CLK2 (CPU_50p,TIOCA2)
check
R183 1
CP616
R249
1
1
2
J14P
+3.3V
IC20 VCC GND
14 7
2 1
C203
IC20 13
F-1-8
12
1
J4 13
2 J13P
2 1
CP468 3
2
check
2
2
check
(GND)
1
1
1 14
2
R250 1
CP470
Q2 J3
1
CP465
R186 1
J3
R199
check
1
13
FAN_LOCK
IC20
2
check
C137
2 Reader unit LED Driver PCB LED Driver PCB iR3225 / iR3225N / iR3235 / iR3235N / iR3245 / iR3245N
+24V
J801 13 J13P
J801 12 J13P
2
2
C801
1
C810
1
J801 11 J13P
J801 10 J13P
1 0 1 8 P C
J801
L801
9
1
CP807
2
J13P
1
2
2
C805 1
2
1
CP805
C804
2 0 8 L 1
D801
CP806
2
GND2
9
1
1 SW
VIN
8
1
2 BOOT
VCC
7
check
check
3 DIM
RON
DIM
C802
CS
5
IC802 J801
L803
8
1
CP815
2
J13P
1
1
1
2
4 0 8 L 1
CP803
4 1 0 8 P C
k c e h c
2
check
CP808
R802 1
D802
2
C809
3 2 0 8 1 C
2
1
1
1
CP814
2
CP813
C808
GND2
9
1
1 SW
VIN
8
1
2 BOOT
VCC
7
1
3 DIM
RON
6
check
check
4 GND1
DIM
CS
R811 1
2
J801 6
J13P
J13P
J801
R803
5
1
4
2
J13P
R812 1
2
2
R808 1
1 k c e h c
J801
R804
3
1 J13P
1
2
CP819
1
CP818
Q801
3
check
2
DIM
1 k c e h c
CP817
2
R809 J801
1
N.C.
2 J13P
J801 N.C.
1 J13P
F-2-1
R807 1
J13P
+24V
2
1
CP810 1 1 check
2
5
CP811
2 1 1 8 P C
k c e h c
check
CP816
7
J801
2
check
check
R806 1
J801
5 0 8 R
k c e h c
1
check
R810 1
2
CP802
6
check
4 GND1
1
1
check
1
9 0 1 8 P C
2
1 0 8 R
k c e h c
IC801
2
7 2 0 8 1 C
2 1
C806
Jul 3 2008
