EXPERIENCIA N°3 AMPLIFICADOR DIFERENCIAL
I.
OBJETIVOS
II.
Experimentar las propiedades del amplificador diferencial.
MARCO TEÓRICO
El amplificador diferencial es un amplificador versátil que sirve como etapa de Entrada para la mayoría de amplificadores operacionales. El esquema del circuito indica que tiene dos entradas y tres salidas, este circuito es utilizado para amplificar la diferencia de voltaje entre dos señales de entrada.
Como el amplificador diferencial se utiliza comúnmente para amplificar la diferencia entre dos señales de entrada, es adecuado expresar las entradas como sigue: *Tensión de entrada de modo diferencial:
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= −
*Tensión de entrada en modo común: =
+ 2
Finalmente se obtiene: = + = −
2 2
1. Encontrar los puntos de reposo reposo de los amplificadores que se muestran en las figuras 3.1 y 3.2. Para el primer circuito:
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Para el amplificador diferencial es apropiado partir del análisis del punto Q suponiendo que la entrada en modo diferencial es cero. Esto se obtiene haciendo que las dos entradas sean iguales, entonces tenemos va=v1=v2, gracias a la simetría del circuito, podemos separar los emisores, intercalando una resistencia 2Re en cada rama de emisor. Aplicando la segunda ley de Kirchhoff al circuito original, la tensión de emisor no cambia.
Circuito equivalente para cualquiera de los transistores Q1 y Q2. Para el transistor Q1. = + + 250 + 2 ∗ 4.7 12 = 1 + 0.7 + (250 + 9.4) )
Pero: = 12 = 1 + 0.7 0.7 + (965 (9650) 0)10 100 0 11.3 = (965000 (965000 + 1000) 1000) = 11.698
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= + + 250 + 2 ∗ 4.7 − 12 = 1 1 ∗ 1.16 1.169 9 + + 250 250 ∗ 1.18 1.181 1 + 2 ∗ 4.7 4.7 ∗ 1.18 1.181 1 − 12 24 = 1.1 1.16 69 + + 11.3 11.397 97 = 11.434
Por lo tanto, al ser los mismos transistores presentaran el mismo punto Q. * Para el segundo circuito.
*Su circuito equivalente es:
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Nos concentraremos en la fuente de corriente:
Haciendo divisor de tension: = −
+
= −
4.7 (4.7 + 9.5)
= + − =
+ −
12 = −3.972
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Aproximando ≈ = 0.823
Como = 0.823 y = 2 = 0.823 Entonces: = 0.412 = 0.412
= 1 − 12 = 0.839 0.839 ∗ 1 − 12 = −11.161
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11.161
Para el transistor Q1. *LVK en la entrada, considerando la ≈ 0 + 270 ∗ + 4.7 ∗ − = 0 + 270 ∗ + 4.7 .7 ∗ 2 − = 0 =
− 270 + 2 ∗ 4700
=
11.1 11.161 61 − 0.7 0.7 270 + 2 ∗ 4700
= 1.081
Entonces la =7.78uA *LVK en la malla de la salida. 12 − (−11.161) −11.161) = 1k ∗ + + (220 + 50) ∗ + 4700 ∗ = 23.16 23.161 1 − (220 + 50 + 1 + 2 ∗ 4700) ∗ = 23.1 23.161 61 − (220 + 50 + 1 + 2 ∗ 4700) ∗ 1.081 1.081
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Vemos que en modo común se utiliza a una sola fuente para las dos entradas que reciben una corriente base de la misma magnitud. Hallamos el voltaje de salida del circuito es (colector y tierra): V 0 Ib1 7.5k También hallamos el voltaje de entrada entre la base y tierra: Vi Ib1 r e Ib1 0.27k 2 Ib1 4.7k Por lo tanto, hallaremos la ganancia en modo común del amplificador diferencial del experimento: Ib1 7.5k AC
Ib1 r e
(0.27k 9.4k )
Ib1
AC
0.773
También hallaremos el análisis de la impedancia de entrada (teniendo en cuenta cómo ve el circuito con respecto a la corriente de base):
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Y también vemos que por la simetría del circuito solo se analiza uno de las partes, entonces la impedancia de entrada es: //( r e 0.27k 2 4.7k ) Z i 1k //( Z i
0.99k
La impedancia de salida del circuito es: Z 0
b)
RC 1
7.5k
Ω
Haciendo el análisis en modo diferencial del circuito:
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El equivalente del circuito en c.a. es haciendo las fuentes de voltaje continúo igual a cero y los capacitares iguales a corto circuito, y también vemos que el voltaje de salida es igual en las dos salidas, pero desfasadas en 180°: Vemos que en modo común se utiliza dos fuentes de corriente desfasadas 180° pero para el análisis usaremos solo una fuente para la base 1 y la base se pone a tierra, por lo tanto, la ganancia a modo diferencial la ganancia de una fuente se le suma la ganancia de la otra fuente (superposición). También hallamos el voltaje de entrada entre la base y tierra: Vi Ib1 r e Ib1 0.27k 2 Ib1 (4.7k // 0.27k 0.9(1 ) r e ) Hallamos el voltaje de salida del circuito es (colector y tierra): V 0
Ie2
k
7.5
Hallaremos el voltaje de salida en función de las corrientes de entrada, entonces la corriente Ie2 es igual a: Ib1 4.7k I e 2 22.41k 0.9 (1 ) 4.7k 0.27k 1000 Ib1 4.7k 22.41k
V 0 7.5k
4.7k 0.27k
1000
0.9 (1 )
Resolviendo: V 0
7.02
Ib1
Por lo tanto, hallaremos la ganancia en modo diferencial del amplificador diferencial del experimento: Ad 1
7.02 Ib Ib1 r e
0.27k 2 Ib1 ( 4.7k // 0.27k 0.9(1 ) r e )
Ib1
Ad 1
12.31
La ganancia total en modo diferencial sería: Ad = 2Ad1 = 24.62
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//( r e 0.27k (4.7k //( //( 0.27k Z i 1k //( Z i
22.41 0.9 (1 ))
0.995k
La impedancia de salida del circuito es: Z 0
RC 2
7.5k
La relación de rechazo en modo común es: RRMC RRMC
III.
Ad
AC
31.84
PROCEDIMIENTO 1. Mediante simulación, determine el punto de reposo de los transistores, considerando el caso ideal de que la perilla del
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Tabla 3.1 ()
Valor 11.53 Calculado Valor 11.746 simulado
()
0.821 0.718
4. Aplicar una señal hasta obtener obtener la máxima señal de salida salida sin distorsión (2KHz). Registre la tabla 3.1 el valor pico de la señal . Dibujar en la fase correcta las siguientes formas de onda: Modo diferencial: V1=+V V2=-V Vb1
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6. Cambie la resistencia por la fuente de corriente, tal como es mostrado en la figura 3.2, y calibre el potenciómetro hasta encontrar el mismo punto de operación para ambos transistores. De ser necesario modifique la amplitud de salida del generador, ,de tal manera que la señal de salida no se distorsione. Complete la tabla 3.3
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Se pudo comprobar que el amplificador diferencial en modo diferencial, amplifica la señal en un factor que proviene de la diferencia de voltajes de las señales de entrada.
V.
REFERENCIAS BIBLIOGRÁFICAS