NATIONAL UNIVERSITY of SINGAPORE SINGAPORE Department of Electrical and Computer Engineering EE2005 – Electronics Homework Assignment #8 Solution
1. 10V M3
10V
C3
M2
RB1
vout
100k
RREF
R2 C2
R1
C1
v2 M1 CS
VB=5V
v1
500μ A
10μ
RS 100 vs Rin
Fig. 8-1 A multistage MOSFET amplifier is shown in the Fig. 8-1. You may assume that the body and the source terminals of the NMOS and PMOS are connected together, i.e. no body effect for NMOS and PMOS. You may also assume assume the following device parameters parameters and all NMOS and PMOS devices are identical: • •
K n=2mA/V2, VTHN=1V, λn=0.001V-1 , Cgd =0.5pF, Cgs=5pF K p=2mA/V2, |VTHP|=1V, λ p=0.001V-1, Cgd =0.5pF, =0.5pF, Cgs=5pF
a) Design R REF REF so that the drain currents for M1, M2 and M3 are 500μA. (3 marks)
I D ,1
= I D , 2 = I D ,3 = K n (V GS ,1 − V THN )2 = K p (V GS ,3 − V THP ) = 500 μ A 2
⇒ V GS ,1 = V GS , 2 = V GS ,3 = 1.5V R REF
=
10 − V GS ,3 500 μ A
= 17 k Ω
b) Identify the two stage amplifier configuration and estimate the small signal (3 marks) transconductance for transistors M1 and M2.
− CS g m , M 1 = g m , M 2 = 4 K n I D = 2mA / V
CG
1
c) Determine the two ports network parameters for the two stage amplifier, i.e. R in1, R out1, (6 marks) Gm1 or Av1, R in2, R out2, Gm2 or Av2. M2
M2 RB1
vout
100k
Gm2
R2
vout R2
Rin2
R1
Rout2 Rout1
RB1//R1
v2 RS
M1 v1
v2 M1
100
Gm1
vs
v1
RS 100 vs
Rin1 CS ⇒ Gm 2 = g m , M 2 = 2 mA / V ⇒ Gm1 = − g m , M 1 = −2mA / V 1 r o , M 1 + R B1 // R1 [Table 2 Configurat ion H ] Rin1 = CG
g m , M 1
Rout 1 Rin 2
r o , M 1
= R B1 // R1 // r o , M 1 [1 + g m, M 1 RS ] [Table 2 Configurat ion G ] = ∞ Rout 2 = R2 // r o , M 2 [Table 2 Configurat ion G with R E = 0]
d) Assume R 1=R 2, design R 1 so that the overall gain (vout/vs) is -60. Assume R1
⇒
vout vs
= ≈
v1 vs
= R2 << R B1 , r o, M 1 , r o , M 2 ⇒ Rin1 ≈ ×
v2 v1
×
Rin1 Rin1 + RS
vout v2
=
Rin1 Rin1 + RS
(3 marks)
1 g m , M 1
× g m , M 1 ( Rout 1 // Rin 2 ) × (− g m , M 2 )( Rout 2 )
× g m , M 1 ( R1 ) × (− g m , M 2 )( R2 ) = −60
⇒ R1 = R2 = 4.24 k << R B1 , r o , M 1 , r o, M 2 ⇒ Assumption
valid
e) Create a SPICE netlist and verify your gain result in part (d). You may assume C1=C2=C3=100μF in your simulation.
(5 marks)
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*AC simulation for Question 1 VDD VDD 0 10V VB VB 0 5V VS VS 0 AC 1 RS VS VS1 100 CS VS1 V1 10U M1 V2 VB V1 V1 MODN M2 VOUT VG2 VDD VDD MODP M3 VG3 VG3 VDD VDD MODP RREF VG3 0 17K C3 VG3 VDD 100U RB1 VG3 VG2 100K C1 V2 VG2 100U R1 V2 VC2 4.47K R2 VC2 VOUT 4.47K C2 VC2 0 100U IB V1 0 500U .MODEL MODN NMOS LEVEL=1 W=2043u l=10.6u vto=1 tox=100n lambda=0.001 cgdo=245p .MODEL MODP PMOS LEVEL=1 w=2043u l=10.6u vto=-1 tox=100n lambda=0.001 cgdo=245p .OP .AC DEC 10 10 10Meg .PROBE .END
2. 10V 10V
10V
RD R A1 Rin
C2
10μ
M2
C4
R A2 40k M1
100 vs
Q1
20k C1
RS
Rout
8k
R A3
C3
40k
10μ M3
10V
10V
10
vout RL 1k
RREF1
RREF2
M3A
M4A
M4
Fig. 8-2 A multistage amplifier using MOSFET and BJT is shown in the figure above. You may assume that the body and the source terminal of the NMOS are connected together, i.e. no body effect for NMOS. You may assume the following BJT and NMOS parameters: • •
IS=10-15A, β=100, VA=100V K n=2mA/V2, VTHN=1V, λn=0.01V-1
f)
Design R REF so that the drain current for M3 and M4 is 500μA each.
I D , M 3 A I D , M 3 A
(3 marks)
= I D, M 4 A = K n (V GS , M 3 A − V THN )2 = 500μ A ⇒ V GS , M 3 A = V GS , M 4 A = 1.5V V − V = I D, RREF 1 = DD GS , M 3 A = 500μ A ⇒ R REF 1 = R REF 2 = 17k R REF 1
g) Estimate R in and R out of the multistage amplifier.
3
(3 marks)
g m , M 1
= g m, M 2 = 4 KI D , M 1 = 2mA / V
g m ,Q1
=
I C V T
= 20m
r o ,Q1
=
V A I C
r o , M 1
= r o, M 2 = r o, M 3 = r o, M 4 =
1 λ n I D , M 1
= 200k
= 200k
⇒ Rin = R A2 // R A3 = 20k
Rout
⎛ R 1 ⎞⎟ = ⎜⎜ D + ⎟ // r o, M 4 ≈ 130 ⎝ β + 1 g m,Q1 ⎠
h) Assume that all transistors are operating in the saturation region. Estimate the AC small (4 marks) signal gain (vout/vs). AV
=
Rin Rin
+ RS
× (− g m, M 1 )×
≈ (1)(2m )(8k // 105k ) i)
V G , M 2 V D , M 2
1 g m , M 2
× g m, M 2 × { R D //[r π ,Q1 (1 + g m,Q1 R L )]}×
g m,Q1 R L
1 + g m,Q1 R L
20 = 14.16(23dB ) 21
The above circuit actually suffers from one problem and does not function properly as a (3 marks) multistage amplifier. Describe what the problem is.
80 k V GS , M 2 = 1.5V ⇒ V S , M 2 = 6.5V × 10V = 8V 100 k = 10 − I D , M 2 × R D = 6V < V S . M 2 ⇒ Amplifier not functionin g because M 2 is off
=
j)
You can solve the above problem by simply changing the value of one of the components without affecting your calculation in part (a)-(c). Please state the component and its (3 marks) corresponding value.
> V DSSAT , M 2 = V GS , M 2 − V THN = 0.5V ⇒ V S , M 2 < V D , M 2 − 0.5V = 5.5V Choose V S , M 2 = 4.5V ⇒ V G , M 2 = V S , M 2 + V GS , M 2 = 6V
V DS , M 2
⇒ V G , M 2 =
80 k 80 k + R A1
× 10V = 6V ⇒ R A1 = 53.3k
Change component R A1 and new value should be 53.3k k) Create a SPICE netlist for the above circuit and verify your gain result after you have (4 marks) solved the problem in (d).
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*AC simulation for exam question 3 Vs A 0 AC 1 Rs A B 100 C2 B C 10u RA1 E D 53.3k RA2 D C 40k RA3 C 0 40k C1 D 0 10u RD E F 8k M2 F D G G MODN M1 G C H H MODN C3 H 0 10u Q1 E F I NPNMODEL RREF1 E J 17k RREF2 E K 17k M3 H J 0 0 MODN M3A J J 0 0 MODN M4 I K 0 0 MODN M4A K K 0 0 MODN C4 I L 10u RL L 0 1k VDD E 0 10 .MODEL NPNModel NPN IS=1E-15 BF=100 VAF=100 .MODEL MODN NMOS LEVEL=1 KP=4m LAMBDA=0.01 VTO=1 .AC DEC 10 10 10Meg .PROBE .END
3. 10V R S vs,rms 0.5mV
10V R C
R REF
100Ω
1.4k Ω R B2
R B1
vout
Q1
Q2 20k Ω
20k Ω
R x An input source and a common emitter amplifier are shown above. You may assume the
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following BJT: • IS=10-15A, β=100, VA=100V (a) Design R REF so that the biasing current for Q1 is 500μA. (2%) (b) Estimate value of R x. (2%) (c) Estimate the small signal AC gain, vout/vs. (2%) (a) I C ,Q 2 ≈ I RREF = 500μ A ⇒ I B ,Q 2 = 5μ A R REF
=
V DD
− V BE ,Q1 − I B ,Q 2 R B 2 I RREF
(b) g m ,Q 2 = 20m
R X
= 18.4k Ω
⎛ R 1 ⎞⎟ = R B1 + ⎜⎜ B 2 + ⎟ // R REF ≈ 20.248k ⎝ β + 1 g m,Q 2 ⎠ R B2
R B2 R y 20k Ω (c )
vout vs
R y
20k Ω
= − g m,Q1 ( RC // r o,Q1 ) ≈ −28
6
R B2
R y
20k Ω
Table 1 Configuration F
4. Consider the amplifier shown in Fig. 8-4. The MOSFET has K=100μA/V2, VTH=0.5V, λ=0 and no body effect, whereas the BJT has β=288 and VA=100. a) Design R REF so that the biasing current for M1 is 500μA. b) Find the biasing of Q 1. c) Identify the two-stage amplifier and find their corresponding two-ports network parameters. d) Find the overall gain A V=vout/vs. 5V 5V R D1
Cout
2.3k Ω
R REF
47μF
R B1 M2
R C
Q1 2V
M1 10k Ω
vout R L 100k
10k Ω -5V
R S
Cin 100Ω 47μF
vs
Fig. 8-4
(a) I D , M 1 ≈ I D, M 2 = 500μ A = K n (V GS , M 2 − V THN )
2
⇒ V GS , M 2 = 2.736 (b) I RD1 =
R REF
=
5 − 2.736 = 4.5k 500μ
5 − 2.7 = 1m I C ,Q1 ≈ 500μ 2.3k
(c) CS − CB g m , M 1
= g m, M 2 = 4 KI D , M 1 = 447 μ
Gm1
= g m, M 1 = 447 μ
Rin 2
=
1 g m ,Q1
(d ) AV =
Rin1
= R B1 +
r o,Q1 + RC // R L r o,Q1 +
RC // R L
Rin1 Rin1 + RS
≈
g m ,Q1
1 g m , M 2
1 g m ,Q1
= 20m
r o, M 1
=∞
r o,Q1
= 200k
r π ,Q1
= 14.4k
// R REF = 11.5k Rout 1 = R D1 // r o, M 1 = 2.3k Gm 2 = − g m ,Q1 = −20m
= 50
Rout 2
= RC //{r o,Q1 [1 + g m,Q1 ( R D1 // r π ,Q1 )]} ≈ 10k
β
× (− g m, M 1 )( Rout 1 // Rin 2 ) × g m,Q 2 × ( Rout 2 // RL )
=4
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5. Consider the amplifiers shown in Fig. 8-5(a) and (b). (a) Find the small-signal midband AC voltage gain vo/vs of Fig. 8-5(a). (b) Find the small-signal midband AC voltage gain vo/vs of Fig. 8-5(b). (c) Explain whether Fig. 8-5(b) suffers from body effect. 10V R D
R 1 R S
Cout
vo
Cin R L R 2
vs
Fig. 8-5(a) 10V R D
R 1 R S
Cout
vo
Cin R L R 2
vs
CE
Fig. 8-5(b)
(a) (b)
vo vs vo vs
= =
(− g m )( R D // R L ) =0 1 + g m (∞ ) RS + ( R1 // R2 ) R1 // R2
R1 // R2 RS
+ ( R1 // R2 )
(− g m )( R D // R L )
(c) For small signal AC analysis, Fig. 8-5(b) doesn’t have body transconductance and thus doesn’t suffer from body effect. For DC analysis, due to the difference of source and body voltage, the threshold voltage will change.
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