A MODIFIED SWITCHING STRATEGY FOR ASYMMETRIC HALF-BRIDGE HALF-BRIDGE CONVERTERS FOR SWITCHED RELUCTANCE MOTOR DRIVES
P. Chancharoensook and M.F. Rahman Department of Electric Power Engineering The University of New South Wales Sydney NSW 2052 AUSTRALIA Abstract
This paper presents an improved switching scheme for asymmetric half-bridge converters, the standard inverters for switched reluctance machine drives. The modified switching strategy bases on the idea that every electrical cycle the two switches in each leg of the converter alternate their commutating and chopping functions. Consequently, the upper and lower transistors of the converter can balance their switching losses. Such method has been implemented in DS1102 digital signal processor (DSP) control environment driving a 1-hp 4-phase 8/6 switched reluctance motor (SRM) with a 4-phase IGBT asymmetric half-bridge converter. Measured switching losses of the proposed method are compared with those of a basic switching scheme. The experimental results have confirmed an acceptable performance of this proposed t echnique. 1.
INTRODUCTION
Switched reluctance motor (SRM) is a mechanically simple, robust and highly reliable machine. Thus, it has been considered as a viable alternative to other types of electric machines in industrial, automotive and aerospace applications [1, 2, 3]. Basically, an asymmetric half-bridge converter (Fig. 1) is an ideal inverter for high-performance SRM drives. It provides the most control flexibility and fault tolerance capability [1, 4, 5]. However, a basic switching strategy for phase current regulation (in soft chopping mode) causes either the upper transistor or the lower transistor of each phase to experience more switching losses than the other switch in the same inverter leg. Consequently, the thermal balance of the semiconductor switches is not effectively taken into account. Relatively little has been reported on the study of switching techniques which can solve such problem. One proposed method uses dedicated hardware to balance switching and conduction losses between switches [7]. It is done by alternating chopping between switching devices of each respective machine phase during the conduction intervals [6, 7]. The technique is, however, quite complicated and also requires additional logic circuits to generate balanced drive signals for the upper and lower transistor switches. Another method is called “complementary PWM control” for SRM inverters [9]. In theory, this soft switching technique seems to work well, yet the scheme itself has not been imple mented and tested.
The purpose of this paper is to present a simple software solution for the problem mentioned above. In addition, experimental verifications of such improved switching strategy, which can effectively balance thermal stresses among switching devices in asymmetric half-bridge converters, are also presented. Firstly, the fundamental concepts of soft chopping current regulation and basic switching strategy in SRM are explained. It is followed by the algorithm of the modified switching strategy. Then, the proposed idea is implemented in digital signal processor (DSP) control environment. Next, experimental results from both switching techniques are clearly illustrated. Lastly, discussion and conclusions are given.
Fig. 1. Four-phase asymmetric half-bridge converter.
Fig. 2. Circuit diagram of the 4-phase asymmetric half-bridge converter for SRM drives.
2.
FUNDAMENTAL CONCEPTS
2.2
2.1
Soft Chopping Current Regulation
It can be noticed that in basic soft chopping scheme only one transistor is modulated. It is called the chopping transistor . The other transistor, however, remains on all the time during conduction period of that particular phase. It is, then, called the commutating transistor [2, 3].
Firstly, consider Phase A in Fig. 2. The voltage applied to the phase winding is +V DC when the upper and lower transistors are on. Phase current then increases through both switches. If one transistor is off while the other is still on, the winding voltage will be zero. Phase current then slowly decreases by freewheeling through one transistor and one diode. When both transistors are off, the phase winding will experience -V DC voltage. Phase current then quickly decreases through both diodes. By appropriately coordinating the above three switching states, phase current of the SRM can be controlled.
Basic Switching Strategy
For every electrical cycle in basic switching strategy, the upper transistor (T 1 in Fig. 2) always functions as a chopping transistor, while the lower transistor (T 2 in Fig. 2) always functions as a commutating transistor. This is clearly illustrated in Fig. 4, where two electrical cycles of winding current and the upper and lower IGBT current of the same phase are presented.
At low and medium speeds when back EMF is not so high, current regulation is achieved by soft chopping [8]. The concept is to suitably alternate the switching states between +V DC and zero voltage during the conduction period, as clearly shown in Fig. 3.
A large instantaneous power dissipation occurs in a semiconductor switch during turn-on and turn-off (switching) intervals [10]. Consequently, the chopping transistor experiences higher switching losses than the commutating one in the basic soft switching strategy
Fig. 3. Soft chopping current regulation.
Fig. 4. IGBT current in basic switching strategy.
Fig. 5. IGBT current in modified switching strategy.
2.3
Modified Switching Strategy
In an attempt to solve the problem of the unbalance power dissipation between the upper and lower transistors, a modified switching strategy has been proposed. The fundamental concept of the technique is: both IGBT switches are programmed to alternate their chopping and commutating functions at the end of every electrical cycle, as shown in Fig. 5. Therefore, the switching losses are expected to be evenly distributed between the upper and lower transistors of the same inverter leg of the asymmetric half-bridge converter for SRM drives. This can make the design of the heatsink and the semiconductor device rating much easier [9].
vT 1 , vT 2 , iT 1 & iT 2
v A
−
D
& iA
−
3.
HARDWARE AND CONTROL
3.1
Experimental Hardware
The experimental setup is shown in Fig. 6. The tested 1-hp 4-phase 8/6 SRM (Magna Physics, USA) is coupled to a JR16M4CH ServoDisc DC machine (Kollmogen, USA) which gives load torque. The four phase windings of the SRM are supplied by an asymmetric half bridge converter. Rotor position information from a 12-bit absolute encoder (Heidenhain, Germany), together with phase voltage and phase current signals from sensors are simultaneously captured into a computer through a DS1102 DSP card (dSPACE, Germany). At the same time, transistor voltage and transistor current signals are also recorded into a LT364L digital storage oscilloscope (LeCroy, USA). These data are used to calculate the instantaneous power dissipation waveform. With a real-time program running inside, the 60-MHz TMS320C31 processor (Texas Instruments, USA) can control the SRM by giving suitable PWM signals to the eight IGBTs of the converter. Hence, the modified and basic switching strategies can be implemented in real-time control. Finally, the experimental results from both methods can be compared. The advantage of this modified switching strategy is that it is a software solution. No additional hardware is needed for such scheme. Furthermore, changing between the two switching strategies is very flexible. It is simply done by changing between the two real-time programs
D
v A & iA v B & iB vC & iC v D & iD
Fig. 6. Diagram of the experimental setup for SRM drives where IGBT switching losses are monitored.
Fig. 7. Phase current and control algorithm of the modified switching strategy.
3.2
Control Algorithm
It can be seen from Fig. 7 that every electrical cycle (or every 60 mechanical degrees for the 8/6, 4-phase machine) the switching schemes alternate between Cycle 1 and Cycle 2. In Cycle 1 scheme, the upper transistor functions as a chopping switch, while the lower transistor functions as a commutating switch. In Cycle 2 scheme, the upper transistor functions as a commutating switch, while the lower transistor functions as a chopping switch. Hence, the modified switching strategy can be implemented. When either Cycle 1 or Cycle 2 is only used for every electrical cycle, the basic switching strategy can be realised.
4.
EXPERIMENTAL RESULTS
The instantaneous power dissipation of transistor is the product of transistor voltage and transistor current.
pT (t )
=
vT (t ) iT (t ) ⋅
(1)
The SRM is driven in motoring mode, where its rotor speed is constantly maintained at 1,000 rpm during no-load and loading conditions. Fig. 8 and Fig. 9 present how switching losses of the upper and lower transistors are found (for basic soft switching strategy under no-load condition) using (1). Similarly, when the motor is 2.2368 N-m loaded, the higher power dissipation of the switches can also be found, as shown in Fig. 10 and Fig. 11. When the realtime control for the modified soft switching strategy is implemented, the instantaneous power dissipation waveforms of the IGBTs are calculated, as illustrated in Fig. 12 and Fig. 13 (for no-load condition), and in Fig. 14 and Fig. 15 (for loading condition). The switching losses (in the basic scheme) only concentrate on the upper transistor (Fig. 9 and Fig. 11). On the contrary, the switching losses are evenly shared between the upper and lower transistors in the modified switching strategy (Fig. 13 and Fig. 15).
) A ( 1 T i ) V (
1 T
v
) A ( 2 T i ) V (
2 T
v
Fig. 8. Waveforms in basic scheme (no-load).
Fig. 9. Switching losses in basic scheme (no-load).
) A (
1
T i
) V (
1 T
v
) A ( 2 T i ) V (
2 T
v
Fig. 10. Waveforms in basic scheme (loaded).
Fig. 13. Switching losses in modified scheme (no-load).
) A ( 1 T i ) V (
1 T
v
) A (
2
T i
) V (
2 T
v
Fig. 11. Switching losses in basic scheme (loaded).
Fig. 14. Waveforms in modified scheme (loaded).
) A ( 1 T i ) V (
1 T
v
) A ( 2 T i ) V (
2 T
v
Fig. 12. Waveforms in modified scheme (no-load).
Fig. 15. Switching losses in modified scheme (loaded)
confirmed the effectiveness of this modified scheme.
6.
REFERENCES
[1]
Krishnan, R., Switched Reluctance Motor Drives: Modeling, Simulation, Analysis, Design and Applications, Industrial Electronics Series, CRC Press, Boca Raton, 2001.
[2]
Miller, T.J.E., Ed., Electronic Control of Switched Reluctance Machines, Power Engineering Series, Newnes, Oxford, 2001.
[3]
Miller, T.J.E., Switched Reluctance Motors and Their Control , Oxford University Press, New York, 1993.
[4]
Vukosavic, S. and Stefanovic, V.R., “SRM inverter topologies: a comparative evaluation”, IEEE Transactions on Industry Applications, vol. 27, no. 6, Nov.-Dec. 1991, pp. 1034-1047.
[5]
Barnes, M. and Pollock, C., “Power electronic converters for switched reluctance drives”, IEEE Transactions on Power Electronics, vol. 13, no. 6, Nov. 1998, pp. 1100-1111.
[6]
MacMinn, S.R. and Jones, W. D., "A very high speed switched reluctance startergenerator for aircraft engine applications", in Proceedings of the IEEE Aerospace and Electronics Conference (NAECON’89), vol. 4, May 1989, pp. 1758-1764.
[7]
MacMinn, S.R. and Turnbull, F.G., “Current chopping strategy for switched reluctance machines”, United States Patent 4,933,621, Jun. 12, 1990.
[8]
Inderka, R., Menne, M. and De Doncker, R.W., “Generator operation of a switched reluctance machine drive for electric vehicles”, in Proceedings of the European Power Electronics and Applications Conference (EPE’99), Lausanne, 1999.
[9]
Blaabjerg, F., et al, “Improved digital current control methods in switched reluctance motor drives”, IEEE Transaction on Power Electronics, vol. 14, May 1999, pp. 563-572.
[10]
Mohan, N., Underland, T.M. and Robbins, W.P., Power Electronics: Converters, Applications and Design, 2nd ed., Wiley, New York, 1995.
Fig. 16. Switching losses distribution (no-load).
Fig. 17. Switching losses distribution (loaded). In the modified switching technique, where the switching losses are evenly distributed between transistors (Fig. 16 and Fig. 17), it is suggested that thermal balance between semiconductor switches can be achieved. Although the total losses in the asymmetric half-bridge converter are unchanged, the thermal stresses among switching devices is successfully balanced with this method. The switching technique can work very well in both forward and reverse motoring operation. In addition, the same concept can be applied in SRG (switched reluctance generator) drives when the machine is operated in generating mode.
5.
CONCLUSION
In this study, an improved switching strategy for asymmetric half-bridge converters for SRM drives is presented. Switching losses are evenly shared, because the upper and lower switches alternately function as chopping and commutating transistors every electrical cycle. The results from DSP control experiments have
