http://www.rficdesign.com/vlsi-interview-question 1. Go through VLSI book from beginning to the end 2. If possible solve all the problems at the end of the chapter 3. Most basic question is draw di...
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1. What is the difference between a D latch and a D Flip-Flop? A. The D-type latch is capable of retaining its state indefinitely. A latch has a D input, a Q
output, and an enable (EN) signal. Whereas a D flip-flop transfers its input to its output only on the active clock edge, a latch continuously transfers D to Q while EN is active. Latches are level sensitive, whereas flip-flops are edge sensitive. A latch retains its state while EN is inactive. Latch takes fewer gates to implement than the flip-flop thus are simpler than flip-flops and are unsuited to many applications in which flip-flops are used. A latch is sensitive to glitches on enable pin whereas flip-flop is immune to glitches. Latches are faster than flip-flops.
2. Design an XOR gate using a 2:1 MUX. A. The truth table for an XOR gate is as shown below. A
B Y
0 0 1 1
0 1 0 1
0 1 1 0
List the inputs of the MUX and also list the all the minterms in 2 rows. The 1 st row lists all the minterms with A is complemented. 2 nd row lists the minterms where A is uncomplemented. The implementation table is as shown below. I0
I1
A’
0
1
A
2
3
A
A’
The minterms encircled indicate that the output is high for that particular minterm. Encircled minterm 2 corresponds to A and is connected to I 0. Similarly A’ is connected to I1.
3. Implement a latch using a 2:1 MUX. Do the same using gates. Now draw the output waveforms. A. Consider a D latch. The truth table is shown below. E
D
Q
0
X
Q0
1
0
0
1
1
1
When enable E is low output Q= Q 0. When E is high output Q=D. This can be implemented using gates as shown in the following figure.
4. Implement a T FF using a D FF and JK FF. A. T FF (toggle FF) is obtained by connecting the JK inputs of a JK FF to high. Given this condition the output toggles. A toggle FF can also be implemented using a D FF by connecting the complement of the output of the D FF to the D input.
5. Given a black box of a full adder with the inputs and outputs, convert it to a FullSubtractor. A. A full adder adds the given 2 bits A, B along with the initial carry C in. In digital subtraction is done by taking the 2’s complement of the subtrahend and then adding it to the minuend. We get the 2’s complementin g of a number by taking the complement of the number and adding 1 to it. Thus for converting a FA to FS we should have a not gate to the 2nd input B and should give 1 as C in.
6. Define setup, hold time. How do you calculate the maximum operating frequency? What happens if we violate the set up and hold time condition? A. Setup time (T su ): The time required for the synchronous inputs of a flip-flop to be stable before a CLK pulse is applied. Hold time (T h ): The time that the synchronous inputs of a flip-flop must remain stable after the active CLK transition is finished. Propagation delay (T prop ) : The time required for the output of a digital circuit to change states after a change at one or more of its inputs. The maximum operating frequency is given by the equation: Fmax < or = 1/[T cq (first_FF) +(total) Tprop+ Tsu (second_FF)] (1) (Such that: Th < Tcq (min) + Tprop (min). If this condition is not met then the hold
time also comes into picture in the above equation). If the equation (1) is violated then a state called metastability state can occur.
7. How do you detect if two signals are same? A. Use a XOR gate 8. What is the difference between a Moore FSM and a Mealy FSM? A.
In Moore state machine outputs depend on current state only. In Mealy FSM outputs depend on current state and inputs. Mealy Machines tend to have fewer states. Moore Machines are safer to use. Outputs change at clock edge (always one cycle later). In Mealy machines, input change can cause output change as soon as logic is done – a big problem when two machines are interconnected – asynchronous feedback. Mealy Machines react faster to inputs. React in same cycle – don't need to wait for clock. In Moore machines, more logic may be necessary to decode state into outputs – more gate delays after.
9. Define synchronous and asynchronous inputs. A. Synchronous inputs: The inputs of a flip-flop that do not affect the flip- flop’s Q outputs unless a clock pulse is applied. Examples include D, J, and K inputs. Asynchronous inputs: The inputs of a flip-flop that change the flip- flop’s Q outputs immediately, without waiting for a pulse at the CLK input. Examples include preset and clear inputs. Preset: An asynchronous set function. Clear: An asynchronous reset function.
10. How do you swap 2 numbers without using a temporary variable? A. If the given 2 numbers are a, b we can swap these two numbers as follows: Step1: a = a + b Step2: b = a – b Step3: a = a – b