PULSE WIDTH MODULATION AIM:
To construct a pulse width modulation circuit and to study its performance. EQUIPMENTS REQUIRED:
1. 2. 3. 4. 5.
IC 555 time timer r Resis esisto torr 10 10 kΩ kΩ Capa Capaci cito torr 0.0 0.01 1 Mf Mf Signal Signal gene generato ratorr [100 [100 Hz- 1 MHz] MHz] Regul Regulate ated d powe powerr suppl supply y 6. Cathode ray oscilloscope [20 MHz]
THEORY: PULSE WIDTH MODULATION:
In pulse width modulation, a PWM signal is generated first and may be multiplexed with with other PAM signals. signals. The pulse width width modulation signal signal is generated generated from the PAM signal signal and transmit transmitted. ted. At the receiver receiver the PAM signal is transmitted and then demodulated by low pass filtering. The modulating signal is applied to the input of a PAM modulating circuit to generate generate the PAM signal. The same pulse train train which supplies the PAM modulator modulator is used to give a ramp generator generator to provide provide a train train of ramp pulses. Which all have equal sweeps, amplitude and duration. These ramp pulses are added quickly to the PAM pulses to produces varying height ramps. The varying height height ramps gate a Schmitt Schmitt trigger circuit to generate. The varying varying width rectangu rectangular lar pulses of the PWM wave. wave. The PWM pulse pulse can can be tran transm smit itte terr dire direct ctly ly or used used as the the inpu inputt to a puls pulsee posi positi tion on modulation. At the receiver the received pulses are put together a regenerative circ circui uitt to remov removee some some of nois noisee and and sequ sequen ence ce up the the puls pulses es.. Thes Thesee regene regenerat rated ed pulse pulse drive drive a refere reference nce pulse pulse genera generate te to produc producee a train train of constant width, constant height pulses synchronized to the leading edge of
the received pulses pulses but delayed by fixed interval. interval. The regenerated pulse pulse also gate gatess a ramp ramp gene genera rati tion on,, whic which h prod produc ucee a cons consta tant nt slop slopee ramp ramp for for the the dist distor orti tion on of the the puls pulses es.. At the end of the the puls pulsee of a samp sample le and and hold hold amplifier retains the final ramp voltage until it is reset the at the end of the period resulting in the ramp ramp and pedetral waveform. The constant amplitude pulses are added to the pedertal, which is then clipped off at threshold threshold voltage to form form the PAM signal at CRO. CRO. The signal waveform is received by low pass filtering.
PROCEDURE:
1. The circuit circuit was was constructe constructed d as per the the circuit circuit diagram. diagram. 2. At terminal terminal 2 of IC555 trigge triggerr pulse is applied applied and the the modulating modulating signal terminal at pin no 5. 3. The dc dc supply supply is is provide provided d to bias bias the the IC. IC. 4. The PWM PWM output output is taken acros acrosss the termina terminall 3 and and fed to any of the channels of the CRO. RESULT:
Thus the Pulse Width Modulation Circuit was designed and pulse width modulated output waveform is observed.
PULSE POSITION MODULATION
AIM:
To construct a pulse positions circuit and to study its performance. DEVICES, COMPONENTS AND EQUIPMENTS REQUIRED:
1. IC 555 2. Resistors – 3.3kΩ, 3.9kΩ 3. Capacitors – 0.01µf 4. Regula Regulated ted power power suppl supply y 5. Signal Signal gen generat erator or [100 [100 Hz – 1MH 1MHz] z] 6. CRO CRO [20 [20 MHz] THEORY:
In the pulse positive position modulation the position of the carrier is varied in accordance with the varying amplitude of the modulating signal. The pulses are denser at the accordance of the peak of the modulating signal and almost widely spaced or nil at the negative cycle of the modulating signal. Pulse position modulation signal. Pulse position position modulation signals are can be readily generated from the pulse width modulation signals by usin using g the modul odulaated ted edge dge of PW PWM M puls ulse to trig rigger a mono onostab stablle multivib multivibrator rator circuit circuit which generates generates fixed fixed width, width, fixed fixed receiver, receiver, a fixed fixed period reference pulses is generated from the incoming PPM waveform and a flip-flo flip-flop p is set by the referenc referencee pulse pulse and reset reset by the PPM pulse. pulse. The The result is a rectangular pulse width modulated pulse at the output of a flipflop. The modulating signal is applied to the input of a pulse amplitude modulating circuit, circuit, to generate the PAM signal. The same pulse train train which supplies the PAM modulator modulator is used to gate on a ramp generator to generate generate a train of ramp pulses, which all have equal slops, amplitude and duration’s. There ramp pulses are added quickly to the PAM signal to produce varying height height ramps. The varying varying height height ramps gate a Schmitt Schmitt trigger trigger circuit circuit to generate the varying width regular and rectangular pulses of the PWM wave. These PWM pulses can be used as an input to the PPM.
PROCEDURE:
1. The circuit circuit is is constructe constructed d as per the the circuit circuit diagram. diagram. 2. The input input modula modulating ting signal signal is fed fed through through the termin terminal al 5. 3. The dc supply is provided to bias the IC. 4. The PPM PPM output output is is taken taken from the termin terminal al 3. RESULT:
The pulse position modulation circuit was constructed and its output waveform was obtained.
FSK MODULATION
AIM:
To design FSK modulation and demodulation using IC XR 2206 in Timing resistor mode and Sweep mode. EQUIPMENTS REQUIRED:
1. IC XR XR 22 2206 2. Resis Resisto tors rs 5.1 5.1 kΩ (3). (3). 3. Varia Variable ble resi resisto storr 50 kΩ, kΩ, 200 200 Ω. 4. Capacitors 0.01µf, 10µf, 1µf, 1nf. 5. Functi Function on gener generato atorr (0 - 1)MHz. 1)MHz. 6. RPS ± 12V 7. CRO CRO (0 (0 – 20) 20)MH MHz. z. THEORY:
FSK is one of the the three main digital digital mod 1 technique. FSK is relatively simple, low low performance form of a digital mod n. FSK is a constant envelope mod where modulating signal is a binary stream that varies between two discrete voltage levels. FSK MODULATOR:
In binary, FSK the carrier frequency is shifted in accordance with the binary input. Hence the FSK is a step for for in the frequency domain as the the binary input changes changes from log k0 to k1 and vice vice versa. The FSK output shifts between marks to space frequency. frequency. There is a change change in the output frequency every time. The logic condition condition of the binary inputs inputs signal changes consequently the output rate of the change is equal to the input rate of change (i.e) Bit rate & Band rate are equal. IC XR 2206:
The XR 2206 is a monolithic for generated interpreted circuit capable of producing high quality sine, square, triangular and pulse waveforms can
be both amplitude amplitude and frequency of operation can can be selected externally over over a range of 0.01 HZ to more than 1 MHz. SYSTEM DESCRIPTION:
The XR 2206 is compressed of functional blocks, a voltage controlled oscillator, an analog multiplier, sine shaper, a unit gain buffer and set of current switches. The VCO actually actually produces produces an output frequency frequency proportional to an input input current, which is produced produced by a resistor the tuning tuning terminals to the ground. ground. The current switches one of the tuning tuning pins currents to the VCO controlled by an FSk input pin, to produced on output frequency. TIMING RESISTOR MODE:
The XR 2206 can be operated with two separate timing resistors R1 and R2 connected to the the timing pin 7 & pin pin 8 respectively. Depending on the polarity of the logical signal at pin A activated, either 1 or the other of these timing resistors is activated. activated. In pair pin 9 is often often initiated or connected to base voltage voltage ≥ 2V, only R1 R1 is activated. Similarly, if the voltage level at pin pin 9 < 1V, only R2 is is activated. There the output frequency frequency can be keyed between two levels f1 and f2 as f1 = 1/R1C ; f2 = 1/R2C SWEEP MODE:
Here the frequency of oscillation to the total timing current I t drawn from pin 7 or 8. F = 320 I t (m/A)/C (µf)Hz timing terminals (pin 7 or 8) are low impedance points and are internally biased at +3V with respect pin 12 frequency varies between linearly with I t on a wide range of current value, from 1 µA to 3 mA. The frequency can be controlled controlled by applying applying a control voltage, V c , to the activated timing pin. PROCEDURE:
1) The FSK modul modulatio ation n circuit circuit in timing timing resistor resistorss mode is constructed. Binary data input at 150 150 Hz is applied at pin 9 and and at output, FSK output is obtained.
modulation circuit in sweep sweep mode constructed. constructed. Binary 2) The FSK modulation data input at 150 Hz is given as V c and FSK output is obtained. 3) The outpu outputt waveform waveform graphs graphs are are plotte plotted. d.
RESULT:
The FSK modulated in timing resistor mode and sweep mode using IC XR 2206 is constructed and the output is verified.
PULSE AMPLITUDE MODULATION
AIM:
To construct a pulse amplitude modulator and to observe its modulated waveform. EQUIPMENTS REQUIRED:
1. 2. 3. 4. 5. 6. 7.
Tran Transi sist stor or BC10 BC108 8 IC 40 4016 Resistors Resistors 10 kΩ,56 kΩ,56 kΩ, kΩ, 1kΩ, 1kΩ, 4.7kΩ, 4.7kΩ, 1kΩ(v 1kΩ(variab ariable). le). Capaci Capacito tors rs 10µf, 10µf, 0.01µf 0.01µf,, 22µf. 22µf. Signal Signal gener generato atorr 1MH 1MHz. z. CRO CRO 20MHz 0MHz.. Regula Regulated ted power power suppl supply y (0-30)V (0-30)V..
THEORY:
Pulse amplitude modulation, the simplest form of pulse modulation forms an excellent excellent introduc introduction tion to pulse pulse modulation modulation in general. general. PAM is a pulse modulation system in which the signal is sampled at regular intervals, and each sample is made proportional to the amplitude of the signal at the instant of sampling. It is very easy to generate generate and demodulate demodulate PAM. PAM. In a generator, generator, the signal to be converted converted to PAM is fed fed to one input input of an AND gate. gate. Pulses at the sampling frequency are applied to the other input of the AND gate to open open it duri during ng the the want wanted ed time time inte interv rval als. s. The The outp output ut of the gate gate then then consists of pulses at the sampling rate, equal in amplitude to the signal voltage at each instant. instant. The pulses are then then passed through a pulse-shaping pulse-shaping netw network ork whic which h give givess them them flat flat tops tops.. As ment mentio ione ned d abov above, e, freq freque uenc ncy y modulation is then employed, employed, so that the system becomes PAM-FM. PAM-FM. In the receiver, the pulses are first recovered with a standard FM demodulator. They are then fed to an ordinary diode detector, which is followed by a low pass filter. If the cut off frequency of this filter is high enough to pass the highest signal frequency, but low enough to remove the sampling frequency ripple, and undistorted replace of the original signal is reproduced.
PROCEDURE:
1. The circuit circuit is is constructe constructed d as per the the circuit circuit diagram. diagram. 2. The input input modula modulating ting signal signal is fed fed through through the termin terminal al 5. 3. The dc supply is provided to bias the IC. 4. The PPM PPM output output is is taken taken from the termin terminal al 3.
RESULT:
The The puls pulsee ampl amplit itud udee modu modula lati tion on was was desi design gned ed and and the the puls pulsee amplitude modulated output was observed.
