MarkV

Mark V TMR Panel Cores Layout

SIMPLEX CONFIGURATION

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MARK V TMR CONFIGURATION RS-422R>





DENET

IONET>

ARCNET

XYZ



• • • •

= Combined term for , . = Operator Interface

= Collective term for ,, = Collective term for ,,

• = Q’s Digital Cores – –

• = C’s Digital Cores

• TCQA, TCQB,TCQC, … I/O Boards • TBQA,QTBA,TBQB,TBQC,TBQD… Terminal Boards • SDCC = Salem designed Drive Control Card, the control processor board • SLCC = Salem designed LAN Control Card to exchange information between processor via the DENET.

What’s in a name • TC xx – – – – –

•

Turbine Control

EA Emergency(

) Core A Version DA Digital Core(,) Q A-D Q cores, I/O Boards, different versions C A-C C Core, I/O Boards, different versions TG, L,S P Core, Trip Board

x TB x – – – –

C Q P D

Terminal Board

A Core, A Version A Core, A Version A

Core, A Version A Digital cores, a version

• TB xx – C A-C – Q A-D

Turbine Board Core, A,B,C versions Core, A,B,C,D versions

Mark V Overview Cores and Boards Mark V Panel Cores Communication and / or Control , , Protection

Digital inputs / Outputs , Power Distribution Extended I/O Cores - LM only -- ““

Mark V Overview

Cores and Boards Mark V Cores Boards Processor Boards Input/ Output Boards Terminal Boards Protective Processors Power Supplies - TCPS

• Mark V Overview

Mark V Control Panel Boards Back

Location 5 Location 4 Location 3 Location 2 Location 1

Front Top Location 6 Location 7

Bottom

Location 8 Location 9

Mark V Boards •I/O Terminal Boards • I/O Boards • Processor Boards - Drive Control Cards SDCC or DCC - LAN Control Cards SLCC or LCC

• Protective Processors - , , • Power Supply Boards • Power Distribution Board

I/O Terminal Boards

• Few Active components • Hardwire jumper configuration • I/o device direct termination

I/O Boards • Functions • Converts “real world” signals to/from digital signal for the processors • Scale and condition I/O signals • Servo Valve output regulation

• I/O configuration software • I/O configuration constants • Hardware jumper configuration.

Processor Boards

• (S)DCC Drive Control Cards - Location 1 , , and Processors - Executes the Control Sequence Program for each` Processor

• (S)LCC - LAN Control Cards - Transfer Digital information between Processors - Passes data to ‘s SLCC, then to - Does the voting in TMR applications

Protective Processors

• TCEA

Boards • Location 1, 3 & 5 of

Core • Emergency Over speed Protection • Master Protective Trip Circuit (the 4’s) • Generator Circuit Breaker Close Circuit • UV Flame Detectors Power Supply and Input Conditioning Circuits • Auto-Sync in Generator drive applications

Power Supply Boards • • • • •

TCPS Location 5 , and Processors Powers DCCs and I/O Boards Input: 125 VDC Outputs: –

- +/- 24 VDC

– –

- +/- 15 VD - +/- 5 VDC

Power Distribution Board

• TCPD Board • Located in core • Distributes 125 Vdc to: – – – –

- Power Supply Boards for , , Core - Protective Processors - PLU Processors - and cores for solenoid outputs

• Back Up Operator Interface • Can be used to control the turbine in • emergencies or other situations • User defined menus • Must be located within 50 feet of panel • Must be ‘initiated’ • Cannot be locked out or password • protected • Most CONTROL functions available

Control Basics • • • • • • • • • • • •

Configures Mark V -- user must download configuration files to EEPROM in panel The knows signal name and addresses (memory location) in Mark V Mark V Knows only addresses and values asks Mark V for values by address Mark V normally sits silent, waiting for a request from NOT critical to system operation - does no sequencing, just display & control - Mark V runs at last good value if does - Control with BOI or anther

Communication Processor • “Translates” information between the Operator Interface ( ) and the Control Processors (, , ) • Handles Analog I/O and, via the core, • Handles the Digital I/O • has some sequencing (Back - up primary over speed calculations) • may have critical sequencing in some Simplex or other applications

• Core

STAGE LINK

DENET

To the for Control Information Data, Alarms, Configuration Info

IONET To the Core Digital Inputs and Outputs

To core: Transfers information between cores Power supply

From the core

, , Cores • Control Processors • Use the CSP to do: • •

• • • • •

- Critical Control Sequencing - Primary Protection Sequencing

SIFT and Vote the data Critical Analog I/O Sync Check for Generator Drive Turbines Communicate with their components in , ,

Cores

• , , Cores

DENET To other cores transfers information between cores

IONET To the and

Cores Digital Inputs and Outputs

Power supply

125 V DC Power From the core

Field wiring, in and out analog signals

Core

• Communication Processor Digital I/O Core • 96 Not “critical” Contact Inputs • 60 Not “critical” Contact outputs

Core

• • • •

Control Processor’s Digital I/O Core ‘s Digital I/O 96 Critical Contact Inputs 60 Critical Contact outputs

Core

• TCEA Boards • Location 1, 3, & 5 of

Core • Emergency Over speed Protection • Master Protective Trip Circuit (the 4’s) • Generator Circuit Breaker Close Circuit • UV Flame Detectors Power Supply and • Input Conditioning Circuits • Auto-Sync in Generator drive applications

ADVANTAGES OF MARK-V OVER MARK-IV •

MARK-V HARDWARE HAS BEEN BUILT WITH STATE OF THE ART TECHNOLOGY AND 16 BIT MICROPROCESSOR.

•

PROTECTION FUNCTION BEING EXTREMELY CRITICAL IS REALISED IN INDEPENDENT TMR

CONTROLLER.

•

OPERATOR INTERFACE IS EASIER AS IT IS THROUGH A PC BASED STATION WITH 19”

•

VGA COLOUR GRAPHIC CRT, 101 FUNCTION ASCII KEYBOARD AND TRACKBALL. THE

•

MARK-V PANEL IS LOCATED AS A SEPARATE FREE STANDING PANEL AND THE

•

STATION IS PLACED ON TABLE TOP AT A CONVENIENT LOCATION AWAY FROM THE

ADVANTAGES OF MARK-V OVER MARK-IV •

PANEL. AS A BACK UP TO THE STATION, A SOFT KEY TYPE BACK UP OPERATOR. INTERFACE IS MOUNTED ON THE PANEL FRONT DOOR TO PERFORM CRITICAL FUNCTIONS.

•

SYSTEM IS FAULT TOLERANT, ACHIEVED THROUGH SIFT (SOFTWARE IMPLEMENTED FAULT TOLERANCE), THEREBY REDUCING THE LIKELYHOOD OF SPURIOUS TRIPS AND GREATLY ENHANCING THE SYSTEM AVAILABILITY.

•

ALL INTER-CORE CONNECTIONS ARE THROUGH FLAT CABLE. THIS AGAIN INCREASES THE SYSTEM AVAILABILITY AS IT ELIMINATES POSSIBILITY OF WIRE BREAKAGE AND LOOSE TERMINATION THAT IS GENERALLY ASSOCIATED WITH DISCREET WIRING.

•

CONNECTIVITY TO EXTERNAL SYSTEMS IS IMPROVED AS IT IS THROUGH MODBUS LINK.

•

THE SYSTEM IS MORE COMPACT THEREBY REDUCING THE DIMENSION OF PANEL.

Mark IV TMR

HIGH TEMP



STOP



GO



GO

2/3 VOTE

GO

Mark IV TMR

HIGH TEMP

LOW PRESS



STOP



STOP



GO

2/3 VOTE

STOP

Mark V SIFT TMR PRE-VOTE

HIGH TEMP

LOW PRESS



STOP



STOP



GO

GO

SIFT

GO GO

2/3 VOTE

GO

MarkV Control Documents • Control Sequence program and cross reference • I/O report • Hardware report • Alarm list • MODBUS List