foxcom M61PMV

5

4

3

2

1

 Foxconn MCP61M05 Fab :A D

D

nVIDIA nVIDIA MCP61 MCP61 Chip set for fo r AMD M2 M2 CPU (3/31/2008) PAGE

CONTENT

P A GE

C ON T EN T

01. COVER 

25

25. USB CONNECTORS

2

02. BLOCK DIAGRAM 

26

26. LAN

3

03. RESET MAP

27

27. PWR CONN / FNT PNL / VBAT

4

04. CLOCK DISTRIBUTION

28

28. ACPI VREG

5

05. PCI DEVICE / VID TABLE

29

29. MCP61 CORE POWER 

6

06. M2-1 Hyper Transport

30

30. VRM 

7

07. M2-2 DDRII -1

31

31. LAN CONN

8

08. M2-2 DDRII -2

32

32. AUDIO ALC888/ALC662

9

09. M2-3 MISC

33

33. Power Map

10

10. M2-4 Power

34

34. Modify List

11

11. DDRII SDRAM DIMM1-2

35

35. Optional Part

1

C

B

 A

C

12

12. DDRII Terminator

13

13. MCP61_HT

14

14. MCP61_PCI-E_RGM_VGA 

15

15. MCP61_POWER 

16

16. MCP61_PCI

17

17. MCP61_SATA_IDE

18

18. MCP61_HDA_USB

19

19. PCI_E X16 Slot

20

20. PCI SLOT 1 2 3

21

21. SIO IT8716F

22

22. IDE / Floppy / PS2

23

23. PLT /

24

24. FAN / HARDWARE MONITOR /VID

B

COM 

LEADTEK RESEARCH INC. ASSUMES NO RESPONSIBILITY FOR ANY ERRORS IN DRAWING THESE SCHEMATICS. THESE SCHEMATICS ARE SUBJECT TO CHANGE AT ANY TIME WITHOUT NOTICE.

A

 FOXCONN PCEG

5

4

3

2

1

D

D

MCP61 MCP61M05 M05 Bloc k Diagram

64-BIT 800/667/533/400MHZ POWER SUPPLY CONNECTOR 2*12 = 24 pin 2*2 = 4 pin (12V)

SOCKET M2

60 Amp

DDRII Memory CH:A

DDRII SDRAM CONN 1

DDRII Memory CH:B

DDRII SDRAM CONN 2

VREG -> ISL6566 => 3 phase

PWRBTN#

S I/O

PANS WHJ

SW

HT 16X16 2GT/S CPU_VLD

 PCI EXPRESS Lane * 16 C

C

HT_VLD

PCI Express X16

PCI_ RESET0* SB

 PCI EXPRESS Lane * 1

PS_ ON#

ACPI

PS_OUT#

NFORCE SLP_S5* SLP_S3*

PCI Express X1

PWRGD_P S

VRM_EN

ATX POWER

PCI SLOT 1

VRM

MCP61 PCI V2.3 / 33MHZ

 ATA 133

 PRIMARY IDE

PWM_GD

PCI SLOT 2

692 Ball BGA

HDA  Azalia / ALC888 (7.1 Audio)

INTEGRATED SATA

SATA-II CONN * 4

B

B

BACK PANEL CONN => 4 Port X8 USB ( V2.0 EHCI / V1.1 OHCI )

USB2 PORTS 7,8 USB2 PORTS 1,6  10/100Mb (Giga-Bit )LAN PHY

FLOPPY CONN

LPC BUS V1.0 / 33MHZ

PS2/KB CONN

FRONT PANEL PANEL Header * 2 => 4 Port

SIO PARALLEL CONN

USB2 PORTS 2,3 ITE IT8716F/FX USB2 PORTS 4,5

SERIAL CONN (COM1) SERIAL Header (COM2)

4MB FLASH

RGMII/MII

 AC131

 A

A

 FOXCONN PCEG

5

4

3

2

1

D

D

MCP61 MCP61M05 M05 Bloc k Diagram

64-BIT 800/667/533/400MHZ POWER SUPPLY CONNECTOR 2*12 = 24 pin 2*2 = 4 pin (12V)

SOCKET M2

60 Amp

DDRII Memory CH:A

DDRII SDRAM CONN 1

DDRII Memory CH:B

DDRII SDRAM CONN 2

VREG -> ISL6566 => 3 phase

PWRBTN#

S I/O

PANS WHJ

SW

HT 16X16 2GT/S CPU_VLD

 PCI EXPRESS Lane * 16 C

C

HT_VLD

PCI Express X16

PCI_ RESET0* SB

 PCI EXPRESS Lane * 1

PS_ ON#

ACPI

PS_OUT#

NFORCE SLP_S5* SLP_S3*

PCI Express X1

PWRGD_P S

VRM_EN

ATX POWER

PCI SLOT 1

VRM

MCP61 PCI V2.3 / 33MHZ

 ATA 133

 PRIMARY IDE

PWM_GD

PCI SLOT 2

692 Ball BGA

HDA  Azalia / ALC888 (7.1 Audio)

INTEGRATED SATA

SATA-II CONN * 4

B

B

BACK PANEL CONN => 4 Port X8 USB ( V2.0 EHCI / V1.1 OHCI )

USB2 PORTS 7,8 USB2 PORTS 1,6  10/100Mb (Giga-Bit )LAN PHY

FLOPPY CONN

LPC BUS V1.0 / 33MHZ

PS2/KB CONN

FRONT PANEL PANEL Header * 2 => 4 Port

SIO PARALLEL CONN

USB2 PORTS 2,3 ITE IT8716F/FX USB2 PORTS 4,5

SERIAL CONN (COM1) SERIAL Header (COM2)

4MB FLASH

RGMII/MII

 AC131

 A

A

 FOXCONN PCEG

5

4

3

2

1

RESET MAP CPU RST* D

K8 Socket M2

D

CPU PWRGD

MCP61 HT_CPU_PWRGD

HT CPU PWRGD

PE_RESET*

HT_CPU_RST*

HT CPU RST*

PEX X16

PEX X1

PWR SWTCH

PWR CONN

PWRBTN*

PWR BUTTON

C

C

SLP_S3*

PS ON

SLP S3*

PCIRST_SLOT2*

PCI RST1*

POWER_GOOD

PWR GOOD

PCIRST_SLOT1*

PCI RST0*

PWRGD

PCIRST_SLOT3*

PCI RST2*

PCIRST_IDE*

PCI RST3* PWRGD_SB

PWRGD SB

LPCRST_FLASH*

LPC_RST*

PWRGD_SB

LPCRST_SIO*

CIRCUIT GPIO_AUX*

 AC_RESET* SIO

FLASH

PRI IDE

VT6307

PCI SLOT 2

PCI SLOT 1

SEC IDE

LAN_PHY

 AUDIO_PHY

RESET*

RESET*

PWM_GD (8)

TIGER ONE B

PWRGD_ PS POWER ON SCHEM SCHEME

(46)

SLP_S3# SLP_S5#

PSIN (71)

PSON# (76)

 ATX Power Supply

TIGER ONE

IT8716F PANSWH# (75)

(1)

VRM_EN (9)

VRM_ EN

 

ENLL (37)

HT_VLD

PWRON# (72)

PANSW ANSWHJ

 ALL_PWR_OK  ALL_PWR_OK

H T    _ V  L   D

PWRBTN# RBT N#

Power button input

PGOOD (35)

B

PWR_OK

 MCP61 PWBTN#

 VRM 

PWM_ GD

PS_ON_IN# (6)

PS_ON_OUT#

PSON#

PWROK

 MCP61

PWRGD_ PS

PWRGD

CPU

ALL _ PWROK 

PWROK

(7)

 A

A

 FOXCONN PCEG

5

4

3

2

1

K8 M2 CPU D

D

HT_CPU_TXCLK0 HT_CPU_TXCLK0*

DIMM 0

MEMCLK_L[0,5,7] MEMCLK_H[0,5,7]

HT_CPU_RXCLK0 HT_CPU_RXCLK0*

CHANNEL A1 0-63

MEMCLK_L[2,3] MEMCLK_H[2,3]

HT_CPU_TXCLK1 HT_CPU_TXCLK1* HT_CPU_RXCLK1 HT_CPU_RXCLK1*

NC

DIMM 1

MEMCLK_L[1,4,6] MEMCLK_H[1,4,6]

CHANNEL B1 0~63

CPUCLK_IN* CPUCLK_IN

MCP61 CLKOUT_200MHZ CLKOUT_200MHZ* HT_CPU_RXCLK1* HT_CPU_RXCLK1

PEX X16

PE0_REFCLK PE0_REFCLK* HT_CPU_TXCLK1* HT_CPU_TXCLK1

C

HT_CPU_RXCLK0* HT_CPU_RXCLK0 HT_CPU_TXCLK0* HT_CPU_TXCLK0

C

PEX X1

PE1_REFCLK PE1_REFCLK*

PE2_REFCLK PE2_REFCLK* 14MHZ OR 24MHZ BUF_SIO SUSCLK

SIO

LPC_CLK0

PCI SLOT 1

PCI_CLK0 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK_FB

PCI SLOT 2

LPC_CLK1

32.768 KHZ

PCI SLOT 3

RTC_XTAL

FLASH

 AC_BITCLK

LPC HEADER

XTAL_IN 25 MHZ B

 AZALIA CODEC

BUF_25MHZ

B

XTAL_OUT

LAN PHY

 A

A

 FOXCONN PCEG