For small signal analysis one the input impedance has been determined the same numerical value can be used for changing levels of applied signals.
The input impedance of BJT amplifier is purely resistive in nature and depending in the manner in which the transistor is employed can vary from a few ohms to MΩ.
NOTE: an ohmmeter cannot be used to measure the small signal AC input impedance since the ohmmeter operates in DC mode. 2.
Output impedance, Zo
Is determined at the output terminals looking back into the system with the applied signal set to zero.
3.
Voltage gain, Av
One of the most important characteristics of an amplifier is the signal AC voltage gain as determined by, Av = Vo / Vi AVNL = Vo / Vi
•
│RL = ∞Ω (open circuit)
AVNL No load voltage gain. Rsense
+
+ AVNl
Vs
Vin _
_
Vo
The load has not been converted to the output terminals.
For transistor amplifier, the no-load voltage gain is greater than the loaded voltage gain.
Avs =
Vi =
Vo
Vi . Vo = Vs Vs Vi ZiVs Zi+Rs
;
Vi Vo
=
Zi Zi+Rs
Depending on the configuration, the magnitude of the voltage gain for a loaded single stage transitive amplifier typically typically ranges from just less than 1 to a few hundred.
A multi-stage multi-stage system, however however can have a voltage gain in the thousands.
4.
Current gain, Ai
For BJT amplifier, the current typically ranges from a level, just less than 1 to a level that may exceed 100. Ai = Io / IiIi
- Vo
• Ai = Ii
Io Ii
=
Io
RL Vi Zi
+ Vi
BJT Amplifier
=
- VoZi ViRL
_ Ai = - Av
Zi RL
•
Example: Rsense + Vs = 18v _
•
Calculate:
a)
Vi
b)
Zi
c)
AVNL
d)
Avs
Zi
0.65kΩ + Ii= 10mA Vin _
AVNL Vo=3.6v
•
Solution:
a)
Vs – IiRL – Vi = 0 Vi = Vs – IiRL
c)
= 18 mV – (10μ A)(0.65kΩ)
AVNL = Vo / Vi = 3.6 V / 11.5 mV AVNL = 313.043
Vi = 11.5mV
b)
Zi = Vi / Ii = 11.5 mV / 10μ A Zi = 1.150kΩ
d)
Avs = Vo / Vs = 7.6 V / 18 mV Avs = 100
System approach; Effects of Rs and R2 •
Zth = Zo = Ro
•
AVNL = Vo / Vi
• •
Vo = AVNLVi
Ii = Vi / Zi = Vi / Ri
•
Io = - Vo / RL
Using Voltage Divider •
•
Av =
RL
( R +Ro ) A
Vo =
Vo Vi
VNLVi
L
=
( R +Ro ) A RL
L
VNL
•
Example #1: In the Figure, a load impedance has been applied to the fixed bias transistor amplifier.
a)
Determine Av and Ai using two-port systems.
b)
Determine Av and Ai using the re model and compare results. Given:
12V
Rc = Ro
RC R1
470kΩ
3kΩ
C2
Re = 10.71Ω AVNL = -280.11
1uF
Zi = 1.07kΩ Zo = 3kΩ
1uF 0.5kΩ
RE 1kΩ
B= 100
RL
Av = =
( R +Ro ) A L
VNL
2.2kΩ
( 3kΩ+2.2kΩ ) – 280.11
Av = -118.508 -118.508 Zi
Ai = - Av RL
= 118.508 Ai = 57.692
1.071kΩ
( 2.2kΩ )
•
Current divider theorem: RB
Ib =
( R +βre )Ii
Ib =
Ii
Io
B
BIB
Vi
βre
RL' = RC║RL = 3 kΩ║2.2 kΩ RL' = 1.269 k Ω
RB
470kΩ
3kΩ
RL 2.2kΩ
•
Vo = RL'βIB =
Av =
Av =
RL'βVi
βre Vo Vi
=
-RL' re
-1.269kΩ 10.71Ω
Av = -118.5 -118.5
•
Apply current divider theorem: RC
Io = Io =
( R +R )βIb C
L
3kΩ
( 3kΩ+2.2kΩ )100Ib
Io = 57.69Ib Ib =
470kΩ
( 470kΩ+1.071kΩ)Ii
Ib = 0.9977Ii Ai = Io / Ii = (57.69)(0.9977) Ai = 57.56
•
Example #2: For prefixed bias, Determine:
a)
AVNL, Zi and Zo.
b)
Sketch the two-port model and parameters.
c)
Calculate Av.
d)
Determine Ai.
e)
Calculate using AC analysis. 18V
3.3kΩ
680kΩ
Vo 1.8μF
Vi Ii
1.8μF
Zi
β = 100
4.7kΩ
•
Solution:
a) By DC analysis, Vcc – IBRB – VBE = 0 IB =
Vcc - VBE RB
IB = 25.44μ A IE = (β+1)IB IE = 2.57mA re = 26mV / IE re = 10.12Ω
=
18V-0.7V 680kΩ
IE = (β+1)IB IE = 2.57mA re = 26mV / I E re = 10.12Ω Zi = RB║βre = 680kΩ║(100)(10.12Ω) Zi = 1.01kΩ Zo = Ro = Rc = 3.3kΩ
•
AVNL = -RC / re = -326.09 Av =
•
RL
( R +Ro) A L
=
VNL
Ai = -Av Zi / RL = 41.169
4.7kΩ 4.7kΩ+3.3kΩ
b)
RL' = RC║RL = 3.3kΩ║4.7kΩ
•
Ai = Io / Ii Io =
RC
( R +R )βIb C
L
3.3kΩ
(3.3kΩ+4.7kΩ )100Ib
RL' = 1.939kΩ
Io =
Av = -RL' / re
Io = 41.25Ib
re = 26mV / IE = 26mV / 2.57mA
Ib =
680kΩ
(680kΩ+1.01kΩ )Ii
Av = -191.60
Ib = 0.9985Ii
re = 10.12
Ai = (41.25)(0.9985)
Av = -1.939kΩ / 10.12
Ai = 57.56
Effect of source impedance (Rs) •
The effect of an internal resistance on the gain of the amplifier.
•
The parameters Zo and AVNL of an two-port system are unaffected by an internal resistance of a applied source.
• • •
Zi ≈ Ri
• •
Ii = Is = Vs / Rs+Zi Avs = Vo / Vs
(
Vo = Av =
Ri Ri+Rs Vo Vi
=
)VsA
VNL
Ri
( Ri+Rs ) A
VNL
•
Assignment: In figure below, a source with an internal resistance has been applied to the fixed bias transistor. 12V
3kΩ
470kΩ + Vs
Vi -
β = 100
+
-
Zi Zo
Vo
a)
Determine the voltage gain Avs = Vo / Vs, What % of the applied signal appears at the input terminals of the amplifier?
b)
Determine the voltage gain Avs = Vo / Vs using re model.
•
Solution:
a)
Vcc – IBRB – VBE = 0 IB =
Vcc - VBE RB
IB = 24.043μ A
=
12V-0.7V 470kΩ
IE = (β+1)IB IE = (100+1)(24.043μ A) = 2.438mA re = 26mV / IE re = 10.71Ω Ri = βre = (100)(10.71Ω) Ri = 1.071kΩ Zo = Ro = Rc = 3kΩ
•
AVNL = -3kΩ / 10.71 = -280.11
• Av = Vo / Vs = Av = -190.96
(
1.071kΩ RL (-280.11) = RL+Ro AVNL 1.071kΩ+0.5kΩ
)
•
RLVs Vi = RL+Ro =
(1.071kΩ)Vs 1.071kΩ+0.5Ω
Vi = 0.6817Vs
•
68.2% of the available signal reached the amplifier and 31.8% was lost across the internal resistance of the source.
b)
Vo = -βRc = -(100Ib)(3kΩ) Zi = βre and Ib ≈ Ii = =
Vs
Vo = -100
(1.571kΩ) (3kΩ)
Avs = Vo / Vs =
Rs+βre
Rs+βre Vs
•
Vs
(-100)(3kΩ) 1.571kΩ
Avs = -190.96
Combined effects of Rs and RL •
A source of Rs and a losd RL have become applied to a two-port system for which the parameters Zi, A VNL, and Zo have been specified.
•
Assume Zi and Zo are inaffected by Rs and RL.
•
Ai = -Av Zi / R L
• Av = Ai s =
(
-Avs
Ri+Rs RL
) ; using Is = R +Rs Vs
L
•
By Voltage Divider: RL
•
Vo =
Eq. 1: Av =
•
Vi =
Eq. 2:
•
Vi
( R +Ro ) A
VNLVi
L
Vo Vi
=
Ri
( Ri+Rs ) A
RiVs Ri+Rs
Ri = Ri+Rs Vs
VNL
Avs = Vo / Vs = (Vo / Vi) (Vi / Vs) Avs=
(
RL Ri RL+Ro AVNL Ri+Rs
)
(
)
The longer the source resistance and/or smaller the load resistance, the loss overall gain of the amplifier.
•
Example: for a single-stage amplifier with RL = 4.7k Ω and Rs = 0.3kΩ. Determine:
a)
Avs
b)
Av = Vo / Vs
c)
Ai
12V Rc R1 C1
470kΩ
3kΩ
C2 10uF 4.7kΩ
10uF 0.3kΩ
RS VS
RL
B= 100
•
Solution:
a) IB =
Vcc - VBE RB
=
12V – 0.7V 470kΩ
IB = 24.043μ A IE = (β+1)IB IE = (100+1)(24.043μ A) = 2.438mA re = 26mV / IE re = 10.71Ω
Ri = βre = (100)(10.71Ω) Ri = 1.071kΩ Zo = Rc = 3kΩ AVNL = -3kΩ / 10.71 = -280.112
Avs = Avs =
(
RL Ri RL+Ro AVNL Ri+Rs
)
(
)
4.7kΩ 4.7kΩ+3kΩ (-280.112)
(
Avs = -133.564
)
(
1.071kΩ 1.071kΩ+0.3kΩ
)
b)
Av = Vo / Vi = =
-Vo
(
RL RL+Ro (AVNL)
(
4.7kΩ 4.7kΩ+3kΩ
)
c)
Ai s = Io / Ii =
)(-280.112)
Av = -170.977
RL Vs Ri+Rs
-VoRi+Rs = ViRL Ai s = -Avs
(
Ri+Rs RL
)
By KVL: Vs – IsRs – IiRi = 0 Vs – Is (Rs+Ri) = 0 Vs Is = RL +Rs
= (133.564)
Ai = 170.977
(
0.3+1.071 4.7
)
BJT and JFET frequency response • • •
a=b
x
, x = logb a
Example: b = 10, and x = 2 Solution: log a = xlogb log a log b
=x
logb a = x
log 100 log 10
=x
log10 100 = 2
• •
Logarithm taken to the base 10 is common logarithms. Logarithm taken to the base e are referred as natural logarithms.
• • •
Natural logarithm
log10 1 = 0
• log10 • log10 •
Common logarithms
a b 1 b
= log10 a – log10 b = log10 a – log10 b
log10 ab = log10 a + log10 b
x = log10 a y = logb a
• •
Example #1: 5 / 2 = 2.5
•
Solution: x = (log 5 – log 2) log ¹
(0.6)(30) / 4 = 4.5
•
x = 2.5
• •
Example #3:
Solution: x = (log 0.6 + log 30 – log 4) log ¹
Example #2: (4)(3) = 12
x = 4.5
Solution: x = (log 4 + log 3) log ¹ x = 12
•
Example #4: (0.5)(10) (20)(5) Solution:
[
•
]² = 2.5x10 ³
x = 2[log 0.5 + log – (log 20 + log 5] log ¹ x = 2.5x10 ³
Voltage Divider Bias 22V
RC R1
470kΩ
10kΩ C2
C1
10uF 10kΩ
10uF 100 Ω
RL
RS R2
470kΩ
1.5 kΩ RE
VS
B= 140
2uF
• •
Solution:
•
DC analysis: VTH - VBE - IBRTH - IERE=0 VTH - VBE - IBRTH - (β+1)IERE=0 VTH - VBE - IB[RTH + (β+1)RE]=0
RTH = R1║R2 = 39kΩ║3.9kΩ
RTH = 3.55kΩ
• VTH = =
R2
( R +R )Vcc 1
2
3.9kΩ 39kΩ+3.9kΩ (22V)
(
VTH = 2V
)
•
IB = =
VTH - VBE RTH+(β+1)RE 2V-0.7V 3.55+(141)(1.58)
IB = 24.043μ A
•
IE = (β+1)IB
•
Ai = -Av (Zi / RL)
= (140+1)(6.05μ A) = 163.45
IE = 0.85mA
•
re = 26mV / 0.85mA re = 30.59Ω
•
10kΩ
Ai = 31.68
Zi = RTH║βre = 3.55kΩ║(140)(30.59Ω) Zi = 1.938kΩ
•
1.938kΩ
Zo = RL = 10kΩ
- Rc║RL • Av = re =
- 10kΩ║10kΩ 30.59Ω
Av = -163.45
Zi
( Zi+Rs) 1.938 Avs = -163.45(1.938+100) •
Avs = AVNL
Avs = -155.430
• •
Compare using re model.
• Avs
AVNL = - RL / re
=
= - 10kΩ / 30.59Ω = -326.90
•
(
RL
RTH
( R +Rs ) R ( R +Ro) A TH L
VNL
L
)
3.55kΩ
( 3.55kΩ+100Ω ) 10kΩ 10kΩ ( ) = -326.90 ( 10kΩ+10kΩ)(-163.45) 10kΩ+10kΩ
Av = AVNL RL+Ro
Av = -163.45
=
Avs = -157.40
Ib
Bre
RTH
βIb
Decibel The relationship of logarithm to power and audio levels. The term (bel) was derived from the surname of Alexander Graham Bell. G = logP2/P1 GdB = 10log10P2/P1 GdBm = 10log10P2/1mW GdB = 20logV2/V1 GdB = 20log(I2/ I1) GdBT = GdB1 + GdB2 + GdB3 + GdB4 + …. GdBn
Ex. 1) Find the magnitude gain corresponding to a decibel gain of 100 Solution: GdB = 10log10P2/P1
100/10 = 10/10log(P2/P1)
log-1(10 = logP2/P1)
Ans: P2/P1 = 1x1010
2) The input power to a device is 10,000W at a voltage of 1,000V. The output power is 500W, while the output impedance is 20 Ω a) Find the power gain dB b) Find the voltage gain in dB Solution: a) GdB = 10log10P2/P1 = 10log10(500W/1000W) GdB = -13.01dB
b) GdB = 20logV2/V1 P= V2/R
GdB = 20log(100/1000)
V2 = PR
GdB = -20
V = √(500)(20) V = 100 3) An amplifier rated at 40W output is connected to a 10 Ω speaker? a) Calculate the input power required for full power output if the power gain is 25dB Solution: GdB = 10log10P2/P1
25/10 = log(40/P1)
25 = 10log10(40/P1)
P1= 40/(25/10)log-1
Ans: P1=126.49mW
b) Calculate the input voltage for rated output if the amplifier voltage gain id 40dB Solution: P = V2/R
40 = 20log(20/V1)
V2 = (40)(10)
2 = log(20/V1)
V = √(40)(10)
log-1(2 = log20/V1)
V = 20
100 = 20/V1
V1= 20/100 Ans: V1= 200mV
Cascaded Amplifier 20V
RC RC R1
15kΩ
2.2kΩ
C1
R1
15kΩ
2.2kΩ
R2
4.7kΩ
1kΩ
C1 10uF
25uF
R2
4.7kΩ
1kΩ
B= 200
RE RE
1uF
B= 140
1uF
VTH = (R2//(R1+R2))(VCC) VTH = (4.7KΩ /(4.7KΩ + 15KΩ))(20V) VTH = 4.77V RTH = R1//R2 RTH = 4.7KΩ//15KΩ RTH = 3.58KΩ IB = (VTH - VB)/RTH – (β+1)(RE) IB = (4.77V – 0.7V)/3.58KΩ – (200+1)(1KΩ) IB = 19.89mA IE = (β+1)(IB)
r e = (26mV)/(IE)
IE = (200+1)(19.89mA)
re = (26mV)/(3.94mA)
IE = 3.94mA
re = 6.5Ω
Zi = RTH// βr e Zi = 3.58KΩ//(200)(6.5Ω)
Zi = 953.68Ω
AV1 = (-RC//Zi)/(r e) AV1 = (-2.2KΩ//953.68Ω)/(6.5Ω) AV1 = -102.334 Vo1 = AV1 Vi Vo1 = (-102.334)(25 ϻ V)
*If a 10KΩ resistor is connected
Vo1 = -2.56mV
across the output, what is VL?
AV2 = (-RC/r e)
VL = (RL//(RL+RC))(VO)
AV2 = (-2.2KΩ/6.5Ω)
VL = (10KΩ //(10KΩ+2.2KΩ))(865.9mV)
AV2 = -338.36 AVT = (-102.334)(-338.36) AVT = 34,635 Vo = AVT Vi Vo = (34,635)(25 ϻ V) Vo = 865.9mV
VL = 709.75mV
JFET(Junction Field Effect Transistor) •
A type of FET that operates with a reverse-biased junction to control a current in a channel.
•
gm – forward transfer conductance, change in drain current
(∆ID) for a given change in gate to source voltage (∆V GS) with the drain to source voltage constant.
gm = ∆ID/∆VGS = siemens (Ʊ) ID = -IDss(1 – VGS/(VGS(off) )2 gmo or gfs = forward transfer admittance gm = gmo(1 – VGS/(VGS(off) )2 gmo = 2(IDSS)/|VGS(off)|
Depletion MOSET(D-MOSFET) •
The drain and source are diffused into the substrate material and then connected by a narrow channel adjacent to the insulated gate. Drain Drain
Sio2
Gate
Psubstrate Gate channel
Source
Source
Drain Gate
Gate substrate
Source P channel
•
n-channel operates in the depletion mode when a negative gate-to-source voltage is applied and in enhancement mode when a positive gate-to-source voltage is applied.
FET Amplifier: Common Source Modifier •
The drain and source are diffused into the substrate material and then connected by a narrow channel adjacent to the insulated gate. RD
C2
C1
RG
Rc Rs
C2
Vgs
•
AC equivalent circuit Rd = RD//RL Vi = VGS
RG
Rd Rs
FET equivalent circuit: Vout = Vds
VGS
ID = IDss(1 – VGS/(VGS(off) )2 VGS = IDRs AV = (Vo/Vi) = (Vout/Vgs) = IdRd/(Id/gm) AV = gmRd
Vgs gm
AV = gm(r’ds//Rd)
ID
gm Rd
•
Effect of Source Resistance on Gain:
ID
gm Vgs
Vi = Vgs + IdRs Rd
Vo = IdRd AV = Vo/Vi = Vds/Vgs + IdRs = IdRd/(Vgs + IdRs) AV = gmVgsRD/(Vgs + gmVgsRs) AV = gmVgsRD/Vgs(1+ gmRs) AV = gmRD/(1+ gmRs)
•
Bypassed Source Resistance on Gain: Zi = RG
Zo = RD
AV = gm(RD//RL) AV = gmRD AV = gm(RD//RL)/(1+ gmRs)
Rd Vo ID
Rsg
Zo RG RL
Rs
Ex. 1)The JFET has a gm = 4ms with an external ac drain resistance of 1.5KΩ, what is the ideal voltage gain? Solution: ID
Vgs
AV = -gmRD
ID gm
AV = -(4ms)(1.5KΩ)
gm= 4ms
Rd= 1.5kΩ
AV = -6 560Ω
2) An FET equivalent circuit is shown. Determine the voltage gain when the output is taken across R D. Neglect r’ds Solution: AV = gmRD/(1+ gmRs) AV = (4ms)(1.5KΩ) /(1+(4ms)(560Ω)) AV = -1.852
JFET Self-Bias Configuration Ex. The fixed-bias configuration has an operating point defined by Vgs = -2V and Id = 5.625mA with IDSS = 10mA and Vp = -8V. The network should be redrawn with an applied signal V i. The value is provided as 40ms. 20V 20K
a)Determine gm Vo
b)Determine r d c)Calculate Zi
C2 G IDss = 10mA C1
S 1M
d)Calculate Zo
Vp = -8V
e)Determine AV f)Determine AV
Vgs
Zo
Solution: a) gmo = 2(10mA)/|8V| = 2.5ms
f) AV = -gm(RD)
gm = (2.5ms)(1 – (-2V)/(-8V))
AV = -(1.875ms)(2KΩ)
gm = (2.5ms)(1 – (0.25V))
AV = -3.75
gm = 1.875ms b) r d = 1/(yos) = 1-/(40 ϻ s) r d = 25KΩ c) Zi = RG =1MΩ d) Zo = r d//RD Zo = 25KΩ // 2KΩ Zo = 1.85KΩ e) AV = -gm(r d//RD) AV = -(1.875ms)(25KΩ //2KΩ) AV = -3.47
Ex. Calculate the dc bias, voltage gain, input impedance, and the resulting output voltage for the cascade amplifier. Calculate the load voltage if a 10K Ω load is connected across the output. 20V
2.4KΩ
2.4KΩ D
D
C2
C2
G C1 S
S
33MΩ 3.3MΩ
680Ω 600Ω
100µF
0.05mF
Solution: Zi = RG =3.3MΩ
AV = Vo/Vi
Zo = RD = 2.4KΩ
Vo = (39.69)(10mV) Vo = 396.9mV
gmo = 2(10mA)/|4V| = 5ms gm = (5ms)(1 – (-1.9V)/(-4V)) gm = 2.625ms AV = -(2.625ms)(2.4KΩ) AV = -6.3 VL = (RL//(RL+RD))(VO) AVT = (-6.3)(-6.3) ))(396.9mV)
VL = (10KΩ//(10KΩ+ 2.4KΩ
AVT = 39.69
VL = 320mV
Cascode Connection •
A cascode connection has one transistor on top or in series with another.
•
A common emitter (CE) stage feeding a common base (CB) stage Ex. Calculate the voltage gain for the cascode amplifier. RB= 6.8KΩ
1.8KΩ Q2
RB2= 5.6KΩ
C2=5µF
C2= 5µF
G
C1= 10µF
RB3= 4.7KΩ
B1=B2 = 200
Q1
CE 20µF
Solution: VB1 = (RB3/(RB1+RB2+RB3))(VCC) VB1 = (4.7KΩ/(4.7KΩ+5.6KΩ+6.8KΩ))(18V) VB1 = 4.95V VB2 = (RB3+RB2/(RB1+RB2+RB3))(VCC) VB2 = (4.7KΩ+5.6KΩ/(4.7KΩ+5.6KΩ+6.8KΩ))(18V) VB2 = 10.84V IB = (VTH - VB)/RTH – (β+1)(RE) IE = (VE1 - VBE)/(RE) IE = (4.95V – 0.7V)/(1.1KΩ) IE = 3.86mA
r e = 26mV/(IE) r e = 26mV/(3.86mA) r e = 6.74Ω AV1 = -RC/r e *no value of RC so r e is used AV1 = r e/r e = 1 AV2 = RC/r e AV2 = 1.8KΩ /(6.74Ω)
AVT = (AV1)(AV2)
AV2 = 267.29
AVT = -267.29
Darlington Connection
“Super Beta Transistor” •
The composite transistor acts as a single unit with a current gain that the product of the current gains of the individual C transistor. Q1
βD = β1β2
B
if β1 = β2 = β
βD = β 2 Q2
E
Ex. What current gain is provided by a Darlington connection of two identical transistors each having a current gain of β = 200 Solution:
βD = β1β2 βD = (200)(200) βD = 40,000
DC Bias of Darlington Circuit VCC - IBRB - VBE - IBRE =0 VCC - IBRB - VBE - βDIBRE =0
C
RB
IBRB + βDIBRE = VCC - VBE IB(RB + βDRE)= VCC - VBE IB= VCC - VBE /(RB + βDRE)
IB
IE = (βD+1)(IB) RE IE
VE = IERE VE = VB - VBE VB = VE + VBE
Ex. Calculate the DC Bias voltage and currents IB, IC, VE, VE, and VC IB = (18V – 1.6V) /(3.3MΩ) + (8000)(390Ω) IB = 2.55 ϻ A
18V
IE = (8000+1)(2.55 ϻ A) IE = 20.4mA VE = (20.4mA)(390Ω)
33MΩ
BD = 8000
VE = 7.97V
VBE - 1.6V
VB = 7.97V + 0.7V VB = 8.67V VCC = 18V – (20.4mA)(0) VCC = VC VC = 18V
390Ω IE
AC Equivalent Circuit •
For a Darlington emitter follower, the AC input signal is applied to the base of the Darlington transistor through capacitor C 1 with the AC output V0 obtained from the emitter through capacitor C2. The Darlington transistor is placed by an AC equivalent comprised of an input resistance and an output source. V0 = IBRE + βDIBRE V0 = IB(RE + βDRE)
RB
V0 = IB(RE(1+ βD)) V0 = IBREβD
RE
Vi - IBr i - V0 = 0
IBr i + IBRE + IBβDRE = Vi
Vi - V0 = IBr i
Vi = Ib(r i + RE + βDRE )
IBr i = Vi - IB(RE + βDRE)
Zi = RB// (r i + RE (1+βD)) Zi = RB// (r i + βDRE) AC Current Gain: Io = βDIb ≅ Ib = (1+βD) = βDIb Io/Ib = βD Ai = Io/Ii = Io/Ib = Ib/Ii By current divider: Ib = (RB/(r i + βDRE))(Ii) Ib/Ii = (RB/(r i + βDRE)) Ai = βD (RB/(r i + βDRE)) Ai = βDRB/(RB +r i+βDRE) AC Voltage Gain: Vo/Vi = Ib(RE+βDRE))/Ib(r i+RE+βDRE) RE(1+βD)/r i+RE(1+βD)
AV =
Ex. Calculate the input impedance if r i = 5KΩ 18V
3.3MΩ
BD = 8000
VBE - 1.6V
390Ω
IE
Zi = 3.3MΩ//(5KΩ+(8000)(390Ω)) Zi = 1.6MΩ Ai = (8000)(3.3MΩ)/(3.3MΩ+5KΩ+(8000)(390Ω)) Ai = 4,108.95 Calculate AV in the given circuit AV = (8000)(390Ω)/(5KΩ+(8000)(390Ω)) AV = 0.998
≅
1
Feedback Pair 18V
I2
RC 75Ω
I2 Vi
B1 = 140 Q1
B2 =180
RB 2MΩ Q2
VCC - ICRC - VEB - IBRB = 0
Vo = VCC - ICRC
VCC - (βD+ Ib) RC - VEB - IBRB = 0
Vi = Vo - VBE
IB1 = VCC - VEB /(RB+βDRC) IC1 = β1IB1 = IB2 IC2 = β2IB2 I =I
+I
Ex. Calculate the dc bias currents and voltages to provide V o at one-half the supply voltage. Solution: IB1 = 18V – 0.7V /(1MΩ+(140)(180)(75Ω)) IB1 = 4.47 ϻ A IB2 = (140)(4.47 ϻ A)
Vi = 9.55V - 0.7V
IB2 = IC1 = 625.8 ϻ A
Vi = 8.85V
IC2 = (180)(625.8 ϻ A) IC2 = 112.64mA IC = 625.8 ϻ A + 112.64mA IC = 112.69mA Vo = 18V – (112.69mA)(75Ω) Vo = 9.55V
AC Equivalent:
AC Output Amplifier:
Vo = (-β1Ib1 + β2Ib2) RC
Vo / Io = Vi - Ibr i/ (β2β1Ib1)
= (-Ib2 + β2Ib2) RC = Ib1(β2 -1) RC
Zo = r i/(β2β1) rb1
Vo = (β2Ib2) RC
C1B2
Ib1
ri
B2
ri Ib2 RB
E2 B1 IB1
Ib1r i = Vi - Vo Ib1r i = Vi - β2(β1Ib1) RC Vi = Ib1r i + β2(β1Ib1) RC Vi = Ib1 (r i + β2β1RC) Vi / Ib1 = (r i + β2β1RC) Zi = RB//(r i + β2β1RC)
Vo
B2 Ib2
AC Voltage Gain (AV): Vo = -ICRC =(-β1Ib1 + β2Ib1) RC Vo = (-β1Ib1 + β2β1Ib1) RC Vo = Ib1(-β1+ β2β1) RC))
+ Vo RB Vi
--
IC B1 Ib1
Vo = Ib1(β1 (-1+ β2)RC)
IB/Ii = RB/(RB+ Zi)
Vo = Ib(β1β2RC)
Io/Ib1 =β1β2 Ai =β1β2RB/(RB+ Zi)
Ib = Vi/(β1β2)RC) Ib = Vi - Vo/ r i
AV = Vo/Vi =1/(1+ r i/(β1β2RC)) AV =1/(β1β2RC+ r i/(β1β2RC))
Vo = Vi – Ibr i Vo = Vi - Vor i/(β1β2RC) Vi = Vo + Vor i/(β1β2RC) Vi = Vo (1+ r i/(β1β2RC))
AV =β1β2RC/(β1β2RC+ r i)
Rc
Ex. Calculate the ac circuit values of Z i, Zo, Ai, and Av. Assume that r i =3KΩ Solution: Zi = (2MΩ)//(140)(180)(75Ω) Zi = 971.722KΩ Zo = 3KΩ /(140)(180) Zo = 119.048x10-3 AV =(140)(180)(75Ω) /(140)(180)(75Ω) + 3KΩ AV = 998.42x10-3 Ai =(140)(180)(75Ω)/(75Ω + 971.722KΩ) Ai =16,959.864
Differential Amplifier Circuit •
If an input signal is applied to either input with the other input connected to ground, the operation is referred to as
“single ended”. •
If two opposite polarity input signals are applied, the
•
If the same input is applied to both inputs the operation
operation is referred to as “double ended”. is called “common mode”.
•
In double-ended operation, two input signals are applied, the difference of the inputs resulting in outputs from both collectors due to the difference of the signals applied to both inputs.
•
In common mode operation, the common input signals results in opposite signals at each collector, there signals canceling so that the resulting output signals is zero.
•
The main feature of the differential amplifier is the very large gain when opposite signals are applied to the inputs as compared to the very small gain resulting from common inputs.
•
Common-Mode rejection ratio
–
Ratio of the difference gain to common gain.
DC bias
Vee Ie
Ie Re Ve
Vee
Ve
Re
Ve
Vb
Vbe
Ve
0.7
0
Calculate Ie & Re
Ie
Vee Ve Re
9V 0.7V 3.3k
2.52mA
Ie 2.52mA Vc Vcc Rc 9V 3.9k 4.09V 2 2
Ar I b1 r i1
V i V i
V i 2r i
I c V c V o V o Av
?
I b 2 r i2
I b r i
2 I b r i
I b ri
I b r i
0
0
I b
I b
I c Rc
I b Rc V Rc i
2r i
V o
Rc 2r i
Rc 2 r e
Rc 2r e
Calculate the single end output voltage I e
I c re
V ee V e Re I e 2
43k
193.02 A 2
26mV 96.51 A
Av
9V 0.7V
2 269.39
ViAv Vo
96.51 A
259.39
47 k
2mV 87.25 Vo
Vo 179.46mV
193.02 A
87.25
Low Frequency Response – BJT Amplifier Vcc
Rs
R1
Cs
Rc
system Vo
Ri Vs
Cs
Vi
R2
RL Re
Ce
Vs
Ri Ri V s V i V s V i Ri R s Ri R s jXc
Effect of Cs on Low frequency Response
f lc
1 2 ( R s Ri )C s
Rs
R1R2
Cc
hie = Bre
VL
system
Ro
Vs
Ri
Vi
R1 // R2 // re
Ri Rs Ri jXcs
RL
Vo
Can be establish for capacitive element and the at which the output voltage drops to 0.707 of its maximum value flc
1
2 Ro
Ro
Ro Cc
R L // ro
•
3dB drop in gain from the mid band level when f=f1 an Rc network will determine the low frequency cut-off frequency for a BJT transistor, fm will be Av= -3dB
R / R 1 1 1 V i R / R jX c / R 1 jX c 1
V o
R
wc
1
1
1 wRc
1
1 j
1 2 fRc
1 1 j
R Av
V o V i
1
11 1
Av 20 log
2
1 2
3dB fi f
1
Av 20 log
1
2 2 fi 1 f
fi ; fi f f
Av 20 log
2 fi 20 log1 f
1 2
2 fi Av 10 log1 f ;
fi f
1
fi 2 1 f
2
F1/10
F1/4
F1/2
f1
2f1
3f1
-3dB -9dB -6dB -12dB -15dB -18dB -21dB
Actual frequency response Frequency Response
Ex. Determine the lower cut off frequency using: Cs= 10µF Rs= 1KΩ RL= 2.2KΩ ß= 100 Cc= 1µF
Vcc
R1
Rc Vo
Cs
Rs
Vi
R2
RL Re
Vs
Ce= 20µF R1= 40KΩ R2= 10KΩ ro=100
Ce
R2
V th
R2
R1
Rth
R2
// R1
V th
I b
I e
re
Z i
RTH
Rth
fle
fls
AV
10 K 20V 10 K 40 K
V BE
( 1) R E
26mV
10 K //
( 1) I b
flc
A
V cc
I e
1.59mA
R L )C c
1 2 ( Re )C E
RC
re R1
4v 0.7 8 K (100 1)(2 K
16.34
A 15.71
1.59mA
1.357 K
1 2 (1 K 2.2 K )(1 F )
2 ( 24.93)(20 F )
Z i )C s
// R L
3 K
1
1 2 ( R s
4V
8 K //(100)(16.34)
1 2 ( Rc
(100 1)(15.71 A)
26mV
// re
40 K
327 Hz
1 2 (1 K 1.36 K )(10 F )
( 4 K )
//( 2.2 K )
15.76 K 1.32 K
90
51 21
25.67 Hz
6.74 Hz
OP-Amps Basics •
A very high gain differential amplifier with a very high input impedance and low output impedance. 1. provide voltage amplitude changes 2. oscillator 3.Filter circuits 4. Instrumental circuits IN 1
IN 2
Single ended input (Mode) •
Results when the input signal is connected to one input with the other input connected to ground.
Vo
•
Differential Mode, two opposite-polarity (out if phase signals are applied to the inputs. Referred as doubleended). Vout Vd
VIN 2
Common Mode Input Voltage Range •
Range of input voltages which, when applied to both input Will not cause clipping or other output distortion.
•
Input offset voltage
–
•
Input offset voltage drift
–
•
Differential dc voltage required between the inputs to force the output to zero volts. Specifies how much change occurs in the input offset voltage for each degree change in temperature
Input Bias Current
–
dc current required by the inputs of the amplifier to properly operate the first stage I Bias
I 1 I 2 2
•
Input impedance (differential input impedance)
– •
Total resistance between the inverting and noninverting inputs
Input offset current
–
Difference of the input bias currents I d
| I 1
I 2
Zo = 0
|
Output Impedance Vout Vd
VIN 2
Common mode operation -Two inputs one equally amplified and since they result in opposite polarity signals at the output, these signals cancel and results in 0V output.
•
Common mode rejection(CMRR)
Vo
– Amplifier the difference signal while rejecting the common signal at the two inputs.
Differential and Common Mode Operation Differential inputs – difference of two signals
V d
V i1
V i2
•
Common Input
– Average of the two signals V c
1 2
(V i1 V i 2 )
Output voltage
V o
Ad V d AcV c
CMRR – Common Mode Rejection Ratio CMRR
CMRR
V o
Ad Ac
20 log10
A V 1 V c Ad V d 1 c c Ad V d 1 Ad V d CMRR V d
V c Ad V d 1 CMRR (V d )
Ad Ac
Vd = differential voltage Vc = common voltage Ad = differential gain Ac = common gain
Determine the out voltage of an op-amp for input voltages of Vi1 = 150µV, Vi2 = 140µV. The amplifier has a differential gain of Ad = 4000 and CMRR is (a) 100 (b)10^5
•
Solution:
V c
V d
V i1 V i 2
V i1 V i 2
2
150 V 140 V
145 V
2 150 V 140 V 10 V
V c 145 V 45.8mV (a)V o Ad V d 1 (4000)(10 V ) 1 (100)(10 V ) CMRRV d 145 V 40mV (b)V o (4000)(10 V ) 1 5 (10 )(10 V )
•
Slew Rate
–
Maximum rate of change of the output voltage in response to a step input voltage SR
V o t
Ex: Given:
10 9
-9 10
•
Negative Feedback –
The inverting (-) input effectively makes the feedback signal 180° out of phase with the input signal. Vo
negative feedback
•
Closed Loop Voltage Gain –
•
Voltage gain of an op-amp with external feedback.
Non-Inverting Amplifier –
Op-amp connected in a closed loop configuration.
V f ? Vin
Ri V Ri R f o (V i V f ) Acl Acl V i Acl BV o
V f
Vo
V o Rl
V o Acl BV o Acl V i V o (1 Acl B ) Acl V i V o
ri
V i
B
Acl 1 Acl B
Acl Acl B
1 B
Ri Ri R f
V f V o B Acl
R f Ri Ri
or 1
R f Ri
Determine the gain of the amplifier. The open loop voltage gain of the op-amp Vin
Vo
Rf = 100K
ri =4.7K
Acl ( NI ) 1
100 K 4.7 K
22.28
•
Voltage Follower – A special case of a non-inverting amplifier where all of the output voltage is fed back to the inverting (-) in polarity by a straight connection.
Acl(VF) =1
Inverting Amplifier •
Configuration where there is a controlled amount of change of voltage gain. Rf
I i Vo
Ri Acl(VF) =1
Vin
oV
V in Rin V o V i Acl
I f
R f
R f
Ri
V o
R f
Ri
Given the op-amp configuration. Determine the value of Rf required to produced a closed loop gain of 100. Rf Ri 2.2kΩ
R f
Acl Ri (100)(2.2 K )
220 K
Impedance of a non-inverting Amplifier •
Vin
Vo
Input Impedance
Rf Vd
ri
V i
V d V f V d BV o
V o
(V i
V f ) Acl
V i
V d B (V o Acl )
V o
(V i
V o B ) Acl
V i
V d BV d Acl
V o
V i Acl
V d V i
V i I i Z i (
I i Ri
V d (1 BAcl ) I i Z i (1 Acl B )
V o (1 BAcl )
Z i (1 Acl B )
)
Z i ( ) (1 Acl B)
V o BAcl
V i Acl
I o Z o (1 Acl B ) Z o
V i Acl
V i Acl (1 Acl B ) I o
Z o ( NI )
Z o 1 Acl B
•
Determine the input and output impedance of the amplifier. The Op-amp data sheets gives open loop
Zin=2MΩ, Zout=75Ω and Acl=200,000. find the closed loop voltage gain. Vin
Vo
Rf = 220
ri =16K
Basic Op-Amps Circuits •
Comparator
–
To determine when an input voltage exceeds a certain level. The (-) inverting input is granted to produce a zero level and that the input signal voltage is applied to the (+) non-inverted input. Vin
Acl(VF) =1
Vout Vout max
Vout
Vout max
Non-Zero level Detection •
The level detector can be modified to detect voltages other than zero by connecting a fixed reference voltage R source to the (-) inverting Input. V 2
o
R1 R2
Acl(VF) =1
(b) Voltage divider reference +
--
Zener diode acts reference voltage
•
The Input signal is applied to the comparator circuit make a sketch of the output showing its proper relationship to the input signal. Assume the maximum output levels of the op amp are 12V. R1
Vout
2K
12V
1K
V ref 5V
Vin
12V -12V
1.63V
1k 8.2k 1k
15V 1.630V
Summing amplifier •
Has two or more inputs, its output voltage is proportional to the negative of the algebraic sum of its input voltage.
•
Summing Amplifier with voltage gain. V i V i I t R R 2 1
Rf
R f V i V o V R i f R R1 1 R1
i1
Vout
V i
V o R f
R1
12V
R2
1
V i 2
Else if Rf = R1=R2 i2
V in1 V in 2 R R f f V o (V in1 V in 2 ) V o R f
R2
Summing amplifier with gain greater unity 10K
1K
Vout
0.2
12V
1k 0.5
0.2V 0.5V 10k 1k 1k V ou t 7V V ou t
