INDIABIX-PART-3-ELEX-MCQs-080918.pdf

τµΩ INDIABIX ELECTRONICS PART 2

RC CIRCUITS 1. In a 20 Vac series RC circuit, if 20 V is read across the resistor and 40 V is measured across the capacitor, the applied voltage is A. 45 Vac B. 50 Vac C. 60 Vac D. 65 Vac 2.Which of the following is the reference vector for parallel RC circuits? A. R B. V C. I D. XC 3. What is the voltage drop across R1 in the given circuit?

7. Calculate the phase angle in the given circuit.

12. What is the total current in the given circuit?

A. B. C. D.

A. B. C. D.

0° 90° 22.52° 67.48°

8. What is the phase angle for a parallel circuit consisting of a 500 kHz, 5 Vac source with a 47 pF capacitor, and a 4.7 kΩ resistor in parallel? A. 55.3° B. –55.3° C. 34.8° D. –34.8° 9.

A. B. C. D.

10 V 4.80 V 4.00 V 5.80 V

4. Power that is measured in voltamperes is called A. impedance power B. reactive power C. true power D. apparent power

Which circuit is represented by the frequency response curve in the given figure? A. High-pass filter B. Low-pass filter C. Band-pass filter D. Band-stop filter

A. B. C. D.

6. Calculate the magnitude of the impedance in the given circuit.

11. What is the current through XC1 in the given circuit?

24.1 MΩ 10 MΩ 26.1 MΩ

0Ω

13. Which statement about a series RC circuit is true? A. The capacitor's voltage drop is in phase with the resistor's voltage drop. B. The current leads the source voltage. C. The current lags the source voltage. D. The resistor voltage lags the current. 14. If the frequency increases in the given circuit, how would the total current change?

5. As frequency increases A. both series and parallel RC impedance decrease B. series RC impedance decreases and parallel RC impedance increases C. series RC impedance increases and parallel RC impedance decreases D. both series and parallel RC impedance increase

A. B. C. D.

0.28 A 0.399 A 909 A 0.2 A

10. What is the phase angle in the given circuit?

A. B. C. D.

14.95° 36.88° 0° 90°

32.2 mA 16 mA 12 ma 48 mA

A. B. C. D.

The total current would increase. The total current would decrease. The total current would remain the same. More information is needed in order to predict how the total current would change.

15. What is the effect of increasing the resistance in a series RC circuit? A. There will be no effect at all. B. The current will increase. C. The phase shift will decrease. D. The input voltage will increase.

RL CIRCUITS 1. As frequency increases A. both series and parallel RL impedance decrease B. series RL impedance decreases and parallel RL impedance increases

C.

D.

series RL impedance increases and parallel RL impedance decreases both series and parallel RL impedance increase

2. Calculate the voltage dropped across R1 in the given circuit.

7. What is the magnitude of the phase angle of a 24 Vac parallel RL circuit when R = 45 Ω and XL = 1100 Ω? A. 0.001° B. 2.3° C. 87.6° D. 89.9° 8. Which of the following statements is true if the frequency decreases in the circuit in the given circuit?

A. B. C. D.

14 V 26.8 V 28 V 0V

3. What is the true power of a 24 Vac parallel RL circuit when R = 45 Ω and XL = 1100 Ω? A. 313.45 W B. 12.8 W C. 44.96 W D. 22.3 W 4. If XL= 100 Ωand R = 100Ω , then impedance will be A. 141.4 Ω B. 14.14 Ω C. 100 Ω D. 200 Ω 5. Which of the following statements is true if the inductor shorts out in the circuit in the given circuit?

A. B. C. D.

Each component drops 5 V. The impedance equals 0 Ω. The power factor equals 1. The phase angle equals 90°.

6. Calculate the voltage dropped across L2 in the given circuit.

A. B. C. D.

18 V 6V 13.5 V 0V

τµΩ INDIABIX ELECTRONICS PART 2 A. An increase in frequency causes an increase in phase lag. B. An increase in frequency causes an increase in the magnitude of the output voltage. C. A decrease in frequency causes an increase in phase lag. D. A decrease in frequency causes a decrease in the magnitude of the output voltage.

TRANSFORMERS A. B. C. D.

The phase angle decreases. VR decreases. IT decreases. VS decreases.

9. What is the magnitude of the phase angle between the source voltage and current when a 100 mH inductor with an inductive reactance of 6 kΩ k Ω and a 1 kΩ kΩ resistor are in series with a source? A. 0.1° B. 9.0° C. 61.0° D. 81.0° 10. Which of the following statements is true if R1 opens in the circuit in the given circuit?

A. B. C. D.

IL2 increases. ZT decreases. VS increases. VL1 equals 0 V.

11. Which of the following statements is true if R = 100 Ω and XL = 100 Ωin the circuit in the given circuit?

A. B. C. D.

Each component drops 5 V. The impedance equals 200 Ω. The power factor equals 1. The phase angle equals 45°.

12. Which of the following statements is true about a lag network?

1. When does maximum power transfer happen from the source to the load? A. When the source resistance is greater than the load resistance B. When the source resistance is less than the load resistance C. When there is negligible source resistance D. When the source resistance equals the load resistance 2. A transformer is plugged into a 120 V rms source and has a primary current of 300 mA rms. The secondary is providing 18 V across a 10 Ω load. What is the efficiency of the transformer? A. 88% B. 90% C. 92% D. 95% 3. The coefficient of coupling between two coils is 0.45. The first coil has an inductance of 75 mH and the second coil has an inductance of 105 mH. What is the mutual inductance between the coils? A. 3.54 mH B. 7.88 mH C. 39.9 mH D. 189.3 mH 4. Increasing the number of turns of wire on the secondary of a transformer will A. increase the secondary current B. decrease the secondary current C. have no effect on the secondary current D. increase the primary current 5. What is the turns ratio of the transformer needed to match a 1 kΩ source resistance to a 160 Ω load?

A. B. C. D.

2.5:1 0.4:1 6.25:1 16:1

6. What is the secondary voltage in the given circuit?

11. A special transformer used to convert unbalanced signals to balanced signals is the A. balun B. autotransformer C. center-tapped transformer D. step-across transformer 12. If the load doubled in value in the given circuit, what reflected resistance would the source see?

A. B. C. the D.

13.3 V rms in phase with the primary 120 V rms in phase with the primary 13.3 V rms out of phase with primary 120 V rms out of phase with the primary

7. The transformer turns ratio determines A. the ratio of primary and secondary voltages B. the ratio of primary and secondary currents C. the reflected impedance D. all of the above 8. Mutual induction is dependent on A. winding ratios B. output polarities C. dc voltage levels D. current changes 9. What is the current through the load in the given circuit?

A. B. C. D.

500 µA 10 mA 250 mA 1.25 A

10. What is the power dissipated in the primary of the transformer in the given circuit?

A. B. C. D.

25 mW 500 mW 12.5 W 62.5 W

A. B. C. D.

80 Ω

400 Ω 2 kΩ 10 kΩ

13. If the primary power of an ideal transformer having a 2:1 voltage ratio is 100 W, the secondary power is A. 100 W B. 50 W C. 75 W D. 200 W 14. A transformer has A. primary and secondary windings, both of which are considered inputs B. primary and secondary windings, both of which are considered outputs C. a primary winding used as an output and a secondary winding used as an input D. a primary winding used as an input and a secondary winding used as an output

TIME RESPONSE OF REACTIVE CIRCUITS 1.

What voltage will the capacitor charge up to in the given circuit for the single input pulse shown? A. 3.15 V

τµΩ INDIABIX ELECTRONICS PART 2 B. 4.3 V C. 4.75 V D. 4.9 V 2. If a periodic pulse waveform is applied to an RC differentiating circuit, which two conditions are possible? A. tw ≥ 5τ or tw > 5τ B. tw = 5 τ or tw > 5τ C. tw ≤ 5τ or tw < 5τ 5τ D. tw ≥ 5τ or tw < 5τ 3. An RL integrator and an RC differentiator can act as what types of filters, respectively? A. low-pass, low-pass B. low-pass, high-pass C. high-pass, high-pass D. high-pass, low-pass 4. In a repetitive-pulse RC integrator circuit, what would the steady-state voltage equal at the end of the fifth pulse? Assume a Vin of 20 V. A. 1.46 V B. 14.62 V C. 20 V D. 0V 5. What is a circuit that produces shortduration spikes? A. A trigger pulse generator B. An RL integrator C. A timing circuit D. A pulse waveform-to-dc converter

6. In the given circuit, what must the pulse width and time between pulses be to allow the capacitor to completely charge by the end of each pulse and to completely discharge between each pulse? A. 940 µs B. 2.82 ms C. 3.76 ms D. 4.7 ms

7.

τµΩ INDIABIX ELECTRONICS PART 2 The given circuit is an A. RL integrator B. RC differentiator C. RL differentiator D. RC integrator 8. Which of the following is true for a capacitor? A. A capacitor acts like a short to instantaneous changes in current. B. A capacitor's voltage cannot change instantaneously. C. A capacitor acts like an open to dc. D. All of the above 9. If the capacitor in an RC integrator shorts, the output A. is at ground B. would measure the same as the input C. would measure zero volts D. None of the above 10.

What is the voltage across the inductor in the given circuit on the falling edge of the first input pulse? A. –0.2 V B. 0.2 V C. –9.8 V D. 9.8 V

11. How long will it take the capacitor in the given circuit to discharge?

TRANSISTORS AND APPLICATIONS 1. The primary function of the bias circuit is to A. hold the circuit stable at VCC B. hold the circuit stable at vin C. ensure proper gain is achieved D. hold the circuit stable at the designed Q-point 2. A JFET A. is a current-controlled device B. has a low input resistance C. is a voltage-controlled device D. is always forward-biased

C.

D. 4. The capacitor that produces an ac ground is called a(n) A. coupling capacitor B. dc open C. bypass capacitor D. ac open 5. The formula used to calculate the approximate ac resistance of the baseemitter diode (re) is

A. B. C. D. 12.

16.4 µs 32.8 µs 65.6 µs 82 µs

Av = IC × RC

C. D.

3. A source follower has a voltage gain (Av) of A. AV = gmRd B. AV = gmRs What has the voltage across the resistor decayed to by the end of the pulse in the given circuit? A. 0V B. 0.75 V C. 5.55 V D. 14.25 V

A. B.

A. B.

re almostequal.jpg 25 mV × IC

C.

D. 6. The signal voltage gain of an amplifier, Av, is defined as:

7. In a class B push-pull amplifier, the transistors are biased slightly above cutoff to avoid A. crossover distortion B. unusually high efficiency C. negative feedback D. a low input impedance 8. The depletion-mode MOSFET A. can operate with only positive gate voltages B. can operate with only negative gate voltages C. cannot operate in the ohmic region D. can operate with positive as well as negative gate voltages 9. Three different points are shown on a dc load line. The upper point represents the A. minimum current gain B. quiescent point C. saturation point D. cutoff point 10. Which of the following conditions co nditions are needed to properly bias an npn transistor amplifier? A. Forward bias the base/emitter junction and reverse bias the base/collector junction. B. Forward bias the collector/base junction and reverse bias the emitter/base junction. C. Apply a positive voltage on the n-type material and a negative voltage on the p-type material. D. Apply a large voltage on the base. 11. Often a common-collector will be the last stage before the load; the main function of this stage is to A. provide voltage gain B. buffer the voltage amplifiers from the low-resistance load C. provide phase inversion D. provide a high-frequency path to improve the frequency response

12. In order for feedback oscillators to have any practical value, the gain has to be A. <1 B. self-adjusting C. stabilized D. nonlinear 13. To get a negative gate-source voltage in a self-biased JFET circuit, you must use a A. voltage divider B. source resistor C. ground D. negative gate supply voltage

BASIC OP-AMP CIRCUITS 1. The center frequency of a band-pass filter is always equal to the A. bandwidth B. –3 dB frequency C. bandwidth divided by Q D. geometric average of the critical frequencies

2. The formula shows that for a given capacitor, if the voltage changes at a constant rate with respect to time, the current will A. increase B. decrease C. be constant D. decrease logarithmically 3. A zero-level detector is a A. comparator with a sine-wave output B. comparator with a trip point referenced to zero C. peak detector D. limiter 4. A digital-to-analog converter is an application of the A. scaling adder B. voltage-to-current converter C. noninverting amplifier D. adjustable bandwidth circuit 5. If the value of resistor Rf in an averaging amplifier circuit is equal to the value of one input resistor divided by the number of inputs, the output will be equal to A. the average of the individual inputs

B. C. D.

the inverted sum of the individual inputs the sum of the individual inputs the inverted average of the individual inputs

6. If the input to a comparator is a sine wave, the output is a A. ramp voltage B. sine wave C. rectangular wave D. sawtooth wave 7. A basic series regulator has A. an error detector B. a load C. a reference voltage D. both an error detector and a reference voltage

τµΩ INDIABIX ELECTRONICS PART 2 13. A two-pole high-pass active filter would have a roll-off rate of A. 40 dB/decade B. –40 dB/decade C. 20 dB/decade D. –20 dB/decade

SPECIAL PURPOSE OPAMP CIRCUITS

1.

8. A comparator is an example of a(n) A. active filter B. current source C. linear circuit D. nonlinear circuit 9. Initially, the closed-loop gain (Acl) of a Wien-bridge oscillator should be A. Acl < 3 B. Acl > 3 C. 0 D. Acl 1 10. In an averaging amplifier, resistances are A. equal to the resistance B. less than the resistance C. greater than the resistance D. unequal

the input feedback feedback feedback

11. A triangular-wave oscillator can consist of an op-amp comparator, followed by a(n) A. differentiator B. amplifier C. integrator D. multivibrator 12. The ramp voltage at the output of an op-amp integrator A. increases or decreases at a linear rate B. increases or decreases exponentially C. is always increasing and never decreasing D. is constant

Which circuit is known as a current-tovoltage converter? A. a B. b C. c D. d 2. When using an OTA in a Schmitttrigger configuration, the trigger points are controlled by A. the Iout B. the Ibias C. the Vout D. both Iout and Ibias

3.

Refer the given circuits. Which circuit is known as an OTA?

A. B. C. D.

a b c d

4. This circuit is a setup for

8. An instrumentation amplifier has a high A. output impedance B. power gain C. CMRR D. supply voltage 9.

A. B. C. D.

This circuit is a setup for

3. A.

an antilog amplifier a constant-current source an instrumentation amplifier an isolation amplifier

B. A. B. C. D.


10. Circuits that shift the dc level of a signal are called A. limiters B. clampers C. peak detectors D. dc converters

5.

11. The voltage gain of an OTA can be calculated using the formula A. Which circuit is known as a voltage-tocurrent converter? A. a B. b C. c D. d

B.

6. The primary function of the oscillator in an isolation amplifier is to A. convert dc to high-frequency ac B. convert dc to low-frequency ac C. rectify high-frequency ac to dc D. produce dual-polarity dc voltages for the input to the demodulator

12. In the classic three-op-amp instrumentation amplifier, the differential voltage gain is usually produced by the A. first stage B. second stage C. mismatched resistors D. output op-amp

7. Refer to Figure 20-2. This circuit is a setup for

ANALOG TO DIGITAL

A. B. C. D.


τµΩ INDIABIX ELECTRONICS PART 2 2. Which of the following characterizes an analog quantity? A. Discrete levels represent changes in a quantity. B. Its values follow a logarithmic response curve. C. It can be described with a finite number of steps. D. It has a continuous set of values over a given range.

C. D.

ASCII stands for: American Serial Communication Interface Additive Signal Coupling Interface American Standard Code for Information Interchange none of the above

4. Which type of signal is represented by discrete values? A. noisy signal B. nonlinear C. analog D. digital 5. A data conversion system may be used to interface a digital computer system to: A. an analog output device B. a digital output device C. an analog input device D. a digital printer

NUMBER SYSTEMS AND CODES

C. D.

1. The two basic types of signals are analog and: A. digilog B. digital C. vetilog D. sine wave

1. Base 10 refers to which number system? A. binary coded decimal B. decimal C. octal D. hexadecimal 2. Convert the decimal number 151.75 to binary. A. 10000111.11 B. 11010011.01 C. 00111100.00 D. 10010111.11 3. Convert the binary number 1011010 to hexadecimal. A. 5B B. 5F C. 5A D. 5C

4. The number of bits used to store a BCD digit is: A. 8 B. 4 C. 1 D. 2 5. Sample-and-hold circuits in ADCs are designed to: A. sample and hold the output of the binary counter during the conversion process B. stabilize the ADCs threshold voltage during the conversion process C. stabilize the input analog signal during the conversion process D. sample and hold the ADC staircase waveform during the conversion process 6. The weight of the LSB as a binary number is: A. 1 B. 2 C. 3 D. 4 7. What is the difference between binary coding and binary coded decimal? A. Binary coding is pure binary. B. BCD is pure binary. C. Binary coding has a decimal format. D. BCD has no decimal format. 8. Convert the binary number 1001.0010 to decimal. A. 125 B. 12.5 C. 90.125 D. 9.125 9. Convert 11001001 2 (binary) decimal. A. 201 B. 2001 C. 20 D. 210

to

10. What is the decimal value of the hexadecimal number 777? A. 191 B. 1911 C. 19 D. 19111 11. What is the resultant binary of the decimal problem 49 + 1 =? A. 01010101

B. C. D.

00110101 00110010 00110001

12. 3428 is the decimal value for which of the following binary coded decimal (BCD) groupings? A. 11010001001000 B. 11010000101000 C. 011010010000010 D. 110100001101010 13. What is the result when a decimal 5238 is converted to base 16? A. 327.375 B. 12166 C. 1388 D. 1476

LOGIC GATES 1. The output will be a LOW for any case when one or more inputs are zero in a(n): A. OR gate B. NOT gate C. AND gate D. NAND gate 2. If a signal passing through a gate is inhibited by sending a low into one of the inputs, and the output is HIGH, the gate is a(n): A. AND B. NAND C. NOR D. OR 3. A single transistor can be used to build which of the following digital logic gates? A. AND gates B. OR gates C. NOT gates D. NAND gates

τµΩ INDIABIX ELECTRONICS PART 2 6. Exclusive-OR (XOR) logic gates can be constructed from what other logic gates? A. OR gates only B. AND gates and NOT gates C. AND gates, OR gates, and NOT gates D. OR gates and NOT gates 7. How many truth table entries are necessary for a four-input circuit? A. 4 B. 8 C. 12 D. 16 8. A NAND gate has: A. LOW inputs and a LOW output B. HIGH inputs and a HIGH output C. LOW inputs and a HIGH output D. None of these 9. The basic logic gate whose output is the complement of the input is the: A. OR gate B. AND gate C. INVERTER gate D. comparator 10. What input values will cause an AND logic gate to produce a HIGH output? A. At least one input is HIGH. B. At least one input is LOW. C. All inputs are HIGH. D. All inputs are LOW.

LOGIC CIRCUIT SIMPLIFICATION

4. The logic gate that will have HIGH or "1" at its output when any one of its inputs is HIGH is a(n): A. OR gate B. AND gate C. NOR gate D. NOT gate

1. Which statement below best describes a Karnaugh map? A. It is simply a rearranged truth table. B. The Karnaugh map eliminates the need for using NAND and NOR gates. C. Variable complements can be eliminated by using Karnaugh maps. D. A Karnaugh map can be used to replace Boolean rules.

5. How many NAND circuits are contained in a 7400 NAND IC? A. 1 B. 2 C. 4 D. 8

2. Which of the examples below expresses the commutative law of multiplication? A. A+B=B+A B. A•B=B+A C. A • (B • C) = (A • B) • C

D.

A•B=B•A

3.The Boolean expression is logically equivalent to what single gate? A. NAND B. NOR C. AND D. OR 4. The observation that a bubbled input OR gate is interchangeable with a bubbled output AND gate is referred to as: A. a Karnaugh map B. DeMorgan's second theorem C. the commutative law of addition D. the associative law of multiplication 5. The systematic reduction of logic circuits is accomplished by: A. symbolic reduction B. TTL logic C. using Boolean algebra D. using a truth table 6. Logically, the output of a NOR gate would have the same Boolean expression as a(n): A. NAND gate immediately followed by an INVERTER B. OR gate immediately followed by an INVERTER C. AND gate immediately followed by an INVERTER D. NOR gate immediately followed by an INVERTER 7. Which of the examples below expresses the distributive law of Boolean algebra? A. A • (B • C) = (A • B) + C B. A + (B + C) = (A • B) + (A • C) C. A • (B + C) = (A • B) + (A • C) D. (A + B) + C = A + (B + C) 8. Which output expression might indicate a product-of-sums circuit construction? A. B. C. D. 9. One of DeMorgan's theorems states that

. Simply stated, this

means that logically there is no difference between: A. a NAND gate and an AND gate with a bubbled output B. a NOR gate and an AND gate with a bubbled output C. a NOR gate and a NAND gate with a bubbled output D. a NAND gate and an OR gate with a bubbled output 10. The commutative law of addition and multiplication indicates that: A. the way we OR or AND two variables is unimportant because the result is the same B. we can group variables in an AND or in an OR any way we want C. an expression can be expanded by multiplying term by term just the same as in ordinary algebra D. the factoring of Boolean expressions requires the multiplication of product terms that contain like variables 11. Which of the following expressions is in the sum-of-products (SOP) form? A. Y = (A + B)(C + D) B. Y = AB(CD) C. D.

STANDARD LOGIC DEVICES (SLD) 1. A digital logic device used as a buffer should have what input/output characteristics? A. high input impedance and high output impedance B. low input impedance and high output impedance C. low input impedance and low output impedance D. high input impedance and low output impedance 2. What is the standard TTL noise margin? A. 5.0 V B. 0.2 V C. 0.8 V D. 0.4 V 3. The range of a valid LOW input is:

τµΩ INDIABIX ELECTRONICS PART 2 A. 0.0 V to 0.4 V B. 0.4 V to 0.8 V C. 0.4 V to 1.8 V D. 0.4 V to 2.4 V 4. When an IC has two rows of parallel connecting pins, the device is referred to as: A. a QFP B. a DIP C. a phase splitter D. CMOS 5. Which digital IC package type makes the most efficient use of printed circuit board space? A. SMT B. TO can C. flat pack D. DIP 6. The problem of interfacing IC logic families that have different supply voltages (VCCs) can be solved by using a: A. level-shifter B. tri-state shifter C. translator D. level-shifter or translator 7. Ten TTL loads per TTL driver is known as: A. noise immunity B. power dissipation C. fanout D. propagation delay 8. Which of the following summarizes the important features of emittercoupled logic (ECL)? A. negative voltage operation, high speed, and high power consumption B. good noise immunity, negative logic, high frequency capability, low power dissipation, and short propagation time C. slow propagation time, high frequency response, low power consumption, and high output voltage swings D. poor noise immunity, positive supply voltage operation, good low-frequency operation, and low power 9. What quantities must be compatible when interfacing two different logic families? A. only the currents

B. C. D.

both the voltages and the currents only the voltages both the power dissipation and the impedance

10. CMOS logic is probably the best allaround circuitry because of its: A. packing density B. low power consumption C. very high noise immunity D. low power consumption and very high noise immunity 11. Low power consumption achieved by CMOS circuits is due to which construction characteristic? A. complementary pairs B. connecting pads C. DIP packages D. small-scale integration 12. A TTL totem pole circuit is designed so that the output transistors are: A. always on together B. providing phase splitting C. providing voltage regulation D. never on together 13. The time needed for an output to change as the result of an input change is known as: A. noise immunity B. fanout C. propagation delay D. rise time

PROGRAMMABLE LOGIC DEVICES (PLD) 1. Which type of PLD should be used to program basic logic functions? A. PLA B. PAL C. CPLD D. SLD 2. The content of a simple programmable logic device (PLD) consists of: A. fuse-link arrays B. thousands of basic logic gates C. advanced sequential logic functions D. thousands of basic logic gates and advanced sequential logic functions 3. Once a PAL has been programmed:

A. B. C. D.

it cannot be reprogrammed. its outputs are only active HIGHs its outputs are only active LOWs its logic capacity is lost

4. The complex programmable logic device (CPLD) contains several PLD blocks and: A. field-programmable switches B. AND/OR arrays C. a global interconnection matrix D. a language compiler 5. PLAs, CPLDs, and FPGAs are all which type of device? A. SLD B. PLD C. EPROM D. SRAM 6. The difference between a PLA and a PAL is: A. the PLA has a programmable OR plane and a programmable AND plane, while the PAL only has a programmable AND plane B. the PAL has a programmable OR plane and a programmable AND plane, while the PLA only has a programmable AND plane C. the PAL has more possible product terms than the PLA D. PALs and PLAs are the same thing.

TESTING AND TROUBLESHOOTING 1. A series of gradually decreasing sine wave oscillations is called: A. ringing B. slew C. overshooting D. undershooting 2. The determination of a digital signal's frequency and waveshape is best accomplished with which test equipment? A. an oscilloscope B. a multimeter C. a spectrum analyzer D. a frequency generator

τµΩ INDIABIX ELECTRONICS PART 2 3. A logic probe is placed on the output of a gate and the display indicator is dim. A logic pulser is used on each of the input terminals, but the output indication does not change. What is wrong? A. The dim indication on the logic probe indicates that the supply voltage is probably low. B. The output of the gate appears to be open. C. The LOW indication is the result of a bad ground connection on the logic probe. D. The gate is a tri-state device. 4. A +5 V PCB power source that has been "pulled down" to a +3.4 V level may be due to: A. a circuit open B. a faulty regulator C. the half-split method D. a circuit short 5. Measurement of pulse width should be taken at a 50% mean of the: A. overshoot and undershoot B. rise and fall C. damping and ringing D. leading and trailing amplitude 6. Which test equipment best allows a comparison between input and output signals? A. an oscilloscope B. a logic probe C. a spectrum analyzer D. a multitrace oscilloscope 7. The duty cycle of a pulse is determined by which formula? A.

Duty Cycle =

B.

Duty Cycle =

C.

Duty Cycle =

D.

Duty Cycle =

8. What is the next step after discovering a faulty gate within an IC? A. repair the gate B. resolder the tracks C. replace the IC involved D. recheck the power source 9. The use of a multimeter with digital circuits allows the measurement of: A. pulse width

B. voltage or resistance C. current D. pulse trains 10. The use of triggered sweep when using an oscilloscope provides more accuracy in which area? A. frequency B. amplitude C. graticule activity D. timing 11. The time needed for a pulse to increase from 10% to 90% of its amplitude defines: A. pulse width B. propagation delay C. rise time D. duty cycle 12. Which device would best aid in shorted track detection? A. multimeter B. current tracer C. logic pulser D. oscilloscope

COMBINATIONAL LOGIC CIRCUITS 1. How many inputs are required for a 1of-10 BCD decoder? A. 4 B. 8 C. 10 D. 1 2. Most demultiplexers facilitate which of the following? A. decimal to hexadecimal B. single input, multiple outputs C. ac to dc D. odd parity to even parity 3. One application of multiplexer is to facilitate: A. code conversion B. parity checking C. parallel-to-serial conversion D. data generation

a

digital

data

4. Select one of the following statements that best describes the parity method of error detection: A. Parity checking is best suited for detecting single-bit errors in transmitted codes. B. Parity checking is best suited for detecting double-bit errors

C.

D.

that occur during the transmission of codes from one location to another. Parity checking is not suitable for detecting single-bit errors in transmitted codes. Parity checking is capable of detecting and correcting errors in transmitted codes.

5. A multiplexed display: A. accepts data inputs from one line and passes this data to multiple output lines B. uses one display to present two or more pieces of information C. accepts data inputs from multiple lines and passes this data to multiple output lines D. accepts data inputs from several lines and multiplexes this input data to four BCD lines 6. When two or more inputs are active simultaneously, the process is called: A. first-in, first-out processing B. priority encoding C. ripple blanking D. priority decoding 7. Which type of decoder will select one of sixteen outputs, depending on the 4bit binary input value? A. hexadecimal B. dual octal outputs C. binary-to-hexadecimal D. hexadecimal-to-binary 8. A magnitude comparator determines: A. A ≠ B and if A α B or A >> B B. A ≈ B and if A > B or A < b C. A = B and if A > B or A < b D. A B and if A < b or a > B 9. A circuit that responds to a specific set of signals to produce a related digital signal output is called a(n): A. BCD matrix B. display driver C. encoder D. decoder 10. Which digital system translates coded characters into a more intelligible form? A. encoder B. display C. counter D. decoder

τµΩ INDIABIX ELECTRONICS PART 2 11. A basic multiplexer principle can be demonstrated through the use of a: A. single-pole relay B. DPDT switch C. rotary switch D. linear stepper 12. In a BCD-to-seven-segment converter, why must a code converter be utilized? A. No conversion is necessary. B. to convert the 4-bit BCD into gray code C. to convert the 4-bit BCD into 10-bit code D. to convert the 4-bit BCD into 7-bit code

FLIP FLOPS AND TIMERS 1. Which of the following is correct for a gated D-type flip-flop? A. The Q output is either SET or RESET as soon as the D input goes HIGH or LOW. B. The output complement follows the input when enabled. C. Only one of the inputs can be HIGH at a time. D. The output toggles if one of the inputs is held HIGH. 2. When both inputs of a J-K flip-flop cycle, the output will: A. be invalid B. not change C. change D. toggle 3. Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature? A. asynchronous operation B. low input voltages C. gate impedance D. cross coupling 4. The 555 timer can be used in which of the following configurations? A. astable, monostable B. monostable, bistable C. astable, toggled D. bistable, tristable 5. A basic S-R flip-flop can be constructed by cross-coupling which basic logic gates? A. AND or OR gates

B. C. D.

XOR or XNOR gates NOR or NAND gates AND or NOR gates

6. One example of the use of an S-R flipflop is as a(n): A. transition pulse generator B. astable oscillator C. racer D. switch debouncer 7. If both inputs of an S-R NAND latch are LOW, what will happen to the output? A. The output would become unpredictable. B. The output will toggle. C. The output will reset. D. No change will occur in the output. 8. The equation for the output frequency of a 555 timer operating in the astable mode is: What value of C1 will be required if R1 = 1 kΩ , R2 = 1 kΩ, and f = 1 kHz? A. 0.33 µF B. 0.48 µF C. 480 µF D. 33 nF 9. An astable multivibrator is a circuit that: A. has two stable states B. is free-running C. produces a continuous output signal D. is free-running and produces a continuous output signal

A. B.

C.

D.

There is no known significance in their designations. The J represents "jump," which is how the Q output reacts whenever the clock goes HIGH and the J input is also HIGH. The letters represent the initials of Johnson and King, the coinventors of the J-K flip-flop. All of the other letters of the alphabet are already in use.

13. Which of the following describes the operation of a positive edge-triggered D-type flip-flop? A. If both inputs are HIGH, the output will toggle. B. The output will follow the input on the leading edge of the clock. C. When both inputs are LOW, an invalid state exists. D. The input is toggled into the flip-flop on the leading edge of the clock and is passed to the output on the trailing edge of the clock. 14. What is one disadvantage of an S-R flip-flop? A. It has no Enable input. B. It has a RACE condition. C. It has no clock input. D. It has only a single output.

SEQUENTIAL LOGIC CIRCUITS

10. What is another name for a oneshot? A. monostable B. bistable C. astable D. tristable

1. A ripple counter's speed is limited by the propagation delay of: A. each flip-flop B. all flip-flops and gates C. the flip-flops only with gates D. only circuit gates

11. The truth table for an S-R flip-flop has how many VALID entries? A. 3 B. 1 C. 4 D. 2

2. To operate correctly, starting a ring counter requires: A. clearing all the flip-flops B. presetting one flip-flop and clearing all the others C. clearing one flip-flop and presetting all the others D. presetting all the flip-flops

12. What is the significance of the J and K terminals on the J-K flip-flop?

3. What type of register would shift a complete binary number in one bit at a time and shift all the stored bits out one bit at a time?

τµΩ INDIABIX ELECTRONICS PART 2 A. PIPO B. SISO C. SIPO D. PISO 4. Synchronous counters eliminate the delay problems encountered with asynchronous (ripple) counters because the: A. input clock pulses are applied only to the first and last stages B. input clock pulses are applied only to the last stage C. input clock pulses are not used to activate any of the counter stages D. input clock pulses are applied simultaneously to each stage 5. One of the major drawbacks to the use of asynchronous counters is that: A. low-frequency applications are limited because of internal propagation delays B. high-frequency applications are limited because of internal propagation delays C. Asynchronous counters do not have major drawbacks and are suitable for use in high- and low-frequency counting applications. D. Asynchronous counters do not have propagation delays, which limits their use in high- frequency applications. 6. Which type of device may be used to interface a parallel data format with external equipment's serial format? A. key matrix B. UART C. memory chip D. serial-in, parallel-out 7. When the output of a tri-state shift register is disabled, the output level is placed in a: A. float state B. LOW state C. high impedance state D. float state and a high impedance state 8. A comparison between ring and johnson counters indicates that:

A.

B. C.

D.

a ring counter has fewer flipflops but requires more decoding circuitry a ring counter has an inverted feedback path a johnson counter has more flip-flops but less decoding circuitry a johnson counter has an inverted feedback path

9. A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit? A. shift register sequencer B. clock C. johnson D. binary 10. What is meant by parallel-loading the register? A. Shifting the data in all flipflops simultaneously B. Loading data in two of the flip-flops C. Loading data in all four flipflops at the same time D. Momentarily disabling the synchronous SET and RESET inputs 11. What is a shift register that will accept a parallel input and can shift data left or right called? A. tri-state B. end around C. bidirectional universal D. conversion 12. What happens to the parallel output word in an asynchronous binary down counter whenever a clock pulse occurs? A. The output word decreases by 1. B. The output word decreases by 2. C. The output word increases by 1. D. The output word increases by 2. 13. Mod-6 and mod-12 counters are most commonly used in: A. frequency counters B. multiplexed displays C. digital clocks D. power consumption

ARITHMETIC

OPERATIONS AND CIRCUITS 1. When 1100010 is divided by 0101, what will be the decimal remainder? A. 2 B. 3 C. 4 D. 6 2. What are the two types of basic adder circuits? A. half adder and full adder B. half adder and parallel adder C. asynchronous and synchronous D. one's complement and two's complement 3. Adding the two's complement of –11 + (–2) will yield which two's complement answer? A. 1110 1101 B. 1111 1001 C. 1111 0011 D. 1110 1001 4. The two's complement system is to be used to add the signed numbers 11110010 and 11110011. Determine, in decimal, the sign and value of each number and their sum. A. –14 and –13; –27 B. –113 and –114; 227 C. –27 and –13; 40 D. –11 and –16; –27 5. The fast carry or look-ahead carry circuits found in most 4-bit paralleladder circuits: A. increase ripple delay B. add a 1 to complemented inputs C. reduce propagation delay D. determine sign and magnitude 6. How many basic binary subtraction operations are possible? A. 4 B. 3 C. 2 D. 1 7. How many basic binary subtraction combinations are possible? A. 4 B. 3 C. 2 D. 1

τµΩ INDIABIX ELECTRONICS PART 2 8. Use the two's complement system to add the signed numbers 11110010 and 11110011. Determine, in decimal, the sign and value of each number and their sum. A. –14 and –13; –27 B. –113 and –114; 227 C. –27 and –13; 40 D. –11 and –16; –27 9. The selector inputs to an arithmeticlogic unit (ALU) determine the: A. selection of the IC B. arithmetic or logic function C. data word selection D. clock frequency to be used 10. Adding in binary, the decimal values 26 + 27 will produce a sum of: A. 111010 B. 110110 C. 110101 D. 101011 11. Binary subtraction of a decimal 15 from 43 will utilize which two's complement? A. 101011 B. 110000 C. 011100 D. 110001 12. When multiplying in binary the decimal values 13 × 11, what is the third partial product? A. 100000 B. 100001 C. 0000 D. 1011 13. The range of an 8-bit two's complement word is from: A. +12810 to –12810 B. –12810 to +12710 C. +12810 to –12710 D. +12710 to –12710

SEMICONDUCTOR MEMORY 1. A computerized self-diagnostic for a ROM test uses: A. the check-sum method B. a ROM listing C. ROM comparisons D. a checkerboard test 2. How many storage locations are available when a memory device has twelve address lines?

A. B. C. D.

144 512 2048 4096

D.

the EEPROM can erase and reprogram individual words without removal from the circuit

3. Which of the following memories uses a MOSFET and a capacitor as its memory cell? A. SRAM B. DRAM C. ROM D. DROM

8. Which of the following RAM timing parameters determine(s) its operating speed? A. tacc B. taa and tacs C. t1 and t3 D. trc and twc

4. Which of the following best describes nonvolatile memory? A. memory that retains stored information when electrical power is removed B. memory that loses stored information when electrical power is removed C. magnetic memory D. nonmagnetic memory

9. Memory that loses its contents when power is lost is: A. nonvolatile B. volatile C. random D. static

5. The access time (tacc) of a memory IC is governed by the IC's: A. internal address buffer B. internal address decoder C. volatility D. internal address decoder and volatility 6. Select the best description of readonly memory (ROM). A. nonvolatile, used to store information that changes during system operation B. nonvolatile, used to store information that does not change during system operation C. volatile, used to store information that changes during system operation D. volatile, used to store information that does not change during system operation 7. Advantage(s) of an EEPROM over an EPROM is (are): A. the EPROM can be erased with ultraviolet light in much less time than an EEPROM B. the EEPROM can be erased and reprogrammed without removal from the circuit C. the EEPROM has the ability to erase and reprogram individual words

10. Select the best description of the fusible-link PROM. A. user programmable, onetime programmable B. manufacturer programmable, one-time programmable C. user programmable, reprogrammable D. manufacturer programmable, reprogrammable 11. A nonvolatile type of memory that can be programmed and erased in sectors, rather than one byte at a time is: A. flash memory B. EPROM C. EEPROM D. MPROM 12. Which of the following best describes static memory devices? A. memory devices that are magnetic in nature and do not require constant refreshing B. semiconductor memory devices in which stored data is retained as long as power is applied C. memory devices that are magnetic in nature and require constant refreshing D. semiconductor memory devices in which stored data will not be retained with the power applied unless constantly refreshed 13. What is the principal advantage of using address multiplexing with DRAM memory?

τµΩ INDIABIX ELECTRONICS PART 2 A. reduced memory access time B. reduced requirement for constant refreshing of the memory contents C. reduced pin count and decrease in package size D. no requirement for a chipselect input line, thereby reducing the pin count

ANALOG AND DIGITAL CONVERTERS 1. Which of the following is a type of error associated with digital-to-analog converters (DACs)? A. nonmonotonic error B. incorrect output codes C. offset error D. nonmonotonic and offset error 2. A 4-bit R/2R digital-to-analog (DAC) converter has a reference of 5 volts. What is the analog output for the input code 0101. A. 0.3125 V B. 3.125 V C. 0.78125 V D. –3.125 V 3. A binary-weighted digital-to-analog converter has an input resistor of 100 . If the resistor is connected to a 5 V source, the current through the resistor is: A. B.

50 A 5 mA

C. D.

500 A 50 mA

4. What is the resolution of a digital-toanalog converter (DAC)? A. It is the comparison between the actual output of the converter and its expected output. B. It is the deviation between the ideal straight-line output and the actual output of the converter. C. It is the smallest analog output change that can occur as a result of an increment in the digital input. D. It is its ability to resolve between forward and reverse

steps when sequenced over its entire range. 5. The practical use of binary-weighted digital-to-analog converters is limited to: A. R/2R ladder D/A converters B. 4-bit D/A converters C. 8-bit D/A converters D. op-amp comparators educing the pin count 6. The difference between analog voltage represented by two adjacent digital codes, or the analog step size, is the: A. quantization B. accuracy C. resolution D. monotonicity 7. The primary disadvantage of the flash analog-to digital converter (ADC) is that: A. it requires the input voltage to be applied to the inputs simultaneously B. a long conversion time is required C. a large number of output lines is required to simultaneously decode the input voltage D. a large number of comparators is required to represent a reasonable sized binary number 8. A binary-weighted digital-to-analog converter has a feedback resistor, R f , of 12 k . If 50 A of current is through the resistor, the voltage out of the circuit is: A. 0.6 V B. –0.6 V C. 0.1 V D. –0.1 V 9. What is the major advantage of the R/2R ladder digital-to-analog (DAC), as compared to a binary-weighted digitalto-analog DAC converter? A. It only uses two different resistor values. B. It has fewer parts for the same number of inputs. C. Its operation is much easier to analyze. D. The virtual ground is eliminated and the circuit is therefore easier to understand and troubleshoot.

10. The resolution of a 0–5 V 6-bit digital-to-analog converter (DAC) is: A. 63% B. 64% C. 1.56% D. 15.6% 11. In a flash analog-to-digital converter, the output of each comparator is connected to an input of a: A. decoder B. priority encoder C. multiplexer D. demultiplexer 12. Which is not an analog-to-digital (ADC) conversion error? A. differential nonlinearity B. missing code C. incorrect code D. offset 13. Sample-and-hold circuits in analogto digital converters (ADCs) are designed to: A. sample and hold the output of the binary counter during the conversion process B. stabilize the comparator's threshold voltage during the conversion process C. stabilize the input analog signal during the conversion process D. sample and hold the D/A converter staircase waveform during the conversion process

COMPUTER HARDWARE AND SOFTWARE 1. When referring to instruction words, a mnemonic is: A. a short abbreviation for the operand address B. a short abbreviation for the operation to be performed C. a short abbreviation for the data word stored at the operand address D. shorthand for machine language 2. What is the difference between mnemonic codes and machine codes? A. There is no difference. B. Machine codes are in binary,

τµΩ INDIABIX ELECTRONICS PART 2 mnemonic codes are in shorthand English. C. Machine codes are in shorthand English, mnemonic codes are in binary. D. Machine codes are in shorthand English, mnemonic codes are a high-level language. 3. Which bus is bidirectional? A. data bus B. control bus C. address bus D. multiplexed bus 4. The software used to drive microprocessor-based systems is called: A. assembly language programs B. firmware C. BASIC interpreter instructions D. flowchart instructions 5. A microprocessor unit, a memory unit, and an input/output unit form a: A. CPU B. compiler C. microcomputer D. ALU 6. How many buses are connected as part of the 8085 microprocessor? A. 2 B. 3 C. 5 D. 8 7. Which of the following is not a computer bus? A. data bus B. timer bus C. control bus D. address bus 8. The technique of assigning a memory address to each I/O device in the SAM system is called: A. wired I/O B. I/O mapping C. dedicated I/O D. memory-mapped I/O 9. How many bits are used in the data bus? A. 7 B. 8 C. 9 D. 16 10. A port can be:

A. B. C. D.

strictly for input strictly for output bidirectional all the above

11. Which of the following is not a basic element within the microprocessor? A. microcontroller B. arithmetic-logic unit (ALU) C. temporary register D. accumulator 12. How many bits are used in the address bus? A. 7 B. 8 C. 9 D. 16 13. Exceptions to the 8085 microprocessor normal operation are called: A. jump instructions B. decoding C. interrupts D. jump instructions or interrupts

DIGITAL CONCEPTS 1. Any number with an exponent of zero is equal to: A. zero B. one C. that number D. ten 2. In the decimal numbering system, what is the MSD? A. The middle digit of a stream of numbers B. The digit to the right of the decimal point C. The last digit on the right D. The digit with the most weight 3. Which of the following statements does NOT describe an advantage of digital technology? A. The values may vary over a continuous range. B. The circuits are less affected by noise. C. The operation can be programmed. D. Information storage is easy.

4. The generic array logic (GAL) device is ________. A. one-time programmable B. reprogrammable C. a CMOS device D. reprogrammable and a CMOS device 5. The range of voltages between V L(max) and VH(min) are ________. A. unknown B. unnecessary C. unacceptable D. between 2 V and 5 V 6. What is a digital-to-analog converter? A. It takes the digital information from an audio CD and converts it to a usable form. B. It allows the use of cheaper analog techniques, which are always simpler. C. It stores digital data on a hard drive. D. It converts direct current to alternating current. 7. What are the symbols used to represent digits in the binary number system? A. 0,1 B. 0,1,2 C. 0 through 8 D. 1,2 8. A full subtracter circuit requires____. A. two inputs and two outputs B. two inputs and three outputs C. three inputs and one output D. three inputs and two outputs 9. The _____. A. B. C. D.

output of an AND gate is LOW all the time when any input is LOW when any input is HIGH when all inputs are HIGH

10. Give the decimal value of binary 10010. A. 610 B. 910 C. 1810 D. 2010 11. Parallel format means that: A. each digital signal has its own conductor.

τµΩ INDIABIX ELECTRONICS PART 2 B. several digital signals are sent on each conductor. C. both binary and hexadecimal can be used. D. no clock is needed. 12. A decoder converts ________. A. noncoded information coded form B. coded information noncoded form C. HIGHs to LOWs D. LOWs to HIGHs

into into

13. A DAC changes ________. A. an analog signal into digital data B. digital data into an analog signal C. digital data into an amplified signal D. none of the above 14. The output of a NOT gate is HIGH when ________. A. the input is LOW B. the input is HIGH C. the input changes from LOW to HIGH D. voltage is removed from the gate 15. The output of an OR gate is LOW when ________. A. B. C. D.

all inputs are LOW any input is LOW any input is HIGH all inputs are HIGH

16. Which of the following is not an analog device? A. Thermocouple B. Current flow in a circuit C. Light switch D. Audio microphone 17. A demultiplexer has ________. A. one data input and a number of selection inputs, and they have several outputs B. one input and one output C. several inputs and several outputs D. several inputs and one output 18. A flip-flop has ________. A. one stable state B. no stable states C. two stable states D. none of the above

19. Digital signals transmitted on a single conductor (and a ground) must be transmitted in: A. slow speed. B. parallel. C. analog. D. serial. 20. In a certain digital waveform, the period is four times the pulse width. The duty cycle is ________. A. 0% B. 25% C. 50% D. 100% 21. In positive logic, ________. A. a HIGH = 1, a LOW = 0 B. a LOW = 1, a HIGH = 0 C. only HIGHs are present D. only LOWs are present 22. Convert the fractional binary number 0000.1010 to decimal. A. 0.625 B. 0.50 C. 0.55 D. 0.10 23. Digital representations of numerical values of quantities may BEST be described as having characteristics: A. that are difficult to interpret because they are continuously changing. B. that vary constantly over a continuous range of values. C. that vary in constant and direct proportion to the values they represent. D. that vary in discrete steps in proportion to the values they represent. 24. A common instrument used in troubleshooting a digital circuit is a(n) _____. A. logic probe B. oscilloscope C. pulser D. all of the above 25. The parallel transmission of digital data: A. is much slower than the serial transmission of data. B. requires only one signal line between sender and receiver. C. requires as many signal lines between sender and

D.

receiver as there are data bits. is less expensive than the serial method of data transmission.

26. Convert the fractional decimal number 6.75 to binary.O A. 0111.1100 B. 0110.1010 C. 0110.1100 D. 0110.0110 27. What is one relative disadvantage of serial transfer? A. It requires too many conductors. B. Its interconnect system is complex. C. It is slow. D. It can only be used over very short distances. 28. Which format requires conductors? A. Parallel B. Serial C. Both are the same D. Cannot tell

fewer

29. A pulse has a period of 15 ms. Its frequency is ________. A. 6.66 Hz B. 66.66 Hz C. 666.66 Hz D. 15 Hz 30. Give the decimal value of binary 10000110. A. 13410 B. 14410 C. 11010 D. 12610 31. The rise time is the time it takes a pulse to go from ________. A. the base line to the maximum HIGH voltage B. 10% of the pulse amplitude to the maximum HIGH voltage C. the base line to 90% of the pulse amplitude D. 10% of the pulse amplitude to 90% of the pulse amplitude 32. What is an analog-to-digital converter? A. It makes digital signals. B. It takes analog signals and puts them in digital format.

τµΩ INDIABIX ELECTRONICS PART 2 C. It allows the use of digital signals in everyday life. D. It stores information on a CD. 33. A multiplexer has ________. A. one input and several outputs B. one input and one output C. several inputs and several outputs D. several inputs and one output 3

34. What is the decimal value of 2 ? A. 2 B. 4 C. 6 D. 8 35. An encoder converts ________. A. noncoded information into coded form B. coded information into noncoded form C. HIGHs to LOWs D. LOWs to HIGHs 36. What kind of logic device or circuit is used to store information? A. Counter B. Register C. Inverter D. Buffer 37. PLCC packages have leads on ____. A. one side B. two sides C. three sides D. four sides 38. What is the typical invalid voltage for a binary signal? A. 0.7–2.8 volts B. 0.8–3 volts C. 0.8–2 volts D. 0.7–2.5 volts 39. Convert the fractional binary number 0001.0010 to decimal. A. 1.40 B. 1.125 C. 1.20 D. 1.80 40. Convert the fractional binary number 10010.0100 to decimal. A. 24.50 B. 18.25 C. 18.40 D. 16.25 41. How many binary bits are necessary to represent 748 different numbers?

A. B. C. D.

9 7 10 8

42. A periodic digital waveform has a pulse width (tw) of 6 ms and a period (T) of 18 ms. The duty cycle is ______. A. 3.3% B. 33.3% C. 6% D. 18% 43. Any number with an exponent of one is equal to: A. zero. B. one. C. two. D. that number. 44. Serial format means digital signals are: A. sent over many conductors simultaneously. B. sent over one conductor sequentially. C. sent in groups of eight signals. D. sent in binary coded decimal. –1

45. What is the decimal value of 2 ? A. 0.5 B. 0.25 C. 0.05 D. 0.1 46. Which format can send several bits of information faster? A. Parallel B. Serial C. Both are the same D. Cannot tell 47. The frequency of a pulse train is 2 kHz. The pulse period is ________. A. 5 ms B. 50 ms C. 500 s D. 2 s 48. What has happened to the advances in digital technologies over the past three decades? A. Slowed down considerably B. Continued to increase, but at a decreasing rate C. Made excellent progress D. Nothing short of phenomenal

49. A type of digital circuit technology that uses bipolar junction transistors is ________. A. TTL B. CMOS C. LSI D. NMOS 50. How many unique symbols are used in the decimal number system? A. One B. Nine C. Ten D. Unlimited 51. A classification of ICs with complexities of 12 to 100 equivalent gates on a chip is known as ________. A. SSI B. MSI C. LSI D. VLSI 52. Which of the following is a semiconductor memory? A. RAM B. MAR C. CD-ROM D. CD

τµΩ INDIABIX ELECTRONICS PART 2 transmission of codes from one location to another. B. Parity checking is not suitable for detecting single-bit errors in transmitted codes. C. Parity checking is best suited for detecting single-bit errors in transmitted codes. D. Parity checking is capable of detecting and correcting errors in transmitted codes. 2. A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is a(n): A. Ex-NOR gate B. OR gate C. Ex-OR gate D. NAND gate 3. A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n): A. Ex-NOR gate B. OR gate C. Ex-OR gate D. NAND gate 4. Identify the type of gate below from

53. The holes through a PC board are ________. A. smaller with SMT than with through-hole mounting B. larger with SMT than with through-hole mounting C. the same size as with through-hole mounting D. usually unnecessary

the equation A. Ex-NOR gate B. OR gate C. Ex-OR gate D. NAND gate

54. A classification of ICs with complexities of 100 to 10,000 equivalent gates per chip is known as ______. A. SSI B. MSI C. LSI D. VLSI

6. Parity systems are defined as either________ or ________ and will add an extra ________ to the digital information being transmitted. A. positive, negative, byte B. odd, even, bit C. upper, lower, digit D. on, off, decimal

EX-OR AND EX-NOR GATES

7. Which type of gate can be used to add two bits? A. Ex-OR B. Ex-NOR C. Ex-NAND D. NOR

1. Select the statement that best describes the parity method of error detection: A. Parity checking is best suited for detecting double-bit errors that occur during the

5. How is odd parity generated differently from even parity? A. The first output is inverted. B. The last output is inverted.

8. Why is an exclusive-NOR gate also called an equality gate? A. The output is false if the inputs are equal.

B. C.

The output is true if the inputs are opposite. The output is true if the inputs are equal.

9. Show from the truth table how an exclusive-OR gate can be used to invert the data on one input if the other input is a special control function. A. Using A as the control, when A = 0, X is the same as B. When A = 1, X is the same as B. B. Using A as the control, when A = 0, X is the same as B. When A = 1, X is the inverse of B. C. Using A as the control, when A = 0, X is the inverse of B. When A = 1, X is the same as B. D. Using A as the control, when A = 0, X is the inverse of B. When A = 1, X is the inverse of B. 10. Determine odd parity for each of the following data words: 1011101 11110111 1001101 A. P = 1, P = 1, P = 0 B. P = 0, P = 0, P = 0 C. P = 1, P = 1, P = 1 D. P = 0, P = 0, P = 1 11. The Ex-NOR is sometimes called the ________. A. parity gate B. equality gate C. inverted OR D. parity gate or the equality gate

DESCRIBING LOGIC CIRCUITS

B. C. D.

OR operation. NOT operation. AND operation.

4. For a three-input OR gate, with the input waveforms as shown below, which output waveform is correct?

A. B. C. D.

a b c d

5. Which of the figures given below represents a NOR gate?

A. B. C. D.

a b c d

6. Which of the figures (a to d) is the DeMorgan equivalent of Figure (e)?

A. B. C. D.

a b c d

7. Which of the figures in figure (a to d) is equivalent to figure (e)?

1. The format used to present the logic output for the various combinations of logic inputs to a gate is called a(n): A. truth table. B. input logic function. C. Boolean constant. D. Boolean variable.

8. In VHDL, the mode of a port does not define: A. an input. B. an output. C. both an input and an output. D. the TYPE of the bit. 9. Which of the following equations would accurately describe a 4-input OR gate when A = 1, B = 1, C = 0, and D = 0? A. 1+1+0+0=1 B. 1 + 1 + 0 + 0 = 01 C. 1+1+0+0=0 D. 1 + 1 + 0 + 0 = 00 10. Which of the examples below expresses the distributive law? A. (A + B) + C = A + (B + C) B. A(B + C) = AB + AC C. A + (B + C) = AB + AC D. A(BC) = (AB) + C 11. Which of the examples below expresses the associative law of addition: A. A + (B + C) = (A + B) + C B. A + (B + C) = A + (BC) C. A(BC) = (AB) + C D. ABC = A + B + C 12. How are the statements between BEGIN and END not evaluated in VHDL? A. Constantly B. Simultaneously C. Concurrently D. Sequentially 13. Which logic gate does this truth table describe?

A. B. C. D.

2. What is the basic difference between AHDL and VHDL? A. ADHL is used in all PLD's. B. VHDL is used in all PLD's. C. ADHL is proprietary. D. VHDL is proprietary. 3. A small circle on the output of a logic gate is used to represent the: A. Comparator operation.

τµΩ INDIABIX ELECTRONICS PART 2 C. c D. d

AND OR NAND NOR

14. For a 3-input NAND gate, with the input waveforms as shown below, which output waveform is correct?

A. B.

a b

A. B. C. D.

a b c d

τµΩ INDIABIX ELECTRONICS PART 2 D. 27. Which step in this reduction process is using DeMorgan's theorem?

20. Which of the following is a form of DeMorgan's theorem? A. A. B. C. D.

a b c d

B. C. D.

15. Which of the figures given below represents a NAND gate?

A. B. C. D.

a b c d

16. Which timing diagram shown below is correct for an inverter?

21. The logic gate that will have HIGH or "1" at its output when any one of its inputs is HIGH is a(n): A. NOR gate B. OR gate C. AND gate D. NOT operation 22. Which of the symbols shown below represents an AND gate?

A. B. C. D.

STEP 1 STEP 2 STEP 3 STEP 4

28. Simplify the expression DeMorgan's theorems.

using

A. B. C. D.

A. B. C. D.

A. B. C. D.

a b c d

17. A NOR gate with one HIGH input and one LOW input: A. will output a HIGH B. functions as an AND C. will not function D. will output a LOW 18. A NAND gate has: A. active-LOW inputs active-HIGH output. B. active-LOW inputs active-LOW output. C. active-HIGH inputs active-HIGH output. D. active-HIGH inputs active-LOW output.

and

an

and

an

and

an

and an

19. Which of the figures given below represents an OR gate?

a b c d

29. For a three-input NOR gate, with the input waveforms as shown below, which output waveform is correct?

23. For a three-input AND gate, with the input waveforms as shown below, which output waveform is correct? A. a B. b C. c D. d 24. An OR gate with inverted inputs functions as: A. an AND gate. B. a NAND gate. C. a NOR gate. D. an inverter. 25. The special software application that translates from HDL into a grid of 1's and 0's, which can be loaded into a PLD, is called a: A. formatter. B. compiler. C. programmable wiring. D. CPU. 26. The Boolean equation for a NOR function is: A. B. C.

A. B. C. D.

a b c d

LOGIC GATES 1. The output of an AND gate with three inputs, A, B, and C, is HIGH when _______. A. A = 1, B = 1, C = 0 B. A = 0, B = 0, C = 0 C. A = 1, B = 1, C = 1 D. A = 1, B = 0, C = 1 2. If a 3-input NOR gate has eight input possibilities, how many of those possibilities will result in a HIGH output? A. 1 B. 2 C. 7

D.

8

3. If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the output is HIGH, the gate is a(n): A. AND B. NAND C. NOR D. OR 4. A device used to display one or more digital signals so that they can be compared to expected timing diagrams for the signals is a: A. DMM B. spectrum analyzer C. logic analyzer D. frequency counter 5. When used with an IC, what does the term "QUAD" indicate? A. 2 circuits B. 4 circuits C. 6 circuits D. 8 circuits 6. The output of an OR gate with three inputs, A, B, and C, is LOW when ____. A. A = 0, B = 0, C = 0 B. A = 0, B = 0, C = 1 C. A = 0, B = 1, C = 1 D. all of the above 7. Which of the following logical operations is represented by the + sign in Boolean algebra? A. inversion B. AND C. OR D. complementation 8. Output will be a LOW for any case when one or more inputs are zero for a(n): A. OR gate B. NOT gate C. AND gate D. NOR gate 9. How have? A. B. C. D.

many pins does the 4049 IC 14 16 18 20

10. Which of the following choices meets the minimum requirement needed to create specialized waveforms that are

used in digital control and sequencing circuits? A. basic gates, a clock oscillator, and a repetitive waveform generator B. basic gates, a clock oscillator, and a Johnson shift counter C. basic gates, a clock oscillator, and a DeMorgan pulse generator D. basic gates, a clock oscillator, a repetitive waveform generator, and a Johnson shift counter 11. TTL operates from a ________. A. 9-volt supply B. 3-volt supply C. 12-volt supply D. 5-volt supply 12. The output of a NOR gate is HIGH if _____. A. all inputs are HIGH B. any input is HIGH C. any input is LOW D. all inputs are LOW 13. The switching speed of CMOS is now ________. A. competitive with TTL B. three times that of TTL C. slower than TTL D. twice that of TTL 14. The format used to present the logic output for the various combinations of logic inputs to a gate is called a(n): A. Boolean constant B. Boolean variable C. truth table D. input logic function 15. The power dissipation, PD, of a logic gate is the product of the ________. A. dc supply voltage and the peak current B. dc supply voltage and the average supply current C. ac supply voltage and the peak current D. ac supply voltage and the average supply current 16.

τµΩ INDIABIX ELECTRONICS PART 2 A logic probe is again applied to the pins of a 7421 IC with the following results. Is there a problem with the circuit and if so, what is the problem? A. B. C. D.

Pin 6 should be ON. Pin 8 should be ON. Pin 8 should be pulsing. no problem

17. If a 3-input AND gate has eight input possibilities, how many of those possibilities will result in a HIGH output? A. 1 B. 2 C. 7 D. 8 18. The Boolean expression for a 3-input AND gate is ________. A. X = AB B. X = ABC C. X=A+B+C D. X = AB + C 19. A CMOS IC operating from a 3-volt supply will consume ________. A. less power than a TTL IC B. more power than a TTL IC C. the same power as a TTL IC D. no power at all 20. What does the small bubble on the output of the NAND gate logic symbol mean? A. open collector output B. tristate C. The output is inverted. D. none of the above 21. What are the pin numbers of the outputs of the gates in a 7432 IC? A. 3, 6, 10, and 13 B. 1, 4, 10, and 13 C. 3, 6, 8, and 11 D. 1, 4, 8, and 11 22. The output of a NOT gate is HIGH when ________. A. the input is LOW B. the input is HIGH C. power is applied to the gate's IC D. power is removed from the gate's IC 23. If the input to a NOT gate is A and the output is X, then ________. A. X=A B. C. D.

X=0 none of the above

24. A logic probe is used to test the pins of a 7411 IC with the following results. Is there a problem with the chip and if so, what is the problem?

B. C.

D.

A. B. C. D.

Pin 6 should be ON. Pin 6 should be pulsing. Pin 8 should be ON. no problem

25. How many inputs of a four-input AND gate must be HIGH in order for the output of the logic gate to go HIGH? A. B. C. D.

any one of the inputs any two of the inputs any three of the inputs all four inputs

26. If the output of a three-input AND gate must be a logic LOW, what must the condition of the inputs be? A. All inputs must be LOW. B. All inputs must be HIGH. C. At least one input must be LOW. D. At least one input must be HIGH. 27. Logically, the output of a NOR gate would have the same Boolean expression as a(n): A. NAND gate immediately followed by an inverter B. OR gate immediately followed by an inverter C. AND gate immediately followed by an inverter D. NOR gate immediately followed by an inverter 28. A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used on each of the input terminals, but the output indication does not change. What is wrong? A. The dim indication on the logic probe indicates that the supply voltage is probably low.

The output of the gate appears to be open. The dim indication is the result of a bad ground connection on the logic probe. The gate is a tristate device.

29. What is the Boolean expression for a three-input AND gate? A. X=A+B+C B. X=A·B·C C. A – B – C D. A$B$C 30. Which of the following gates has the exact inverse output of the OR gate for all possible input combinations? A. NOR B. NOT C. NAND D. AND 31. What is the difference between a 7400 and a 7411 IC? A. 7400 has two four-input NAND gates; 7411 has three threeinput AND gates B. 7400 has four two-input NAND gates; 7411 has three three- input AND gates C. 7400 has two four-input AND gates; 7411 has three threeinput NAND gates D. 7400 has four two-input AND gates; 7411 has three threeinput NAND gates 32. Write the Boolean expression for an inverter logic gate with input C and output Y. A. Y=C B.

Y=

33. The output of an exclusive-OR gate is HIGH if ________. A. all inputs are LOW B. all inputs are HIGH C. the inputs are unequal D. none of the above 34. A clock signal with a period of 1 µs is applied to the input of an enable gate. The output must contain six pulses. How long must the enable pulse be active? A. Enable must be active for 0µs. B. Enable must be active for 3µ s. C. Enable must be active for 6µs. D. Enable must be active for 12 µs.

τµΩ INDIABIX ELECTRONICS PART 2 35. The AND function can be used to ___ and the OR function can be used to ___ . A. enable, disable B. disable, enable C. enable or disable, enable or disable D. detect, invert 36. One advantage TTL has over CMOS is that TTL is ________. A. less expensive B. not sensitive to electrostatic discharge C. faster D. more widely available 37. A 2-input NOR gate is equivalent to a ______. A. negative-OR gate B. negative-AND gate C. negative-NAND gate D. none of the above 38. If a 3-input OR gate has eight input possibilities, how many of those possibilities will result in a HIGH output? A. 1 B. 2 C. 7 D. 8 39. Fan-out is specified in terms of ____. A. voltage B. current C. wattage D. unit loads 40. How many input combinations would a truth table have for a six-input AND gate? A. 32 B. 48 C. 64 D. 128 41. What is the circuit number of the IC that contains four two-input AND gates in standard TTL? A. 7402 B. 7404 C. 7408 D. 7432 42. The terms "low speed" and "high speed," applied to logic circuits, refer to the ________. A. rise time B. fall time C. propagation delay time D. clock speed

43. The NOR logic gate is the same as the operation of the ________ gate with an inverter connected to the output. A. OR B. AND C. NAND D. none of the above 44. The logic expression for a NOR gate is _______. A. B. C. D. 45. With regard to an AND gate, which statement is true? A. An AND gate has two inputs and one output. B. An AND gate has two or more inputs and two outputs. C. If one input to a 2-input AND gate is HIGH, the output reflects the other input. D. A 2-input AND gate has eight input possibilities. 46. The term "hex inverter" refers to: A. an inverter that has six inputs B. six inverters in a single package C. a six-input symbolic logic device D. an inverter that has a history of failure 47. How many inputs are on the logic gates of a 74HC21 IC? A. 1 B. 2 C. 3 D. 4 48. The basic logic gate whose output is the complement of the input is the: A. OR gate B. AND gate C. inverter D. comparator 49. When reading a Boolean expression, what does the word "NOT" indicate? A. the same as B. inversion C. high D. low 50. The output of an exclusive-NOR gate is HIGH if ________.

A. B. C. D.

the inputs are equal one input is HIGH, and the other input is LOW the inputs are unequal none of the above

51. How many AND gates are found in a 7411 IC? A. 1 B. 2 C. 3 D. 4 52. Which of the following equations would accurately describe a four-input OR gate when A = 1, B = 1, C = 0, and D = 0? A. 1 + 1 + 0 + 0 = 01 B. 1+1+0+0=1 C. 1+1+0+0=0 D. 1 + 1 + 0 + 0 = 00 53. What is the name of a digital circuit that produces several repetitive digital waveforms? A. an inverter B. an OR gate C. a Johnson shift counter D. an AND gate 54. The basic types of programmable arrays are made up of ________. A. AND gates B. OR gates C. NAND and NOR gates D. AND gates and OR gates 55. The logic gate that will have HIGH or "1" at its output when any one (or more) of its inputs is HIGH is a(n): A. OR gate B. AND gate C. NOR gate D. NOT operation 56. CMOS IC packages are available in ______. A. DIP configuration B. SOIC configuration C. DIP and SOIC configurations D. neither DIP nor SOIC configurations 57. Which of the following is not a basic Boolean operation? A. OR B. NOT C. AND D. FOR

τµΩ INDIABIX ELECTRONICS PART 2 58. Which of the following gates is described by the expression ? A. OR B. AND C. NOR D. NAND 59. What is the Boolean expression for a four-input OR gate? A. Y=A+B+C+D B. Y = A· B · C · D C. Y = A – B – C – D D. Y=A$B$C$D 60. How many truth table entries are necessary for a four-input circuit? A. 4 B. 8 C. 12 D. 16 61. How many entries would a truth table for a four-input NAND gate have? A. 2 B. 8 C. 16 D. 32 62. The Boolean expression for a 3-input OR gate is ________. A. X=A+B B. X=A+B+C C. X = ABC D. X = A + BC 63. From the truth table for a three-input NOR gate, what is the only condition of inputs A, B, and C that will make the output X high? A. A = 1, B = 1, C = 1 B. A = 1, B = 0, C = 0 C. A = 0, B = 0, C = 1 D. A = 0, B = 0, C = 0 64. The logic gate that will have a LOW output when any one of its inputs is HIGH is the: A. NAND gate B. AND gate C. NOR gate D. OR gate 65. The output of a NAND gate is LOW if ______. A. all inputs are LOW B. all inputs are HIGH C. any input is LOW D. any input is HIGH

NUMBER SYSTEMS AND CODES 1. Convert hexadecimal value 16 to decimal. A. 2210 B. 1610 C. 1010 D. 2010 2. Convert the following decimal number to 8-bit binary. 187 A. 101110112 B. 110111012 C. 101111012 D. 101111002 3. Convert binary 111111110010 to hexadecimal. A. EE216 B. FF216 C. 2FE16 D. FD216 4. Convert the following binary number to decimal. 010112 A. 11 B. 35 C. 15 D. 10 5. Convert the binary number 1001.0010 2 to decimal. A. 90.125 B. 9.125 C. 125 D. 12.5 6. Decode the following ASCII message. 1010011101010010101011000100101100 1010000010010001000001101001010001 00 A. STUDYHARD B. STUDY HARD C. stydyhard D. study hard 7. The voltages in digital electronics are continuously variable. A. True B. False 8. One hex digit is sometimes referred to as a(n): A. byte B. nibble C. grouping D. instruction

9. Which of the following is the most widely used alphanumeric code for computer input and output? A. Gray B. ASCII C. Parity D. EBCDIC 10. If a typical PC uses a 20-bit address code, how much memory can the CPU address? A. 20 MB B. 10 MB C. 1 MB D. 580 MB 11. Convert 59.72 10 to BCD. A. B. C. D.

111011 01011001.01110010 1110.11 0101100101110010

12. Convert 8B3F 16 to binary. A. 35647 B. 011010 C. 1011001111100011 D. 1000101100111111 13. Which is typically the longest: bit, byte, nibble, word? A. Bit B. Byte C. Nibble D. Word 14. Assign the proper odd parity bit to the code 111001. A. 1111011 B. 1111001 C. 0111111 D. 0011111 15. Convert decimal 64 to binary. A. 01010010 B. 01000000 C. 00110110 D. 01001000 16. Convert hexadecimal value C1 to binary. A. 11000001 B. 1000111 C. 111000100 D. 111000001 17. Convert the following octal number to decimal. 178 A. 51 B. 82

τµΩ INDIABIX ELECTRONICS PART 2 C. 57 D. 15 18. Convert the following binary number to octal. 0101111002 A. 1728 B. 2728 C. 1748 D. 2748 19. How many binary digits are required to count to 10010? A. 7 B. 2 C. 3 D. 100 20. The BCD number for decimal 347 is ________. A. 1100 1011 1000 B. 0011 0100 0111 C. 0011 0100 0001 D. 1100 1011 0110 21. The binary number for octal 45 8 is ________. A. 100010 B. 100101 C. 110101 D. 100100 22. The sum of 11101 + 10111 equals ________. A. 110011 B. 100001 C. 110100 D. 100100 23. Convert the following binary number to decimal. 100110102 A. 154 B. 155 C. 153 D. 157 24. The decimal number 188 is equal to the binary number ________. A. 10111100 B. 0111000 C. 1100011 D. 1111000 25. Convert the following binary number to octal. 0011010112 A. 1538 B. 3518 C. 2538 D. 3528

26. How many bits are in an ASCII character? A. 16 B. 8 C. 7 D. 4 27. A binary number's value changes most drastically when the ________ is changed. A. MSB B. frequency C. LSB D. duty cycle 28. Convert decimal 213 to binary. A. 11001101 B. 11010101 C. 01111001 D. 11100011 29. The decimal number for octal 74 8 is ________. A. 74 B. 60 C. 22 D. 62 30. The sum of the two BCD numbers, 0011 + 0011, is ________. A. 0110 B. 0111 C. 0011 D. 1100 31. Convert binary 01001110 to decimal. A. 4E B. 78 C. 76 D. 116 32. Which is not a word size? A. 64 B. 28 C. 16 D. 8 33. The octal numbering system: A. simplifies tasks B. groups binary numbers in groups of 4 C. saves time D. simplifies tasks and saves time 34. The binary number 1110 is equal to the decimal number ________. A. 3 B. 1 C. 7

D.

14

35. Convert the following octal number to binary. 768 A. 1101112 B. 1111102 C. 1111002 D. 1001112 36. Convert 1100101000110101 2 hexadecimal. A. 121035 B. CA35 C. 53AC1 D. 530121

to

37. Convert the following decimal number to octal. 281 A. 1348 B. 4318 C. 3318 D. 1338 38. When using even parity, where is the parity bit placed? A. Before the MSB B. After the LSB C. In the parity word D. After the odd parity bit 39. Convert the following octal number to decimal. 358 A. 71 B. 17 C. 92 D. 29 40. Convert hexadecimal. A. 8F16 B. CE16 C. DF16 D. CF16

binary

11001111

to

41. Convert 17318 to decimal. A. 216.4 B. 985 C. 3D9 D. 1123 42. An analog signal has a range from 0 V to 5 V. What is the total number of analog possibilities within this range? A. B. C. D.

5 50 250 infinite

τµΩ INDIABIX ELECTRONICS PART 2 43. Hexadecimal letters A through F are used for decimal equivalent values from: A. 1 through 6 B. 9 through 14 C. 10 through 15 D. 11 through 17 44. Convert the following decimal number to 8-bit binary. 35 A. 000100102 B. 000100112 C. 001000112 D. 001000102 45. Convert the following hexadecimal number to binary. C916 A. B. C. D.

101110012 101110112 100111002 110010012

46. Convert the following decimal number to hexadecimal. 125 A. 7D16 B. D716 C. 7C16 D. C716 47. A decimal 11 in BCD is ________. A. 00001011 B. 00001100 C. 00010001 D. 00010010 48. What is the resultant binary of the decimal problem 49 + 01 = ? A. 01010101 B. 00110101 C. 00110010 D. 00110001 49. The difference of 111 – 001 equals ________. A. 100 B. 111 C. 001 D. 110 50. Convert the binary number 1100 to Gray code. A. 0011 B. 1010 C. 1100 D. 1001

51. The binary number 11101011000111010 can be written in hexadecimal as ________. A. DD63A 16 B. 1D63A16 C. 1D33A 16 D. 1D63116 52. Which of the following is an invalid BCD code? A. 0011 B. 1101 C. 0101 D. 1001 53. What decimal number does 2 represent? A. 10 B. 31 C. 25 D. 32

5

54. Convert the Gray code 1011 to binary. A. 1011 B. 1010 C. 0100 D. 1101 55. Determine the decimal equivalent of the signed binary number 11110100 in 1's complement. A. 116 B. –12 C. 11 D. 128 56. What is the difference between binary coding and binary-coded decimal? A. BCD is pure binary. B. Binary coding has a decimal format. C. BCD has no decimal format. D. Binary coding is pure binary. 57. Convert the following decimal number to BCD. 127 A. 011100100001 B. 111010001 C. 001010111 D. 000100100111 58. Digital electronics is based on the ________ numbering system. A. decimal B. octal C. binary D. hexadecimal

59. An informational signal that makes use of binary digits is considered to be: A. solid state B. digital C. analog D. non-oscillating 60. The 1's complement of 10011101 is ________. A. 01100010 B. 10011110 C. 01100001 D. 01100011 61. The binary number 101110101111010 can be written in octal as ________. A. 515628 B. 565778 C. 65627 8 D. 565728 62. Convert 457 10 to hexadecimal. A. 711 B. 2C7 C. 811 D. 1C9 63. Convert the decimal number 151.75 to binary. A. 10000111.11 B. 11010011.01 C. 00111100.00 D. 10010111.11 64. Convert the following octal number to binary.1048 A. 0010001002 B. 1000000012 C. 00101002 D. 10000012 1

0

65. 3 × 10 + 7 × 10 is equal to ________. A. 3.7 B. 37 C. 10 D. 370 66. 3428 is the decimal value for which of the following binary-coded decimal (BCD) groupings? A. 11010001001000 B. 11010000101000 C. 011010010000010 D. 110100001101010 67. The binary-coded decimal (BCD) system can be used to represent each of the 10 decimal digits as a(n): A. 4-bit binary code B. 8-bit binary code C. 16-bit binary code

τµΩ INDIABIX ELECTRONICS PART 2 D. ASCII code 68. The decimal number 18 is equal to the binary number ________. A. 11110 B. 10001 C. 10010 D. 1111000 69. The 2's complement of 11100111 is _____. A. 11100110 B. 00011001 C. 00011000 D. 00011010 70. Convert the following decimal number to BCD.469 A. 100101101000 B. 010001101001 C. 100001101001 D. 100101100100 71. Express the decimal number –37 as an 8-bit number in sign-magnitude. A. 10100101 B. 00100101 C. 11011000 D. 11010001 72. Convert the following BCD number to decimal. 010101101001bcd A. 539 B. 2551 C. 569 D. 1552 73. The binary number 11001110 is equal to the decimal number ______. A. 12 B. 206 C. 127 D. 66 74. The binary number for F3A 16 is ___. A. 111100111010 B. 111100111110 C. 000000111010 D. 000011000100 75. Convert the following BCD number to decimal. 100000000011bcd A. 8003 B. 803 C. 1003 D. 103 76. Convert the following hexadecimal number to binary. 14B16 A. 1011010000012 B. 0001010010112

C. D.

0001010011012 1101010000012

77. What is the result when a decimal 5238 is converted to base 16? A. 327.375 B. 12.166 C. 1388 D. 1476 78. The octal number for 1101110101110110 is ________. A. 6545218 B. 556561 8 C. 156656 8 D. 1565668

binary

86. Convert decimal. A. 201 B. 2001 C. 20 D. 210

110010012 (binary)

to

87. Convert the following decimal number to octal.39 A. 638 B. 368 C. 478 D. 748

79. Convert the following hexadecimal number to decimal. 1CF 16 A. 463 B. 4033 C. 479 D. 4049

88. The American Standard Code for Information Interchange (ASCII) uses how many individual pulses for any given character? A. 1 B. 2 C. 7 D. 8

80. Convert the binary number 1011010 to hexadecimal. A. 5B B. 5F C. 5A D. 5C

89. Convert the following hexadecimal number to decimal. B5 16 A. 212 B. 197 C. 165 D. 181

81. Convert the following decimal number to hexadecimal.74 A. A416 B. B416 C. 4A16 D. 4B16

90. The BCD number for decimal 16 is ______. A. 00010110 B. 00010000 C. 00010010 D. 11100000

82. Convert hexadecimal C0B to binary. A. 110000001011 B. 110000001001 C. 110000001100 D. 110100001011

91. Alphanumeric codes should include as a minimum: A. the capacity to represent the alphabet upperand lowercase characters and the decimal numbers in a straight binary format. B. the capacity to code all possible decimal numbers in a direct octal representation of BCD codes. C. the alphabet upper- and lowercase letters, the decimal digits, the seven punctuation marks, and other characters or symbols. D. the ability to represent decimal numbers greater than 10 128 in a straight binary format..

83. Convert binary 1001 to hexadecimal. A. 916 B. 1116 C. 10116 D. 1016 84. Convert 731 16 to decimal. A. 216.4 B. 985 C. 3D9 D. 1841 85. What is the decimal value of the hexadecimal number 777? A. 191 B. 1911 C. 19 D. 19111

92. Convert 52716 to binary. A. 343

τµΩ INDIABIX ELECTRONICS PART 2 B. 001101000111 C. 010100100111 D. 011100100101 93. Convert 527 8 to binary. A. 011100111 B. 101010111 C. 343 D. 111010101 94. The base of the hexadecimal system is: A. eight. B. sixteen. C. ten. D. two. 95. Assign the proper even parity bit to the code 1100001. A. 11100001 B. 1100001 C. 01100001 D. 01110101 96. Select one of the following statements that best describes the parity method of error detection. A. Parity checking is best suited for detecting singlebit errors in transmitted codes. B. Parity checking is not suitable for detecting single-bit errors in transmitted codes. C. Parity checking is capable of detecting and correcting errors in transmitted codes. D. Parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another. 97. Which of the following is the primary advantage of using the BCD code instead of straight binary coding? A. Fewer bits are required to represent a decimal number with the BCD code. B. The relative ease of converting to and from decimal. C. BCD codes are easily converted to hexadecimal codes. D. BCD codes are easily converted to straight binary codes.

98. How many BCD code bits and how many straight binary bits would be required to represent the decimal number 643? A. 12 BCD, 12 binary B. 12 BCD, 10 binary C. 12 BCD, 9 binary D. 16 BCD, 9 binary 99. When using the repeated division by 2 method of converting from decimal to binary, one must write the first remainder as the: A. MSB B. MSB, provided the following sequence of remainders are written in descending order until the final remainder is achieved. C. LSB D. LSB, provided the final remainder is used to replace the original LSB, which is then moved to the MSB position.

BOOLEAN AND LOGIC SIMPLIFICATION 1. Convert the following SOP expression to an equivalent POS expression. A. B. C. D. 2. Determine the values of A, B, C, and D that make the sum term A. B. C. D.

equal to zero. A = 1, B = 0, C = 0, D = 0 A = 1, B = 0, C = 1, D = 0 A = 0, B = 1, C = 0, D = 0 A = 1, B = 0, C = 1, D = 1

3. Which of the following expressions is in the sum-of-products (SOP) form? A. (A + B)(C + D) B. (A)B(CD) C. AB(CD) D. AB + CD 4. Derive the Boolean expression for the logic circuit shown below:

τµΩ INDIABIX ELECTRONICS PART 2 10. Which output expression might indicate a product-of-sums circuit construction? A.

A.

B. B.

C.

C.

D.

D. 5. From the truth table below, determine the standard SOP expression.

11. An AND gate with schematic "bubbles" on its inputs performs the same function as a(n)________ gate. A. NOT B. OR C. NOR D. NAND 12.For

the

SOP

expression

D.

, how many 1s are in the truth table's output column? A. 1 B. 2 C. 3 D. 5

6. One of De Morgan's theorems states

13. A truth table for the SOP expression

that . Simply stated, this means that logically there is no difference between: A. a NOR and an AND gate with inverted inputs B. a NAND and an OR gate with inverted inputs C. an AND and a NOR gate with inverted inputs D. a NOR and a NAND gate with inverted inputs

has how many input

A. B. C.

7. The commutative law of Boolean addition states that A + B = A × B. A. True B. False 8. Applying DeMorgan's theorem to the expression

, we get ________.

A. B. C. D. 9. The systematic reduction of logic circuits is accomplished by: A. using Boolean algebra B. symbolic reduction C. TTL logic D. using a truth table

combinations? A. 1 B. 2 C. 4 D. 8 14. How many gates would be required to implement the following Boolean expression before simplification? XY + X(X + Z) + Y(X + Z) A. 1 B. 2 C. 4 D. 5 15. Determine the values of A, B, C, and D that make the product term equal to 1. A. A = 0, B = 1, C = 0, D = 1 B. A = 0, B = 0, C = 0, D = 1 C. A = 1, B = 1, C = 1, D = 1 D. A = 0, B = 0, C = 1, D = 0 16. What is the primary motivation for using Boolean algebra to simplify logic expressions? A. It may make it easier to understand the overall function of the circuit.

B. C. D.

It may reduce the number of gates. It may reduce the number of inputs required. all of the above

17. How many gates would be required to implement the following Boolean expression after simplification? XY + X(X + Z) + Y(X + Z) A. 1 B. 2 C. 4 D. 5 18. AC + ABC = AC A. True B. False 19. When are the inputs to a NAND gate, according to De Morgan's theorem, the output expression could be: A. X=A+B B. C.

X = (A)(B)

D.

F = CD + AD F = BC + AB F = AC + AD

expression ________.

24. Occasionally, a particular logic expression will be of no consequence in the operation of a circuit, such as a BCDto-decimal converter. These result in ________terms in the K-map and can be treated as either ________ or ________, in order to ________ the resulting term. A. don't care, 1s, 0s, simplify B. spurious, ANDs, ORs, eliminate C. duplicate, 1s, 0s, verify D. spurious, 1s, 0s, simplify

21. Applying DeMorgan's theorem to the , we get ___

A. B. C. D. 22. When grouping cells within a K-map, the cells must be combined in groups of ________. A. 2s B. 1, 2, 4, 8, etc. C. 4s D. 3s 23. Use Boolean algebra to find the most simplified SOP expression for F = ABD + CD + ACD + ABC + ABCD. A. F = ABD + ABC + CD

,

we

get

A. B. C. D. 31.

Mapping

the

SOP

expression , we get

________.

25. The NAND or NOR gates are referred to as "universal" gates because either: A. can be found in almost all digital circuits B. can be used to build all the other types of gates C. are used in all countries of the world D. were the first gates to be integrated 26. The truth table for the SOP

20. Which Boolean algebra property allows us to group operands in an expression in any order without affecting the results of the operation [for example, A + B = B + A]? A. associative B. commutative C. Boolean D. distributive

expression

B. C. D.

τµΩ INDIABIX ELECTRONICS PART 2 30. Applying the distributive law to the

expression input combinations? A. 1 B. 2 C. 4 D. 8

has how many

28. A Karnaugh map is a systematic way of reducing which type of expression? A. product-of-sums B. exclusive NOR C. sum-of-products D. those with overbars The

Boolean

(A) (B) (C) (D)

32. Derive the Boolean expression for the logic circuit shown below:

27. Converting the Boolean expression LM + M(NO + PQ) to SOP form, we get ________. A. LM + MNOPQ B. L + MNO + MPQ C. LM + M + NO + MPQ D. LM + MNO + MPQ

29.

A. B. C. D.

A. B. C. D. 33. Which is the correct logic function for this PAL diagram?

expression

is logically equivalent to what single gate? A. NAND B. NOR C. AND D. OR

A. B. C. D.

34. For the SOP expression , how many 0s are in the truth table's output column? A. B. C. D.

Boolean

37. Applying DeMorgan's theorem to the expression ________.

zero 1 4 5

35. Mapping expression

simplifying expressions.

,

we

get

A. B. the

standard

SOP

D.

A. B. C. D.

(A + B) + C = A + (B + C) A(B + C) = AB + AC A + (B + C) = AB + AC A(BC) = (AB) + C

39. Applying DeMorgan's theorem to the expression ________.

, we get

A. B. C. D.

A. B. C. D.

(A) (B) (C) (D)

36. Which statement below best describes a Karnaugh map? A. A Karnaugh map can be used to replace Boolean rules. B. The Karnaugh map eliminates the need for using NAND and NOR gates. C. Variable complements can be eliminated by using Karnaugh maps. D. Karnaugh maps provide a cookbook approach to

43. Determine the binary values of the variables for which the following standard POS expression is equal to 0. A. B. C. D.

C.

38. Which of the examples below expresses the distributive law of Boolean algebra?

, we get

τµΩ INDIABIX ELECTRONICS PART 2 B. AB = B + A C. AB = BA D. AB = A × B

40. Which of the following is an important feature of the sum-ofproducts (SOP) form of expression? A. All logic circuits are reduced to nothing more than simple AND and OR gates. B. The delay times are greatly reduced over other forms. C. No signal must pass through more than two gates, not including inverters. D. The maximum number of gates that any signal must pass through is reduced by a factor of two. 41. An OR gate with schematic "bubbles" on its inputs performs the same functions as a(n)________ gate. A. NOR B. OR C. NOT D. NAND 42. Which of the examples below expresses the commutative law of multiplication? A. A+B=B+A

(0 + 1 + 0)(1 + 0 + 1) (1 + 1 + 1)(0 + 0 + 0) (0 + 0 + 0)(1 + 0 + 1) (1 + 1 + 0)(1 + 0 + 0)

44. The expression W(X + YZ) can be converted to SOP form by applying which law? A. associative law B. commutative law C. distributive law D. none of the above 45. The commutative law of addition and multiplication indicates that: A. we can group variables in an AND or in an OR any way we want B. an expression can be expanded by multiplying term by term just the same as in ordinary algebra C. the way we OR or AND two variables is unimportant because the result is the same D. the factoring of Boolean expressions requires the multiplication of product terms that contain like variables 46. Which of the following combinations cannot be combined into K-map groups? A. corners in the same row B. corners in the same column C. diagonal D. overlapping combinations

COMBINATIONAL LOGIC ANALYSIS 1. Referring to the GAL diagram, which is the correct logic function?

τµΩ INDIABIX ELECTRONICS PART 2 D. None of these 10. The following waveform pattern is for a(n) ________.

A. B. C. D.

                      ̅   ̅    ̅   ̅      ̅       ̅ ̅      ̅

2. The output of an exclusive-NOR gate is 1. Which input combination is correct? A. A = 1, B = 0 B. A = 0, B = 1 C. A = 0, B = 0 D. none of the above 3. The Boolean SOP expression obtained from the truth table below is ________.

A. B. C. D.

       ̅         None of these

4. The 8-input XOR circuit shown has an output of Y = 1. Which input combination below (ordered A – H) is correct?

A. B. C. D.

6. Before an SOP implementation, the expression    ̅    would require a total of how many gates? A. 1 B. 2 C. 4 D. 5 7. The following waveform pattern is for a(n) ________.

A. B. C. D.

2-input AND gate 2-input OR gate Exclusive-OR gate None of the above

8.

Implementing the expression          with NOR logic,    ̅ we get:

A. B. C. D. A. 10111100 B. 10111000 C. 11100111 D. 00011101 5. Implementing the expression AB + CDE using NAND logic, we get:

(A) (B) (C) (D)

(A) (B) (C) (D)

9. A 4-variable AND-OR-Invert circuit produces a 0 at its Y output. Which combination of inputs is correct?  ̅   ̅  A.    ̅    ̅ B.      C.

A. B. C. D.


11. To implement the     ̅      , it  OR gate and ________. A. three AND gates inverters B. three AND gates inverters C. three AND gates D. one AND gate

expression takes one and three and four

12. One positive pulse with tw = 75 µs is applied to one of the inputs of an exclusive-OR circuit. A second positive pulse with tw = 15 µs is applied to the other input beginning 20 µs after the leading edge of the first pulse. Which statement describes the output in relation to the inputs? A. The exclusive-OR output is a 20 µs pulse followed by a 40 s pulse, with a separation of 15 µs between the pulses. B. The exclusive-OR output is a 20 µs pulse followed by a 15 µs pulse, with a separation of 40 µs between the pulses. C. The exclusive-OR output is a 15 µs pulse followed by a 40 µs pulse. D. *The exclusive-OR output is a 20 µs pulse followed by a 15 µs pulse, followed by a 40 µs pulse. 13. How many AND gates are required to implement the Boolean expression,     ̅ ?    ̅   A. 1 B. 2 C. 3 D. 4 14. How many NOT gates are required to implement the Boolean expression,     ̅ ?   

A. B. C. D.

1 2 4 5

15. The inverter can be produced with how many NAND gates? A. 1 B. 2 C. 3 D. 4 16. A 4-variable AND-OR circuit produces a 0 at its Y output. Which combination of inputs is correct? A. A = 0, B = 0, C = 1, D = 1 B. A = 1, B = 1, C = 0, D = 0 C. A = 1, B = 1, C = 1, D = 1 D. A = 1, B = 0, C = 1, D = 0 17. A 4-variable AND-OR circuit produces a 1 at its Y output. Which combination of inputs is correct? A. A = 0, B = 0, C = 0, D = 0 B. A = 0, B = 1, C = 1, D = 0 C. A = 1, B = 1, C = 0, D = 0 D. A = 1, B = 0, C = 0, D = 0 18. Implementing the expression   using NAND logic, we get:  ̅  

19. Implementing the expression    using NAND logic, we get:  ̅  

A. B. C. D.

(A) (B) (C) (D)

20. The following waveform pattern is

(A) (B) (C) (D)

MEASUREMENT, CONVERSION AND CONTROL

for a(n) ________.

1. What device is similar to an RTD but has a negative temperature coefficient? A. Strain gauge B. Thermistor C. Negative-type RTD D. Thermocouple

A. B. C. D.

2. The resistive change of a strain gauge A. is based on the weight placed upon it, but can be many thousands of ohms B. is usually no more than 100 Ω C. is based on the gauge factor, but is typically less than an ohm D. has a positive temperature coefficient


21. Implementation of the Boolean expression        ̅ results in ________. A. three AND gates, one OR gate B. three AND gates, one NOT gate, one OR gate C. three AND gates, one NOT gate, three OR gates D. three AND gates, three OR gates 22. One possible output expression for an AND-OR-Invert circuit having one AND gate with inputs A, B, and C and one AND gate with inputs D and E is ________.    A.    ̅       ̅   B.           C.        D.

A. B. C. D.

τµΩ INDIABIX ELECTRONICS PART 2 24. A logic circuit with an output  consists of ________.    ̅   A. two AND gates, two OR gates, two inverters B. three AND gates, two OR gates, one inverter C. two AND gates, one OR gate, two inverters D. two AND gates, one OR gate

23. How many 2-input NOR gates does it take to produce a 2-input NAND gate? A. 1 B. 2 C. 3 D. 4

3. The silicon-controlled rectifier can be turned off A. by a negative gate pulse B. by forced commutation C. with the off switch D. when the breakover voltage is exceeded 4. The output voltage of a typical thermocouple is A. less than 100 mV B. greater than 1 V C. Thermocouples vary resistance, not voltage. D. None of the above 5. The connections to a thermocouple A. can produce an unwanted thermocouple effect, which must be compensated for B. produce an extra desirable thermocouple effect C. must be protected, since high voltages are present

D.

produce an extra desirable thermocouple effect and must be protected, since high voltages are present

6. What is the zero-voltage switch used for? A. To reduce radiation of high frequencies during turn-on of a high current to a load B. To control low-voltage circuits C. To provide power to a circuit when power is lost D. For extremely low-voltage applications 7. Temperature sensing can be achieved by the use of A. thermocouples B. RTDs C. thermistors D. All of the above 8. The purpose of compensation for a thermocouple is A. to decrease temperature sensitivity B. to increase voltage output C. to cancel unwanted voltage output of a thermocouple D. used for high-temperature circuits 9. The change in value of an analog signal during the conversion process produces what is called the A. B. C. D.

quantization error resolution error Nyquist error sampling error

A. B. C.

D.

the minimum current required for turn-off the current required before an SCR will turn on the amount of current required to maintain conduction the gate current required to maintain conduction

13. What is the moving part of a linear variable differential transformer? A. B. C. D.

Primary Secondary Diaphragm Core

RESISTANCE AND POWER 1. The resistivity of copper is: A. 9.9 Ω B. 10.7 Ω C. 16.7 Ω D. 17.0 Ω 2. How do fixed resistors usually fail? A. slowly over time B. by increasing their value C. by becoming an open circuit D. by increasing their value and becoming an open circuit 3. With Ohm's law, if voltage increases and resistance stays the same: A. current remains the same B. power decreases C. current increases D. resistance decreases

10. Which of the following performance specifications applies to a sample-andhold circuit? A. Aperture time B. Aperture droop C. Feedback D. Acquisition jitter

4. Which formula shows a direct proportionality between power and voltage? A. V = IR B. P = VI C. P = IR D. I = V/R

11. RTDs are typically connected with other fixed resistors A. in a pi configuration B. in a bridge configuration C. and variable resistors D. and capacitors in a filter-type circuit

5. With 1 mA of current, what wattage rating should a 470 ohm resistor have? A. 1/4 watt B. 1/2 watt C. 1 watt D. 2 watts

12. Holding current for an SCR is best described as

6. How is a 3.9 k Ω resistor color-coded? A. red, white, red, gold B. red, green, orange, silver

τµΩ INDIABIX ELECTRONICS PART 2 C. orange, white, red, gold D. orange, green, orange, silver 7. What resistor type is found in SIPs and DIPs? A. metal film B. wirewound C. metal oxide D. thick film 8. Ohm's law is not: A. V = IR B. I = V/R C. R = IV D. R = V/I 9. What are the two major categories for resistors? A. low and high ohmic value B. commercial and industrial C. low and high power value D. fixed and variable 10. How many connections does a potentiometer have? A. 1 B. 2 C. 3 D. 4 11. What current is flowing in the circuit?

A. B. C. D.

288 kA 2 kA 50 mA 500 µa

12. The six basic forms of energy are: A. light, sun, magnetic, chemical, electrical, and mechanical B. electrical, mechanical, light, heat, magnetic, and chemical C. electrical, mechanical, sun, heat, chemical, and light D. potential, sun, light, chemical, electrical, and mechanical 13. How much energy is stored if 6.24 x 18 10 electrons are stored in 4 volts? A. 4 joules 18 B. 1.56 x 10 electrons C. 1.56 coulombs 19 D. 2.496 x 10 electrons 14. With Ohm's law: A. current is inversely proportional to resistance

B. C. D.

resistance is directly proportional to voltage voltage is indirectly proportional to power current is directly proportional to resistance

15. Power is defined as: A. the rate at which energy is used B. watts C. energy D. the rate at which energy is generated 16. What is the most commonly used conductor in electronics? A. aluminum B. copper C. gold D. silver 17. With Ohm's law, no change in resistance means that current and voltage will be: A. directly proportional B. unable to produce energy C. the same D. inversely proportional 18. A leads? A. B. C. D.

potentiometer has how many 1 2 3 4

19. What is the ratio of 13 to 47 expressed in percent? A. 2.76% B. 27.7% C. 3.60% D. 36.1% 20. What happens to current and resistance if the voltage doubles? A. Current doubles and resistance doubles. B. Current doubles and resistance is halved. C. Current remains the same and resistance doubles. D. Current doubles and resistance remains the same. 21. One problem with mechanically variable resistors is noticeable in audio circuits as:

A. B. C. D.

scratchy noise lack of bass response variable volume too much treble response

τµΩ INDIABIX ELECTRONICS PART 2 A. use the highest possible scale B. keep test leads short C. zero the meter before using D. remove power from the circuit

22. A color code of orange, orange, orange is for what ohmic value? A. 22 kilohms B. 3300 ohms C. 44000 ohms D. 33 kilohms

30. Components designed to oppose the flow of current are called: A. insulators B. conductors C. resistors D. heat exchangers

23. A conductor's cross-sectional area in circular mils for 1/2 inch is:

31. How many amps are used by a 100 watt, 120 volt light bulb? A. 1.2 amps B. 12000 amps C. 830 mA D. 12 amps

A. B. C. D.

500 cmils 100,000 cmils 1,000,000 cmils 500,000,000 cmils

24. If a variable resistor's resistance varies in a nonuniform manner as the shaft is moved, it is considered to be: A. linear B. defective C. not wirewound D. tapered

32. The source is 24 volts and the load resistance is 100 Ω. What is the load current? A. 2.4 A B. 240 mA C. 24 mA D. 2.4 mA

25. Power is measured in units of: A. joules x charge B. joules/work C. joules x voltage D. joules/time

33. Resistors are identified as to wattage by: A. size B. color code C. types of materials D. internal construction

26. How many basic types of resistors exist? A. 1 B. 2 C. 3 D. 4

34. What type of resistors have a tolerance rating of 5% or greater? A. precision B. SIP C. general-purpose D. wirewound

27. With a complex circuit, a supply source senses: A. open circuit components B. when voltages need to be increased C. only a single resistive connection D. when complex currents are needed

35. Resistor tolerance is either printed on the component, or is provided by: A. keyed containers B. size C. color code D. ohmmeter reading

28. How many ohms of resistance allows a current of 720 µA to flow when 3.6 kV is applied? A. 200 n Ω B. 5kΩ C. 200 k Ω D. 5MΩ 29. Which is the most important step utilized when measuring resistors?

36. How many connections does a rheostat have? A. 1 B. 2 C. 3 D. 4 37. What are the parts of a rheostat? A. wiper and resistor track B. solenoid and armature C. contact and wire wound D. center tape and wiper

38. The load resistance increases. How will the load current change? A. vary B. remain constant C. increase D. decrease

46. A 22-gauge wire will have a diameter in mils of: A. 10.03 B. 22.35 C. 45.26 D. 71.96

39. What is the power dissipated by a 1.2 k Ω resistor with 12 volts across it? A. 12 W B. 1.2 W C. .12 W D. 12 mW 40. How many joules of energy will a 10 W lamp dissipate in one minute? A. 10 joules B. 60 joules C. 600 joules D. 3600 joules

47. The word work means that: A. energy has been transferred B. it is inversely related to energy C. no energy has been transferred D. work and energy are not related

41. Which type of test equipment is used to measure resistors? A. ohmmeter B. ammeter C. voltmeter D. watt meter 42. Resistance is: A. the opposition to current flow accompanied by the dissipation of heat B. symbolized by R, measured in ohms, and directly proportional to conductance C. directly proportional to current and voltage D. represented by the flow of fluid in the fluid circuit 43. Electrical equipment is protected against excessive current by a(n): A. fusible wire link B. insulated glass container C. metal ended coil D. circuit opener

48. A good fuse will have: A. zero ohms resistance B. a medium resistance C. a high resistance D. an infinite resistance 49. What property does an incandescent lamp possess? A. cold resistance B. hot resistance C. ballast resistance D. both cold and hot resistance 50. One advantage of a carbon film resistor over a carbon composition resistor is: A. less circuit noise B. smaller size C. higher wattage D. poor tolerance 51. If a metallic conductor has a positive temperature coefficient of resistance, then: A. as temperature increases, resistance decreases B. as current increases, resistance decreases C. as voltage increases, current increases D. as temperature increases, resistance increases

44. If resistance decreases, then current will: A. decrease B. increase C. remain the same D. double

52. What value of a ±5% 1.3 k Ω resistor as measured by a digital voltmeter would be considered within tolerance? A. 1234 Ω B. 1235 Ω C. 1366 Ω D. 1367 Ω

45. A wire with a smaller cross-sectional area will produce: A. less heat B. more conductance C. less resistance D. more heat

53. If a calculator display was "0.00263," what would this answer be in percent? A. 0.026% B. 0.26% C. 2.63% D. 26.3%

τµΩ INDIABIX ELECTRONICS PART 2 54. A 33 kΩ resistor with a 20% tolerance checks out as ok with which of the following ohmmeter readings? A. 26400 ohms B. 24183 ohms C. 6600 ohms D. 39970 ohms 2

55. For P = V /R, a decrease in resistance should produce: A. a decrease in power B. an increase in ohms C. an increase in power D. a decrease in current 56. After a lamp is turned on, its filament resistance will change to become: A. less resistive B. cooler C. brighter D. more resistive 57. Wirewound resistors are usually used in circuits that have: A. high current B. negative temperature coefficients C. low power D. high voltage 58. How is power dissipated in a resistor? A. by resistance B. by voltage C. by current D. by heat 59. Resistance in a circuit is: A. opposition to current B. opposition to voltage C. the same as current D. the same as voltage 60. The unit designator for resistance value is the: A. ampere B. ohm C. volt D. watt 61. One ampere of current flowing through one ohm of resistance is equal to: A. 1 horsepower B. 1 Btu C. 1 watt D. 1 joule 62. Good insulators: A. have few electrons in their outer shells

B. C. D.

have a large dielectric strength have a small breakdown voltage have many electrons in the nucleus

ALTERNATING CURRENT VS DIRECT CURRENT 1. What are the two main applications for ac? A. direct, pulsating B. electric, magnetic C. power, information D. static, dynamic 2. The distance that a signal's energy can travel in the time it takes for one cycle to occur is called the signal's: A. amplitude B. frequency C. wavelength D. period 3. One oscilloscope selector knob that allows the major and minor divisions of the graticule to be used to determine a signal amplitude value is called the: A. time/cm control B. position control C. intensity control D. volts/cm control 4. If current varies periodically from zero to a maximum, back to zero, and then repeats, the signal is: A. direct B. alternating C. pulsating D. repetitive 5. What voltage will an ac voltmeter display? A. rms B. average C. peak D. peak-to-peak 6. What is the peak value of a household appliance that uses a 230 V ac source? A. 163 V B. 230 V C. 325 V D. 480 V 7. What is the waveform period difference between the 60 Hz electricity used in this country and the 50 Hz used in Europe? A. 3 ms

B. C. D.

16 ms 4 ms 20 ms

8. Test equipment selection enables the technician to both generate signals and: A. change circuit conditions B. inject signals C. sense circuit conditions D. change signal frequencies 9. Why is ac current transfer more effective than dc current transfer over long distances? A. due to the height of power lines B. due to the use of ac generators C. due to step-up and step-down transformers reducing I2R losses D. due to very high voltages 10. A sine wave reaches maximum positive voltage at: A. 90° B. 0° C. –90° D. 360° 11. Which percentages of full-amplitude rise time are used for a pulse wave? A. 0 to 50 percent B. 0 to 100 percent C. 5 to 95 percent D. 10 to 90 percent 12. What is the average value of a 12 V peak wave? A. 3.82 V B. 4.24 V C. 7.64 V D. 9.42 V 13. A test equipment item that has the ability to produce either square, triangular, or sawtooth waveforms is called: A. a function generator B. a radio frequency generator C. an audio frequency generator D. a frequency meter or counter 14. The current is flowing in what direction?

τµΩ INDIABIX ELECTRONICS PART 2 C. in both directions at the same time D. 50% of the time clockwise and 50% of the time counterclockwise 15. What does the CRT oscilloscope display? A. voltage and period B. current and frequency C. rms voltage and current D. frequency and voltage 16. Power companies supply ac, not dc, because: A. it is easier to transmit ac B. there is no longer a need for dc C. dc is more dangerous D. there are not enough batteries 17. If a waveform period is determined to be 10 microseconds in duration, what is the frequency of the signal? A. 100 Hz B. 1000 Hz C. 10 kHz D. 100 kHz 18. The phase difference between sine waves of different frequencies is: A. equal to their frequency differences B. the difference in their fixed time displacement C. the same throughout time D. constantly changing 19. If a sine wave signal is 100 mV peakto-peak, how many volts would be measured by a voltmeter? A. 14.14 mV B. 35.4 mV C. 63.7 mV D. 70.7 mV 20. What term expresses the frequency of a rectangular wave? A. B. C. D.

Hz period PRF PRT

21. AC effective voltage is named:

A. B.

clockwise counterclockwise

A. B. C. D.

average peak peak-to-peak root mean square

22. If a voltmeter measures a sine wave as 500 mV, what would be its average value? A. 159.0 mV B. 318.5 mV C. 353.5 mV D. 451.0 mv 23. One adjustable knob on the oscilloscope that allows the trace to be aligned with a reference graticule is called the: A. position control B. focus control C. intensity control D. volts/cm control 24. Signal comparisons may be most easily seen when using which item of test equipment? A. spectrum analyzer B. multimeter C. function generator D. dual trace oscilloscope 25. The magnitude that an alternation varies from zero is called its: A. altitude B. amplitude C. attitude D. polarity 26. The power that is distributed from a power plant to your home is: A. high voltage to high voltage B. low voltage to high voltage C. high voltage to low voltage D. low voltage to low voltage 27. A rectangular wave that has a duty cycle of 50 percent could be called a: A. c wave B. sawtooth wave C. square wave D. triangle wave 28. A triangle wave consists of repeating: A. positive ramps only B. negative ramps only C. positive and negative ramps of equal value D. positive and negative ramps of unequal value 29. What is the name of a device used to directly measure the frequency of a periodic wave? A. oscilloscope B. frequency meter or counter C. audio frequency generator

D.

radio frequency generator

30. Which control should be moved to display more cycles of a signal on an oscilloscope? A. horizontal position to left or right B. volts/cm to a smaller number C. vertical position to top or bottom D. time/cm to a higher setting 31. What is the name of a device that converts sound waves to electrical waves? A. an amplifier B. an antenna C. a filter D. a microphone 32. If the frequency of a radio wave is increased, then its wavelength will: A. increase B. decrease C. remain the same D. cannot tell 33. What is the rms voltage value of an ac signal whose peak oscilloscope display uses 3 major divisions above the zero setting? (V/cm = 5) A. 5.3 V B. 10.6 V C. 15.0 V D. 21.2 V 34. What is the peak-to-peak current value when an ammeter measures a 20 mA value? A. 14 mA B. 28 mA C. 40 mA D. 57 mA 35. How long would it take to transmit an electromagnetic wave to a receiving antenna 1,000 miles away? A. 5.38 ms B. 10.8 ms C. 53.8 ms D. 108 ms 36. What is the waveform period of a square wave signal that horizontally covers 3 major divisions per cycle? (time/cm = 50 ms) A. 50 ms B. 100 ms C. 150 ms D. 200 ms

τµΩ INDIABIX ELECTRONICS PART 2 37. A sine wave has: A. four quadrants B. two alternations C. one period D. all of the above 38. What is the peak-to peak voltage of a 56 Vrms ac voltage? A. 158 V B. 164 V C. 82 V D. 79 V 39. One oscilloscope selector knob that allows the major and minor divisions of the graticule to be used to determine a waveform period is called a: A. B. C. D.

focus control time/cm control intensity control volts/cm control

40. What is the period of a 16 MHz sine wave? A. 196 ns B. 62.5 ns C. 31.25 ns D. 19.9 ns

SEMICONDUCTOR PRINCIPLE 1. Intrinsic semiconductor material is characterized by a valence shell of how many electrons? A. 1 B. 2 C. 4 D. 6 2. Ionization within a P-N junction causes a layer on each side of the barrier called the: A. junction B. depletion region C. barrier voltage D. forward voltage 3. What is the most significant development in electronics since World War II? A. the development of color TV B. the development of the diode C. the development of the transistor D. the development of the TRIAC

4. What causes the depletion region? A. doping B. diffusion C. barrier potential D. ions 5. What is an energy gap? A. the space between two orbital shells B. the energy equal to the energy acquired by an electron passing a 1 V electric field C. the energy band in which electrons can move freely D. an energy level at which an electron can exist 6. Silicon atoms combine into an orderly pattern called a: A. covalent bond B. crystal C. semiconductor D. valence orbit 7. In "n" type material, majority carriers would be: A. holes B. dopants C. slower D. electrons 8. Elements with 1, 2, or 3 valence electrons usually make excellent: A. conductors B. semiconductors C. insulators D. neutral 9. A commonly material is: A. arsenic B. boron C. gallium D. neon

used

pentavalent

10. Which material may also be considered a semiconductor element? A. carbon B. ceramic C. mica D. argon 11. In "p" type material, minority carriers would be: A. holes B. dopants C. slower D. electrons 12. What can a semiconductor sense?

A. B. C. D.

magnetism temperature pressure all of the above

13. When an electron jumps from the valence shell to the conduction band, it leaves a gap. What is this gap called? A. energy gap B. hole C. electron-hole pair D. recombination 14. Forward bias of a silicon P-N junction will produce a barrier voltage of approximately how many volts? A. 0.2 B. 0.3 C. 0.7 D. 0.8 15. Which semiconductor material is made from coal ash? A. germanium B. silicon C. tin D. carbon 16. When and who discovered that more than one transistor could be constructed on a single piece of semiconductor material: A. 1949, William Schockley B. 1955, Walter Bratten C. 1959, Robert Noyce D. 1960, John Bardeen 17. When is a P-N junction formed? A. in a depletion region B. in a large reverse biased region C. the point at which two opposite doped materials come together D. whenever there is a forward voltage drop 18. A P-N junction mimics a closed switch when it: A. has a low junction resistance B. is reverse biased C. cannot overcome its barrier voltage D. has a wide depletion region 19. Solid state devices were first manufactured during: A. World War 2 B. 1904 C. 1907 D. 1960

τµΩ INDIABIX ELECTRONICS PART 2 20. Electron pair bonding occurs when atoms: A. lack electrons B. share holes C. lack holes D. share electrons 21. How many valence electrons are in every semiconductor material? A. 1 B. 2 C. 3 D. 4 22. What is a type of doping material? A. extrinsic semiconductor material B. pentavalent material C. n-type semiconductor D. majority carriers 23. Minority carriers are many times activated by: A. heat B. pressure C. dopants D. forward bias 24. What is the voltage across R1 if the P-N junction is made of silicon?

A. B. C. D.

12 V 11.7 V 11.3 V 0V

25. If conductance increases as temperature increases, this is known as a: A. positive coefficient B. negative current flow C. negative coefficient D. positive resistance 26. Which of the following cannot actually move? A. B. C. D.

majority carriers ions holes free electrons

27. What electrical characteristic of intrinsic semiconductor material is controlled by the addition of impurities? A. conductivity

B. C. D.

resistance power all of the above

BIPOLAR JUNTION TRANSISTORS (BJT) 1. When transistors are used in digital circuits they usually operate in the: A. active region B. breakdown region C. saturation and cutoff regions D. linear region 2. Three different Q points are shown on a dc load line. The upper Q point represents the: A. minimum current gain B. intermediate current gain C. maximum current gain D. cutoff point 3. A transistor has a  of 250 and a base current, IB, of 20 µA. The collector current, IC, equals: A. 500 µA B. 5 mA C. 50 mA D. 5A 4. A current ratio of IC/IE is usually less than one and is called: A. beta B. theta C. alpha D. omega 5. With the positive probe on an NPN base, an ohmmeter reading between the other transistor terminals should be: A. open B. infinite C. low resistance D. high resistance 6. In a C-E configuration, an emitter resistor is used for: A. stabilization B. ac signal bypass C. collector bias D. higher gain 7. Voltage-divider bias provides: A. an unstable Q point B. a stable Q point C. a Q point that easily varies with changes in the transistor's current gain

D.

a Q point that is stable and easily varies with changes in the transistor’s current gain

8. To operate properly, a transistor's base-emitter junction must be forward biased with reverse bias applied to which junction? A. collector-emitter B. base-collector C. base-emitter D. collector-base 9. The ends of a load line drawn on a family of curves determine: A. saturation and cutoff B. the operating point C. the power curve D. the amplification factor 10. If VCC = +18 V, voltage-divider resistor R1 is 4.7 kΩ, and R2 is 1500 Ω, what is the base bias voltage? A. 8.70 V B. 4.35 V C. 2.90 V D. 0.7 V 11. The C-B configuration is used to provide which type of gain? A. voltage B. current C. resistance D. power 12. The Q point on a load line may be used to determine: A. VC B. VCC C. VB D. IC 13. A transistor may be used as a switching device or as a: A. fixed resistor B. tuning device C. rectifier D. variable resistor 14. If an input signal ranges from 20–40 µA (microamps), with an output signal ranging from .5–1.5 mA (milliamps), what is the ac beta? A. 0.05 B. 20 C. 50 D. 500 15. Which is beta's current ratio? A. IC/IB B. IC/IE

τµΩ INDIABIX ELECTRONICS PART 2 C. IB/IE D. IE/IB 16. A collector characteristic curve is a graph showing: A. emitter current (IE) versus collector-emitter voltage (VCE) with (VBB) base bias voltage held constant B. collector current (I C) versus collector-emitter voltage (V CE) with (VBB) base bias voltage held constant C. collector current (IC) versus collector-emitter voltage (VC) with (VBB) base bias voltage held constant D. collector current (IC) versus collector-emitter voltage (VCC) with (VBB) base bias voltage held constant 17. With low-power transistor packages, the base terminal is usually the: A. tab end B. middle C. right end D. stud mount 18. When a silicon diode is forward biased, what is V BE for a C-E configuration? A. voltage-divider bias B. 0.4 V C. 0.7 V D. emitter voltage 19. What is the current gain for a common-base configuration where IE = 4.2 mA and IC = 4.0 mA? A. 16.80 B. 1.05 C. 0.20 D. 0.95 20. With a PNP circuit, the most positive voltage is probably: A. ground B. VC C. VBE D. VCC 21. If a 2 mV signal produces a 2 V output, what is the voltage gain? A. 0.001 B. 0.004 C. 100 D. 1000 22. The symbol h fe is the same as:  A.

B. C. D.

 hi-fi 

23. Most of the electrons in the base of an NPN transistor flow: A. out of the base lead B. into the collector C. into the emitter D. into the base supply 24. In a transistor, collector current is controlled by: A. collector voltage B. base current C. collector resistance D. all of the above 25. Total emitter current is: A. IE – IC B. IC + IE C. IB + IC D. IB – IC 26. Often a common-collector will be the last stage before the load; the main function(s) of this stage is to: A. provide voltage gain B. provide phase inversion C. provide a high-frequency path to improve the frequency response D. buffer the voltage amplifiers from the low-resistance load and provide impedance matching for maximum power transfer 27. For a C-C configuration to operate properly, the collector-base junction should be reverse biased, while forward bias should be applied to which junction? A. collector-emitter B. base-emitter C. collector-base D. cathode-anode 28. The input/output relationship of the common-collector and common-base amplifiers is: A. 270 degrees B. 180 degrees C. 90 degrees D. 0 degrees 29. If a transistor operates at the middle of the dc load line, a decrease in the current gain will move the Q point:

A. B. C. D.

off the load line nowhere up down

30. Which is the higher gain provided by a C-E configuration? A. voltage B. current C. resistance D. power 31. What is the collector current for a C-E configuration with a beta of 100 and a base current of 30 µA? A. 30 µA B. .3 µA C. 3 mA D. 3 MA

FIELD EFFECT TRANSISTORS (FET) 1. Junction Field Effect Transistors (JFET) contain how many diodes? A. 4 B. 3 C. 2 D. 1 2. When an input delta of 2 V produces a transconductance of 1.5 mS, what is the drain current delta? A. 666 mA B. 3 mA C. 0.75 mA D. 0.5 mA 3. When not in use, MOSFET pins are kept at the same potential through the use of: A. shipping foil B. nonconductive foam C. conductive foam D. a wrist strap 4. D-MOSFETs are sometimes used in series to construct a cascode highfrequency amplifier to overcome the loss of: A. low output impedance B. capacitive reactance C. high input impedance D. inductive reactance 5. A "U" shaped, opposite-polarity material built near a JFET-channel center is called the:

τµΩ INDIABIX ELECTRONICS PART 2 A. gate B. block C. drain D. heat sink 6. When testing an n-channel DMOSFET, resistance G to D = ∞, resistance G to S =∞ , resistance D to SS = ∞ and 500 Ω, depending on the polarity of the ohmmeter, and resistance D to S = 500 Ω. What is wrong? A. short D to S B. open G to D C. open D to SS D. nothing 7. In the constant-current region, how will the IDS change in an n-channel JFET? A. As VGS decreases ID decreases. B. As VGS increases ID increases. C. As VGS decreases ID remains constant. D. As VGS increases ID remains constant 8. A MOSFET has how many terminals? A. 2 or 3 B. 3 C. 4 D. 3 or 4 9. IDSS can be defined as: A. the minimum possible drain current B. the maximum possible current with VGS held at –4 V C. the maximum possible current with VGS held at 0 V D. the maximum drain current with the source shorted 10. What is the input impedance of a common-gate configured JFET? A. very low B. low C. high D. very high 11. JFET terminal "legs" are connections to the drain, the gate, and the: A. channel B. source C. substrate D. cathode 12. A very simple bias for a D-MOSFET is called: A. self biasing B. gate biasing C. zero biasing D. voltage-divider biasing

τµΩ INDIABIX ELECTRONICS PART 2 13. With the E-MOSFET, when gate input voltage is zero, drain current is: A. at saturation B. zero C. IDSS D. widening the channel 14. With a 30-volt V DD, and an 8-kilohm drain resistor, what is the E-MOSFET Q point voltage, with ID = 3 mA? A. 6V B. 10 V C. 24 V D. 30 V 15. When an input signal reduces the channel size, the process is called: A. enhancement B. substrate connecting C. gate charge D. depletion 16. Which JFET configuration would connect a high-resistance signal source to a low-resistance load? A. source follower B. common-source C. common-drain D. common-gate 17. How will electrons flow through a pchannel JFET? A. from source to drain B. from source to gate C. from drain to gate D. from drain to source 18. When VGS = 0 V, a JFET is: A. saturated B. an analog device C. an open switch D. cut off 19. When applied input voltage varies the resistance of a channel, the result is called: A. saturization B. polarization C. cutoff D. field effect 20. When is a vertical channel EMOSFET used? A. for high frequencies B. for high voltages C. for high currents D. for high resistances 21. When the JFET is no longer able to control the current, this point is called the:

A. B. C. D.

breakdown region depletion region saturation point pinch-off region

22. With a JFET, a ratio of output current change against an input voltage change is called: A. transconductance B. siemens C. resistivity D. gain 23. Which type of JFET bias requires a negative supply voltage? A. feedback B. source C. gate D. voltage divider 24. How will a D-MOSFET input impedance change with signal frequency? A. As frequency increases input impedance increases. B. As frequency increases input impedance is constant. C. As frequency decreases input impedance increases. D. As frequency decreases input impedance is constant. 25. The type of bias most often used with E-MOSFET circuits is: A. constant current B. drain-feedback C. voltage-divider D. zero biasing 26. The transconductance curve of a JFET is a graph of: A. IS versus VDS B. IC versus VCE C. ID versus VGS D. ID × RDS 27. The common-source JFET amplifier has: A. a very high input impedance and a relatively low voltage gain B. a high input impedance and a very high voltage gain C. a high input impedance and a voltage gain less than 1 D. no voltage gain 28. Using voltage-divider biasing, what is the voltage at the gate V GS?

A. B. C. D.

5.2 V 4.2 V 3.2 V 2.2 V

29. The overall input capacitance of a dual-gate D-MOSFET is lower because the devices are usually connected: A. in parallel B. with separate insulation C. with separate inputs D. in series 30. What is the transconductance of an FET when ∆ID = 1 mA and ∆V GS = 1 V? A. 1 kS B. 1 mS C. 1kΩ D. 1mΩ 31. Which component is considered to be an "OFF" device? A. transistor B. JFET C. D-MOSFET D. E-MOSFET 32. In an n-channel JFET, what will happen at the pinch-off voltage? A. the value of VDS at which further increases in VDS will cause no further increase in I D B. the value of VGS at which further decreases in VGS will cause no further increases in I D C. the value of VDG at which further decreases in V DG will cause no further increases in I D D. the value of V DS at which further increases in VGS will cause no further increases in I D

THYRISTORS AND TRANSDUCERS 1. A TRIAC: A. can trigger only on positive gate voltages

INDIABIX-PART-3-ELEX-MCQs-080918.pdf

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