Electronic Circuits - I : Lab Manual

Electronic Circuits I Lab - Record Note

LAB EXPERIMENTS

Department of ECE / VVCET | Page 1


Circuit Diagram:

Model Graph:



Expt. No

: 01

Date

:

FIXED BIAS AMPLIFIER CIRCUIT USING BJT

Aim: To design and construct a common emitter amplifier with fixed bias, measurement of gain and gain-bandwidth product by plotting its frequency response.

Equipments / Components required: S.No

Name of the Component / Apparatus

1

NPN Transistor

2

Resistor

3

Capacitor

4

Signal Generator

5

CRO

6

RPS

7

Breadboard

8

Connecting wires

Specification / Range

Quantity

Theory:

In order to operate the transistor in the desired region, we have to apply an external dc voltage of correct polarity and magnitude to the two junctions of the transistor. This is called biasing of the transistor. When we bias a transistor, we establish a certain current and voltage conditions for the transistor. These conditions are called operating conditions or dc operating point or quiescent point. This point must be stable for proper operation of transistor. An important and common type of biasing is called Fixed Biasing. The circuit is very simple and uses only few components. But the circuit does not check the collector current which increases with the rise in temperature.



Circuit Design: VCC =

β= S

=β+1

S

=

S

=

We know that, IB

VBE = ----

VCE =

IC =

β=S–1

+1

= IC / β

IB

=

IB

=

/ mA

To find RB and RC: VCC

= IB RB + VBE

RB

= (VCC - VBE) / IB =(

RB

=

VCC

= IC RC + VCE.

RC

= VCC - VCE / IC =(

RC

)/

)/

=



Circuit Analysis for Base resistor or fixed biasing technique:

It is required to find the value of RB so that the required collector current flows in the zero signal conditions. Let IC be the required zero signal collector current. Therefore

IB = IC / β

--------- (1)

Where, β is the current amplification factor for CE configuration.

Applying KVL to Base-Emitter loop,

VCC = IB RB + VBE RB = (VCC - VBE) / IB

--------- (2)

Eqn. (2) can be rewritten as, RB = VCC / IB;

since VCC >> VBE VBE can be Neglected

Stability factor(s): S= β + 1

Advantages of Base Resistor Method: 1. The biasing circuit is very simple as only one resistance RB is required. 2. Biasing conditions can easily be set and the calculations are simple. 3. There is no loading of the source by the biasing circuit since no resistor is employed across base emitter junction.

Disadvantages of Base Resistor Method: 1. This method provides poor stabilization. 2. The stability factor is very high.



Tabulation: Input Signal S.No

Output Signal

Condition Amplitude Frequency Amplitude

1

Without Bias

2

With Bias

Frequency

Tabulation to find the frequency response: Vin =

S.No

Frequency f (Hz)

Output Voltage V0 (Volts)

Gain =

Gain = 20

dB



Procedure

•

Connect the circuit as per the circuit diagram

•

Set Vin = 50mV in the signal generator. Keeping input voltage constant, vary the frequency from 1Hz to 1MHzin regular steps.

•

Note down the corresponding output voltage.

•

Plot the graph: Gain in dB Vs Frequency in Hz.

•

Calculate the Bandwidth from the Frequency response graph

To plot the Frequency Response

•

The frequency response curve is plotted on a semi-log scale.

•

The mid frequency voltage gain is divided by√2 and these points are marked in the frequency response curve.

•

The high frequency point is called the upper 3dB point.

•

The lower frequency point is called the lower 3dB point.

•

The difference between the upper 3dB point and the lower 3dB point in the frequency scale gives the bandwidth of the amplifier.

•

From the plotted graph the bandwidth is obtained. (i.e) Bandwidth = fH - fL





Result: Thus, the fixed bias amplifier was constructed and the frequency response curve is plotted. Gain Gain Bandwidth product

= =





Viva Questions and answers: 1. The transistor is said to be in active region when collector junction is ………………… biased and emitter junction is …………………… biased. 2. A transistor connected in common base configuration has …………..……. input resistance and ………………… output resistance. 3. As the magnitude of the collector junction reverse bias increases, the effective base width ………………….. 4. The DC load line of a transistor circuit is a graph between …………………. and ………………. 5. The negative part of the output signal starts clipping, if Q-point of the circuit moves towards the ………………………………….. point. 6. To avoid thermal runaway in the design of analog circuit, the operating point of the BJT should satisfy the condition ……………………………….. 7. Improper biasing of a transistor leads to …………………….………………….. in output signal. 8. For a transistor if RB = 40 KΩ, Vin = 2.7 V and β = 100 then value of IC is ………….…….. 9. Vin = VCC = 12 V, β = 50, VCE = 2 V and RC = 5 KΩ then value of RB is …………….………… 10. The expression for stability factor of a BJT circuit is given as ……………………………….……..


Electronic Circuits I Lab L - Record Note

Circuit Diagram:

Model Graph:



Expt. No

: 02

Date

:

BJT COMMON EMITTER AMPLIFIER USING VOLTAGE DIVIDER BIAS

Aim: To design and construct a common emitter amplifier with self bias, measurement of gain and gain-bandwidth product by plotting its frequency response.



1

NPN Transistor

2

Resistors

3

Capacitors

4

Signal Generator

5

CRO

6

RPS

7

Breadboard

8

Connecting wires


Quantity

Theory: This type of biasing is otherwise called Emitter Biasing. The necessary biasing is provided using 3 resistors: R1, R2 and Re. The resistors R1 and R2 act as a potential divider and give a fixed voltage to the base. If the collector current increases due to change in temperature or change in β, the emitter current Ie also increases and the voltage drop across Re increases, reducing the voltage difference between the base and the emitter. Due to reduction in Vbe, base current Ib and hence collector current Ic also reduces. This reduction in Vbe, base current Ib and hence collector current Ic also reduces. This reduction in the collector current compensates for the original change in Ic. The stability factor S= (1+β) * ((1/ (1+β)). To have better stability, we must keep Rb/Re as small as possible. Hence the value of R1 R2 must be small. If the ratio Rb/Re is kept fixed, S increases with β. Merits: •

Operating point is almost independent of β variation.

•

Operating point stabilized against shift in temperature.



Circuit Design: VCC =

IE =

hfe =

VCE =

VE =

To find RC: VCC

= IC RC + VCE + IE RE = IC RC + VCE + VE

IC RC RC

= VCC - VCE - VE = (VCC -VCE - VE) / IC =(

RC

------------ (VE=IE RE)

)/

=

To find VB: VB

= VBE + VE =

VB

=

S

=

(1+ β) (1+ (RB / RE) 1+ β + (RB / RE)

Solving the above equation we get, S

= 1+ (RB / RE)

RB

= (S-1) RE =(

RB

)x(

)

=

To find R1 and R2: VB

= VCC R2 / R1 + R2

------ (1)

R1 + R2 = VCC R2 / VB

------ (A)

RB

------ (2)

= R1 R2 / R1 + R2

R1 + R2 = R1 R2 / RB

------ (B)

From the Equations A and B, (LHS = RHS) VCC R2 / VB R1

= R1 R2 / RB = RB VCC / VB =(

)x

R1

=

RB

= R1 R2 / R1 + R2

/

We know that,

Sub. RB =

and R1 = =

in above equation, x R2 /

+ R2

Solving the above equation we get, R2

=



Circuit Analysis for Self Bias or Voltage Divider Bias: To find collector Current (IC): I1 = VCC / R1 + R2

---- (1)

VB = VCC R2 / R1 + R2

---- (2)

RB = R1 R2 / R1 + R2

---- (3)

VBE = VB - VE VB = VBE + VE

---- VE = IE RE

VB = VBE + IE RE IE = VB – VBE / RE (Or) IC = VB – VBE / RE

---- (4) IE ≈ IC (IE = IC + IB (IBNegligible))

To find Collector – Emitter Voltage (VCE): Applying KVL to the Collector side, VCC = IC RC + VCE + IE RE VCE = VCC - IC RC - IE RE VCE = VCC - IC (RC+RE) --------- IE ≈ IC Stabilization (S): In this circuit excellent stabilization is provided by RE VB = VBE + IC RE

--------- IE ≈ IC

If collector Current (IC) increases due to rise in temperature, causes the voltage drop across emitter resistance RE to increase. As voltage drop across R2 is independent of IC therefore, VBE decreases. This in-turn causes IB to decrease which in-turn restore IC to the original value. (1+ β) (1+ (RB / RE))

Stability Factor(S) =

1+ β + (RB / RE) To find load resistance: RL = VCC – VE / 2 IE To find the value of coupling capacitor: CC = 1/ 2∏f XCC Where, XCC = Zi / 10 = R in / 10 Zi = R1 ll R2 ll h ie h ie = h

fe

× re

re = VT / IE

-------- (VT = 26mV)

To find the value of bypass capacitor: CE = 1/ 2∏f XCE Where XCE= R E / 10



Tabulation:

Input Signal S.No

Output Signal

Condition Amplitude Frequency Amplitude Frequency

1

Without Bypassed emitter Resistor

2

With Bypassed emitter Resistor


S.No

Frequency f (Hz)


Gain =

Gain = 20 dB



Procedure

•


•


•


•


•



•


•


•


•


•


•






Result: Thus the frequency response of CE amplifier in self bias configuration was determined. Gain Gain Bandwidth product

= =





Viva Questions and answers: 1. The Voltage divider biasing is used in amplifiers quite often because it makes the operating point independent of …………………………. 2. In a transistor amplifier, the reverse saturation current ICO …………………………… for every 10o rise in temperature. 3.

In BJT largest current flow occurs in the ……………………….. region.

4. In a BJT with = 0.98, β equals ………………….. 5. The Stability factor S should be kept as …………………… as possible to have better thermal stability. 6. In CE configuration the phase shift between input and output voltages is ……………………. 7. The advantage of self bias over other types of biasing is its better ……………………………… 8. The two types of breakdown occurs in transistors are ………………………………………………… and ……………………………………………………………… 9. In self-bias configuration the emitter current is independent of …………………………………… 10. The BJT is mostly used as a ……………………………………. in communication systems and as a ……………………………………………….. in computer applications.



Circuit Diagram:

Model Graph:



Expt. No

: 03

Date

:

BJT COMMON COLLECTOR AMPLIFIER USING VOLTAGE DIVIDER BIAS

Aim: To design and construct a common collector amplifier with self bias, measurement of gain and gain-bandwidth product by plotting its frequency response.



1

NPN Transistor

2

Resistors

3

Capacitors

4

Signal Generator

5

CRO

6

RPS

7

Breadboard

8

Connecting wires


Quantity

Theory: A common-collector is one of three basic single-stage bipolar junction transistor amplifier topologies, typically used as a voltage buffer. In this circuit the base terminal of the transistor serves as the input, the emitter is the output, and the collector is common to both hence its name. This is the unique quality of the common-collector amplifier: an output voltage that is nearly equal to the input voltage. Examined from the perspective of output voltage change for a given amount of input voltage change, this amplifier has a voltage gain of almost exactly unity (1), or 0 dB. This holds true for transistors of any β value, and for load resistors of any resistance value. Given the voltage polarities across the base-emitter PN junction and the load resistor, we see that these must add together to equal the input voltage, in accordance with Kirchhoff’s Voltage Law. In other words, the load voltage will always be about 0.7 volts less than the input voltage for all conditions where the transistor is conducting. Cutoff occurs at input voltages below 0.7 volts, and saturation at input voltages in excess of battery (supply) voltage plus 0.7 volts. Because of this behavior, the common-collector amplifier circuit is also known as the voltage follower or emitter-follower amplifier, because the emitter load voltages follow the input so closely.



Circuit Design:

=

VCC =

VBE =

VCE =

IC =



Procedure

•


•


•


•


•



•


•


•


•


•


•




Tabulation: S.No

Condition

1

Without Bypassed emitter Resistor

2

With Bypassed emitter Resistor

Input Signal Amplitude

Output Signal

Frequency

Amplitude

Frequency


S.No

Frequency f (Hz)


Gain =

Gain = 20

dB



Result: Thus the frequency response of CC amplifier in self bias configuration was determined. Gain Gain Bandwidth product

= =





Viva Questions and answers: 1. The

…..................................................

transistor

configuration

is

much

less

temperature dependent. 2. A transistor connected in common collector configuration has ………………… input resistance and ……………….. output resistance. 3. The voltage gain of common collector configuration is ………………..……………………….. 4. Common collector configuration is used for ……………………………………………………….… 5. The Frequency response is a graph between ……………………………………………. and …………………………………………… 6. The common-collector amplifier circuit is also known as the ..………………………………… or …………………………………………… 7. The CB configuration amplifier has wider ………………………….…………………… than the CE configuration. 8. A transistor has β = 100 and collector current is 40 mA, then the value of emitter current is ………………..…. 9. If a transistor has β = 200, then value of is ………………………….. 10. In CC configuration the current amplification is given as …………………………………..



Circuit Diagram:

Model Graph:



Expt. No

: 04

Date

:

DARLINGTON AMPLIFIER USING BJT

Aim: To construct a Darlington current amplifier circuit, determination of gain and input resistance and to plot the frequency response characteristics



1

NPN Transistor

2

Resistors

3

Capacitors

4

Signal Generator

5

CRO

6

RPS

7

Breadboard

8

Connecting wires


Quantity

Theory: In some occasions, the current gain and input impedance often an emitter follower are insufficient to meet the requirement. In order to increase, the overall values of circuit gain (Ai) and the input impedance, two transistors are connected in series in emitter follower configuration such a circuit is known as Darlington amplifier. Note that emitter of the first transistor is connected to the base of the second transistor and the collector terminals of the two transistors are connected together. The result is that emitter current of the first transistor is base current of the second transistor. Therefore, the current gain of the pair is equal to product of individual current gains i.e., β = β1 β2



Circuit Design: VCC = 12 V

IE =1mA

S = 10

hfe =

f = 50 Hz

AV ≤ 1, A1= A11 * A12 hfe1 = hfe2; A1= (hfe) 2 Apply KVL to output loop, VCC

= VCE + VE

VCE

= VCC / 2

----- (1)

= 12 / 6 = 6V VCE

= 6V

----- (2)

From equation (1), 12

= 6 + VE

VE

= 12 – 6

= 6V

VE

= IE RE

----- (4)

RE

= VE / IE

= 6 / 1×10-3

RE

=6KΩ

----- (3)

----- (5)

The Stability factor (s), S

=

(1+ β) (1+ (RB / RE) 1+ β + (RB / RE)

Solving the above equation we get, S

= 1+RB / RE

10

= 1+RB / RE

RB

= (10-1) RE = (10-1) *(6×103)

RB

= 54 K Ω

VB

= VBE + VE

To find VB: = 0.7 + 6 = 6.7 V To find R1 and R2: VB

= VCC R2 / R1 + R2

------ (1)

R1 + R2

= VCC R2 / VB

------ (A)

RB

= R1 R2 / R1 + R2

------ (2)

R1 + R2

= R1 R2 / RB

------ (B)


Electronic Circuits I Lab - Record Note Here the high current gain is achieved with the minimum use of components. The biasing analysis is similar to that for one transistor except that two VBE drops are to be considered. Thus, Voltage across R2, V2 = VCC R2 / (R1 + R2) Voltage across RE, VE = V2 - 2 VBE Current through RE, IE2 = V2 - 2 VBE / RE Since the transistors are directly coupled, IE1 = IB2. Now, IB2 = IE2 / β2, IE1 = IE2 / β2. In practice, the two transistors are put inside single transistor housing and three terminals E, B and C are brought out as shown in figure. This three terminal device is known as Darlington transistor. The Darlington transistor acts like a single transistor that has high current gain and high input impedance. IE1 = IE2 / β2. Applications: When emitter follower cannot provide the required high input impedance and current gain, the Darlington amplifier is used.


Electronic Circuits I Lab - Record Note From the Equations A and B, (LHS = RHS) VCC R2 / VB R1

= R1 R2 / RB = RB VCC / VB = (54×103) * 12 / 6.7

R1

= 97 K Ω

RB

= R1 R2 / R1 + R2

We know that,

Sub. RB = 54 K Ω and R1 = 97 K Ω in above equation, 54×103 = 97×103 * R2 / 97×103 + R2 Solving the above equation we get, R2

= 122 K Ω ≈ 120 K Ω

To find Ci and C0: Ci

= XCi = Zi / 10

Zi

= R1 ll R2 ll hie

h

ie

fe

× re

= VT / IE = 26×10-3 / 1×10-3 = 26 Ω

re h

=h

ie

XCC

= = R1 ll R2 ll hie / 10 = 54 KΩ ll

XCC

----- RB

/ 10

= R1 R2 / R1 + R2 =

=

XCC

= 1/ 2∏f CC

CC

= 1/ (2×3.14×50×

)

= Ci

≈ 10 µ f

XC0

= 1/ 2∏f C0

XC0

= Z0 /10 = R E / 10

XC0

= 6 ×103/ 10 = 600 Ω

C0

= 1/ (2×3.14×50×600) = 5.3×10-6 = 5.3 µ f

C0

≈5µf



Procedure

•


•


•


•


•



•


•


•


•


•


•




Tabulation:

To find the frequency response: Vin =

S.No

Frequency f (Hz)


Gain =

Gain = 20 dB



Result: Thus, the Darlington current amplifier was constructed and the frequency response curve is plotted. Gain

=

Input resistance

=

Gain Bandwidth product

=





Viva Questions and answers: 1. The gain of a cascaded amplifier is equal to the ………………………….. of individual gains. 2. In multistage amplifiers, direct coupling is especially suited for amplifying changes in ……………………………………………… 3. In

Darlington

pair

the

two

stages

are

of

….................................................

configuration. 4. The Darlington pair is mainly used for …………………………………………………… 5. The Darlington amplifier has a ……………… input resistance, ……………. Output resistance and …………………….. current gain. 6. The Voltage gain of darlington amplifier is …………………………………….. 7. Transformer

coupling

is

used

in

multistage

amplifiers

to

provide

better

…………………………… between the stages. 8. RC Coupled amplifiers can be used for …............. range of frequencies. 9. The Complementary design of Darlington pair is called …………………… pair in which a ………………………………….. pair is employed. 10. The current gain of Darlington pair is equal to the ……………………… of the current gains of individual transistor.



Circuit Diagram:



Expt. No: 05 Date

SOURCE FOLLOWER WITH BOOT STRAPPED GATE RESISTANCE

:

Aim: To construct a source follower bootstrapped gate resistance amplifier circuit and to measure the input and output resistances.



1

Transistor

2

Resistors

3

Capacitors

4

Signal Generator

5

CRO

6

RPS

7

Breadboard

8

Connecting wires


Quantity

Theory: A common-source amplifier is one of three basic single-stage field-effect transistor (FET) amplifier topologies, typically used as a voltage or transconductance amplifier. The easiest way to tell if a FET is common source, common drain, or common gate is to examine where the signal enters and leaves. The remaining terminal is what is known as "common". In this example, the signal enters the gate, and exits the drain. The only terminal remaining is the source. This is a common-source FET circuit. The common-source (CS) amplifier may be viewed as a transconductance amplifier or as a voltage amplifier. (See classification of amplifiers). As a transconductance amplifier, the input voltage is seen as modulating the current going to the load. As a voltage amplifier, input voltage modulates the amount of current flowing through the FET, changing the voltage across the output resistance according to Ohm's law. However, the FET device's output resistance typically is not high enough for a reasonable transconductance amplifier (ideally infinite), nor low enough for a decent voltage amplifier (ideally zero). Another major drawback is the amplifier's limited high-frequency response. Therefore, in practice the output often is routed through either a voltage follower (common-drain or CD stage), or a current follower (common-gate or CG stage), to obtain more favorable output and frequency characteristics. The CS–CG combination is called a cascode amplifier.



Tabulation:

S.No

Category

Without bootstrapping

With bootstrapping

Amplitude 1

Input Signal Frequency Amplitude

2

Output Signal Frequency

3

Input resistance

4

Output resistance



Bootstrapping:

In analog circuit designs a bootstrap circuit is an arrangement of components used to boost the input impedance of a circuit by using a small amount of positive feedback, usually over two stages. This was often necessary in the early days of bipolar transistors, which inherently have quite low input impedance. The need for such arrangements has largely been alleviated by the use of modern field effect transistor designs, except when ultra-high input impedances are required. Note that because the feedback is positive, such circuits usually suffer from poor stability and noise performance compared to ones that don't bootstrap. AC amplifiers can use bootstrapping to increase output swing. A capacitor (usually referred as bootstrap capacitor) is connected from the output of the amplifier to the bias circuit, providing bias voltages that exceed the power supply voltage. Emitter followers can provide rail-to-rail output in this way, which is a common technique in class AB audio amplifiers.

Procedure:

1. Connections are made as per the circuit diagram. 2. The waveforms at the input and output are observed for cascade operations by varying the input frequency. 3. The biasing resistances needed to locate the Q-point are determined. 4. Set the input voltage as 1V and by varying the frequency, note the output voltage. 5. Calculate gain=20 log (Vo / Vin.) 6. A graph is plotted between frequency and gain





Result: Thus, the source follower with bootstrapped circuit is constructed and the output waveform is observed. Parameter

Without Bootstrapping

Without Bootstrapping

Input resistance Output resistance





Viva Questions and answers: 1. Bootstrapping is used to increase ………………………………………………of a transistor. 2. Although FET having high input impedance bootstrapping is needed in case where …………………………… input impedance is needed. 3. AC amplifiers use bootstrapping to increase ………………………………………………. 4. The

Common

drain

is

also

known

as

………………………………..

used

as

……………………………… 5. FET is a …………………… controlled device whereas BJT is a …………………… controlled device. 6. The circuit which employs positive feedback suffers form ………………….. and ……………………. 7. The Source follower circuit is used for impedance matching as it has ……………….. input impedance and ………………….. output impedance. 8. In JFET the current condition is due to only ………………….. carriers and so called as ………………… device. 9. If properly biased JFET act as ……………………….. controlled ……………………. source. 10. As the transconductance curve is parabolic, JFET is often called as ……………………….. device.



Circuit Diagram: Common Mode operation:

Differential mode operation:



Expt. No

: 06

Date

:

DIFFERENTIAL AMPLIFIER USING BJT

Aim: To construct a differential amplifier using BJT and to calculate the CMRR



1

Transistor

2

Resistors

3

Capacitors

4

Signal Generator

5

CRO

6

RPS

7

Breadboard

8

Connecting wires


Quantity

Theory: The differential amplifier is a basic stage of an integrated operational amplifier. It is used to amplify the difference between 2 signals. It has excellent stability, high versatility and immunity to noise. In a practical differential amplifier, the output depends not only upon the difference of the 2 signals but also depends upon the common mode signal. Transistor Q1 and Q2 have matched characteristics. The values of RC1 and RC2 are equal. Re1 and Re2 are also equal and this differential amplifier is called emitter coupled differential amplifier. The output is taken between the two output terminals. For the differential mode operation the input is taken from two different sources and the common mode operation the applied signals are taken from the same source. Common Mode Rejection Ratio (CMRR) is an important parameter of the differential amplifier. CMRR is defined as the ratio of the differential mode gain, Ad to the common mode gain, Ac. CMRR = Ad / Ac In ideal cases, the value of CMRR is very high.



Tabulation:

Input Signal S.No

Output Signal

Condition

Gain Amplitude

1

Differential mode

2

Common mode

Frequency

Amplitude

Frequency



Procedure:

•

Connections are given as per the circuit diagram.

•

To determine the common mode gain, we set input signal with voltage Vin=2V and determine Vo at the collector terminals.

•

Calculate common mode gain, Ac=Vo/Vin.

•

To determine the differential mode gain, we set input signals with voltages V1 and V2. Compute Vin=V1-V2 and find Vo at the collector terminals. Calculate differential mode gain, Ad=Vo/Vin.

•

Calculate the CMRR=Ad/Ac.

•

Measure the dc collector current for the individual transistors.

•

A graph is plotted between frequency and gain

Result: Thus, the differential amplifier was constructed and the CMRR was determined. CMRR =





Viva Questions and answers: 1. A differential amplifier, also known as a ……………………………. that multiplies the ………………… between two inputs by some constant factor. 2. If two inputs of a differential amplifier is zero then ouput should be ideally zero but some output exists due to ……………………………. 3. The two types of operations using differential amplifiers are ……………………. mode and …………………… mode. 4. As ………………………………………………..….. are often used when it is desired to null out noise or bias-voltages that appear at both inputs, a ………………. common-mode gain is usually considered good. 5. The CMRR is defined as the ratio between ………………………… and …………………………. 6. For better performance a differential amplifier with …………….. CMRR should be chosen. 7. To improve CMRR a …………………………………………………. circuit is used in place of emitter or collector resistor. 8. CMRR is expressed in ………………………………. 9. Differential amplifier is used as …………………… stage in Op-Amps. 10. In a perfectly symmetrical differential amplifier, Ac is …………. and the CMRR is ………...



Circuit Diagram:

Model Graph:



Expt. No

: 07

Date

:

CLASS - A POWER AMPLIFIER

Aim: To construct a Class A power amplifier and observe the waveform and to compute maximum output power and efficiency.

Apparatus Required: S.No.


1

Transistor

2

Resistor

3

Capacitor

4

Diode

5

Signal Generator

6

CRO

7

Regulated power supply

8

Bread Board

9

Connecting wires


Quantity

Theory: The power amplifier is said to be class A amplifier if the Q point and the input signal are selected such that the output signal is obtained for a full input cycle. Key Point: For this class, position of the Q point is approximately at the midpoint of the load line. For all values of input signal, the transistor remains in the active region and never enters into cut-off or saturation region.



Circuit Design:Pa = 500mW = 0.5Watts RL = 220 Ω 2 = VCC / 8 RL

Output power (Po)

=

VCC 2

VCC 2

=

880

VCC

=

30V

=

VCC / 2

=

30 / 2

VCE

=

15V

VCC

=

IL RL + VCE

VCC - VCE

=

IL RL

IL

=

VCC - VCE / RL

=

(30 – 15) / 220

=

0.07 Amps

Po × 8 RL 0.5 × (8×220) = VCC 2

Apply KVL to output loop, VCE

= 15V

The Collector Power is given by, PC

=

VCC IL

=

30 × 0.07

=

2 Watts

The Maximum output power is given by, PO

=

Vo 2 / RL

=

(15)2 / 220

=

1 Watts

Pin

=

Vi 2 / Zi

Vi

=

0.2 Volts

Zi

=

R1 ll R2 ll hie

=

h

=

VT / IE

(max)

The input power is given by,

h

ie

re h

ie

fe

× re

=

= 26×10-3 / 1×10-3 = 26 Ω

× 26

Zi

=

19.25

Pin

=

0.2 2 / 19.25

=

(PO

=

(1 /2) × 100

=

50 %

= 2.6 K Ω

= 2mWatts

The Efficiency is given by. η

η

(max)

/ PC) × 100


Electronic Circuits I Lab - Record Note When an A.C. input signal is applied, the collector voltage varies sinusoidally hence the collector current also varies sinusoidally the collector current flows for 360° (full cycle) of the input signal. In other words, the angle of the collector current flow is 360° i.e. one full cycle. The current and voltage waveforms for a class A operation are shown with the help of output characteristics and the load line, in the Figure. As shown in the Figure, for full input cycle, a full output cycle is obtained. Here signal is faithfully reproduced, at the output, without any distortion. This is an important feature of a class A operation. The efficiency of class A operation is very small. Procedure:

•

Test all the components using a multimeter. Set up the circuit and verify dc biasing conditions. To check the dc biasing conditions, remove input signal and capacitors in the circuit.

•

Connect the capacitors in the circuit and apply a sinusoidal signal from signal generator to the circuit input. Observe the input and output waveforms on the CRO screen simultaneously.

•

Keeping the input amplitude constant vary the frequency of the input signal from 0 Hz to 1 MHz. Measure the output amplitude corresponding to different frequencies and enter it in tabular column.

•

Plot the frequency response characteristics on a semi-log graph sheet with gain on Yaxis and log (f) on X-axis. Mark log (fL) and log (fH) corresponding to 1/ √2 times of the maximum gain.

•

Calculate the bandwidth of the amplifier using the expression BW = fH - fL.



Tabulation: To find the frequency response: Vin =

S.No

Frequency f (Hz)


Gain =

Gain = 20

dB



Result: Thus the Class A power amplifier was constructed to observe cross-over distortion and the circuit was modified to avoid the distortion. The following parameters were calculated: Maximum output power

=

Efficiency

=





Viva Questions and answers: 1. In Class A amplifier, the current in the output circuit flows for ……………………. 2. The maximum collector circuit efficiency of class A amplifier with a transformer coupled load is ……………. 3. The Class-A amplifiers as compared to Class-B amplifiers have …………………………………… 4. The Circuit efficiency of a class-A amplifier can be increased by using ………………………… 5. A Class-A transformer coupled amplifier is required to deliver a power output of 10 watts. The maximum power rating of the transistor should not be less than ………………… 6. Power amplifiers use ………………………. coupling between stages. 7. The power delivered to the load in a Class-A amplifier can be increased by using …………………………………………..…… at the load. 8. In Class-A operation, the power dissipation of a transistor is ………………………… with no input signal and …………………….. with largest input signal. 9. In a Class-A amplifier , VCE(max) = 25 V, VCE(min) = 5 V, then the overall efficiency for a direct coupled resistive load is ………… and for a transformer coupled load is ……………… 10. Silicon transistors do not operate at voltages higher than about 1000 volts where …………………………………… are used.



Circuit Diagram:

Tabulation:

Input Signal S.No

Output Signal

Condition Amplitude

1

Without Diode

2

With Diode

Frequency

Amplitude

Frequency



Expt. No

: 08

Date

:

CLASS B COMPLEMENTARY SYMMETRY POWER AMPLIFIER

Aim: To construct a Class B complementary symmetry power amplifier and observe the waveforms with and without cross-over distortion and to compute maximum output power and efficiency. Apparatus Required: S.No.


1

Transistor

2

Resistor

3

Capacitor

4

Diode

5

Signal Generator

6

CRO

7

Regulated power supply

8

Bread Board

9

Connecting wires


Quantity

Theory: A power amplifier is said to be Class B amplifier if the Q-point and the input signal are selected such that the output signal is obtained only for one half cycle for a full input cycle. The Q-point is selected on the X-axis. Hence, the transistor remains in the active region only for the positive half of the input signal. There are two types of Class B power amplifiers: Push Pull amplifier and complementary symmetry amplifier. In the complementary symmetry amplifier, one n-p-n and another

p-n-p transistor is used. The matched pair of transistor are used in the

common collector configuration. In the positive half cycle of the input signal, the n-p-n transistor is driven into active region and starts conducting and in negative half cycle, the pn-p transistor is driven into conduction. However there is a period between the crossing of the half cycles of the input signals, for which none of the transistor is active and output, is zero Hence the nature of the output signal gets distorted and no longer remains the same as the input. This distortion is called cross-over distortion. Due to this distortion, each transistor conducts for less than half cycle rather than the complete half cycle. To overcome this distortion, we add 2 diodes to provide a fixed bias and eliminate cross-over distortion.



Design: •

Output requirements VO = 50mW

DC biasing conditions

+VCC= 12 V

-VCC= -12V

VCE1 = VCE2 = 6V

P

dc

= 0.5 mW.

Selection of RL: the output of an audio amplifier is usually connected to a loud speaker whose impedance is normally 8W. Take RL = 8.2 Ω. Design of RC P

= IC2 × R = 78 mW

dc

Then IC = 78 mA IC (RC+ RL)

= VCC - VCE =12V - 6V

RC+ RL

= 76Ω

Then

RC = 76 – 8.2 = 67.8Ω. Use 62Ω, 2W

Design of R Base current of the transistors IB = IC / h

FE

= 78 mA / 40 = 1.95 mA.

We can see from the circuit VCC – (-VEE) = 2VR + 2VD where VR is the potential across the resistor R and VD is the diode drop. Then VR = 11.3 V Assume the current through RS is 10IB so as to avoid loading of the biasing network by the base currents. Then R = VR / 10IB = 579 Ω. Use 560 Ω Selection of coupling capacitors CC1 and CCC2 Since the frequency of interest is in the audio range,

Take CC1 = CCC2 = CCC3 = 10 µ F



Procedure:

•

Connections are given as per the circuit diagram without diodes.

•

Observe the waveforms and note the amplitude and time period of the input signal and distorted waveforms.

•

Connections are made with diodes.

•

Observe the waveforms and note the amplitude and time period of the input signal and output signal.

•

Draw the waveforms for the readings.

•

Calculate the maximum output power and efficiency.

Formula: Input power,

Pin

=

2VccIm/П

Output power,

Pout

=

VmIm/2

Power Gain or efficiency,

η

=

л/4(Vm/Vcc) 100



Model Graph:



Result: Thus the Class B complementary symmetry power amplifier was constructed to observe cross-over distortion and the circuit was modified to avoid the distortion. The following parameters were calculated: Maximum output power

=

Efficiency

=





Viva Questions and answers: 1. High power efficiency of a push-pull amplifier is due to the fact that there is no ……………………………………………………………………… 2. The output of a class-B amplifier consists of only ………………………………………………… 3. The maximum overall efficiency of a class-B push-pull amplifier cannot exceed ……………… percent. 4. Cross-over distortion occurs in ……………………………………… 5. A

Class-B

push-pull

amplifier

has

the

main

advantage

of

being

free

from

………..………………………….. distortion. 6. Class-AB operation is often used in power amplifiers in order to overcome …………………………………. 7. These Class-A, Class-B amplifiers are generally called as ……………....... amplifiers or ………………….. ……………… amplifiers. 8. The DC component in the push-pull configuration is …………………………….. 9. The Current gain of a power amplifier is usually between …………. to ……… 10. In power amplifier the input resistance is ………………….. than the output resistance.



Circuit Diagram for Half Wave Rectifier:

Without Filter:-

With Filter:-

Load Regulation using Zener Diode:-



Expt. No

: 09

Date

:

HALF WAVE RECTIFIER

Aim: To construct a half wave rectifier and to plot its input and output waveforms. Apparatus required: S.No.


1

Transformer

2

Diode

3

Resistor

4

Capacitor

5

CRO

6

Bread Board

7

Connecting wires


Quantity

Theory: Half wave rectifier: A rectifier is a circuit, which uses one or more diodes to convert AC voltage into DC voltage. In this rectifier during the positive half cycle of the AC input voltage, the diode is forward biased and conducts for all voltages greater than the offset voltage of the semiconductor material used. The voltage produced across the load resistor has same shape as that of the positive input half cycle of AC input voltage. During the negative half cycle, the diode is reverse biased and it does not conduct. So there is no current flow or voltage drop across load resistor. The net result is that only the positive half cycle of the input voltage appears at the output. Output Voltage

=

Ripple Factor

=

Load Regulation

=

=

= 1.21

where , VNL

=

no load output voltage

VFL

=

the full-load output voltage

=

the change in load current



Model graph:



Procedure:

•

Connect the circuit as per the circuit diagram.

•

Apply A.C input using transformer.

•

Measure the amplitude and time period for the input and output waveforms.

•

Now connect a capacitor parallel to the resistor and measure the amplitude and time period of the output waveform.

•

Calculate ripple factor.

Load Regulation •

Make the connections as per the circuit diagram.

•

Keeping the input voltage constant, vary the load resistance and measure the corresponding load current and load voltage.

•

Plot the load regulation characteristics (VL versus IL).

•

Mark the no load and full load output voltages on this graph.

•

Calculate the percentage load regulation



Tabulation:

Input Signal S.No.

Output Signal

Condition Amplitude

1

Without Filter

2

With Filter

Frequency

Amplitude

Frequency

Load Regulation:

S.No

IL (milli Amps )

VL (Volts)

1 2 3 4 5 6 7 8 9 10



Result: Thus the half wave rectifier was constructed and its input and output waveforms are drawn. Theoretical

Practical

DC Voltage Ripple Factor





Viva Questions and answers: 1. In a half-wave rectifier, the load current flows for only the ……………………………………….. of the input signal. 2. A half-wave rectifier is equivalent to a ……………………… circuit. 3. The output of a half-wave rectifier is suitable for running …........... motors. 4. The DC output polarity from a half-wave rectifier can be reversed by reversing the ………………….… 5. In a half wave rectifier if a resistance equal to load resistance is connected in parallel with the diode then the circuit will …………………………………………. 6. The efficiency and ripple factor of a half-wave rectifier is ………………… and ……………….. 7. The main job of a voltage regulator is to provide a nearly …….…………… output voltage. 8. In a Zener diode voltage regulator, the diode regulates so long as it is kept in ………………….. bias condition. 9. In Zener diode regulator, the maximum load current which can be supplied to load resistor is limited in between ………………….. and ………………………. 10. The percentage voltage regulation of voltage supply providing 100 V unloaded and 95 V at full load is …………………………………



Circuit diagram: Without Filter:-

With Filter:-

Load Regulation:-



Expt. No

: 10

Date

:

FULL WAVE RECTIFIER

Aim: To construct a full wave rectifier and to measure DC voltage under load and to calculate the ripple factor.

Apparatus Required: S.No.


1

Transformer

2

Diode

3

Resistor

4

Capacitor

5

CRO

6

Bread Board

7

Connecting wires


Quantity

Theory: The full wave rectifier conducts for both the positive and negative half cycles of the input ac supply. In order to rectify both the half cycles of the ac input, two diodes are used in this circuit. The diodes feed a common load RL with the help of a centre tapped transformer. The ac voltage is applied through a suitable power transformer with proper turn’s ratio. The rectifier’s dc output is obtained across the load. The dc load current for the full wave rectifier is twice that of the half wave rectifier. The lowest ripple factor is twice that of the full wave rectifier. The efficiency of full wave rectification is twice that of half wave rectification. The ripple factor also for the full wave rectifier is less compared to the half wave rectifier. Load regulation: The load regulation is the change in the regulated output voltage when the load current is changed from minimum (no load) to maximum (full load). Load regulation is denoted by LR and it is expressed as LR = VNL – V

FL

/ ∆IL

Where, VNL

=

Load voltage with no load current

V

FL

=

Load voltage with full load current

=

the change in load current



Model Graph:



Procedure:

•

Connections are given as per the circuit diagram wiyhout filter.

•

Note the amplitude and time period of the input signal at the secondary winding of the transformer and rectified output.

•

Repeat the same steps with the filter and measure Vdc.

•

Calculate the ripple factor.

•

Draw the graph for voltage versus time.

Load Regulation:

•

Make the connections as per the circuit diagram.

•

Keeping the input voltage constant, vary the load resistance and measure the corresponding load current and load voltage.

•

Plot the load regulation characteristics (VL versus IL).

•

Mark the no load and full load output voltages on this graph.

•

Calculate the percentage load regulation

Limitations: •

Although the changes in Zener current are much reduced yet the output is not absolutely constant. It is because both VBE and VZ decrease with the increase in room temperature.

•

The output voltage cannot be changed easily as no such means is provided.



Tabulation:

Input Signal S.No

Output Signal

Condition Amplitude

1

Without Filter

2

With Filter

Frequency

Amplitude

Frequency

Load Regulation:

S.No

IL (milli Amps )

VL (Volts)

1 2 3 4 5 6 7 8 9 10



Result: Thus the full wave rectifier was constructed and its input and output waveforms are drawn. Theoretical

Practical

DC Voltage Ripple Factor





Viva Questions and answers: 1. The ripple factor of a full-wave rectifier is …………………… 2. The use of capacitor filter gives satisfactory performance only when the load current is ……………………… 3. Bridge Rectifiers is preferred because ………………………………………………………………………. 4. The efficiency of a full wave rectifier is …………………………………………. 5. An ideal Voltage regulator has a voltage regulation of ………………………………… 6. A Voltage regulator is a circuit which maintains a ……………………………. Output voltage inspite of variations in AC input voltage or load current. 7. The expression for Dc output voltage for a full wave rectifier is ………………………………….. 8. If the input supply frequency is 50 Hz, the output ripple frequency of a full wave rectifier is …………………………… 9. A Rectifier circuit is followed with ………………………… and ………………………………… circuits in order to get a constant DC output voltage. 10. The output of a transistor series regulator is approximately equal to Zener voltage but it can also be used for …………………… load currents.


Electronic Circuits - I : Lab Manual

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