AOI-22

AOI-22 design Introduction This report studies the design of AOI-22 function. It shows the De'morgan analysis, the truth table, schematic figure, the stic diagram, drawn layout using !-edit and the output signals simulated by A"D #spice. The function The function to be analy$ed is AOI-22 %and-or-in&ert with two of two-input and gates Ored together with a (or gate. The technology used is ).*um %!ambda + ).*um. ere is a gate schematic of the function

De'morgan Analysis /%0 + %A.13.D' + %A.1'.%3.D' + %A'1'.%3'D' The truth table A ) ) ) ) ) ) ) ) 4 4 4 4 4 4 4 4

B ) ) ) ) 4 4 4 4 ) ) ) ) 4 4 4 4

C ) ) 4 4 ) ) 4 4 ) ) 4 4 ) ) 4 4

D ) 4 ) 4 ) 4 ) 4 ) 4 ) 4 ) 4 ) 4

F(x) F(x) 4 4 4 ) 4 4 4 ) 4 4 4 ) ) ) ) )

The transistor schematic figure

The stick diagram

AI!"" layout

The extraction file * Circuit Extracted by Tanner Research's L-Edit Version 8.30 / Extract Version 8.30 ; * T! "i#e$ %$&()-.tdb * Ce##$ Ce##0 Version +.03 * Extract e,inition "i#e$ C$&Tanner&LEdit83&a#es&tech&osis&hn01.ext * Extract ate and Tie$ +/+2/00 - +1$1 * 4(E 45E L)E * + 6 V 70139 * 3 6 out 7:.1:.19 *  6 V 70+39 * 8 6 ! 7.18.19 *  6 C 73.1.19 * +0 6  70.1.19 * + 6  7+:.19

58 + * 58 52  * 52 5: 3 * 5: 51  * 51 5 2 * 5 53  * 53 5 1 * 5 5+ 3 * 5+

+  ++ <5( L6u =61u 6+1 <6++u 62.1 <6+u R)4 %TE (>RCE !>L? 7+1.1 32 +2.1 9 +0 3 ++ <5( L6u =61u 62.1 <6+u 6+1 <6++u R)4 %TE (>RCE !>L? 73.1 32 +.1 9   ++ <5( L6u =61u 6+1 <6++u 6+1 <6++u R)4 %TE (>RCE !>L? 73+.1 32 33.1 9 8 + ++ <5( L6u =61u 6+1 <6++u 6+1 <6++u R)4 %TE (>RCE !>L? 73.1 32 1.1 9 +  : 45( L6u =61u 61 <62u 62.1 <6+u R)4 %TE (>RCE !>L? 7+.1 +2 +.1 9 +0 1 : 45( L6u =61u 62.1 <6+u 61 <62u R)4 %TE (>RCE !>L? 731.1 +2 32.1 9  3 : 45( L6u =61u 61 <62u 6+1 <6++u R)4 %TE (>RCE !>L? 73+.1 +2 33.1 9 8 2 : 45( L6u =61u 6+1 <6++u 61 <62u R)4 %TE (>RCE !>L? 73.1 +2 1.1 9

Vdd + 0 dc 1 Vss  0 dc 0 Va + 0 <>LE 70 1 04 +4 +4 004 0049 Vb 8 0 <>LE 70 1 04 +4 +4 +004 0049 Vc  0 <>LE 70 1 04 +4 +4 104 +0049 Vd +0 0 <>LE 70 1 04 +4 +4 14 1049 .5(EL <5( os #e@e#6 nsub6e+1 tox610n .5(EL 45( nos #e@e#6 nsub6e+1 tox610n .TR4 +04 1004 .robe * Tota# 4odes$ + * Tota# E#eents$ 8 * Tota# 4uber o, horted E#eents not Aritten to the <)CE ,i#e$ 0 * Extract E#ased Tie$ 0 seconds .E4

#ro$agation delay

At *)5 of input, t + 426.* ns At *)5 of output, t + 426.7 ns #ropagation delay + 426.7n 8 426.*n + ).2n s ec %ise time

At 9)5 %).* :, t + 226.;;< ns At 4)5 %;.* :, t + 226.964 ns =ise time, tr + ).*4 ns. Fall time

At 4)5 %;.* :, t + )).*7 ns At 9)5 %).* :, t + )).9<; ns /all time, tf + ).;;7 ns.

#o&er dissi$ation

/rom output file V(LT%E (>RCE C>RRE4T 45E C>RRE4T Vdd Vss Va Vb Vc Vd

-.20E-+ .20E-+ 0.000EB00 0.000EB00 0.000EB00 0.000EB00

TOTAL POWER DISSIPATION

4.85E-11

WATTS