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Application Note AN-9052 Design Guide for Selection of Bootstrap Components 1. Bootstrap Circuit 1.1 Bootstrap Floating Supply Using a N channel MOSFET as a high side switch requires a voltage supply referenced at the source of the MOSFET. One of the most widely used method in supplying power to the high-side circuitry is the use of the bootstrap floating supply due to its inherent simplicity and inexpensive features. This kind of floating supply is suitable for providing a gate drive circuitry to directly drive high side switches that operate up to rail voltages. The basic circuit of the bootstrap supply, shown in Figure 1, is formed by a diode (Dbs) and a capacitor (Cbs). But, this type of floating supply has limitations on refreshment of Cbs when duty cycle is very high or turn-on time is very long. In the case where the gate voltage is not enough to fully turn-on the MOSFET (Q1), the output of gate drive IC (HO) should be turned-off to pr event the Q1 from operating in high dissipation mode. The optional gate resistor (Rg) is used for the purpose of controlling the turnon/turn-off time of the Q1, and the bootstrap resistor (Rbs) is used to limit the current and prevent the bootstrap capacitor (Cbs) from overcharging. VCC Dbs
Gate Drive IC
VS
Rbs
VB
Q1
iQLS i QBS
Rg
HO
VS
Cbs
VFP +
RVS
account for the case when Vx is pulled down to ground, which Vbs is at its lowest level, and cause under voltage lockout (UVLO) malfunction. Most gate drive ICs have undervoltage detection circuit that prevents from driving an external switch when Vbs drops below a certain leve l (specified in datasheets as VBSUV level). The VBSUV level depends on the external switch that it is driving. The undervoltage level for IGBTs are in the 9V~10V range, and for MOSFETs in the 4V~5V range. In the case where the node X goes below the ground level, Cbs will be overcharged by the level in which it goes negative. There are negative transients at node X caused by the parasitic inductances and peak forward voltage drop (Vfp) of the body diode at the low side switch that needs to be considered also. All of the overcharging affect mentioned above needs to be taken into account in determining the size of Cbs. Adding resistors Rbs, Rvs, and using a diode with a low Vfp value are other possible solutions to limit the overcharge effect on Cbs. Let us now look at the case that causes the Cbs to discharge. Cbs discharges when Q1 turns-on or node X is floating. The associated discharging factors are gate drive power, leakage current in each component, and current consumption in the gate drive IC. From an application point of view, specific conditions such as the duty cycle of PWM that causes ripple voltages on Cbs, operation frequency, and the type of modulation at which Q1 operates needs to be examined to make sure that Cbs can handle.
1.3 Initial Charging and Refreshment of Bootstrap Capacitor X
Load or Low side Switch(Q2)
+ Vx -
Another key parameter in selecting bootstrap components is initial start-up time. The initial charging time( tch) can be calculated from the following equation: tch
V cc ≥ C bs × R T × -1--- × ln -----------------------------------------------------------
figure 1. Bootstrap Circuit
1.2 Operation of Bootstrap Circuit The charged capacitor (Cbs) supplies the voltage to the tra nsistors of the gate drive IC, which is used to turn ON and OFF the external high side switch (Q1). The bootstrap capacitor(Cbs) gets charged from the voltage supply (VCC), through the bootstrap diode (Dbs), when the voltage at node X (V X ) is pulled down to ground or even below ground level. The bootstrap capacitor needs to be sized properly to © 2 0 0 8 F a i r c h i l d Se m i c o n d u c t o r C o r p o r a t i o n Rev. 1.0.0 • 11/10/08
D
V c c – V b s, M i n – V f – V x
(1 )
Where, RT = Rbs + Rvs (with low side switch and no load) RT = Rbs + Rvs + RL (with loads including equivalent impedance at node X) D = duty cycle In the case where PWM is not used, the load not connected, and the low side switch turned on the charging time at the www.fairchildse mi.com
AN-9 05 2
APPLICAT ION NOTE
2. Selection of Bootstrap Components
start-up phase can be defined by the time constants Rbs, Rvs, and Cbs. When the load is connected and forms the charge path in the boot str ap cir cui t, the init ial cha rgin g time is defined by Cbs and the relationship between Rbs, Rvs, and the load impedance RL. Most designs, the value of Cbs is pic ked wit h som e mar gin s, whic h lea ds to lon ger sta r-u p time. If node X is left floating for a long time, Vbs will decrease due to leakage current, and consequently the gate drive IC will go into UVLO condition. Controlling the low side switch properly, the bootstrap capacitor can be recharged and maintain the voltage level needed by the gate drive IC. The gate drive IC FAN7085 (block diagram shown in Fig.2) has a built-in recharge switch that will charge the boot stra p cap aci tor rega rdle ss of the appl ica tion . If Q1 is turned off and FAN7085 is used as a gate drive IC in the boots trap circ uit show n in Figu re 1, the inte rnal rec harg e switch of the FAN7085 will activate to provide the path to charge the bootstrap capacitor (Cbs) fully. Let's look at a specific application of the FAN7085, which is shown in Figure 3. In the event that both of the switch (S1 and S2) are turned off, the internal recharge switch of the FAN7085 will prov ide the path to c harg e th e bo otst rap cap acit or. If the current level passing through the recharge switch is higher than the leakage current, bootstrap capacitor will charge through the recharge path. The voltage level on the VS pin of the FAN7085 at a given current level when the recharge switch is turned on is defined on the datasheet.
2.1 Selection of Bootstrap Capacitor The maximum allowable voltage drop across the bootstrap capacitor to ensure enough gate-source voltage is highly dependent to the internal undervoltage shutdown level of the gate drive IC, and the voltage level at the source connection of Q1 (node X)
( 2)
V B S,D r o p = V CC – V f – V O P – V X
Where: V CC = gate drive IC supply voltage If = static forward voltage drop of Dbs Vop= minimum gate-source voltage level required that will pre vent Q1 t o go into a hi gh d issi pati on m ode X = MOSFET source connection If the minimum operating voltage (V OP ) requires to be greater than UVLO voltage level, then equation 2 can be denoted as follows V B S,D r o p = V CC – V f – V B S U V,M a x – V X
( 3)
Where, VBSUV,Max is the maximum UVLO voltage level of gate drive IC. The total charge (Qbs) required by the bootstrap capacitor can be calculated by summing the Q1 gate charge, charge required for the level shifter in the gate drive IC, and leakage charges resulting from leakage current.
VB Under Voltage Reset VB to VS
Pulse Filter Flip Flop Brake before make
HO
Under Voltage Reset VCC to GND
VC C
RESET-
VS
Logic Pulse Filter
IN-
h t a P e g r a h c e R
Level Shifter ON Delay Level Shifter OFF
Q BS = Q g + ( I LK + I Q B S) × T O N + Q L S
( 4)
Where:
GN D
Q BS = total charge from Cbs Figure 2. Internal block diagram of FAN7085
Qg.= gate charge of Q1 I LK = total leakage current
D5
VS
VCC
I QBS = operating current in gate drive IC
5V
C2
VCC
VB
IN-
HO
GND
NC
RESET-
VS
R1
T ON = Turning-on interval of Q1
S1 C3
C1
R2
Q LS = level shift charge required per cycle. Load
D3
FAN7085
The total leakage current is the summation of all of the individual component's leakage currents
R3 S2
From LS Driver C4
D4
R4
I L K = I L K,G S + I L K, H S + I L K, D + ILK , C
(5)
GND
Where, Figure 3. Application example of FAN7085
I LK,GS = gate leakage current of the MOSFET I LK,HS = high side floating supply leakage current I LK,D = bootstrap diode leakage current
©2008 Fairchild Semiconductor Corporation Rev. 1.0.0 • 11/10/08
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APPLICAT ION NOTE
ILK,C = capacitor leakage current, which can be ignored if it is not an electrolytic capacitor
The known values from the datasheets are:
The guiding criteria for calculating the minimum required boot stra p ca paci tanc e ca n be obta ined thro ugh the foll owin g equation: C b s,M i n
Q
BS ≥ -----------------------
V B S,D r o p
-. IQBS = 150uA -. Q LS = 3nC (assumed in fairchild 600V Gate drive IC) -. ILK_GS= 100nA -. ILK_HS=50uA -. ILK_D = 100nA -. V F =1.1V -. ILK_C = 0 -. V OP = 5.5V(is equal to V BSUV+) -. Qg. = 235nC@80A,Vgs=10V -. R DS,ON(Max) = 5mohm -. Rbs and Rvs are not used.
( 6)
Equation 6 is a basic equation for calculating the minimum value for the bootstrap capacitor. It uses the value of V bs,Dr op, which is the minimum operating voltage required and does not account for the any margins. The margin that is needed is to compensate for the ripple voltage on Vbs by the PWM, and the overcharging due to negative transients at node X. It implies that V bs,Dr op, should be changed to a smaller value, V bs, M in. In regards to the ripple voltage com pens atio n, t he v alue of V BSUVH is assigned to V bs,Min, in calculating the bootstrap capacitor.
The voltage drop is calculated as: V B S,D r o p = V CC – V f – V O P – V X = V C C,M i n – 1.1V – V B S U V, M a x – R D S,O N m a x
× I OU T
= 9 – 1 – 5.5 – 0.4= 2.0V
The leakage current is calculated as: C bs ,M i n
≥
Q BS QBS --------------------- = --------------------VBSUVH V B S,M i n
I LK = I L K, G S + I L K, H S + I LK, D + I L K, C
( 7)
= 100nA + 50uA + 100nA + 0 = 50.2uA
Where VBSUVH is hysteresis voltage of UVLO in gate drive IC. The minimum bootstrap capacitance calculated in Equation 7 might need to ac count for additional margin depending on the specific application conditions. Conditions at node X, such as long floating state and negative transients with deep and long duration needs to be accounted for. Using the FAN7085, unlike other gate drive ICs, the long floating state of node X does not need to be accounted for when calculating the minimum bootstrap capacitor value (C bs,Min). The internal recharge switch of the FAN7085 (pin VS) provides a path to charge the bootstrap capacitor when S1 and S2 are turned off.
The total charged required is calculated as: Q BS = Q g + ( I LK + I QB S ) × T O N + Q L S = 235nC + ( 50.2uA + 150uA ) × 50uSec + 3 n C = 235nC + 10nC + 3 nC = 248nC
The minimum capacitor value needed to prevent UVLO condition is calculated as Q BS 248nC C B S,M i n = ----------------------- = ---------------- = 124 nF V B S,D r o p 2.0V
The minimum capacitor value with a margin taken into account (explained in sec 2.1) is calculated as:
2.2 Selection of Bootstrap Diode C BS
The maximum voltage rating should be higher than power rail (VS) and current rating can be multiplication of total charge and switching frequency. A diode with a fast reverse recovery time is beneficial to minimize the leakage current.
248nC = ---------------- = 1.2uF 0.2V
3.2 Example 2 The basic operating conditions are:
3.1 Example 1
-. Gate drive IC: FAN7085 -. Switching device: FDB42AN15A0 -. Bootstrap diode: MMBD1405 -. Switching frequency: 50KHz -. System operating voltage: Vcc(7 ~16V), VS(130V)
The basic operation conditions are: Gate drive IC: FAN7080 Switching device: FDB8442 Bootstrap diode: MMBD1405 Switching frequency: 20KHz System operating voltage: Vcc(9 ~16V), VS(38V)
©2008 Fairchild Semiconductor Corporation Rev. 1.0.0 • 11/10/08
VB S U V H
Depending on the specific operating conditions additional margins needs to be accounted for in calculating the minimum required capacitor value.
3. Examples of Bootstrap Capacitor Selection
-. -. -. -. -.
Q
BS ≥ ---------------------
The known values from the datasheets are: www.fairchildsemi.com 3
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APPLICAT ION NOTE
-. IQBS = 200uA -. Q LS = 3nC -. ILK_GS = 100nA -. ILK_HS =200uA -. ILK_D = 100nA -. V F = 1.1V -. ILK_C = 0 -. V OP = 4.3V(is equal to V BSUV+) -. Qg. = 39nC@12A,Vgs=10V -. R DS,ON(Max) = 107mohm -. Rbs and Rvs are not used.
Q
C BS
The initial charging time when S1 and S2 are turned off is calculated as: tC H ≥ 5
× ( R Re c h arg e × C BS )
= 5
× ( 500ohm × 3.1uF )
= 7.75mSec
The voltage drop is calculated as:
Where, R recharge is the equivalent series resistance of the switch when the switch is turned on.
V B S,D r o p = V CC – V f – V O P – V X = V C C,M i n – 1.1V – V B S U V, M a x – R D S,O N m a x
62nC = --------------- = 3.1uF 0.02V BSUVH
BS ≥ --------------------V
× I OU T
= 7 – 1.1 – 4.3 – 1.3 = 0.3V
The leakage current is calculated as: I LK = I L K, G S + I L K, H S + I LK, D + I L K, C = 100nA + 200uA + 100nA + 0 = 200.2uA
The total charged required is calculated as: Q BS = Q g + ( I LK + I QB S ) × T O N + Q L S = 39nC + ( 200.2uA + 200uA ) × 50uSec + 3n C = 39nC + 20nC + 3nC = 62nC
The minimum capacitor value needed to prevent UVLO condition is calculated as: QB S 62nC C B S,M i n = ----------------------- = ------------- = 20 0n F V B S,D r o p 0.3V
The minimum capacitor value with a margin taken into account (when allowable voltage drop is set to V UVBSH , ex plai ned in s ec 2 .1) is c alc ulat ed a s:
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