AlGaN/GaN HEMTs

SUMMER PRACTICAL TRAINING REPORT

AlGaN/GaN HEMTs and Analysis of Transistors

K. Gagandeep G. Singh 3rd Year Undergraduate, Engineering Physics Indian Institute of Technology, Hauz Khas, New Delhi -110016

th

th

fromLaboratory, at: 12 May toTimarpur, 18 July Delhi Solid State Work Physics -110054

1

SOLID STATE PHYSICS LABORATORY DODO, MINISTRY OF DEFENCE GOVERNMENT OF INDIA 21st July, 2014

CERTIFICATE This is to certify that Mr. K. Gagandeep G. Singh , student of Engineering Physics (B. Tech) 3rd Year at IIT Delhi has under gone training under Mrs. Seema Vinayak of Solid State Physics Laboratory (SSPL) for a period from 12th May to 18 th July on AlGaN/GaN HEMTs and Analysis of Transistors. He has completed their training successfully. This report does not contain any secret information.

Signature of the Supervisor (Dr. Seema Vinayak, Scienti st ’G’)

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Contents 1Introduction

6

2Properties of GaN 7 2.1 Crystal Properties of GaN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Physical Properties of GaN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 Figure of Merit (FOM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3 SubstrateandGrowthTechniques 3.1 Growth Technique . . . . . . . . . . . .

12 ......

......

......

......

.

13

4 AlGaN/GaNHeterostructures

14

5Transistors 15 5.1 Bipolar Junction Transistor (BJT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1.1 Common Emitter Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.2 Characteristics of MOSFET (Metal Oxide Semiconductor Field Emission Transistor) . 5.2.1 Saturation Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.2.2 Derivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.2.3 Finding the Saturation Current . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.3 Characteristics of MESFET (MEtal Semiconductro Field Effect Transistor) . . . . . . 5.3.1 Saturation Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.3.2 Saturation Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6 Simulations for MOSFET Using COMSOL Multiphysics  6.1 Model Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

18

24

28

R

6.2 6.3 6.4 6.5 6.6

28

6.1.1 Parameters Usedofduring the Simulation . . . .of. the . . .device . . . .form . . . the . . Gate . . . .Contact . 29 29 Energy Level Diagram MOSFET along the center Current Density of MOSFET and n-channel . . . . . . . . . . . . . . . . . . . . . . . 30 Electron Concentration for different Drain to Source Voltages . . . . . . . . . . . . . 31 Surface Charge Density of MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Current(ID ) vs Voltage Characteristics(VDS ) . . . . . . . . . . . . . . . . . . . . . . . 33

7 SemiconductorHeterostructures 33 7.1 Heterojunctions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 7.1.1 Band Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 7.1.2 Understanding the Notch Effect . . . . . . . . . . . . . . . . . . . . . . . . . . 35 8 HEMTWorkingPrinciple

36

Conclusion 9

40

10 References

41

11 ImportantPoints

43

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Acknowledgements I sincerely express my sense of indebtedness to Dr. R. Muralidharan, Director SSPL, for granting me permission to undergo the summer training at SSPL. I would like to sincerely thank my facult y coordinator Dr. Rajendra Singh, Profess or I ITD to provide me this humble opportunity to work at SSPL. I warmly thank him for his co-operation and guidance. I would like to express my since re thanks to Mr. Amit and Mr. Chandan Sharma for the ir help extended. Finally I would like to sincerely express my thankfulness to our superv isor Mrs. Seema Vinayak, Scientist G, for her guidance and for constantly motivating us to work harder. I would like to state that the visits to the SSPL laboratory were very helpful in giving me an insight into the practical work being done in the field of my project.

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Objectives of Training The aim of the training program was to get familiarized with the components of fabrication of thin films at the laboratory and also to get the basic working principles behind the semiconductor devices like MOSFETs, MESFETs and HEMTs. The objectives for the training period were: • To understand the basic operation principles and basic differences between MOS and MES FETs. • Calculation of Energy Band Diagrams in MESFETs and MOSFETs. • Understand the mechanism of current saturation in BJTs, MESFETs and MOSFETs. • DC Characteristics of MOSFETs simulated in COMSOL Multiphysics  . R

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1

Introduction

The continuously increasing need for electric power has led to development of new technology which makes it possible to increase the efficiency by miniaturization of device and by increasing power supply. But now efficient use of the available energy has become the main concern of modern power electronics. For the past several decades Si based semiconductor devices have been the most exhaustively used technology for handling power circu itry. But due to its physical and performance short comes like low power handling capacit y, breakdown voltage, maximum operating temperature etc. no further advancements in power electronics can b e done any further. In particular, due to the band gap and intrinsic carrier concentration of the material, Si devices are limited to work at a junction temperature lower than 200 C which is less suitable for modern power applications. [1] Where else, wide band semiconductors (WBG), such as silicon carbide (SiC), gallium nitride (GaN) and related alloys, exhibit b etter physical properties which can serve better in satisfying the demand of increased power, frequency and operating temperature of the devices. Form these SiC technology is the most advanced technology amongst other wide band semiconductors. This is so because first of all the size of SiC wafer has been contin uously increasing and that too defect free (especially micropipes). Furthermore, the device processing technology has reached a high level of maturity and some SiC devices like Schottky diodes or MOSFETs operating in the range of 600-1200 V have already reached the market [2]. While SiC is the most technically advance WBG semiconductor, GaN and related alloys (like AlxGaN) still suffer from the several physical issues related to both surface and interfaces [3]. Furthermore, the lack of good quality (and cheap) free standing GaN templates make also the material growth a serious concern, since heteroepitaxy on different substrates (like Al2O31-x, SiC, or Si) is required. Although for long time GaN has been mainly attractive because of the optoelectronics applications, the recent improvement of the material quality of GaN-based heteroepitaxial layers provided the scientific community with considerable incentive to investigate the potentialities of this material also for applications in power electronics. Although the low field mobility of bulk GaN is much lower than that of other III- IV materials like GaAs, GaN has a much higher saturation velocity and wide band gap, which makes it favorable for high frequency power devices. Another good reason to look into advancing GaN is its ability to form AlGaN/GaN heterostructures with a large band discontinuity which helps in the formation of 2DEG (2 Dimensional Electron Gas). 2DEG is formed due to the presence of both spontaneous and piezoelectric polarization of the material. The high polarizations and resulting electric fields in AlGaN/GaN heterostructures produce high interface charge densities even for unintentionally doped materials. In particular, the 2DEG formed is AlGaN/GaN heterostructures can have sheet carrier densities in the order of 1-3x10 13 cm-2, i.e., well in excess of those achievable in other IIIV systems GaAs. Moreover, ossibility undoped material results in a significant improvement of like the electron mobility inthe thep2DEG, duetotouse the reduction of Coulomb scattering with ionized impurities. AlGaN/GaN heterostructures are particularly interesting for the fabrication of high electron mobility transistors (HEMTs), based on the presence of the 2DEG. 6

Figure 1: Crystal structure of Zinc Blend(Left), Wurtzite(Middle) and Rock Salt(Right)

2

Properties of GaN

The research activity on GaN dates back to the first 1930s. However, only in the 90s the material started to attract interest for power and RF electronics, because of its superior properties such a high band gap, a high breakdown field and a high saturated electron velocity. In the next years, power electronics will play an important role for the reduction of the energy consumption all over the world. Many discrete power electronic devices are used in the power modules for the transmission and the conversion of electric power. For these devices, a reduction of the static and dynamic losses can directly result in the overall lowering of power consumption of the system. Also the next generation of high-speed communication devices are becoming key technologies for network communication, requiring increasing operating frequency associated with portability and convenience. Si technology is approaching the theoretical limits imposed by the material properties, in terms of maximum op eration p ower, frequency and temperature. Therefore new materials have to b e looked forward to in order to overcome Si limitations. The use of wide bandgap (WBG) materials can be considered as the best solution to meet the requirements of modern power electronics. In fact, WBG semiconductors such as silicon carbide (SiC) and gallium nitride (GaN), have been known to exhibit superior electrical characteristics compared to Si because of their inherent advantages such as high electron mobility, higher breakdown field strength and larger energy bandgap. 7

Figure 2: The wurtzite unit cell of GaN with lattice constants a0 and c0.

2.1

Crystal Properties of GaN

Any III-nitride material is expected to exist in one of the three forms namely rock salt, zinc-blend and wurtzite. Thermodynamically wurtzite is the most favorable structure for GaN at ideal temperature and pressure. [4] The basis consists of four atoms two Nitr ogen and two Galli um atoms. The unit cell consis ts of six atoms and is characterized by two constants a0 (3.18A) and c 0 (5.18A). The Ga and N atoms are arranged in two interpenetrating hexagonal close packed lattices (HCP), each one with one type of atoms, shifted 3/8 c0 each other. The covalent bonds allow that each atoms is tetrahedrally bonded to four atoms of the other type. There is also a ionic contribution of the bound due to the large difference in electronegativity of Ga and N atoms. On a wurtzite structure there is no inversion symmetry on the [0001] direc tion (c-axis). This latter means that it is possible to distinguish two different orientation of GaN crystals, i.e., Ga-face and N-face, depending if the material is grown with Ga or N on top and corresponding to the (0001) and (0001-) crystalline faces as is shown Figure 3. Schematic drawing of the crystal structure of wurtzite Ga-face and N-face GaN. The spontaneous polarization vector is also reported. Now, because of the difference in the electronegativity of N and Ga there exists an ionic bond along with the already present covalent bond. This leads to a dipole moment in the (0001) direction. This effect in known as spontaneous polarization, because it exists without the presence of any stress or strain. The strength of the spontaneous polarization depends on the non-ideal (asymmetric) structure of the crystal. Not only covalent bond in the direction parallel to c0 plays an important role, but also 8

Figure 3: Ga-face and N-face structure of GaN

the other three cov alent bonds of the tetrahedral structure. Their resultant polarization is aligned with c0 but in a0 opposite direction, compensating the polarization in the (0001) direction. For this reason in a wurtzite structure, the c/a ratio plays a fundamental role for the spontaneous polarization, where the resultant Psp increases with reducing the asymmet ry of the crystal, i.e. decreasing the c/a ratio. For example a GaN crystal with a c/a ratio of 1.6259 will present a reduce d Psp (-0.029 C/m2) with respect to an AlN crystal (-0.081 C/m2) with a c/a ratio of 1.6010. In this context, in the presence of factors that may change the ideality of the structure and the c/a ratio, as stress or strain, the total polarization will be modified. The additional contribution to the polarization, due to the presence of strain and stress in the crystal, is the so called piezoelectric polarization Ppe. This contribution is particularly important in AlGaN/GaN heterostructures for the generation of the two dimensional electron gas about which we will be seeing afterwards.

2.2

Physical Properties of GaN

Thanks to its superior physical properties, GaN is considered an outstanding materials for optoelectronics, high power and high frequency devices. Properties like the wide band-gap, the high value of critical electric field and the saturation velocity can represent a big advantage in terms of electronic devices applications. In Table 1, some of these properties, which are relev ant for electronic devices performances, are reported and compared to other semiconductors counterparts. [5] The wide band-gap of GaN (3.39 eV) is responsible for the high critical electric field (3.3 MV/cm), which is one order of magnitude higher than that of Si. The high critical electric field give s the possibility to sustain the application of high bias values, thus making the material suitable for high-voltage devices fabrication. A further implica tion of its wide band-gap is the low intrinsic electron concentration ni. The value of ni in GaN at room temperature is in fact several orders of magnitude lower 9

Properties

Si

Bandgap Energy (E g )eV Breakdown Field (Ec )MV/cm Intrinsic e- Concentration (ni ) cm-3

SiC (4-H)

GaN

GaAs

Diamond

1.12

3.26

3.39

1.42

5.45

0.3

3.0

3.3

0.4

5.6

8.2x10-9

1.9x10-10

1.0

2.0

2.5

1.0

2.7

e Mobiltiy cm /V.s

1350

700

1200

8500

1900

Thermal Conductivity (k) W/cm.K

1.5

3.3-4.5

1.3

0.5

20

Relative Permittivity

11.8

10.1

9.0

13.1

5.5

-

7

e Saturation Vel. (vsat ) x10 cm/s -

2

1.5x1010

1.5x106

1.6x10-27

Table 1: Properties of GaN compared with other conventional and wide band-gap semicon ductors at room temperature with respect to that of Si or GaAs, and comparable with that of SiC. This characteristic enables to increase the maximum operation temperature of the devices made of this material and have reduced leakage currents. Other parameters that describe the quality of the material are the relative permittivity (epsilon r) and the thermal conduc tivity (k). The relatively high permittivity value (epsilon r) is a good indicator of the capacitive loading of a transistor and passi ve compon ents. On the other hand, the thermal conductivity (k) describes the ease of heat conduction and, hence, the possibility to efficiently extract the dissipated power from the device. Materials with a lower thermal conductivity typically lead to a device degradation at elevated temperatures. Although III-V semiconductors typically have a moderate value of k, GaN has a thermal conductivity which is comparable to that of Si (but lower than SiC). The amazing properties of GaN include also a high electrons saturation velocity (v sat), which in turn is important for high current and high frequency operation of devices. Compared to other wide band gap materials that show high v sat, GaN can also reach a high electron mobility (u) comparable with Si. Undoubtedly, among wide band gap semiconductors, the unique featur e of GaN is the possibility to make band gap engineering considering the related AlxGa1- xN alloys. In particular, by varying the Al content it is possible to tailor the band gap of the material. In this way, AlGaN/GaN heterostructures can be fabricated, allowing to reach carrier mobility up to 2000 cm2/Vs in the two dimensional electron gas (2DEG) formed at the interface. Coming to an example of application of GaN, there are electric power converters which are integrated practically in all the electronic systems to convert either DC or AC current. Their efficiency is also related to the p ossibility to have fast switching elements with increased power density. Typical applications of efficient power converters are the energy conversion in solar systems, wind power stations and modern electric vehicles as well as for power supplies in mobile base stations and computer systems. In all the aforementioned sectors, GaN represents today an attractive material. In fact, GaN based switches have theoretically a better figure of merit with respect to Si and SiC. Figure shows the comparison between the trade-off curves of the specific on resistance R ON vs breakdown voltage for Si, SiC and GaN. [6]

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Figure 4: On-Resistance vs Breakdown Voltage

As can be seen, at a given operation voltage, the on-state resistance of GaN devices can, in principle, outperform the competing Si or SiC devices. Since the specific on resistance is strictly related to the power losses of the device, the use of GaN can significantly lead to a reduction of the losses and to an improvement of the efficiency of the electronic systems. However, as can be seen, the experimental data point are still far from the theoretical limits of the material.

2.3

Figure of Merit (FOM)

To better compare the potential power electronic performance for different semiconductors materials, figures of merit (FOM) are commonly adopted. In particular, for high power and high frequency devices three important FOM are considered, Johnson (JFOM), Baliga (BFOM) and Baliga high frequency (BHFOM). JFOM = (vsat Ec)2 is an indication of the maximum capability to energize carriers by electric field, BFOM=u.Es.Ec 3 measures the minimum conduction losses during DC operation and BHFOM=uEc 2 give information about the minimum conduction losses during high frequency Figure of Merit

Si

SiC

2

JFOM (vsat Ec) BFOM u.Es.Ec3 BHFOM uEc2

10

6x10 248 84

GaN 13

13

3.6x10 20.9x10 4

14.6x10 79x104

7200

20800

Table 2: Figure of Merit comparison 11

Figure 5: Typical operating frequencies and output power ranges of electron devices made using a different semiconductor materials.

operation. All these figures of merit for GaN are report ed in Table 2 and compared to Si and SiC, clearly showing that GaN is potentially a superior material for the high power and high frequency applications. A comparison of the typical operating frequency and output power range for different semiconductor materials is shown in Figure. In this case , it must be noted that with respe ct to SiC, GaN is more suitable for higher frequencies but in a lower output power range.

3

Substrate and Growth Techniques

In spite of its outstanding material properties, the technological development of GaN has come later than in other semiconductors. The reasons of this delay were mainly related to the difficulty to have high quality free-standing GaN substrates and, consequently, the difficulty to fabricate vertical structures for power devices. In fact, for the growth of GaN other material s must be used as substrate. Since the perfect substrate does not exist, an ideal candidate must have physical and crystallographic properties, suchthe as formation lattice parameters andofthermal close tothe those of GaN, in order to avoid of cracking the film,expansion or defectscoefficients, formation during growth of the material. The latti ce mismatch and the differ ence in thermal expansion coefficients (TEC) of the common substrates used for GaN growth are reported in Table 3. Out of the possible choices Sapphire is an interesting choice because it is insulating, it can with12

Substrate

Latticce Mismatch Difference in Thermal Expansion Cofficient

Al2O3(0001)

+16%

6H-SiC(0001)

+3.5%

3C-SiC(111)

+3%

Si(111)

-17%

AlN(0001)

+2.5%

-25.3% +33.3% +24.4% +55.5% +33.3%

Table 3: Lattice mismatch and difference in thermal expansion coefficie nt of GaN with respect to the most common substrates stand the required high growth temperatures, and it is relatively cheap. Anyway the large lattice mismatch (+16Silicon can be also a possible substrate for the growt h of GaN layers. In the recent years, GaN materials grown on Si is attracting a huge attention thanks to the low substrate cost, the possibility of large substrate diameters and the potential integration with the well-developed Si electronics technology. Despite a large lattice (+17The residual stress is depending on the growth condition and cool-down procedure. Moreover there exists a dependence of the stress on the impurity concentrations that lead to an increase of the tensile stress with increasing the doping concentration. [8, 9] To relieve the tensile stress and achieve crack-free GaN heterostructures, several kind of transition layers can be used, such as low temperature AlN [10], graded AlGaN buffers [11] or AlGaN/GaN superlattices [12]. It has been seen that the dislocation density in the material strongly depends on the choice of the transition layer, and can be partially mitigated by using a high temperature AlGaN intermediate layer thatGaN actslayer, as a dislocation Moreover transition lay erselectrical increaseinsulaalso the series resistance in the reducing thefilter crack[13]. density and providing a good tion from the substrates.

3.1

Growth Technique

If the choice of a suitable substrate is an important issue for the development of GaN technology, not less important are the growth techniques employed to obtain a high quality material, with a low concentration of defects. The first technique used to grow epitaxial GaN layers was the Hydride Vapor Phase Epitaxy (HVPE). Nowadays, the Metal Organic Chemical Vapor Deposition (MOCVD) has become the most used method to grow GaN, owing its superior quality as high degree of composition control and uniformity, reasonable growth rates (1-2 um/hr), the possibility to use high purity chemical sources and to grow abrupt junctions. MOCVD uses the reaction of trimethylgallium (TEGa) and NH3 that occurs close the substrate. To obtain high quality GaN film, during the deposition the substrate mu st be kept at a temperature of about 1000 C - 1100 C, to allow a sufficient dissociation of the NH3 molecule, at a pressure between 50 and 200 Torr. Moreover, another critical aspect is the control of the N/Ga molar ratio that must be kept high in order to compensate N losses due to the high partial nitrogen pressure at the elevated growth temperatures [14]. 13

In fact the poor nucleation of GaN on Si at high temperatures results in a reaction of nitrogen with Si and in a Ga-Si alloy formation which initiates a strong and fast etching reaction (melt back etching) destroying the substrate and the epitaxial layer [15]. The most established method to prevent the nitridation is starting the growth process with an AlN nucleation larger grown in the same reactor with a few monolayers pre-deposition of Al. [16] The material doping can be tailored by the induction of extra precursor on the reactor, as silane (SiH4) for Si doping (n-type) or biscyclopentadienylmagnesium (Cp2Mg) for Mg doping (p-type). Anyway the control of a low doping conce ntration (N D is less than 110 16 cm-2) is still a complex factor because the formation of nitrogen vacancies, which act as donors leading to n-type doping of the material. Also the oxygen impurities present during the growth process can act as donors, leading to an n-type material [17]. To improve the crystalline quality of the grown GaN, pre-treatments can be required. For example the deposition of a thin low temperature buffer layer can be an advantage. The use of this layer, generally AlN or Si, can reduce the lattice mismatch, providing a benefit in terms of defects density (dislocations, oxygen impurity, nitrogen and gallium vacancies, etc). To reduce the defects density in the grown material, a different process called lateral epitaxial overgrowth (LEO) has been also dev eloped [18]. It consis ts in the depos ition of GaN on a patterned dielectric substrates (like SiO) followed by the lateral expansion and coalescence of the grown material. Although this technique can lead to a significant reduction of the dislocation density (up to 6107 cm-2) the extremely high cost of the process (which require the employment of lithographic steps for the substrate preparation) has limited its practical application for GaN growth. The Molecular Beam Epitaxy (MBE) is a slow (1 um/hr) but efficient technique for GaN growth, that show comparable material quality to those grown by MOCVD. A problem is that the NH3 is very stable at the low temperature (700-800 C) used in MBE. To solve this issues reactive species of nitrogen,are generated electron energy, generallybyused [19]. cyclotron resonance (ECR) or radio frequency (RF) plasmas with low

4

AlGaN/GaN Heterostructures

One of the most interesting aspects related to GaN materials is the possibility to grow AlGaN/GaN heterostructures, in which a two dimensional electron gas (2DEG) is formed at the heterojunction. The peculiarity of AlxGa1-xN alloys is the possibility to tailor the lattice constant and the energy gap by varying the Al concentration x. In particular, the in-plane lattice constant a of AlxGa1-xN alloys depends on the Al concentration x, and is also related to the lattice constant of GaN and AlN by the relation [20] AlGaN

AlN

GaN

a (x) = xa + (1 − x)a (1) On the other hand, also the band gap of a AlxGa1-xN alloy can be expressed as a function of the Al mole fraction according to [21] EgAlGaN (x) = xE gAlN + (1 − x)EgGaN − x(1 − x) = [x6.13 + (1 − x)3.42 − x(1 − x)]eV 14

(2)

Figure 6: Dependence of the band gap energy (a) and of the lattice parameter a (b)on the Al mole fraction for the AlxGa(1-x)N.

The dependence of the band gap energy and the lattice parameter with respect to the Al mole fraction for the AlxGa1-xN is shown below. The big advantage of AlGaN/GaN heterostructures consists in the formation of a two dimensional electron gas (2DEG) at the interface, generated by the strain induced by the lattice mismatch between GaN and AlGaN. The presence of the 2DEG allows the fabrication of an innovative device called High Electron Mobility Transistor (HEMT).

5

Transistors

In order to understand more about working of High Electron Mobility Transistor(HEMT), the basic knowledge of working principles of different transistor can give a better view about how the HEMTs work.

5.1

Bipolar Junction Transistor (BJT)

When BJT is setup as show n in the follo wing figure it is said to be in forward active mode. The EB(Emitter-Base) junction is forward bias and the BC(Bas-Collector) junction is reverse bias.

15

The energy band diagram of this npn BJT under 0 bias and forward active mode is given as

When EB is forward bias the barrier height as seen by carrier reduces and the thermal excitation energy kbt provide sufficient energy to the electron permitting them to cross the region I and enter region II. In region II there is an established gradient (approximately linear) of electron concentration due to the majority carrier electron of region I which came into region II and are minority carrier here. Due to gradient we get e- diffusing towards the interface of region II and III where because of reverse bias configuration of electric field is easily able to drift away the e- at the interface. So, eventually we can understand that the current through collector is dependent only on the barrier height on region I and region II interface. Which in turn depends on the voltage between BE.

ic = eD n ABE ic =



dn(x) nB (0) − 0 = eD n ABE dx 0 − xB

eDn ABE

.nB 0 .exp

VBE

 V  x  V i = I .exp B

5.1.1

(3) (4)

t

BE

c



s

Vt

Common Emitter Configuration

16

(5)

As we have discussed earlier the transistor will work (i.e. generate current through collector) iff the CB junction is reverse bias. So keeping this in mind we write the KVL equation for loop 1.

VCC = I R + VCB + V BE = I R + VCE

(6)

Now if Vcc is large enough and Vr(=IR) is small enough then Vcb is greater than 0, that is BC junction is reverse bias and thus the transistor is in the forward active region of operation. Again as the forward bias BE voltage increases the collector current and hence Vr will also increase. Increase in Vr results to decrease in the magnitude of Vcb. At some point V r + Vcc may becom e 0 and at that point if the Ic is increased slightly further the setup will become forward biased and flow of minority carrier through base collector barrier will be obstructed by the electric field which is opposing their flow. Thus we get a saturation current when the gradi ent of e- concentration is not able to supply sufficient force to the e- to move through the electric field and contribute to the current. The following thing can be understood using this Ic Vce graph.

The reverse bias is shown by linear region. The non-linear region before satura tion shows that some e- are able to pass through the negativ e electric field and contri bute to the current. And over 17

the saturation region even if we increase Vce we won’t be able to increase current any further.

VCE = V CC − IC RC Ic =

VCC − VCE RC

(7)

(8)

[24,25]

5.2

Characteristics of MOSFET (Metal Oxide Semiconductor Field Emission Transistor)

Let us consider the region below the oxide layer under normal condition (No applied Voltage to the gate) the energy band diagram is as follows

When a positive voltage is applied with respect to S the holes due to the field move away and leave behind some negative charge. The band diagram of which is as follows

When a positive voltage is applied whit respect to S the holes due to the field move away and leave behind some negative charge. The band diagram of which is as follows.

18

The excess of e- near the interface makes the band to bend such that Ef gets closer to Ec. When even higher positive voltage is applied then there will be a situation where in the Efi will be crossed by Ef. This is the situation when the region near the interface starts behaving as an n-type semiconductor (as in n-type the Ef is abve Efi) and we get an inversion region. When seen this region in the following diagram, the region appears as to be a channel of n-type semiconductor. The voltage above which this happens is the threshold voltage (Vt).

So, under this situation n-channel is formed which can easily conduct electricity ids if small voltage is applied over the drain. The n-channel has some conducta nce and for small values of Vds has its conductance or resistance characteristics similar to a resistance. So,

ID = gd VDS W µ n |Qn | L V − VCE IC = CC RC gd =

So, form previous discussion we have

19

(9) (10) (11)

5.2.1

Saturation Current

When Vds increases to the point where the potential drop across the oxide ot the drain terminal is equal to Vt, the induced inversion charge density is zero at the drain terminal. The following figures show these effects

When Vds Becomes large than Vds(sat) value, the point in the channel at which the inversion charge is just zero moves towards the source terminal. In this case, e- enter the channel at the source, travel through the channel towards the drain and then, at the point where the charge goes to 0, the e- injected into the space charge region where they are swept by the E-field to the drain contact. The region of Id vs Vds characteristic is referred to as the saturation regi on. When Vgs changes, the Id vs Vds curve will increase so we have

20

5.2.2

Derivation

From Ohm’s law we have

Jx = σEx

(12)

where

σ = eµ n n(y ) The total current is found by

  J dydz  Q = − en(y )dy

(14)

IX = −W µn Qn Ex

(16)

Ix =

So,

(13)

y

z

x



(15)

n

where Qn is inversion layer charge per unit area. So,



From Charge neutrality









Qm + Qss + Qn + Qsd (max0=) From Gauss’s law

 E dS = Q s

n

21

T

(17) (18)

Now, from surfaces 1 & 2, we assume that Ex is essentially a constant along the channel length. The contributions of surfaces 1 & 2 cancel each other. Surface 3 is in the neutral p-region, so the electric field is zero at this surface. Only surface 4 contributes.

 E dS =  s

n

0x Eox W dx

= QT

(19)

Where, epsillon ox is the permitting of the oxide. The total charge enclosed is 





QT = (Qss + Qn + QSD (max))W dx

(20)

So, from the previous two equations we have 





−0x E0x = Qss + Qn + QSD (max)

(21)

EF P − EF M = e (VGS − Vx )

(22)

Now, Considering the potential barriers we have, 



VGS − Vx = (V0x + φm ) − (χ − Eg − φst φf p ) VGS − Vx = V0x + 2 φf p + φmx where, phi ms is the metal semiconductor work function difference.

φs = 2φf p for the inversion condition.

The electric field in oxide is

E0x =

V0x t0x

On combining the equations we have −0x E0x = −

0x [(VGS − Vx ) − (φms + 2 φf p )] t0x

So,

Ix = −W µn C0x

dVx [(VGS − Vx ) − VT ] dx 22

(23)

Where Ex = -dVx/dx and Vt is the threshold Voltage. So, on integrating Vx (L)

L

 I = −W µ C  x

n

[(VGS − Vx ) − VT ]dVx

0x

0

(24)

Vx (0)

Assuming mu n to be a constant above. For the n-channel device the drain current enters the drain terminal and is a constant along the entire channel length. Letting Id = -Ix the equation becomes

ID =

W µn C0x GS T DS 2 2L [2(V − V )V − VDS ]

(25)

which is valid for V GS ≥ VT and VDS (sat) ≥ VDS .

5.2.3

Finding the Saturation Current

The above equation of current through the drain can be plotted as follows

Since Id is valid below Id(sat) Id sat can be found by taking the maxima of the above plots. So, from

dID =0 dVDS we get

VDS = VGS − VT

(26)

The value of Vds is just Vds(sat). For Vds is graVds(sat) the ideal drain curren t is a constant and is equal to

ID (sat) =

W µn C0x (VGS − VT )2 2L

So, finally the plots we obtain are 23

(27)

[24,25]

5.3

Characteristics of MESFET (MEtal Semiconductro Field Effect Transistor)

When negative voltage is applied to the gate the e- below the gate feels repulsion and positive charge is left near the schottky junction. This region thus forms a depletion regio n where no free charge is present. As the negative voltage magnitude increases the width of depletion layer increases and finally covers completely the n channel. Thus making the gate to close the conductio n. Such gates are active low gates which are activated only at zero magnitude of applied potential. Now when n-channel is not depleted then even on the application of small positive voltage at the drain the majority carrier negative move from the source through n-channel to the drain and thus conduct electricity and cause current flow. Now, if Vd(Drain Voltage) is increased then the region near the drain will become reverse biased and thus the depletion region width near this region will increase.

24

Now Vd is increased a voltage willcondition come at which the depletion region near drain willif complet ely coverfurther the n then channel. At this it is presumed that current willthe halt at once, but due to strong electric flied the e will be pulled. Under this condition we reach the saturation current value and even on any further increase of Vd we wont get any increase in value of Id. Thus we get the saturation region.

5.3.1

Saturation Voltage

The deple tion region width will vary with distance h(x) throughout the channel. hi is function of Vbi(built In Voltage) and Vgs(Gate Voltage) and hm(max. depletion region width) is given by

hm =

 2 (V s

bi

+ VDS − VGS ) eNd

(28)

Pinchoff occurs when hm = a. At this point we reach the Saturation condition. So,

a=

 2 ( V s

bi

+ VDS (sat) − VGS ) eNd

(29)

Or, 2 Vbi + VDS (sat) − VGS = ea Nd = Vp0 2s

(30)

So,

VDS (sat) = Vp0 − (Vbi − VGS )

25

(31)

5.3.2

Saturation Current

From Ohms Law, the differential resistance of the channel at a point x in the channel is

dR =

ρdx A(x)

(32)

where p is the resistivity and A(x) is cross sectional area. Also,

1 eµn Nd A(x) = (a − h(x))W

ρ=

So,

dR =

dx eµn Nd (a − h(x))W

(33)

also

dV = I D1 dR(x) where Id1 is the constant current throughout the channel. So,

dV (x) =

ID1 dx eµn Nd W (a − h(x))

(34)

Idx = eµ n Nd W (a − h(x))dV (x) Using,

h(x) =

 2 (V (x) + V s

bi

− VGS )

eNd



(35)

1/2

Where V(x) is the potential in the chennel due to the drain-to-source voltage. Solving for V(x) and taking differential we have, eNd h(x)dh(x) dV (x) = (36) s and using this in Id1 equation we have

ID1 =

µn (eNd )2 W [ah(x)dh(x) − h(x)2 dh(x)] s

On Integration, we have,

ID1 = Using

µn (eNd )2 W a 2 1 (h − h2i ) − (h2m − h2i ) s 2 m 3



2s (VDS + Vbi − VGS ) eNd 2 (V − VGS ) h2i = s bi eNd

h2m =

26



(37)

and

Vp0 =

ea2 Nd 2 s

We can rewrite the above Idq equation as,

ID1 =

µn (eNd )2 W a3 2s L

we say,

 V V

DS

−

P0



2 VDS + Vbi − VGS 3 Vp0

IP 1 ≡

3/2

+



2 Vbi − VGS 3 Vp0

µn (eNd )2 W a3

   3/2

(38)

6 s L

as the pinch off current. And thus we have

ID1 = I P 1



 V V

DS P0



2 VDS + Vbi − VGS − 3 Vp0

3/2





2 Vbi − VGS + 3 Vp0

The above equation is valid for

   3/2

(39)

0 ≤ |VGS | ≤ |Vρ | and 0 ≤ VDS ≤ VDS (sat)

Now, as we have shown earlier that the drain becomes pinched off, for the n-channel MESFET when

VDS = VDS (sat) = V P 0 − (Vbi − VGS ) So, in the saturation region the saturation drain current is determined by using Vds=Vds(sat)

 V

ID1 = I D1 (sat) = I P 1 1 − 3

bi

27

− VGS Vp0

 2  V 1−

bi

3

− VGS Vp0



(40)

For MESFETs the pinchoff voltages are known as threshold voltages so we have

VT = Vbi− VP 0 So,

Vbi = VT + VP 0 Using this value in the previous equation we have

   V − V    V 1−3 1− +2 1− I (sat) = I V  The above equation is valid for Vgs is greater than Vt. D1

GS

P1

T

p0

− VT Vp0

GS

   3/2

(41)

When transistor turns on, we have (Vgs-Vt) is less than Vp0. So, the above equation can be expanded using Taylor Series and we obtain

ID1 (sat) ≈ IP 1

3 V

GS

4

− VT

VP 0



2

(42)

Substituting Ip1 and Vp0 the above equation becomes

ID1 (sat) =

µn W (VGS − VT )2 2aL

(43)

This can further be written as

ID1 (sat) = k n (VGS − VT )2 k =

(44)

µn s W

2aL The factor kn is called conduction parameter. [24,25] n

6

Simulations for MOSFET Using COMSOL Multiphysics  R

In order to get a better picture of how the device is going to perform for a given set of device parameters, various simulation softwares are available which can help us get a glimpse of how the device may react on applicatio n of certain parame ters. This enables us to drive away many of the possible errors which might come due to petty human error. Such errors can cause huge waste of both human labour and money. Thus they can increase the manufacturing time significantly. To overthrow these sorts of errors, we can rely on good simulation softwares like Comsole Multiphysics  . R

Now in the following semiconductor device simulation, we will be simulating the DC characteristics of a MOSFET.

6.1

Model Specifications

This model calculates the DC characteristics of a MOS (metal-oxide semiconductor) transistor using standard semiconductor physics. In normal operation, a system turns on a MOS transistor by applying a voltage to the gate elec trode. When the voltage on the drain increases, the drain curr ent also increases until it reaches saturation. The saturation current depends on the gate voltage. 28

6.1.1

Parameters Used during the Simulation

Vds = 0[V] is the Drain-to-source voltage Vbs = 0[V] is the Base-to-source voltage Vgs = 2[V] is the Gate-to-source voltage phim = 5.0535[V] the Metal work function Na = 1E17[1/cm3] is the Background doping Nd = 1E18[1/cm3] is the Maximum donor doping concentration W mos = 1e-6[m] is the width of MOSFET h mos = 0.2[um] is the height of MOSFET L mos = 1[um] is MOSFET length Lg = 0.24e-6[m] is Gate length L s = 0.32[um] is Source length L d = 0.32[um] is Drain length eps ins = 4.2 is Insulator relative permittivity d ins = 5E-9[m] is Insulator thickness

6.2

Energy Level Diagram of MOSFET along the cen ter of the device form the Gate Contact

Form the above figure obtained we can see the energy diagram along the center of the device from the gate contact for Vgs = 2 V and Vds = 3 V. This figure shows the separation of the quasiFermi levels (size of the depletion region) as well as the inversion region where the intrinsic energy level crosses the electron quasi-Fermi level (Efn).From this figure one can see the length of inverted region starting from the surface (y = 0) to the crossing of the intrinsic energy level with the electron quasi-Fermi level (y approx - 0.03 um).

29

6.3

Current Density of MOSFET and n-channel

The above figure displays the logarithm of the norm of the current density in the device under the specified condit ions. In the figure, one can notice the inverted region that allows the current to pass between the n-doped regions (drain and source). Here we can clearly see the inverted n-channel between the two n-doped regions.

30

6.4

Electron Concentration for different Drain to Source Voltages

The above figure shows the logarithm of the electron concentration along the inverted channel for different drain-to-source voltages. We can clearly see that a reduction of the electron concen tration near the drain creating the saturation of the drain current. The figure shows the electrons pinched-off as the charge near the drain end is reduced by the channel potential, i.e. as the drain-to-source voltage increases.

31

6.5

Surface Charge Density of MOSFET

The figure shows the inverted channel (in blue) as well as the depletion region (orange). The red regions show the close-to neutral areas. The drain-side of the device shows a larger depletion region to compensate the vani shing space charg e at the pinch-off p oint. We can see a larger depletion width on the drain-side of the MOSFET compared to the source side. This is a consequence of the electrons drawn from the drain-side of the inverted channel.

32

6.6

Current( ID ) vs Voltage Characteristics(VDS )

The above figure shows the ID vs VDS curve of the device where a the current rises linearly at low drain-to-source voltage to slowly saturates as the electron concentration vanishes at the pinch-off point

7

Semiconductor Heterostructures

The previous sections helped us get a good understanding of how the basic trans istors work. For us to understand this we must be clear with what is the physics associated with Semiconductor Heterostructures.

7.1

Heterojunctions

Heterojunctions are two types • Iso type Conductivity types are same bot n or both p. • Aniso type Conductivity types are different. One is p and other is n. 33

For Heterostructures to form, both the joining materials must have similar thermal properties. So that while operation one might not crack over the operation of other. For Heterojunction the most important requirement is that their lattice should match. If not so, we will have defective regions. And if the interface is defected we have mobilit y effects which is not permissible. Similar to what happens during high doping AlGaN/GaN have perfect match of lattice. Homojunctions are formed from same material doped differently. Heterojunctions are formed by different materials which may or may not be differently doped.

7.1.1

Band Diagram

Let us consider two semiconductors with X1 is greater than X2; Eg1 is smaller than Eg2; then

34

So, here we see a discontinuity in the energ y band diagram. This 5 or notch is caused due to Notch Effect which is explained below.

7.1.2

Understanding the Notch Effect

Let us first take the example of homojunction. The diagram below describes p-n homojunction (The conduction band only) The e- will keep transferring from the n side to p side till the maximum energy of e- concentration on both sides are equal. And that is when we get the built in potential. Now in Heterojunction

If notch was not to be considered then only Vbi would have been the built in potential but due to the notch the built in potential is actually increased. So, band bendin g in case of heterojunction is more that that of homojun ction. Now, as were the case in MOSFET here too due to the extra band bending the notch might cross the fermi level and 35

so the portion lower to the fermi level will b e accumulated of e-. So, basically we try to maximize the delta Ec. So that e- concentration in unbiased condition increases. Due to the discontinuity delta Ec in the conduction band of AlGaAs and GaAs, the band bending in the undoped GaAs is more than in the GaAs homojunctions of similar doping levels. Due to this effect, large concentration of e- are present at the GaAs surface adjacent to AlGaAs and they remain there due to the notch in the cconduction band. The e- have been supplied form the doped layer to undoped region (or where doping concentration is low) as a result ionied impurity scattering effect is absent.

8

HEMT Working Principle

The HEMT is a peculiar device, since it can offer optimal characteristics in terms of both high voltage, high-power and high frequency operation. Its operation principle is founded on the presence of the 2DEG at interface of an heterostructure, like for example an AlGaN/GaN system. It is a three terminal device where the current between the two Ohmic contacts of source and drain, flowing through the 2DEG, is controlled by the electrode of gate (typically a Schottky contact). Practically, the bias applied to the gate controls the flow of electrons through the channe l. The figure shows a schematic of an HEMT device. To confine the electron flow in the 2DEG and isolate HEMT devices, deep trenches (cutting the 2DEG) or ion implantation are typically used.

36

The below figure illustrates, in a schematic band diagram of an AlGaN/GaN HEMT structure, how the 2DEG is influenced by the different gate bias conditions. This schematic is reported for the case of a n-type doped AlGaN barrier layer. At Vg = 0V there are allowed levels below the Fermi level in the subbands of the quantum well, resulting in the presence of a high sheet carrier concentration and in the on-state of the device. By increasing the gate bias (Vg is greater than 0 V), the Fermi level rises, increasing the density of allowed states below the Fermi level in the conductive band, and therefore increasing the sheet carrier concentration of the 2DEG. By decreasing the gate bias V towards negative values (V is less than 0 V) the Fermi level drops depleting the 2DEG, until the position of the Fermi level lies below the quantum well Under this condition, the level in the energy subbands are completely empty and the device is in the off-state.

In the following figure we can see the Ids vs Vds characteristics of a HEMT. In the Ids-Vds characteristics a positive potential source and (Vds ),will theincrease current will start to flowbyinapplying the 2DEG. By increasing thedifference drain bias,between the current flow in drain the channel linearly up to certain value. After this value the current through the channel starts to saturate. The maximum saturation value Idss depends on the sheet carrier concentration n of the channel. Looking at the trans characteristics, for a fixed Vds the drain current I rises with a parabolic behaviour with increasing gate bias. 37

The drain current(Ids) can be controlled by the bias applied to the gate electrode. In particular, Ids decreases with increasing the negative value of the gate bias (Vg), since the region of the channel under the gate is depleted. The value of Vg which determines the pinch-off of the channel (where the sheet carrier concentration in the channel becomes zero) is called threshold voltage (Vth) of the device. In a AlGaN/GaN HEMT at any point x along the channel, neglecting the extrinsic series resistance of source and drain, the sheet carrier concentration depend by the applied Vg

0 AlGaN [V g − V th − V (x)] (45) qdAlGaN where dAlGaN is the distance of the gate to the 2DEG channel, corresponding to the AlGaN thickness. The gate- to-channel capacitance (per unit of area) can b e approximately assumed as independent of n s using the expression C 2DEG =  0 AlGaN /qdAlGaN . ns (x) =

It is now possible to define the threshold voltage of the device, as the gate bias necessary to turn-off the 2DEG, resulting in a ns =0. Looking at the AlGaN/GaN schematic band diagram showed in above figure, it is clear that the threshold voltage depends on different parameters like the Schottky barrier height φB , the conduction band offset at the AlGaN/GaN interface delta Ec, the concentration of 38

donor atoms in the AlGaN layer N D , the relative dielectric constant  AlGaN , the thickness d AlGaN and the Al concentration of the AlGaN. Besides these parameter s, in order to have a complete expression of the threshold voltage the contribution of the polarization induced charge density σ must be taken into account. Thus simply the threshold voltage can be expressed as

qND d2AlGaN σ − dAlGaN (46) 2ε0 εAlGaN ε Assuming a constant mobility and remembering the Ohmic law, for a two-dimensional electron gas the conductivity σ of the channel will be directly proportional to the sheet carrier concentration ns and to the electrons mobility in the channel µ Vth = ΦB − ∆EC −

AlGaN

σ = q.ns .µ

(47)

It is possible to write the drain current as:

ID = −µ.W.Q(x)

dV (x) dx

(48)

where Q(x) is the charge considered in the channel. Integrating both sides in the all length of the channel and considering the expression of Q(x) we have

ID = µ.

W V .C 2DEG Vg − Vth − DS VDS L 2





(49)

The drain current of a HEMT in linear region is often expressed in a form similar to that used for a MOSFET, i.e., : W V ID = µ. .C 2DEG Vg − Vth − DS VDS (50) L 2 Increasing VDS upto certain value called VDSsat , the drain current ID is constant and so the derivate of I D will be zero. dID W = µq C 2DEG (Vg − Vth − VDS= 0) (51) dVDS L and V DSsat is given by VDSsat = V g − Vth (52)





At bias condition of V DSsat the I D will be expressed as 1 W IDSS = µ C 2DEG (Vg − Vth )2 (53) 2 L The above equation is approximation valid for long channel devices. However, for HEMTs with a short gate length (l is less than 10 um) the electron transport occurs under high electric fields and the expression of the saturation current is different. If the electric fields exceeds a certain critical value, the speed of the electrons in the 2DEG begins to saturate. Taking into account the effects of the saturation velocity model the saturation current is expressed as

IDSS = q.n s .vsat (54) Considering the expression of the drain current, it is also possible to define the transconductance of the device as the change in drain current I D resulting from a variation of gate voltage V g for a fixed VDS : ∂I D gm = (55) ∂V g 39

at constant VDS . Similarly the output conductance of the device is defined as the for a fixer gate bias Vg

gd =

∂I D ∂V DS

ID response to a VDS variation

(56)

at constant Vg . [26]

9

Conclusion

As the need for power is ever growing, present technology based on Si is not able to provide sufficient power handling and high frequency operation capabilit ies. Therefore better alternative to the dominant Si based technology has to be looked forward to. For this purpose we explored some alternatives and came to the conclusion that WBG semiconductor like GaN can help us in this deed. We saw that 2DEG which is formed at the interface of AlGaN/GaN heterostructure can be used to make high power, high frequency transistors, based on HEMT principle . In order to understand about the working principle of HEMTs we went to the basics and started with BJT then proceeding to MOSFETs, MESFET s and finally came to HEMT. On understanding the working principles of all the devices we came to know that in both MOSFET and HEMT 2DEG are formed, but because in MOSFET the 2DEG is formed in the doped region, the scattering there is high, which results in lower saturation velocity. Where as in HEMTs the 2DEG is formed in the undoped region whic h leads to lack of ion scatt ering and thus the mobility can be raised highly. Although the low field mobility of GaN is lower as compared to other III-IV materials, but the high saturation velocity and higher bandgap makes it ideal candidate for high power and high frequency device. We compared the various figure of merits for different capable contenders and again came to the conclusion that our choice for GaN was the best. Further the possibility increasing the polariz ation (piezoelectric polarization) by inducing stress or strain on the material makes route for further possibilities which can help in tweaking or enhancing the properties of AlGaN/GaN HEMTs.

40

10

References

[1] J. Millman and C.C. Halkias in Electronic Devices and Circuits, Tata McGrawHill Publishing Company Ltd., New Delhi, 1991. [2] http://www.cree.com/LED-Chips-and-Materials [3] Wide Energy Bandgap Electronic Devices Fan Ren and John C. Zolper (Pg. 13 (Book Source: books.google.co.in/books?isbn=9812382461)

15)

[4] http://www.ioffe.ru/SVA/NSM/Semicond/GaN/bandstr.html [5] GaN-Based RF Power Devices and Amplifiers By Umesh K. Mishra, Fellow IEEE, Likun Shen, Thomas E. Kazior, and Yi-Feng Wu. (Source: http://ieeexplore.ieee.org/ stamp/stamp.jsp?tp=&arnumber=4414367) [6] Power Electronic Europe Issue 4, 28 (2010), Alberto Guerra and Jason Zhang, International Rectifier, El Segundo, USA (Source: http://www.power-mag.com/pdf/ feature_pdf/1283339996_IR_Feature_Layout_1.pdf) [7] Growth of GaN on SiC(0001) by Molecular Beam Epitaxy (Source: http://onlinelibrary.wiley.com/doi/ 10.1002/1521-396X(200112)188:2%3C595::AID-PSSA595%3E3.0.CO;2-S/pdf) [8] High quality AIN and GaN epilayers grown on (00-1) sapphire (100) and (111) silicon substrates (Source: http://scitation.aip.org/content/aip/journal/apl/ 66/22/10.1063/1.114242) [9] Effect of Si doping on strain, cracking, and microstructure in GaN thin films grown by metalorganic chemical vapor deposition (Source: http://scitation.aip.org/ content/aip/journal/jap/87/11/10.1063/1.373529) [10] Metalorganic Chemical Vapor Phase Epitaxy of Crack-Free GaN on Si (111) Exceeding 1 m in Thickness (Source: http://iopscience.iop.org/1347-4065/39/11B/ L1183) [11] Metalorganic chemical vapor deposition of GaN on Si111: Stress control and application to field-effect transistors (Source: http://scitation .aip.org/content/ aip/journal/jap/89/12/10.1063/1.1372160) [12] The nature of arsenic incorporation in GaN (Source: http://scitation.aip.org/ content/aip/journal/apl/79/20/10.1063/1.1418030) [13] AlGaN/GaN High Electron Mobility Transistors Grown on 150 mm Si(111) Substrates with High Uniformity (Source: http://iopscience.iop.org/ 1347-4065/47/3R/1553)

41

[14] Influence of sapphire nitridation on properties of gallium nitride grown by metalorganic chemical vapor deposition (Source: http://scitation.aip.org/content/ aip/journal/apl/68/11/10.1063/1.115687) [15] GaN-Based Devices on Si (Source: http://onlinelibrary.wiley.com/doi/ 10.1002/1521-396X(200212)194:2%3C361::AID-PSSA361%3E3.0.CO;2-R/pdf) [16] Effect of the N/Al ratio of AlN buff er on the crys tal properties and stress state of GaN film grown on Si(111) substrate (Source: http:// www.sciencedirect.com/science/article/pii/S0022024803017433) [17] Activation energies of Si donors in GaN (Source: http://scitation.aip.org/ content/aip/journal/apl/68/22/10.1063/1.115805) [18] Thick GaN Epitaxial Growth with Low Dislocation Density by Hydride Vapor Phase Epitaxy (Source: http://iopscience.iop.org/1347-4065/36/7B/L899) [19] Wide Energy Bandgap Electronic Devices Fan Ren and John C. Zolper (Book Source: books.google.co.in/books?isbn=9812382461) [20] Two-dimensional electron gases induced by spontaneous and piezoelectric polarization charges in N- and Ga-face AlGaN/GaN heterostructures (http:// scitation.aip.org/content/aip/journal/jap/85/6/10.1063/1.369664) [21] Optical constants of epitaxial AlGaN films and their temperature dependence (Source: http://scitation.aip.org/content/aip/journal/jap/82/10/10.1063/1.366309) [22] Polarization-induced electron populations (Source: http://scitation .aip.org/ content/aip/journal/apl/77/7/10.1063/1.1288817) [23] Spontaneous polarization and piezoelectric constants of III-V nitrides (Source: http://journals.aps.org/prb/pdf/10.1103/PhysRevB.56.R10024) [24] Semiconductor Physics and Devices: Basic Principles - Donald A. Neaman (Book) [25] NPTEL - Electronics and Communication Engineering - High Speed Devices and Circuits (Video Lectures form IIT Madras) (Source: http://nptel.ac.in/video.php? subjectId=117106089) [26] AlGaN/GaN heterostructures for enhancement mode transistors (Source: http:// dspace.unict.it/bitstream/10761/1347/1/GRCGPP82S30C35MA-Giuseppe%20Greco-% 20AlGaN-GaN%20heterostructures%20for%20enhancement%20mode%20transistors.pdf

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Important Points

• Si based technology has lived throug h its glorious period and because of its low power handling capacity, its low band gap and intrinsic carrier concentration of the material it has a to have a junction temperature less than 200 C to work properly. • WBG semiconductors like SiC, GaN etc. overcome the above short comes of Si and can copeup with increased power, frequency and operating temperatures. SiC technology is the most advance amongst all the WBG SCs but it too suffers from micropipes crystal defect. • GaN and its alloys have not been able to advance as much as SiC because of various physical issues realted to their surface andperformed interface.onAlso, because the lack substrate heteroepitaxy has to be substrates likeofAl2O3, SiCoforfree Si. stand ing GaN • Although the bulk mobility of GaN at low fields is much lower than that of other III-IV materials, but the high saturation velocity and higher band gap makes it an ideal contender for high frequency power devices. Also ability to form heterostructures of AlGaN/GaN leads to the formation of 2DEG at the interface which can be further used in the fabrication of HEMT devices. • 2DEG is due to the formation of both sp ontaneous and piezoelectric polarization. Which can be used to make HEMTs. • There are three p ossibilities for II I-Nitrides namely zinc-b lend, wurtzite and rock salt, of which GaN exists in the wurtzite form which is thermodynamically most stable at room temperature and pressure. • Because of the absence of inversion symmetry along the c-axis it is easily possible to distinguish between different orientations of top GaN namely G-faced and N-faced, depending if thefaces. material is grown with Ga on top or N on corresponding to (0001) and (0001-) crystalline • There exists a polarization in the GaN crystal due to the difference in the electronegativity of the atoms. This leads to a polarization known as spontaneous polarization which in turn depends on the c/a ratio. The less the ratio the more the polarization. • There exists another polarization because of the induced stress and strain which leads to change in the c/a ratio. This becomes considerably important in AlGaN/GaN heterostructres for 2DEG. • The wide band gap of GaN (3.30 eV) is responsible for the high value of critical electric field (3.3 MV/cm) which is order of magnitude higher than that of Si. The high critical elect ric field makes it suitable for high voltage devices. • Also, because of low intrinsic electron concentration the maximum operation temperature can be made to rise without leading to rise in leakage current. • The relatively good value of relative permittivity makes it a good contender for capacitive loading of transistor and passive components. Also, the thermal conductivity value being almost equal to that of Si makes it capable to better transfer the heat produced and thus not making it to degrade at high temperature working conditions. • Also, its capability to form AlGaN alloys makes the band gap alteration easy which comes handy for the formation of heterostructures needed for the formation of 2DEG. 43

• In principle the on state resistan ce at a given voltage of GaN can outperform competi ng Si and SiC devices. Which will reduce the power losses. • In order to better compare the power electronic performance for different semiconductor materials figure of merit are employed. In particular for high power and high frequency JFOM is an indication of the maximum capability to energize carriers by electric field, BFOM measures the minimum conduction losses during DC operation and BHFOM give information about the minimum conduction losses during high frequency operation. On comparing these values with Si and SiC we can easily come to the conclusion that GaN is a better choice. • The inability to form free standing GaN substrate, other materials must be used as substrate for the growth of GaN. • Hexagonal silicon carbide (6H-SiC) can be used as a substrate as the lattice mismatch for (0001) oriented GaN films is small and the thermal condu ctivity is higher. But the catch here is the high defect density (107 cm-2 for screw dislocations and 10 9 cm-2 for edge dislocation density). • Si can also be used as a substrate. But owing to large lattice and thermal expansion coefficient mismatch can lead to defects and cracks on the material. • To relieve the tensile stress and achieve crack-free GaN heterostructures, several kind of transition layers can be used, such as low temperature AlN, graded AlGaN buffers or AlGaN/GaN superlattices. • MOCVD is now the most popular method to grow GaN owing to its good quality and reasonable growth rates. • By the formation of 2DEG at the junction interface we have a pool of electrons captured in the quantum well which is free to flow in the plane parallel to the junction interface. • The benefit of 2DEG is that because of the absence of ionic counterparts in the well the scattering is reduced significantly which contributes to better efficiency. • It is because of the piezoelectric polarization the formation of high sheet charge density is possible even without using undoped layers. • Saturation of current in BJT (NPN) happens when base is higher than emitter, but collector is not higher than base. • Saturation in case of MOSFET happens when the width of the channel below the oxide layer near the collector becomes zero, this width is related to Vds and Vgs. • Saturation current in case of MESFET is because of the depletion of n-chann el below the Gate, where on the application of required voltage Vgs the width of n-channel can be controlled. Also the potential difference Vds causes the n-channel to pinch off near the drain. • It is the formation of Notch near at the interface of heterojunction which acts as the place for formation of 2DEG.

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