Table of Contents 1.
INTRODUCTION ........................................................................................................................... 3
2.
TUNER............................................................................................................................................ 4
3.
AUDIO AMPLIFIER STAGES ...................................................................................................... 8 A.
MAIN AMPLIFIER (TAS5719)(6-8 W option) ......................................................................... 8
B.
MAIN AMPLIFIER (TS4962M)(2.5 W option) ....................................................................... 12
C.
HEADPHONE AMPLIFIER STAGE ....................................................................................... 14
4.
POWER STAGE ........................................................................................................................... 15
5.
MICROCONTROLLER (MSTAR MSD8WB9BX)..................................................................... 24
6.
1Gb DDR3 SDRAM ..................................................................................................................... 28
7.
1Gb G-die DDR3 SDRAM ........................................................................................................... 29
8.
2Gbit (256M x 8 bit) NAND Flash Memory................................................................................. 31
9.
16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM ............................................................ 35
10. USB Interface ................................................................................................................................ 38 11. CI Interface .................................................................................................................................... 41 12. Demodulator Stage ........................................................................................................................ 41 13. LNB supply and control IC ........................................................................................................... 47 14. Software Update ............................................................................................................................ 49 15. Troubleshooting............................................................................................................................. 49 A.
No Backlight Problem ........................................................................................................... 49
B.
CI Module Problem ............................................................................................................... 51
C.
Staying in Stand-by Mode ..................................................................................................... 53
D.
IR Problem ............................................................................................................................ 54
E.
Keypad Touchpad Problems.................................................................................................. 54
F.
USB Problems ....................................................................................................................... 55
G.
No Sound Problem ................................................................................................................ 56
H.
Standby On/Off Problem ....................................................................................................... 56
I.
No Signal Problem ................................................................................................................ 57
16. Service Menu Settings ................................................................................................................... 57 17. General Block Diagram ................................................................................................................. 63
2
1. INTRODUCTION 17MB95 main board is driven by MStar SOC. This IC is a single chip iDTV solution that supports channel decoding, MPEG decoding, and media-center functionality enabled by a high performance AV CODEC and CPU. Key features includes, Combo Front-End Demodulator A multi standart A/V format decoder The MACEpro video processor Home theatre sound processor Internet and Variety of Connectivity Support Dual-stream decoder for 3D contents Mılti-purpose CPU for OS and multimedia Peripheral and power management Supported peripherals are: 1 RF input VHF I, VHF III, UHF 1 Satellite input 1 Side AV (CVBS, R/L_Audio) 1 SCART socket(Common) 1 Side YPbPr 1 Side S-Video(Common) 1 PC input(Common) 3 HDMI input 1 Common interface(Common) 1 S/PDIF output 1 Headphone(Common) 2 USB 1 Ethernet-RJ45 1 External Touchpad(Common)
3
2. TUNER A. SI2156 Terrestrial and Cable TV Tuner: A.1. Description: The Si2156 integrates a complete hybrid TV tuner supporting all worldwide terrestrial and cable TV standards. Leveraging Silicon Labs’ field proven digital low-IF architecture, the Si2156 maintains the unmatched performance and design simplicity of the Si2153 while further reducing footprint size and bill of materials cost. No external LNAs, tracking filters, wirewound inductors, or SAW filters are used. Compared with competing silicon tuners and discrete MOPLL-based tuners, the Si2156 delivers superior picture quality and a higher number of received stations in crowded and near/far real-world reception conditions. The high linearity and low noise RF front-end delivers superior blocking performance and higher sensitivity in the presence of strong undesired channels and interference. The Si2156 integrates the complete signal path from antenna input to IF outputs for both analog and digital transmission standards. Compared to traditional discrete MOPLL-based tuners, the Si2156 eliminates hundreds of external components including external LNAs, tracking filter varactors and inductors (unlike competing silicon tuners), and SAW filters, resulting in the simplest, lowest-cost BOM for a hybrid TV tuner. Interfacing the Si2156 seamlessly with the Si2165 DVB-T/C demodulator creates a complete terrestrial and cable DVB-T/C receiver plus PAL/SECAM tuner.
A.2. Features: - Worldwide hybrid TV tuner - Analog TV: NTSC, PAL/SECAM - Digital TV: ATSC/QAM, DVB-T/T2/C, ISDB-T/C, DTMB - 42-1002 MHz frequency range - Compliance to A/74, NorDig, D-Book, C-Book, ARIB, EN55020, OpenCable™ specifications - Best-in-class real-world reception - Exceeds discrete MOPLL-based tuners - Highly integrated, lowest BOM - No SAW filters or wirewound inductors required - Integrated LNAs and complete tracking filters 4
- No alignment, tuning or calibration required - Digital low-IF architecture - Integrated channel select filters - Flexible output interface - ALIF to analog TV demodulator or SoC - DLIF to digital TV demodulator or SoC - 3.3 and 1.8 V power supplies - Standard CMOS process technology - 5 x 5 mm, 32-pin QFN package - RoHS compliant
Figure 1: Pin description
5
Table 1: Pin functions
6
B. M88TS2022 Satellite Tuner B.1. Features and General Description
B.2. Pin Assigment
7
B.3. Absolute Maximum Ratings and Recommended Operating Conditions
3. AUDIO AMPLIFIER STAGES A. MAIN AMPLIFIER (TAS5719)(6-8 W option) a. General Description The TAS5717/TAS5719 is a 10-W/15-W, efficient,digital audio-power amplifier for driving stereo bridge-tied speakers. One serial data input allows processing of up to two discrete audio channels and seamless integration to most digital audio processors and MPEG decoders. The device accepts a wide of input data and data rates. A fully programmable data path routes these channels to the internal speaker drivers. The TAS5717/9 is a slave-only device receiving all clocks from external sources. The TAS5717/TAS5719 operates with a PWM carrier between a 384-kHz switching rate and a 352-KHz switching rate, depending on the input sample rate. Oversampling combined with a fourth-order noise shaper provides a flat noise floor and excellent dynamic range from 20 Hz to 20 kHz. 8
b. Features • Audio Input/Output – TAS5717 Supports 2×10 W and TAS5719 Supports 2×15 W Output – Wide PVDD Range, From 4.5 V to 26 V – Efficient Class-D Operation Eliminates Need for Heatsinks – Requires Only 3.3 V and PVDD – One Serial Audio Input (Two Audio Channels) – I2C Address Selection via PIN (Chip Select) – Supports 8-kHz to 48-kHz Sample Rate (LJ/RJ/I2S) – External Headphone-Amplifier Shutdown Signal – Integrated CAP-Free Headphone Amplifier – Stereo Headphone (Stereo 2-V RMS Line Driver) Outputs • Audio/PWM Processing – Independent Channel Volume Controls With 24-dB to Mute – Programmable Two-Band Dynamic Range Control – 14 Programmable Biquads for Speaker EQ – Programmable Coefficients for DRC Filters – DC Blocking Filters – 0.125-dB Fine Volume Support • General Features – Serial Control Interface Operational Without MCLK – Factory-Trimmed Internal Oscillator for Automatic Rate Detection – Surface Mount, 48-Pin, 7-mm × 7-mm HTQFP Package – AD, BD, and Ternary PWM-Mode Support – Thermal and Short-Circuit Protection
9
• Benefits – EQ: Speaker Equalization Improves Audio Performance – DRC: Dynamic Range Compression. Can Be Used As Power Limiter. Enables Speaker Protection, Easy Listening, Night-Mode Listening – DirectPath Technology: Eliminates Bulky DC Blocking Capacitors – Stereo Headphone/Stereo Line Drivers: Adjust Gain via External Resistors, Dedicated Active Headpone Mute Pin, High Signal-to-Noise Ratio – Two-Band DRC: Set Two Different Thresholds for Low- and High-Frequency Content c. Pin descriptions and functions:
Figure 2: Pin description
10
Table 2: Pin functions
11
Table 3: Recomnended operating conditions
B. MAIN AMPLIFIER (TS4962M)(2.5 W option) a. General Description The TS4962M is a differential Class-D BTL power amplifier. It is able to drive up to 2.3W into a 4Ω load and 1.4W into a 8Ω load at 5V. It achieves outstanding efficiency (88%typ.) compared to classical Class-AB audio amps. The gain of the device can be controlled via two external gain-setting resistors. Pop & click reduction circuitry provides low on/off switch noise while allowing the device to start within 5ms. A standby function (active low) allows the reduction of current consumption to 10nA typ. b. Features
12
-
Operating from VCC = 2.4V to 5.5V
-
Standby mode active low
-
Output power: 3W into 4Ω and 1.75W into 8Ω
-
with 10% THD+N max and 5V power supply.
-
Output power: 2.3W @5V or 0.75W @ 3.0V
-
into 4Ω with 1% THD+N max.
-
Output power: 1.4W @5V or 0.45W @ 3.0V
-
into 8Ω with 1% THD+N max.
-
Adjustable gain via external resistors
-
Low current consumption 2mA @ 3V
-
Efficiency: 88% typ.
-
Signal to noise ratio: 85dB typ.
-
PSRR: 63dB typ. @217Hz with 6dB gain
-
PWM base frequency: 250kHz
-
Low pop & click noise
-
Thermal shutdown protection
-
Available in flip-chip 9 x 300μm (Pb-free)
c. Pin descriptions and functions:
Figure 3: Pin description
13
Table 4: Recommended operating conditions
C. HEADPHONE AMPLIFIER STAGE Headphone is a SoC (single on chip) configuration in mainboard, design scheme is shown in figure 4.
Figure 4: Headphone
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4. POWER STAGE
Figure 5: Power socket and power options
Power socket is used for taking voltages which are 3.3V, 12V, 5V and 24V(VDD_Audio). These voltages are produced in power card. Also socket is used for giving dimming, backlight and standbye signals with power card. İt is shown in figure 5. 24V(VDD_Audio) goes directly to the audio side, through power socket other incoming voltages from power card are converted several voltages.
Figure 6: Power steps
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FDC642P General Description and Features
TPS65251 a) General Description The TPS65251 features three synchronous wide input range high efficiency buck converters. The converters are designed to simplify its application while giving the designer the option to optimize their usage according to the target application. The converters can operate in 5-, 9-, 12- or 15-V systems and have integrated power transistors. The output voltage can be set externally using a resistor divider to any value between 0.8 V and close to the input supply. Each converter features enable pin that allows a delayed start-up for sequencing purposes, soft start pin that allows adjustable soft-start time by choosing the soft-start capacitor, and a current limit (RLIMx) pin that enables designer to adjust current limit by selecting an external resistor and optimize the choice of inductor. The current mode control allows a simple RC compensation. The switching frequency of the converters can either be set with an external resistor connected to ROSC pin or can be synchronized to an external clock connected to SYNC pin if needed. The switching regulators are designed to operate from 300 kHz to 2.2 MHz. 180° out of phase operation between Buck 1 and Buck 2, 3 (Buck 2 and 3 run in phase) minimizes the input filter requirements.
16
TPS65251 features a supervisor circuit that monitors each converter output. The PGOOD pin is asserted once sequencing is done, all PG signals are reported and a selectable end of reset time lapses. The polarity of the PGOOD signal is active high. TPS65251 also features a light load pulse skipping mode (PSM) by allowing the LOW_P pin tied to V3V. The PSM mode allows for a reduction on the input power supplied to the system when the host processor is in stand-by (low activity) mode. b) Features • Wide Input Supply Voltage Range (4.5 V - 18 V) • 0.8 V, 1% Accuracy Reference • Continuous Loading: 3 A (Buck 1), 2 A (Buck 2 and 3) • Maximum Current: 3.5 A (Buck 1), 2.5 A (Buck 2 and 3) • Adjustable Switching Frequency 300 kHz - 2.2 MHz Set By External Resistor • Dedicated Enable for Each Buck • External Synchronization Pin for Oscillator • External Enable/Sequencing and Soft Start Pins • Adjustable Current Limit Set By External Resistor • Soft Start Pins • Current-Mode Control With Simple Compensation Circuit • Power Good • Optional Low Power Mode Operation for Light Loads • QFN Package, 40-Pin 6 mm x 6 mm RHA APPLICATIONS • Set Top Boxes • Blu-ray DVD • Security Camera • Car Audio/Video • DTV • DVR
17
Table 5: Recommended operating conditions
Figure 7: Pin description
18
Table 6: Pin functions
MP1484 a) General Description The MP1484 is a monolithic synchronous buck regulator. The device integrates top and bottom 85mΩ MOSFETS that provide 3A of continuous load current over a wide operating input voltage of 4.75V to 18V. Current mode control provides fast transient response and cycle-by-cycle current limit. An adjustable soft-start prevents inrush current at turn-on and in shutdown mode, the supply current drops below 1μA. The MP1484 is PIN compatible to the MP1482 2A/18V/Synchronous Step-Down Converter. b) Features • 3A Continuous Output Current • Wide 4.75V to 18V Operating Input Range • Integrated 85mΩ Power MOSFET Switches 19
• Output Adjustable from 0.925V to 20V • Up to 95% Efficiency • Programmable Soft-Start • Stable with Low ESR Ceramic Output Capacitors • Fixed 340KHz Frequency • Cycle-by-Cycle Over Current Protection • Input Under Voltage Lockout • Thermally Enhanced 8-Pin SOIC Package APPLICATIONS • FPGA, ASIC, DSP Power Supplies • LCD TV • Green Electronics/Appliances • Notebook Computers
Figure 8: General description
20
Table 7: Pin functions
APL5910 a) General Description The APL5910 is a 1A ultra low dropout linear regulator. The IC needs two supply voltages, one is a control voltage (VCNTL) for the control circuitry, the other is a main supply voltage (VIN) for power conversion, to reduce power dissipation and provide extremely low dropout voltage. The APL5910 integrates many functions. A Power-On- Reset (POR) circuit monitors both supply voltages on VCNTL and VIN pins to prevent erroneous operations. The functions of thermal shutdown and current-limit protect the device against thermal and current over-loads. A POK indicates that the output voltage status with a delay time set internally. It can control other converter for power sequence. The APL5910 can be enabled by other power systems. Pulling and holding the EN voltage below 0.4V shuts off the output. The APL5910 is available in a SOP-8P package which features small size as SOP-8 and an Exposed Pad to reduce the junction-to-case resistance to extend power range of applications. b) Features Ultra Low Dropout -
0.12V (Typical) at 1AOutput Current
0.8V Reference Voltage High Output Accuracy 21
±1.5%over Line, Load, and Temperature Range
Fast Transient Response Adjustable Output Voltage Power-On-Reset Monitoring on Both VCNTL and VIN Pins Internal Soft-Start Current-Limit and ShortCurrent-Limit Protections Thermal Shutdown with Hysteresis Open-Drain VOUT Voltage Indicator (POK) Low Shutdown Quiescent Current (< 30mA ) Shutdown/Enable Control Function Simple SOP-8P Package with Exposed Pad Lead Free and Green Devices Available (RoHS Compliant) APPLICATIONS Motherboards, VGA Cards Notebook PCs Add-in Cards
Figure 9: Pin configuration
Table 8: Recommended operating conditions
22
Table 9: Pin description
LM1117 a) General Description The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It has the same pin-out as National Semiconductor’s industry standard LM317. The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap reference to assure output voltage accuracy to within ±1%. The LM1117 series is available in LLP, TO-263, SOT-223, TO-220, and TO-252 D-PAK packages. A minimum of 10µF tantalum capacitor is required at the output to improve the transient response and stability. b) Features Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions Space Saving SOT-223 and LLP Packages Current Limiting and Thermal Protection Output Current 800mA Line Regulation 0.2% (Max) Load Regulation 0.4% (Max) Temperature Range: 23
-
LM1117 0˚C to 125˚C
-
LM1117I −40˚C to 125˚C
Applications -
2.85V Model for SCSI-2 Active Termination
-
Post Regulator for Switching DC/DC Converter
-
High Efficiency Linear Regulators
-
Battery Charger
-
Battery Powered Instrumentation
5. MICROCONTROLLER (MSTAR MSD8WB9BX) a) General Description
24
b) Features
25
26
27
Table 10: Recommended operating conditions
6. 1Gb DDR3 SDRAM Hynix H5TQ1G630FA a) Description The H5TQ1G6(8)3DFR-xxx series are a 1,073,741,824-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. Hynix 1Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth. b) Features • DQ Power & Power supply : VDD & VDDQ = 1.5V +/- 0.075V • DQ Ground supply : VSSQ = Ground • Fully differential clock inputs (CK, CK) operation • Differential Data Strobe (DQS, DQS) • On chip DLL align DQ, DQS and DQS transition with CK transition • DM masks write data-in at the both rising and falling edges of the data strobe • All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock • Programmable CAS latency 6, 7, 8, 9, 10, 11, 12, 13 and 14 supported • Programmable additive latency 0, CL-1, and CL-2 supported • Programmable CAS Write latency (CWL) = 5, 6, 7, 8, 9, 10 • Programmable burst length 4/8 with both nibble sequential and interleave mode • Programmable PASR(Partial Array Self-Refresh) for Digital consumer Applications. 28
• Programmable BL=4 supported (tCCD=2CLK) for Digi-tal consumer Applications. • Programmable ZQ calibration supported • BL switch on the fly • 8banks • Average Refresh Cycle (Tcase of 0 oC~ 95 oC) -
7.8 μs at -40oC ~ 85 oC
-
3.9 μs at 85oC ~ 95 oC
-
Commercial Temperature ( 0oC ~ 85 oC)
-
Industrial Temperature ( -40oC ~ 85 oC)
• Auto Self Refresh supported • JEDEC standard 78ball FBGA(x8), 96ball FBGA(x16) • Driver strength selected by EMRS • Dynamic On Die Termination supported • Asynchronous RESET pin supported • TDQS (Termination Data Strobe) supported (x8 only) • Write Levelization supported • On Die Thermal Sensor supported • 8 bit pre-fetch
Table 11: Recommended operating conditions
7. 1Gb G-die DDR3 SDRAM Samsung K4B1G1646G a) Key Features • JEDEC standard 1.5V ± 0.075V Power Supply • VDDQ = 1.5V ± 0.075V • 400 MHz fCK for 800Mb/sec/pin, 533MHz fCK for 1066Mb/sec/pin, 667MHz fCK for 1333Mb/sec/pin, 800MHz fCK for 1600Mb/sec/pin 900MHz fCK for 1866Mb/sec/pin 29
• 8 Banks • Programmable CAS Latency(posted CAS): 5,6,7,8,9,10,11,13 • Programmable Additive Latency: 0, CL-2 or CL-1 clock • Programmable CAS Write Latency (CWL) = 5 (DDR3-800), 6 (DDR3-1066), 7 (DDR31333), 8 (DDR3-1600) and 9 (DDR3-1866) • 8-bit pre-fetch • Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either On the fly using A12 or MRS] • Bi-directional Differential Data-Strobe • Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%) • On Die Termination using ODT pin • Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95 °C • Asynchronous Reset • Package : 78 balls FBGA - x4/x8 • All of Lead-Free products are compliant for RoHS • All of products are Halogen-free
Table 12: 1Gb DDR3 G-die Speed bins
b) Description The 1Gb DDR3 SDRAM G-die is organized as a 32Mbit x 4 I/Os x 8banks, 16Mbit x 8 I/Os x 8banks device. This synchronous device achieves high speed double-data-rate transfer rates of up to 1866Mb/sec/pin (DDR3- 1866) for general applications. The chip is designed to comply with the following key DDR3 SDRAM fea-tures such as posted CAS, Programmable CWL, Internal (Self) Calibration, On Die Termination using ODT pin and Asynchronous Reset. All of the control and address inputs are synchronized with a pair of exter-nally supplied differential clocks. Inputs are latched at the crosspoint of dif-ferential clocks (CK rising and 30
CK falling). All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS) in a source synchronous fash-ion. The address bus is used to convey row, column, and bank address information in a RAS/CAS multiplexing style. The DDR3 device operates with a single 1.5V ± 0.075V power supply and 1.5V ± 0.075V VDDQ. The 1Gb DDR3 G-die device is available in 78ball FBGAs(x4/x8).
Table 13: Absolute Maximum DC Ratings
Table 14: Recommended operating conditions
8. 2Gbit (256M x 8 bit) NAND Flash Memory H27U2G8F2CTR-BC a) Key Features DENSITY - 2Gbit: 2048blocks Nand FLASH INTERFACE - NAND Interface - ADDRESS / DATA Multiplexing SUPPLY VOLTAGE - Vcc = 3.0/1.8V Volt core supply voltage for Program, Erase and Read operations. MEMORY CELL ARRAY - X8: (2K + 64) bytes x 64 pages x 2048 blocks - X16: (1k+32) words x 64 pages x 2048 blocks PAGE SIZE - X8: (2048 + 64 spare) bytes 31
- X16:(1024 + 32spare) Words Block SIZE - X8: (128K + 4K spare) bytes - X16:(64K + 2K spare) Words PAGE READ / PROGRAM - Random access: 25us (Max) - Sequential access: 25ns / 45ns (3.0V/1.8V, min.) - Program time(3.0V/1.8V): 200us / 250us (Typ) - Multi-page program time (2 pages): 200us / 250us (3.0V/1.8V, Typ.) BLOCK ERASE / MULTIPLE BLOCK ERASE - Block erase time: 3.5 ms (Typ) - Multi-block erase time (2 blocks): 3.5ms/ 3.5ms (3.0V/1.8V, Typ.) SEQURITY - OTP area - Serial number (unique ID) - Hardware program/erase disabled during Power transition - Multiplane Architecture: Array is split into two independent planes. Parallel operations on both planes are available, having program and erase time. - Single and multiplane copy back program with automatic EDC (error detection code) - Single and multiplane page re-program - Single and multiplane cache program - Cache read - Multiplane block erase Reliability - 100,000 Program / Erase cycles (with 1bit /528Byte ECC) - 10 Year Data retention ONFI 1.0 COMPLIANT COMMAND SET ELECTRONICAL SIGNATURE - Maunufacture ID: ADh 32
- Device ID PACKAGE - Lead/Halogen Free - TSOP48 12 x 20 x 1.2 mm - FBGA63 9 x 11 x 1.0 mm b) Description H27(U_S)2G8_6F2C series is a 256Mx8bit with spare 8Mx8 bit capacity. The device is offered in 3.0/1.8 Vcc Power Supply, and with x8 and x16 I/O interface Its NAND cell provides the most cost-effective solution for the solid state mass storage market. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. The device contains 2048 blocks, composed by 64 pages. Memory array is split into 2 planes, each of them consisting of 1024 blocks. Like all other 2KB - page NAND Flash devices, a program operation allows to write the 2112-byte page in typical 200us(3.3V) and an erase operation can be performed in typical 3.5ms on a 128K-byte block. In addition to this, thanks to multi-plane architecture, it is possible to program 2 pages at a time (one per each plane) or to erase 2 blocks at a time (again, one per each plane). As a consequence, multi-plane architecture allows program time to be reduced by 40% and erase time to be reduction by 50%. In case of multi-plane operation, there is small degradation at 1.8V application in terms of program/erase time. The multiplane operations are supported both with traditional and ONFI 1.0 protocols. Data in the page can be read out at 25ns (3V version) and 45ns (1.8V version) cycle time per byte. The I/O pins serve as the ports for address and data input/output as well as command input. This interface allows a reduced pin count and easy migration towards different densities, without any rearrangement of footprint. Commands, Data and Addresses are synchronously introduced using CE#, WE#, ALE and CLE input pin. The on-chip Program/Erase Controller automates all read, program and erase functions including pulse repetition, where required, and internal verification and margining of data. A WP# pin is available to provide hardware protection against program and erase operations. The output pin RB# (open drain buffer) signals the status of the device during each operation. In a system with multiple memories the RB# pins can be connected all together to provide a global status signal. Each block can be programmed and erased up to 100,000 cycles with ECC (error correction code) on. To extend the lifetime of Nand Flash devices, the 33
implementation of an ECC is mandatory. The chip supports CE# don't care function. This function allows the direct download of the code from the NAND Flash memory device by a microcontroller, since the CE# transitions do not stop the read operation. In addition, device supports ONFI 1.0 specification. The copy back function allows the optimization of defective blocks management: when a page program operation fails the data can be directly programmed in another page inside the same array section without the time consuming serial data insertion phase. Copy back operation automatically executes embedded error detection operation: 1 bit error out of every 528-byte (x8) or 1 bit error out of every 264-word (x16) can be detected. With this feature it is no longer necessary to use an external to detect copy back operation errors. Multiplane copy back is also supported, both with traditional and ONFI 1.0 protocols. Data read out after copy back read (both for single and multiplane cases) is allowed. In addition, Cache program and multi cache program operations improve the programing throughput by programing data using the cache register. The devices provide two innovative features: page re-program and multiplane page re program. The page re-program allows to re-program one page. Normally, this operation is performed after a previously failed page program operation.Similarly, the multiplane page reprogram allows to re-program two pages in parallel, one per each plane. The first page must be in the first plane while the second page must be in the second plane; the multiplane page re-program operation is performed after a previously failed multiplane page program operation. The page re-program and multiplane page re-program guarantee imporve performance, since data insertion can be omitted during re-program operations, and save ram buffer at the host in the case of program failure. The devices, available in the TSOP48 (12X20mm) package, support the ONFI1.0 specfication and come with four sequrity features: - OTP (one time programmable) area, which is a restricted access area where sensitive data/code can be stored permantely. - Serial number (unique identifier), which allows the devices to be uniquely indentified. - Read ID2 extention These security features are subject to an NDA (non-disclosure agreement) and are, therefore, no described in the datasheet. For more details about them, contact your nearest Hynix sales office.
34
Table 15: DC and operating characteristic
9. 16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM MX25L1602 Mstar SPI Flash a) Key Features ■ HIGH DENSITY NAND FLASH MEMORIES GENERAL • 16,777,216 x 1 bit structure • 256 Equal Sectors with 8K-byte each - Any sector can be erased • 4096 Equal Segments with 512-byte each - Provides sequential output within any segment • Single Power Supply Operation - 3.0 to 3.6 volt for read, erase, and program operations • Latch-up protected to 100mA from -1V to Vcc +1V • Low Vcc write inhibit is equal to or less than 2.5V
35
PERFORMANCE • High Performance - Fast access time: 20MHz serial clock (50pF + 1TTL Load) - Fast program time: 5ms/page (typical, 128-byte per page) - Fast erase time: 300ms/sector (typical, 8K-byte per sector) • Low Power Consumption - Low active read current: 10mA (typical) at 17MHz - Low active programming current: 10mA (typical) - Low active erase current: 10mA (typical) - Low standby current: 30uA (typical, CMOS) • Minimum 100,000 erase/program cycle SOFTWARE FEATURES • Input Data Format - 1-byte Command code, 3-byte address, 1-byte byte address • 512-byte Sequential Read Operation • Built in 9-bit (A0 to A8) pre-settable address counter to support the 512-byte sequential read operation • Auto Erase and Auto Program Algorithm - Automatically erases and verifies data at selected sector - Automatically programs and verifies data at selected page by an internal algroithm that automatically times the program pulse widths (Any page to be programed should have page in the erased state first) • Status Register Feature - Provides detection of program and erase operation completion. - Provides auto erase/ program error report HARDWARE FEATURES • SCLK Input - Serial clock input • SI Input - Serial Data Input • SO Output - Serial Data Output 36
• PACKAGE - 28-pin SOP (330mil) b) General Description The MX25L1602 is a CMOS 16,777,216 bit serial Flash EEPROM, which is configured as 2,097,152 x 8 internally. The MX25L1602 features a serial peripheral interface and software protocol allowing operation on a simple 3- wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS input. The MX25L1602 provide sequential read operation on whole chip. The sequential read operation is executed on a segment (512 byte) basis. User may start to read from any byte of the segment. While the end of the segment is reached, the device will wrap around to the beginning of the segment and continuously outputs data until CS goes high. After program/erase command is issued, auto program/ erase algorithms which program/erase and verify the specified page locations will be executed. Program command is executed on a page (128 bytes) basis, and erase command is executed on both chip and sector (8K bytes) basis. To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion and error flag status of a program or erase operation. When the device is not in operation and CS is high, it is put in standby mode and draws less than 30uA DC current. The MX25L1602 utilizes MXIC's proprietary memory cell which reliably stores memory contents even after 100,000 program and erase cycles.
37
Figure: Pin configuration.
Table 16: Pin description
10. USB Interface Mstar IC has two input port for USB, therefore air mause, internal wi-fi interface and USB2 are combined with HUB. This property is optional. If air mause and wi-fi interfaces are not alined, two USB are connected directly to main IC.
38
Figure 10: USB description
USB2512B a) General Description The SMSC USB251xB/xBi hub is a family of low-power, configurable, MTT (multi transaction translator) hub controller IC products for embedded USB solutions. The x in the part number indicates the number of downstream ports available, while the B indicates battery charging support. The SMSC hub supports lowspeed, full-speed, and hi-speed (if operating as a hispeed hub) downstream devices on all of the enabled downstream ports. b) Features -
USB251xB/xBi products are fully footprint compatible with USB251x/xi/xA/xAi products as direct drop-in replacements Cost savings include using the same PCB components and application of USB-IF Compliance by Similarity
-
Full power management with individual or ganged power control of each downstream port
-
Fully integrated USB termination and pull-up/pulldown resistors
-
Supports a single external 3.3 V supply source; internal regulators provide 1.2 V internal core voltage
39
-
Onboard 24 MHz crystal driver, ceramic resonator, or external 24/48 MHz clock input
-
Customizable vendor ID, product ID, and device ID
-
4 kilovolts of HBM JESD22-A114F ESD protection (powered and unpowered)
-
Supports self- or bus-powered operation
-
Supports the USB Battery Charging specification Rev. 1.1 for Charging Downstream Ports (CDP)
-
36-pin QFN (6x6 mm) Lead-free RoHS compliant package
-
USB251xBi products support the industrial temperature range of -40ºC to +85ºC
-
USB251xB products support the extended commercial temperature range of 0ºC to +85ºC
c) Applications -
LCD monitors and TVs
-
Multi-function USB peripherals
-
PC motherboards
-
Set-top boxes, DVD players, DVR/PVR
-
Printers and scanners
-
PC media drive bay
-
Portable hub boxes
-
Mobile PC docking
-
Embedded systems
Figure 11: Pin configurations
40
11. CI Interface 17MB95 Digital CI ve Smart Card Interface Block diagram:
Figure 12: CI interface
12. Demodulator Stage A. MSB1231 DVB-T2 a) Key Features
41
b) General Description
c) Block Diagram
42
d) Pinning
43
e) Absolute
44
Maximum
Ratings
and
Recommended
Operating
Conditions
B. M88DS3002 DVB-S/S2 Demodulator a) Key Features and General Description
45
b) Block Diagram
c) Pin Information
46
a) Absolute Maximum Ratings and Recommended Operating Conditions
13. LNB supply and control IC MP8125 a) General Description The MP8125 is a voltage regulator designed to provide efficient, low noise power to the Satellite receiver’s RF LNB (Low Noise Block) converter via coaxial cable through a DiSEqC 1.x compatible link that receives instructions from a dedicated controller. The MP8125 integrates a current mode boost regulator followed by a tracking linear regulator. The boost regulator provides a clean and quiet power source that will not contaminate the low noise RF signal down converted to the receiver. The tracking linear regulator protects the output against overload or short. The MP8125 provides a number of features described in the European EUTELSAT specification (DiSEqC) including: voltage selection of horizontal or vertical polarization directions of LNB and a selectable VOUT compensation for voltage drop on the long coaxial cable. In accordance with DiSEqC standard, a tone signal of 22kHz is generated by an internal oscillator and can be activated or deactivated onto output by EXTM pin. The MP8125 is available in thermally enhanced TSSOP16 package. 47
b) Key Features • DiSEqC 1.x Compatibility • Up to 550mA Output Current • 8V to 14V Input Voltage • Boost Converter with Internal Switch • Low Noise LDO Output • Built-in 22kHz Tone Signal Generator • Programmable Current Limit • 1V Line Drop Compensation • Adjustable Soft-start Time • POK Indicator • Short Circuit Protection • Over Temperature Protection • TSSOP16 Exposed Pad Package APPLICATIONS • LNB Power Supply and Control for Satellite Set Top Boxes c) Package Reference
48
a) Absolute Maximum Ratings and Recommended Operating Conditions
14. Software Update 14.1 Main SW update In MB95 project there is only one software. From following steps software update procedure can be seen: 1. MB90_en.bin, mboot.bin and usb_auto_update_A1.txt documents should copy directly inside of a flash memory(not in a folder). 2. Insert flash memory to the tv when tv is powered off. 3. While pushing the OK button in remote control, power on the and wait. TV will power-up itself. 4. If First Time Installation screen comes, it means software update procedure is successful.
15. Troubleshooting A. No Backlight Problem Problem: If TV is working, led is normal and there is no picture and backlight on the panel. Possible couses: Backlight pin, dimming pin, backlight supply, stby on/off pin BACKLIGHT_ON/OFF pin should be high when the backlight is ON. R119 must be low when the backlight is OFF. If it is a problem, please check Q10 and the panel cables. Also it can be tested in TP50 in main board. 49
Dimming pin should be high or square wave in open position. If it is low, please check S60 for Mstar side and panel or power cables, connectors.
Backlight power supply should be in panel specs. Please check Q33, shown below; also it can be checked TP53.
50
STBY_ON/OFF_NOT should be low for tv on condition, please check Q11’s collector.
B. CI Module Problem Problem: CI is not working when CI module inserted. Possible couses: Supply, suply control pin, detect pins, mechanical positions of pins. CI supply should be 5V when CI module inserted. If it is not 5V please check CI_PWR_CTRL, this pin should be low.
51
Please check mechanical position of CI module. Is it inserted properly or not? Detect ports should be low. If it is not low please check CI connector pins, CI module pins.
52
C. Staying in Stand-by Mode Problem: Staying in stand-by mode, no other operation This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal operation. When there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV set and control voltage points with a multimeter to find the shorted voltage to ground.
53
D. IR Problem Problem: LED or IR not working Check LED card supply on MB95 chasis.
E. Keypad Touchpad Problems Problem: Keypad or Touchpad is not working Check keypad supply on MB95.
54
F. USB Problems Problem: USB is not working or no USB Detection. Check USB Supply, It should be nearly 5V. Also USB Enable should be logic high.
55
G. No Sound Problem Problem: No audio at main TV speaker outputs. Check supply voltages of 24V VDD_AUDIO, 3.3V AUDIO_AVDD and AUDIO_DVDD with a voltage-meter. There may be a problem in headphone connector or headphone detect circuit (when headphone is connected, speakers are automatically muted). Measure voltage at HP_DETECT pin, it should be 3.3v.
H. Standby On/Off Problem Problem: Device can not boot, TV hangs in standby mode. There may be a problem about power supply. Check main supplies with a voltage-meter. Also there may be a problem about SW. Try to update TV with latest SW. Additionally it is good to check SW printouts via Teraterm. These printouts may give a clue about the problem. You can use Scart-1 for terraterm connection. 56
I. No Signal Problem Problem: No signal in TV mode. Check tuner supply voltage; 5V_VCC, 3V3_TUNER and 1V8_TUNER. Check tuner options are correctly set in Service menu. Check AGC voltage at IF_AGC pin of tuner.
16. Service Menu Settings In order to reach service menu, first Press “MENU” buton, then write “4725” by uisng remote controller. You can see the service menu main screen below. You can check SW releases by using this menu. In addition, you can make changes on video, audio etc. by using video settings, audio settings titles.
57
Service Menu Main Screen
Video Settings 58
Audio Settings
Options-1 Menu
59
Options-2 Menu
Options-3 Menu
60
Tuner Settings Menu
Source Settings Menu 61
Diagnostic Menu
62
17. General Block Diagram
63
1
2
3
4
CN6
R8 1k2
1
1
Q5 BC848B
2
1
R52 10R
10R R58
10R R60
2
2
1
10R R51
D1 D2 AD12 AC13
HDMI1_SCL HDMI1_SDA
2
C
HDMI1_5V HDMI1_HPDIN
2
D26 BAW56
R22 47k 1
R611 33k
3V3_STBY 3V3_STBY 3V3_STBY 3V3_STBY 3V3_STBY 3V3_STBY
PANEL_VCC_ON/OFF
GPIO131 GPIO132 GPIO133 GPIO134 GPIO135
GPIO
2
2
U4 MSD8WB9BX
PWM0 PWM1 PWM2 PWM3 PWM_PM
SAR0 SAR1 SAR2 SAR3
3V3_STBY 2
3V3_VCC_TUNER
2
2 1
10k R195 10k R194
R190 10k Q8 BC848B
1
2
2
R343 100R Q7 BC848B
R189 10k 1
2
D
5V_VCC 3V3_VCC
2
2
1
12V_VCC
2
2
R342 100R Q36 BC848B
1V8_VCC_TUNER
1V2 - 1V25 -1V5 - 2V5 - 3V3 FROM ICs POWER GOOD PINS E
SHORT CCT PROTECTION
3V3_STBY
N24 N25 P23 N23 F6
1
2
10k R183
1
2
2
10k R712
D24 BAW56
PROTECT
TP7
2 1
1
R114 100R R261 100R R127 4k7
1
2
PWM0 PWM1 BACKLIGHT_DIM PWM_OUT_LED3
G5 H5 H6 J6
KEYBOARD SC_PIN8 DVD_SENSE
1
2
2
3V3_STBY
3V3_VCC
1
3V3_VCC 3V3_VCC
2 1
1
USB_OCD2 4k7 R4 4k7 R3
USB_OCD1
3V3_VCC
2
1
C5V6
D19
F
F
R140 4k7
1
2
R111 4k7 4k7 R260
1
R614 33k R613 33k R214 33k
4k7
33R R737 33R R738
2
R120
GPIO58 GPIO61 GPIO62
AA18 U22 AB22 T22 W21
TUNER_RST S27 NC
Q10 BC848B
C3 A3 B3
1
9
C52 100nF 10V
1
24V_VCC_AU
1
2
BC858B Q35R191 10k 1
PROTECT LED1 LED2 SPI_CS STBY_ON/OFF_NOT 4k7 DVD_WAKEUP PC_DET R11 FLASH_WP TOUCHPAD_SCL AUX_RESET TOUCHPAD_SDA HP_MUTE
R192 10k
1
R143 4k7
4k7 R1
2
1
1
R119 4k7
GPIO43/UART2_TX GPIO44/UART2_RX GPIO45 GPIO46 GPIO47/UART4_TX GPIO48/UART4_RX GPIO49 GPIO51 GPIO52
K5 M5 K6 L5 J4 M4 M7 M6 K4 D3 L6 N6
R109 4k7
1
D4 E4 D7 D6 B8 A8 F7 A9 F4
2
GPIO6 GPIO7/PM_UART1_TX GPIO8 GPIO12/CSZ1 GPIO10 GPIO11/PM_UART1_RX GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18
NC_7 NC_6 NC_5 NC_4 NC_3 NC_2 NC_1 NC_0
2
4k7 R121
4k7 R126
1
BACKLIGHT_ON/OFF
1
GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42
AE25 AE1 U23 T25 T24 T23 A25 A1
R273 100R EXT_RESET R347 100R LINEDROP 3V3_STBY AMP_MUTE S2_RESET HP_DETECT 3D_ENABLE CI_PWR_CTRL R697 3V3_VCC 1k R715 2k7 R168 18k R662 HDMI2_5V R663 18k HDMI1_5V 18k HDMI0_5V PCM_CD1 LNB_POK
C7 E3 F5 B6 E2 D5 B7
1
1
1
1 1
AUX_RESET
USB_ENABLE1 USB_ENABLE2 DVD_IR_ON/OFF
1
3V3_STBY
R128 4k7 R110 4k7 R144 4k7 R12 4k7
1
2
C562 100nF 16V
2
C626 1uF 16V
2
D
R108 10k
3 VCC RST GND 2 1
2
2
5V_VCC
1
R13 4k7
R258 220R
10k R188 10k R185 10k R186
12V_VCC
R129 4k7 R123 4k7 R142 4k7 R5 330k
1
R23 47k R24 47k 1
3V3_STBY
U28 MAX809LTR
3V3_VCC
B
ETH_GRN
R107 15k
PANEL_VCC
HDMI2_5V HDMI2_HPDIN
2
ETH_YEL
2
E
2
ETH_TXP
HDMI1_CLKN CEC
2
1
ETH_RXN ETH_RXP
HDMI1_RX0N HDMI1_CLKP
2
R59 10R
10R R98
ETH_TXN
2
1
1
2
2
R57 10R
HDMI1_RX1N HDMI1_RX0P
10R R55
2
1
HDMI1_RX2N HDMI1_RX1P
10R R56
10R R166
HDMI2_CLKN CEC HDMI0_ARC HDMI2_SCL HDMI2_SDA
1
1
R53 10R
1
1
CEC
R99 10R 1
Q4 BC848B
2
1
2
3V3_VCC
HDMI1_RX2P
2
1
CEC
R40 1k
R160 10R
HDMI2_RX0N HDMI2_CLKP
10R R100
2
R116 5k1
R54 10R
R84 1k
USB2_DN USB2_DP USB1_DN USB1_DP
1
1
1
R61 10R
1
2
1
3
2
R86 100R
HDMI2_HPDIN
1
1
2
21 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
T6
R39 1k
2
1
2
2
2
R106 10R
HDMI2_RX1N HDMI2_RX0P
10R R124
R32 47k
R85 1k
HDMI2_RX0N HDMI2_RX0P HDMI2_RX1N HDMI2_RX1P HDMI2_RX2N HDMI2_RX2P HDMI2_CLKN HDMI2_CLKP HDMI2_SCL HDMI2_SDA
1
A
2
1
2
1
F1 G3 G1 G2 H3 H2 F3 F2 R6 T4 R5
R158 10R
HDMI2_RX2N HDMI2_RX1P
10R R112
2
2
HDMI1_HPDIN
RXD0N RXD0P RXD1N RXD1P RXD2N RXD2P RXDCKN RXDCKP DDCDD_CK DDCDD_DA HOTPLUGD
1
HDMI2_RX2P
2
1
2
2
U4 MSD8WB9BX
RXB0N RXB0P RXB1N RXB1P RXB2N RXB2P RXBCKN RXBCKP DDCDB_CK DDCDB_DA HOTPLUGB
1
1
HDMI0_5V HDMI0_HPDIN
J1 K3 K1 K2 L3 L2 J3 J2 U5 U6 T5
HDMI1_RX0N HDMI1_RX0P HDMI1_RX1N HDMI1_RX1P HDMI1_RX2N HDMI1_RX2P HDMI1_CLKN HDMI1_CLKP HDMI1_SCL HDMI1_SDA
3
R97 10R
1
R141 10R
R31 47k R30 47k
10R R72
HDMI0_SCL HDMI0_SDA
2
1uF 6V3
HDMI / USB
21 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1
10R R63
R14 47k
2
HDMI0_CLKN CEC
2
R19 47k R25 47k
2
1
C14 HDMI0_ARC
2
R64 10R
2
1
HDMI0_RX0N HDMI0_CLKP
2
R83 1k
1
HDMI3
R71 10R
2
HDMI2_5V
10R R65
Q2 BC848B
1k2 R33
2
1
1
HDMI2
8
R125 5k1
1
HDMI0_RX1N HDMI0_RX0P
1
CN4
C
7
R122 5k1
R66 10R 1
1
3
10R R68
2
1
2
2
RXC0N RXC0P RXC1N RXC1P RXC2N RXC2P RXCCKN RXCCKP DDCDC_CK DDCDC_DA HOTPLUGC
R1 T3 T1 T2 U3 U2 R3 R2 V6 W6 AD4
R130 5k1
R70 10R
TN GPIO55/LED[0] TP GPIO56/LED[1] RP RN
10R R67
1
1
HDMI0_RX2N HDMI0_RX1P
RXA0N RXA0P RXA1N RXA1P RXA2N RXA2P RXACKN RXACKP DDCDA_CK DDCDA_DA HOTPLUGA ARC0
B5 B4 C5 C4 C6 A6
2
M1 N3 N1 N2 P3 P2 M3 M2 V5 V4 AD1 N4
HDMI0_RX0N HDMI0_RX0P HDMI0_RX1N HDMI0_RX1P HDMI0_RX2N HDMI0_RX2P HDMI0_CLKN HDMI0_CLKP HDMI0_SCL HDMI0_SDA
2
DM_P0 DP_P0 DM_P1 DP_P1
R69 10R
R82 1k
1
HDMI1_5V
1
HDMI0_HPDIN
HDMI0_RX2P
2
R10 1k2
R62 10R
1
3
B
6
CN5
21 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
HDMI1
A
5
HDMI0_5V
VESTEL PROJECT NAME : 17mb95-2
T. SHT:10
SCH NAME :01_HDMI_GPIO_PROT DRAWN BY :
2
3
4
5
6
7
A3
26-06-2012_15:33
8
AX M
1
2
3
1V5_VCC
4
5
6
7
8
1V5_VCC
DDR0_VREFCA
C257 100nF 16V
DDR1_VREFDQ
1k R408
C258 100nF 16V
C259 100nF 16V
C260 100nF 16V
C261 100nF 16V
C262 100nF 16V
C264 100nF 16V
C265 100nF 16V
C266 100nF 16V
C268 100nF 16V
C248 100nF 16V
C249 100nF 16V
C250 100nF 16V
C251 100nF 16V
C252 100nF 16V
C253 100nF 16V
C254 100nF 16V
C255 100nF 16V
C256 100nF 16V
C279 100nF 16V
C280 100nF 16V
C281 100nF 16V
C282 100nF 16V
C283 100nF 16V
C284 100nF 16V
C285 100nF 16V
C286 100nF 16V
C287 100nF 16V
C269 100nF 16V
C270 100nF 16V
C271 100nF 16V
C272 100nF 16V
C273 100nF 16V
C274 100nF 16V
C275 100nF 16V
C276 100nF 16V
C277 100nF 16V
1V5_DDR0
1V5_VCC
1nF 50V
100nF 16V C322
C246
F12 R409 1k
1nF 50V
100nF 16V C323
A
C247
R411 1k
1k R410
60R
C213 10uF 10V
1V5_VCC
A
1V5_VCC DDR0_VREFDQ DDR1_VREFCA 1nF 50V
100nF 16V C324
R412 1k
C263
1k R413
1nF 50V
100nF 16V C325
C267
R415 1k
1k R414
C278 100nF 16V
F13
1V5_DDR1
1V5_VCC 60R
PL1
GROUND TERMINALS
C214 10uF 10V
B
RESET ZQ
DQSU_1 DQSU_0
B7 C7
DML DMU
E7 D3
DDR0_DML DDR0_DMU
ODT
K1
DDR0_ODT
DDR0_DQSUB DDR0_DQSU
A12 B12 C12 E15 A21 E14 F13 B15 E13 F11 B16 C17 A17 B19 C18 B18 A18
A_DDR3_CASZ A_DDR3_RASZ A_DDR3_WEZ A_DDR3_DML A_DDR3_DMU A_DDR3_ODT A_DDR3_BA0 A_DDR3_BA1 A_DDR3_BA2 A_DDR3_RESET A_DDR3_CKE A_DDR3_MCLK A_DDR3_MCLKZ A_DDR3_DQSL A_DDR3_DQSLB A_DDR3_DQSU A_DDR3_DQSUB
B_DDR3_CASZ B_DDR3_RASZ B_DDR3_WEZ B_DDR3_DML B_DDR3_DMU B_DDR3_ODT B_DDR3_BA0 B_DDR3_BA1 B_DDR3_BA2 B_DDR3_RESET B_DDR3_CKE B_DDR3_MCLK B_DDR3_MCLKZ B_DDR3_DQSL B_DDR3_DQSLB B_DDR3_DQSU B_DDR3_DQSUB
B24 B25 A24 H24 L20 D20 G20 F24 F20 E20 F25 G25 G23 K24 K25 J21 J20
DDR1_CASB DDR1_RASB DDR1_WEB DDR1_DML DDR1_DMU DDR1_ODT DDR1_BA0 DDR1_BA1 DDR1_BA2 DDR1_RESETB DDR1_CKE DDR1_CK DDR1_CKB DDR1_DQSL DDR1_DQSLB DDR1_DQSU DDR1_DQSUB
B2 D9 G7 K2 K8 N1 N9 R1 R9
DDR0_CASB DDR0_RASB DDR0_WEB DDR0_DML DDR0_DMU DDR0_ODT DDR0_BA0 DDR0_BA1 DDR0_BA2 DDR0_RESETB DDR0_CKE DDR0_CK DDR0_CKB DDR0_DQSL DDR0_DQSLB DDR0_DQSU DDR0_DQSUB
M2 N8 M3
BA0 BA1 BA2
J7 K7
CK_0 CK_1
K9
CKE
L2
CS
DDR1_RASB DDR1_CASB DDR1_WEB
J3 K3 L3
RAS CAS WE
DDR1_RESETB R421 240R
T2 L8
RESET ZQ
DDR1_BA0 DDR1_BA1 DDR1_BA2
DDR1_CKE
A1 A8 C1 C9 D2 E9 F1 H2 H9
DDR1_DQU0 DDR1_DQU1 DDR1_DQU2 DDR1_DQU3 DDR1_DQU4 DDR1_DQU5 DDR1_DQU6 DDR1_DQU7
NC1 NC2 NC3 NC4 NC5 NC6
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
G21 L22 H22 K20 H20 L21 H21 K21
J1 L1 M7 L9 T7 J9
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
DDR0_DQSL DDR0_DQSLB
B_DDR3_DQU0 B_DDR3_DQU1 B_DDR3_DQU2 B_DDR3_DQU3 B_DDR3_DQU4 B_DDR3_DQU5 B_DDR3_DQU6 B_DDR3_DQU7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13
DDR1_CK
F3 G3
A_DDR3_DQU0 A_DDR3_DQU1 A_DDR3_DQU2 A_DDR3_DQU3 A_DDR3_DQU4 A_DDR3_DQU5 A_DDR3_DQU6 A_DDR3_DQU7
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
DDR1_A00 DDR1_A01 DDR1_A02 DDR1_A03 DDR1_A04 DDR1_A05 DDR1_A06 DDR1_A07 DDR1_A08 DDR1_A09 DDR1_A10 DDR1_A11 DDR1_A12 DDR1_A13
DDR1_CKB
DQSL_0 DQSL_1
G16 B20 F16 C21 E16 A20 D16 C20
DDR0_DQU0 DDR0_DQU1 DDR0_DQU2 DDR0_DQU3 DDR0_DQU4 DDR0_DQU5 DDR0_DQU6 DDR0_DQU7
PL2
U8 H5TQ2G63BFR-PB
C VREF_DQ VREF_CA
H1 M8
DDR1_VREFDQ DDR1_VREFCA
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E3 F7 F2 F8 H3 H8 G2 H7
DDR1_DQL0 DDR1_DQL1 DDR1_DQL2 DDR1_DQL3 DDR1_DQL4 DDR1_DQL5 DDR1_DQL6 DDR1_DQL7
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
D7 C3 C8 C2 A7 A2 B8 A3
DDR1_DQU0 DDR1_DQU1 DDR1_DQU2 DDR1_DQU3 DDR1_DQU4 DDR1_DQU5 DDR1_DQU6 DDR1_DQU7
DQSL_0 DQSL_1
F3 G3
DDR1_DQSL DDR1_DQSLB
DQSU_1 DQSU_0
B7 C7
DDR1_DQSUB DDR1_DQSU
DML DMU
E7 D3
DDR1_DML DDR1_DMU
ODT
K1
DDR1_ODT
D
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
DDR0_RESETB R418 240R
T2 L8
DDR0_DQU0 DDR0_DQU1 DDR0_DQU2 DDR0_DQU3 DDR0_DQU4 DDR0_DQU5 DDR0_DQU6 DDR0_DQU7
PL3
E
B1 B9 D1 D8 E2 E8 F9 G1 G9
RAS CAS WE
D7 C3 C8 C2 A7 A2 B8 A3
DDR1_DQL0 DDR1_DQL1 DDR1_DQL2 DDR1_DQL3 DDR1_DQL4 DDR1_DQL5 DDR1_DQL6 DDR1_DQL7
DDR3
DDR1_A00 DDR1_A01 DDR1_A02 DDR1_A03 DDR1_A04 DDR1_A05 DDR1_A06 DDR1_A07 DDR1_A08 DDR1_A09 DDR1_A10 DDR1_A11 DDR1_A12 DDR1_A13
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12
DDR0_RASB DDR0_CASB DDR0_WEB
DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7
L23 J24 L24 J23 M24 H23 M23 K23
D17 G15 B21 F15 B22 F14 A22 D15
DDR0_A13
1
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
CS
J3 K3 L3
DDR0_DQL0 DDR0_DQL1 DDR0_DQL2 DDR0_DQL3 DDR0_DQL4 DDR0_DQL5 DDR0_DQL6 DDR0_DQL7
B_DDR3_DQL0 B_DDR3_DQL1 B_DDR3_DQL2 B_DDR3_DQL3 B_DDR3_DQL4 B_DDR3_DQL5 B_DDR3_DQL6 B_DDR3_DQL7
DDR0_DQL0 DDR0_DQL1 DDR0_DQL2 DDR0_DQL3 DDR0_DQL4 DDR0_DQL5 DDR0_DQL6 DDR0_DQL7
A1 A8 C1 C9 D2 E9 F1 H2 H9
CKE
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
E
K9 L2
10nF 16V
C342
R321 56R R322 56R
DDR0_CKE
CK_0 CK_1
DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7
E3 F7 F2 F8 H3 H8 G2 H7
A_DDR3_DQL0 A_DDR3_DQL1 A_DDR3_DQL2 A_DDR3_DQL3 A_DDR3_DQL4 A_DDR3_DQL5 A_DDR3_DQL6 A_DDR3_DQL7
A_DDR3_A0 A_DDR3_A1 A_DDR3_A2 A_DDR3_A3 A_DDR3_A4 A_DDR3_A5 A_DDR3_A6 A_DDR3_A7 A_DDR3_A8 A_DDR3_A9 A_DDR3_A10 A_DDR3_A11 A_DDR3_A12 A_DDR3_A13 A_DDR3_A14
10nF 16V
J7 K7
BA0 BA1 BA2
DDR0_VREFDQ DDR0_VREFCA
B23 D25 F22 G22 E24 F21 E23 D22 D24 D21 C24 C25 F23 E21 D23
A11 C14 B11 F12 C15 E12 A14 D11 B14 D12 C16 C13 A15 E11 B13
R323 56R R324 56R
M2 N8 M3
U7 H5TQ2G63BFR-PB
H1 M8
B_DDR3_A0 B_DDR3_A1 B_DDR3_A2 B_DDR3_A3 B_DDR3_A4 B_DDR3_A5 B_DDR3_A6 B_DDR3_A7 B_DDR3_A8 B_DDR3_A9 B_DDR3_A10 B_DDR3_A11 B_DDR3_A12 B_DDR3_A13 B_DDR3_A14
DDR0_A00 DDR0_A01 DDR0_A02 DDR0_A03 DDR0_A04 DDR0_A05 DDR0_A06 DDR0_A07 DDR0_A08 DDR0_A09 DDR0_A10 DDR0_A11 DDR0_A12
B
1V5_DDR1
C343
NC1 NC2 NC3 NC4 NC5 NC6
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9
J1 L1 M7 L9 T7 J9
VREF_DQ VREF_CA
VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
DDR0_BA0 DDR0_BA1 DDR0_BA2
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13
B1 B9 D1 D8 E2 E8 F9 G1 G9
DDR0_CK
DDR0_CKB
D
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12
DDR0_A00 DDR0_A01 DDR0_A02 DDR0_A03 DDR0_A04 DDR0_A05 DDR0_A06 DDR0_A07 DDR0_A08 DDR0_A09 DDR0_A10 DDR0_A11 DDR0_A12 DDR0_A13
C
U4 MSD8WB9BX
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
B2 D9 G7 K2 K8 N1 N9 R1 R9
1V5_DDR0
PL4
F
F
VESTEL PROJECT NAME : 17mb95
T. SHT:10
SCH NAME :02_MSTAR_DDR3 DRAWN BY :ALP KIRAZ-BARAN ÇUBUKÇU
1
2
3
4
5
6
7
A3 06-04-2012_10:54
8
AX M
NC6
I/O6
43
7
NAND_RBZ
8
NAND_REZ
9
NAND_CEZ
10 11 12
3V3_NAND
13
B
14
NAND_CLE NAND_ALE NAND_WEZ NAND_WPZ
I/O5
42
R
I/O4
41
E
NC25
40
NC7
NC24
39
NC8
NC23
38
VDD2
37
U13 VDD1
NAND128-A VSS1
VSS2
36
NC9
NC22
35
15
NC10
NC21
34
16
CL
NC20
33
17
AL
I/O3
32
18
W
I/O2
31
19
WP
I/O1
30
20
NC11
I/O0
29
21
NC12
NC19
28
22
NC13
NC18
27
23
C
RB
24
NC14 NC15
NC17 NC16
CI/NAND
PCM_NAND_D6
4 PCM_NAND_D5
U4 MSD8WB9BX
PCM_NAND_D4
3V3_NAND
R879 75R R878 75R R877 75R R876 75R
PCM_NAND_D3
3V3_STBY
25
3V3_NAND C292 100nF FLASH_WP 16V
PCMIRQA PCMOE PCMIORD PCMCE PCMWE PCMCD2 PCMRST PCMREG PCMIOWR PCMWAIT
5V_VCC
3V3_STBY D5 C98
60R
C3 10uF 10V
2
1
CI_PWR C99 C100 100nF 100nF 10V 10V 2
100nF 10V
1 2 3 4
CS# SO WP# GND
VCC HOLD# SCLK SI
8 7 6 5
R808 4k7 1
TP117
12V_VCC
R316 47k
1
2
R317 47k
CI_PWR_CTRL
R509 33R TP110
1
R242 10k
TP109
1
PCMA3
3 R3 6
PCM_A3
PCMREG
4 R4 5
PCM_REG
F
R580 33R 8 R1
3V3_VCC PCM_A14
PCMA13
3 R3 6
PCM_A13
PCMA8
4 R4 5
PCMA9
R582 33R 1 8 R1
PCM_A9
TS0_CLK
PCMIOWR
2 R2 7
PCM_IOWR
PCM_WAIT
PCMA11
3 R3 6
PCM_A11
PCMOE
4 R4 5
PCM_OE
PCMIORD
R581 33R 1 8 R1
PCMA10
2 R2 7
PCM_A10
PCMCE
3 R3 6
PCM_CE
PCM_A2
PCM_WAIT
PCMA4
2 R2 7
PCM_A4
PCMA5
3 R3 6
PCM_A5
PCMRST
4 R4 5
PCM_RST PCMNANDD7
4 R4 5
R169 47R R170 47R
SHLD2
PCM_A8
50V
TS1_D4 TS1_D5 TS1_D6 TS1_D7 PCM_RST
CI_PWR PCM_IORD
2 1
100nF 10V
C103 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
TS1_SYNC TS1_D0 TS1_D1 TS1_D2 TS1_D3 CI_PWR
PCM_REG TS0_VLD TS0_SYNC TS0_D0 TS0_D1 TS0_D2
PCM_CD2
R590 33R 1 R1
TS0_D3
TS0D4
7 R2 2
TS0_D4
TS0D5
6 R3 3
TS0_D5
TS0D6
5 R4 4
TS0_D6
TS0D3
8
C
TS1D5 TS0VLD
7 R2 2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
TS1_D5 TS0_VLD TS0D7
6 R3 3
TS1_D7
5 R4 4
8
R589 33R 1 R1
TS0_D7
TS1SYNC
7 R2 2
TS1_SYNC
TS1D0
6 R3 3
TS1_D0
TS1D1
5 R4 4
TS1_D1
R588 33R 1 R1
TS1_D2
TS1_D6
R587 33R 1 R1
8
8
D
TS0_SYNC
TS1D2
TS0_D0
TS1D3
7 R2 2
TS1_D3
TS1D4
6 R3 3
TS1_D4
TS1VLD
5 R4 4
TS1_VLD
TS1_D[0] TS1_D[1] TS1_D[2] TS1_D[3] TS1_D[4] TS1_D[5] TS1_D[6] TS1_D[7] TS1_CLK TS1_VLD TS1_SYNC
AC14 AD14 AE14 AD15 AC15 AD16 AD17 AC17 AC16 AE15 AD13
TS1D0 TS1D1 TS1D2 TS1D3 TS1D4 TS1D5 TS1D6 TS1D7 TS1CLK TS1VLD TS1SYNC
TS0_D[0] TS0_D[1] TS0_D[2] TS0_D[3] TS0_D[4] TS0_D[5] TS0_D[6] TS0_D[7] TS0_CLK TS0_VLD TS0_SYNC
Y16 AA17 AA16 Y13 AA13 AA14 AB14 AA15 AB15 Y15 Y14
TS0D0 TS0D1 TS0D2 TS0D3 TS0D4 TS0D5 TS0D6 TS0D7 TS0CLK TS0VLD TS0SYNC
RESET PCM_NAND_D3 PCM_NAND_D4 PCM_NAND_D5 PCM_NAND_D6 PCM_NAND_D7 PCM_CE PCM_A10 PCM_OE PCM_A11 PCM_A9 PCM_A8 PCM_A13 PCM_A14 PCM_WE
2
1
C102 100nF 10V
TS0D0
7 R2 2
TS0D1
6 R3 3
TS0D2
5 R4 4
TS0_D1 TS0_D2
TP211 RESET
2
CI_PWR
100R R361
1
N5
RESET
AE3 AE2
XIN XOUT
G4
IRIN
24MHz
PCM_IRQA CI_PWR
3 4
2 1 X10
IR_IN
S65 2
100R R362
1
D36 1
TS1_VLD R150 4k7 4k7 R151
TS1_CLK 3V3_STBY 3V3_STBY
PCM_A12 50V PCM_A7 PCM_A6 nc PCM_A5 PCM_A4 PCM_A3 PCM_A2 PCM_A1 PCM_A0 PCM_NAND_D0 PCM_NAND_D1 PCM_NAND_D2 4k7 CI_PWR R320
8 2
U4 MSD8WB9BX
C5V6
UART-RX-SC UART-TX-SC
P5 R4 R23 P24
DDCA_CK/UART0_RX DDCA_DA/UART0_TX UART3_RX/GPIO64 UART3_TX/GPIO65
R24 R25
DDCR_CK DDCR_DA
TP209 TP210 SYS_SCL SYS_SDA
F
PCM_NAND_D7
3V3_VCC
DRAWN BY :ALP KIRAZ-BARAN ÇUBUKÇU
3
4
5
6
7
A3 T. SHT:10
SCH NAME :03_CI_ETH_NAND
2
E
3V3_VCC
VESTEL PROJECT NAME : 17mb95 1
B
1
PCMA2
1
PCM_WE
4k7 R716 4k7 R735
C37810pF
2 R2 7
PCMWAIT
PCM_IORD PCM_IOWR 3V3_VCC
PCMA14
PCM_A1
14
1uFC127
510R R137
4k7 R156
PCMA1
R579 33R 8 R1
4k7 R76 4k7 R184
3V3_VCC
2 R2 7
PCM_NAND_D3
SHLD1
A
2
1
PCM_A12
R503 33R TS0_D3 TS0_D4 TS0_D5 TS0_D6 TS0_D7
R244 10k
4 R4 5
PCMNANDD3
4 R4 5
PCM_A7
R155 4k7
E
YL-
13
R585 33R 8 1 R1
1
PCM_NAND_D4
YL+
12
C20ETH_YEL 100nF 16V
TS1_CLK
R157 4k7
3 R3 6
PCM_IRQA
PCMA12
PCMWE
GR-
11
510R R134
TP32
R504 33R
2
PCMNANDD4
PCMIRQA
3 R3 6
PCM_CD1
R395 1M
PCM_NAND_D5
GR+
10
TS1CLK
TS0SYNC
50V
2 R2 7
PCMA7
2 R2 7
PCM_A6
CN9
C390 33pF 50V
PCMNANDD5
PCMA6
R584 33R 1 8 R1
R583 33R 1 8 R1
NC2
9
100nF 16V ETH_GRN
TS0_CLK
TS1D7
C394 22uF 16V
33pFC391
PCM_NAND_D6
PCM_A0
PCM_CD2
D3 R245 10k
PCMNANDD6
R578 33R 1 8 R1
PCM_NAND_D0
NC1
8
Place these resistors close to MSTAR C22
R331 1k
1N4148
4 R4 5
RCT
7
50V
12pF
PCMA0
PCM_NAND_D1
RD-
6
1
RESET
SPI_DI
R154 4k7
PCMNANDD0
3 R3 6
5
TD+
1
C392
PCMNANDD1
2 R2 7
PCM_NAND_D2
RD+
ETH_RXN
Q31 BC847B
2
2
SPI_CLK
R243 10k
PCMNANDD2
R577 33R 1 8 R1
4
R586 33R
2
3V3_VCC
D
ETH_RXP
3
R508 33R
R152 4k7
1
3V3_STBY R510 33R
TCT
TS0CLK
TS1D6
PCMCD2
TD-
3
16V
1N5819
U10 MX25L512
TP115 TP116 R505 33R
3V3_STBY
2
C44810pF
R507 33R R506 33R
3V3_VCC
ETH_TXN
F52
F15
SPI_DO
22uF C291 100nF C210 16V 6V3
Y19 AD20 AC19 AB18 AD21 AB19 T21 AA20 Y18 U21
MSTAR SPI FLASH
PCM_NAND_D0
1
60R PCM_IRQA_N PCM_OE_N PCM_IORD_N PCM_CE_N PCM_WE_N PCM_CD_N PCM_RST PCM_REG_N PCM_IOWR_N PCM_WAIT_N
CN10
ETH_TXP
2V5_VCC
PCM_NAND_D1
SPI_CS
60R
SPI_CK SPI_DI SPI_DO TEST1 SPI_CZ
PCM_NAND_D2
26
F51
A2 B2 B1 C2 C1
SPI_CLK SPI_DI SPI_DO
PCMA0 PCMA1 PCMA2 PCMA3 PCMA4 PCMA5 PCMA6 PCMA7 PCMA8 PCMA9 PCMA10 PCMA11 PCMA12 PCMA13 PCMA14
8 C21 100nF 16V
R171 47R R172 47R
6
AA21 Y22 R20 W19 T20 AA22 V21 AB16 W22 AE20 AD19 AB17 AB20 AC20 AE21
PCM_A[0] PCM_A[1] PCM_A[2] PCM_A[3] PCM_A[4] PCM_A[5] PCM_A[6] PCM_A[7] PCM_A[8] PCM_A[9] PCM_A[10] PCM_A[11] PCM_A[12] PCM_A[13] PCM_A[14]
PCM_NAND_D7
7 Place these resistors close to MSTAR
10pFC451
44
50V
I/O7
TP64
NC5
1
5
R883 75R R882 75R R881 75R R880 75R
Place these capacitors close to transformer speed nets, except for the chassis ground. Also keep traces short and route as matched length differential pairs. Do not place any parts or traces under the transformer.
C149
45
6V3 220uF
NC26
1
NC4
3
4
2
46
C1197 10uF C101 10V 100nF 10V
NC27
Q30 BSH103
NC3
1
3
2
47
C4
NC28
6
PCMNANDD0 PCMNANDD1 PCMNANDD2 PCMNANDD3 PCMNANDD4 PCMNANDD5 PCMNANDD6 PCMNANDD7
6V3
NC2
5
V20 AD22 AB21 AE17 AC18 AE18 AA19 AD18
PCM_D[0]/NF_AD[0] PCM_D[1]/NF_AD[1] PCM_D[2]/NF_AD[2] PCM_D[3]/NF_AD[3] PCM_D[4]/NF_AD[4] PCM_D[5]/NF_AD[5] PCM_D[6]/NF_AD[6] PCM_D[7]/NF_AD[7]
NF_ALE NF_WPZ NF_CEZ NF_CLE NF_REZ NF_WEZ NF_RBZ NF_CEZ1
22uF
2
R21 W20 Y20 AC21 P21 P22 Y21 P20
NAND_ALE NAND_WPZ NAND_CEZ NAND_CLE NAND_REZ NAND_WEZ NAND_RBZ
TP113
48
10k R240
NC29
3V3_STBY
NC1
4
R153 4k7 TP114
R574 3k9
A
1
3
Ethernet lines must be 100ohm differential
2
3V3_NAND
1
03-04-2012_10:24
8
AX M
AVDD_SAR
AVDD33_ADC
EXT_RESET
1V2_VDD
C
3V3_VDDP S76 16V 100nF
GND_2
SPI_CLK_T2
16
TS_CLK
TS_ERR 15
TS_DATA[7]
14
13
TS_DATA[6]
TS_DATA[5]
12
11
TS_DATA[4] 10
VDDC_0
SPI_DI_T2
C2
34
33 AVDD_33_0
GND_6
SAR_RSSI
35
36
37 QM
QP
38
1k
1k F211 IM
39
F210 40 IP
41 GND_7
42 AVDD_25 VDDP_0
GND_1
9
8
nc
12pF
R1 1 33R R592 TS1_D7
TS1_CLK C393
7 R2 2
33R R525
8
6 R3 3
1V2_VDD
TS1_D6
C144 1n2F 50V
C153 1n2F 50V
C154 1n2F 50V
50V
D
pin32 pin1
VGA_R F23
VGA_G AVDD25_ADC
60R
R609 68R
1
C222 C302 10uF 100nF 16V 10V
VGA_B VGA_G VGA_HSNC VGA_VSNC
F22 AVDD_MPLL_T2
SC_R
3V3_VCC
AVDD_SAR 60R
C221 C301 10uF 100nF 16V 10V
SC_G SC_B
F21 AVDD33_ADC 60R
C218 C298 10uF 100nF 16V 10V
C220 C300 10uF 100nF 16V 10V
PR_IN
F18
PB_IN
1V2_VCC
1V2_VDD
C105
100nF10V SPI_CLK_T2 SPI_DI_T2 TP118 TP119
C217 C297 10uF 100nF 16V 10V
C296 100nF 16V
C295 100nF 16V
C294 100nF 16V
RIN1M RIN1P GIN1M GIN1P BIN1M BIN1P SOGIN1 HSYNC1 VSYNC1
47nF 68R C200 16V47nF R600 33R C199 16V 68R R521 C201 47nF R601 33R C202 16V 68R R522 C203 47nF R602 S67 33R C204 16V R523
AA8 Y7 AA7 Y6 AB6 AA6 AA5 AB8
RIN2M RIN2P GIN2M GIN2P BIN2M BIN2P SOGIN2 HSYNC2
Y_IN
C293 100nF 16V
1nF
CVBSOUT1 CVBSOUT2
AA4 AB4
C106
IP IM
AE6 AD6
100nF 10V
VIFP VIFM
AD7 AC7
SIFP SIFM
AC8 AD8
IFAGC RFAGC
AC5 AD5
TGPIO0/GPIO73 TGPIO1/GPIO74 TGPIO2/GPIO75 TGPIO3/GPIO76
AD3 AD2 AC6 AE5
5
U4 MSD8WB9BX
VIDEO
C327
F24 3V3_VCC
3V3_VDDP 60R C223
C303 10uF 100nF 16V 10V
C304 100nF 16V
C305 100nF 16V
C306 100nF 16V
C307 100nF 16V
C308 100nF 16V
2
75R R560 1
SC_CVBS_IN SAV_CVBS SC_R DVD_CVBS
R517 33R R518 33R CVBS0_OUT S70
DIGITAL_IF_P
E C107 10V
S71 DIGITAL_IF_N
100nF
IF_AGC R364 100R
nc
TUNER_SCL TUNER_SDA R161 4k7
60R
AB2 AB1 AB3 AA1 AA3 Y2 AA2 AC3 AC4
CVBS0 CVBS1 CVBS2 CVBS3
R596 16V C188 68R 47nF R513 Y4 16V C187 33R C195 W5 47nF R520 C197 W4 33R AB5 47nF16V C198 47nF Y5
2
C368
3V3_VCC
47nF 68R C190 16V47nF R597 33R C189 16V 68R R514 C191 47nF R598 33R C192 16V 68R R515 C193 47nF R599 S68 33R C194 16V R516 C329 1nF
SC_FB
AVDD_APLL 3V3_VCC
VCOM
RIN0M RIN0P GIN0M GIN0P BIN0M BIN0P SOGIN0 HSYNC0 VSYNC0
1
C29 100nF 16V
47nF Y3 68R C186 16V47nF W2 R595 33R C196 16V W1 68R R519 C185 47nF W3 R594 33R C184 16V V2 68R R512 C183 47nF V3 R593 S66 33R C182 16V V1 R511 AC1 C326 1nF AC2 50V
OPTIONAL
pin10
1
pin19
75R R556 75R R557 75R R558 R332 4k7
AVDD_33_1
IF_P_T2
IF_N_T2
50V
X11 4
7 3V3_VDDP
TS1_D5
C164 100nF
1
U11 MX25L512
SPI_DO_T2
2
pin20
6V3
22uF
TP120
TP121
6V3 1uF TP123 TP122
C175
10k R247
D14
SPI_CS_T2
3V3_VCC_SI
pin4
Y_IN 1N5819
B
TP65
C165 100nF 16V
2V5_VCC 100R R407
3V3_VDDP
4k7 R162
S75
60R
33R R524
33R R526 33R R527
5 R4 4
C163 4n7F 50V
F19
FLASH_WP_T2
GPIO[3]
1V2_VDD
F
2
1
3V3_VCC
F
43
RESETZ
17
SC_CVBS_IN
8 7 6 5
AVDD_33_2
18
TS_DATA[3]
VDDP_1
TS1_D4
C157 1n2F 50V
C299 10uF 100nF 16V 10V
VCC HOLD# SCLK SI
44
I2CS_SDA
TS1_D3
pin14
60R C219
CS# SO WP# GND
XOUT
63
TS_DATA[2]
19
3V3_VDDP
2
F20
1 2 3 4
AVDD_MPLL_T2 AVDD25_ADC
2 1
GND_3
4 R4 5
F68 60R
3V3_VCC
3V3_VCC SPI_CS_T2 SPI_DO_T2
3 4
I2CS_SCL
3 R3 6
3V3_VCC_TUNER 1
E
R159 4k7
45
62
3V3_VCC_TUNER
2
T2 DEMOD SPI FLASH
XIN
20
TS_DATA[1]
VDDC_1
TS1_D2
C155 1n2F 50V
46
GND_12
1V8_VCC_SI C156 1n2F 50V
GND_8
48
21
FLASH_WP_T2
OPTIONAL RESISTORS 2
C440 100uF 6V3
4
GND_4
61
1
2
VOUT
1
VDDP_6
TS1_VLD 2
2
R606 47R
R604 100R
ADJ
GPIO_1
60
TS1_SYNC
C15 100nF 16V
1
60R
C624
5V_VCC
2
10uF 10V
U6 LM1117 TP112 3 IN OUT 2
F165
VDDC_4
22
S80
2
1
1
T2 DEMOD
59
64
10k R252
S82
1
D
23
2 R2 7
3V3_VCC
1
4
SPI_CLK
TS1_D1
R379 47R R380 47R
8
7
6
5
4
3
1V8_VCC_SI 1
24
D_IF_AGC
NC:1100000(R:1,W:0) S69 3V3_VCC_SI
1V8_VCC_TUNER C435 100uF 6V3
VOUT
2
ADJ
SPI_DI
U17 MSB1231
1
R603 100R
60R
6V3 C449
3V3_VCC
10uF
U14 LM1117 TP111 3 IN OUT 2
SPI_DO
25
TS_DATA[0]
1V2_VDD 3V3_VDDP
1V8_VCC_TUNER 60R
2
26
NC
DIGITAL_IF_N
F65
F164
SPI_CZ
3
ALIF_N
3V3_VCC_SI 9 R73 470R
1
1
I2CM_SDA
TS1_D0
10
S98
IF_AGC_T2
TUNER_SDA
12pF C10
GPIO_2
TS_VLD
VDD_H
R308 470R
S92
S89
I2CM_SCL
27
2
1
ALIF_P
11
3V3_VCC_SI
TUNER_SDA
54
GND_11
12
TUNER_SCL 12pF
28
58
DLIF_N
S213
DIGITAL_IF_P C158
XTAL_O
XTAL_I
VDD_H1
VDD_H2
RF_SHLD
RF_IN
RF_IP 2
1
C6
S83
VDDP_2
IF_AGC
S99
TUNER_SCL
C
VDDP_5
1
VDD_IO
53
S74
2
3V3_VCC_SI
29
1
32
GND_5
RF_AGC
1V8_VCC_SI
31
VDDC_2
57
13
VDDP_3
GND_10
56
VDD_L
32
VDDC_3
55
DLIF_P
GPIO[11]
52
15 14
A
30
BCLK
100nF 10V
GND4
VDDP_4
8
51
XOUT
750R
31
50
16
R312 820R
RSTB
R196 10k
R187 33R
DLIF_AGC
30
ALIF_AGC
C1
U18 SI2156
ADDR
INTB
GND
29
3V3_VDDP
GPIO[0]
2
17
1V2_VDD
49
R591 33R 1 8 R1
Close To Concept IC Close To SI2156
TUNER
VDD_D
GPIO
SDA
GND3
28
RF_SHLD1
GND2
27
SCL
TUNER_RST
26
VDD_S
50V 12pF
GND1
10k R251 3V3_VDDP
GND_9
3V3_VCC
TS_SYNC
D_IF_AGC
47
I2C Address**pin49 High : D2 Low : F2
AVDD_33_3
IF_AGC
C159
16V 22nF
3V3_VCC_SI
3 4 X1
18
3V3_VCC_SI
2 1
IF_AGC_T2 R797 9k1
R307 100R
S100
IF_AGC
24 MHz 27MHz CRYSTAL
19
20
21
RF_IN_N 22
23
24
RF_IN_P
220nH
1k R333
S77
C110
60R
100nF 10V
3V3_VCC
AVDD_APLL
F86
RF_IN_N L6
30067048
25
24MHz
S84
6
180R
IF_N_T2 100nF10V
3
F67 4
DIGITAL_IF_N
SH1
B
7
IF_P_T2
RF_IN_P S87
120pF 50V
2
270nH
L4 C112
1
L1
A
S72
100nF10V C108
C162
120pF 50V
2
47pF 50V 390nH
3
D8
4
ESD0P8RFL
JK11
S73 DIGITAL_IF_P
L5 1
C113
6
5
220nH C566
5
27pFC432
4 C109
50V
3
27pFC431
2
10V 100nF
1
3V3_VCC
C309 100nF 16V
VESTEL PROJECT NAME : 17mb95
A3 T. SHT:10
SCH NAME :04_TUNER_T2_DEMOD 3V3_VCC
DRAWN BY :ALP KIRAZ-BARAN ÇUBUKÇU
1
2
3
4
5
6
7
27-03-2012_16:58
8
AX M
1
2
3
4
5
6
7
8
5V_STBY
FS4 12V_INV
3 TP51
13
16
15
18
17
power_pin3
20
19
power_pin1
FB2
7A/32VDC
DIMMING
14
!
4 BACKLIGHT_ON/OFF DIMMING
5
VIN2
R101 560R
BACKLIGHT_ON/OFF
C473
4n7F 50V
R646 20k FB3
C1212
18
C1206 47nF 16V 4n7F 50V
19
36
L38
F1
GND_2
35
LX2_1
VIN_2
34
VIN2
VIN_1
33
C463 10uF 16V
C1191 10uF 16V
VIN_0
R645 120k C480 4n7F 50V
2
12V_VCC
1
AGND
31 C1189 C1190 10uF 16V 10uF 16V
30
V3V 29
GND_1
FB3
C488 10uF 16V
NC 5
D20
6
5
4 1
FDC642P Q32
D
R174 47R
5V_VCC SW2
1
2
2
1
R217 33k
2
220nF
C135
1
1
2
R35 2k2
30049469 1.13k R34 1k2
3
2
1
Q6
R41 1k
12V_INV 2
Q19 BC848B
C5 220nF 10V
12V_STBY
6 FDC642P Q29
1
VBST 7
3 VREG5
SSW 6
4 VSS
GND 5
VFB R38 22k 2
5V_VCC
C92 16V 100nF
2
F7 60R
L3 10uH 1
2
1
2
R215 33k
60R F62 1
R173 47R
2
1
3
R15 4k7 F14
2
R96 120k
R216 33k
22pF 50V
1
C55 100nF 16V
1
TPS54528
C128 1uF 16V
C139 C130 22uF 16V
2
2
C131 22uF 16V
VIN 8
U9
7A/32VDC 4A
0R
1
2 VFB
FS2 12V_VCC
12V_STBY
1
1
E
S10 5
60R
1 EN VFB
DC/DC4
2
1
12V_STBY
2
Q22 BC848B
1
12V_VCC SW1
2
TP36
R49 10k 10k R48
TPS_ENABLE
FS1
STBY_ON/OFF_NOT
R47 10k
220nF 25V
6
!
2
2
2
MOSFET_CONTROL
C134
1
12V_VCC
12V_VCC 12V_STBY
STBY_ON/OFF
4
F4
2
2
S15
F3
FDC642P Q28 1
2
3 R36 22k
R37 22k
4
5
6
1
R44 10k
2
R176 10k R284 3k9 R282 10k
5V_STBY
60R C133
6
Q46 BC848B
7A/32VDC
1
F
Q44 FDC642P
1
1
1
12V_STBY
R164 10k
1
1
2 5
4 3
2
1
TP48
2 TP34
10k R163 2k2 R77
BC848B 10k R884
1
60R
3 TP35
25V
2
F10 1
2
60R
MOSFET_CONTROL
2
R46 10k
Q21 BC848B
1
F
TPS54528
VESTEL PROJECT NAME : 17mb95
BC848B
DRAWN BY :ALP KIRAZ-BARAN ÇUBUKÇU
2
3
4
5
6
7
A3 T. SHT:10
SCH NAME :05_POWER
1
5V_VCC C138 220uF 6V3 nc
TP89
TPS_ENABLE
12V_STBY
4 JK2
2
FDC642P Q27
5
4 3
4
6 Q43 FDC642P
TP33
5
ADAPTER SOCKET
5
R198 10k Q11 BC848B
3
22uF 6V3
Q47
2
W_ADAPTER
STBY_ON/OFF
2
3V3_VCC
5V_STBY
E
C5V6
TP107
STBY_ON/OFF_NOT
R197 10k
C137 220uF 6V3
R42 1k
4 VCNTL C224 10uF 10V
1V26_VCC
NC 5
TP108
1
22uF 6V3
1
4 VCNTL C151 10uF 10V
1
2V5_VCC
C132 22uF 6V3
S88
S6
1
5V_STBY
8n2F 50V
2
VOUT 6
2
MOSFET_CONTROL
3V3_STBY
C129
C225
60R F173 5V_VCC
3 VIN
5V_VCC
R1
100nF 10V
VOUT 6
STBY_ON/OFF_NOT
22uF 6V3
2
F63
R1
100nF 10V
3 VIN
22uF
2
C152
C1228
1
FB 7
APL5910
1
FB 7
APL5910
S90
R288 100R
2
3V3_VCC
2 EN
3V3_VCC
60R
U5 2 EN
1
R139 10k
2
F66
R812 10k
R45 10k
2
5V_VCC
R2
1
1
C117
PROTECT
C
STBY_ON/OFF
R290 22k R289 47k
GND 8
C25
1V5_VCC
U15
1
10uF 10V
60R
R165 4k7
GND 8
R2
1 POK
6V3
2
1 POK
R811 47k R250 33k
22uF 6V3
D
1V25_VCC
C1198
S79
C24
LDO3 W/SAT
PROTECT
5V_VCC
S81
S91
2V5_VCC
R652 220R
C30 4u7F 10V
NC
LDO2
B
TP52
TP37 TP50
32
F58 V7V
EN2
20
3V3_VCC
2
TP90
VOUT3 60R
BST2
60R
1
4u7H
2
C206
37
LX3_0
R167 5k6
17
LX3_1
4n7F 50V
RLIM3
2 SS3
4
5
3 CMP3
SS1
1
12V_VCC
R257 10k
LX2_0
50V 4n7F
6
16
TPS65251 U19
28
DC/DC2
TP38 2
1
4k7 R335
5V_VCC
VIN3
60R 2
1
9 11
LX1_1
1
10 12
R651 7k5
5V_VCC 12V_STBY
15
27
12V_VCC
C461 10uF 16V
C1188 10uF 16V
LX1_0
FB2
S86
14
20k R648
S5
C1211
1V5_DDR0
!
CN8
12V_STBY
38
2
7
13
VIN3
60R
5
8
INVERTER SOCKET
40
F60
F59
6
24V_VCC_AU
39
VIN1
12V_VCC
3V3_VCC
R256 10k
3
1
C
6V3 22uF
VOUT2
BST3
C483
60R
4u7H
C479
4
12V_STBY
1V5_VCC
1
50V 4n7F
3V3_VCC 3V3_STBY
L40
BST
21
power cable
CN2 2
TP106
12
16V 47nF C207
L39 10uH
EN3
C205
2
1V2_VCC TP105
11
22
22uF 6V3
B
C1210
VOUT1
24V_VCC_AU
C1209
12V_VCC
S8
C1208
EN1
6V3 22uF
F53 1
9
10 S85
16V 47nF
RLIM1
VIN1
VDDC
C460 10uF 16V
SS2
R255 10k
C478
50V 4n7F
STBY_ON/OFF_NOT
C1187 10uF 16V
RLIM2
S32
6V3 22uF
CN3
STBY_ON/OFF
FB3
1
power_pin3 nc power_pin1 S25
PGOOD
2
BACKLIGHT_ON/OFF S33
S216
3
DC/DC3
50V 4n7F
PROTECT
5
4
6
6
C1207 FB1
SYNC
DIMMING
50V 4n7F C472 R644 120k
GND_0
7
C475 R394 100k
26
8
50V 4n7F
ROSC
5V_STBY
3V3_STBY
LOW_P
9
1
25
10
4
7
12V_STBY
1
FB1
5V_VCC
FB2
11
50V 4n7F
24
12
A
DC/DC1
R822 560R
8
5V_VCC
C119 100nF 10V
2
CMP1
12V_STBY
3V3_STBY
VOUT
COMP2
13
ADJ
23
14
5V_STBY
1
OUT 2
C481
12V_STBY
3 IN
FB1 R658 390k
15
24V_VCC_AU
LDO1
20k R647
TP72
50V 4n7F
3V3_VCC
R821 18k
16
17
C1214
3V3_STBY
AP2111 ???
U21 LM1117
22uF 6V3
A
18
30069495
22uF 6V3
3V3_VCC
19
C1213
20
C477
BTB
06-07-2012_14:53
8
AX M
C140 100uF 16V
1
F29 1
12V_VCC
2
PANEL_VCC 6
1
5V_VCC
2
60R
2
1
CN12
MEGA_DCR_OUT
SAM BASED 30070519
2
PANEL_VCC
TX_1_0_N
TX_1_0_P
TX_1_1_N
TX_1_1_P
TX_1_2_P
TX_1_2_N
PANEL_VCC
TX_1_CLK_N
TX_1_3_N
TX_1_CLK_P
1
TX_1_3_P
TX_2_0_N
TX_2_0_P
1
FFC
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CN13
1
12V_VCC 12V_VCC
15.6" OP_PIN5
OP_PIN10
OP_PIN6
TX_1_0_N
TX_1_0_P
TX_1_1_N
TX_1_1_P
TX_1_2_N
TX_1_2_P
TX_1_CLK_N
TX_1_CLK_P
TX_1_3_N
TX_1_3_P
OP_PIN9
OP_PIN8
OP_PIN7
OP_PIN27
OP_PIN11
PANEL_VCC
PANEL_VCC
FFC
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
D8_TX_A_1_N D8_TX_A_1_P
F198 90R 4 FR1 1 3 FR2 2
TX_1_1_N TX_1_1_P
F199 90R
4 FR1 1 3 FR2 2
TX_1_2_N TX_1_2_P
F200 90R
D8_TX_A_CLK_N D8_TX_A_CLK_P
4 FR1 1 3 FR2 2
TX_1_CLK_N TX_1_CLK_P
F202 90R
D8_TX_A_3_N D8_TX_A_3_P
F
4 FR1 1 3 FR2 2
TX_1_3_N TX_1_3_P
FFC
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
D8_TX_A_1_N D8_TX_A_1_P
R855 0R 4 R1 1 3 R2 2
PANEL_VCC 1
2
2
OP_PIN43 2
S41
2
OP_PIN44
S55
2
OP_PIN45
R856 0R 4 R1 1 3 R2 2 R857 0R 4 R1 1 3 R2 2 R858 0R 4 R1 1 3 R2 2
D8_TX_A_2_N D8_TX_A_2_P
D8_TX_A_CLK_N D8_TX_A_CLK_P
D8_TX_A_3_N D8_TX_A_3_P
D8_TX_B_0_N D8_TX_B_0_P
1
2
2
1
1
D8_TX_B_0_P D8_TX_B_0_N D8_TX_B_1_P D8_TX_B_1_N D8_TX_B_2_P D8_TX_B_2_N D8_TX_B_CLK_P D8_TX_B_CLK_N D8_TX_B_3_P D8_TX_B_3_N D8_TX_B_4_P D8_TX_B_4_N
LVA0P LVA0N LVA1P LVA1N LVA2P LVA2N LVACKP LVACKN LVA3P LVA3N LVA4P LVA4N
AB25 AB23 AC25 AB24 AD25 AC24 AE24 AD24 AE23 AC23 AC22 AD23
D8_TX_A_0_P D8_TX_A_0_N D8_TX_A_1_P D8_TX_A_1_N D8_TX_A_2_P D8_TX_A_2_N D8_TX_A_CLK_P D8_TX_A_CLK_N D8_TX_A_3_P D8_TX_A_3_N D8_TX_A_4_P D8_TX_A_4_N
D8_TX_B_1_N D8_TX_B_1_P
S94 S78
1
2
2
1
C
TX_1_0_N TX_1_0_P TX_1_1_N TX_1_1_P TX_1_2_N TX_1_2_P
TP88 TP87 TP86 TP85 TP84 TP83
TX_2_0_N TX_2_0_P TX_2_1_N TX_2_1_P TX_2_2_N TX_2_2_P
TP80 TP78 TP77 TP76 TP75 TP74
TX_1_CLK_N TX_1_CLK_P
TP82 TP81
TX_2_CLK_N TX_2_CLK_P
TP79 TP73
TX_1_3_N TX_1_3_P TX_1_4_N TX_1_4_P
TP71 TP70 TP68 TP69
TX_2_3_N TX_2_3_P TX_2_4_N TX_2_4_P
TP67 TP66 TP57 TP62
D
2
3V3_VCC
TX_2_0_N TX_2_0_P
E
1
1
TX_1_1_N TX_1_1_P
100nF 16V
B
C141 1nF 50V
TX_2_1_N TX_2_1_P
MEGA_DCR_OUT
R18 4k7
1
Q34 BC858B
2 2
C124
3
2
TX_1_2_N TX_1_2_P
TX_1_CLK_N TX_1_CLK_P
D8_TX_B_2_N D8_TX_B_2_P
S96 S95
1
2
2
1
D8_TX_B_CLK_N D8_TX_B_CLK_P
S101 S97
1
TX_2_2_N TX_2_2_P
2
1
TX_2_CLK_N TX_2_CLK_P MEGA_DCR_IN
S61
1
R17 4k7
2
C123
D8_TX_B_3_N D8_TX_B_3_P
S103 S102
1
2
1
2
2
1
220pF 50V
TX_2_3_N TX_2_3_P
S7 S52
1
2
2
1
1
1
S217 S218
2
2
TX_1_4_N TX_1_4_P
D8_TX_B_4_N D8_TX_B_4_P
TX_1_4_N TX_1_4_P
S105 S104
1
1
R16 4k7
1
S220 S219
1
2
2
2
3
5 R4 4 C142 10uF 16V
Q26 BC848B
2
1
2
F
50V
TX_2_4_N TX_2_4_P
VESTEL PROJECT NAME : 17mb95
TX_2_4_N TX_2_4_P
DRAWN BY :ALP KIRAZ-BARAN ÇUBUKÇU
4
5
6
7
A3 T. SHT:10
SCH NAME :06_LVDS
10_BIT PANEL 2
2
C122 220pF
2
DIMMING
6 R3 3 3
1
R254 100R 1 R1
7 R2 2 Q25 BC848B
2
1
TX_1_3_N TX_1_3_P
8
3
S60
BACKLIGHT_DIM 2
220pF 50V
1
D8_TX_A_4_N D8_TX_A_4_P
1
V23 U24 V25 V24 W25 W23 Y23 W24 AA23 Y24 AA25 AA24
DIMMING S64 S63
C104
1
OP_PIN42
LVB0P LVB0N LVB1P LVB1N LVB2P LVB2N LVBCKP LVBCKN LVB3P LVB3N LVB4P LVB4N
JUMPER TX_1_0_N TX_1_0_P
Q24 BC848B
2
2
TX_1_0_N TX_1_0_P
D8_TX_A_2_N D8_TX_A_2_P
1
OP_PIN41
R246 33k R92 10k
1
1
4 FR1 1 3 FR2 2
11
10
9
8
7
6
5
4
3
2
1
CN16
D8_TX_A_0_N D8_TX_A_0_P
2
1
1
R93 10k
U4 MSD8WB9BX
OP_PIN27
S35
1
2
1
2
2
R218 33k R50 10k
Q23 BC848B
2
LVDS OUT OP_PIN11
OP_PIN40
1
1
OP_PIN10 2
2
S42
R95 10k
1
2
R219 33k R78 10k
2
2
S53
1
BACKLIGHT_ON/OFF
R238 33k R90 10k
2
S58
E
D8_TX_A_0_N D8_TX_A_0_P
R854 0R 4 R1 1 3 R2 2
PANEL_VCC_ON/OFF
1
1
DIMMING
F209 90R
R248 33k R91 10k
S57
OP_PIN9
1
PANEL_VCC
12V_VCC
6
5
4
3
2
1
CN14
3D_EN
FERRITE
R241 33k R87 10k
OP_PIN9
S54
PANEL_VCC
LG
R220 33k R79 10k
2
3 1
6 PANEL_VCC
WXGA FFC
S56
R175 47R
3
NC
R43 1k
TX_2_1_N
TX_2_1_P
TX_2_2_N
TX_2_2_P
TX_2_CLK_N
TX_2_CLK_P
TX_2_3_N
TX_2_3_P
OP_PIN9
PANEL_VCC
19" TO 22" DOUBLE LVDS FFC OPTIONS
D
OP_PIN8 2 1
PANEL_VCC
SAM
2
PANEL_VCC
1
C
S39 R221 33k R80 10k
1
2
1
3V3_VCC
R253 33k
MEGA_DCR_IN
OP_PIN7 2
2
CN11
LG BASED 30070519
PANEL_VCC
LVDS 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
B
1
R235 33k R81 10k
R283 10k R94 10k
OP_PIN45 OP_PIN44 OP_PIN43 OP_PIN42 OP_PIN41 OP_PIN40
LVDS 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
PANEL_VCC
2
PANEL_VCC
A
FDC642P Q33
OP_PIN6
1
F16
5
60R
2
2
1
1
2
60R
OP_PIN5
4
PANEL_VCC
R236 33k R88 10k
F30 1
3V3_VCC
3
1
R239 33k R89 10k
PANEL SUPPLY SWITCH
1
2
PANEL_VCC
S40
33k R249
2
8
220nF 25V
TX_1_2_P TX_1_2_N TX_1_1_P TX_1_1_N TX_1_0_P TX_1_0_N OP_PIN11 OP_PIN10 OP_PIN9 OP_PIN8 OP_PIN7 OP_PIN6 OP_PIN5
TX_1_CLK_P TX_1_CLK_N
TX_1_4_P TX_1_4_N TX_1_3_P TX_1_3_N
TX_2_2_P TX_2_2_N TX_2_1_P TX_2_1_N TX_2_0_P TX_2_0_N OP_PIN27
TX_2_CLK_P TX_2_CLK_N
OP_PIN43 OP_PIN42 TX_2_4_P TX_2_4_N TX_2_3_P TX_2_3_N
3D_EN
7
TP53
OPTIONS TABLE
FHD 50Hz 3D FFC A
6
100nF 16V
5
C96
4
2
3
1
2
C136
1
27-06-2012_15:24
8
AX M
S93
2
S2_RESET
100nF10V C39
EXT_RESET
1
C417
S2_TUN_3V3 C416
S2_TUN_3V3
8
9
10
11
12
13
14
XTALP
R180 10k
XTALN
VDDA3
TEST3
TEST2
5
S2_IP C37410pF 50V
IN
4
S2_IN C37510pF 50V
VDDA1
3
LNA_IN
S2 TUNER VDDA6
AGC
VDAA5
VDD_REG
QP
SCL
TEST
21
QN
SDA
20
VDD_DIG
1
BC848B
IP
S2_TUN_3V3 S2_QN
2
10nF 16V S2_QP C37610pF 50V
1 C341
C377
27
26
25
24
23
22
S2_TUN_3V3
50V
50V
1nF 50V
1nF 50V
NC
C230 18pF 50V
S2_SDA
S2_AGC
10nF
C337
10nF
S2_SCL
1k R328 16V
C340
R502 33R R501 33R C231 18pF 50V
1
1nF
R699 2k
2
50V
LNB_OUT 1nF
16V
R700 2k
close to TS2022
C
close to DS3002
16V
USB TP96 60R 4
1
2
VDDI_1V25
3
VDDO_3V3
1
6 IO4
TP92 1
C143 10uF 10V
1
1
TP91
1
1
R178 10k
R179 10k
2
2
1
2
I2C_ADR1 I2C_ADR0
CN17
TP97
SYS_SDA
2
C12 330R 10uF F69 10V
USB1_VCC
5 VDD
IO1 1
U1
1
AZ099-04S
USB1_VCC
4 IO3
IO2 3
1
2
60R 1
4
1
2
TP98
4
1
F5 TP100
1
TP101
R74 10R
2
USB2_DP
2
USB2_DN
2
USB1_DN
2
USB1_DP
GND 2
1
1
R311 10R R309 10R R310 10R
D
3 3 2
1U bom L19
2
C1176 10uF 25V
C1194 10uF 25V
1
1
C582
10uH
1N5819 C1177 10uF 25V
F70 1
1 CN18
CN19
C1195 10uF 25V
TP99
D12
10uH
10pF 50V
F6
SYS_SCL
L10
B
C338
4n7H
3p3F 50V
1
30072534 C579 10uF 25V
U30 M88TS2022
32
31
30
29 DISEQC_OUT
13/18V
2
35V 100uF C1204
2
C228 18pF 50V
C42 100nF 10V
S9
1
D
NC C316
NC
1
S12
S2_SDA SH2
VDDI_1V25
VDDO_3V3
1
VDDI_1V25
R499 33R R500 33R C229 18pF 50V
C585 500fF 50V
CLKO_TS2022 C332
RFBYPASS RESET
16V 10nF
C333 10nF 16V
R181 10k
10nF
10V100nF C36
6
C339
VDDI_1V25
NC
CKDIV_OPT
2
33
NC
C41 100nF 10V
I2C_ADR0
2
2
R104 4k7 R105 4k7 1
S2_SCL
I2C_ADR1
C40 100nF10V
VDDO_3V3
1
C43 100nF10V
NC
16V
NC
28
27
26
25
24
23
22
21
20
19
18
17
R103 4k7 10nF
R102 4k7
2
C330
S2_AGC
NC
1
R698 2k
1
1nF
RESET
VCC_5
DISEQC
VDDO_3V3
VCC_6
NC
7
1
NC7
NC
L20
1
S11
100pF
16 NC
NC 18
1
S20
S18
34
17
1
C439
M_DATA0
16
CK_OUT
S2_TUN_3V3 50V
S14
VCC_2
VDDA2
CAP
NC
2
15
CKXTAL_27
35
DISEQC_IN
M_DATA1
2
C
VCC_1
AAGC
VDDI_1V25
14
VSEL
C44 100nF10V
10V100nF
VDDD_1
A R705 470R
10nF 16V
RES
C584 CN25
C321
M_DATA2
36
S2_TUN_3V3
60R
10nF 16V
C317
M_DATA3
37
10k R2
S2_RESET
10V100nF C37 VDDI_1V25 33R TS1_D3 R4 5 4 TS1_D2 6 R3 3 TS1_D1 7 R2 2 R1 TS1_D0 8 1 R576
4 3
15
19 2
Q45 C38
C320
38
10k R113
3V3_VCC
C318
VCC_7
S19
2
50V
QP NC6
2
S2_TUN_3V3 TS1_D7 TS1_D6 TS1_D5 TS1_D4 VDDO_3V3 10V100nF
1nF
11
13
R575 33R 5 R4 4 6 R3 3 7 R2 2 8 R1 1
40
M_DATA4
NC C45
M_DATA5
QN
12
VDDO_3V3
VDDD_3
41
39
VCC_4
100nF
M_DATA6
42
10
ADDR_SEL0
100nF
S2_QP
S2 DEMOD
GNDA_3
ADDR_SEL1
S2_QN
43
TS1_VLD
1
9
10pF 50V
M_DATA7
VDDA_2
VDDD_2
10pF 50V C372 C50
IN
8
SCL
C373
100nF
U29 M88DS3002
M_ERR
44
R704 3k3 10nF 16V C331
C398 22uF 6V3
TEST1
VDDA_3V3
S13
IP
45
VDDA4
VDDO_3V3
46 R498 33R
3V3_VCC
S2_TUN_3V3
S17
TS1_SYNC
C395 22uF 6V3
F17
50V 27pF
C335 F27
2
GNDA_2
6 7
S2_IN
1
50V 10pF TS1_CLK
S16
47
10nF 16V
C397 22uF 6V3
8
28
C35 100nF10V
54
49
55
50
GNDD
56
51
OLF
CKXTAL_13
57
VCC_9
LNB_EN
R497 33R R496 33R
1 2
10nF 16V
VDDI_1V25
60R
48
M_VAL
X7 27pF27MHz
C334
TP1
5
SDA
100nF
VDDA_1
VCC_3
10pF 50V
S2_IP
VCC_8
SDAT
C48
XTAL_OUT
4
10pF 50V C370
C51
M_CKOUT
50V
C336
F26 1V26_VCC C369
M_SYNC
SCLT
27pF 50V
B
NC
XTAL_IN
3 C371
C49
NC
C396 22uF 6V3
60R
27pF 50V
I2C Address**pin VDD_DIG=High Write : C0H Read : C1H
VDDO_3V3 60R
7
2
LNB_EN
58
53
NC
GNDA_1
2
6
3V3_VCC VDDI_1V25
C414 C415
5 F25
52
C33 100nF10V NC
NC8
NC
NC9
NC
NC2
NC
NC1
60
59
61
62
63 GPO
NC
VDDD_4
1
CLKO_TS2022
NC
NC4
NC
VCC_10
NC
NC5
C46 100nF10V
A
64
VDDA_3V3
4
VDDI_1V25
C34 100nF10V
C32 100nF10V
VDDO_3V3
LOCK
VDDI_1V25
I2C Address**ADDR_SEL pins Write : D0H Read : D1H
C47 100nF10V
3
C319
2
NC3
1
4u7F25V
C114 10uFC115 10V 10uF 10V
330R 2
F11 1
USB2_VCC 330R
2
F50 1
5V_VCC 330R
2
3V3_VCC
C1205
E C236 100nF 16V
VDD
SW
15
BST
14
VBOOST
MP8125 EN LINEDROP
13
VOUT
12
ILIMIT
11
7
POK
TCAP
10
8
13V/18V
EXTM
9
R537 10k
R683 10k C576 22n 30000312 bom C238
15nF 50V
LNB POWER
1 IN 2 GND
100nF 16V
3V3_VCC
C161
OUT 6
U22
ILIM 5
TPS2553-1
S23 USB_ENABLE1 1
E
C160 16V
FAULT 4
3 EN
TP124
USB1_VCC 560R R267 560R R259
5V_VCC
100nF
1 IN 2 GND
OUT 6
U2
ILIM 5
TPS2553-1
USB_ENABLE2
3 EN
FAULT 4
USB2_VCC 560R R193 560R R75
D10 LNB_OUT 1N5819 C573 100nF 50V
C22V
COMP
5V_VCC
100nF50V
D16
6
U20
1N5819
4
15nF 50V 47n 30000334 bom5
13/18V
10uF 25V
C572
1N5819
100nF 16V
C237
R390 100k
3
C578
LINEDROP 15nF 50V nc R276 LNB_POK 10k
3V3_VCC
F
3V3_VCC
R536 10k
nc
R805 180k
25V
16V 100nF
10uF 25V C1225
D11
C577
LNB_EN
BYPASS
16
D9
R702 22k
2
PGND
F
DISEQC_OUT
220nF
12V_VCC
SGND
R392 100k
C1179 10uF 16V
C545 10uF 16V
1 C583
VESTEL PROJECT NAME : 17mb95
T. SHT:10
SCH NAME :07_S2_TUN_S2_DEMOD_USB DRAWN BY :ALP KIRAZ-BARAN ÇUBUKÇU
1
2
3
4
5
6
7
A3 27-06-2012_15:28
8
AX M
2
3
4
5
6
7
8 TP93
S28
3
1
C546
BC858B Q37
2
INR_N
47pF 50V C9
3
OUTR
4
GND
Q12 BC848B
2
100nF 10V
2
1
1
AMP_EN
5
MUTE
6
VSS
R27110uF 10k 2
1
Q13 BC848B
2
R209 10k R264 10k
C18 1uF 16V
C31 10uF 10V
R393 100k
I2S_OUT_MCK
LEFT
OUTP
SDB
INN
GNDB
VDD1
PT2333
VDDA
OUTN
INP
GNDA
U12
R798 18k2
15
MCLK
16
OSC_RES
LINE_L_IN
SC_AUD_L_OUT
SC_AUD_R_OUT
LINE_R_IN
HP_PWML HP_PWMR PVDD_AB BST_A
C3
C2
C1
B3
B2
B1
A3
I2S_OUT_WS I2S_OUT_BCK
44
PGND_AB
43
VDD_AUDIO
2
C116
1
SCLK
BST_C
40
C520
60R
C597 10uF 6V3
AUDIO_DVDD C244 100nF 16V
EXT_RESET
100R R349
C547 1nF 50V
A_OUT2A F71 3V3_VCC 330R
3
C596 10uF 6V3
C243 100nF 16V
C595 10uF 6V3
AUDIO_AVDD C241 100nF I2C Address**pin A_SEL=Low 16V 0x54 I2C Address**pin A_SEL=High 0x56
4
AMP_EN
39
PGND_CD
38
R804 220R 10k R200 R656 5k6
2
OUT_D
C521 220pF 50V
F54 60R
CN15
D28
SC_AUD_L_OUT R_AUDIO_P TP177 R_AUDIO_N TP176 L_AUDIO_P TP178 L_AUDIO_N TP175
1 1
2 1
3 1
4 1
L2 15uH
C611 A_OUT1A
F56 60R L13 15uH L_AUDIO_N
C610 33nF
E
R801 18R
330pF 50V 50V 330pF
R800 18R
F55 60R L12 15uH
R_AUDIO_P F57 60R
37 C604 33nF 50V
36
C1202 1uF 16V
D 1
LINE_L_IN
A_OUT2A
BST_D
PVDD_CD 35
GVDD_OUT
HP_SD
C245 100nF 16V C537 2n2F 50V
34
32
33
SSTIMER
31
VREG
AGND 30
GND 29
DVDD
DVSS 28
F8 3V3_VCC
27
25
OUTP
SDB
RIGHT
24
OUT_C
60R
SC_AUD_R_OUT
C609
VDD_AUDIO
R225 4k7
2
21
SCL
VDD_AUDIO
L_AUDIO_P
42 C606 41
SDA
NCR281 27k
45
BST_B
23
2
3V3_VCC
VDD_AUDIO 50V 330pF R802 18R
46 C607
LRCLK
SDIN
CP
8
R277 1k
F2
220pF 50V
47
OUT_A
OUT_B
C 1
48
20
AUDIO_DVDD
SYS_SCL
C3
INN C1
C2
GNDB B3
VDD1 B2
VDDA
C16 10V 100nF
220nF 10V AMP_EN
A_OUT2B
100R R351 100R R350
SYS_SDA
R20 4k7
220nF 10V
TAS5719 U35
PDN
22
9
SC_L_OUT 16V 1uF
1
C60533nF
PT2333
B1
OUTN A3
A2
A1
INP
GNDA
U3
19
VDD
C19
SC_AUD_L_OUT
10
A_OUT2B
L11 15uH R_AUDIO_N
C608
R799 18R C557 1uF 50V
C242 100nF AMP_EN 16V
AUDIO AMP for <=24"
1
VR_DIG
STEST
1
C28 4u7F 10V
I2S_OUT_SD
MAIN_R
18
26
2
VDD_AUDIO
F
DVSSO
RESETN
A_OUT1B
C111
C13 100nF 10V
R26 4k7
220nF 10V
C125
17
R268 47k R279 30k
C17
A_OUT1B A_OUT1A
220nF 10V AMP_EN
E
A2
A1 MAIN_L
R21 4k7
11
CN
C594 100nF 50V
1
2
HPL_IN
HPL_OUT
3
4
5
6
7
8
9
10
10k R199 R655 5k6
33nF 50V C118
UVP
47pF 50V R270 47k
SC_L_OUT
HPR_OUT
14
A_SEL
2
SC_R_OUT
LINE_R_IN
HPR_IN
AVDD
HPVSS
13
HPVDD
4k7 R145 4k7 R146
C612 C613 1uF 50V 50V 1uF
AVSS
3V3_VCC ADRES SECIMI
VR_ANA
AUDIO_AVDD
PLL_FLTM
12
C1804n7F 50V 470k 47nF R695 16V
11
C181 4n7F 50V 470k 47nF R696 16V
CPN
C466
D
12
1uF
C467 8W 30067972 2w5 30069845
OUTL
GND1
HP_MUTE
CPP
C54 10uF 10V
AUDIO_AVDD
C563 100uF 35V
SK24
S3
5V_VCC
C561 100uF 35V
D18
S1
C146
1
VDD_AUDIO
1N4148
CLOSE TO PIN46 CLOSE TO PIN35
S4
13
1
PLL_FLTP
24V_VCC_AU
S2
D23
12V_VCC
INL_N
DRV632
7
C148 180pF 50V R275 15k
14
INL_P
U16
2
SC_AUD_R_OUT
INR_P
C145
2
R211 10k
3k9 R573
1
C888
1
AMP_MUTE
1
10uF
SC_R_OUT
2
C
R274 15k
1uF 16V
AMP_EN
R263 10k
C1170
1
POP NOISE CIRCUIT
C23
C8
NC NC
B
OPTINAL FOR LINE_OUT C147 180pF 50V R269 47k R280 30k
10uF
2
Q42 BC848B
HP_MUTE
C1217 1uF 50V
16V 100uF
R266 680R
C1220 C1218 1uF 1uF 50V 50V
2
HP_R 100uF 16V
330pF 50V C240 100nF 50V
C1219 1uF 50V
S37
Q41 BC848B
HP_MUTE
3V3_VCC
1
2
5V_VCC
1
R265 680R
4k7 R147
10uH
100uF 16V
R207 10k
2
R717 D1 10k
12V_VCC
R210 10k
C614
AUBCK_OUT
2
S38
D2
I2S_OUT_BCK I2S_OUT_MCK I2S_OUT_WS I2S_OUT_SD
S36
1
2
R709 22R R711 22R
1
R208 10k
B10 C9 C10 B9
3V3_VCC
1N4148
F28 60R
1N4148
10V
OUT_HP_R
10uF 10V
10uH
Layoutta ust ustte yerlestirilecek...
100nF
R703 22R R710 22R
JK1
5
C619
L22 HP_L
10uF 10V
C53
C27 C209 4u7F10uF 10V 10V
TP8
C618
L21 OUT_HP_L
C1171
C598 560pF 50V
C599 560pF 50V
3V3_VCC
DVD_SPDIF SPDIF_OUT
2
HEADPHONE OUTPUT
SAV_R_IN
R278 3k3
SAV_L_IN
R803 220R
C501 330pF 50V
A
1
R329 1k
C7
DSP_SC_L_OUT DSP_SC_R_OUT DSP_MAIN_L_OUT DSP_MAIN_R_OUT
10k R201 C502 330pF 50V
TP95
HP_DETECT
C556 1uF 50V
SAV_AUD_R_IN
SC_R_OUT C549 1nF 50V
C558 1uF C555 50V 1uF 50V
R202 10k
SAV_AUD_L_IN
4
C1227 10nF 16V
1
1
OUT_HP_L OUT_HP_R
1uF 6V3
R708 8k2
DSP_SC_R_OUT
C554 1uF 50V
R205 10k
C1226 10nF 16V
R206 10k
2
HP_R
R262 10k
R654 5k6
1
I2S_OUT_BCK I2S_OUT_MCK I2S_OUT_WS I2S_OUT_SD
SC_L_OUT C548 1nF 50V
6
1
7 C1201
3V3_STBY
C8 D8 D9
C454 3n3F 50V
VDD_AUDIO
I2S_IN_BCK I2S_IN_SD I2S_IN_WS
MAIN_R
2
E6 E5
S30
DSP_MAIN_R_OUT
R718 15k R212 10k R213 10k
SPDIF_IN SPDIF_OUT
1uF 6V3
1
AD9 AC10 AE9
R607 200k
AUVRP AUVAG AUVRM
B
S31
SC_AUD_L_IN SC_AUD_R_IN SAV_L_IN SAV_R_IN
R653 5k6
DSP_SC_L_OUT
R608 200k
AC12 AE12 AC11 AD10 AD11 AE11
TP94 C1200
R397 12k
LINEOUT_L0 LINEOUT_R0 LINEOUT_L2 LINEOUT_R2 LINEOUT_L3 LINEOUT_R3
C586 C587 C591 2u2F C590 2u2F 2u2F 2u2F
2
HP_L
CLOSE TO MSTAR IC
C453 3n3F 50V
R398 12k
EAR_OUTL EAR_OUTR
AA9 Y10
MAIN_L
50V 22pF
Y12 AA12 AA11 AB11 AE8 AC9 Y8 Y9 AA10 AB9
50V 22pF C617
LINEIN_L0 LINEIN_R0 LINEIN_L2 LINEIN_R2 LINEIN_L3 LINEIN_R3 LINEIN_L4 LINEIN_R4 LINEIN_L5 LINEIN_R5
50V 22pF C616
A
DSP_MAIN_L_OUT
50V 22pF C615
7
S29
R707 8k2
U4 MSD8WB9BX
1
1
C5V6
1
F
VESTEL PROJECT NAME : 17mb95 AUDIO AMP for >=26" SCH NAME :08_AUDIO_HEADPHONE DRAWN BY :ALP KIRAZ - BARAN ÇUBUKÇU
5
6
7
A3 T. SHT:10 29-03-2012_13:56
8
AX M
1 2 3 LED2
30067087
MAGIC BUTTON
1
R227 10k 2
5V_STBY 3V3_STBY 2
1
E1 1
S48 2
1
S49 2
4
Q17 BC848B
BC858B C419
1
KEYBOARD_ONBOARD
TP103 3
1
Q39 1
1
2
27pF 50V
Q18 BC848B 2 1
Q38 3
5 R226 10k
F143
1k 2 3
F144
D35 Q16 BC848B 2
1 1
R224 10k
3
6
F39
VDDC
LED&VFD&RF KEYBOARD
Q1 BC848B
2
7
60R
60R
F35 2V5_VCC
C65 100nF 10V 60R
F38 2V5_VCC
C67 100nF 10V
60R
2
IR_IN 2
3
5V_VCC 2
3V3_VCC 2
R117 4k7 R115 4k7 R118 4k7
C63 100nF 10V
1k 3V3_STBY
F146
PWM_OUT_LED3 AUBCK_OUT
Q9 BC848B
NC
1
1
1
1
A5 A23 B17 C11 C19 C22 C23 D14 D18 D19 E8 E17 E18 E19 E22 F8 F17 F18 F19 G8
E9
GND_0 GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19
TEST2
C5V6
D167
7
I2S_OUT_MCK R136 4k7
2V5_VCC
C78 100nF 10V
C445 10uF 6V3
2
F31 C442 10uF 6V3
60R
1
F147 3V3_VCC
R222 10k
3V3_VCC
C444 10uF 6V3
R135 4k7
1
C62 100nF 10V 60R AVDD25_LAN
60R
2
R133 4k7
2V5_VCC
AVDD25_PGA
2
2
AVDD_DDR1_0 AVDD_DDR1_1 AVDD_DDR1_2 AVDD_DDR1_3
AVDD_DDR0_0 AVDD_DDR0_1 AVDD_DDR0_2 AVDD_DDR0_3
VDDP_2
3V3_VCC
1
C61 100nF 10V
60R
3V3_VCC
R132 4k7
2V5_VCC
K17 L16 L17 M17
J17 K15 K16 L15
2
U4 MSD8WB9BX
AVDD_LPLL_0 AVDD_LPLL_1
VDDP_0 VDDP_1
AVDD_AU33 AVDD_EAR33
BYPASS
AVDD_DVI_USB_0 AVDD_DVI_USB_1 AVDD_MPLL AVDD_DMPLL
AVDD_ALIVE
AVDD_PGA25 PGA_COM
AVDD_MOD_0 AVDD_MOD_1
AVDD_LAN25
AVDD_ADC25_0 AVDD_ADC25_1 AVDD_ADC25_2 AVDD_REF25
DVDD_DDR
AVDD_LAN12
G10 G11 G12 G13 G14 G17 G18 G19 G24 H8 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 J5 J7 J8 J9 J10 J11 J12 J13 J14 J15 J16 J18 J19 J25 K9 K13 K14 K18 K19 K22 L9 L12 L13 L14 L18 L19 M9 M10 M11 M15 M16 M18 M20 M21 M22 M25 N10 N11 N13 N14 N15 N16 N17 N19 N20 N21 N22 P7 P8 P9 P11 P12 P13 P16 P17 P18 R8 R9 R11 R12 R13 R17 R18 T8 T9 T11 T12 T13 T14 T15 T16 T17 T18 U7 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 V9 V10 V11 V12 V14 V15 V17 V18 W10 W13 W15
6
2
C58 100nF 10V
AVDD_DDR0 C88 100nF 10V
1
C89 100nF 10V 60R
R131 4k7
C90 100nF 10V
AVDD_DDR0 C82 100nF 10V 2V5_VCC
2
1
F43 C5V6
C83 100nF 10V D166
C84 100nF 10V
R138 4k7
C57 100nF 10V
12
11
C56 100nF 10V
10
AVDD_DDR0
V19
W17 W18
R19 T19
T7 R7
M19
K7 L7 M8 P6
N7
W11 W12
V16 W16
W14
V8 W7 W8 W9
M14
L11
FB_CORE
AVDDL_MOD
GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 GND_82 GND_83 GND_84 GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 GND_91 GND_92 GND_93 GND_94 GND_95 GND_96 GND_97 GND_98 GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134
5
2
2
C91 100nF 10V
S46
C85 100nF 10V
1
9
F49
2
D34 C5V6 8
F42
1
TOUCHPAD_SDA 2
C86 100nF 10V
S45
C80 100nF 10V
1
VDD33
AVDD_LPLL
VDD33
AU33 AVDD_EAR33
AVDD_MPLL AVDD_DMPLL
AVDD_DVI
AVDD_NODIE
AVDD25_PGA PGA_VCOM
AVDD_MOD
AVDD25_LAN
C1203 1uF 16V
27pF 50V
C5V6 2
S51TP12 1
7
6
5
4
3
C60 100nF 10V
TOUCHPAD_SDA
2
1
TP13
1
C5V6 D165
60R
AVDD25_REF
ADC2P5
60R F33
F32
P19
R16
AVDDLV_USB VDDC_0 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 AVDD12
4
C420
2
2
2
S50
F140
10k R228
1k TOUCHPAD_SCL
TOUCHPAD_SCL C87 100nF 10V
1
1k
2
E
KEYBOARD C59 100nF 10V
220R R719
F138 C81 100nF 10V
LED1
1
KEYBOARD C447 10uF 6V3
5
F139
TP184
C630 100nF 10V C441 10uF 6V3
4
3V3_STBY C399 220uF 6V3
C446 10uF 6V3
2
1k 60R
2
1k C73 100nF 10V
220R R722
2
AVDD_NODIE1V2_VCC
1
TP2 1
C401 22uF 6V3
3
C74 100nF 10V 60R
2
F44 C400 22uF 6V3
220R R720
SW1 2
F137 3V3_STBY C72 100nF 10V
1
F45 AVDD_MPLL
TP183
C75 100nF 10V 60R
2
S22 3V3_STBY 60R
1
F46 AVDD_DMPLL C11 C71 100nF 220uF 10V 6V3
220R R721
1
TOUCH_PAD_OPTION 2
60R
1
AVDD_EAR33 3V3_STBY
TP182
AU33
1
KEYBOARD_ONBOARD CN1
AVDD_DVI C70 100nF 10V
TP181
1
1V5_VCC
2
R793 47R D162
F41
1
D C5V6
VDDC
CN27
2
60R
R272 150R
6
VDDC
10k R229
2
60R
C5V6
D17
1
1
TP4 C69 100nF 10V
3
1
E2 TP3
C443 10uF 6V3
1
5
4
K12 G9 H9 K10 K11 L10 M12 M13 N12 P14 P15 R10 R14 R15 T10 P10
2
1
+
G1
3
3V3_STBY
T
3V3_STBY
TP104 2k R701 SOURCE R706 2 470R
C
TP5
60R
G2
F G3
TP102 2
TP6
C
1
3V3_STBY
3
R182 10k
B
C5V6
A
G4
4
CN26
D163
1 8
F47 C77 100nF 10V
1
R346 100R
VESTEL PROJECT NAME : 17mb95
SCH NAME :09_MST_SUPPLY_KEY_TOUCH
DRAWN BY :ALP KIRAZ-BARAN ÇUBUKÇU
8
C76 100nF 10V VDD33
PWM1
A
F48 C79 100nF 10V AVDD_LPLL
NC
B
AVDD_MOD
F40 C68 100nF 10V
F37 AVDD25_REF C66 100nF 10V
F36 PGA_VCOM
C
F34 ADC2P5 C64 100nF 10V
C5V6
D164
MSTAR BOOT CONFIG D
1k 5V_STBY
PWM0
1
1
1k 3
2
PWM_OUT_LED3
E
1
C239 100nF 16V
2
S26 3D_EN
1 3
nc
2
BC858B 3D_ENABLE
F
A3
06-04-2012_10:56
T. SHT:10
AX M
1
2
3
4
5
6
7
8
INDIA OPTION
R725 4k7
2
1
TP44
F162 1k
4
2
VGA_VSNC VGA_HSNC
B PC_DET 100nF 10V
BAV70 D170
TP42
1
GND
1
1
SDA
1
1
1
R230 10k R231 10k R232 10k 1
D32 BAV70
2
2
2
CDA4C16GTH
6
5
2
3
30069137
1
TP45
1k
VGA_G S24 VGA_R S34
SC_AUD_L_OUT
1
R547 75R
CN29
S47 S62
C
F9
2
1
S44
1
AMP_MUTE
SCART AUDIO FILTER
2
2
1
10V R330 1k
5
6
D31
1k 1
TP54
JK3
D
1
7
SC_AUD_L_IN
10k R234
NC PR_IN
TP9 2 3 1
1
R233 10k
4
F152
C522 C93100nF S43
Q15 BC848B
2
1
1
3
R223 10k
2
2
100nF 10V
4k7 R149
1 2
220pF 50V
1
CDA4C16GTH
Q14 BC848B
2
1 2
50V 220pF
1
C94
R352 100R
C523
4n7F 50V
2
INPUT
3
3
SPDIF_OUT
YPBPR
SPDIF OUT INTERFACE
7
C328 10uF 10V
SC_AUD_R_OUT
2
2
2
R354 100R
8
1
4k7 R148
F150
1
5V_VCC
C469
SCART_AUD_R_IN
A2
2
1
60R
1k
SCART_AUD_L_IN
10k R818
1
50V 4n7F
TP22 C504 330pF 50V
D
2
TP21
1
1
R353 100R
A1
SCL
R237 10k R569 510R R570 510R R731 2k4
2
C468
SCART_AUD_R_IN
2
F161 1k
1 3 1k
TP20
1
TP49
SCART_AUD_L_IN 1
WP
VGA_B 1
C381 F148
1
ST24LC21
3
C95 2
A0
U34
F163
SC_PIN8
100nF 10V
3
TP46
1
4
1
UART-RX-SC
1
1
50V 33pF
75R R530
R546 75R
TP18
C503 330pF 50V
1
4
SC_G
27pF 50V
C384
6
2
TP17
1
6
4
3
D6 7
1
1
1
SC_B
5
7
8
50V 33pF
TP47
R545 75R
8
R723 22k D33
2
TP19
1k
1
8
5
9
1
UART-TX-SC
1
2
C382
1
2
7
2
1 9
75R R532
2
2
75R R538
1
VGA_DDC_5V
C426
TP16
2
S59 F160
2
1
10
1
1
TP15
10
27pF 50V
1
11
5 R4 4
C427
TP14
11
C425
1
12
5
2 NUP4004M5 4 D7 5
12
6
2
2
13
100pF 50V
VCC
7
6 R3 3
1
75R R534 75R R535 1
8 1
7 R2 2
27pF 50V
TP23
1
14
10k R693
2
13
SC_R
C15V
15
50V 33pF
SC_FB
1
A
24C02 option
2
TP24
1
47R R373
C809
VGA_DDC_5V
C1178
C386 2
16
R355 100R
R618 33k
1
100R R794
1
R688 100R 8 1 R1
14
10uF 10V
R416 68R
SC_CVBS_OUT
17
15 CVBS0_OUT
1
C97 100nF 10V
2
1
SC_CVBS_OUT
TP43
TP39 TP40 TP41
2
C211
50V 33pF 75R R531
R730 68k
BC858B Q40 Q20 BC848B
C385
2
VGA INPUT
R619 33k
1
R533 75R
2 1 RED
TP25
1
SCART LT1
10uF 16V
JK4
50V 33pF
18
SC1
3 WHT
SCART_AUD_R_IN
TP26
1
19
C
5V_VCC C854 R728 390R
8
7 CDA4C16GTH
2
D29 3
1
C383 33pF 50V
R419 220R
12V_VCC
SC_CVBS_IN
20
B
4 YEL
SCART_AUD_L_IN
1
6
8
5
7 CDA4C16GTH
4
TP63
1
3
21
4
A
2
D4
5
SCART 1
6
SC_CVBS_IN
JK15
SC_AUD_R_IN
F154
5
PB_IN 1
4
TP55
1k
3 C600 560pF 50V
R401 12k
R402 12k
C507 330pF 50V
C508 330pF 50V
C601 560pF 50V
6 2
R7 4k7 2
2 1
2
R29 47k
SLIM SIDE AV
50V 22pF C493
2
E
C620
1
E
Y_IN
1
L23 50V 4p7F
1
220nH
1k
2
3V3_VCC
2
TP56 F155
1
3
1
2
1
1
1
75R R548 75R R550 75R R549
2
1
IR_IN
DVD_IR R9 4k7
27pF 50V C430 27pF 1 2 50V C429 27pF 1 2 50V C428
BC848B Q3
2
75R R551
DVD CONNECTION
1
SAV_CVBS
S106
SAV_AUD_L_IN
DVD_CVBS
2
3
4
2
5
6
2
DVD_SPDIF
1
R28 100R
OPTIONAL GASGET POSITIONS
7
8
9
10
50V 220pF
1
S21
GS1
!
GS2
FS5 1
TP29
TP31
330pF 50V
10uF 16V
2
1
R27 TP27 100R TP28
4k7 R6
2 1
TP58
C120
SAV_AUD_R_IN
C514
D15
1k 1
C5V6
F157
7
F
1
DVD_SENSE
100nF10V
5
5V_VCC
4A/24VDC 1
C26
1k JK10
CN7
2
2
12V_VCC
GS3
4A/24VDC
2
DVD_WAKEUP DVD_IR TP30
D13
330pF 50V
1k
F156
4
F158
1
TP59
1
50V 27pF
1
3
FS3
TP11
F
GS4
C5V6
R203 75R R177 180R
TP10
C513
1
1k 6
C126
TP60 F159
2
220pF 50V
TP61
1
1
1
1
C5V6 C526
D21
2
DVD_IR_ON/OFF
NC
GS5
VESTEL PROJECT NAME : 17mb95
2
T. SHT:10
SCH NAME :10_AV_INOUT_DVD
C121
DRAWN BY :ALP KIRAZ-BARAN ÇUBUKÇU
1
2
3
4
5
6
7
A3 28-06-2012_10:33
8
AX M