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Code No: 117BZ Set No. 1 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD IV B.Tech. I Sem., I Mid-Term Examinations, September - 2017 COMPUTER ORGANIZATION Objective Exam Name: ______________________________ Hall Ticket No. Answer All Questions. All Questions Carry Equal Marks. Time: 20 Min. Marks: 10. I.
Choose the correct alternative:
1.
Which of the following mapping procedure is not used in organization of cache memory. [ a) associative mapping b) page mapping c) direct mapping d) set associative mapping
2.
In which addressing mode the effective address mode is equal to the address part of instruction [ ] a) Indirect addressing mode b) Index addressing mode c) Relative addressing mode d) direct addressing mode
3.
EPROM stands for [ ] a) Electrically Programmable Read Only Memory. b) Erasable Pre-fed Read Only Memory. c) Erasable Programmable Read Only Memory d) Electrically Programmed Read Only Memory.
4.
The bit used to signify that the cache location is updated is ________. a) Dirty bit b) Update bit c) Reference bit d) Flag bit
5.
The signal sent to the device from the processor to the device after receiving an interrupt is [ ] a) Interrupt-acknowledge b) Return signal c) Service signal d) Permission signal
6.
The two phases of executing an instruction are, a) Instruction decoding and storage b) Instruction fetch and instruction execution c) Instruction execution and storage d) Instruction fetch and Instruction processing
[
]
7.
The DMA controller has _______ registers a) 4 b) 2 c) 3 d) 1
[
]
8.
Which of the following is an output device? a) printer b) Keyboard c) Light pen
[
]
[
]
[
]
9.
10.
Which of the following is an auxiliary storage device? a) magnetic tape b) magnetic disk c) floppy disk
[
]
]
d) mouse
d) all
The algorithm to remove and place new contents into the cache is called _______. a) Replacement algorithm b) Renewal algorithm c) Updation d) None
Cont…..2
Code No: 117BZ
:2:
Set No. 1
II
Fill in the Blanks
11.
________program is used to start computer software operation when the power is turned on.
12.
________________ RAM stores information in the form of electric charges applied to capacitors.
13.
CISC stands for _____________________________ .
14.
Processing no of independent programs concurrently is called ____________________ .
15.
When CPU refers to memory and not finds the word in cache, but in main memory the process is called _____.
16.
Hit ratio is given by ______________________________ .
17.
The command which is used to test various status conditions in the interface and peripheral is called ________.
18.
The unit which performs arithmetic and logical operations is called ____________________.
19.
The insertion operation of stack is called _______________________.
20.
Interrupts arise from illegal or erroneous use of an instruction is called ________________ .
-oOo-
Code No: 117BZ Set No. 2 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD IV B. Tech. I Sem., I Mid-Term Examinations, September - 2017 COMPUTER ORGANIZATION Objective Exam Name: ______________________________ Hall Ticket No. Answer All Questions. All Questions Carry Equal Marks. Time: 20 Min. Marks: 10. I.
Choose the correct alternative:
1.
The bit used to signify that the cache location is updated is ________. a) Dirty bit b) Update bit c) Reference bit d) Flag bit
2.
The signal sent to the device from the processor to the device after receiving an interrupt is [ ] a) Interrupt-acknowledge b) Return signal c) Service signal d) Permission signal
3.
The two phases of executing an instruction are, a) Instruction decoding and storage b) Instruction fetch and instruction execution c) Instruction execution and storage d) Instruction fetch and Instruction processing
[
]
4.
The DMA controller has _______ registers a) 4 b) 2 c) 3 d) 1
[
]
5.
Which of the following is an output device? a) printer b) Keyboard c) Light pen
[
]
[
]
[
]
6.
Which of the following is an auxiliary storage device? a) magnetic tape b) magnetic disk c) floppy disk
[
]
d) mouse
d) all
7.
The algorithm to remove and place new contents into the cache is called _______. a) Replacement algorithm b) Renewal algorithm c) Updation d) None
8.
Which of the following mapping procedure is not used in organization of cache memory. [ a) associative mapping b) page mapping c) direct mapping d) set associative mapping
9.
In which addressing mode the effective address mode is equal to the address part of instruction [ ] a) Indirect addressing mode b) Index addressing mode c) Relative addressing mode d) direct addressing mode
10.
EPROM stands for [ ] a) Electrically Programmable Read Only Memory. b) Erasable Pre-fed Read Only Memory. c) Erasable Programmable Read Only Memory d) Electrically Programmed Read Only Memory.
]
Cont…..2
Code No: 117BZ
:2:
Set No. 2
II
Fill in the Blanks
11.
Processing no of independent programs concurrently is called ____________________ .
12.
When CPU refers to memory and not finds the word in cache, but in main memory the process is called _____.
13.
Hit ratio is given by ______________________________ .
14.
The command which is used to test various status conditions in the interface and peripheral is called ________.
15.
The unit which performs arithmetic and logical operations is called ____________________.
16.
The insertion operation of stack is called _______________________.
17.
Interrupts arise from illegal or erroneous use of an instruction is called ________________ .
18.
________program is used to start computer software operation when the power is turned on.
19.
________________ RAM stores information in the form of electric charges applied to capacitors.
20.
CISC stands for _____________________________ .
-oOo-
Code No: 117BZ Set No. 3 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD IV B. Tech. I Sem., I Mid-Term Examinations, September - 2017 COMPUTER ORGANIZATION Objective Exam Name: ______________________________ Hall Ticket No. Answer All Questions. All Questions Carry Equal Marks. Time: 20 Min. Marks: 10. I.
Choose the correct alternative:
1.
The two phases of executing an instruction are, a) Instruction decoding and storage b) Instruction fetch and instruction execution c) Instruction execution and storage d) Instruction fetch and Instruction processing
[
]
2.
The DMA controller has _______ registers a) 4 b) 2 c) 3 d) 1
[
]
3.
Which of the following is an output device? a) printer b) Keyboard c) Light pen
[
]
[
]
[
]
4.
Which of the following is an auxiliary storage device? a) magnetic tape b) magnetic disk c) floppy disk
d) mouse
d) all
5.
The algorithm to remove and place new contents into the cache is called _______. a) Replacement algorithm b) Renewal algorithm c) Updation d) None
6.
Which of the following mapping procedure is not used in organization of cache memory. [ a) associative mapping b) page mapping c) direct mapping d) set associative mapping
7.
In which addressing mode the effective address mode is equal to the address part of instruction [ ] a) Indirect addressing mode b) Index addressing mode c) Relative addressing mode d) direct addressing mode
8.
EPROM stands for [ ] a) Electrically Programmable Read Only Memory. b) Erasable Pre-fed Read Only Memory. c) Erasable Programmable Read Only Memory d) Electrically Programmed Read Only Memory.
9.
The bit used to signify that the cache location is updated is ________. a) Dirty bit b) Update bit c) Reference bit d) Flag bit
10.
The signal sent to the device from the processor to the device after receiving an interrupt is [ ] a) Interrupt-acknowledge b) Return signal c) Service signal d) Permission signal
[
]
]
Cont…..2
Code No: 117BZ
:2:
Set No. 3
II
Fill in the Blanks
11.
Hit ratio is given by ______________________________ .
12.
The command which is used to test various status conditions in the interface and peripheral is called ________.
13.
The unit which performs arithmetic and logical operations is called ____________________.
14.
The insertion operation of stack is called _______________________.
15.
Interrupts arise from illegal or erroneous use of an instruction is called ________________ .
16.
________program is used to start computer software operation when the power is turned on.
17.
________________ RAM stores information in the form of electric charges applied to capacitors.
18.
CISC stands for _____________________________ .
19.
Processing no of independent programs concurrently is called ____________________ .
20.
When CPU refers to memory and not finds the word in cache, but in main memory the process is called _____.
-oOo-
Code No: 117BZ Set No. 4 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD IV B. Tech. I Sem., I Mid-Term Examinations, September - 2017 COMPUTER ORGANIZATION Objective Exam Name: ______________________________ Hall Ticket No. Answer All Questions. All Questions Carry Equal Marks. Time: 20 Min. Marks: 10. I.
Choose the correct alternative:
1.
Which of the following is an output device? a) printer b) Keyboard c) Light pen
2.
Which of the following is an auxiliary storage device? a) magnetic tape b) magnetic disk c) floppy disk
[
]
[
]
[
]
d) mouse
d) all
3.
The algorithm to remove and place new contents into the cache is called _______. a) Replacement algorithm b) Renewal algorithm c) Updation d) None
4.
Which of the following mapping procedure is not used in organization of cache memory. [ a) associative mapping b) page mapping c) direct mapping d) set associative mapping
5.
In which addressing mode the effective address mode is equal to the address part of instruction [ ] a) Indirect addressing mode b) Index addressing mode c) Relative addressing mode d) direct addressing mode
6.
EPROM stands for [ ] a) Electrically Programmable Read Only Memory. b) Erasable Pre-fed Read Only Memory. c) Erasable Programmable Read Only Memory d) Electrically Programmed Read Only Memory.
7.
The bit used to signify that the cache location is updated is ________. a) Dirty bit b) Update bit c) Reference bit d) Flag bit
8.
The signal sent to the device from the processor to the device after receiving an interrupt is [ ] a) Interrupt-acknowledge b) Return signal c) Service signal d) Permission signal
9.
The two phases of executing an instruction are, a) Instruction decoding and storage b) Instruction fetch and instruction execution c) Instruction execution and storage d) Instruction fetch and Instruction processing
[
]
10.
The DMA controller has _______ registers a) 4 b) 2 c) 3 d) 1
[
]
[
]
]
Cont…..2
Code No: 117BZ
:2:
Set No. 4
II
Fill in the Blanks
11.
The unit which performs arithmetic and logical operations is called ____________________.
12.
The insertion operation of stack is called _______________________.
13.
Interrupts arise from illegal or erroneous use of an instruction is called ________________ .
14.
________program is used to start computer software operation when the power is turned on.
15.
________________ RAM stores information in the form of electric charges applied to capacitors.
16.
CISC stands for _____________________________ .
17.
Processing no of independent programs concurrently is called ____________________ .
18.
When CPU refers to memory and not finds the word in cache, but in main memory the process is called _____.
19.
Hit ratio is given by ______________________________ .
20.
The command which is used to test various status conditions in the interface and peripheral is called ________.
